1 // SPDX-License-Identifier: GPL-2.0-or-later 1
2 /*
3 * Linux/PA-RISC Project (http://www.parisc-li
4 *
5 * Floating-point emulation code
6 * Copyright (C) 2001 Hewlett-Packard (Paul B
7 */
8 /*
9 * BEGIN_DESC
10 *
11 * File:
12 * @(#) pa/spmath/fcnvff.c
13 *
14 * Purpose:
15 * Single Floating-point to Double Floati
16 * Double Floating-point to Single Floati
17 *
18 * External Interfaces:
19 * dbl_to_sgl_fcnvff(srcptr,_nullptr,dstp
20 * sgl_to_dbl_fcnvff(srcptr,_nullptr,dstp
21 *
22 * Internal Interfaces:
23 *
24 * Theory:
25 * <<please update with a overview of the
26 *
27 * END_DESC
28 */
29
30
31 #include "float.h"
32 #include "sgl_float.h"
33 #include "dbl_float.h"
34 #include "cnv_float.h"
35
36 /*
37 * Single Floating-point to Double Floating-p
38 */
39 /*ARGSUSED*/
40 int
41 sgl_to_dbl_fcnvff(
42 sgl_floating_point *srcptr,
43 unsigned int *_nullptr,
44 dbl_floating_point *dstptr,
45 unsigned int *status)
46 {
47 register unsigned int src, resultp1, r
48 register int src_exponent;
49
50 src = *srcptr;
51 src_exponent = Sgl_exponent(src);
52 Dbl_allp1(resultp1) = Sgl_all(src); /
53 /*
54 * Test for NaN or infinity
55 */
56 if (src_exponent == SGL_INFINITY_EXPON
57 /*
58 * determine if NaN or infinit
59 */
60 if (Sgl_iszero_mantissa(src))
61 /*
62 * is infinity; want t
63 */
64 Dbl_setinfinity_expone
65 Dbl_copytoptr(resultp1
66 return(NOEXCEPTION);
67 }
68 else {
69 /*
70 * is NaN; signaling o
71 */
72 if (Sgl_isone_signalin
73 /* trap if INV
74 if (Is_invalid
75 return
76 /* make NaN qu
77 else {
78 Set_in
79 Sgl_se
80 }
81 }
82 /*
83 * NaN is quiet, retur
84 */
85 Dbl_setinfinity_expone
86 Sgl_to_dbl_mantissa(sr
87 Dbl_copytoptr(resultp1
88 return(NOEXCEPTION);
89 }
90 }
91 /*
92 * Test for zero or denormalized
93 */
94 if (src_exponent == 0) {
95 /*
96 * determine if zero or denorm
97 */
98 if (Sgl_isnotzero_mantissa(src
99 /*
100 * is denormalized; wa
101 */
102 Sgl_clear_signexponent
103 Sgl_leftshiftby1(src);
104 Sgl_normalize(src,src_
105 Sgl_to_dbl_exponent(sr
106 Sgl_to_dbl_mantissa(sr
107 }
108 else {
109 Dbl_setzero_exponentma
110 }
111 Dbl_copytoptr(resultp1,resultp
112 return(NOEXCEPTION);
113 }
114 /*
115 * No special cases, just complete the
116 */
117 Sgl_to_dbl_exponent(src_exponent, resu
118 Sgl_to_dbl_mantissa(Sgl_mantissa(src),
119 Dbl_copytoptr(resultp1,resultp2,dstptr
120 return(NOEXCEPTION);
121 }
122
123 /*
124 * Double Floating-point to Single Floating-p
125 */
126 /*ARGSUSED*/
127 int
128 dbl_to_sgl_fcnvff(
129 dbl_floating_point *srcptr
130 unsigned int *_nullptr,
131 sgl_floating_point *dstptr
132 unsigned int *status)
133 {
134 register unsigned int srcp1, srcp2, re
135 register int src_exponent, dest_expone
136 register boolean inexact = FALSE, guar
137 register boolean lsb_odd = FALSE;
138 boolean is_tiny = FALSE;
139
140 Dbl_copyfromptr(srcptr,srcp1,srcp2);
141 src_exponent = Dbl_exponent(srcp1);
142 Sgl_all(result) = Dbl_allp1(srcp1); /
143 /*
144 * Test for NaN or infinity
145 */
146 if (src_exponent == DBL_INFINITY_EXPON
147 /*
148 * determine if NaN or infinit
149 */
150 if (Dbl_iszero_mantissa(srcp1,
151 /*
152 * is infinity; want t
153 */
154 Sgl_setinfinity_expone
155 *dstptr = result;
156 return(NOEXCEPTION);
157 }
158 /*
159 * is NaN; signaling or quiet?
160 */
161 if (Dbl_isone_signaling(srcp1)
162 /* trap if INVALIDTRAP
163 if (Is_invalidtrap_ena
164 else {
165 Set_invalidfla
166 /* make NaN qu
167 Dbl_set_quiet(
168 }
169 }
170 /*
171 * NaN is quiet, return as sin
172 */
173 Sgl_setinfinity_exponent(resul
174 Sgl_set_mantissa(result,Dallp1
175 if (Sgl_iszero_mantissa(result
176 *dstptr = result;
177 return(NOEXCEPTION);
178 }
179 /*
180 * Generate result
181 */
182 Dbl_to_sgl_exponent(src_exponent,dest_
183 if (dest_exponent > 0) {
184 Dbl_to_sgl_mantissa(srcp1,srcp
185 stickybit,lsb_odd);
186 }
187 else {
188 if (Dbl_iszero_exponentmantiss
189 Sgl_setzero_exponentma
190 *dstptr = result;
191 return(NOEXCEPTION);
192 }
193 if (Is_underflowtrap_enabled()
194 Dbl_to_sgl_mantissa(sr
195 guardbit,stickybit,lsb
196 }
197 else {
198 /* compute result, det
199 * and set Underflowfl
200 */
201 Dbl_to_sgl_denormalize
202 dest_mantissa,inexact,
203 is_tiny);
204 }
205 }
206 /*
207 * Now round result if not exact
208 */
209 if (inexact) {
210 switch (Rounding_mode()) {
211 case ROUNDPLUS:
212 if (Sgl_iszero
213 break;
214 case ROUNDMINUS:
215 if (Sgl_isone_
216 break;
217 case ROUNDNEAREST:
218 if (guardbit)
219 if (stickyb
220 }
221 }
222 }
223 Sgl_set_exponentmantissa(result,dest_m
224
225 /*
226 * check for mantissa overflow after r
227 */
228 if ((dest_exponent>0 || Is_underflowtr
229 Sgl_isone_hidden(result)) dest_exp
230
231 /*
232 * Test for overflow
233 */
234 if (dest_exponent >= SGL_INFINITY_EXPO
235 /* trap if OVERFLOWTRAP enable
236 if (Is_overflowtrap_enabled())
237 /*
238 * Check for gross ove
239 */
240 if (dest_exponent >= S
241 return(UNIMPLE
242
243 /*
244 * Adjust bias of resu
245 */
246 Sgl_setwrapped_exponen
247 *dstptr = result;
248 if (inexact)
249 if (Is_inexacttrap
250 return(OVERFLO
251 else Set_inexactfl
252 return(OVERFLOWEXCEPTI
253 }
254 Set_overflowflag();
255 inexact = TRUE;
256 /* set result to infinity or l
257 Sgl_setoverflow(result);
258 }
259 /*
260 * Test for underflow
261 */
262 else if (dest_exponent <= 0) {
263 /* trap if UNDERFLOWTRAP enabl
264 if (Is_underflowtrap_enabled()
265 /*
266 * Check for gross und
267 */
268 if (dest_exponent <= -
269 return(UNIMPLE
270 /*
271 * Adjust bias of resu
272 */
273 Sgl_setwrapped_exponen
274 *dstptr = result;
275 if (inexact)
276 if (Is_inexacttrap
277 return(UNDERFL
278 else Set_inexactfl
279 return(UNDERFLOWEXCEPT
280 }
281 /*
282 * result is denormalized or
283 */
284 if (inexact && is_tiny) Set_und
285
286 }
287 else Sgl_set_exponent(result,dest_expo
288 *dstptr = result;
289 /*
290 * Trap if inexact trap is enabled
291 */
292 if (inexact)
293 if (Is_inexacttrap_enabled())
294 else Set_inexactflag();
295 return(NOEXCEPTION);
296 }
297
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