1 // SPDX-License-Identifier: GPL-2.0-or-later 1
2 /*
3 * Linux/PA-RISC Project (http://www.parisc-li
4 *
5 * Floating-point emulation code
6 * Copyright (C) 2001 Hewlett-Packard (Paul B
7 */
8 /*
9 * BEGIN_DESC
10 *
11 * File:
12 * @(#) pa/spmath/fcnvfut.c
13 *
14 * Purpose:
15 * Floating-point to Unsigned Fixed-point
16 *
17 * External Interfaces:
18 * dbl_to_dbl_fcnvfut(srcptr,_nullptr,dst
19 * dbl_to_sgl_fcnvfut(srcptr,_nullptr,dst
20 * sgl_to_dbl_fcnvfut(srcptr,_nullptr,dst
21 * sgl_to_sgl_fcnvfut(srcptr,_nullptr,dst
22 *
23 * Internal Interfaces:
24 *
25 * Theory:
26 * <<please update with a overview of the
27 *
28 * END_DESC
29 */
30
31
32 #include "float.h"
33 #include "sgl_float.h"
34 #include "dbl_float.h"
35 #include "cnv_float.h"
36
37 /*********************************************
38 * Floating-point to Unsigned Fixed-point Con
39 *********************************************
40
41 /*
42 * Convert single floating-point to single fi
43 * with truncated result
44 */
45 /*ARGSUSED*/
46 int
47 sgl_to_sgl_fcnvfut (sgl_floating_point * srcpt
48 unsigned int *dstptr, unsi
49 {
50 register unsigned int src, result;
51 register int src_exponent;
52
53 src = *srcptr;
54 src_exponent = Sgl_exponent(src) - SGL
55
56 /*
57 * Test for overflow
58 */
59 if (src_exponent > SGL_FX_MAX_EXP + 1)
60 if (Sgl_isone_sign(src)) {
61 result = 0;
62 } else {
63 result = 0xffffffff;
64 }
65 if (Is_invalidtrap_enabled())
66 return(INVALIDEXCEPTIO
67 }
68 Set_invalidflag();
69 *dstptr = result;
70 return(NOEXCEPTION);
71 }
72 /*
73 * Generate result
74 */
75 if (src_exponent >= 0) {
76 /*
77 * Check sign.
78 * If negative, trap unimpleme
79 */
80 if (Sgl_isone_sign(src)) {
81 result = 0;
82 if (Is_invalidtrap_ena
83 return(INVALID
84 }
85 Set_invalidflag();
86 *dstptr = result;
87 return(NOEXCEPTION);
88 }
89 Sgl_clear_signexponent_set_hid
90 Suint_from_sgl_mantissa(src,sr
91 *dstptr = result;
92
93 /* check for inexact */
94 if (Sgl_isinexact_to_unsigned(
95 if (Is_inexacttrap_ena
96 else Set_inexactflag()
97 }
98 }
99 else {
100 *dstptr = 0;
101
102 /* check for inexact */
103 if (Sgl_isnotzero_exponentmant
104 if (Is_inexacttrap_ena
105 else Set_inexactflag()
106 }
107 }
108 return(NOEXCEPTION);
109 }
110
111 /*
112 * Single Floating-point to Double Unsigned F
113 */
114 /*ARGSUSED*/
115 int
116 sgl_to_dbl_fcnvfut (sgl_floating_point * srcpt
117 dbl_unsigned * dstptr, uns
118 {
119 register int src_exponent;
120 register unsigned int src, resultp1, r
121
122 src = *srcptr;
123 src_exponent = Sgl_exponent(src) - SGL
124
125 /*
126 * Test for overflow
127 */
128 if (src_exponent > DBL_FX_MAX_EXP + 1)
129 if (Sgl_isone_sign(src)) {
130 resultp1 = resultp2 =
131 } else {
132 resultp1 = resultp2 =
133 }
134 if (Is_invalidtrap_enabled())
135 return(INVALIDEXCEPTIO
136 }
137 Set_invalidflag();
138 Duint_copytoptr(resultp1,resul
139 return(NOEXCEPTION);
140 }
141 /*
142 * Generate result
143 */
144 if (src_exponent >= 0) {
145 /*
146 * Check sign.
147 * If negative, trap unimpleme
148 */
149 if (Sgl_isone_sign(src)) {
150 resultp1 = resultp2 =
151 if (Is_invalidtrap_ena
152 return(INVALID
153 }
154 Set_invalidflag();
155 Duint_copytoptr(result
156 return(NOEXCEPTION);
157 }
158 Sgl_clear_signexponent_set_hid
159 Duint_from_sgl_mantissa(src,sr
160 Duint_copytoptr(resultp1,resul
161
162 /* check for inexact */
163 if (Sgl_isinexact_to_unsigned(
164 if (Is_inexacttrap_ena
165 else Set_inexactflag()
166 }
167 }
168 else {
169 Duint_setzero(resultp1,resultp
170 Duint_copytoptr(resultp1,resul
171
172 /* check for inexact */
173 if (Sgl_isnotzero_exponentmant
174 if (Is_inexacttrap_ena
175 else Set_inexactflag()
176 }
177 }
178 return(NOEXCEPTION);
179 }
180
181 /*
182 * Double Floating-point to Single Unsigned F
183 */
184 /*ARGSUSED*/
185 int
186 dbl_to_sgl_fcnvfut (dbl_floating_point * srcpt
187 unsigned int *dstptr, unsi
188 {
189 register unsigned int srcp1, srcp2, re
190 register int src_exponent;
191
192 Dbl_copyfromptr(srcptr,srcp1,srcp2);
193 src_exponent = Dbl_exponent(srcp1) - D
194
195 /*
196 * Test for overflow
197 */
198 if (src_exponent > SGL_FX_MAX_EXP + 1)
199 if (Dbl_isone_sign(srcp1)) {
200 result = 0;
201 } else {
202 result = 0xffffffff;
203 }
204 if (Is_invalidtrap_enabled())
205 return(INVALIDEXCEPTIO
206 }
207 Set_invalidflag();
208 *dstptr = result;
209 return(NOEXCEPTION);
210 }
211 /*
212 * Generate result
213 */
214 if (src_exponent >= 0) {
215 /*
216 * Check sign.
217 * If negative, trap unimpleme
218 */
219 if (Dbl_isone_sign(srcp1)) {
220 result = 0;
221 if (Is_invalidtrap_ena
222 return(INVALID
223 }
224 Set_invalidflag();
225 *dstptr = result;
226 return(NOEXCEPTION);
227 }
228 Dbl_clear_signexponent_set_hid
229 Suint_from_dbl_mantissa(srcp1,
230 *dstptr = result;
231
232 /* check for inexact */
233 if (Dbl_isinexact_to_unsigned(
234 if (Is_inexacttrap_ena
235 else Set_inexactflag()
236 }
237 }
238 else {
239 *dstptr = 0;
240
241 /* check for inexact */
242 if (Dbl_isnotzero_exponentmant
243 if (Is_inexacttrap_ena
244 else Set_inexactflag()
245 }
246 }
247 return(NOEXCEPTION);
248 }
249
250 /*
251 * Double Floating-point to Double Unsigned F
252 */
253 /*ARGSUSED*/
254 int
255 dbl_to_dbl_fcnvfut (dbl_floating_point * srcpt
256 dbl_unsigned * dstptr, uns
257 {
258 register int src_exponent;
259 register unsigned int srcp1, srcp2, re
260
261 Dbl_copyfromptr(srcptr,srcp1,srcp2);
262 src_exponent = Dbl_exponent(srcp1) - D
263
264 /*
265 * Test for overflow
266 */
267 if (src_exponent > DBL_FX_MAX_EXP + 1)
268 if (Dbl_isone_sign(srcp1)) {
269 resultp1 = resultp2 =
270 } else {
271 resultp1 = resultp2 =
272 }
273 if (Is_invalidtrap_enabled())
274 return(INVALIDEXCEPTIO
275 }
276 Set_invalidflag();
277 Duint_copytoptr(resultp1,resul
278 return(NOEXCEPTION);
279 }
280 /*
281 * Generate result
282 */
283 if (src_exponent >= 0) {
284 /*
285 * Check sign.
286 * If negative, trap unimpleme
287 */
288 if (Dbl_isone_sign(srcp1)) {
289 resultp1 = resultp2 =
290 if (Is_invalidtrap_ena
291 return(INVALID
292 }
293 Set_invalidflag();
294 Duint_copytoptr(result
295 return(NOEXCEPTION);
296 }
297 Dbl_clear_signexponent_set_hid
298 Duint_from_dbl_mantissa(srcp1,
299 resultp1,resultp2);
300 Duint_copytoptr(resultp1,resul
301
302 /* check for inexact */
303 if (Dbl_isinexact_to_unsigned(
304 if (Is_inexacttrap_ena
305 else Set_inexactflag()
306 }
307 }
308 else {
309 Duint_setzero(resultp1,resultp
310 Duint_copytoptr(resultp1,resul
311
312 /* check for inexact */
313 if (Dbl_isnotzero_exponentmant
314 if (Is_inexacttrap_ena
315 else Set_inexactflag()
316 }
317 }
318 return(NOEXCEPTION);
319 }
320
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