1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 source "arch/powerpc/platforms/Kconfig.cputype !! 2 config MIPS
3 <<
4 config CC_HAS_ELFV2 <<
5 def_bool PPC64 && $(cc-option, -mabi=e <<
6 <<
7 config CC_HAS_PREFIXED <<
8 def_bool PPC64 && $(cc-option, -mcpu=p <<
9 <<
10 config CC_HAS_PCREL <<
11 # Clang has a bug (https://github.com/ <<
12 # where pcrel code is not generated if <<
13 # -mno-vsx options are also given. Wit <<
14 # instructions are generated from regu <<
15 # do pcrel yet. <<
16 def_bool PPC64 && CC_IS_GCC && $(cc-op <<
17 <<
18 config 32BIT <<
19 bool <<
20 default y if PPC32 <<
21 <<
22 config 64BIT <<
23 bool <<
24 default y if PPC64 <<
25 <<
26 config LIVEPATCH_64 <<
27 def_bool PPC64 <<
28 depends on LIVEPATCH <<
29 <<
30 config MMU <<
31 bool <<
32 default y <<
33 <<
34 config ARCH_MMAP_RND_BITS_MAX <<
35 # On Book3S 64, the default virtual ad <<
36 # is 2^47 (128TB). As a maximum, allow <<
37 # 32T of address space (2^45), which s <<
38 # between bottom-up and top-down alloc <<
39 # consume "normal" amounts of address <<
40 # and 4K page sizes. <<
41 default 29 if PPC_BOOK3S_64 && PPC_64K <<
42 default 33 if PPC_BOOK3S_64 <<
43 # <<
44 # On all other 64-bit platforms (curre <<
45 # address space is 2^46 (64TB). Allow <<
46 # of address space (2^44). Only 4K pag <<
47 default 32 if 64BIT # 32 = 44 (16T <<
48 # <<
49 # For 32-bit, use the compat values, a <<
50 default ARCH_MMAP_RND_COMPAT_BITS_MAX <<
51 <<
52 config ARCH_MMAP_RND_BITS_MIN <<
53 # Allow randomisation to consume up to <<
54 default 14 if 64BIT && PPC_64K_PAGES <<
55 default 18 if 64BIT <<
56 # <<
57 # For 32-bit, use the compat values, a <<
58 default ARCH_MMAP_RND_COMPAT_BITS_MIN <<
59 <<
60 config ARCH_MMAP_RND_COMPAT_BITS_MAX <<
61 # Total virtual address space for 32-b <<
62 # Allow randomisation to consume up to <<
63 default 11 if PPC_256K_PAGES # 11 = <<
64 default 13 if PPC_64K_PAGES # 13 = <<
65 default 15 if PPC_16K_PAGES # 15 = <<
66 default 17 # 17 = <<
67 <<
68 config ARCH_MMAP_RND_COMPAT_BITS_MIN <<
69 # Total virtual address space for 32-b <<
70 # Allow randomisation to consume up to <<
71 default 5 if PPC_256K_PAGES # 5 = <<
72 default 7 if PPC_64K_PAGES # 7 = <<
73 default 9 if PPC_16K_PAGES # 9 = <<
74 default 11 # 11 = <<
75 <<
76 config NR_IRQS <<
77 int "Number of virtual interrupt numbe <<
78 range 32 1048576 <<
79 default "512" <<
80 help <<
81 This defines the number of virtual i <<
82 can manage. Virtual interrupt number <<
83 /proc/interrupts. If you configure y <<
84 drivers will fail to load or worse - <<
85 <<
86 config NMI_IPI <<
87 bool <<
88 depends on SMP && (DEBUGGER || KEXEC_C <<
89 default y <<
90 <<
91 config PPC_WATCHDOG <<
92 bool <<
93 depends on HARDLOCKUP_DETECTOR_ARCH <<
94 default y <<
95 help <<
96 This is a placeholder when the power <<
97 watchdog is selected (arch/powerpc/k <<
98 selected via the generic lockup dete <<
99 have no standalone config option for <<
100 <<
101 config STACKTRACE_SUPPORT <<
102 bool <<
103 default y <<
104 <<
105 config LOCKDEP_SUPPORT <<
106 bool <<
107 default y <<
108 <<
109 config GENERIC_LOCKBREAK <<
110 bool 3 bool
111 default y 4 default y
112 depends on SMP && PREEMPTION && !PPC_Q !! 5 select ARCH_32BIT_OFF_T if !64BIT
113 !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
114 config GENERIC_HWEIGHT !! 7 select ARCH_HAS_CPU_CACHE_ALIASING
115 bool !! 8 select ARCH_HAS_CPU_FINALIZE_INIT
116 default y !! 9 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
117 !! 10 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
118 config PPC <<
119 bool <<
120 default y <<
121 # <<
122 # Please keep this list sorted alphabe <<
123 # <<
124 select ARCH_32BIT_OFF_T if PPC32 <<
125 select ARCH_DISABLE_KASAN_INLINE <<
126 select ARCH_DMA_DEFAULT_COHERENT <<
127 select ARCH_ENABLE_MEMORY_HOTPLUG <<
128 select ARCH_ENABLE_MEMORY_HOTREMOVE <<
129 select ARCH_HAS_COPY_MC <<
130 select ARCH_HAS_CURRENT_STACK_POINTER <<
131 select ARCH_HAS_DEBUG_VIRTUAL <<
132 select ARCH_HAS_DEBUG_VM_PGTABLE <<
133 select ARCH_HAS_DEBUG_WX <<
134 select ARCH_HAS_DEVMEM_IS_ALLOWED <<
135 select ARCH_HAS_DMA_MAP_DIRECT <<
136 select ARCH_HAS_DMA_OPS <<
137 select ARCH_HAS_FORTIFY_SOURCE 11 select ARCH_HAS_FORTIFY_SOURCE
138 select ARCH_HAS_GCOV_PROFILE_ALL <<
139 select ARCH_HAS_KCOV 12 select ARCH_HAS_KCOV
140 select ARCH_HAS_KERNEL_FPU_SUPPORT !! 13 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
141 select ARCH_HAS_MEMBARRIER_CALLBACKS !! 14 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
142 select ARCH_HAS_MEMBARRIER_SYNC_CORE !! 15 select ARCH_HAS_STRNCPY_FROM_USER
143 select ARCH_HAS_MEMREMAP_COMPAT_ALIGN !! 16 select ARCH_HAS_STRNLEN_USER
144 select ARCH_HAS_MMIOWB !! 17 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
145 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
146 select ARCH_HAS_PHYS_TO_DMA <<
147 select ARCH_HAS_PMEM_API <<
148 select ARCH_HAS_PTE_DEVMAP <<
149 select ARCH_HAS_PTE_SPECIAL <<
150 select ARCH_HAS_SCALED_CPUTIME <<
151 select ARCH_HAS_SET_MEMORY <<
152 select ARCH_HAS_STRICT_KERNEL_RWX <<
153 select ARCH_HAS_STRICT_KERNEL_RWX <<
154 select ARCH_HAS_STRICT_MODULE_RWX <<
155 select ARCH_HAS_SYSCALL_WRAPPER <<
156 select ARCH_HAS_TICK_BROADCAST <<
157 select ARCH_HAS_UACCESS_FLUSHCACHE <<
158 select ARCH_HAS_UBSAN 18 select ARCH_HAS_UBSAN
159 select ARCH_HAVE_NMI_SAFE_CMPXCHG !! 19 select ARCH_HAS_GCOV_PROFILE_ALL
160 select ARCH_HAVE_EXTRA_ELF_NOTES <<
161 select ARCH_KEEP_MEMBLOCK 20 select ARCH_KEEP_MEMBLOCK
162 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL <<
163 select ARCH_MIGHT_HAVE_PC_PARPORT <<
164 select ARCH_MIGHT_HAVE_PC_SERIO <<
165 select ARCH_OPTIONAL_KERNEL_RWX <<
166 select ARCH_OPTIONAL_KERNEL_RWX_DEFAUL <<
167 select ARCH_SPLIT_ARG64 <<
168 select ARCH_STACKWALK <<
169 select ARCH_SUPPORTS_ATOMIC_RMW <<
170 select ARCH_SUPPORTS_DEBUG_PAGEALLOC <<
171 select ARCH_USE_BUILTIN_BSWAP 21 select ARCH_USE_BUILTIN_BSWAP
172 select ARCH_USE_CMPXCHG_LOCKREF !! 22 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
173 select ARCH_USE_MEMTEST 23 select ARCH_USE_MEMTEST
174 select ARCH_USE_QUEUED_RWLOCKS !! 24 select ARCH_USE_QUEUED_RWLOCKS
175 select ARCH_WANT_DEFAULT_BPF_JIT !! 25 select ARCH_USE_QUEUED_SPINLOCKS
176 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ !! 26 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
>> 27 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
177 select ARCH_WANT_IPC_PARSE_VERSION 28 select ARCH_WANT_IPC_PARSE_VERSION
178 select ARCH_WANT_IRQS_OFF_ACTIVATE_MM <<
179 select ARCH_WANT_LD_ORPHAN_WARN 29 select ARCH_WANT_LD_ORPHAN_WARN
180 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
181 select ARCH_WANTS_MODULES_DATA_IN_VMAL <<
182 select ARCH_WEAK_RELEASE_ACQUIRE <<
183 select BINFMT_ELF <<
184 select BUILDTIME_TABLE_SORT 30 select BUILDTIME_TABLE_SORT
185 select CLONE_BACKWARDS 31 select CLONE_BACKWARDS
186 select CPUMASK_OFFSTACK !! 32 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
187 select DCACHE_WORD_ACCESS !! 33 select CPU_PM if CPU_IDLE || SUSPEND
188 select DMA_OPS_BYPASS !! 34 select GENERIC_ATOMIC64 if !64BIT
189 select DYNAMIC_FTRACE <<
190 select EDAC_ATOMIC_SCRUB <<
191 select EDAC_SUPPORT <<
192 select FTRACE_MCOUNT_USE_PATCHABLE_FUN <<
193 select FUNCTION_ALIGNMENT_4B <<
194 select GENERIC_ATOMIC64 <<
195 select GENERIC_CLOCKEVENTS_BROADCAST <<
196 select GENERIC_CMOS_UPDATE 35 select GENERIC_CMOS_UPDATE
197 select GENERIC_CPU_AUTOPROBE 36 select GENERIC_CPU_AUTOPROBE
198 select GENERIC_CPU_VULNERABILITIES <<
199 select GENERIC_EARLY_IOREMAP <<
200 select GENERIC_GETTIMEOFDAY 37 select GENERIC_GETTIMEOFDAY
201 select GENERIC_IDLE_POLL_SETUP !! 38 select GENERIC_IOMAP
202 select GENERIC_IOREMAP !! 39 select GENERIC_IRQ_PROBE
203 select GENERIC_IRQ_SHOW 40 select GENERIC_IRQ_SHOW
204 select GENERIC_IRQ_SHOW_LEVEL !! 41 select GENERIC_ISA_DMA if EISA
205 select GENERIC_PCI_IOMAP !! 42 select GENERIC_LIB_ASHLDI3
206 select GENERIC_PTDUMP !! 43 select GENERIC_LIB_ASHRDI3
>> 44 select GENERIC_LIB_CMPDI2
>> 45 select GENERIC_LIB_LSHRDI3
>> 46 select GENERIC_LIB_UCMPDI2
>> 47 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
207 select GENERIC_SMP_IDLE_THREAD 48 select GENERIC_SMP_IDLE_THREAD
>> 49 select GENERIC_IDLE_POLL_SETUP
208 select GENERIC_TIME_VSYSCALL 50 select GENERIC_TIME_VSYSCALL
209 select GENERIC_VDSO_TIME_NS !! 51 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
210 select HAS_IOPORT !! 52 select HAS_IOPORT if !NO_IOPORT_MAP || ISA
211 select HAVE_ARCH_AUDITSYSCALL !! 53 select HAVE_ARCH_COMPILER_H
212 select HAVE_ARCH_HUGE_VMALLOC <<
213 select HAVE_ARCH_HUGE_VMAP <<
214 select HAVE_ARCH_JUMP_LABEL 54 select HAVE_ARCH_JUMP_LABEL
215 select HAVE_ARCH_JUMP_LABEL_RELATIVE !! 55 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
216 select HAVE_ARCH_KASAN !! 56 select HAVE_ARCH_MMAP_RND_BITS if MMU
217 select HAVE_ARCH_KASAN !! 57 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
218 select HAVE_ARCH_KASAN <<
219 select HAVE_ARCH_KASAN_VMALLOC <<
220 select HAVE_ARCH_KCSAN <<
221 select HAVE_ARCH_KFENCE <<
222 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
223 select HAVE_ARCH_WITHIN_STACK_FRAMES <<
224 select HAVE_ARCH_KGDB <<
225 select HAVE_ARCH_MMAP_RND_BITS <<
226 select HAVE_ARCH_MMAP_RND_COMPAT_BITS <<
227 select HAVE_ARCH_NVRAM_OPS <<
228 select HAVE_ARCH_SECCOMP_FILTER 58 select HAVE_ARCH_SECCOMP_FILTER
229 select HAVE_ARCH_TRACEHOOK 59 select HAVE_ARCH_TRACEHOOK
>> 60 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
230 select HAVE_ASM_MODVERSIONS 61 select HAVE_ASM_MODVERSIONS
231 select HAVE_CONTEXT_TRACKING_USER 62 select HAVE_CONTEXT_TRACKING_USER
>> 63 select HAVE_TIF_NOHZ
232 select HAVE_C_RECORDMCOUNT 64 select HAVE_C_RECORDMCOUNT
233 select HAVE_DEBUG_KMEMLEAK 65 select HAVE_DEBUG_KMEMLEAK
234 select HAVE_DEBUG_STACKOVERFLOW 66 select HAVE_DEBUG_STACKOVERFLOW
>> 67 select HAVE_DMA_CONTIGUOUS
235 select HAVE_DYNAMIC_FTRACE 68 select HAVE_DYNAMIC_FTRACE
236 select HAVE_DYNAMIC_FTRACE_WITH_ARGS !! 69 select HAVE_EBPF_JIT if !CPU_MICROMIPS
237 select HAVE_DYNAMIC_FTRACE_WITH_REGS !! 70 select HAVE_EXIT_THREAD
238 select HAVE_EBPF_JIT <<
239 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
240 select HAVE_GUP_FAST 71 select HAVE_GUP_FAST
241 select HAVE_FTRACE_MCOUNT_RECORD 72 select HAVE_FTRACE_MCOUNT_RECORD
242 select HAVE_FUNCTION_ARG_ACCESS_API <<
243 select HAVE_FUNCTION_DESCRIPTORS <<
244 select HAVE_FUNCTION_ERROR_INJECTION <<
245 select HAVE_FUNCTION_GRAPH_TRACER 73 select HAVE_FUNCTION_GRAPH_TRACER
246 select HAVE_FUNCTION_TRACER !! 74 select HAVE_FUNCTION_TRACER
247 select HAVE_GCC_PLUGINS !! 75 select HAVE_GCC_PLUGINS
248 select HAVE_GENERIC_VDSO 76 select HAVE_GENERIC_VDSO
249 select HAVE_HARDLOCKUP_DETECTOR_ARCH <<
250 select HAVE_HARDLOCKUP_DETECTOR_PERF <<
251 select HAVE_HW_BREAKPOINT <<
252 select HAVE_IOREMAP_PROT 77 select HAVE_IOREMAP_PROT
>> 78 select HAVE_IRQ_EXIT_ON_IRQ_STACK
253 select HAVE_IRQ_TIME_ACCOUNTING 79 select HAVE_IRQ_TIME_ACCOUNTING
254 select HAVE_KERNEL_GZIP <<
255 select HAVE_KERNEL_LZMA <<
256 select HAVE_KERNEL_LZO <<
257 select HAVE_KERNEL_XZ <<
258 select HAVE_KPROBES 80 select HAVE_KPROBES
259 select HAVE_KPROBES_ON_FTRACE <<
260 select HAVE_KRETPROBES 81 select HAVE_KRETPROBES
261 select HAVE_LD_DEAD_CODE_DATA_ELIMINAT !! 82 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
262 select HAVE_LIVEPATCH <<
263 select HAVE_MOD_ARCH_SPECIFIC 83 select HAVE_MOD_ARCH_SPECIFIC
264 select HAVE_NMI !! 84 select HAVE_NMI
265 select HAVE_OPTPROBES !! 85 select HAVE_PAGE_SIZE_4KB if !CPU_LOONGSON2EF && !CPU_LOONGSON64
266 select HAVE_OBJTOOL !! 86 select HAVE_PAGE_SIZE_16KB if !CPU_R3000
267 select HAVE_OBJTOOL_MCOUNT !! 87 select HAVE_PAGE_SIZE_64KB if !CPU_R3000
268 select HAVE_PERF_EVENTS 88 select HAVE_PERF_EVENTS
269 select HAVE_PERF_EVENTS_NMI <<
270 select HAVE_PERF_REGS 89 select HAVE_PERF_REGS
271 select HAVE_PERF_USER_STACK_DUMP 90 select HAVE_PERF_USER_STACK_DUMP
272 select HAVE_RETHOOK <<
273 select HAVE_REGS_AND_STACK_ACCESS_API 91 select HAVE_REGS_AND_STACK_ACCESS_API
274 select HAVE_RELIABLE_STACKTRACE <<
275 select HAVE_RSEQ 92 select HAVE_RSEQ
276 select HAVE_SETUP_PER_CPU_AREA !! 93 select HAVE_SPARSE_SYSCALL_NR
277 select HAVE_SOFTIRQ_ON_OWN_STACK !! 94 select HAVE_STACKPROTECTOR
278 select HAVE_STACKPROTECTOR <<
279 select HAVE_STACKPROTECTOR <<
280 select HAVE_STATIC_CALL <<
281 select HAVE_SYSCALL_TRACEPOINTS 95 select HAVE_SYSCALL_TRACEPOINTS
282 select HAVE_VIRT_CPU_ACCOUNTING !! 96 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
283 select HAVE_VIRT_CPU_ACCOUNTING_GEN <<
284 select HOTPLUG_SMT <<
285 select SMT_NUM_THREADS_DYNAMIC <<
286 select HUGETLB_PAGE_SIZE_VARIABLE <<
287 select IOMMU_HELPER <<
288 select IRQ_DOMAIN <<
289 select IRQ_FORCED_THREADING 97 select IRQ_FORCED_THREADING
290 select KASAN_VMALLOC !! 98 select ISA if EISA
291 select LOCK_MM_AND_FIND_VMA 99 select LOCK_MM_AND_FIND_VMA
292 select MMU_GATHER_PAGE_SIZE !! 100 select MODULES_USE_ELF_REL if MODULES
293 select MMU_GATHER_RCU_TABLE_FREE !! 101 select MODULES_USE_ELF_RELA if MODULES && 64BIT
294 select MMU_GATHER_MERGE_VMAS !! 102 select PERF_USE_VMALLOC
295 select MMU_LAZY_TLB_SHOOTDOWN !! 103 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
296 select MODULES_USE_ELF_RELA <<
297 select NEED_DMA_MAP_STATE <<
298 select NEED_PER_CPU_EMBED_FIRST_CHUNK <<
299 select NEED_PER_CPU_PAGE_FIRST_CHUNK <<
300 select NEED_SG_DMA_LENGTH <<
301 select OF <<
302 select OF_EARLY_FLATTREE <<
303 select OLD_SIGACTION <<
304 select OLD_SIGSUSPEND <<
305 select PCI_DOMAINS <<
306 select PCI_MSI_ARCH_FALLBACKS <<
307 select PCI_SYSCALL <<
308 select PPC_DAWR <<
309 select RTC_LIB 104 select RTC_LIB
310 select SPARSE_IRQ <<
311 select STRICT_KERNEL_RWX if STRICT_MOD <<
312 select SYSCTL_EXCEPTION_TRACE 105 select SYSCTL_EXCEPTION_TRACE
313 select THREAD_INFO_IN_TASK <<
314 select TRACE_IRQFLAGS_SUPPORT 106 select TRACE_IRQFLAGS_SUPPORT
315 select VDSO_GETRANDOM !! 107 select ARCH_HAS_ELFCORE_COMPAT
316 # !! 108 select HAVE_ARCH_KCSAN if 64BIT
317 # Please keep this list sorted alphabe <<
318 # <<
319 109
320 config PPC_BARRIER_NOSPEC !! 110 config MIPS_FIXUP_BIGPHYS_ADDR
321 bool 111 bool
322 default y <<
323 depends on PPC_BOOK3S_64 || PPC_E500 <<
324 112
325 config PPC_HAS_LBARX_LHARX !! 113 config MIPS_GENERIC
326 bool 114 bool
327 115
328 config EARLY_PRINTK !! 116 config MACH_GENERIC_CORE
329 bool 117 bool
330 default y <<
331 118
332 config PANIC_TIMEOUT !! 119 config MACH_INGENIC
333 int !! 120 bool
334 default 180 !! 121 select SYS_SUPPORTS_32BIT_KERNEL
>> 122 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 123 select SYS_SUPPORTS_ZBOOT
>> 124 select DMA_NONCOHERENT
>> 125 select IRQ_MIPS_CPU
>> 126 select PINCTRL
>> 127 select GPIOLIB
>> 128 select COMMON_CLK
>> 129 select GENERIC_IRQ_CHIP
>> 130 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 131 select USE_OF
>> 132 select CPU_SUPPORTS_CPUFREQ
>> 133 select MIPS_EXTERNAL_TIMER
335 134
336 config COMPAT !! 135 menu "Machine selection"
337 bool "Enable support for 32bit binarie !! 136
338 depends on PPC64 !! 137 choice
339 default y if !CPU_LITTLE_ENDIAN !! 138 prompt "System type"
340 select ARCH_WANT_OLD_COMPAT_IPC !! 139 default MIPS_GENERIC_KERNEL
341 select COMPAT_OLD_SIGACTION !! 140
>> 141 config MIPS_GENERIC_KERNEL
>> 142 bool "Generic board-agnostic MIPS kernel"
>> 143 select MIPS_GENERIC
>> 144 select BOOT_RAW
>> 145 select BUILTIN_DTB
>> 146 select CEVT_R4K
>> 147 select CLKSRC_MIPS_GIC
>> 148 select COMMON_CLK
>> 149 select CPU_MIPSR2_IRQ_EI
>> 150 select CPU_MIPSR2_IRQ_VI
>> 151 select CSRC_R4K
>> 152 select DMA_NONCOHERENT
>> 153 select HAVE_PCI
>> 154 select IRQ_MIPS_CPU
>> 155 select MACH_GENERIC_CORE
>> 156 select MIPS_AUTO_PFN_OFFSET
>> 157 select MIPS_CPU_SCACHE
>> 158 select MIPS_GIC
>> 159 select MIPS_L1_CACHE_SHIFT_7
>> 160 select NO_EXCEPT_FILL
>> 161 select PCI_DRIVERS_GENERIC
>> 162 select SMP_UP if SMP
>> 163 select SWAP_IO_SPACE
>> 164 select SYS_HAS_CPU_MIPS32_R1
>> 165 select SYS_HAS_CPU_MIPS32_R2
>> 166 select SYS_HAS_CPU_MIPS32_R5
>> 167 select SYS_HAS_CPU_MIPS32_R6
>> 168 select SYS_HAS_CPU_MIPS64_R1
>> 169 select SYS_HAS_CPU_MIPS64_R2
>> 170 select SYS_HAS_CPU_MIPS64_R5
>> 171 select SYS_HAS_CPU_MIPS64_R6
>> 172 select SYS_SUPPORTS_32BIT_KERNEL
>> 173 select SYS_SUPPORTS_64BIT_KERNEL
>> 174 select SYS_SUPPORTS_BIG_ENDIAN
>> 175 select SYS_SUPPORTS_HIGHMEM
>> 176 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 177 select SYS_SUPPORTS_MICROMIPS
>> 178 select SYS_SUPPORTS_MIPS16
>> 179 select SYS_SUPPORTS_MIPS_CPS
>> 180 select SYS_SUPPORTS_MULTITHREADING
>> 181 select SYS_SUPPORTS_RELOCATABLE
>> 182 select SYS_SUPPORTS_SMARTMIPS
>> 183 select SYS_SUPPORTS_ZBOOT
>> 184 select UHI_BOOT
>> 185 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 186 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 187 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 188 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 189 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 190 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 191 select USE_OF
>> 192 help
>> 193 Select this to build a kernel which aims to support multiple boards,
>> 194 generally using a flattened device tree passed from the bootloader
>> 195 using the boot protocol defined in the UHI (Unified Hosting
>> 196 Interface) specification.
>> 197
>> 198 config MIPS_ALCHEMY
>> 199 bool "Alchemy processor based machines"
>> 200 select PHYS_ADDR_T_64BIT
>> 201 select CEVT_R4K
>> 202 select CSRC_R4K
>> 203 select IRQ_MIPS_CPU
>> 204 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
>> 205 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
>> 206 select SYS_HAS_CPU_MIPS32_R1
>> 207 select SYS_SUPPORTS_32BIT_KERNEL
>> 208 select SYS_SUPPORTS_APM_EMULATION
>> 209 select GPIOLIB
>> 210 select SYS_SUPPORTS_ZBOOT
>> 211 select COMMON_CLK
>> 212
>> 213 config ATH25
>> 214 bool "Atheros AR231x/AR531x SoC support"
>> 215 select CEVT_R4K
>> 216 select CSRC_R4K
>> 217 select DMA_NONCOHERENT
>> 218 select IRQ_MIPS_CPU
>> 219 select IRQ_DOMAIN
>> 220 select SYS_HAS_CPU_MIPS32_R1
>> 221 select SYS_SUPPORTS_BIG_ENDIAN
>> 222 select SYS_SUPPORTS_32BIT_KERNEL
>> 223 select SYS_HAS_EARLY_PRINTK
>> 224 help
>> 225 Support for Atheros AR231x and Atheros AR531x based boards
>> 226
>> 227 config ATH79
>> 228 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 229 select ARCH_HAS_RESET_CONTROLLER
>> 230 select BOOT_RAW
>> 231 select CEVT_R4K
>> 232 select CSRC_R4K
>> 233 select DMA_NONCOHERENT
>> 234 select GPIOLIB
>> 235 select PINCTRL
>> 236 select COMMON_CLK
>> 237 select IRQ_MIPS_CPU
>> 238 select SYS_HAS_CPU_MIPS32_R2
>> 239 select SYS_HAS_EARLY_PRINTK
>> 240 select SYS_SUPPORTS_32BIT_KERNEL
>> 241 select SYS_SUPPORTS_BIG_ENDIAN
>> 242 select SYS_SUPPORTS_MIPS16
>> 243 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 244 select USE_OF
>> 245 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 246 help
>> 247 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 248
>> 249 config BMIPS_GENERIC
>> 250 bool "Broadcom Generic BMIPS kernel"
>> 251 select ARCH_HAS_RESET_CONTROLLER
>> 252 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 253 select BOOT_RAW
>> 254 select NO_EXCEPT_FILL
>> 255 select USE_OF
>> 256 select CEVT_R4K
>> 257 select CSRC_R4K
>> 258 select SYNC_R4K
>> 259 select COMMON_CLK
>> 260 select BCM6345_L1_IRQ
>> 261 select BCM7038_L1_IRQ
>> 262 select BCM7120_L2_IRQ
>> 263 select BRCMSTB_L2_IRQ
>> 264 select IRQ_MIPS_CPU
>> 265 select DMA_NONCOHERENT
>> 266 select SYS_SUPPORTS_32BIT_KERNEL
>> 267 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 268 select SYS_SUPPORTS_BIG_ENDIAN
>> 269 select SYS_SUPPORTS_HIGHMEM
>> 270 select SYS_HAS_CPU_BMIPS32_3300
>> 271 select SYS_HAS_CPU_BMIPS4350
>> 272 select SYS_HAS_CPU_BMIPS4380
>> 273 select SYS_HAS_CPU_BMIPS5000
>> 274 select SWAP_IO_SPACE
>> 275 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 276 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 277 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 278 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 279 select HARDIRQS_SW_RESEND
>> 280 select HAVE_PCI
>> 281 select PCI_DRIVERS_GENERIC
>> 282 select FW_CFE
>> 283 help
>> 284 Build a generic DT-based kernel image that boots on select
>> 285 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 286 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 287 must be set appropriately for your board.
>> 288
>> 289 config BCM47XX
>> 290 bool "Broadcom BCM47XX based boards"
>> 291 select BOOT_RAW
>> 292 select CEVT_R4K
>> 293 select CSRC_R4K
>> 294 select DMA_NONCOHERENT
>> 295 select HAVE_PCI
>> 296 select IRQ_MIPS_CPU
>> 297 select SYS_HAS_CPU_MIPS32_R1
>> 298 select NO_EXCEPT_FILL
>> 299 select SYS_SUPPORTS_32BIT_KERNEL
>> 300 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 301 select SYS_SUPPORTS_MIPS16
>> 302 select SYS_SUPPORTS_ZBOOT
>> 303 select SYS_HAS_EARLY_PRINTK
>> 304 select USE_GENERIC_EARLY_PRINTK_8250
>> 305 select GPIOLIB
>> 306 select LEDS_GPIO_REGISTER
>> 307 select BCM47XX_NVRAM
>> 308 select BCM47XX_SPROM
>> 309 select BCM47XX_SSB if !BCM47XX_BCMA
>> 310 help
>> 311 Support for BCM47XX based boards
>> 312
>> 313 config BCM63XX
>> 314 bool "Broadcom BCM63XX based boards"
>> 315 select BOOT_RAW
>> 316 select CEVT_R4K
>> 317 select CSRC_R4K
>> 318 select SYNC_R4K
>> 319 select DMA_NONCOHERENT
>> 320 select IRQ_MIPS_CPU
>> 321 select SYS_SUPPORTS_32BIT_KERNEL
>> 322 select SYS_SUPPORTS_BIG_ENDIAN
>> 323 select SYS_HAS_EARLY_PRINTK
>> 324 select SYS_HAS_CPU_BMIPS32_3300
>> 325 select SYS_HAS_CPU_BMIPS4350
>> 326 select SYS_HAS_CPU_BMIPS4380
>> 327 select SWAP_IO_SPACE
>> 328 select GPIOLIB
>> 329 select MIPS_L1_CACHE_SHIFT_4
>> 330 select HAVE_LEGACY_CLK
>> 331 help
>> 332 Support for BCM63XX based boards
>> 333
>> 334 config MIPS_COBALT
>> 335 bool "Cobalt Server"
>> 336 select CEVT_R4K
>> 337 select CSRC_R4K
>> 338 select CEVT_GT641XX
>> 339 select DMA_NONCOHERENT
>> 340 select FORCE_PCI
>> 341 select I8253
>> 342 select I8259
>> 343 select IRQ_MIPS_CPU
>> 344 select IRQ_GT641XX
>> 345 select PCI_GT64XXX_PCI0
>> 346 select SYS_HAS_CPU_NEVADA
>> 347 select SYS_HAS_EARLY_PRINTK
>> 348 select SYS_SUPPORTS_32BIT_KERNEL
>> 349 select SYS_SUPPORTS_64BIT_KERNEL
>> 350 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 351 select USE_GENERIC_EARLY_PRINTK_8250
>> 352
>> 353 config MACH_DECSTATION
>> 354 bool "DECstations"
>> 355 select BOOT_ELF32
>> 356 select CEVT_DS1287
>> 357 select CEVT_R4K if CPU_R4X00
>> 358 select CSRC_IOASIC
>> 359 select CSRC_R4K if CPU_R4X00
>> 360 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 361 select CPU_R4000_WORKAROUNDS if 64BIT
>> 362 select CPU_R4400_WORKAROUNDS if 64BIT
>> 363 select DMA_NONCOHERENT
>> 364 select NO_IOPORT_MAP
>> 365 select IRQ_MIPS_CPU
>> 366 select SYS_HAS_CPU_R3000
>> 367 select SYS_HAS_CPU_R4X00
>> 368 select SYS_SUPPORTS_32BIT_KERNEL
>> 369 select SYS_SUPPORTS_64BIT_KERNEL
>> 370 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 371 select SYS_SUPPORTS_128HZ
>> 372 select SYS_SUPPORTS_256HZ
>> 373 select SYS_SUPPORTS_1024HZ
>> 374 select MIPS_L1_CACHE_SHIFT_4
>> 375 help
>> 376 This enables support for DEC's MIPS based workstations. For details
>> 377 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 378 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 379
>> 380 If you have one of the following DECstation Models you definitely
>> 381 want to choose R4xx0 for the CPU Type:
>> 382
>> 383 DECstation 5000/50
>> 384 DECstation 5000/150
>> 385 DECstation 5000/260
>> 386 DECsystem 5900/260
>> 387
>> 388 otherwise choose R3000.
>> 389
>> 390 config MACH_JAZZ
>> 391 bool "Jazz family of machines"
>> 392 select ARC_MEMORY
>> 393 select ARC_PROMLIB
>> 394 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 395 select ARCH_MIGHT_HAVE_PC_SERIO
>> 396 select DMA_OPS
>> 397 select FW_ARC
>> 398 select FW_ARC32
>> 399 select ARCH_MAY_HAVE_PC_FDC
>> 400 select CEVT_R4K
>> 401 select CSRC_R4K
>> 402 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 403 select GENERIC_ISA_DMA
>> 404 select HAVE_PCSPKR_PLATFORM
>> 405 select IRQ_MIPS_CPU
>> 406 select I8253
>> 407 select I8259
>> 408 select ISA
>> 409 select SYS_HAS_CPU_R4X00
>> 410 select SYS_SUPPORTS_32BIT_KERNEL
>> 411 select SYS_SUPPORTS_64BIT_KERNEL
>> 412 select SYS_SUPPORTS_100HZ
>> 413 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 414 help
>> 415 This a family of machines based on the MIPS R4030 chipset which was
>> 416 used by several vendors to build RISC/os and Windows NT workstations.
>> 417 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 418 Olivetti M700-10 workstations.
>> 419
>> 420 config MACH_INGENIC_SOC
>> 421 bool "Ingenic SoC based machines"
>> 422 select MIPS_GENERIC
>> 423 select MACH_INGENIC
>> 424 select MACH_GENERIC_CORE
>> 425 select SYS_SUPPORTS_ZBOOT_UART16550
>> 426 select CPU_SUPPORTS_CPUFREQ
>> 427 select MIPS_EXTERNAL_TIMER
>> 428
>> 429 config LANTIQ
>> 430 bool "Lantiq based platforms"
>> 431 select DMA_NONCOHERENT
>> 432 select IRQ_MIPS_CPU
>> 433 select CEVT_R4K
>> 434 select CSRC_R4K
>> 435 select NO_EXCEPT_FILL
>> 436 select SYS_HAS_CPU_MIPS32_R1
>> 437 select SYS_HAS_CPU_MIPS32_R2
>> 438 select SYS_SUPPORTS_BIG_ENDIAN
>> 439 select SYS_SUPPORTS_32BIT_KERNEL
>> 440 select SYS_SUPPORTS_MIPS16
>> 441 select SYS_SUPPORTS_MULTITHREADING
>> 442 select SYS_SUPPORTS_VPE_LOADER
>> 443 select SYS_HAS_EARLY_PRINTK
>> 444 select GPIOLIB
>> 445 select SWAP_IO_SPACE
>> 446 select BOOT_RAW
>> 447 select HAVE_LEGACY_CLK
>> 448 select USE_OF
>> 449 select PINCTRL
>> 450 select PINCTRL_LANTIQ
>> 451 select ARCH_HAS_RESET_CONTROLLER
>> 452 select RESET_CONTROLLER
>> 453
>> 454 config MACH_LOONGSON32
>> 455 bool "Loongson 32-bit family of machines"
>> 456 select SYS_SUPPORTS_ZBOOT
>> 457 help
>> 458 This enables support for the Loongson-1 family of machines.
>> 459
>> 460 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 461 the Institute of Computing Technology (ICT), Chinese Academy of
>> 462 Sciences (CAS).
>> 463
>> 464 config MACH_LOONGSON2EF
>> 465 bool "Loongson-2E/F family of machines"
>> 466 select SYS_SUPPORTS_ZBOOT
>> 467 help
>> 468 This enables the support of early Loongson-2E/F family of machines.
>> 469
>> 470 config MACH_LOONGSON64
>> 471 bool "Loongson 64-bit family of machines"
>> 472 select ARCH_DMA_DEFAULT_COHERENT
>> 473 select ARCH_SPARSEMEM_ENABLE
>> 474 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 475 select ARCH_MIGHT_HAVE_PC_SERIO
>> 476 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 477 select BOOT_ELF32
>> 478 select BOARD_SCACHE
>> 479 select CSRC_R4K
>> 480 select CEVT_R4K
>> 481 select SYNC_R4K
>> 482 select FORCE_PCI
>> 483 select ISA
>> 484 select I8259
>> 485 select IRQ_MIPS_CPU
>> 486 select NO_EXCEPT_FILL
>> 487 select NR_CPUS_DEFAULT_64
>> 488 select USE_GENERIC_EARLY_PRINTK_8250
>> 489 select PCI_DRIVERS_GENERIC
>> 490 select SYS_HAS_CPU_LOONGSON64
>> 491 select SYS_HAS_EARLY_PRINTK
>> 492 select SYS_SUPPORTS_SMP
>> 493 select SYS_SUPPORTS_HOTPLUG_CPU
>> 494 select SYS_SUPPORTS_NUMA
>> 495 select SYS_SUPPORTS_64BIT_KERNEL
>> 496 select SYS_SUPPORTS_HIGHMEM
>> 497 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 498 select SYS_SUPPORTS_ZBOOT
>> 499 select SYS_SUPPORTS_RELOCATABLE
>> 500 select ZONE_DMA32
>> 501 select COMMON_CLK
>> 502 select USE_OF
>> 503 select BUILTIN_DTB
>> 504 select PCI_HOST_GENERIC
>> 505 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
>> 506 help
>> 507 This enables the support of Loongson-2/3 family of machines.
>> 508
>> 509 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
>> 510 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
>> 511 and Loongson-2F which will be removed), developed by the Institute
>> 512 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
>> 513
>> 514 config MIPS_MALTA
>> 515 bool "MIPS Malta board"
>> 516 select ARCH_MAY_HAVE_PC_FDC
>> 517 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 518 select ARCH_MIGHT_HAVE_PC_SERIO
>> 519 select BOOT_ELF32
>> 520 select BOOT_RAW
>> 521 select BUILTIN_DTB
>> 522 select CEVT_R4K
>> 523 select CLKSRC_MIPS_GIC
>> 524 select COMMON_CLK
>> 525 select CSRC_R4K
>> 526 select DMA_NONCOHERENT
>> 527 select GENERIC_ISA_DMA
>> 528 select HAVE_PCSPKR_PLATFORM
>> 529 select HAVE_PCI
>> 530 select I8253
>> 531 select I8259
>> 532 select IRQ_MIPS_CPU
>> 533 select MIPS_BONITO64
>> 534 select MIPS_CPU_SCACHE
>> 535 select MIPS_GIC
>> 536 select MIPS_L1_CACHE_SHIFT_6
>> 537 select MIPS_MSC
>> 538 select PCI_GT64XXX_PCI0
>> 539 select SMP_UP if SMP
>> 540 select SWAP_IO_SPACE
>> 541 select SYS_HAS_CPU_MIPS32_R1
>> 542 select SYS_HAS_CPU_MIPS32_R2
>> 543 select SYS_HAS_CPU_MIPS32_R3_5
>> 544 select SYS_HAS_CPU_MIPS32_R5
>> 545 select SYS_HAS_CPU_MIPS32_R6
>> 546 select SYS_HAS_CPU_MIPS64_R1
>> 547 select SYS_HAS_CPU_MIPS64_R2
>> 548 select SYS_HAS_CPU_MIPS64_R6
>> 549 select SYS_HAS_CPU_NEVADA
>> 550 select SYS_HAS_CPU_RM7000
>> 551 select SYS_SUPPORTS_32BIT_KERNEL
>> 552 select SYS_SUPPORTS_64BIT_KERNEL
>> 553 select SYS_SUPPORTS_BIG_ENDIAN
>> 554 select SYS_SUPPORTS_HIGHMEM
>> 555 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 556 select SYS_SUPPORTS_MICROMIPS
>> 557 select SYS_SUPPORTS_MIPS16
>> 558 select SYS_SUPPORTS_MIPS_CPS
>> 559 select SYS_SUPPORTS_MULTITHREADING
>> 560 select SYS_SUPPORTS_RELOCATABLE
>> 561 select SYS_SUPPORTS_SMARTMIPS
>> 562 select SYS_SUPPORTS_VPE_LOADER
>> 563 select SYS_SUPPORTS_ZBOOT
>> 564 select USE_OF
>> 565 select WAR_ICACHE_REFILLS
>> 566 select ZONE_DMA32 if 64BIT
>> 567 help
>> 568 This enables support for the MIPS Technologies Malta evaluation
>> 569 board.
>> 570
>> 571 config MACH_PIC32
>> 572 bool "Microchip PIC32 Family"
>> 573 help
>> 574 This enables support for the Microchip PIC32 family of platforms.
>> 575
>> 576 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 577 microcontrollers.
>> 578
>> 579 config EYEQ
>> 580 bool "Mobileye EyeQ SoC"
>> 581 select MACH_GENERIC_CORE
>> 582 select ARM_AMBA
>> 583 select PHYSICAL_START_BOOL
>> 584 select ARCH_SPARSEMEM_DEFAULT if 64BIT
>> 585 select BOOT_RAW
>> 586 select BUILTIN_DTB
>> 587 select CEVT_R4K
>> 588 select CLKSRC_MIPS_GIC
>> 589 select COMMON_CLK
>> 590 select CPU_MIPSR2_IRQ_EI
>> 591 select CPU_MIPSR2_IRQ_VI
>> 592 select CSRC_R4K
>> 593 select DMA_NONCOHERENT
>> 594 select HAVE_PCI
>> 595 select IRQ_MIPS_CPU
>> 596 select MIPS_AUTO_PFN_OFFSET
>> 597 select MIPS_CPU_SCACHE
>> 598 select MIPS_GIC
>> 599 select MIPS_L1_CACHE_SHIFT_7
>> 600 select PCI_DRIVERS_GENERIC
>> 601 select SMP_UP if SMP
>> 602 select SWAP_IO_SPACE
>> 603 select SYS_HAS_CPU_MIPS64_R6
>> 604 select SYS_SUPPORTS_64BIT_KERNEL
>> 605 select SYS_SUPPORTS_HIGHMEM
>> 606 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 607 select SYS_SUPPORTS_MIPS_CPS
>> 608 select SYS_SUPPORTS_RELOCATABLE
>> 609 select SYS_SUPPORTS_ZBOOT
>> 610 select UHI_BOOT
>> 611 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 612 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 613 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 614 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 615 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 616 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 617 select USE_OF
>> 618 help
>> 619 Select this to build a kernel supporting EyeQ SoC from Mobileye.
>> 620
>> 621 bool
>> 622
>> 623 config MACH_NINTENDO64
>> 624 bool "Nintendo 64 console"
>> 625 select CEVT_R4K
>> 626 select CSRC_R4K
>> 627 select SYS_HAS_CPU_R4300
>> 628 select SYS_SUPPORTS_BIG_ENDIAN
>> 629 select SYS_SUPPORTS_ZBOOT
>> 630 select SYS_SUPPORTS_32BIT_KERNEL
>> 631 select SYS_SUPPORTS_64BIT_KERNEL
>> 632 select DMA_NONCOHERENT
>> 633 select IRQ_MIPS_CPU
>> 634
>> 635 config RALINK
>> 636 bool "Ralink based machines"
>> 637 select CEVT_R4K
>> 638 select COMMON_CLK
>> 639 select CSRC_R4K
>> 640 select BOOT_RAW
>> 641 select DMA_NONCOHERENT
>> 642 select IRQ_MIPS_CPU
>> 643 select USE_OF
>> 644 select SYS_HAS_CPU_MIPS32_R2
>> 645 select SYS_SUPPORTS_32BIT_KERNEL
>> 646 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 647 select SYS_SUPPORTS_MIPS16
>> 648 select SYS_SUPPORTS_ZBOOT
>> 649 select SYS_HAS_EARLY_PRINTK
>> 650 select ARCH_HAS_RESET_CONTROLLER
>> 651 select RESET_CONTROLLER
>> 652
>> 653 config MACH_REALTEK_RTL
>> 654 bool "Realtek RTL838x/RTL839x based machines"
>> 655 select MIPS_GENERIC
>> 656 select MACH_GENERIC_CORE
>> 657 select DMA_NONCOHERENT
>> 658 select IRQ_MIPS_CPU
>> 659 select CSRC_R4K
>> 660 select CEVT_R4K
>> 661 select SYS_HAS_CPU_MIPS32_R1
>> 662 select SYS_HAS_CPU_MIPS32_R2
>> 663 select SYS_SUPPORTS_BIG_ENDIAN
>> 664 select SYS_SUPPORTS_32BIT_KERNEL
>> 665 select SYS_SUPPORTS_MIPS16
>> 666 select SYS_SUPPORTS_MULTITHREADING
>> 667 select SYS_SUPPORTS_VPE_LOADER
>> 668 select BOOT_RAW
>> 669 select PINCTRL
>> 670 select USE_OF
>> 671 select REALTEK_OTTO_TIMER
>> 672
>> 673 config SGI_IP22
>> 674 bool "SGI IP22 (Indy/Indigo2)"
>> 675 select ARC_MEMORY
>> 676 select ARC_PROMLIB
>> 677 select FW_ARC
>> 678 select FW_ARC32
>> 679 select ARCH_MIGHT_HAVE_PC_SERIO
>> 680 select BOOT_ELF32
>> 681 select CEVT_R4K
>> 682 select CSRC_R4K
>> 683 select DEFAULT_SGI_PARTITION
>> 684 select DMA_NONCOHERENT
>> 685 select HAVE_EISA
>> 686 select I8253
>> 687 select I8259
>> 688 select IP22_CPU_SCACHE
>> 689 select IRQ_MIPS_CPU
>> 690 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 691 select SGI_HAS_I8042
>> 692 select SGI_HAS_INDYDOG
>> 693 select SGI_HAS_HAL2
>> 694 select SGI_HAS_SEEQ
>> 695 select SGI_HAS_WD93
>> 696 select SGI_HAS_ZILOG
>> 697 select SWAP_IO_SPACE
>> 698 select SYS_HAS_CPU_R4X00
>> 699 select SYS_HAS_CPU_R5000
>> 700 select SYS_HAS_EARLY_PRINTK
>> 701 select SYS_SUPPORTS_32BIT_KERNEL
>> 702 select SYS_SUPPORTS_64BIT_KERNEL
>> 703 select SYS_SUPPORTS_BIG_ENDIAN
>> 704 select WAR_R4600_V1_INDEX_ICACHEOP
>> 705 select WAR_R4600_V1_HIT_CACHEOP
>> 706 select WAR_R4600_V2_HIT_CACHEOP
>> 707 select MIPS_L1_CACHE_SHIFT_7
>> 708 help
>> 709 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 710 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 711 that runs on these, say Y here.
>> 712
>> 713 config SGI_IP27
>> 714 bool "SGI IP27 (Origin200/2000)"
>> 715 select ARCH_HAS_PHYS_TO_DMA
>> 716 select ARCH_SPARSEMEM_ENABLE
>> 717 select FW_ARC
>> 718 select FW_ARC64
>> 719 select ARC_CMDLINE_ONLY
>> 720 select BOOT_ELF64
>> 721 select DEFAULT_SGI_PARTITION
>> 722 select FORCE_PCI
>> 723 select SYS_HAS_EARLY_PRINTK
>> 724 select HAVE_PCI
>> 725 select IRQ_MIPS_CPU
>> 726 select IRQ_DOMAIN_HIERARCHY
>> 727 select NR_CPUS_DEFAULT_64
>> 728 select PCI_DRIVERS_GENERIC
>> 729 select PCI_XTALK_BRIDGE
>> 730 select SYS_HAS_CPU_R10000
>> 731 select SYS_SUPPORTS_64BIT_KERNEL
>> 732 select SYS_SUPPORTS_BIG_ENDIAN
>> 733 select SYS_SUPPORTS_NUMA
>> 734 select SYS_SUPPORTS_SMP
>> 735 select WAR_R10000_LLSC
>> 736 select MIPS_L1_CACHE_SHIFT_7
>> 737 select NUMA
>> 738 select HAVE_ARCH_NODEDATA_EXTENSION
>> 739 help
>> 740 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 741 workstations. To compile a Linux kernel that runs on these, say Y
>> 742 here.
>> 743
>> 744 config SGI_IP28
>> 745 bool "SGI IP28 (Indigo2 R10k)"
>> 746 select ARC_MEMORY
>> 747 select ARC_PROMLIB
>> 748 select FW_ARC
>> 749 select FW_ARC64
>> 750 select ARCH_MIGHT_HAVE_PC_SERIO
>> 751 select BOOT_ELF64
>> 752 select CEVT_R4K
>> 753 select CSRC_R4K
>> 754 select DEFAULT_SGI_PARTITION
>> 755 select DMA_NONCOHERENT
>> 756 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 757 select IRQ_MIPS_CPU
>> 758 select HAVE_EISA
>> 759 select I8253
>> 760 select I8259
>> 761 select SGI_HAS_I8042
>> 762 select SGI_HAS_INDYDOG
>> 763 select SGI_HAS_HAL2
>> 764 select SGI_HAS_SEEQ
>> 765 select SGI_HAS_WD93
>> 766 select SGI_HAS_ZILOG
>> 767 select SWAP_IO_SPACE
>> 768 select SYS_HAS_CPU_R10000
>> 769 select SYS_HAS_EARLY_PRINTK
>> 770 select SYS_SUPPORTS_64BIT_KERNEL
>> 771 select SYS_SUPPORTS_BIG_ENDIAN
>> 772 select WAR_R10000_LLSC
>> 773 select MIPS_L1_CACHE_SHIFT_7
>> 774 help
>> 775 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 776 kernel that runs on these, say Y here.
>> 777
>> 778 config SGI_IP30
>> 779 bool "SGI IP30 (Octane/Octane2)"
>> 780 select ARCH_HAS_PHYS_TO_DMA
>> 781 select FW_ARC
>> 782 select FW_ARC64
>> 783 select BOOT_ELF64
>> 784 select CEVT_R4K
>> 785 select CSRC_R4K
>> 786 select FORCE_PCI
>> 787 select SYNC_R4K if SMP
>> 788 select ZONE_DMA32
>> 789 select HAVE_PCI
>> 790 select IRQ_MIPS_CPU
>> 791 select IRQ_DOMAIN_HIERARCHY
>> 792 select PCI_DRIVERS_GENERIC
>> 793 select PCI_XTALK_BRIDGE
>> 794 select SYS_HAS_EARLY_PRINTK
>> 795 select SYS_HAS_CPU_R10000
>> 796 select SYS_SUPPORTS_64BIT_KERNEL
>> 797 select SYS_SUPPORTS_BIG_ENDIAN
>> 798 select SYS_SUPPORTS_SMP
>> 799 select WAR_R10000_LLSC
>> 800 select MIPS_L1_CACHE_SHIFT_7
>> 801 select ARC_MEMORY
>> 802 help
>> 803 These are the SGI Octane and Octane2 graphics workstations. To
>> 804 compile a Linux kernel that runs on these, say Y here.
>> 805
>> 806 config SGI_IP32
>> 807 bool "SGI IP32 (O2)"
>> 808 select ARC_MEMORY
>> 809 select ARC_PROMLIB
>> 810 select ARCH_HAS_PHYS_TO_DMA
>> 811 select FW_ARC
>> 812 select FW_ARC32
>> 813 select BOOT_ELF32
>> 814 select CEVT_R4K
>> 815 select CSRC_R4K
>> 816 select DMA_NONCOHERENT
>> 817 select HAVE_PCI
>> 818 select IRQ_MIPS_CPU
>> 819 select R5000_CPU_SCACHE
>> 820 select RM7000_CPU_SCACHE
>> 821 select SYS_HAS_CPU_R5000
>> 822 select SYS_HAS_CPU_R10000 if BROKEN
>> 823 select SYS_HAS_CPU_RM7000
>> 824 select SYS_HAS_CPU_NEVADA
>> 825 select SYS_SUPPORTS_64BIT_KERNEL
>> 826 select SYS_SUPPORTS_BIG_ENDIAN
>> 827 select WAR_ICACHE_REFILLS
>> 828 help
>> 829 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 830
>> 831 config SIBYTE_CRHONE
>> 832 bool "Sibyte BCM91125C-CRhone"
>> 833 select BOOT_ELF32
>> 834 select SIBYTE_BCM1125
>> 835 select SWAP_IO_SPACE
>> 836 select SYS_HAS_CPU_SB1
>> 837 select SYS_SUPPORTS_BIG_ENDIAN
>> 838 select SYS_SUPPORTS_HIGHMEM
>> 839 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 840
>> 841 config SIBYTE_RHONE
>> 842 bool "Sibyte BCM91125E-Rhone"
>> 843 select BOOT_ELF32
>> 844 select SIBYTE_SB1250
>> 845 select SWAP_IO_SPACE
>> 846 select SYS_HAS_CPU_SB1
>> 847 select SYS_SUPPORTS_BIG_ENDIAN
>> 848 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 849
>> 850 config SIBYTE_SWARM
>> 851 bool "Sibyte BCM91250A-SWARM"
>> 852 select BOOT_ELF32
>> 853 select HAVE_PATA_PLATFORM
>> 854 select SIBYTE_SB1250
>> 855 select SWAP_IO_SPACE
>> 856 select SYS_HAS_CPU_SB1
>> 857 select SYS_SUPPORTS_BIG_ENDIAN
>> 858 select SYS_SUPPORTS_HIGHMEM
>> 859 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 860 select ZONE_DMA32 if 64BIT
>> 861 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 862
>> 863 config SIBYTE_LITTLESUR
>> 864 bool "Sibyte BCM91250C2-LittleSur"
>> 865 select BOOT_ELF32
>> 866 select HAVE_PATA_PLATFORM
>> 867 select SIBYTE_SB1250
>> 868 select SWAP_IO_SPACE
>> 869 select SYS_HAS_CPU_SB1
>> 870 select SYS_SUPPORTS_BIG_ENDIAN
>> 871 select SYS_SUPPORTS_HIGHMEM
>> 872 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 873 select ZONE_DMA32 if 64BIT
>> 874
>> 875 config SIBYTE_SENTOSA
>> 876 bool "Sibyte BCM91250E-Sentosa"
>> 877 select BOOT_ELF32
>> 878 select SIBYTE_SB1250
>> 879 select SWAP_IO_SPACE
>> 880 select SYS_HAS_CPU_SB1
>> 881 select SYS_SUPPORTS_BIG_ENDIAN
>> 882 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 883 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 884
>> 885 config SIBYTE_BIGSUR
>> 886 bool "Sibyte BCM91480B-BigSur"
>> 887 select BOOT_ELF32
>> 888 select NR_CPUS_DEFAULT_4
>> 889 select SIBYTE_BCM1x80
>> 890 select SWAP_IO_SPACE
>> 891 select SYS_HAS_CPU_SB1
>> 892 select SYS_SUPPORTS_BIG_ENDIAN
>> 893 select SYS_SUPPORTS_HIGHMEM
>> 894 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 895 select ZONE_DMA32 if 64BIT
>> 896 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 897
>> 898 config SNI_RM
>> 899 bool "SNI RM200/300/400"
>> 900 select ARC_MEMORY
>> 901 select ARC_PROMLIB
>> 902 select FW_ARC if CPU_LITTLE_ENDIAN
>> 903 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 904 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 905 select ARCH_MAY_HAVE_PC_FDC
>> 906 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 907 select ARCH_MIGHT_HAVE_PC_SERIO
>> 908 select BOOT_ELF32
>> 909 select CEVT_R4K
>> 910 select CSRC_R4K
>> 911 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 912 select DMA_NONCOHERENT
>> 913 select GENERIC_ISA_DMA
>> 914 select HAVE_EISA
>> 915 select HAVE_PCSPKR_PLATFORM
>> 916 select HAVE_PCI
>> 917 select IRQ_MIPS_CPU
>> 918 select I8253
>> 919 select I8259
>> 920 select ISA
>> 921 select MIPS_L1_CACHE_SHIFT_6
>> 922 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 923 select SYS_HAS_CPU_R4X00
>> 924 select SYS_HAS_CPU_R5000
>> 925 select SYS_HAS_CPU_R10000
>> 926 select R5000_CPU_SCACHE
>> 927 select SYS_HAS_EARLY_PRINTK
>> 928 select SYS_SUPPORTS_32BIT_KERNEL
>> 929 select SYS_SUPPORTS_64BIT_KERNEL
>> 930 select SYS_SUPPORTS_BIG_ENDIAN
>> 931 select SYS_SUPPORTS_HIGHMEM
>> 932 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 933 select WAR_R4600_V2_HIT_CACHEOP
>> 934 help
>> 935 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 936 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 937 Technology and now in turn merged with Fujitsu. Say Y here to
>> 938 support this machine type.
>> 939
>> 940 config MACH_TX49XX
>> 941 bool "Toshiba TX49 series based machines"
>> 942 select WAR_TX49XX_ICACHE_INDEX_INV
>> 943
>> 944 config MIKROTIK_RB532
>> 945 bool "Mikrotik RB532 boards"
>> 946 select CEVT_R4K
>> 947 select CSRC_R4K
>> 948 select DMA_NONCOHERENT
>> 949 select HAVE_PCI
>> 950 select IRQ_MIPS_CPU
>> 951 select SYS_HAS_CPU_MIPS32_R1
>> 952 select SYS_SUPPORTS_32BIT_KERNEL
>> 953 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 954 select SWAP_IO_SPACE
>> 955 select BOOT_RAW
>> 956 select GPIOLIB
>> 957 select MIPS_L1_CACHE_SHIFT_4
>> 958 help
>> 959 Support the Mikrotik(tm) RouterBoard 532 series,
>> 960 based on the IDT RC32434 SoC.
>> 961
>> 962 config CAVIUM_OCTEON_SOC
>> 963 bool "Cavium Networks Octeon SoC based boards"
>> 964 select CEVT_R4K
>> 965 select ARCH_HAS_PHYS_TO_DMA
>> 966 select HAVE_RAPIDIO
>> 967 select PHYS_ADDR_T_64BIT
>> 968 select SYS_SUPPORTS_64BIT_KERNEL
>> 969 select SYS_SUPPORTS_BIG_ENDIAN
>> 970 select EDAC_SUPPORT
>> 971 select EDAC_ATOMIC_SCRUB
>> 972 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 973 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 974 select SYS_HAS_EARLY_PRINTK
>> 975 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 976 select HAVE_PCI
>> 977 select HAVE_PLAT_DELAY
>> 978 select HAVE_PLAT_FW_INIT_CMDLINE
>> 979 select HAVE_PLAT_MEMCPY
>> 980 select ZONE_DMA32
>> 981 select GPIOLIB
>> 982 select USE_OF
>> 983 select ARCH_SPARSEMEM_ENABLE
>> 984 select SYS_SUPPORTS_SMP
>> 985 select NR_CPUS_DEFAULT_64
>> 986 select MIPS_NR_CPU_NR_MAP_1024
>> 987 select BUILTIN_DTB
>> 988 select MTD
>> 989 select MTD_COMPLEX_MAPPINGS
>> 990 select SWIOTLB
>> 991 select SYS_SUPPORTS_RELOCATABLE
>> 992 help
>> 993 This option supports all of the Octeon reference boards from Cavium
>> 994 Networks. It builds a kernel that dynamically determines the Octeon
>> 995 CPU type and supports all known board reference implementations.
>> 996 Some of the supported boards are:
>> 997 EBT3000
>> 998 EBH3000
>> 999 EBH3100
>> 1000 Thunder
>> 1001 Kodama
>> 1002 Hikari
>> 1003 Say Y here for most Octeon reference boards.
>> 1004
>> 1005 endchoice
>> 1006
>> 1007 config FIT_IMAGE_FDT_EPM5
>> 1008 bool "Include FDT for Mobileye EyeQ5 development platforms"
>> 1009 depends on MACH_EYEQ5
>> 1010 default n
>> 1011 help
>> 1012 Enable this to include the FDT for the EyeQ5 development platforms
>> 1013 from Mobileye in the FIT kernel image.
>> 1014 This requires u-boot on the platform.
>> 1015
>> 1016 source "arch/mips/alchemy/Kconfig"
>> 1017 source "arch/mips/ath25/Kconfig"
>> 1018 source "arch/mips/ath79/Kconfig"
>> 1019 source "arch/mips/bcm47xx/Kconfig"
>> 1020 source "arch/mips/bcm63xx/Kconfig"
>> 1021 source "arch/mips/bmips/Kconfig"
>> 1022 source "arch/mips/generic/Kconfig"
>> 1023 source "arch/mips/ingenic/Kconfig"
>> 1024 source "arch/mips/jazz/Kconfig"
>> 1025 source "arch/mips/lantiq/Kconfig"
>> 1026 source "arch/mips/mobileye/Kconfig"
>> 1027 source "arch/mips/pic32/Kconfig"
>> 1028 source "arch/mips/ralink/Kconfig"
>> 1029 source "arch/mips/sgi-ip27/Kconfig"
>> 1030 source "arch/mips/sibyte/Kconfig"
>> 1031 source "arch/mips/txx9/Kconfig"
>> 1032 source "arch/mips/cavium-octeon/Kconfig"
>> 1033 source "arch/mips/loongson2ef/Kconfig"
>> 1034 source "arch/mips/loongson32/Kconfig"
>> 1035 source "arch/mips/loongson64/Kconfig"
>> 1036
>> 1037 endmenu
>> 1038
>> 1039 config GENERIC_HWEIGHT
>> 1040 bool
>> 1041 default y
>> 1042
>> 1043 config GENERIC_CALIBRATE_DELAY
>> 1044 bool
>> 1045 default y
342 1046
343 config SCHED_OMIT_FRAME_POINTER 1047 config SCHED_OMIT_FRAME_POINTER
344 bool 1048 bool
345 default y 1049 default y
346 1050
>> 1051 #
>> 1052 # Select some configuration options automatically based on user selections.
>> 1053 #
>> 1054 config FW_ARC
>> 1055 bool
>> 1056
347 config ARCH_MAY_HAVE_PC_FDC 1057 config ARCH_MAY_HAVE_PC_FDC
348 bool 1058 bool
349 default PCI <<
350 1059
351 config PPC_UDBG_16550 !! 1060 config BOOT_RAW
352 bool 1061 bool
353 1062
354 config GENERIC_TBSYNC !! 1063 config CEVT_BCM1480
355 bool 1064 bool
356 default y if PPC32 && SMP <<
357 1065
358 config AUDIT_ARCH !! 1066 config CEVT_DS1287
359 bool 1067 bool
360 default y <<
361 1068
362 config GENERIC_BUG !! 1069 config CEVT_GT641XX
363 bool 1070 bool
364 default y <<
365 depends on BUG <<
366 1071
367 config GENERIC_BUG_RELATIVE_POINTERS !! 1072 config CEVT_R4K
368 def_bool y !! 1073 bool
369 depends on GENERIC_BUG <<
370 1074
371 config SYS_SUPPORTS_APM_EMULATION !! 1075 config CEVT_SB1250
372 default y if PMAC_APM_EMU <<
373 bool 1076 bool
374 1077
375 config EPAPR_BOOT !! 1078 config CEVT_TXX9
376 bool 1079 bool
377 help <<
378 Used to allow a board to specify it <<
379 1080
380 config DEFAULT_UIMAGE !! 1081 config CSRC_BCM1480
381 bool 1082 bool
382 help <<
383 Used to allow a board to specify it <<
384 1083
385 config ARCH_HIBERNATION_POSSIBLE !! 1084 config CSRC_IOASIC
386 bool 1085 bool
387 default y <<
388 1086
389 config ARCH_SUSPEND_POSSIBLE !! 1087 config CSRC_R4K
390 def_bool y !! 1088 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
391 depends on ADB_PMU || PPC_EFIKA || PPC !! 1089 select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT
392 (PPC_85xx && !PPC_E500MC) | !! 1090 bool
393 || 44x <<
394 1091
395 config ARCH_SUSPEND_NONZERO_CPU !! 1092 config CSRC_SB1250
396 def_bool y !! 1093 bool
397 depends on PPC_POWERNV || PPC_PSERIES !! 1094
>> 1095 config MIPS_CLOCK_VSYSCALL
>> 1096 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1097
>> 1098 config GPIO_TXX9
>> 1099 select GPIOLIB
>> 1100 bool
>> 1101
>> 1102 config FW_CFE
>> 1103 bool
398 1104
399 config ARCH_HAS_ADD_PAGES !! 1105 config ARCH_SUPPORTS_UPROBES
400 def_bool y 1106 def_bool y
401 depends on ARCH_ENABLE_MEMORY_HOTPLUG <<
402 1107
403 config PPC_DCR_NATIVE !! 1108 config DMA_NONCOHERENT
404 bool 1109 bool
>> 1110 #
>> 1111 # MIPS allows mixing "slightly different" Cacheability and Coherency
>> 1112 # Attribute bits. It is believed that the uncached access through
>> 1113 # KSEG1 and the implementation specific "uncached accelerated" used
>> 1114 # by pgprot_writcombine can be mixed, and the latter sometimes provides
>> 1115 # significant advantages.
>> 1116 #
>> 1117 select ARCH_HAS_SETUP_DMA_OPS
>> 1118 select ARCH_HAS_DMA_WRITE_COMBINE
>> 1119 select ARCH_HAS_DMA_PREP_COHERENT
>> 1120 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 1121 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
>> 1122 select ARCH_HAS_DMA_SET_UNCACHED
>> 1123 select DMA_NONCOHERENT_MMAP
>> 1124 select NEED_DMA_MAP_STATE
405 1125
406 config PPC_DCR_MMIO !! 1126 config SYS_HAS_EARLY_PRINTK
407 bool 1127 bool
408 1128
409 config PPC_DCR !! 1129 config SYS_SUPPORTS_HOTPLUG_CPU
410 bool 1130 bool
411 depends on PPC_DCR_NATIVE || PPC_DCR_M <<
412 default y <<
413 1131
414 config PPC_PCI_OF_BUS_MAP !! 1132 config MIPS_BONITO64
415 bool "Use pci_to_OF_bus_map (deprecate !! 1133 bool
416 depends on PPC32 !! 1134
417 depends on PPC_PMAC || PPC_CHRP !! 1135 config MIPS_MSC
418 help !! 1136 bool
419 This option uses pci_to_OF_bus_map t !! 1137
420 restricts the system to only having !! 1138 config SYNC_R4K
421 the "pci-OF-bus-map" property to be !! 1139 bool
422 !! 1140
423 If unsure, say "N". !! 1141 config NO_IOPORT_MAP
424 !! 1142 def_bool n
425 config PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT !! 1143
426 depends on PPC32 !! 1144 config GENERIC_CSUM
427 depends on !PPC_PCI_OF_BUS_MAP !! 1145 def_bool CPU_NO_LOAD_STORE_LR
428 bool "Assign PCI bus numbers from zero !! 1146
429 default y !! 1147 config GENERIC_ISA_DMA
>> 1148 bool
>> 1149 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1150 select ISA_DMA_API
>> 1151
>> 1152 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1153 bool
>> 1154 select GENERIC_ISA_DMA
>> 1155
>> 1156 config HAVE_PLAT_DELAY
>> 1157 bool
>> 1158
>> 1159 config HAVE_PLAT_FW_INIT_CMDLINE
>> 1160 bool
>> 1161
>> 1162 config HAVE_PLAT_MEMCPY
>> 1163 bool
>> 1164
>> 1165 config ISA_DMA_API
>> 1166 bool
>> 1167
>> 1168 config SYS_SUPPORTS_RELOCATABLE
>> 1169 bool
>> 1170 help
>> 1171 Selected if the platform supports relocating the kernel.
>> 1172 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1173 to allow access to command line and entropy sources.
>> 1174
>> 1175 #
>> 1176 # Endianness selection. Sufficiently obscure so many users don't know what to
>> 1177 # answer,so we try hard to limit the available choices. Also the use of a
>> 1178 # choice statement should be more obvious to the user.
>> 1179 #
>> 1180 choice
>> 1181 prompt "Endianness selection"
430 help 1182 help
431 By default on PPC32 were PCI bus num !! 1183 Some MIPS machines can be configured for either little or big endian
432 So system could have only 256 PCI bu !! 1184 byte order. These modes require different kernels and a different
433 PCI domains. When this option is ena !! 1185 Linux distribution. In general there is one preferred byteorder for a
434 PCI domain dependent and each PCI co !! 1186 particular system but some systems are just as commonly used in the
435 256 PCI buses, like it is on other L !! 1187 one or the other endianness.
>> 1188
>> 1189 config CPU_BIG_ENDIAN
>> 1190 bool "Big endian"
>> 1191 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1192
>> 1193 config CPU_LITTLE_ENDIAN
>> 1194 bool "Little endian"
>> 1195 depends on SYS_SUPPORTS_LITTLE_ENDIAN
>> 1196
>> 1197 endchoice
436 1198
437 config PPC_OF_PLATFORM_PCI !! 1199 config EXPORT_UASM
438 bool 1200 bool
439 depends on PCI <<
440 depends on PPC64 # not supported on 32 <<
441 1201
442 config ARCH_SUPPORTS_UPROBES !! 1202 config SYS_SUPPORTS_APM_EMULATION
443 def_bool y !! 1203 bool
444 1204
445 config PPC_ADV_DEBUG_REGS !! 1205 config SYS_SUPPORTS_BIG_ENDIAN
446 bool 1206 bool
447 depends on BOOKE <<
448 default y <<
449 1207
450 config PPC_ADV_DEBUG_IACS !! 1208 config SYS_SUPPORTS_LITTLE_ENDIAN
451 int !! 1209 bool
452 depends on PPC_ADV_DEBUG_REGS <<
453 default 4 if 44x <<
454 default 2 <<
455 1210
456 config PPC_ADV_DEBUG_DACS !! 1211 config MIPS_HUGE_TLB_SUPPORT
457 int !! 1212 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
458 depends on PPC_ADV_DEBUG_REGS <<
459 default 2 <<
460 1213
461 config PPC_ADV_DEBUG_DVCS !! 1214 config IRQ_TXX9
462 int !! 1215 bool
463 depends on PPC_ADV_DEBUG_REGS <<
464 default 2 if 44x <<
465 default 0 <<
466 1216
467 config PPC_ADV_DEBUG_DAC_RANGE !! 1217 config IRQ_GT641XX
468 bool 1218 bool
469 depends on PPC_ADV_DEBUG_REGS && 44x <<
470 default y <<
471 1219
472 config PPC_DAWR !! 1220 config PCI_GT64XXX_PCI0
473 bool 1221 bool
474 1222
475 config PGTABLE_LEVELS !! 1223 config PCI_XTALK_BRIDGE
>> 1224 bool
>> 1225
>> 1226 config NO_EXCEPT_FILL
>> 1227 bool
>> 1228
>> 1229 config MIPS_SPRAM
>> 1230 bool
>> 1231
>> 1232 config SWAP_IO_SPACE
>> 1233 bool
>> 1234
>> 1235 config SGI_HAS_INDYDOG
>> 1236 bool
>> 1237
>> 1238 config SGI_HAS_HAL2
>> 1239 bool
>> 1240
>> 1241 config SGI_HAS_SEEQ
>> 1242 bool
>> 1243
>> 1244 config SGI_HAS_WD93
>> 1245 bool
>> 1246
>> 1247 config SGI_HAS_ZILOG
>> 1248 bool
>> 1249
>> 1250 config SGI_HAS_I8042
>> 1251 bool
>> 1252
>> 1253 config DEFAULT_SGI_PARTITION
>> 1254 bool
>> 1255
>> 1256 config FW_ARC32
>> 1257 bool
>> 1258
>> 1259 config FW_SNIPROM
>> 1260 bool
>> 1261
>> 1262 config BOOT_ELF32
>> 1263 bool
>> 1264
>> 1265 config MIPS_L1_CACHE_SHIFT_4
>> 1266 bool
>> 1267
>> 1268 config MIPS_L1_CACHE_SHIFT_5
>> 1269 bool
>> 1270
>> 1271 config MIPS_L1_CACHE_SHIFT_6
>> 1272 bool
>> 1273
>> 1274 config MIPS_L1_CACHE_SHIFT_7
>> 1275 bool
>> 1276
>> 1277 config MIPS_L1_CACHE_SHIFT
476 int 1278 int
477 default 2 if !PPC64 !! 1279 default "7" if MIPS_L1_CACHE_SHIFT_7
478 default 4 !! 1280 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1281 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1282 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1283 default "5"
479 1284
480 source "arch/powerpc/sysdev/Kconfig" !! 1285 config ARC_CMDLINE_ONLY
481 source "arch/powerpc/platforms/Kconfig" !! 1286 bool
482 1287
483 menu "Kernel options" !! 1288 config ARC_CONSOLE
>> 1289 bool "ARC console support"
>> 1290 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
484 1291
485 config HIGHMEM !! 1292 config ARC_MEMORY
486 bool "High memory support" !! 1293 bool
487 depends on PPC32 !! 1294
488 select KMAP_LOCAL !! 1295 config ARC_PROMLIB
>> 1296 bool
>> 1297
>> 1298 config FW_ARC64
>> 1299 bool
489 1300
490 source "kernel/Kconfig.hz" !! 1301 config BOOT_ELF64
>> 1302 bool
491 1303
492 config MATH_EMULATION !! 1304 menu "CPU selection"
493 bool "Math emulation" <<
494 depends on 44x || PPC_8xx || PPC_MPC83 <<
495 select PPC_FPU_REGS <<
496 help <<
497 Some PowerPC chips designed for embe <<
498 a floating-point unit and therefore <<
499 floating-point instructions in the P <<
500 say Y here, the kernel will include <<
501 unit, which will allow programs that <<
502 instructions to run. <<
503 <<
504 This is also useful to emulate missi <<
505 such as fsqrt on cores that do have <<
506 them (such as Freescale BookE). <<
507 1305
508 choice 1306 choice
509 prompt "Math emulation options" !! 1307 prompt "CPU type"
510 default MATH_EMULATION_FULL !! 1308 default CPU_R4X00
511 depends on MATH_EMULATION <<
512 <<
513 config MATH_EMULATION_FULL <<
514 bool "Emulate all the floating point i <<
515 help <<
516 Select this option will enable the k <<
517 all the floating point instructions. <<
518 a FPU, you should select this. <<
519 1309
520 config MATH_EMULATION_HW_UNIMPLEMENTED !! 1310 config CPU_LOONGSON64
521 bool "Just emulate the FPU unimplement !! 1311 bool "Loongson 64-bit CPU"
>> 1312 depends on SYS_HAS_CPU_LOONGSON64
>> 1313 select ARCH_HAS_PHYS_TO_DMA
>> 1314 select CPU_MIPSR2
>> 1315 select CPU_HAS_PREFETCH
>> 1316 select CPU_SUPPORTS_64BIT_KERNEL
>> 1317 select CPU_SUPPORTS_HIGHMEM
>> 1318 select CPU_SUPPORTS_HUGEPAGES
>> 1319 select CPU_SUPPORTS_MSA
>> 1320 select CPU_SUPPORTS_VZ
>> 1321 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
>> 1322 select CPU_MIPSR2_IRQ_VI
>> 1323 select DMA_NONCOHERENT
>> 1324 select WEAK_ORDERING
>> 1325 select WEAK_REORDERING_BEYOND_LLSC
>> 1326 select MIPS_ASID_BITS_VARIABLE
>> 1327 select MIPS_PGD_C0_CONTEXT
>> 1328 select MIPS_L1_CACHE_SHIFT_6
>> 1329 select MIPS_FP_SUPPORT
>> 1330 select GPIOLIB
>> 1331 select SWIOTLB
>> 1332 help
>> 1333 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
>> 1334 cores implements the MIPS64R2 instruction set with many extensions,
>> 1335 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
>> 1336 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
>> 1337 Loongson-2E/2F is not covered here and will be removed in future.
>> 1338
>> 1339 config CPU_LOONGSON2E
>> 1340 bool "Loongson 2E"
>> 1341 depends on SYS_HAS_CPU_LOONGSON2E
>> 1342 select CPU_LOONGSON2EF
>> 1343 help
>> 1344 The Loongson 2E processor implements the MIPS III instruction set
>> 1345 with many extensions.
>> 1346
>> 1347 It has an internal FPGA northbridge, which is compatible to
>> 1348 bonito64.
>> 1349
>> 1350 config CPU_LOONGSON2F
>> 1351 bool "Loongson 2F"
>> 1352 depends on SYS_HAS_CPU_LOONGSON2F
>> 1353 select CPU_LOONGSON2EF
>> 1354 help
>> 1355 The Loongson 2F processor implements the MIPS III instruction set
>> 1356 with many extensions.
>> 1357
>> 1358 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1359 have a similar programming interface with FPGA northbridge used in
>> 1360 Loongson2E.
>> 1361
>> 1362 config CPU_LOONGSON1B
>> 1363 bool "Loongson 1B"
>> 1364 depends on SYS_HAS_CPU_LOONGSON1B
>> 1365 select CPU_LOONGSON32
>> 1366 select LEDS_GPIO_REGISTER
>> 1367 help
>> 1368 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1369 Release 1 instruction set and part of the MIPS32 Release 2
>> 1370 instruction set.
>> 1371
>> 1372 config CPU_LOONGSON1C
>> 1373 bool "Loongson 1C"
>> 1374 depends on SYS_HAS_CPU_LOONGSON1C
>> 1375 select CPU_LOONGSON32
>> 1376 select LEDS_GPIO_REGISTER
>> 1377 help
>> 1378 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1379 Release 1 instruction set and part of the MIPS32 Release 2
>> 1380 instruction set.
>> 1381
>> 1382 config CPU_MIPS32_R1
>> 1383 bool "MIPS32 Release 1"
>> 1384 depends on SYS_HAS_CPU_MIPS32_R1
>> 1385 select CPU_HAS_PREFETCH
>> 1386 select CPU_SUPPORTS_32BIT_KERNEL
>> 1387 select CPU_SUPPORTS_HIGHMEM
>> 1388 help
>> 1389 Choose this option to build a kernel for release 1 or later of the
>> 1390 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1391 MIPS processor are based on a MIPS32 processor. If you know the
>> 1392 specific type of processor in your system, choose those that one
>> 1393 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1394 Release 2 of the MIPS32 architecture is available since several
>> 1395 years so chances are you even have a MIPS32 Release 2 processor
>> 1396 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1397 performance.
>> 1398
>> 1399 config CPU_MIPS32_R2
>> 1400 bool "MIPS32 Release 2"
>> 1401 depends on SYS_HAS_CPU_MIPS32_R2
>> 1402 select CPU_HAS_PREFETCH
>> 1403 select CPU_SUPPORTS_32BIT_KERNEL
>> 1404 select CPU_SUPPORTS_HIGHMEM
>> 1405 select CPU_SUPPORTS_MSA
>> 1406 help
>> 1407 Choose this option to build a kernel for release 2 or later of the
>> 1408 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1409 MIPS processor are based on a MIPS32 processor. If you know the
>> 1410 specific type of processor in your system, choose those that one
>> 1411 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1412
>> 1413 config CPU_MIPS32_R5
>> 1414 bool "MIPS32 Release 5"
>> 1415 depends on SYS_HAS_CPU_MIPS32_R5
>> 1416 select CPU_HAS_PREFETCH
>> 1417 select CPU_SUPPORTS_32BIT_KERNEL
>> 1418 select CPU_SUPPORTS_HIGHMEM
>> 1419 select CPU_SUPPORTS_MSA
>> 1420 select CPU_SUPPORTS_VZ
>> 1421 select MIPS_O32_FP64_SUPPORT
>> 1422 help
>> 1423 Choose this option to build a kernel for release 5 or later of the
>> 1424 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1425 family, are based on a MIPS32r5 processor. If you own an older
>> 1426 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1427
>> 1428 config CPU_MIPS32_R6
>> 1429 bool "MIPS32 Release 6"
>> 1430 depends on SYS_HAS_CPU_MIPS32_R6
>> 1431 select CPU_HAS_PREFETCH
>> 1432 select CPU_NO_LOAD_STORE_LR
>> 1433 select CPU_SUPPORTS_32BIT_KERNEL
>> 1434 select CPU_SUPPORTS_HIGHMEM
>> 1435 select CPU_SUPPORTS_MSA
>> 1436 select CPU_SUPPORTS_VZ
>> 1437 select MIPS_O32_FP64_SUPPORT
>> 1438 help
>> 1439 Choose this option to build a kernel for release 6 or later of the
>> 1440 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1441 family, are based on a MIPS32r6 processor. If you own an older
>> 1442 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1443
>> 1444 config CPU_MIPS64_R1
>> 1445 bool "MIPS64 Release 1"
>> 1446 depends on SYS_HAS_CPU_MIPS64_R1
>> 1447 select CPU_HAS_PREFETCH
>> 1448 select CPU_SUPPORTS_32BIT_KERNEL
>> 1449 select CPU_SUPPORTS_64BIT_KERNEL
>> 1450 select CPU_SUPPORTS_HIGHMEM
>> 1451 select CPU_SUPPORTS_HUGEPAGES
>> 1452 help
>> 1453 Choose this option to build a kernel for release 1 or later of the
>> 1454 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1455 MIPS processor are based on a MIPS64 processor. If you know the
>> 1456 specific type of processor in your system, choose those that one
>> 1457 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1458 Release 2 of the MIPS64 architecture is available since several
>> 1459 years so chances are you even have a MIPS64 Release 2 processor
>> 1460 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1461 performance.
>> 1462
>> 1463 config CPU_MIPS64_R2
>> 1464 bool "MIPS64 Release 2"
>> 1465 depends on SYS_HAS_CPU_MIPS64_R2
>> 1466 select CPU_HAS_PREFETCH
>> 1467 select CPU_SUPPORTS_32BIT_KERNEL
>> 1468 select CPU_SUPPORTS_64BIT_KERNEL
>> 1469 select CPU_SUPPORTS_HIGHMEM
>> 1470 select CPU_SUPPORTS_HUGEPAGES
>> 1471 select CPU_SUPPORTS_MSA
>> 1472 help
>> 1473 Choose this option to build a kernel for release 2 or later of the
>> 1474 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1475 MIPS processor are based on a MIPS64 processor. If you know the
>> 1476 specific type of processor in your system, choose those that one
>> 1477 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1478
>> 1479 config CPU_MIPS64_R5
>> 1480 bool "MIPS64 Release 5"
>> 1481 depends on SYS_HAS_CPU_MIPS64_R5
>> 1482 select CPU_HAS_PREFETCH
>> 1483 select CPU_SUPPORTS_32BIT_KERNEL
>> 1484 select CPU_SUPPORTS_64BIT_KERNEL
>> 1485 select CPU_SUPPORTS_HIGHMEM
>> 1486 select CPU_SUPPORTS_HUGEPAGES
>> 1487 select CPU_SUPPORTS_MSA
>> 1488 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1489 select CPU_SUPPORTS_VZ
>> 1490 help
>> 1491 Choose this option to build a kernel for release 5 or later of the
>> 1492 MIPS64 architecture. This is a intermediate MIPS architecture
>> 1493 release partly implementing release 6 features. Though there is no
>> 1494 any hardware known to be based on this release.
>> 1495
>> 1496 config CPU_MIPS64_R6
>> 1497 bool "MIPS64 Release 6"
>> 1498 depends on SYS_HAS_CPU_MIPS64_R6
>> 1499 select CPU_HAS_PREFETCH
>> 1500 select CPU_NO_LOAD_STORE_LR
>> 1501 select CPU_SUPPORTS_32BIT_KERNEL
>> 1502 select CPU_SUPPORTS_64BIT_KERNEL
>> 1503 select CPU_SUPPORTS_HIGHMEM
>> 1504 select CPU_SUPPORTS_HUGEPAGES
>> 1505 select CPU_SUPPORTS_MSA
>> 1506 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1507 select CPU_SUPPORTS_VZ
>> 1508 help
>> 1509 Choose this option to build a kernel for release 6 or later of the
>> 1510 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1511 family, are based on a MIPS64r6 processor. If you own an older
>> 1512 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1513
>> 1514 config CPU_P5600
>> 1515 bool "MIPS Warrior P5600"
>> 1516 depends on SYS_HAS_CPU_P5600
>> 1517 select CPU_HAS_PREFETCH
>> 1518 select CPU_SUPPORTS_32BIT_KERNEL
>> 1519 select CPU_SUPPORTS_HIGHMEM
>> 1520 select CPU_SUPPORTS_MSA
>> 1521 select CPU_SUPPORTS_CPUFREQ
>> 1522 select CPU_SUPPORTS_VZ
>> 1523 select CPU_MIPSR2_IRQ_VI
>> 1524 select CPU_MIPSR2_IRQ_EI
>> 1525 select MIPS_O32_FP64_SUPPORT
>> 1526 help
>> 1527 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
>> 1528 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
>> 1529 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
>> 1530 level features like up to six P5600 calculation cores, CM2 with L2
>> 1531 cache, IOCU/IOMMU (though might be unused depending on the system-
>> 1532 specific IP core configuration), GIC, CPC, virtualisation module,
>> 1533 eJTAG and PDtrace.
>> 1534
>> 1535 config CPU_R3000
>> 1536 bool "R3000"
>> 1537 depends on SYS_HAS_CPU_R3000
>> 1538 select CPU_HAS_WB
>> 1539 select CPU_R3K_TLB
>> 1540 select CPU_SUPPORTS_32BIT_KERNEL
>> 1541 select CPU_SUPPORTS_HIGHMEM
>> 1542 help
>> 1543 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1544 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1545 *not* work on R4000 machines and vice versa. However, since most
>> 1546 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1547 might be a safe bet. If the resulting kernel does not work,
>> 1548 try to recompile with R3000.
>> 1549
>> 1550 config CPU_R4300
>> 1551 bool "R4300"
>> 1552 depends on SYS_HAS_CPU_R4300
>> 1553 select CPU_SUPPORTS_32BIT_KERNEL
>> 1554 select CPU_SUPPORTS_64BIT_KERNEL
>> 1555 help
>> 1556 MIPS Technologies R4300-series processors.
>> 1557
>> 1558 config CPU_R4X00
>> 1559 bool "R4x00"
>> 1560 depends on SYS_HAS_CPU_R4X00
>> 1561 select CPU_SUPPORTS_32BIT_KERNEL
>> 1562 select CPU_SUPPORTS_64BIT_KERNEL
>> 1563 select CPU_SUPPORTS_HUGEPAGES
>> 1564 help
>> 1565 MIPS Technologies R4000-series processors other than 4300, including
>> 1566 the R4000, R4400, R4600, and 4700.
>> 1567
>> 1568 config CPU_TX49XX
>> 1569 bool "R49XX"
>> 1570 depends on SYS_HAS_CPU_TX49XX
>> 1571 select CPU_HAS_PREFETCH
>> 1572 select CPU_SUPPORTS_32BIT_KERNEL
>> 1573 select CPU_SUPPORTS_64BIT_KERNEL
>> 1574 select CPU_SUPPORTS_HUGEPAGES
>> 1575
>> 1576 config CPU_R5000
>> 1577 bool "R5000"
>> 1578 depends on SYS_HAS_CPU_R5000
>> 1579 select CPU_SUPPORTS_32BIT_KERNEL
>> 1580 select CPU_SUPPORTS_64BIT_KERNEL
>> 1581 select CPU_SUPPORTS_HUGEPAGES
>> 1582 help
>> 1583 MIPS Technologies R5000-series processors other than the Nevada.
>> 1584
>> 1585 config CPU_R5500
>> 1586 bool "R5500"
>> 1587 depends on SYS_HAS_CPU_R5500
>> 1588 select CPU_SUPPORTS_32BIT_KERNEL
>> 1589 select CPU_SUPPORTS_64BIT_KERNEL
>> 1590 select CPU_SUPPORTS_HUGEPAGES
>> 1591 help
>> 1592 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1593 instruction set.
>> 1594
>> 1595 config CPU_NEVADA
>> 1596 bool "RM52xx"
>> 1597 depends on SYS_HAS_CPU_NEVADA
>> 1598 select CPU_SUPPORTS_32BIT_KERNEL
>> 1599 select CPU_SUPPORTS_64BIT_KERNEL
>> 1600 select CPU_SUPPORTS_HUGEPAGES
>> 1601 help
>> 1602 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1603
>> 1604 config CPU_R10000
>> 1605 bool "R10000"
>> 1606 depends on SYS_HAS_CPU_R10000
>> 1607 select CPU_HAS_PREFETCH
>> 1608 select CPU_SUPPORTS_32BIT_KERNEL
>> 1609 select CPU_SUPPORTS_64BIT_KERNEL
>> 1610 select CPU_SUPPORTS_HIGHMEM
>> 1611 select CPU_SUPPORTS_HUGEPAGES
>> 1612 help
>> 1613 MIPS Technologies R10000-series processors.
>> 1614
>> 1615 config CPU_RM7000
>> 1616 bool "RM7000"
>> 1617 depends on SYS_HAS_CPU_RM7000
>> 1618 select CPU_HAS_PREFETCH
>> 1619 select CPU_SUPPORTS_32BIT_KERNEL
>> 1620 select CPU_SUPPORTS_64BIT_KERNEL
>> 1621 select CPU_SUPPORTS_HIGHMEM
>> 1622 select CPU_SUPPORTS_HUGEPAGES
>> 1623
>> 1624 config CPU_SB1
>> 1625 bool "SB1"
>> 1626 depends on SYS_HAS_CPU_SB1
>> 1627 select CPU_SUPPORTS_32BIT_KERNEL
>> 1628 select CPU_SUPPORTS_64BIT_KERNEL
>> 1629 select CPU_SUPPORTS_HIGHMEM
>> 1630 select CPU_SUPPORTS_HUGEPAGES
>> 1631 select WEAK_ORDERING
>> 1632
>> 1633 config CPU_CAVIUM_OCTEON
>> 1634 bool "Cavium Octeon processor"
>> 1635 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1636 select CPU_HAS_PREFETCH
>> 1637 select CPU_SUPPORTS_64BIT_KERNEL
>> 1638 select HAVE_PAGE_SIZE_8KB if !MIPS_VA_BITS_48
>> 1639 select HAVE_PAGE_SIZE_32KB if !MIPS_VA_BITS_48
>> 1640 select WEAK_ORDERING
>> 1641 select CPU_SUPPORTS_HIGHMEM
>> 1642 select CPU_SUPPORTS_HUGEPAGES
>> 1643 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1644 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1645 select MIPS_L1_CACHE_SHIFT_7
>> 1646 select CPU_SUPPORTS_VZ
>> 1647 help
>> 1648 The Cavium Octeon processor is a highly integrated chip containing
>> 1649 many ethernet hardware widgets for networking tasks. The processor
>> 1650 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1651 Full details can be found at http://www.caviumnetworks.com.
>> 1652
>> 1653 config CPU_BMIPS
>> 1654 bool "Broadcom BMIPS"
>> 1655 depends on SYS_HAS_CPU_BMIPS
>> 1656 select CPU_MIPS32
>> 1657 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1658 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1659 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1660 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1661 select CPU_SUPPORTS_32BIT_KERNEL
>> 1662 select DMA_NONCOHERENT
>> 1663 select IRQ_MIPS_CPU
>> 1664 select SWAP_IO_SPACE
>> 1665 select WEAK_ORDERING
>> 1666 select CPU_SUPPORTS_HIGHMEM
>> 1667 select CPU_HAS_PREFETCH
>> 1668 select CPU_SUPPORTS_CPUFREQ
>> 1669 select MIPS_EXTERNAL_TIMER
>> 1670 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
522 help 1671 help
523 Select this if you know there does h !! 1672 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
524 SoC, but some floating point instruc <<
525 1673
526 endchoice 1674 endchoice
527 1675
528 config PPC_TRANSACTIONAL_MEM !! 1676 config LOONGSON3_ENHANCEMENT
529 bool "Transactional Memory support for !! 1677 bool "New Loongson-3 CPU Enhancements"
530 depends on PPC_BOOK3S_64 !! 1678 default n
531 depends on SMP !! 1679 depends on CPU_LOONGSON64
532 select ALTIVEC <<
533 select VSX <<
534 help 1680 help
535 Support user-mode Transactional Memo !! 1681 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
536 !! 1682 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
537 config PPC_UV !! 1683 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
538 bool "Ultravisor support" !! 1684 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
539 depends on KVM_BOOK3S_HV_POSSIBLE !! 1685 Fast TLB refill support, etc.
540 depends on DEVICE_PRIVATE !! 1686
>> 1687 This option enable those enhancements which are not probed at run
>> 1688 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1689 please say 'N' here. If you want a high-performance kernel to run on
>> 1690 new Loongson-3 machines only, please say 'Y' here.
>> 1691
>> 1692 config CPU_LOONGSON3_WORKAROUNDS
>> 1693 bool "Loongson-3 LLSC Workarounds"
>> 1694 default y if SMP
>> 1695 depends on CPU_LOONGSON64
>> 1696 help
>> 1697 Loongson-3 processors have the llsc issues which require workarounds.
>> 1698 Without workarounds the system may hang unexpectedly.
>> 1699
>> 1700 Say Y, unless you know what you are doing.
>> 1701
>> 1702 config CPU_LOONGSON3_CPUCFG_EMULATION
>> 1703 bool "Emulate the CPUCFG instruction on older Loongson cores"
>> 1704 default y
>> 1705 depends on CPU_LOONGSON64
>> 1706 help
>> 1707 Loongson-3A R4 and newer have the CPUCFG instruction available for
>> 1708 userland to query CPU capabilities, much like CPUID on x86. This
>> 1709 option provides emulation of the instruction on older Loongson
>> 1710 cores, back to Loongson-3A1000.
>> 1711
>> 1712 If unsure, please say Y.
>> 1713
>> 1714 config CPU_MIPS32_3_5_FEATURES
>> 1715 bool "MIPS32 Release 3.5 Features"
>> 1716 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1717 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
>> 1718 CPU_P5600
>> 1719 help
>> 1720 Choose this option to build a kernel for release 2 or later of the
>> 1721 MIPS32 architecture including features from the 3.5 release such as
>> 1722 support for Enhanced Virtual Addressing (EVA).
>> 1723
>> 1724 config CPU_MIPS32_3_5_EVA
>> 1725 bool "Enhanced Virtual Addressing (EVA)"
>> 1726 depends on CPU_MIPS32_3_5_FEATURES
>> 1727 select EVA
>> 1728 default y
>> 1729 help
>> 1730 Choose this option if you want to enable the Enhanced Virtual
>> 1731 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1732 One of its primary benefits is an increase in the maximum size
>> 1733 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1734
>> 1735 config CPU_MIPS32_R5_FEATURES
>> 1736 bool "MIPS32 Release 5 Features"
>> 1737 depends on SYS_HAS_CPU_MIPS32_R5
>> 1738 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
>> 1739 help
>> 1740 Choose this option to build a kernel for release 2 or later of the
>> 1741 MIPS32 architecture including features from release 5 such as
>> 1742 support for Extended Physical Addressing (XPA).
>> 1743
>> 1744 config CPU_MIPS32_R5_XPA
>> 1745 bool "Extended Physical Addressing (XPA)"
>> 1746 depends on CPU_MIPS32_R5_FEATURES
>> 1747 depends on !EVA
>> 1748 depends on !PAGE_SIZE_4KB
>> 1749 depends on SYS_SUPPORTS_HIGHMEM
>> 1750 select XPA
>> 1751 select HIGHMEM
>> 1752 select PHYS_ADDR_T_64BIT
541 default n 1753 default n
542 help 1754 help
543 This option paravirtualizes the kern !! 1755 Choose this option if you want to enable the Extended Physical
544 supports the Protected Execution Fac !! 1756 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
545 the ultravisor firmware runs at a pr !! 1757 benefit is to increase physical addressing equal to or greater
546 hypervisor. !! 1758 than 40 bits. Note that this has the side effect of turning on
547 !! 1759 64-bit addressing which in turn makes the PTEs 64-bit in size.
548 If unsure, say "N". !! 1760 If unsure, say 'N' here.
549 <<
550 config LD_HEAD_STUB_CATCH <<
551 bool "Reserve 256 bytes to cope with l <<
552 depends on PPC64 <<
553 help <<
554 Very large kernels can cause linker <<
555 code in head_64.S, which moves the h <<
556 specified location. This option can <<
557 <<
558 If unsure, say "N". <<
559 <<
560 config MPROFILE_KERNEL <<
561 depends on PPC64_ELF_ABI_V2 && FUNCTIO <<
562 def_bool $(success,$(srctree)/arch/pow <<
563 def_bool $(success,$(srctree)/arch/pow <<
564 <<
565 config ARCH_USING_PATCHABLE_FUNCTION_ENTRY <<
566 depends on FUNCTION_TRACER && (PPC32 | <<
567 depends on $(cc-option,-fpatchable-fun <<
568 def_bool y if PPC32 <<
569 def_bool $(success,$(srctree)/arch/pow <<
570 def_bool $(success,$(srctree)/arch/pow <<
571 1761
572 config HOTPLUG_CPU !! 1762 if CPU_LOONGSON2F
573 bool "Support for enabling/disabling C !! 1763 config CPU_NOP_WORKAROUNDS
574 depends on SMP && (PPC_PSERIES || \ !! 1764 bool
575 PPC_PMAC || PPC_POWERNV || FSL <<
576 help <<
577 Say Y here to be able to disable and <<
578 CPUs at runtime on SMP machines. <<
579 <<
580 Say N if you are unsure. <<
581 <<
582 config INTERRUPT_SANITIZE_REGISTERS <<
583 bool "Clear gprs on interrupt arrival" <<
584 depends on PPC64 && ARCH_HAS_SYSCALL_W <<
585 default PPC_BOOK3E_64 || PPC_PSERIES | <<
586 help <<
587 Reduce the influence of user registe <<
588 syscalls through clearing user state <<
589 the exception. <<
590 1765
591 config PPC_QUEUED_SPINLOCKS !! 1766 config CPU_JUMP_WORKAROUNDS
592 bool "Queued spinlocks" if EXPERT !! 1767 bool
593 depends on SMP !! 1768
594 default PPC_BOOK3S_64 !! 1769 config CPU_LOONGSON2F_WORKAROUNDS
>> 1770 bool "Loongson 2F Workarounds"
>> 1771 default y
>> 1772 select CPU_NOP_WORKAROUNDS
>> 1773 select CPU_JUMP_WORKAROUNDS
595 help 1774 help
596 Say Y here to use queued spinlocks w !! 1775 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
597 fairness on large SMP and NUMA syste !! 1776 require workarounds. Without workarounds the system may hang
598 performance. !! 1777 unexpectedly. For more information please refer to the gas
>> 1778 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
599 1779
600 config ARCH_CPU_PROBE_RELEASE !! 1780 Loongson 2F03 and later have fixed these issues and no workarounds
601 def_bool y !! 1781 are needed. The workarounds have no significant side effect on them
602 depends on HOTPLUG_CPU !! 1782 but may decrease the performance of the system so this option should
>> 1783 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1784 systems.
603 1785
604 config PPC64_SUPPORTS_MEMORY_FAILURE !! 1786 If unsure, please say Y.
605 bool "Add support for memory hwpoison" !! 1787 endif # CPU_LOONGSON2F
606 depends on PPC_BOOK3S_64 <<
607 default "y" if PPC_POWERNV <<
608 select ARCH_SUPPORTS_MEMORY_FAILURE <<
609 1788
610 config ARCH_SUPPORTS_KEXEC !! 1789 config SYS_SUPPORTS_ZBOOT
611 def_bool PPC_BOOK3S || PPC_E500 || (44 !! 1790 bool
>> 1791 select HAVE_KERNEL_GZIP
>> 1792 select HAVE_KERNEL_BZIP2
>> 1793 select HAVE_KERNEL_LZ4
>> 1794 select HAVE_KERNEL_LZMA
>> 1795 select HAVE_KERNEL_LZO
>> 1796 select HAVE_KERNEL_XZ
>> 1797 select HAVE_KERNEL_ZSTD
612 1798
613 config ARCH_SUPPORTS_KEXEC_FILE !! 1799 config SYS_SUPPORTS_ZBOOT_UART16550
614 def_bool PPC64 !! 1800 bool
>> 1801 select SYS_SUPPORTS_ZBOOT
615 1802
616 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 1803 config SYS_SUPPORTS_ZBOOT_UART_PROM
617 def_bool y !! 1804 bool
>> 1805 select SYS_SUPPORTS_ZBOOT
618 1806
619 config ARCH_SELECTS_KEXEC_FILE !! 1807 config CPU_LOONGSON2EF
620 def_bool y !! 1808 bool
621 depends on KEXEC_FILE !! 1809 select CPU_SUPPORTS_32BIT_KERNEL
622 select KEXEC_ELF !! 1810 select CPU_SUPPORTS_64BIT_KERNEL
623 select HAVE_IMA_KEXEC if IMA !! 1811 select CPU_SUPPORTS_HIGHMEM
624 !! 1812 select CPU_SUPPORTS_HUGEPAGES
625 config PPC64_BIG_ENDIAN_ELF_ABI_V2 <<
626 # Option is available to BFD, but LLD <<
627 # always true there. <<
628 prompt "Build big-endian kernel using <<
629 def_bool y <<
630 depends on PPC64 && CPU_BIG_ENDIAN <<
631 depends on CC_HAS_ELFV2 <<
632 help <<
633 This builds the kernel image using t <<
634 V2 ABI Specification", which has a r <<
635 function calls. This internal kernel <<
636 userspace compatibility. <<
637 <<
638 The V2 ABI is standard for 64-bit li <<
639 it is less well tested by kernel and <<
640 build userspace this way, and it can <<
641 1813
642 config RELOCATABLE !! 1814 config CPU_LOONGSON32
643 bool "Build a relocatable kernel" !! 1815 bool
644 depends on PPC64 || (FLATMEM && (44x | !! 1816 select CPU_MIPS32
645 select NONSTATIC_KERNEL !! 1817 select CPU_MIPSR2
646 help !! 1818 select CPU_HAS_PREFETCH
647 This builds a kernel image that is c !! 1819 select CPU_SUPPORTS_32BIT_KERNEL
648 location the kernel is loaded at. Fo !! 1820 select CPU_SUPPORTS_HIGHMEM
649 alignment restrictions, and this fea !! 1821 select CPU_SUPPORTS_CPUFREQ
650 DYNAMIC_MEMSTART and hence overrides <<
651 16k-aligned base address. The kernel <<
652 position-independent executable (PIE <<
653 which are processed early in the boo <<
654 <<
655 One use is for the kexec on panic ca <<
656 must live at a different physical ad <<
657 kernel. <<
658 <<
659 Note: If CONFIG_RELOCATABLE=y, then <<
660 it has been loaded at and the compil <<
661 CONFIG_PHYSICAL_START is ignored. H <<
662 setting can still be useful to bootw <<
663 load address of the kernel (eg. u-bo <<
664 1822
665 config RANDOMIZE_BASE !! 1823 config CPU_BMIPS32_3300
666 bool "Randomize the address of the ker !! 1824 select SMP_UP if SMP
667 depends on PPC_85xx && FLATMEM !! 1825 bool
668 depends on RELOCATABLE <<
669 help <<
670 Randomizes the virtual address at wh <<
671 loaded, as a security feature that d <<
672 relying on knowledge of the location <<
673 1826
674 If unsure, say Y. !! 1827 config CPU_BMIPS4350
>> 1828 bool
>> 1829 select SYS_SUPPORTS_SMP
>> 1830 select SYS_SUPPORTS_HOTPLUG_CPU
675 1831
676 config RELOCATABLE_TEST !! 1832 config CPU_BMIPS4380
677 bool "Test relocatable kernel" !! 1833 bool
678 depends on (PPC64 && RELOCATABLE) !! 1834 select MIPS_L1_CACHE_SHIFT_6
679 help !! 1835 select SYS_SUPPORTS_SMP
680 This runs the relocatable kernel at !! 1836 select SYS_SUPPORTS_HOTPLUG_CPU
681 loaded at, which tends to be non-zer !! 1837 select CPU_HAS_RIXI
682 relocation code. <<
683 1838
684 config ARCH_SUPPORTS_CRASH_DUMP !! 1839 config CPU_BMIPS5000
685 def_bool PPC64 || PPC_BOOK3S_32 || PPC !! 1840 bool
>> 1841 select MIPS_CPU_SCACHE
>> 1842 select MIPS_L1_CACHE_SHIFT_7
>> 1843 select SYS_SUPPORTS_SMP
>> 1844 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1845 select CPU_HAS_RIXI
686 1846
687 config ARCH_SELECTS_CRASH_DUMP !! 1847 config SYS_HAS_CPU_LOONGSON64
688 def_bool y !! 1848 bool
689 depends on CRASH_DUMP !! 1849 select CPU_SUPPORTS_CPUFREQ
690 select RELOCATABLE if PPC64 || 44x || !! 1850 select CPU_HAS_RIXI
691 1851
692 config ARCH_SUPPORTS_CRASH_HOTPLUG !! 1852 config SYS_HAS_CPU_LOONGSON2E
693 def_bool y !! 1853 bool
694 depends on PPC64 <<
695 1854
696 config FA_DUMP !! 1855 config SYS_HAS_CPU_LOONGSON2F
697 bool "Firmware-assisted dump" !! 1856 bool
698 depends on CRASH_DUMP && PPC64 && (PPC !! 1857 select CPU_SUPPORTS_CPUFREQ
699 help !! 1858 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
700 A robust mechanism to get reliable k <<
701 assistance from firmware. This appro <<
702 instead firmware assists in booting <<
703 while preserving memory contents. Fi <<
704 is meant to be a kdump replacement o <<
705 speed not possible without system fi <<
706 <<
707 If unsure, say "y". Only special ker <<
708 need to say "N" here. <<
709 <<
710 config PRESERVE_FA_DUMP <<
711 bool "Preserve Firmware-assisted dump" <<
712 depends on PPC64 && PPC_POWERNV && !FA <<
713 help <<
714 On a kernel with FA_DUMP disabled, t <<
715 crash data from a previously crash'e <<
716 memory preserving kernel boot would <<
717 Petitboot kernel is the typical usec <<
718 <<
719 config OPAL_CORE <<
720 bool "Export OPAL memory as /sys/firmw <<
721 depends on PPC64 && PPC_POWERNV <<
722 help <<
723 This option uses the MPIPL support i <<
724 ELF core of OPAL memory after a cras <<
725 as /sys/firmware/opal/core file whic <<
726 OPAL crashes using GDB. <<
727 1859
728 config IRQ_ALL_CPUS !! 1860 config SYS_HAS_CPU_LOONGSON1B
729 bool "Distribute interrupts on all CPU !! 1861 bool
730 depends on SMP <<
731 help <<
732 This option gives the kernel permiss <<
733 multiple CPUs. Saying N here will r <<
734 CPU. Generally saying Y is safe, al <<
735 reported with SMP Power Macintoshes <<
736 1862
737 config NUMA !! 1863 config SYS_HAS_CPU_LOONGSON1C
738 bool "NUMA Memory Allocation and Sched !! 1864 bool
739 depends on PPC64 && SMP <<
740 default y if PPC_PSERIES || PPC_POWERN <<
741 select USE_PERCPU_NUMA_NODE_ID <<
742 help <<
743 Enable NUMA (Non-Uniform Memory Acce <<
744 <<
745 The kernel will try to allocate memo <<
746 local memory controller of the CPU a <<
747 NUMA awareness to the kernel. <<
748 1865
749 config NODES_SHIFT !! 1866 config SYS_HAS_CPU_MIPS32_R1
750 int !! 1867 bool
751 default "8" if PPC64 <<
752 default "4" <<
753 depends on NUMA <<
754 1868
755 config HAVE_MEMORYLESS_NODES !! 1869 config SYS_HAS_CPU_MIPS32_R2
756 def_bool y !! 1870 bool
757 depends on NUMA <<
758 1871
759 config ARCH_SELECT_MEMORY_MODEL !! 1872 config SYS_HAS_CPU_MIPS32_R3_5
760 def_bool y !! 1873 bool
761 depends on PPC64 <<
762 1874
763 config ARCH_FLATMEM_ENABLE !! 1875 config SYS_HAS_CPU_MIPS32_R5
764 def_bool y !! 1876 bool
765 depends on (PPC64 && !NUMA) || PPC32 <<
766 1877
767 config ARCH_SPARSEMEM_ENABLE !! 1878 config SYS_HAS_CPU_MIPS32_R6
768 def_bool y !! 1879 bool
769 depends on PPC64 <<
770 select SPARSEMEM_VMEMMAP_ENABLE <<
771 1880
772 config ARCH_SPARSEMEM_DEFAULT !! 1881 config SYS_HAS_CPU_MIPS64_R1
773 def_bool y !! 1882 bool
774 depends on PPC_BOOK3S_64 !! 1883
>> 1884 config SYS_HAS_CPU_MIPS64_R2
>> 1885 bool
>> 1886
>> 1887 config SYS_HAS_CPU_MIPS64_R5
>> 1888 bool
>> 1889
>> 1890 config SYS_HAS_CPU_MIPS64_R6
>> 1891 bool
>> 1892
>> 1893 config SYS_HAS_CPU_P5600
>> 1894 bool
>> 1895
>> 1896 config SYS_HAS_CPU_R3000
>> 1897 bool
>> 1898
>> 1899 config SYS_HAS_CPU_R4300
>> 1900 bool
>> 1901
>> 1902 config SYS_HAS_CPU_R4X00
>> 1903 bool
>> 1904
>> 1905 config SYS_HAS_CPU_TX49XX
>> 1906 bool
>> 1907
>> 1908 config SYS_HAS_CPU_R5000
>> 1909 bool
>> 1910
>> 1911 config SYS_HAS_CPU_R5500
>> 1912 bool
>> 1913
>> 1914 config SYS_HAS_CPU_NEVADA
>> 1915 bool
>> 1916
>> 1917 config SYS_HAS_CPU_R10000
>> 1918 bool
>> 1919
>> 1920 config SYS_HAS_CPU_RM7000
>> 1921 bool
>> 1922
>> 1923 config SYS_HAS_CPU_SB1
>> 1924 bool
>> 1925
>> 1926 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1927 bool
>> 1928
>> 1929 config SYS_HAS_CPU_BMIPS
>> 1930 bool
>> 1931
>> 1932 config SYS_HAS_CPU_BMIPS32_3300
>> 1933 bool
>> 1934 select SYS_HAS_CPU_BMIPS
775 1935
776 config ILLEGAL_POINTER_VALUE !! 1936 config SYS_HAS_CPU_BMIPS4350
777 hex !! 1937 bool
778 # This is roughly half way between the !! 1938 select SYS_HAS_CPU_BMIPS
779 # of kernel space, which seems about a !! 1939
780 default 0x5deadbeef0000000 if PPC64 !! 1940 config SYS_HAS_CPU_BMIPS4380
>> 1941 bool
>> 1942 select SYS_HAS_CPU_BMIPS
>> 1943
>> 1944 config SYS_HAS_CPU_BMIPS5000
>> 1945 bool
>> 1946 select SYS_HAS_CPU_BMIPS
>> 1947
>> 1948 #
>> 1949 # CPU may reorder R->R, R->W, W->R, W->W
>> 1950 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 1951 #
>> 1952 config WEAK_ORDERING
>> 1953 bool
>> 1954
>> 1955 #
>> 1956 # CPU may reorder reads and writes beyond LL/SC
>> 1957 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 1958 #
>> 1959 config WEAK_REORDERING_BEYOND_LLSC
>> 1960 bool
>> 1961 endmenu
>> 1962
>> 1963 #
>> 1964 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 1965 #
>> 1966 config CPU_MIPS32
>> 1967 bool
>> 1968 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
>> 1969 CPU_MIPS32_R6 || CPU_P5600
>> 1970
>> 1971 config CPU_MIPS64
>> 1972 bool
>> 1973 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
>> 1974 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
>> 1975
>> 1976 #
>> 1977 # These indicate the revision of the architecture
>> 1978 #
>> 1979 config CPU_MIPSR1
>> 1980 bool
>> 1981 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 1982
>> 1983 config CPU_MIPSR2
>> 1984 bool
>> 1985 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 1986 select CPU_HAS_RIXI
>> 1987 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1988 select MIPS_SPRAM
>> 1989
>> 1990 config CPU_MIPSR5
>> 1991 bool
>> 1992 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
>> 1993 select CPU_HAS_RIXI
>> 1994 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1995 select MIPS_SPRAM
>> 1996
>> 1997 config CPU_MIPSR6
>> 1998 bool
>> 1999 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2000 select CPU_HAS_RIXI
>> 2001 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2002 select HAVE_ARCH_BITREVERSE
>> 2003 select MIPS_ASID_BITS_VARIABLE
>> 2004 select MIPS_CRC_SUPPORT
>> 2005 select MIPS_SPRAM
>> 2006
>> 2007 config TARGET_ISA_REV
>> 2008 int
>> 2009 default 1 if CPU_MIPSR1
>> 2010 default 2 if CPU_MIPSR2
>> 2011 default 5 if CPU_MIPSR5
>> 2012 default 6 if CPU_MIPSR6
781 default 0 2013 default 0
>> 2014 help
>> 2015 Reflects the ISA revision being targeted by the kernel build. This
>> 2016 is effectively the Kconfig equivalent of MIPS_ISA_REV.
782 2017
783 config ARCH_MEMORY_PROBE !! 2018 config EVA
784 def_bool y !! 2019 bool
785 depends on MEMORY_HOTPLUG !! 2020
>> 2021 config XPA
>> 2022 bool
>> 2023
>> 2024 config SYS_SUPPORTS_32BIT_KERNEL
>> 2025 bool
>> 2026 config SYS_SUPPORTS_64BIT_KERNEL
>> 2027 bool
>> 2028 config CPU_SUPPORTS_32BIT_KERNEL
>> 2029 bool
>> 2030 config CPU_SUPPORTS_64BIT_KERNEL
>> 2031 bool
>> 2032 config CPU_SUPPORTS_CPUFREQ
>> 2033 bool
>> 2034 config CPU_SUPPORTS_ADDRWINCFG
>> 2035 bool
>> 2036 config CPU_SUPPORTS_HUGEPAGES
>> 2037 bool
>> 2038 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
>> 2039 config CPU_SUPPORTS_VZ
>> 2040 bool
>> 2041 config MIPS_PGD_C0_CONTEXT
>> 2042 bool
>> 2043 depends on 64BIT
>> 2044 default y if (CPU_MIPSR2 || CPU_MIPSR6)
>> 2045
>> 2046 #
>> 2047 # Set to y for ptrace access to watch registers.
>> 2048 #
>> 2049 config HARDWARE_WATCHPOINTS
>> 2050 bool
>> 2051 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2052
>> 2053 menu "Kernel type"
786 2054
787 choice 2055 choice
788 prompt "Page size" !! 2056 prompt "Kernel code model"
789 default PPC_64K_PAGES if PPC_BOOK3S_64 !! 2057 help
790 default PPC_4K_PAGES !! 2058 You should only select this option if you have a workload that
791 help !! 2059 actually benefits from 64-bit processing or if your machine has
792 Select the kernel logical page size. !! 2060 large memory. You will only be presented a single option in this
793 will reduce software overhead at eac !! 2061 menu if your system does not support both 32-bit and 64-bit kernels.
794 hardware prefetch mechanisms to be m !! 2062
795 larger dma transfers increasing IO e !! 2063 config 32BIT
796 overhead. However the utilization of !! 2064 bool "32-bit kernel"
797 For example, each cached file will u !! 2065 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
798 page size to hold its contents and t !! 2066 select TRAD_SIGNALS
799 end of file and the end of page is w !! 2067 help
800 !! 2068 Select this option if you want to build a 32-bit kernel.
801 Some dedicated systems, such as soft !! 2069
802 accelerated calculations, have shown !! 2070 config 64BIT
803 !! 2071 bool "64-bit kernel"
804 If you configure a 64 bit kernel for !! 2072 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
805 processor does not support them, the !! 2073 help
806 them with 4k pages, loading them on !! 2074 Select this option if you want to build a 64-bit kernel.
807 reduced software overhead and larger <<
808 For the 32 bit kernel, a large page <<
809 unless it is supported by the config <<
810 <<
811 If unsure, choose 4K_PAGES. <<
812 <<
813 config PPC_4K_PAGES <<
814 bool "4k page size" <<
815 select HAVE_ARCH_SOFT_DIRTY if PPC_BOO <<
816 select HAVE_PAGE_SIZE_4KB <<
817 <<
818 config PPC_16K_PAGES <<
819 bool "16k page size" <<
820 depends on 44x || PPC_8xx <<
821 select HAVE_PAGE_SIZE_16KB <<
822 <<
823 config PPC_64K_PAGES <<
824 bool "64k page size" <<
825 depends on 44x || PPC_BOOK3S_64 <<
826 select HAVE_ARCH_SOFT_DIRTY if PPC_BOO <<
827 select HAVE_PAGE_SIZE_64KB <<
828 <<
829 config PPC_256K_PAGES <<
830 bool "256k page size (Requires non-sta <<
831 depends on 44x && !PPC_47x <<
832 select HAVE_PAGE_SIZE_256KB <<
833 help <<
834 Make the page size 256k. <<
835 <<
836 The kernel will only be able to run <<
837 compiled with '-zmax-page-size' set <<
838 binutils later than 2.17.50.0.3, or <<
839 definition from 0x10000 to 0x40000 i <<
840 2075
841 endchoice 2076 endchoice
842 2077
843 config THREAD_SHIFT !! 2078 config MIPS_VA_BITS_48
844 int "Thread shift" if EXPERT !! 2079 bool "48 bits virtual memory"
845 range 13 15 !! 2080 depends on 64BIT
846 default "15" if PPC_256K_PAGES !! 2081 help
847 default "15" if PPC_PSERIES || PPC_POW !! 2082 Support a maximum at least 48 bits of application virtual
848 default "14" if PPC64 !! 2083 memory. Default is 40 bits or less, depending on the CPU.
849 default "13" !! 2084 For page sizes 16k and above, this option results in a small
850 help !! 2085 memory overhead for page tables. For 4k page size, a fourth
851 Used to define the stack size. The d !! 2086 level of page tables is added which imposes both a memory
852 want. Only change this if you know w !! 2087 overhead as well as slower TLB fault handling.
853 !! 2088
854 config DATA_SHIFT_BOOL !! 2089 If unsure, say N.
855 bool "Set custom data alignment" !! 2090
856 depends on ADVANCED_OPTIONS !! 2091 config ZBOOT_LOAD_ADDRESS
857 depends on STRICT_KERNEL_RWX || DEBUG_ !! 2092 hex "Compressed kernel load address"
858 depends on (PPC_8xx && !PIN_TLB_DATA & !! 2093 default 0xffffffff80400000 if BCM47XX
859 PPC_BOOK3S_32 || PPC_85xx !! 2094 default 0x0
860 help !! 2095 depends on SYS_SUPPORTS_ZBOOT
861 This option allows you to set the ke !! 2096 help
862 RAM is mapped by blocks, the alignme !! 2097 The address to load compressed kernel, aka vmlinuz.
863 number of possible blocks. The defau !! 2098
864 !! 2099 This is only used if non-zero.
865 Say N here unless you know what you <<
866 <<
867 config DATA_SHIFT <<
868 int "Data shift" if DATA_SHIFT_BOOL <<
869 default 24 if STRICT_KERNEL_RWX && PPC <<
870 range 17 28 if (STRICT_KERNEL_RWX || D <<
871 range 19 23 if (STRICT_KERNEL_RWX || D <<
872 range 20 24 if (STRICT_KERNEL_RWX || D <<
873 default 22 if STRICT_KERNEL_RWX && PPC <<
874 default 18 if (DEBUG_PAGEALLOC || KFEN <<
875 default 23 if (STRICT_KERNEL_RWX || DE <<
876 (PIN_TLB_DATA || PIN_TLB <<
877 default 19 if (STRICT_KERNEL_RWX || DE <<
878 default 24 if STRICT_KERNEL_RWX && PPC <<
879 default PAGE_SHIFT <<
880 help <<
881 On Book3S 32 (603+), DBATs are used <<
882 Smaller is the alignment, greater is <<
883 <<
884 On 8xx, large pages (512kb or 8M) ar <<
885 memory. Aligning to 8M reduces TLB m <<
886 in that case. If PIN_TLB is selected <<
887 8M pages will be pinned. <<
888 2100
889 config ARCH_FORCE_MAX_ORDER 2101 config ARCH_FORCE_MAX_ORDER
890 int "Order of maximal physically conti !! 2102 int "Maximum zone order"
891 range 7 8 if PPC64 && PPC_64K_PAGES !! 2103 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
892 default "8" if PPC64 && PPC_64K_PAGES !! 2104 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
893 range 12 12 if PPC64 && !PPC_64K_PAGES !! 2105 default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
894 default "12" if PPC64 && !PPC_64K_PAGE <<
895 range 8 10 if PPC32 && PPC_16K_PAGES <<
896 default "8" if PPC32 && PPC_16K_PAGES <<
897 range 6 10 if PPC32 && PPC_64K_PAGES <<
898 default "6" if PPC32 && PPC_64K_PAGES <<
899 range 4 10 if PPC32 && PPC_256K_PAGES <<
900 default "4" if PPC32 && PPC_256K_PAGES <<
901 range 10 12 <<
902 default "10" 2106 default "10"
903 help 2107 help
904 The kernel page allocator limits the !! 2108 The kernel memory allocator divides physically contiguous memory
905 contiguous allocations. The limit is !! 2109 blocks into "zones", where each zone is a power of two number of
906 defines the maximal power of two of !! 2110 pages. This option selects the largest power of two that the kernel
907 allocated as a single contiguous blo !! 2111 keeps in the memory allocator. If you need to allocate very large
908 overriding the default setting when !! 2112 blocks of physically contiguous memory, then you may need to
909 large blocks of physically contiguou !! 2113 increase this value.
910 <<
911 The page size is not necessarily 4KB <<
912 systems, 64KB pages can be enabled v <<
913 this in mind when choosing a value f <<
914 2114
915 Don't change if unsure. !! 2115 The page size is not necessarily 4KB. Keep this in mind
>> 2116 when choosing a value for this option.
916 2117
917 config PPC_SUBPAGE_PROT !! 2118 config BOARD_SCACHE
918 bool "Support setting protections for !! 2119 bool
919 default n !! 2120
920 depends on PPC_64S_HASH_MMU && PPC_64K !! 2121 config IP22_CPU_SCACHE
>> 2122 bool
>> 2123 select BOARD_SCACHE
>> 2124
>> 2125 #
>> 2126 # Support for a MIPS32 / MIPS64 style S-caches
>> 2127 #
>> 2128 config MIPS_CPU_SCACHE
>> 2129 bool
>> 2130 select BOARD_SCACHE
>> 2131
>> 2132 config R5000_CPU_SCACHE
>> 2133 bool
>> 2134 select BOARD_SCACHE
>> 2135
>> 2136 config RM7000_CPU_SCACHE
>> 2137 bool
>> 2138 select BOARD_SCACHE
>> 2139
>> 2140 config SIBYTE_DMA_PAGEOPS
>> 2141 bool "Use DMA to clear/copy pages"
>> 2142 depends on CPU_SB1
921 help 2143 help
922 This option adds support for system !! 2144 Instead of using the CPU to zero and copy pages, use a Data Mover
923 to set access permissions (read/writ !! 2145 channel. These DMA channels are otherwise unused by the standard
924 on the 4k subpages of each 64k page. !! 2146 SiByte Linux port. Seems to give a small performance benefit.
925 2147
926 If unsure, say N here. !! 2148 config CPU_HAS_PREFETCH
>> 2149 bool
>> 2150
>> 2151 config CPU_GENERIC_DUMP_TLB
>> 2152 bool
>> 2153 default y if !CPU_R3000
927 2154
928 config PPC_PROT_SAO_LPAR !! 2155 config MIPS_FP_SUPPORT
929 bool "Support PROT_SAO mappings in LPA !! 2156 bool "Floating Point support" if EXPERT
930 depends on PPC_BOOK3S_64 !! 2157 default y
931 help 2158 help
932 This option adds support for PROT_SA !! 2159 Select y to include support for floating point in the kernel
933 inside LPARs on supported CPUs. !! 2160 including initialization of FPU hardware, FP context save & restore
>> 2161 and emulation of an FPU where necessary. Without this support any
>> 2162 userland program attempting to use floating point instructions will
>> 2163 receive a SIGILL.
934 2164
935 This may cause issues when performin !! 2165 If you know that your userland will not attempt to use floating point
936 a CPU that supports SAO to one that !! 2166 instructions then you can say n here to shrink the kernel a little.
937 2167
938 If unsure, say N here. !! 2168 If unsure, say y.
939 2169
940 config PPC_COPRO_BASE !! 2170 config CPU_R2300_FPU
>> 2171 bool
>> 2172 depends on MIPS_FP_SUPPORT
>> 2173 default y if CPU_R3000
>> 2174
>> 2175 config CPU_R3K_TLB
>> 2176 bool
>> 2177
>> 2178 config CPU_R4K_FPU
>> 2179 bool
>> 2180 depends on MIPS_FP_SUPPORT
>> 2181 default y if !CPU_R2300_FPU
>> 2182
>> 2183 config CPU_R4K_CACHE_TLB
>> 2184 bool
>> 2185 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
>> 2186
>> 2187 config MIPS_MT_SMP
>> 2188 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2189 default y
>> 2190 depends on TARGET_ISA_REV > 0 && TARGET_ISA_REV < 6
>> 2191 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MICROMIPS
>> 2192 select CPU_MIPSR2_IRQ_VI
>> 2193 select CPU_MIPSR2_IRQ_EI
>> 2194 select SYNC_R4K
>> 2195 select MIPS_MT
>> 2196 select SMP
>> 2197 select SMP_UP
>> 2198 select SYS_SUPPORTS_SMP
>> 2199 select SYS_SUPPORTS_SCHED_SMT
>> 2200 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2201 help
>> 2202 This is a kernel model which is known as SMVP. This is supported
>> 2203 on cores with the MT ASE and uses the available VPEs to implement
>> 2204 virtual processors which supports SMP. This is equivalent to the
>> 2205 Intel Hyperthreading feature. For further information go to
>> 2206 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2207
>> 2208 config MIPS_MT
941 bool 2209 bool
942 2210
943 config SCHED_SMT 2211 config SCHED_SMT
944 bool "SMT (Hyperthreading) scheduler s !! 2212 bool "SMT (multithreading) scheduler support"
945 depends on PPC64 && SMP !! 2213 depends on SYS_SUPPORTS_SCHED_SMT
>> 2214 default n
946 help 2215 help
947 SMT scheduler support improves the C 2216 SMT scheduler support improves the CPU scheduler's decision making
948 when dealing with POWER5 cpus at a c !! 2217 when dealing with MIPS MT enabled cores at a cost of slightly
949 overhead in some places. If unsure s !! 2218 increased overhead in some places. If unsure say N here.
950 2219
951 config PPC_DENORMALISATION !! 2220 config SYS_SUPPORTS_SCHED_SMT
952 bool "PowerPC denormalisation exceptio !! 2221 bool
953 depends on PPC_BOOK3S_64 <<
954 default "y" if PPC_POWERNV <<
955 help <<
956 Add support for handling denormalisa <<
957 values. Useful for bare metal only. <<
958 <<
959 config CMDLINE <<
960 string "Initial kernel command string" <<
961 default "" <<
962 help <<
963 On some platforms, there is currentl <<
964 pass arguments to the kernel. For th <<
965 some command-line options at build t <<
966 most cases you will need to specify <<
967 2222
968 choice !! 2223 config SYS_SUPPORTS_MULTITHREADING
969 prompt "Kernel command line type" !! 2224 bool
970 depends on CMDLINE != "" <<
971 default CMDLINE_FROM_BOOTLOADER <<
972 2225
973 config CMDLINE_FROM_BOOTLOADER !! 2226 config MIPS_MT_FPAFF
974 bool "Use bootloader kernel arguments !! 2227 bool "Dynamic FPU affinity for FP-intensive threads"
975 help !! 2228 default y
976 Uses the command-line options passed !! 2229 depends on MIPS_MT_SMP
977 the boot loader doesn't provide any, <<
978 string provided in CMDLINE will be u <<
979 2230
980 config CMDLINE_EXTEND !! 2231 config MIPSR2_TO_R6_EMULATOR
981 bool "Extend bootloader kernel argumen !! 2232 bool "MIPS R2-to-R6 emulator"
>> 2233 depends on CPU_MIPSR6
>> 2234 depends on MIPS_FP_SUPPORT
>> 2235 default y
982 help 2236 help
983 The command-line arguments provided !! 2237 Choose this option if you want to run non-R6 MIPS userland code.
984 appended to the default kernel comma !! 2238 Even if you say 'Y' here, the emulator will still be disabled by
>> 2239 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2240 The only reason this is a build-time option is to save ~14K from the
>> 2241 final kernel image.
985 2242
986 config CMDLINE_FORCE !! 2243 config SYS_SUPPORTS_VPE_LOADER
987 bool "Always use the default kernel co !! 2244 bool
>> 2245 depends on SYS_SUPPORTS_MULTITHREADING
988 help 2246 help
989 Always use the default kernel comman !! 2247 Indicates that the platform supports the VPE loader, and provides
990 loader passes other arguments to the !! 2248 physical_memsize.
991 This is useful if you cannot or don' <<
992 command-line options your boot loade <<
993 2249
994 endchoice !! 2250 config MIPS_VPE_LOADER
995 !! 2251 bool "VPE loader support."
996 config EXTRA_TARGETS !! 2252 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
997 string "Additional default image types !! 2253 select CPU_MIPSR2_IRQ_VI
>> 2254 select CPU_MIPSR2_IRQ_EI
>> 2255 select MIPS_MT
998 help 2256 help
999 List additional targets to be built !! 2257 Includes a loader for loading an elf relocatable object
1000 by spaces). This is useful for tar !! 2258 onto another VPE and running it.
1001 files in the .dts directory. <<
1002 2259
1003 Targets in this list will be build !! 2260 config MIPS_VPE_LOADER_MT
1004 target, or when the user does a 'ma !! 2261 bool
1005 'make zImage.initrd'. !! 2262 default "y"
>> 2263 depends on MIPS_VPE_LOADER
1006 2264
1007 If unsure, leave blank !! 2265 config MIPS_VPE_LOADER_TOM
>> 2266 bool "Load VPE program into memory hidden from linux"
>> 2267 depends on MIPS_VPE_LOADER
>> 2268 default y
>> 2269 help
>> 2270 The loader can use memory that is present but has been hidden from
>> 2271 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2272 you to ensure the amount you put in the option and the space your
>> 2273 program requires is less or equal to the amount physically present.
1008 2274
1009 config ARCH_WANTS_FREEZER_CONTROL !! 2275 config MIPS_VPE_APSP_API
1010 def_bool y !! 2276 bool "Enable support for AP/SP API (RTLX)"
1011 depends on ADB_PMU !! 2277 depends on MIPS_VPE_LOADER
1012 2278
1013 source "kernel/power/Kconfig" !! 2279 config MIPS_VPE_APSP_API_MT
>> 2280 bool
>> 2281 default "y"
>> 2282 depends on MIPS_VPE_APSP_API
1014 2283
1015 config PPC_MEM_KEYS !! 2284 config MIPS_CPS
1016 prompt "PowerPC Memory Protection Key !! 2285 bool "MIPS Coherent Processing System support"
1017 def_bool y !! 2286 depends on SYS_SUPPORTS_MIPS_CPS
1018 depends on PPC_BOOK3S_64 !! 2287 select MIPS_CM
1019 depends on PPC_64S_HASH_MMU !! 2288 select MIPS_CPS_PM if HOTPLUG_CPU
1020 select ARCH_USES_HIGH_VMA_FLAGS !! 2289 select SMP
1021 select ARCH_HAS_PKEYS !! 2290 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
1022 help !! 2291 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
1023 Memory Protection Keys provides a m !! 2292 select SYS_SUPPORTS_HOTPLUG_CPU
1024 page-based protections, but without !! 2293 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
1025 page tables when an application cha !! 2294 select SYS_SUPPORTS_SMP
>> 2295 select WEAK_ORDERING
>> 2296 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
>> 2297 help
>> 2298 Select this if you wish to run an SMP kernel across multiple cores
>> 2299 within a MIPS Coherent Processing System. When this option is
>> 2300 enabled the kernel will probe for other cores and boot them with
>> 2301 no external assistance. It is safe to enable this when hardware
>> 2302 support is unavailable.
1026 2303
1027 For details, see Documentation/core !! 2304 config MIPS_CPS_PM
>> 2305 depends on MIPS_CPS
>> 2306 bool
1028 2307
1029 If unsure, say y. !! 2308 config MIPS_CM
>> 2309 bool
>> 2310 select MIPS_CPC
1030 2311
1031 config ARCH_PKEY_BITS !! 2312 config MIPS_CPC
1032 int !! 2313 bool
1033 default 5 <<
1034 2314
1035 config PPC_SECURE_BOOT !! 2315 config SB1_PASS_2_WORKAROUNDS
1036 prompt "Enable secure boot support" <<
1037 bool 2316 bool
1038 depends on PPC_POWERNV || PPC_PSERIES !! 2317 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
1039 depends on IMA_ARCH_POLICY !! 2318 default y
1040 imply IMA_SECURE_AND_OR_TRUSTED_BOOT <<
1041 select PSERIES_PLPKS if PPC_PSERIES <<
1042 help <<
1043 Systems with firmware secure boot e <<
1044 policies to extend secure boot to t <<
1045 to enable OS secure boot on systems <<
1046 it. If in doubt say N. <<
1047 2319
1048 config PPC_SECVAR_SYSFS !! 2320 config SB1_PASS_2_1_WORKAROUNDS
1049 bool "Enable sysfs interface for POWE !! 2321 bool
>> 2322 depends on CPU_SB1 && CPU_SB1_PASS_2
1050 default y 2323 default y
1051 depends on PPC_SECURE_BOOT !! 2324
1052 depends on SYSFS !! 2325 choice
>> 2326 prompt "SmartMIPS or microMIPS ASE support"
>> 2327
>> 2328 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2329 bool "None"
1053 help 2330 help
1054 POWER secure variables are managed !! 2331 Select this if you want neither microMIPS nor SmartMIPS support
1055 These variables are exposed to user <<
1056 read/write operations on these vari <<
1057 secure boot enabled and want to exp <<
1058 2332
1059 endmenu !! 2333 config CPU_HAS_SMARTMIPS
>> 2334 depends on SYS_SUPPORTS_SMARTMIPS
>> 2335 bool "SmartMIPS"
>> 2336 help
>> 2337 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2338 increased security at both hardware and software level for
>> 2339 smartcards. Enabling this option will allow proper use of the
>> 2340 SmartMIPS instructions by Linux applications. However a kernel with
>> 2341 this option will not work on a MIPS core without SmartMIPS core. If
>> 2342 you don't know you probably don't have SmartMIPS and should say N
>> 2343 here.
>> 2344
>> 2345 config CPU_MICROMIPS
>> 2346 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2347 bool "microMIPS"
>> 2348 help
>> 2349 When this option is enabled the kernel will be built using the
>> 2350 microMIPS ISA
1060 2351
1061 config ISA_DMA_API !! 2352 endchoice
>> 2353
>> 2354 config CPU_HAS_MSA
>> 2355 bool "Support for the MIPS SIMD Architecture"
>> 2356 depends on CPU_SUPPORTS_MSA
>> 2357 depends on MIPS_FP_SUPPORT
>> 2358 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2359 help
>> 2360 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2361 and a set of SIMD instructions to operate on them. When this option
>> 2362 is enabled the kernel will support allocating & switching MSA
>> 2363 vector register contexts. If you know that your kernel will only be
>> 2364 running on CPUs which do not support MSA or that your userland will
>> 2365 not be making use of it then you may wish to say N here to reduce
>> 2366 the size & complexity of your kernel.
>> 2367
>> 2368 If unsure, say Y.
>> 2369
>> 2370 config CPU_HAS_WB
1062 bool 2371 bool
1063 default PCI <<
1064 2372
1065 menu "Bus options" !! 2373 config XKS01
>> 2374 bool
1066 2375
1067 config ISA !! 2376 config CPU_HAS_DIEI
1068 bool "Support for ISA-bus hardware" !! 2377 depends on !CPU_DIEI_BROKEN
1069 depends on PPC_CHRP !! 2378 bool
1070 select PPC_I8259 <<
1071 help <<
1072 Find out whether you have ISA slots <<
1073 name of a bus system, i.e. the way <<
1074 inside your box. If you have an Ap <<
1075 have an IBM RS/6000 or pSeries mach <<
1076 embedded board, consult your board <<
1077 2379
1078 config GENERIC_ISA_DMA !! 2380 config CPU_DIEI_BROKEN
1079 bool 2381 bool
1080 depends on ISA_DMA_API <<
1081 default y <<
1082 2382
1083 config PPC_INDIRECT_PCI !! 2383 config CPU_HAS_RIXI
1084 bool 2384 bool
1085 depends on PCI <<
1086 default y if 44x <<
1087 2385
1088 config SBUS !! 2386 config CPU_NO_LOAD_STORE_LR
1089 bool 2387 bool
>> 2388 help
>> 2389 CPU lacks support for unaligned load and store instructions:
>> 2390 LWL, LWR, SWL, SWR (Load/store word left/right).
>> 2391 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
>> 2392 systems).
1090 2393
1091 config FSL_SOC !! 2394 #
>> 2395 # Vectored interrupt mode is an R2 feature
>> 2396 #
>> 2397 config CPU_MIPSR2_IRQ_VI
1092 bool 2398 bool
1093 2399
1094 config FSL_PCI !! 2400 #
>> 2401 # Extended interrupt mode is an R2 feature
>> 2402 #
>> 2403 config CPU_MIPSR2_IRQ_EI
1095 bool 2404 bool
1096 select ARCH_HAS_DMA_SET_MASK <<
1097 select PPC_INDIRECT_PCI <<
1098 select PCI_QUIRKS <<
1099 2405
1100 config FSL_PMC !! 2406 config CPU_HAS_SYNC
1101 bool 2407 bool
>> 2408 depends on !CPU_R3000
1102 default y 2409 default y
1103 depends on SUSPEND && (PPC_85xx || PP !! 2410
>> 2411 #
>> 2412 # CPU non-features
>> 2413 #
>> 2414
>> 2415 # Work around the "daddi" and "daddiu" CPU errata:
>> 2416 #
>> 2417 # - The `daddi' instruction fails to trap on overflow.
>> 2418 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2419 # erratum #23
>> 2420 #
>> 2421 # - The `daddiu' instruction can produce an incorrect result.
>> 2422 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2423 # erratum #41
>> 2424 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
>> 2425 # #15
>> 2426 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
>> 2427 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
>> 2428 config CPU_DADDI_WORKAROUNDS
>> 2429 bool
>> 2430
>> 2431 # Work around certain R4000 CPU errata (as implemented by GCC):
>> 2432 #
>> 2433 # - A double-word or a variable shift may give an incorrect result
>> 2434 # if executed immediately after starting an integer division:
>> 2435 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2436 # erratum #28
>> 2437 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
>> 2438 # #19
>> 2439 #
>> 2440 # - A double-word or a variable shift may give an incorrect result
>> 2441 # if executed while an integer multiplication is in progress:
>> 2442 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2443 # errata #16 & #28
>> 2444 #
>> 2445 # - An integer division may give an incorrect result if started in
>> 2446 # a delay slot of a taken branch or a jump:
>> 2447 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2448 # erratum #52
>> 2449 config CPU_R4000_WORKAROUNDS
>> 2450 bool
>> 2451 select CPU_R4400_WORKAROUNDS
>> 2452
>> 2453 # Work around certain R4400 CPU errata (as implemented by GCC):
>> 2454 #
>> 2455 # - A double-word or a variable shift may give an incorrect result
>> 2456 # if executed immediately after starting an integer division:
>> 2457 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
>> 2458 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
>> 2459 config CPU_R4400_WORKAROUNDS
>> 2460 bool
>> 2461
>> 2462 config CPU_R4X00_BUGS64
>> 2463 bool
>> 2464 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
>> 2465
>> 2466 config MIPS_ASID_SHIFT
>> 2467 int
>> 2468 default 6 if CPU_R3000
>> 2469 default 0
>> 2470
>> 2471 config MIPS_ASID_BITS
>> 2472 int
>> 2473 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2474 default 6 if CPU_R3000
>> 2475 default 8
>> 2476
>> 2477 config MIPS_ASID_BITS_VARIABLE
>> 2478 bool
>> 2479
>> 2480 config MIPS_CRC_SUPPORT
>> 2481 bool
>> 2482
>> 2483 # R4600 erratum. Due to the lack of errata information the exact
>> 2484 # technical details aren't known. I've experimentally found that disabling
>> 2485 # interrupts during indexed I-cache flushes seems to be sufficient to deal
>> 2486 # with the issue.
>> 2487 config WAR_R4600_V1_INDEX_ICACHEOP
>> 2488 bool
>> 2489
>> 2490 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
>> 2491 #
>> 2492 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
>> 2493 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
>> 2494 # executed if there is no other dcache activity. If the dcache is
>> 2495 # accessed for another instruction immediately preceding when these
>> 2496 # cache instructions are executing, it is possible that the dcache
>> 2497 # tag match outputs used by these cache instructions will be
>> 2498 # incorrect. These cache instructions should be preceded by at least
>> 2499 # four instructions that are not any kind of load or store
>> 2500 # instruction.
>> 2501 #
>> 2502 # This is not allowed: lw
>> 2503 # nop
>> 2504 # nop
>> 2505 # nop
>> 2506 # cache Hit_Writeback_Invalidate_D
>> 2507 #
>> 2508 # This is allowed: lw
>> 2509 # nop
>> 2510 # nop
>> 2511 # nop
>> 2512 # nop
>> 2513 # cache Hit_Writeback_Invalidate_D
>> 2514 config WAR_R4600_V1_HIT_CACHEOP
>> 2515 bool
>> 2516
>> 2517 # Writeback and invalidate the primary cache dcache before DMA.
>> 2518 #
>> 2519 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
>> 2520 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
>> 2521 # operate correctly if the internal data cache refill buffer is empty. These
>> 2522 # CACHE instructions should be separated from any potential data cache miss
>> 2523 # by a load instruction to an uncached address to empty the response buffer."
>> 2524 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
>> 2525 # in .pdf format.)
>> 2526 config WAR_R4600_V2_HIT_CACHEOP
>> 2527 bool
>> 2528
>> 2529 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
>> 2530 # the line which this instruction itself exists, the following
>> 2531 # operation is not guaranteed."
>> 2532 #
>> 2533 # Workaround: do two phase flushing for Index_Invalidate_I
>> 2534 config WAR_TX49XX_ICACHE_INDEX_INV
>> 2535 bool
>> 2536
>> 2537 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
>> 2538 # opposes it being called that) where invalid instructions in the same
>> 2539 # I-cache line worth of instructions being fetched may case spurious
>> 2540 # exceptions.
>> 2541 config WAR_ICACHE_REFILLS
>> 2542 bool
>> 2543
>> 2544 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
>> 2545 # may cause ll / sc and lld / scd sequences to execute non-atomically.
>> 2546 config WAR_R10000_LLSC
>> 2547 bool
>> 2548
>> 2549 # 34K core erratum: "Problems Executing the TLBR Instruction"
>> 2550 config WAR_MIPS34K_MISSED_ITLB
>> 2551 bool
>> 2552
>> 2553 #
>> 2554 # - Highmem only makes sense for the 32-bit kernel.
>> 2555 # - The current highmem code will only work properly on physically indexed
>> 2556 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2557 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2558 # moment we protect the user and offer the highmem option only on machines
>> 2559 # where it's known to be safe. This will not offer highmem on a few systems
>> 2560 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2561 # indexed CPUs but we're playing safe.
>> 2562 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2563 # know they might have memory configurations that could make use of highmem
>> 2564 # support.
>> 2565 #
>> 2566 config HIGHMEM
>> 2567 bool "High Memory Support"
>> 2568 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2569 select KMAP_LOCAL
>> 2570
>> 2571 config CPU_SUPPORTS_HIGHMEM
>> 2572 bool
>> 2573
>> 2574 config SYS_SUPPORTS_HIGHMEM
>> 2575 bool
>> 2576
>> 2577 config SYS_SUPPORTS_SMARTMIPS
>> 2578 bool
>> 2579
>> 2580 config SYS_SUPPORTS_MICROMIPS
>> 2581 bool
>> 2582
>> 2583 config SYS_SUPPORTS_MIPS16
>> 2584 bool
1104 help 2585 help
1105 Freescale MPC85xx/MPC86xx power man !! 2586 This option must be set if a kernel might be executed on a MIPS16-
1106 (suspend/resume). For MPC83xx see p !! 2587 enabled CPU even if MIPS16 is not actually being used. In other
>> 2588 words, it makes the kernel MIPS16-tolerant.
>> 2589
>> 2590 config CPU_SUPPORTS_MSA
>> 2591 bool
>> 2592
>> 2593 config ARCH_FLATMEM_ENABLE
>> 2594 def_bool y
>> 2595 depends on !NUMA && !CPU_LOONGSON2EF
>> 2596
>> 2597 config ARCH_SPARSEMEM_ENABLE
>> 2598 bool
>> 2599
>> 2600 config NUMA
>> 2601 bool "NUMA Support"
>> 2602 depends on SYS_SUPPORTS_NUMA
>> 2603 select SMP
>> 2604 select HAVE_SETUP_PER_CPU_AREA
>> 2605 select NEED_PER_CPU_EMBED_FIRST_CHUNK
>> 2606 help
>> 2607 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2608 Access). This option improves performance on systems with more
>> 2609 than two nodes; on two node systems it is generally better to
>> 2610 leave it disabled; on single node systems leave this option
>> 2611 disabled.
>> 2612
>> 2613 config SYS_SUPPORTS_NUMA
>> 2614 bool
1107 2615
1108 config PPC4xx_CPM !! 2616 config HAVE_ARCH_NODEDATA_EXTENSION
1109 bool 2617 bool
>> 2618
>> 2619 config RELOCATABLE
>> 2620 bool "Relocatable kernel"
>> 2621 depends on SYS_SUPPORTS_RELOCATABLE
>> 2622 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
>> 2623 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
>> 2624 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
>> 2625 CPU_P5600 || CAVIUM_OCTEON_SOC || \
>> 2626 CPU_LOONGSON64
>> 2627 help
>> 2628 This builds a kernel image that retains relocation information
>> 2629 so it can be loaded someplace besides the default 1MB.
>> 2630 The relocations make the kernel binary about 15% larger,
>> 2631 but are discarded at runtime
>> 2632
>> 2633 config RELOCATION_TABLE_SIZE
>> 2634 hex "Relocation table size"
>> 2635 depends on RELOCATABLE
>> 2636 range 0x0 0x01000000
>> 2637 default "0x00200000" if CPU_LOONGSON64
>> 2638 default "0x00100000"
>> 2639 help
>> 2640 A table of relocation data will be appended to the kernel binary
>> 2641 and parsed at boot to fix up the relocated kernel.
>> 2642
>> 2643 This option allows the amount of space reserved for the table to be
>> 2644 adjusted, although the default of 1Mb should be ok in most cases.
>> 2645
>> 2646 The build will fail and a valid size suggested if this is too small.
>> 2647
>> 2648 If unsure, leave at the default value.
>> 2649
>> 2650 config RANDOMIZE_BASE
>> 2651 bool "Randomize the address of the kernel image"
>> 2652 depends on RELOCATABLE
>> 2653 help
>> 2654 Randomizes the physical and virtual address at which the
>> 2655 kernel image is loaded, as a security feature that
>> 2656 deters exploit attempts relying on knowledge of the location
>> 2657 of kernel internals.
>> 2658
>> 2659 Entropy is generated using any coprocessor 0 registers available.
>> 2660
>> 2661 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2662
>> 2663 If unsure, say N.
>> 2664
>> 2665 config RANDOMIZE_BASE_MAX_OFFSET
>> 2666 hex "Maximum kASLR offset" if EXPERT
>> 2667 depends on RANDOMIZE_BASE
>> 2668 range 0x0 0x40000000 if EVA || 64BIT
>> 2669 range 0x0 0x08000000
>> 2670 default "0x01000000"
>> 2671 help
>> 2672 When kASLR is active, this provides the maximum offset that will
>> 2673 be applied to the kernel image. It should be set according to the
>> 2674 amount of physical RAM available in the target system minus
>> 2675 PHYSICAL_START and must be a power of 2.
>> 2676
>> 2677 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2678 EVA or 64-bit. The default is 16Mb.
>> 2679
>> 2680 config NODES_SHIFT
>> 2681 int
>> 2682 default "6"
>> 2683 depends on NUMA
>> 2684
>> 2685 config HW_PERF_EVENTS
>> 2686 bool "Enable hardware performance counter support for perf events"
>> 2687 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
1110 default y 2688 default y
1111 depends on SUSPEND && 44x <<
1112 help 2689 help
1113 PPC4xx Clock Power Management (CPM) !! 2690 Enable hardware performance counter support for perf events. If
1114 It also enables support for two dif !! 2691 disabled, perf events will use software events only.
1115 and idle-doze). <<
1116 2692
1117 config FSL_LBC !! 2693 config DMI
1118 bool "Freescale Local Bus support" !! 2694 bool "Enable DMI scanning"
>> 2695 depends on MACH_LOONGSON64
>> 2696 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
>> 2697 default y
1119 help 2698 help
1120 Enables reporting of errors from th !! 2699 Enabled scanning of DMI to identify machine quirks. Say Y
1121 controller. Also contains some com !! 2700 here unless you have verified that your setup is not
1122 drivers for specific local bus peri !! 2701 affected by entries in the DMI blacklist. Required by PNP
>> 2702 BIOS code.
1123 2703
1124 config FSL_GTM !! 2704 config SMP
1125 bool !! 2705 bool "Multi-Processing support"
1126 depends on PPC_83xx || QUICC_ENGINE | !! 2706 depends on SYS_SUPPORTS_SMP
1127 help 2707 help
1128 Freescale General-purpose Timers su !! 2708 This enables support for systems with more than one CPU. If you have
>> 2709 a system with only one CPU, say N. If you have a system with more
>> 2710 than one CPU, say Y.
>> 2711
>> 2712 If you say N here, the kernel will run on uni- and multiprocessor
>> 2713 machines, but will use only one CPU of a multiprocessor machine. If
>> 2714 you say Y here, the kernel will run on many, but not all,
>> 2715 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2716 will run faster if you say N here.
>> 2717
>> 2718 People using multiprocessor machines who say Y here should also say
>> 2719 Y to "Enhanced Real Time Clock Support", below.
>> 2720
>> 2721 See also the SMP-HOWTO available at
>> 2722 <https://www.tldp.org/docs.html#howto>.
>> 2723
>> 2724 If you don't know what to do here, say N.
1129 2725
1130 config FSL_RIO !! 2726 config HOTPLUG_CPU
1131 bool "Freescale Embedded SRIO Control !! 2727 bool "Support for hot-pluggable CPUs"
1132 depends on RAPIDIO = y && HAVE_RAPIDI !! 2728 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
1133 default "n" <<
1134 help 2729 help
1135 Include support for RapidIO control !! 2730 Say Y here to allow turning CPUs off and on. CPUs can be
1136 processors (MPC8548, MPC8641, etc). !! 2731 controlled through /sys/devices/system/cpu.
>> 2732 (Note: power management support will enable this option
>> 2733 automatically on SMP systems. )
>> 2734 Say N if you want to disable CPU hotplug.
1137 2735
1138 endmenu !! 2736 config SMP_UP
>> 2737 bool
1139 2738
1140 config NONSTATIC_KERNEL !! 2739 config SYS_SUPPORTS_MIPS_CPS
1141 bool 2740 bool
1142 2741
1143 menu "Advanced setup" !! 2742 config SYS_SUPPORTS_SMP
1144 depends on PPC32 !! 2743 bool
1145 2744
1146 config ADVANCED_OPTIONS !! 2745 config NR_CPUS_DEFAULT_4
1147 bool "Prompt for advanced kernel conf !! 2746 bool
>> 2747
>> 2748 config NR_CPUS_DEFAULT_8
>> 2749 bool
>> 2750
>> 2751 config NR_CPUS_DEFAULT_16
>> 2752 bool
>> 2753
>> 2754 config NR_CPUS_DEFAULT_32
>> 2755 bool
>> 2756
>> 2757 config NR_CPUS_DEFAULT_64
>> 2758 bool
>> 2759
>> 2760 config NR_CPUS
>> 2761 int "Maximum number of CPUs (2-256)"
>> 2762 range 2 256
>> 2763 depends on SMP
>> 2764 default "4" if NR_CPUS_DEFAULT_4
>> 2765 default "8" if NR_CPUS_DEFAULT_8
>> 2766 default "16" if NR_CPUS_DEFAULT_16
>> 2767 default "32" if NR_CPUS_DEFAULT_32
>> 2768 default "64" if NR_CPUS_DEFAULT_64
1148 help 2769 help
1149 This option will enable prompting f !! 2770 This allows you to specify the maximum number of CPUs which this
1150 configuration options. These optio !! 2771 kernel will support. The maximum supported value is 32 for 32-bit
1151 work if they are set incorrectly, b !! 2772 kernel and 64 for 64-bit kernels; the minimum value which makes
1152 aspects of kernel memory management !! 2773 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2774 and 2 for all others.
1153 2775
1154 Unless you know what you are doing, !! 2776 This is purely to save memory - each supported CPU adds
>> 2777 approximately eight kilobytes to the kernel image. For best
>> 2778 performance should round up your number of processors to the next
>> 2779 power of two.
1155 2780
1156 comment "Default settings for advanced config !! 2781 config MIPS_PERF_SHARED_TC_COUNTERS
1157 depends on !ADVANCED_OPTIONS !! 2782 bool
>> 2783
>> 2784 config MIPS_NR_CPU_NR_MAP_1024
>> 2785 bool
>> 2786
>> 2787 config MIPS_NR_CPU_NR_MAP
>> 2788 int
>> 2789 depends on SMP
>> 2790 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2791 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2792
>> 2793 #
>> 2794 # Timer Interrupt Frequency Configuration
>> 2795 #
1158 2796
1159 config LOWMEM_SIZE_BOOL !! 2797 choice
1160 bool "Set maximum low memory" !! 2798 prompt "Timer frequency"
1161 depends on ADVANCED_OPTIONS !! 2799 default HZ_250
1162 help 2800 help
1163 This option allows you to set the m !! 2801 Allows the configuration of the timer frequency.
1164 will be used as "low memory", that !! 2802
1165 access directly, without having to !! 2803 config HZ_24
1166 This can be useful in optimizing th !! 2804 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
1167 memory. !! 2805
>> 2806 config HZ_48
>> 2807 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
1168 2808
1169 Say N here unless you know what you !! 2809 config HZ_100
>> 2810 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
1170 2811
1171 config LOWMEM_SIZE !! 2812 config HZ_128
1172 hex "Maximum low memory size (in byte !! 2813 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
1173 default "0x30000000" <<
1174 2814
1175 config LOWMEM_CAM_NUM_BOOL !! 2815 config HZ_250
1176 bool "Set number of CAMs to use to ma !! 2816 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
1177 depends on ADVANCED_OPTIONS && PPC_85 !! 2817
>> 2818 config HZ_256
>> 2819 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2820
>> 2821 config HZ_1000
>> 2822 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2823
>> 2824 config HZ_1024
>> 2825 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2826
>> 2827 endchoice
>> 2828
>> 2829 config SYS_SUPPORTS_24HZ
>> 2830 bool
>> 2831
>> 2832 config SYS_SUPPORTS_48HZ
>> 2833 bool
>> 2834
>> 2835 config SYS_SUPPORTS_100HZ
>> 2836 bool
>> 2837
>> 2838 config SYS_SUPPORTS_128HZ
>> 2839 bool
>> 2840
>> 2841 config SYS_SUPPORTS_250HZ
>> 2842 bool
>> 2843
>> 2844 config SYS_SUPPORTS_256HZ
>> 2845 bool
>> 2846
>> 2847 config SYS_SUPPORTS_1000HZ
>> 2848 bool
>> 2849
>> 2850 config SYS_SUPPORTS_1024HZ
>> 2851 bool
>> 2852
>> 2853 config SYS_SUPPORTS_ARBIT_HZ
>> 2854 bool
>> 2855 default y if !SYS_SUPPORTS_24HZ && \
>> 2856 !SYS_SUPPORTS_48HZ && \
>> 2857 !SYS_SUPPORTS_100HZ && \
>> 2858 !SYS_SUPPORTS_128HZ && \
>> 2859 !SYS_SUPPORTS_250HZ && \
>> 2860 !SYS_SUPPORTS_256HZ && \
>> 2861 !SYS_SUPPORTS_1000HZ && \
>> 2862 !SYS_SUPPORTS_1024HZ
>> 2863
>> 2864 config HZ
>> 2865 int
>> 2866 default 24 if HZ_24
>> 2867 default 48 if HZ_48
>> 2868 default 100 if HZ_100
>> 2869 default 128 if HZ_128
>> 2870 default 250 if HZ_250
>> 2871 default 256 if HZ_256
>> 2872 default 1000 if HZ_1000
>> 2873 default 1024 if HZ_1024
>> 2874
>> 2875 config SCHED_HRTICK
>> 2876 def_bool HIGH_RES_TIMERS
>> 2877
>> 2878 config ARCH_SUPPORTS_KEXEC
>> 2879 def_bool y
>> 2880
>> 2881 config ARCH_SUPPORTS_CRASH_DUMP
>> 2882 def_bool y
>> 2883
>> 2884 config PHYSICAL_START
>> 2885 hex "Physical address where the kernel is loaded"
>> 2886 default "0xffffffff84000000"
>> 2887 depends on CRASH_DUMP
1178 help 2888 help
1179 This option allows you to set the m !! 2889 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
1180 will be used to map low memory. Th !! 2890 If you plan to use kernel for capturing the crash dump change
1181 available and even more limited num !! 2891 this value to start of the reserved region (the "X" value as
1182 However, using more entries will al !! 2892 specified in the "crashkernel=YM@XM" command line boot parameter
1183 can be useful in optimizing the lay !! 2893 passed to the panic-ed kernel).
>> 2894
>> 2895 config MIPS_O32_FP64_SUPPORT
>> 2896 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 2897 depends on 32BIT || MIPS32_O32
>> 2898 help
>> 2899 When this is enabled, the kernel will support use of 64-bit floating
>> 2900 point registers with binaries using the O32 ABI along with the
>> 2901 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2902 32-bit MIPS systems this support is at the cost of increasing the
>> 2903 size and complexity of the compiled FPU emulator. Thus if you are
>> 2904 running a MIPS32 system and know that none of your userland binaries
>> 2905 will require 64-bit floating point, you may wish to reduce the size
>> 2906 of your kernel & potentially improve FP emulation performance by
>> 2907 saying N here.
>> 2908
>> 2909 Although binutils currently supports use of this flag the details
>> 2910 concerning its effect upon the O32 ABI in userland are still being
>> 2911 worked on. In order to avoid userland becoming dependent upon current
>> 2912 behaviour before the details have been finalised, this option should
>> 2913 be considered experimental and only enabled by those working upon
>> 2914 said details.
>> 2915
>> 2916 If unsure, say N.
>> 2917
>> 2918 config USE_OF
>> 2919 bool
>> 2920 select OF
>> 2921 select OF_EARLY_FLATTREE
>> 2922 select IRQ_DOMAIN
>> 2923
>> 2924 config UHI_BOOT
>> 2925 bool
1184 2926
1185 Say N here unless you know what you !! 2927 config BUILTIN_DTB
>> 2928 bool
>> 2929
>> 2930 choice
>> 2931 prompt "Kernel appended dtb support"
>> 2932 depends on USE_OF
>> 2933 default MIPS_NO_APPENDED_DTB
>> 2934
>> 2935 config MIPS_NO_APPENDED_DTB
>> 2936 bool "None"
>> 2937 help
>> 2938 Do not enable appended dtb support.
>> 2939
>> 2940 config MIPS_ELF_APPENDED_DTB
>> 2941 bool "vmlinux"
>> 2942 help
>> 2943 With this option, the boot code will look for a device tree binary
>> 2944 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 2945 it is empty and the DTB can be appended using binutils command
>> 2946 objcopy:
>> 2947
>> 2948 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 2949
>> 2950 This is meant as a backward compatibility convenience for those
>> 2951 systems with a bootloader that can't be upgraded to accommodate
>> 2952 the documented boot protocol using a device tree.
>> 2953
>> 2954 config MIPS_RAW_APPENDED_DTB
>> 2955 bool "vmlinux.bin or vmlinuz.bin"
>> 2956 help
>> 2957 With this option, the boot code will look for a device tree binary
>> 2958 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2959 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2960
>> 2961 This is meant as a backward compatibility convenience for those
>> 2962 systems with a bootloader that can't be upgraded to accommodate
>> 2963 the documented boot protocol using a device tree.
>> 2964
>> 2965 Beware that there is very little in terms of protection against
>> 2966 this option being confused by leftover garbage in memory that might
>> 2967 look like a DTB header after a reboot if no actual DTB is appended
>> 2968 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2969 if you don't intend to always append a DTB.
>> 2970 endchoice
>> 2971
>> 2972 choice
>> 2973 prompt "Kernel command line type"
>> 2974 depends on !CMDLINE_OVERRIDE
>> 2975 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 2976 !MACH_LOONGSON64 && !MIPS_MALTA && \
>> 2977 !CAVIUM_OCTEON_SOC
>> 2978 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2979
>> 2980 config MIPS_CMDLINE_FROM_DTB
>> 2981 depends on USE_OF
>> 2982 bool "Dtb kernel arguments if available"
>> 2983
>> 2984 config MIPS_CMDLINE_DTB_EXTEND
>> 2985 depends on USE_OF
>> 2986 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2987
>> 2988 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2989 bool "Bootloader kernel arguments if available"
>> 2990
>> 2991 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 2992 depends on CMDLINE_BOOL
>> 2993 bool "Extend builtin kernel arguments with bootloader arguments"
>> 2994 endchoice
>> 2995
>> 2996 endmenu
>> 2997
>> 2998 config LOCKDEP_SUPPORT
>> 2999 bool
>> 3000 default y
>> 3001
>> 3002 config STACKTRACE_SUPPORT
>> 3003 bool
>> 3004 default y
>> 3005
>> 3006 config PGTABLE_LEVELS
>> 3007 int
>> 3008 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3009 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
>> 3010 default 2
>> 3011
>> 3012 config MIPS_AUTO_PFN_OFFSET
>> 3013 bool
>> 3014
>> 3015 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 3016
>> 3017 config PCI_DRIVERS_GENERIC
>> 3018 select PCI_DOMAINS_GENERIC if PCI
>> 3019 bool
>> 3020
>> 3021 config PCI_DRIVERS_LEGACY
>> 3022 def_bool !PCI_DRIVERS_GENERIC
>> 3023 select NO_GENERIC_PCI_IOPORT_MAP
>> 3024 select PCI_DOMAINS if PCI
>> 3025
>> 3026 #
>> 3027 # ISA support is now enabled via select. Too many systems still have the one
>> 3028 # or other ISA chip on the board that users don't know about so don't expect
>> 3029 # users to choose the right thing ...
>> 3030 #
>> 3031 config ISA
>> 3032 bool
>> 3033
>> 3034 config TC
>> 3035 bool "TURBOchannel support"
>> 3036 depends on MACH_DECSTATION
>> 3037 help
>> 3038 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3039 processors. TURBOchannel programming specifications are available
>> 3040 at:
>> 3041 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3042 and:
>> 3043 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3044 Linux driver support status is documented at:
>> 3045 <http://www.linux-mips.org/wiki/DECstation>
>> 3046
>> 3047 config MMU
>> 3048 bool
>> 3049 default y
>> 3050
>> 3051 config ARCH_MMAP_RND_BITS_MIN
>> 3052 default 12 if 64BIT
>> 3053 default 8
1186 3054
1187 config LOWMEM_CAM_NUM !! 3055 config ARCH_MMAP_RND_BITS_MAX
1188 depends on PPC_85xx !! 3056 default 18 if 64BIT
1189 int "Number of CAMs to use to map low !! 3057 default 15
1190 default 3 if !STRICT_KERNEL_RWX !! 3058
1191 default 9 if DATA_SHIFT >= 24 !! 3059 config ARCH_MMAP_RND_COMPAT_BITS_MIN
1192 default 12 if DATA_SHIFT >= 22 !! 3060 default 8
>> 3061
>> 3062 config ARCH_MMAP_RND_COMPAT_BITS_MAX
1193 default 15 3063 default 15
1194 3064
1195 config DYNAMIC_MEMSTART !! 3065 config I8253
1196 bool "Enable page aligned dynamic loa !! 3066 bool
1197 depends on ADVANCED_OPTIONS && FLATME !! 3067 select CLKSRC_I8253
1198 select NONSTATIC_KERNEL !! 3068 select CLKEVT_I8253
1199 help !! 3069 select MIPS_EXTERNAL_TIMER
1200 This option enables the kernel to b !! 3070 endmenu
1201 physical address. The kernel create !! 3071
1202 the address where the kernel is loa !! 3072 config TRAD_SIGNALS
1203 the TLB page size of the mapping fo !! 3073 bool
1204 Please refer to the init code for f !! 3074
1205 !! 3075 config MIPS32_COMPAT
1206 DYNAMIC_MEMSTART is an easy way of !! 3076 bool
1207 kernel image, where the only restri !! 3077
1208 load address. When this option is e !! 3078 config COMPAT
1209 address CONFIG_PHYSICAL_START is ig !! 3079 bool
1210 !! 3080
1211 This option is overridden by CONFIG !! 3081 config MIPS32_O32
1212 !! 3082 bool "Kernel support for o32 binaries"
1213 config PAGE_OFFSET_BOOL !! 3083 depends on 64BIT
1214 bool "Set custom page offset address" !! 3084 select ARCH_WANT_OLD_COMPAT_IPC
1215 depends on ADVANCED_OPTIONS !! 3085 select COMPAT
1216 help !! 3086 select MIPS32_COMPAT
1217 This option allows you to set the k <<
1218 the kernel will map low memory. Th <<
1219 the virtual memory layout of the sy <<
1220 <<
1221 Say N here unless you know what you <<
1222 <<
1223 config PAGE_OFFSET <<
1224 hex "Virtual address of memory base" <<
1225 default "0xc0000000" <<
1226 <<
1227 config KERNEL_START_BOOL <<
1228 bool "Set custom kernel base address" <<
1229 depends on ADVANCED_OPTIONS <<
1230 help <<
1231 This option allows you to set the k <<
1232 the kernel will be loaded. Normall <<
1233 however there are times (like kdump <<
1234 to be the same. <<
1235 <<
1236 Say N here unless you know what you <<
1237 <<
1238 config KERNEL_START <<
1239 hex "Virtual address of kernel base" <<
1240 default PAGE_OFFSET if PAGE_OFFSET_BO <<
1241 default "0xc2000000" if CRASH_DUMP && <<
1242 default "0xc0000000" <<
1243 <<
1244 config PHYSICAL_START_BOOL <<
1245 bool "Set physical address where the <<
1246 depends on ADVANCED_OPTIONS && FLATME <<
1247 help 3087 help
1248 This gives the physical address whe !! 3088 Select this option if you want to run o32 binaries. These are pure
>> 3089 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3090 existing binaries are in this format.
1249 3091
1250 Say N here unless you know what you !! 3092 If unsure, say Y.
1251 3093
1252 config PHYSICAL_START !! 3094 config MIPS32_N32
1253 hex "Physical address where the kerne !! 3095 bool "Kernel support for n32 binaries"
1254 default "0x02000000" if PPC_BOOK3S && !! 3096 depends on 64BIT
1255 default "0x00000000" !! 3097 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
1256 !! 3098 select COMPAT
1257 config PHYSICAL_ALIGN !! 3099 select MIPS32_COMPAT
1258 hex !! 3100 help
1259 default "0x04000000" if PPC_85xx !! 3101 Select this option if you want to run n32 binaries. These are
1260 help !! 3102 64-bit binaries using 32-bit quantities for addressing and certain
1261 This value puts the alignment restr !! 3103 data that would normally be 64-bit. They are used in special
1262 where kernel is loaded and run from !! 3104 cases.
1263 address which meets above alignment <<
1264 <<
1265 config TASK_SIZE_BOOL <<
1266 bool "Set custom user task size" <<
1267 depends on ADVANCED_OPTIONS <<
1268 help <<
1269 This option allows you to set the a <<
1270 allocated to user tasks. This can <<
1271 virtual memory layout of the system <<
1272 <<
1273 Say N here unless you know what you <<
1274 <<
1275 config TASK_SIZE <<
1276 hex "Size of user task space" if TASK <<
1277 default "0x80000000" if PPC_8xx <<
1278 default "0xb0000000" if PPC_BOOK3S_32 <<
1279 default "0xc0000000" <<
1280 <<
1281 config MODULES_SIZE_BOOL <<
1282 bool "Set custom size for modules/exe <<
1283 depends on EXECMEM && ADVANCED_OPTION <<
1284 help <<
1285 This option allows you to set the s <<
1286 space dedicated for modules/execmem <<
1287 For the time being it is only for 8 <<
1288 platform share it with vmalloc spac <<
1289 <<
1290 Say N here unless you know what you <<
1291 <<
1292 config MODULES_SIZE <<
1293 int "Size of modules/execmem area (In <<
1294 range 1 256 if EXECMEM <<
1295 default 64 if EXECMEM && PPC_BOOK3S_3 <<
1296 default 32 if EXECMEM && PPC_8xx <<
1297 default 0 <<
1298 3105
1299 endmenu !! 3106 If unsure, say N.
1300 3107
1301 if PPC64 !! 3108 config CC_HAS_MNO_BRANCH_LIKELY
1302 # This value must have zeroes in the bottom 6 !! 3109 def_bool y
1303 config PAGE_OFFSET !! 3110 depends on $(cc-option,-mno-branch-likely)
1304 hex !! 3111
1305 default "0xc000000000000000" !! 3112 # https://github.com/llvm/llvm-project/issues/61045
1306 config KERNEL_START !! 3113 config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
1307 hex !! 3114 def_bool y if CC_IS_CLANG
1308 default "0xc000000000000000" !! 3115
1309 config PHYSICAL_START !! 3116 menu "Power management options"
1310 hex !! 3117
1311 default "0x00000000" !! 3118 config ARCH_HIBERNATION_POSSIBLE
1312 endif !! 3119 def_bool y
>> 3120 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3121
>> 3122 config ARCH_SUSPEND_POSSIBLE
>> 3123 def_bool y
>> 3124 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3125
>> 3126 source "kernel/power/Kconfig"
>> 3127
>> 3128 endmenu
1313 3129
1314 config PPC_LIB_RHEAP !! 3130 config MIPS_EXTERNAL_TIMER
1315 bool 3131 bool
1316 3132
1317 source "arch/powerpc/kvm/Kconfig" !! 3133 menu "CPU Power Management"
>> 3134
>> 3135 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3136 source "drivers/cpufreq/Kconfig"
>> 3137 endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3138
>> 3139 source "drivers/cpuidle/Kconfig"
>> 3140
>> 3141 endmenu
>> 3142
>> 3143 source "arch/mips/kvm/Kconfig"
1318 3144
1319 source "kernel/livepatch/Kconfig" !! 3145 source "arch/mips/vdso/Kconfig"
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.