1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 source "arch/powerpc/platforms/Kconfig.cputype !! 2 config MIPS
3 <<
4 config CC_HAS_ELFV2 <<
5 def_bool PPC64 && $(cc-option, -mabi=e <<
6 <<
7 config CC_HAS_PREFIXED <<
8 def_bool PPC64 && $(cc-option, -mcpu=p <<
9 <<
10 config CC_HAS_PCREL <<
11 # Clang has a bug (https://github.com/ <<
12 # where pcrel code is not generated if <<
13 # -mno-vsx options are also given. Wit <<
14 # instructions are generated from regu <<
15 # do pcrel yet. <<
16 def_bool PPC64 && CC_IS_GCC && $(cc-op <<
17 <<
18 config 32BIT <<
19 bool <<
20 default y if PPC32 <<
21 <<
22 config 64BIT <<
23 bool <<
24 default y if PPC64 <<
25 <<
26 config LIVEPATCH_64 <<
27 def_bool PPC64 <<
28 depends on LIVEPATCH <<
29 <<
30 config MMU <<
31 bool <<
32 default y <<
33 <<
34 config ARCH_MMAP_RND_BITS_MAX <<
35 # On Book3S 64, the default virtual ad <<
36 # is 2^47 (128TB). As a maximum, allow <<
37 # 32T of address space (2^45), which s <<
38 # between bottom-up and top-down alloc <<
39 # consume "normal" amounts of address <<
40 # and 4K page sizes. <<
41 default 29 if PPC_BOOK3S_64 && PPC_64K <<
42 default 33 if PPC_BOOK3S_64 <<
43 # <<
44 # On all other 64-bit platforms (curre <<
45 # address space is 2^46 (64TB). Allow <<
46 # of address space (2^44). Only 4K pag <<
47 default 32 if 64BIT # 32 = 44 (16T <<
48 # <<
49 # For 32-bit, use the compat values, a <<
50 default ARCH_MMAP_RND_COMPAT_BITS_MAX <<
51 <<
52 config ARCH_MMAP_RND_BITS_MIN <<
53 # Allow randomisation to consume up to <<
54 default 14 if 64BIT && PPC_64K_PAGES <<
55 default 18 if 64BIT <<
56 # <<
57 # For 32-bit, use the compat values, a <<
58 default ARCH_MMAP_RND_COMPAT_BITS_MIN <<
59 <<
60 config ARCH_MMAP_RND_COMPAT_BITS_MAX <<
61 # Total virtual address space for 32-b <<
62 # Allow randomisation to consume up to <<
63 default 11 if PPC_256K_PAGES # 11 = <<
64 default 13 if PPC_64K_PAGES # 13 = <<
65 default 15 if PPC_16K_PAGES # 15 = <<
66 default 17 # 17 = <<
67 <<
68 config ARCH_MMAP_RND_COMPAT_BITS_MIN <<
69 # Total virtual address space for 32-b <<
70 # Allow randomisation to consume up to <<
71 default 5 if PPC_256K_PAGES # 5 = <<
72 default 7 if PPC_64K_PAGES # 7 = <<
73 default 9 if PPC_16K_PAGES # 9 = <<
74 default 11 # 11 = <<
75 <<
76 config NR_IRQS <<
77 int "Number of virtual interrupt numbe <<
78 range 32 1048576 <<
79 default "512" <<
80 help <<
81 This defines the number of virtual i <<
82 can manage. Virtual interrupt number <<
83 /proc/interrupts. If you configure y <<
84 drivers will fail to load or worse - <<
85 <<
86 config NMI_IPI <<
87 bool 3 bool
88 depends on SMP && (DEBUGGER || KEXEC_C <<
89 default y 4 default y
90 !! 5 select ARCH_32BIT_OFF_T if !64BIT
91 config PPC_WATCHDOG !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
92 bool !! 7 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
93 depends on HARDLOCKUP_DETECTOR_ARCH !! 8 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
94 default y <<
95 help <<
96 This is a placeholder when the power <<
97 watchdog is selected (arch/powerpc/k <<
98 selected via the generic lockup dete <<
99 have no standalone config option for <<
100 <<
101 config STACKTRACE_SUPPORT <<
102 bool <<
103 default y <<
104 <<
105 config LOCKDEP_SUPPORT <<
106 bool <<
107 default y <<
108 <<
109 config GENERIC_LOCKBREAK <<
110 bool <<
111 default y <<
112 depends on SMP && PREEMPTION && !PPC_Q <<
113 <<
114 config GENERIC_HWEIGHT <<
115 bool <<
116 default y <<
117 <<
118 config PPC <<
119 bool <<
120 default y <<
121 # <<
122 # Please keep this list sorted alphabe <<
123 # <<
124 select ARCH_32BIT_OFF_T if PPC32 <<
125 select ARCH_DISABLE_KASAN_INLINE <<
126 select ARCH_DMA_DEFAULT_COHERENT <<
127 select ARCH_ENABLE_MEMORY_HOTPLUG <<
128 select ARCH_ENABLE_MEMORY_HOTREMOVE <<
129 select ARCH_HAS_COPY_MC <<
130 select ARCH_HAS_CURRENT_STACK_POINTER <<
131 select ARCH_HAS_DEBUG_VIRTUAL <<
132 select ARCH_HAS_DEBUG_VM_PGTABLE <<
133 select ARCH_HAS_DEBUG_WX <<
134 select ARCH_HAS_DEVMEM_IS_ALLOWED <<
135 select ARCH_HAS_DMA_MAP_DIRECT <<
136 select ARCH_HAS_DMA_OPS <<
137 select ARCH_HAS_FORTIFY_SOURCE 9 select ARCH_HAS_FORTIFY_SOURCE
138 select ARCH_HAS_GCOV_PROFILE_ALL <<
139 select ARCH_HAS_KCOV 10 select ARCH_HAS_KCOV
140 select ARCH_HAS_KERNEL_FPU_SUPPORT !! 11 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
141 select ARCH_HAS_MEMBARRIER_CALLBACKS !! 12 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
142 select ARCH_HAS_MEMBARRIER_SYNC_CORE !! 13 select ARCH_HAS_STRNCPY_FROM_USER
143 select ARCH_HAS_MEMREMAP_COMPAT_ALIGN !! 14 select ARCH_HAS_STRNLEN_USER
144 select ARCH_HAS_MMIOWB !! 15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
145 select ARCH_HAS_NON_OVERLAPPING_ADDRES !! 16 select ARCH_HAS_UBSAN_SANITIZE_ALL
146 select ARCH_HAS_PHYS_TO_DMA !! 17 select ARCH_HAS_GCOV_PROFILE_ALL
147 select ARCH_HAS_PMEM_API <<
148 select ARCH_HAS_PTE_DEVMAP <<
149 select ARCH_HAS_PTE_SPECIAL <<
150 select ARCH_HAS_SCALED_CPUTIME <<
151 select ARCH_HAS_SET_MEMORY <<
152 select ARCH_HAS_STRICT_KERNEL_RWX <<
153 select ARCH_HAS_STRICT_KERNEL_RWX <<
154 select ARCH_HAS_STRICT_MODULE_RWX <<
155 select ARCH_HAS_SYSCALL_WRAPPER <<
156 select ARCH_HAS_TICK_BROADCAST <<
157 select ARCH_HAS_UACCESS_FLUSHCACHE <<
158 select ARCH_HAS_UBSAN <<
159 select ARCH_HAVE_NMI_SAFE_CMPXCHG <<
160 select ARCH_HAVE_EXTRA_ELF_NOTES <<
161 select ARCH_KEEP_MEMBLOCK 18 select ARCH_KEEP_MEMBLOCK
162 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL !! 19 select ARCH_SUPPORTS_UPROBES
163 select ARCH_MIGHT_HAVE_PC_PARPORT <<
164 select ARCH_MIGHT_HAVE_PC_SERIO <<
165 select ARCH_OPTIONAL_KERNEL_RWX <<
166 select ARCH_OPTIONAL_KERNEL_RWX_DEFAUL <<
167 select ARCH_SPLIT_ARG64 <<
168 select ARCH_STACKWALK <<
169 select ARCH_SUPPORTS_ATOMIC_RMW <<
170 select ARCH_SUPPORTS_DEBUG_PAGEALLOC <<
171 select ARCH_USE_BUILTIN_BSWAP 20 select ARCH_USE_BUILTIN_BSWAP
172 select ARCH_USE_CMPXCHG_LOCKREF !! 21 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
173 select ARCH_USE_MEMTEST 22 select ARCH_USE_MEMTEST
174 select ARCH_USE_QUEUED_RWLOCKS !! 23 select ARCH_USE_QUEUED_RWLOCKS
175 select ARCH_WANT_DEFAULT_BPF_JIT !! 24 select ARCH_USE_QUEUED_SPINLOCKS
176 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ !! 25 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
>> 26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
177 select ARCH_WANT_IPC_PARSE_VERSION 27 select ARCH_WANT_IPC_PARSE_VERSION
178 select ARCH_WANT_IRQS_OFF_ACTIVATE_MM <<
179 select ARCH_WANT_LD_ORPHAN_WARN 28 select ARCH_WANT_LD_ORPHAN_WARN
180 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
181 select ARCH_WANTS_MODULES_DATA_IN_VMAL <<
182 select ARCH_WEAK_RELEASE_ACQUIRE <<
183 select BINFMT_ELF <<
184 select BUILDTIME_TABLE_SORT 29 select BUILDTIME_TABLE_SORT
185 select CLONE_BACKWARDS 30 select CLONE_BACKWARDS
186 select CPUMASK_OFFSTACK !! 31 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
187 select DCACHE_WORD_ACCESS !! 32 select CPU_PM if CPU_IDLE
188 select DMA_OPS_BYPASS !! 33 select GENERIC_ATOMIC64 if !64BIT
189 select DYNAMIC_FTRACE <<
190 select EDAC_ATOMIC_SCRUB <<
191 select EDAC_SUPPORT <<
192 select FTRACE_MCOUNT_USE_PATCHABLE_FUN <<
193 select FUNCTION_ALIGNMENT_4B <<
194 select GENERIC_ATOMIC64 <<
195 select GENERIC_CLOCKEVENTS_BROADCAST <<
196 select GENERIC_CMOS_UPDATE 34 select GENERIC_CMOS_UPDATE
197 select GENERIC_CPU_AUTOPROBE 35 select GENERIC_CPU_AUTOPROBE
198 select GENERIC_CPU_VULNERABILITIES <<
199 select GENERIC_EARLY_IOREMAP <<
200 select GENERIC_GETTIMEOFDAY 36 select GENERIC_GETTIMEOFDAY
201 select GENERIC_IDLE_POLL_SETUP !! 37 select GENERIC_IOMAP
202 select GENERIC_IOREMAP !! 38 select GENERIC_IRQ_PROBE
203 select GENERIC_IRQ_SHOW 39 select GENERIC_IRQ_SHOW
204 select GENERIC_IRQ_SHOW_LEVEL !! 40 select GENERIC_ISA_DMA if EISA
205 select GENERIC_PCI_IOMAP !! 41 select GENERIC_LIB_ASHLDI3
206 select GENERIC_PTDUMP !! 42 select GENERIC_LIB_ASHRDI3
>> 43 select GENERIC_LIB_CMPDI2
>> 44 select GENERIC_LIB_LSHRDI3
>> 45 select GENERIC_LIB_UCMPDI2
>> 46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
207 select GENERIC_SMP_IDLE_THREAD 47 select GENERIC_SMP_IDLE_THREAD
208 select GENERIC_TIME_VSYSCALL 48 select GENERIC_TIME_VSYSCALL
209 select GENERIC_VDSO_TIME_NS !! 49 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
210 select HAS_IOPORT !! 50 select HAVE_ARCH_COMPILER_H
211 select HAVE_ARCH_AUDITSYSCALL <<
212 select HAVE_ARCH_HUGE_VMALLOC <<
213 select HAVE_ARCH_HUGE_VMAP <<
214 select HAVE_ARCH_JUMP_LABEL 51 select HAVE_ARCH_JUMP_LABEL
215 select HAVE_ARCH_JUMP_LABEL_RELATIVE !! 52 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
216 select HAVE_ARCH_KASAN !! 53 select HAVE_ARCH_MMAP_RND_BITS if MMU
217 select HAVE_ARCH_KASAN !! 54 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
218 select HAVE_ARCH_KASAN <<
219 select HAVE_ARCH_KASAN_VMALLOC <<
220 select HAVE_ARCH_KCSAN <<
221 select HAVE_ARCH_KFENCE <<
222 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
223 select HAVE_ARCH_WITHIN_STACK_FRAMES <<
224 select HAVE_ARCH_KGDB <<
225 select HAVE_ARCH_MMAP_RND_BITS <<
226 select HAVE_ARCH_MMAP_RND_COMPAT_BITS <<
227 select HAVE_ARCH_NVRAM_OPS <<
228 select HAVE_ARCH_SECCOMP_FILTER 55 select HAVE_ARCH_SECCOMP_FILTER
229 select HAVE_ARCH_TRACEHOOK 56 select HAVE_ARCH_TRACEHOOK
>> 57 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
230 select HAVE_ASM_MODVERSIONS 58 select HAVE_ASM_MODVERSIONS
231 select HAVE_CONTEXT_TRACKING_USER 59 select HAVE_CONTEXT_TRACKING_USER
>> 60 select HAVE_TIF_NOHZ
232 select HAVE_C_RECORDMCOUNT 61 select HAVE_C_RECORDMCOUNT
233 select HAVE_DEBUG_KMEMLEAK 62 select HAVE_DEBUG_KMEMLEAK
234 select HAVE_DEBUG_STACKOVERFLOW 63 select HAVE_DEBUG_STACKOVERFLOW
>> 64 select HAVE_DMA_CONTIGUOUS
235 select HAVE_DYNAMIC_FTRACE 65 select HAVE_DYNAMIC_FTRACE
236 select HAVE_DYNAMIC_FTRACE_WITH_ARGS !! 66 select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
237 select HAVE_DYNAMIC_FTRACE_WITH_REGS !! 67 !CPU_DADDI_WORKAROUNDS && \
238 select HAVE_EBPF_JIT !! 68 !CPU_R4000_WORKAROUNDS && \
239 select HAVE_EFFICIENT_UNALIGNED_ACCESS !! 69 !CPU_R4400_WORKAROUNDS
240 select HAVE_GUP_FAST !! 70 select HAVE_EXIT_THREAD
>> 71 select HAVE_FAST_GUP
241 select HAVE_FTRACE_MCOUNT_RECORD 72 select HAVE_FTRACE_MCOUNT_RECORD
242 select HAVE_FUNCTION_ARG_ACCESS_API <<
243 select HAVE_FUNCTION_DESCRIPTORS <<
244 select HAVE_FUNCTION_ERROR_INJECTION <<
245 select HAVE_FUNCTION_GRAPH_TRACER 73 select HAVE_FUNCTION_GRAPH_TRACER
246 select HAVE_FUNCTION_TRACER !! 74 select HAVE_FUNCTION_TRACER
247 select HAVE_GCC_PLUGINS !! 75 select HAVE_GCC_PLUGINS
248 select HAVE_GENERIC_VDSO 76 select HAVE_GENERIC_VDSO
249 select HAVE_HARDLOCKUP_DETECTOR_ARCH <<
250 select HAVE_HARDLOCKUP_DETECTOR_PERF <<
251 select HAVE_HW_BREAKPOINT <<
252 select HAVE_IOREMAP_PROT 77 select HAVE_IOREMAP_PROT
>> 78 select HAVE_IRQ_EXIT_ON_IRQ_STACK
253 select HAVE_IRQ_TIME_ACCOUNTING 79 select HAVE_IRQ_TIME_ACCOUNTING
254 select HAVE_KERNEL_GZIP <<
255 select HAVE_KERNEL_LZMA <<
256 select HAVE_KERNEL_LZO <<
257 select HAVE_KERNEL_XZ <<
258 select HAVE_KPROBES 80 select HAVE_KPROBES
259 select HAVE_KPROBES_ON_FTRACE <<
260 select HAVE_KRETPROBES 81 select HAVE_KRETPROBES
261 select HAVE_LD_DEAD_CODE_DATA_ELIMINAT !! 82 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
262 select HAVE_LIVEPATCH <<
263 select HAVE_MOD_ARCH_SPECIFIC 83 select HAVE_MOD_ARCH_SPECIFIC
264 select HAVE_NMI !! 84 select HAVE_NMI
265 select HAVE_OPTPROBES !! 85 select HAVE_PATA_PLATFORM
266 select HAVE_OBJTOOL <<
267 select HAVE_OBJTOOL_MCOUNT <<
268 select HAVE_PERF_EVENTS 86 select HAVE_PERF_EVENTS
269 select HAVE_PERF_EVENTS_NMI <<
270 select HAVE_PERF_REGS 87 select HAVE_PERF_REGS
271 select HAVE_PERF_USER_STACK_DUMP 88 select HAVE_PERF_USER_STACK_DUMP
272 select HAVE_RETHOOK <<
273 select HAVE_REGS_AND_STACK_ACCESS_API 89 select HAVE_REGS_AND_STACK_ACCESS_API
274 select HAVE_RELIABLE_STACKTRACE <<
275 select HAVE_RSEQ 90 select HAVE_RSEQ
276 select HAVE_SETUP_PER_CPU_AREA !! 91 select HAVE_SPARSE_SYSCALL_NR
277 select HAVE_SOFTIRQ_ON_OWN_STACK !! 92 select HAVE_STACKPROTECTOR
278 select HAVE_STACKPROTECTOR <<
279 select HAVE_STACKPROTECTOR <<
280 select HAVE_STATIC_CALL <<
281 select HAVE_SYSCALL_TRACEPOINTS 93 select HAVE_SYSCALL_TRACEPOINTS
282 select HAVE_VIRT_CPU_ACCOUNTING !! 94 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
283 select HAVE_VIRT_CPU_ACCOUNTING_GEN <<
284 select HOTPLUG_SMT <<
285 select SMT_NUM_THREADS_DYNAMIC <<
286 select HUGETLB_PAGE_SIZE_VARIABLE <<
287 select IOMMU_HELPER <<
288 select IRQ_DOMAIN <<
289 select IRQ_FORCED_THREADING 95 select IRQ_FORCED_THREADING
290 select KASAN_VMALLOC !! 96 select ISA if EISA
291 select LOCK_MM_AND_FIND_VMA 97 select LOCK_MM_AND_FIND_VMA
292 select MMU_GATHER_PAGE_SIZE !! 98 select MODULES_USE_ELF_REL if MODULES
293 select MMU_GATHER_RCU_TABLE_FREE !! 99 select MODULES_USE_ELF_RELA if MODULES && 64BIT
294 select MMU_GATHER_MERGE_VMAS !! 100 select PERF_USE_VMALLOC
295 select MMU_LAZY_TLB_SHOOTDOWN !! 101 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
296 select MODULES_USE_ELF_RELA <<
297 select NEED_DMA_MAP_STATE <<
298 select NEED_PER_CPU_EMBED_FIRST_CHUNK <<
299 select NEED_PER_CPU_PAGE_FIRST_CHUNK <<
300 select NEED_SG_DMA_LENGTH <<
301 select OF <<
302 select OF_EARLY_FLATTREE <<
303 select OLD_SIGACTION <<
304 select OLD_SIGSUSPEND <<
305 select PCI_DOMAINS <<
306 select PCI_MSI_ARCH_FALLBACKS <<
307 select PCI_SYSCALL <<
308 select PPC_DAWR <<
309 select RTC_LIB 102 select RTC_LIB
310 select SPARSE_IRQ <<
311 select STRICT_KERNEL_RWX if STRICT_MOD <<
312 select SYSCTL_EXCEPTION_TRACE 103 select SYSCTL_EXCEPTION_TRACE
313 select THREAD_INFO_IN_TASK <<
314 select TRACE_IRQFLAGS_SUPPORT 104 select TRACE_IRQFLAGS_SUPPORT
315 select VDSO_GETRANDOM !! 105 select ARCH_HAS_ELFCORE_COMPAT
316 # !! 106 select HAVE_ARCH_KCSAN if 64BIT
317 # Please keep this list sorted alphabe <<
318 # <<
319 107
320 config PPC_BARRIER_NOSPEC !! 108 config MIPS_FIXUP_BIGPHYS_ADDR
321 bool 109 bool
322 default y <<
323 depends on PPC_BOOK3S_64 || PPC_E500 <<
324 110
325 config PPC_HAS_LBARX_LHARX !! 111 config MIPS_GENERIC
326 bool 112 bool
327 113
328 config EARLY_PRINTK !! 114 config MACH_INGENIC
329 bool 115 bool
330 default y !! 116 select SYS_SUPPORTS_32BIT_KERNEL
>> 117 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 118 select SYS_SUPPORTS_ZBOOT
>> 119 select DMA_NONCOHERENT
>> 120 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 121 select IRQ_MIPS_CPU
>> 122 select PINCTRL
>> 123 select GPIOLIB
>> 124 select COMMON_CLK
>> 125 select GENERIC_IRQ_CHIP
>> 126 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 127 select USE_OF
>> 128 select CPU_SUPPORTS_CPUFREQ
>> 129 select MIPS_EXTERNAL_TIMER
331 130
332 config PANIC_TIMEOUT !! 131 menu "Machine selection"
333 int <<
334 default 180 <<
335 132
336 config COMPAT !! 133 choice
337 bool "Enable support for 32bit binarie !! 134 prompt "System type"
338 depends on PPC64 !! 135 default MIPS_GENERIC_KERNEL
339 default y if !CPU_LITTLE_ENDIAN !! 136
340 select ARCH_WANT_OLD_COMPAT_IPC !! 137 config MIPS_GENERIC_KERNEL
341 select COMPAT_OLD_SIGACTION !! 138 bool "Generic board-agnostic MIPS kernel"
>> 139 select ARCH_HAS_SETUP_DMA_OPS
>> 140 select MIPS_GENERIC
>> 141 select BOOT_RAW
>> 142 select BUILTIN_DTB
>> 143 select CEVT_R4K
>> 144 select CLKSRC_MIPS_GIC
>> 145 select COMMON_CLK
>> 146 select CPU_MIPSR2_IRQ_EI
>> 147 select CPU_MIPSR2_IRQ_VI
>> 148 select CSRC_R4K
>> 149 select DMA_NONCOHERENT
>> 150 select HAVE_PCI
>> 151 select IRQ_MIPS_CPU
>> 152 select MIPS_AUTO_PFN_OFFSET
>> 153 select MIPS_CPU_SCACHE
>> 154 select MIPS_GIC
>> 155 select MIPS_L1_CACHE_SHIFT_7
>> 156 select NO_EXCEPT_FILL
>> 157 select PCI_DRIVERS_GENERIC
>> 158 select SMP_UP if SMP
>> 159 select SWAP_IO_SPACE
>> 160 select SYS_HAS_CPU_MIPS32_R1
>> 161 select SYS_HAS_CPU_MIPS32_R2
>> 162 select SYS_HAS_CPU_MIPS32_R6
>> 163 select SYS_HAS_CPU_MIPS64_R1
>> 164 select SYS_HAS_CPU_MIPS64_R2
>> 165 select SYS_HAS_CPU_MIPS64_R6
>> 166 select SYS_SUPPORTS_32BIT_KERNEL
>> 167 select SYS_SUPPORTS_64BIT_KERNEL
>> 168 select SYS_SUPPORTS_BIG_ENDIAN
>> 169 select SYS_SUPPORTS_HIGHMEM
>> 170 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 171 select SYS_SUPPORTS_MICROMIPS
>> 172 select SYS_SUPPORTS_MIPS16
>> 173 select SYS_SUPPORTS_MIPS_CPS
>> 174 select SYS_SUPPORTS_MULTITHREADING
>> 175 select SYS_SUPPORTS_RELOCATABLE
>> 176 select SYS_SUPPORTS_SMARTMIPS
>> 177 select SYS_SUPPORTS_ZBOOT
>> 178 select UHI_BOOT
>> 179 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 180 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 181 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 182 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 183 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 184 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 185 select USE_OF
>> 186 help
>> 187 Select this to build a kernel which aims to support multiple boards,
>> 188 generally using a flattened device tree passed from the bootloader
>> 189 using the boot protocol defined in the UHI (Unified Hosting
>> 190 Interface) specification.
>> 191
>> 192 config MIPS_ALCHEMY
>> 193 bool "Alchemy processor based machines"
>> 194 select PHYS_ADDR_T_64BIT
>> 195 select CEVT_R4K
>> 196 select CSRC_R4K
>> 197 select IRQ_MIPS_CPU
>> 198 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
>> 199 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
>> 200 select SYS_HAS_CPU_MIPS32_R1
>> 201 select SYS_SUPPORTS_32BIT_KERNEL
>> 202 select SYS_SUPPORTS_APM_EMULATION
>> 203 select GPIOLIB
>> 204 select SYS_SUPPORTS_ZBOOT
>> 205 select COMMON_CLK
>> 206
>> 207 config AR7
>> 208 bool "Texas Instruments AR7"
>> 209 select BOOT_ELF32
>> 210 select COMMON_CLK
>> 211 select DMA_NONCOHERENT
>> 212 select CEVT_R4K
>> 213 select CSRC_R4K
>> 214 select IRQ_MIPS_CPU
>> 215 select NO_EXCEPT_FILL
>> 216 select SWAP_IO_SPACE
>> 217 select SYS_HAS_CPU_MIPS32_R1
>> 218 select SYS_HAS_EARLY_PRINTK
>> 219 select SYS_SUPPORTS_32BIT_KERNEL
>> 220 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 221 select SYS_SUPPORTS_MIPS16
>> 222 select SYS_SUPPORTS_ZBOOT_UART16550
>> 223 select GPIOLIB
>> 224 select VLYNQ
>> 225 help
>> 226 Support for the Texas Instruments AR7 System-on-a-Chip
>> 227 family: TNETD7100, 7200 and 7300.
>> 228
>> 229 config ATH25
>> 230 bool "Atheros AR231x/AR531x SoC support"
>> 231 select CEVT_R4K
>> 232 select CSRC_R4K
>> 233 select DMA_NONCOHERENT
>> 234 select IRQ_MIPS_CPU
>> 235 select IRQ_DOMAIN
>> 236 select SYS_HAS_CPU_MIPS32_R1
>> 237 select SYS_SUPPORTS_BIG_ENDIAN
>> 238 select SYS_SUPPORTS_32BIT_KERNEL
>> 239 select SYS_HAS_EARLY_PRINTK
>> 240 help
>> 241 Support for Atheros AR231x and Atheros AR531x based boards
>> 242
>> 243 config ATH79
>> 244 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 245 select ARCH_HAS_RESET_CONTROLLER
>> 246 select BOOT_RAW
>> 247 select CEVT_R4K
>> 248 select CSRC_R4K
>> 249 select DMA_NONCOHERENT
>> 250 select GPIOLIB
>> 251 select PINCTRL
>> 252 select COMMON_CLK
>> 253 select IRQ_MIPS_CPU
>> 254 select SYS_HAS_CPU_MIPS32_R2
>> 255 select SYS_HAS_EARLY_PRINTK
>> 256 select SYS_SUPPORTS_32BIT_KERNEL
>> 257 select SYS_SUPPORTS_BIG_ENDIAN
>> 258 select SYS_SUPPORTS_MIPS16
>> 259 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 260 select USE_OF
>> 261 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 262 help
>> 263 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 264
>> 265 config BMIPS_GENERIC
>> 266 bool "Broadcom Generic BMIPS kernel"
>> 267 select ARCH_HAS_RESET_CONTROLLER
>> 268 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 269 select BOOT_RAW
>> 270 select NO_EXCEPT_FILL
>> 271 select USE_OF
>> 272 select CEVT_R4K
>> 273 select CSRC_R4K
>> 274 select SYNC_R4K
>> 275 select COMMON_CLK
>> 276 select BCM6345_L1_IRQ
>> 277 select BCM7038_L1_IRQ
>> 278 select BCM7120_L2_IRQ
>> 279 select BRCMSTB_L2_IRQ
>> 280 select IRQ_MIPS_CPU
>> 281 select DMA_NONCOHERENT
>> 282 select SYS_SUPPORTS_32BIT_KERNEL
>> 283 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 284 select SYS_SUPPORTS_BIG_ENDIAN
>> 285 select SYS_SUPPORTS_HIGHMEM
>> 286 select SYS_HAS_CPU_BMIPS32_3300
>> 287 select SYS_HAS_CPU_BMIPS4350
>> 288 select SYS_HAS_CPU_BMIPS4380
>> 289 select SYS_HAS_CPU_BMIPS5000
>> 290 select SWAP_IO_SPACE
>> 291 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 292 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 293 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 294 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 295 select HARDIRQS_SW_RESEND
>> 296 select HAVE_PCI
>> 297 select PCI_DRIVERS_GENERIC
>> 298 select FW_CFE
>> 299 help
>> 300 Build a generic DT-based kernel image that boots on select
>> 301 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 302 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 303 must be set appropriately for your board.
>> 304
>> 305 config BCM47XX
>> 306 bool "Broadcom BCM47XX based boards"
>> 307 select BOOT_RAW
>> 308 select CEVT_R4K
>> 309 select CSRC_R4K
>> 310 select DMA_NONCOHERENT
>> 311 select HAVE_PCI
>> 312 select IRQ_MIPS_CPU
>> 313 select SYS_HAS_CPU_MIPS32_R1
>> 314 select NO_EXCEPT_FILL
>> 315 select SYS_SUPPORTS_32BIT_KERNEL
>> 316 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 317 select SYS_SUPPORTS_MIPS16
>> 318 select SYS_SUPPORTS_ZBOOT
>> 319 select SYS_HAS_EARLY_PRINTK
>> 320 select USE_GENERIC_EARLY_PRINTK_8250
>> 321 select GPIOLIB
>> 322 select LEDS_GPIO_REGISTER
>> 323 select BCM47XX_NVRAM
>> 324 select BCM47XX_SPROM
>> 325 select BCM47XX_SSB if !BCM47XX_BCMA
>> 326 help
>> 327 Support for BCM47XX based boards
>> 328
>> 329 config BCM63XX
>> 330 bool "Broadcom BCM63XX based boards"
>> 331 select BOOT_RAW
>> 332 select CEVT_R4K
>> 333 select CSRC_R4K
>> 334 select SYNC_R4K
>> 335 select DMA_NONCOHERENT
>> 336 select IRQ_MIPS_CPU
>> 337 select SYS_SUPPORTS_32BIT_KERNEL
>> 338 select SYS_SUPPORTS_BIG_ENDIAN
>> 339 select SYS_HAS_EARLY_PRINTK
>> 340 select SYS_HAS_CPU_BMIPS32_3300
>> 341 select SYS_HAS_CPU_BMIPS4350
>> 342 select SYS_HAS_CPU_BMIPS4380
>> 343 select SWAP_IO_SPACE
>> 344 select GPIOLIB
>> 345 select MIPS_L1_CACHE_SHIFT_4
>> 346 select HAVE_LEGACY_CLK
>> 347 help
>> 348 Support for BCM63XX based boards
>> 349
>> 350 config MIPS_COBALT
>> 351 bool "Cobalt Server"
>> 352 select CEVT_R4K
>> 353 select CSRC_R4K
>> 354 select CEVT_GT641XX
>> 355 select DMA_NONCOHERENT
>> 356 select FORCE_PCI
>> 357 select I8253
>> 358 select I8259
>> 359 select IRQ_MIPS_CPU
>> 360 select IRQ_GT641XX
>> 361 select PCI_GT64XXX_PCI0
>> 362 select SYS_HAS_CPU_NEVADA
>> 363 select SYS_HAS_EARLY_PRINTK
>> 364 select SYS_SUPPORTS_32BIT_KERNEL
>> 365 select SYS_SUPPORTS_64BIT_KERNEL
>> 366 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 367 select USE_GENERIC_EARLY_PRINTK_8250
>> 368
>> 369 config MACH_DECSTATION
>> 370 bool "DECstations"
>> 371 select BOOT_ELF32
>> 372 select CEVT_DS1287
>> 373 select CEVT_R4K if CPU_R4X00
>> 374 select CSRC_IOASIC
>> 375 select CSRC_R4K if CPU_R4X00
>> 376 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 377 select CPU_R4000_WORKAROUNDS if 64BIT
>> 378 select CPU_R4400_WORKAROUNDS if 64BIT
>> 379 select DMA_NONCOHERENT
>> 380 select NO_IOPORT_MAP
>> 381 select IRQ_MIPS_CPU
>> 382 select SYS_HAS_CPU_R3000
>> 383 select SYS_HAS_CPU_R4X00
>> 384 select SYS_SUPPORTS_32BIT_KERNEL
>> 385 select SYS_SUPPORTS_64BIT_KERNEL
>> 386 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 387 select SYS_SUPPORTS_128HZ
>> 388 select SYS_SUPPORTS_256HZ
>> 389 select SYS_SUPPORTS_1024HZ
>> 390 select MIPS_L1_CACHE_SHIFT_4
>> 391 help
>> 392 This enables support for DEC's MIPS based workstations. For details
>> 393 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 394 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 395
>> 396 If you have one of the following DECstation Models you definitely
>> 397 want to choose R4xx0 for the CPU Type:
>> 398
>> 399 DECstation 5000/50
>> 400 DECstation 5000/150
>> 401 DECstation 5000/260
>> 402 DECsystem 5900/260
>> 403
>> 404 otherwise choose R3000.
>> 405
>> 406 config MACH_JAZZ
>> 407 bool "Jazz family of machines"
>> 408 select ARC_MEMORY
>> 409 select ARC_PROMLIB
>> 410 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 411 select ARCH_MIGHT_HAVE_PC_SERIO
>> 412 select DMA_OPS
>> 413 select FW_ARC
>> 414 select FW_ARC32
>> 415 select ARCH_MAY_HAVE_PC_FDC
>> 416 select CEVT_R4K
>> 417 select CSRC_R4K
>> 418 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 419 select GENERIC_ISA_DMA
>> 420 select HAVE_PCSPKR_PLATFORM
>> 421 select IRQ_MIPS_CPU
>> 422 select I8253
>> 423 select I8259
>> 424 select ISA
>> 425 select SYS_HAS_CPU_R4X00
>> 426 select SYS_SUPPORTS_32BIT_KERNEL
>> 427 select SYS_SUPPORTS_64BIT_KERNEL
>> 428 select SYS_SUPPORTS_100HZ
>> 429 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 430 help
>> 431 This a family of machines based on the MIPS R4030 chipset which was
>> 432 used by several vendors to build RISC/os and Windows NT workstations.
>> 433 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 434 Olivetti M700-10 workstations.
>> 435
>> 436 config MACH_INGENIC_SOC
>> 437 bool "Ingenic SoC based machines"
>> 438 select MIPS_GENERIC
>> 439 select MACH_INGENIC
>> 440 select SYS_SUPPORTS_ZBOOT_UART16550
>> 441 select CPU_SUPPORTS_CPUFREQ
>> 442 select MIPS_EXTERNAL_TIMER
>> 443
>> 444 config LANTIQ
>> 445 bool "Lantiq based platforms"
>> 446 select DMA_NONCOHERENT
>> 447 select IRQ_MIPS_CPU
>> 448 select CEVT_R4K
>> 449 select CSRC_R4K
>> 450 select NO_EXCEPT_FILL
>> 451 select SYS_HAS_CPU_MIPS32_R1
>> 452 select SYS_HAS_CPU_MIPS32_R2
>> 453 select SYS_SUPPORTS_BIG_ENDIAN
>> 454 select SYS_SUPPORTS_32BIT_KERNEL
>> 455 select SYS_SUPPORTS_MIPS16
>> 456 select SYS_SUPPORTS_MULTITHREADING
>> 457 select SYS_SUPPORTS_VPE_LOADER
>> 458 select SYS_HAS_EARLY_PRINTK
>> 459 select GPIOLIB
>> 460 select SWAP_IO_SPACE
>> 461 select BOOT_RAW
>> 462 select HAVE_LEGACY_CLK
>> 463 select USE_OF
>> 464 select PINCTRL
>> 465 select PINCTRL_LANTIQ
>> 466 select ARCH_HAS_RESET_CONTROLLER
>> 467 select RESET_CONTROLLER
>> 468
>> 469 config MACH_LOONGSON32
>> 470 bool "Loongson 32-bit family of machines"
>> 471 select SYS_SUPPORTS_ZBOOT
>> 472 help
>> 473 This enables support for the Loongson-1 family of machines.
>> 474
>> 475 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 476 the Institute of Computing Technology (ICT), Chinese Academy of
>> 477 Sciences (CAS).
>> 478
>> 479 config MACH_LOONGSON2EF
>> 480 bool "Loongson-2E/F family of machines"
>> 481 select SYS_SUPPORTS_ZBOOT
>> 482 help
>> 483 This enables the support of early Loongson-2E/F family of machines.
>> 484
>> 485 config MACH_LOONGSON64
>> 486 bool "Loongson 64-bit family of machines"
>> 487 select ARCH_SPARSEMEM_ENABLE
>> 488 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 489 select ARCH_MIGHT_HAVE_PC_SERIO
>> 490 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 491 select BOOT_ELF32
>> 492 select BOARD_SCACHE
>> 493 select CSRC_R4K
>> 494 select CEVT_R4K
>> 495 select CPU_HAS_WB
>> 496 select FORCE_PCI
>> 497 select ISA
>> 498 select I8259
>> 499 select IRQ_MIPS_CPU
>> 500 select NO_EXCEPT_FILL
>> 501 select NR_CPUS_DEFAULT_64
>> 502 select USE_GENERIC_EARLY_PRINTK_8250
>> 503 select PCI_DRIVERS_GENERIC
>> 504 select SYS_HAS_CPU_LOONGSON64
>> 505 select SYS_HAS_EARLY_PRINTK
>> 506 select SYS_SUPPORTS_SMP
>> 507 select SYS_SUPPORTS_HOTPLUG_CPU
>> 508 select SYS_SUPPORTS_NUMA
>> 509 select SYS_SUPPORTS_64BIT_KERNEL
>> 510 select SYS_SUPPORTS_HIGHMEM
>> 511 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 512 select SYS_SUPPORTS_ZBOOT
>> 513 select SYS_SUPPORTS_RELOCATABLE
>> 514 select ZONE_DMA32
>> 515 select COMMON_CLK
>> 516 select USE_OF
>> 517 select BUILTIN_DTB
>> 518 select PCI_HOST_GENERIC
>> 519 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
>> 520 help
>> 521 This enables the support of Loongson-2/3 family of machines.
>> 522
>> 523 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
>> 524 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
>> 525 and Loongson-2F which will be removed), developed by the Institute
>> 526 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
>> 527
>> 528 config MIPS_MALTA
>> 529 bool "MIPS Malta board"
>> 530 select ARCH_MAY_HAVE_PC_FDC
>> 531 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 532 select ARCH_MIGHT_HAVE_PC_SERIO
>> 533 select BOOT_ELF32
>> 534 select BOOT_RAW
>> 535 select BUILTIN_DTB
>> 536 select CEVT_R4K
>> 537 select CLKSRC_MIPS_GIC
>> 538 select COMMON_CLK
>> 539 select CSRC_R4K
>> 540 select DMA_NONCOHERENT
>> 541 select GENERIC_ISA_DMA
>> 542 select HAVE_PCSPKR_PLATFORM
>> 543 select HAVE_PCI
>> 544 select I8253
>> 545 select I8259
>> 546 select IRQ_MIPS_CPU
>> 547 select MIPS_BONITO64
>> 548 select MIPS_CPU_SCACHE
>> 549 select MIPS_GIC
>> 550 select MIPS_L1_CACHE_SHIFT_6
>> 551 select MIPS_MSC
>> 552 select PCI_GT64XXX_PCI0
>> 553 select SMP_UP if SMP
>> 554 select SWAP_IO_SPACE
>> 555 select SYS_HAS_CPU_MIPS32_R1
>> 556 select SYS_HAS_CPU_MIPS32_R2
>> 557 select SYS_HAS_CPU_MIPS32_R3_5
>> 558 select SYS_HAS_CPU_MIPS32_R5
>> 559 select SYS_HAS_CPU_MIPS32_R6
>> 560 select SYS_HAS_CPU_MIPS64_R1
>> 561 select SYS_HAS_CPU_MIPS64_R2
>> 562 select SYS_HAS_CPU_MIPS64_R6
>> 563 select SYS_HAS_CPU_NEVADA
>> 564 select SYS_HAS_CPU_RM7000
>> 565 select SYS_SUPPORTS_32BIT_KERNEL
>> 566 select SYS_SUPPORTS_64BIT_KERNEL
>> 567 select SYS_SUPPORTS_BIG_ENDIAN
>> 568 select SYS_SUPPORTS_HIGHMEM
>> 569 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 570 select SYS_SUPPORTS_MICROMIPS
>> 571 select SYS_SUPPORTS_MIPS16
>> 572 select SYS_SUPPORTS_MIPS_CMP
>> 573 select SYS_SUPPORTS_MIPS_CPS
>> 574 select SYS_SUPPORTS_MULTITHREADING
>> 575 select SYS_SUPPORTS_RELOCATABLE
>> 576 select SYS_SUPPORTS_SMARTMIPS
>> 577 select SYS_SUPPORTS_VPE_LOADER
>> 578 select SYS_SUPPORTS_ZBOOT
>> 579 select USE_OF
>> 580 select WAR_ICACHE_REFILLS
>> 581 select ZONE_DMA32 if 64BIT
>> 582 help
>> 583 This enables support for the MIPS Technologies Malta evaluation
>> 584 board.
>> 585
>> 586 config MACH_PIC32
>> 587 bool "Microchip PIC32 Family"
>> 588 help
>> 589 This enables support for the Microchip PIC32 family of platforms.
>> 590
>> 591 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 592 microcontrollers.
>> 593
>> 594 config MACH_NINTENDO64
>> 595 bool "Nintendo 64 console"
>> 596 select CEVT_R4K
>> 597 select CSRC_R4K
>> 598 select SYS_HAS_CPU_R4300
>> 599 select SYS_SUPPORTS_BIG_ENDIAN
>> 600 select SYS_SUPPORTS_ZBOOT
>> 601 select SYS_SUPPORTS_32BIT_KERNEL
>> 602 select SYS_SUPPORTS_64BIT_KERNEL
>> 603 select DMA_NONCOHERENT
>> 604 select IRQ_MIPS_CPU
>> 605
>> 606 config RALINK
>> 607 bool "Ralink based machines"
>> 608 select CEVT_R4K
>> 609 select COMMON_CLK
>> 610 select CSRC_R4K
>> 611 select BOOT_RAW
>> 612 select DMA_NONCOHERENT
>> 613 select IRQ_MIPS_CPU
>> 614 select USE_OF
>> 615 select SYS_HAS_CPU_MIPS32_R2
>> 616 select SYS_SUPPORTS_32BIT_KERNEL
>> 617 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 618 select SYS_SUPPORTS_MIPS16
>> 619 select SYS_SUPPORTS_ZBOOT
>> 620 select SYS_HAS_EARLY_PRINTK
>> 621 select ARCH_HAS_RESET_CONTROLLER
>> 622 select RESET_CONTROLLER
>> 623
>> 624 config MACH_REALTEK_RTL
>> 625 bool "Realtek RTL838x/RTL839x based machines"
>> 626 select MIPS_GENERIC
>> 627 select DMA_NONCOHERENT
>> 628 select IRQ_MIPS_CPU
>> 629 select CSRC_R4K
>> 630 select CEVT_R4K
>> 631 select SYS_HAS_CPU_MIPS32_R1
>> 632 select SYS_HAS_CPU_MIPS32_R2
>> 633 select SYS_SUPPORTS_BIG_ENDIAN
>> 634 select SYS_SUPPORTS_32BIT_KERNEL
>> 635 select SYS_SUPPORTS_MIPS16
>> 636 select SYS_SUPPORTS_MULTITHREADING
>> 637 select SYS_SUPPORTS_VPE_LOADER
>> 638 select BOOT_RAW
>> 639 select PINCTRL
>> 640 select USE_OF
>> 641
>> 642 config SGI_IP22
>> 643 bool "SGI IP22 (Indy/Indigo2)"
>> 644 select ARC_MEMORY
>> 645 select ARC_PROMLIB
>> 646 select FW_ARC
>> 647 select FW_ARC32
>> 648 select ARCH_MIGHT_HAVE_PC_SERIO
>> 649 select BOOT_ELF32
>> 650 select CEVT_R4K
>> 651 select CSRC_R4K
>> 652 select DEFAULT_SGI_PARTITION
>> 653 select DMA_NONCOHERENT
>> 654 select HAVE_EISA
>> 655 select I8253
>> 656 select I8259
>> 657 select IP22_CPU_SCACHE
>> 658 select IRQ_MIPS_CPU
>> 659 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 660 select SGI_HAS_I8042
>> 661 select SGI_HAS_INDYDOG
>> 662 select SGI_HAS_HAL2
>> 663 select SGI_HAS_SEEQ
>> 664 select SGI_HAS_WD93
>> 665 select SGI_HAS_ZILOG
>> 666 select SWAP_IO_SPACE
>> 667 select SYS_HAS_CPU_R4X00
>> 668 select SYS_HAS_CPU_R5000
>> 669 select SYS_HAS_EARLY_PRINTK
>> 670 select SYS_SUPPORTS_32BIT_KERNEL
>> 671 select SYS_SUPPORTS_64BIT_KERNEL
>> 672 select SYS_SUPPORTS_BIG_ENDIAN
>> 673 select WAR_R4600_V1_INDEX_ICACHEOP
>> 674 select WAR_R4600_V1_HIT_CACHEOP
>> 675 select WAR_R4600_V2_HIT_CACHEOP
>> 676 select MIPS_L1_CACHE_SHIFT_7
>> 677 help
>> 678 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 679 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 680 that runs on these, say Y here.
>> 681
>> 682 config SGI_IP27
>> 683 bool "SGI IP27 (Origin200/2000)"
>> 684 select ARCH_HAS_PHYS_TO_DMA
>> 685 select ARCH_SPARSEMEM_ENABLE
>> 686 select FW_ARC
>> 687 select FW_ARC64
>> 688 select ARC_CMDLINE_ONLY
>> 689 select BOOT_ELF64
>> 690 select DEFAULT_SGI_PARTITION
>> 691 select FORCE_PCI
>> 692 select SYS_HAS_EARLY_PRINTK
>> 693 select HAVE_PCI
>> 694 select IRQ_MIPS_CPU
>> 695 select IRQ_DOMAIN_HIERARCHY
>> 696 select NR_CPUS_DEFAULT_64
>> 697 select PCI_DRIVERS_GENERIC
>> 698 select PCI_XTALK_BRIDGE
>> 699 select SYS_HAS_CPU_R10000
>> 700 select SYS_SUPPORTS_64BIT_KERNEL
>> 701 select SYS_SUPPORTS_BIG_ENDIAN
>> 702 select SYS_SUPPORTS_NUMA
>> 703 select SYS_SUPPORTS_SMP
>> 704 select WAR_R10000_LLSC
>> 705 select MIPS_L1_CACHE_SHIFT_7
>> 706 select NUMA
>> 707 select HAVE_ARCH_NODEDATA_EXTENSION
>> 708 help
>> 709 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 710 workstations. To compile a Linux kernel that runs on these, say Y
>> 711 here.
>> 712
>> 713 config SGI_IP28
>> 714 bool "SGI IP28 (Indigo2 R10k)"
>> 715 select ARC_MEMORY
>> 716 select ARC_PROMLIB
>> 717 select FW_ARC
>> 718 select FW_ARC64
>> 719 select ARCH_MIGHT_HAVE_PC_SERIO
>> 720 select BOOT_ELF64
>> 721 select CEVT_R4K
>> 722 select CSRC_R4K
>> 723 select DEFAULT_SGI_PARTITION
>> 724 select DMA_NONCOHERENT
>> 725 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 726 select IRQ_MIPS_CPU
>> 727 select HAVE_EISA
>> 728 select I8253
>> 729 select I8259
>> 730 select SGI_HAS_I8042
>> 731 select SGI_HAS_INDYDOG
>> 732 select SGI_HAS_HAL2
>> 733 select SGI_HAS_SEEQ
>> 734 select SGI_HAS_WD93
>> 735 select SGI_HAS_ZILOG
>> 736 select SWAP_IO_SPACE
>> 737 select SYS_HAS_CPU_R10000
>> 738 select SYS_HAS_EARLY_PRINTK
>> 739 select SYS_SUPPORTS_64BIT_KERNEL
>> 740 select SYS_SUPPORTS_BIG_ENDIAN
>> 741 select WAR_R10000_LLSC
>> 742 select MIPS_L1_CACHE_SHIFT_7
>> 743 help
>> 744 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 745 kernel that runs on these, say Y here.
>> 746
>> 747 config SGI_IP30
>> 748 bool "SGI IP30 (Octane/Octane2)"
>> 749 select ARCH_HAS_PHYS_TO_DMA
>> 750 select FW_ARC
>> 751 select FW_ARC64
>> 752 select BOOT_ELF64
>> 753 select CEVT_R4K
>> 754 select CSRC_R4K
>> 755 select FORCE_PCI
>> 756 select SYNC_R4K if SMP
>> 757 select ZONE_DMA32
>> 758 select HAVE_PCI
>> 759 select IRQ_MIPS_CPU
>> 760 select IRQ_DOMAIN_HIERARCHY
>> 761 select PCI_DRIVERS_GENERIC
>> 762 select PCI_XTALK_BRIDGE
>> 763 select SYS_HAS_EARLY_PRINTK
>> 764 select SYS_HAS_CPU_R10000
>> 765 select SYS_SUPPORTS_64BIT_KERNEL
>> 766 select SYS_SUPPORTS_BIG_ENDIAN
>> 767 select SYS_SUPPORTS_SMP
>> 768 select WAR_R10000_LLSC
>> 769 select MIPS_L1_CACHE_SHIFT_7
>> 770 select ARC_MEMORY
>> 771 help
>> 772 These are the SGI Octane and Octane2 graphics workstations. To
>> 773 compile a Linux kernel that runs on these, say Y here.
>> 774
>> 775 config SGI_IP32
>> 776 bool "SGI IP32 (O2)"
>> 777 select ARC_MEMORY
>> 778 select ARC_PROMLIB
>> 779 select ARCH_HAS_PHYS_TO_DMA
>> 780 select FW_ARC
>> 781 select FW_ARC32
>> 782 select BOOT_ELF32
>> 783 select CEVT_R4K
>> 784 select CSRC_R4K
>> 785 select DMA_NONCOHERENT
>> 786 select HAVE_PCI
>> 787 select IRQ_MIPS_CPU
>> 788 select R5000_CPU_SCACHE
>> 789 select RM7000_CPU_SCACHE
>> 790 select SYS_HAS_CPU_R5000
>> 791 select SYS_HAS_CPU_R10000 if BROKEN
>> 792 select SYS_HAS_CPU_RM7000
>> 793 select SYS_HAS_CPU_NEVADA
>> 794 select SYS_SUPPORTS_64BIT_KERNEL
>> 795 select SYS_SUPPORTS_BIG_ENDIAN
>> 796 select WAR_ICACHE_REFILLS
>> 797 help
>> 798 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 799
>> 800 config SIBYTE_CRHINE
>> 801 bool "Sibyte BCM91120C-CRhine"
>> 802 select BOOT_ELF32
>> 803 select SIBYTE_BCM1120
>> 804 select SWAP_IO_SPACE
>> 805 select SYS_HAS_CPU_SB1
>> 806 select SYS_SUPPORTS_BIG_ENDIAN
>> 807 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 808
>> 809 config SIBYTE_CARMEL
>> 810 bool "Sibyte BCM91120x-Carmel"
>> 811 select BOOT_ELF32
>> 812 select SIBYTE_BCM1120
>> 813 select SWAP_IO_SPACE
>> 814 select SYS_HAS_CPU_SB1
>> 815 select SYS_SUPPORTS_BIG_ENDIAN
>> 816 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 817
>> 818 config SIBYTE_CRHONE
>> 819 bool "Sibyte BCM91125C-CRhone"
>> 820 select BOOT_ELF32
>> 821 select SIBYTE_BCM1125
>> 822 select SWAP_IO_SPACE
>> 823 select SYS_HAS_CPU_SB1
>> 824 select SYS_SUPPORTS_BIG_ENDIAN
>> 825 select SYS_SUPPORTS_HIGHMEM
>> 826 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 827
>> 828 config SIBYTE_RHONE
>> 829 bool "Sibyte BCM91125E-Rhone"
>> 830 select BOOT_ELF32
>> 831 select SIBYTE_BCM1125H
>> 832 select SWAP_IO_SPACE
>> 833 select SYS_HAS_CPU_SB1
>> 834 select SYS_SUPPORTS_BIG_ENDIAN
>> 835 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 836
>> 837 config SIBYTE_SWARM
>> 838 bool "Sibyte BCM91250A-SWARM"
>> 839 select BOOT_ELF32
>> 840 select HAVE_PATA_PLATFORM
>> 841 select SIBYTE_SB1250
>> 842 select SWAP_IO_SPACE
>> 843 select SYS_HAS_CPU_SB1
>> 844 select SYS_SUPPORTS_BIG_ENDIAN
>> 845 select SYS_SUPPORTS_HIGHMEM
>> 846 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 847 select ZONE_DMA32 if 64BIT
>> 848 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 849
>> 850 config SIBYTE_LITTLESUR
>> 851 bool "Sibyte BCM91250C2-LittleSur"
>> 852 select BOOT_ELF32
>> 853 select HAVE_PATA_PLATFORM
>> 854 select SIBYTE_SB1250
>> 855 select SWAP_IO_SPACE
>> 856 select SYS_HAS_CPU_SB1
>> 857 select SYS_SUPPORTS_BIG_ENDIAN
>> 858 select SYS_SUPPORTS_HIGHMEM
>> 859 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 860 select ZONE_DMA32 if 64BIT
>> 861
>> 862 config SIBYTE_SENTOSA
>> 863 bool "Sibyte BCM91250E-Sentosa"
>> 864 select BOOT_ELF32
>> 865 select SIBYTE_SB1250
>> 866 select SWAP_IO_SPACE
>> 867 select SYS_HAS_CPU_SB1
>> 868 select SYS_SUPPORTS_BIG_ENDIAN
>> 869 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 870 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 871
>> 872 config SIBYTE_BIGSUR
>> 873 bool "Sibyte BCM91480B-BigSur"
>> 874 select BOOT_ELF32
>> 875 select NR_CPUS_DEFAULT_4
>> 876 select SIBYTE_BCM1x80
>> 877 select SWAP_IO_SPACE
>> 878 select SYS_HAS_CPU_SB1
>> 879 select SYS_SUPPORTS_BIG_ENDIAN
>> 880 select SYS_SUPPORTS_HIGHMEM
>> 881 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 882 select ZONE_DMA32 if 64BIT
>> 883 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 884
>> 885 config SNI_RM
>> 886 bool "SNI RM200/300/400"
>> 887 select ARC_MEMORY
>> 888 select ARC_PROMLIB
>> 889 select FW_ARC if CPU_LITTLE_ENDIAN
>> 890 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 891 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 892 select ARCH_MAY_HAVE_PC_FDC
>> 893 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 894 select ARCH_MIGHT_HAVE_PC_SERIO
>> 895 select BOOT_ELF32
>> 896 select CEVT_R4K
>> 897 select CSRC_R4K
>> 898 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 899 select DMA_NONCOHERENT
>> 900 select GENERIC_ISA_DMA
>> 901 select HAVE_EISA
>> 902 select HAVE_PCSPKR_PLATFORM
>> 903 select HAVE_PCI
>> 904 select IRQ_MIPS_CPU
>> 905 select I8253
>> 906 select I8259
>> 907 select ISA
>> 908 select MIPS_L1_CACHE_SHIFT_6
>> 909 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 910 select SYS_HAS_CPU_R4X00
>> 911 select SYS_HAS_CPU_R5000
>> 912 select SYS_HAS_CPU_R10000
>> 913 select R5000_CPU_SCACHE
>> 914 select SYS_HAS_EARLY_PRINTK
>> 915 select SYS_SUPPORTS_32BIT_KERNEL
>> 916 select SYS_SUPPORTS_64BIT_KERNEL
>> 917 select SYS_SUPPORTS_BIG_ENDIAN
>> 918 select SYS_SUPPORTS_HIGHMEM
>> 919 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 920 select WAR_R4600_V2_HIT_CACHEOP
>> 921 help
>> 922 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 923 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 924 Technology and now in turn merged with Fujitsu. Say Y here to
>> 925 support this machine type.
>> 926
>> 927 config MACH_TX49XX
>> 928 bool "Toshiba TX49 series based machines"
>> 929 select WAR_TX49XX_ICACHE_INDEX_INV
>> 930
>> 931 config MIKROTIK_RB532
>> 932 bool "Mikrotik RB532 boards"
>> 933 select CEVT_R4K
>> 934 select CSRC_R4K
>> 935 select DMA_NONCOHERENT
>> 936 select HAVE_PCI
>> 937 select IRQ_MIPS_CPU
>> 938 select SYS_HAS_CPU_MIPS32_R1
>> 939 select SYS_SUPPORTS_32BIT_KERNEL
>> 940 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 941 select SWAP_IO_SPACE
>> 942 select BOOT_RAW
>> 943 select GPIOLIB
>> 944 select MIPS_L1_CACHE_SHIFT_4
>> 945 help
>> 946 Support the Mikrotik(tm) RouterBoard 532 series,
>> 947 based on the IDT RC32434 SoC.
>> 948
>> 949 config CAVIUM_OCTEON_SOC
>> 950 bool "Cavium Networks Octeon SoC based boards"
>> 951 select CEVT_R4K
>> 952 select ARCH_HAS_PHYS_TO_DMA
>> 953 select HAVE_RAPIDIO
>> 954 select PHYS_ADDR_T_64BIT
>> 955 select SYS_SUPPORTS_64BIT_KERNEL
>> 956 select SYS_SUPPORTS_BIG_ENDIAN
>> 957 select EDAC_SUPPORT
>> 958 select EDAC_ATOMIC_SCRUB
>> 959 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 960 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 961 select SYS_HAS_EARLY_PRINTK
>> 962 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 963 select HAVE_PCI
>> 964 select HAVE_PLAT_DELAY
>> 965 select HAVE_PLAT_FW_INIT_CMDLINE
>> 966 select HAVE_PLAT_MEMCPY
>> 967 select ZONE_DMA32
>> 968 select GPIOLIB
>> 969 select USE_OF
>> 970 select ARCH_SPARSEMEM_ENABLE
>> 971 select SYS_SUPPORTS_SMP
>> 972 select NR_CPUS_DEFAULT_64
>> 973 select MIPS_NR_CPU_NR_MAP_1024
>> 974 select BUILTIN_DTB
>> 975 select MTD
>> 976 select MTD_COMPLEX_MAPPINGS
>> 977 select SWIOTLB
>> 978 select SYS_SUPPORTS_RELOCATABLE
>> 979 help
>> 980 This option supports all of the Octeon reference boards from Cavium
>> 981 Networks. It builds a kernel that dynamically determines the Octeon
>> 982 CPU type and supports all known board reference implementations.
>> 983 Some of the supported boards are:
>> 984 EBT3000
>> 985 EBH3000
>> 986 EBH3100
>> 987 Thunder
>> 988 Kodama
>> 989 Hikari
>> 990 Say Y here for most Octeon reference boards.
>> 991
>> 992 endchoice
>> 993
>> 994 source "arch/mips/alchemy/Kconfig"
>> 995 source "arch/mips/ath25/Kconfig"
>> 996 source "arch/mips/ath79/Kconfig"
>> 997 source "arch/mips/bcm47xx/Kconfig"
>> 998 source "arch/mips/bcm63xx/Kconfig"
>> 999 source "arch/mips/bmips/Kconfig"
>> 1000 source "arch/mips/generic/Kconfig"
>> 1001 source "arch/mips/ingenic/Kconfig"
>> 1002 source "arch/mips/jazz/Kconfig"
>> 1003 source "arch/mips/lantiq/Kconfig"
>> 1004 source "arch/mips/pic32/Kconfig"
>> 1005 source "arch/mips/ralink/Kconfig"
>> 1006 source "arch/mips/sgi-ip27/Kconfig"
>> 1007 source "arch/mips/sibyte/Kconfig"
>> 1008 source "arch/mips/txx9/Kconfig"
>> 1009 source "arch/mips/cavium-octeon/Kconfig"
>> 1010 source "arch/mips/loongson2ef/Kconfig"
>> 1011 source "arch/mips/loongson32/Kconfig"
>> 1012 source "arch/mips/loongson64/Kconfig"
>> 1013
>> 1014 endmenu
>> 1015
>> 1016 config GENERIC_HWEIGHT
>> 1017 bool
>> 1018 default y
>> 1019
>> 1020 config GENERIC_CALIBRATE_DELAY
>> 1021 bool
>> 1022 default y
342 1023
343 config SCHED_OMIT_FRAME_POINTER 1024 config SCHED_OMIT_FRAME_POINTER
344 bool 1025 bool
345 default y 1026 default y
346 1027
>> 1028 #
>> 1029 # Select some configuration options automatically based on user selections.
>> 1030 #
>> 1031 config FW_ARC
>> 1032 bool
>> 1033
347 config ARCH_MAY_HAVE_PC_FDC 1034 config ARCH_MAY_HAVE_PC_FDC
348 bool 1035 bool
349 default PCI <<
350 1036
351 config PPC_UDBG_16550 !! 1037 config BOOT_RAW
352 bool 1038 bool
353 1039
354 config GENERIC_TBSYNC !! 1040 config CEVT_BCM1480
355 bool 1041 bool
356 default y if PPC32 && SMP <<
357 1042
358 config AUDIT_ARCH !! 1043 config CEVT_DS1287
359 bool 1044 bool
360 default y <<
361 1045
362 config GENERIC_BUG !! 1046 config CEVT_GT641XX
363 bool 1047 bool
364 default y <<
365 depends on BUG <<
366 1048
367 config GENERIC_BUG_RELATIVE_POINTERS !! 1049 config CEVT_R4K
368 def_bool y !! 1050 bool
369 depends on GENERIC_BUG <<
370 1051
371 config SYS_SUPPORTS_APM_EMULATION !! 1052 config CEVT_SB1250
372 default y if PMAC_APM_EMU <<
373 bool 1053 bool
374 1054
375 config EPAPR_BOOT !! 1055 config CEVT_TXX9
376 bool 1056 bool
377 help <<
378 Used to allow a board to specify it <<
379 1057
380 config DEFAULT_UIMAGE !! 1058 config CSRC_BCM1480
381 bool 1059 bool
382 help <<
383 Used to allow a board to specify it <<
384 1060
385 config ARCH_HIBERNATION_POSSIBLE !! 1061 config CSRC_IOASIC
386 bool 1062 bool
387 default y <<
388 1063
389 config ARCH_SUSPEND_POSSIBLE !! 1064 config CSRC_R4K
390 def_bool y !! 1065 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
391 depends on ADB_PMU || PPC_EFIKA || PPC !! 1066 bool
392 (PPC_85xx && !PPC_E500MC) | <<
393 || 44x <<
394 1067
395 config ARCH_SUSPEND_NONZERO_CPU !! 1068 config CSRC_SB1250
396 def_bool y !! 1069 bool
397 depends on PPC_POWERNV || PPC_PSERIES <<
398 1070
399 config ARCH_HAS_ADD_PAGES !! 1071 config MIPS_CLOCK_VSYSCALL
400 def_bool y !! 1072 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
401 depends on ARCH_ENABLE_MEMORY_HOTPLUG <<
402 1073
403 config PPC_DCR_NATIVE !! 1074 config GPIO_TXX9
>> 1075 select GPIOLIB
404 bool 1076 bool
405 1077
406 config PPC_DCR_MMIO !! 1078 config FW_CFE
407 bool 1079 bool
408 1080
409 config PPC_DCR !! 1081 config ARCH_SUPPORTS_UPROBES
410 bool 1082 bool
411 depends on PPC_DCR_NATIVE || PPC_DCR_M <<
412 default y <<
413 1083
414 config PPC_PCI_OF_BUS_MAP !! 1084 config DMA_NONCOHERENT
415 bool "Use pci_to_OF_bus_map (deprecate !! 1085 bool
416 depends on PPC32 !! 1086 #
417 depends on PPC_PMAC || PPC_CHRP !! 1087 # MIPS allows mixing "slightly different" Cacheability and Coherency
418 help !! 1088 # Attribute bits. It is believed that the uncached access through
419 This option uses pci_to_OF_bus_map t !! 1089 # KSEG1 and the implementation specific "uncached accelerated" used
420 restricts the system to only having !! 1090 # by pgprot_writcombine can be mixed, and the latter sometimes provides
421 the "pci-OF-bus-map" property to be !! 1091 # significant advantages.
422 !! 1092 #
423 If unsure, say "N". !! 1093 select ARCH_HAS_DMA_WRITE_COMBINE
424 !! 1094 select ARCH_HAS_DMA_PREP_COHERENT
425 config PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT !! 1095 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
426 depends on PPC32 !! 1096 select ARCH_HAS_DMA_SET_UNCACHED
427 depends on !PPC_PCI_OF_BUS_MAP !! 1097 select DMA_NONCOHERENT_MMAP
428 bool "Assign PCI bus numbers from zero !! 1098 select NEED_DMA_MAP_STATE
429 default y !! 1099
>> 1100 config SYS_HAS_EARLY_PRINTK
>> 1101 bool
>> 1102
>> 1103 config SYS_SUPPORTS_HOTPLUG_CPU
>> 1104 bool
>> 1105
>> 1106 config MIPS_BONITO64
>> 1107 bool
>> 1108
>> 1109 config MIPS_MSC
>> 1110 bool
>> 1111
>> 1112 config SYNC_R4K
>> 1113 bool
>> 1114
>> 1115 config NO_IOPORT_MAP
>> 1116 def_bool n
>> 1117
>> 1118 config GENERIC_CSUM
>> 1119 def_bool CPU_NO_LOAD_STORE_LR
>> 1120
>> 1121 config GENERIC_ISA_DMA
>> 1122 bool
>> 1123 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1124 select ISA_DMA_API
>> 1125
>> 1126 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1127 bool
>> 1128 select GENERIC_ISA_DMA
>> 1129
>> 1130 config HAVE_PLAT_DELAY
>> 1131 bool
>> 1132
>> 1133 config HAVE_PLAT_FW_INIT_CMDLINE
>> 1134 bool
>> 1135
>> 1136 config HAVE_PLAT_MEMCPY
>> 1137 bool
>> 1138
>> 1139 config ISA_DMA_API
>> 1140 bool
>> 1141
>> 1142 config SYS_SUPPORTS_RELOCATABLE
>> 1143 bool
430 help 1144 help
431 By default on PPC32 were PCI bus num !! 1145 Selected if the platform supports relocating the kernel.
432 So system could have only 256 PCI bu !! 1146 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
433 PCI domains. When this option is ena !! 1147 to allow access to command line and entropy sources.
434 PCI domain dependent and each PCI co !! 1148
435 256 PCI buses, like it is on other L !! 1149 #
>> 1150 # Endianness selection. Sufficiently obscure so many users don't know what to
>> 1151 # answer,so we try hard to limit the available choices. Also the use of a
>> 1152 # choice statement should be more obvious to the user.
>> 1153 #
>> 1154 choice
>> 1155 prompt "Endianness selection"
>> 1156 help
>> 1157 Some MIPS machines can be configured for either little or big endian
>> 1158 byte order. These modes require different kernels and a different
>> 1159 Linux distribution. In general there is one preferred byteorder for a
>> 1160 particular system but some systems are just as commonly used in the
>> 1161 one or the other endianness.
>> 1162
>> 1163 config CPU_BIG_ENDIAN
>> 1164 bool "Big endian"
>> 1165 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1166
>> 1167 config CPU_LITTLE_ENDIAN
>> 1168 bool "Little endian"
>> 1169 depends on SYS_SUPPORTS_LITTLE_ENDIAN
>> 1170
>> 1171 endchoice
436 1172
437 config PPC_OF_PLATFORM_PCI !! 1173 config EXPORT_UASM
438 bool 1174 bool
439 depends on PCI <<
440 depends on PPC64 # not supported on 32 <<
441 1175
442 config ARCH_SUPPORTS_UPROBES !! 1176 config SYS_SUPPORTS_APM_EMULATION
443 def_bool y !! 1177 bool
444 1178
445 config PPC_ADV_DEBUG_REGS !! 1179 config SYS_SUPPORTS_BIG_ENDIAN
446 bool 1180 bool
447 depends on BOOKE <<
448 default y <<
449 1181
450 config PPC_ADV_DEBUG_IACS !! 1182 config SYS_SUPPORTS_LITTLE_ENDIAN
451 int !! 1183 bool
452 depends on PPC_ADV_DEBUG_REGS <<
453 default 4 if 44x <<
454 default 2 <<
455 1184
456 config PPC_ADV_DEBUG_DACS !! 1185 config MIPS_HUGE_TLB_SUPPORT
457 int !! 1186 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
458 depends on PPC_ADV_DEBUG_REGS <<
459 default 2 <<
460 1187
461 config PPC_ADV_DEBUG_DVCS !! 1188 config IRQ_MSP_SLP
462 int !! 1189 bool
463 depends on PPC_ADV_DEBUG_REGS <<
464 default 2 if 44x <<
465 default 0 <<
466 1190
467 config PPC_ADV_DEBUG_DAC_RANGE !! 1191 config IRQ_MSP_CIC
468 bool 1192 bool
469 depends on PPC_ADV_DEBUG_REGS && 44x <<
470 default y <<
471 1193
472 config PPC_DAWR !! 1194 config IRQ_TXX9
473 bool 1195 bool
474 1196
475 config PGTABLE_LEVELS !! 1197 config IRQ_GT641XX
>> 1198 bool
>> 1199
>> 1200 config PCI_GT64XXX_PCI0
>> 1201 bool
>> 1202
>> 1203 config PCI_XTALK_BRIDGE
>> 1204 bool
>> 1205
>> 1206 config NO_EXCEPT_FILL
>> 1207 bool
>> 1208
>> 1209 config MIPS_SPRAM
>> 1210 bool
>> 1211
>> 1212 config SWAP_IO_SPACE
>> 1213 bool
>> 1214
>> 1215 config SGI_HAS_INDYDOG
>> 1216 bool
>> 1217
>> 1218 config SGI_HAS_HAL2
>> 1219 bool
>> 1220
>> 1221 config SGI_HAS_SEEQ
>> 1222 bool
>> 1223
>> 1224 config SGI_HAS_WD93
>> 1225 bool
>> 1226
>> 1227 config SGI_HAS_ZILOG
>> 1228 bool
>> 1229
>> 1230 config SGI_HAS_I8042
>> 1231 bool
>> 1232
>> 1233 config DEFAULT_SGI_PARTITION
>> 1234 bool
>> 1235
>> 1236 config FW_ARC32
>> 1237 bool
>> 1238
>> 1239 config FW_SNIPROM
>> 1240 bool
>> 1241
>> 1242 config BOOT_ELF32
>> 1243 bool
>> 1244
>> 1245 config MIPS_L1_CACHE_SHIFT_4
>> 1246 bool
>> 1247
>> 1248 config MIPS_L1_CACHE_SHIFT_5
>> 1249 bool
>> 1250
>> 1251 config MIPS_L1_CACHE_SHIFT_6
>> 1252 bool
>> 1253
>> 1254 config MIPS_L1_CACHE_SHIFT_7
>> 1255 bool
>> 1256
>> 1257 config MIPS_L1_CACHE_SHIFT
476 int 1258 int
477 default 2 if !PPC64 !! 1259 default "7" if MIPS_L1_CACHE_SHIFT_7
478 default 4 !! 1260 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1261 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1262 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1263 default "5"
479 1264
480 source "arch/powerpc/sysdev/Kconfig" !! 1265 config ARC_CMDLINE_ONLY
481 source "arch/powerpc/platforms/Kconfig" !! 1266 bool
482 1267
483 menu "Kernel options" !! 1268 config ARC_CONSOLE
>> 1269 bool "ARC console support"
>> 1270 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
484 1271
485 config HIGHMEM !! 1272 config ARC_MEMORY
486 bool "High memory support" !! 1273 bool
487 depends on PPC32 <<
488 select KMAP_LOCAL <<
489 1274
490 source "kernel/Kconfig.hz" !! 1275 config ARC_PROMLIB
>> 1276 bool
491 1277
492 config MATH_EMULATION !! 1278 config FW_ARC64
493 bool "Math emulation" !! 1279 bool
494 depends on 44x || PPC_8xx || PPC_MPC83 !! 1280
495 select PPC_FPU_REGS !! 1281 config BOOT_ELF64
496 help !! 1282 bool
497 Some PowerPC chips designed for embe !! 1283
498 a floating-point unit and therefore !! 1284 menu "CPU selection"
499 floating-point instructions in the P <<
500 say Y here, the kernel will include <<
501 unit, which will allow programs that <<
502 instructions to run. <<
503 <<
504 This is also useful to emulate missi <<
505 such as fsqrt on cores that do have <<
506 them (such as Freescale BookE). <<
507 1285
508 choice 1286 choice
509 prompt "Math emulation options" !! 1287 prompt "CPU type"
510 default MATH_EMULATION_FULL !! 1288 default CPU_R4X00
511 depends on MATH_EMULATION <<
512 <<
513 config MATH_EMULATION_FULL <<
514 bool "Emulate all the floating point i <<
515 help <<
516 Select this option will enable the k <<
517 all the floating point instructions. <<
518 a FPU, you should select this. <<
519 1289
520 config MATH_EMULATION_HW_UNIMPLEMENTED !! 1290 config CPU_LOONGSON64
521 bool "Just emulate the FPU unimplement !! 1291 bool "Loongson 64-bit CPU"
>> 1292 depends on SYS_HAS_CPU_LOONGSON64
>> 1293 select ARCH_HAS_PHYS_TO_DMA
>> 1294 select CPU_MIPSR2
>> 1295 select CPU_HAS_PREFETCH
>> 1296 select CPU_SUPPORTS_64BIT_KERNEL
>> 1297 select CPU_SUPPORTS_HIGHMEM
>> 1298 select CPU_SUPPORTS_HUGEPAGES
>> 1299 select CPU_SUPPORTS_MSA
>> 1300 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
>> 1301 select CPU_MIPSR2_IRQ_VI
>> 1302 select WEAK_ORDERING
>> 1303 select WEAK_REORDERING_BEYOND_LLSC
>> 1304 select MIPS_ASID_BITS_VARIABLE
>> 1305 select MIPS_PGD_C0_CONTEXT
>> 1306 select MIPS_L1_CACHE_SHIFT_6
>> 1307 select MIPS_FP_SUPPORT
>> 1308 select GPIOLIB
>> 1309 select SWIOTLB
>> 1310 select HAVE_KVM
>> 1311 help
>> 1312 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
>> 1313 cores implements the MIPS64R2 instruction set with many extensions,
>> 1314 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
>> 1315 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
>> 1316 Loongson-2E/2F is not covered here and will be removed in future.
>> 1317
>> 1318 config LOONGSON3_ENHANCEMENT
>> 1319 bool "New Loongson-3 CPU Enhancements"
>> 1320 default n
>> 1321 depends on CPU_LOONGSON64
522 help 1322 help
523 Select this if you know there does h !! 1323 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
524 SoC, but some floating point instruc !! 1324 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1325 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
>> 1326 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1327 Fast TLB refill support, etc.
>> 1328
>> 1329 This option enable those enhancements which are not probed at run
>> 1330 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1331 please say 'N' here. If you want a high-performance kernel to run on
>> 1332 new Loongson-3 machines only, please say 'Y' here.
>> 1333
>> 1334 config CPU_LOONGSON3_WORKAROUNDS
>> 1335 bool "Loongson-3 LLSC Workarounds"
>> 1336 default y if SMP
>> 1337 depends on CPU_LOONGSON64
>> 1338 help
>> 1339 Loongson-3 processors have the llsc issues which require workarounds.
>> 1340 Without workarounds the system may hang unexpectedly.
>> 1341
>> 1342 Say Y, unless you know what you are doing.
>> 1343
>> 1344 config CPU_LOONGSON3_CPUCFG_EMULATION
>> 1345 bool "Emulate the CPUCFG instruction on older Loongson cores"
>> 1346 default y
>> 1347 depends on CPU_LOONGSON64
>> 1348 help
>> 1349 Loongson-3A R4 and newer have the CPUCFG instruction available for
>> 1350 userland to query CPU capabilities, much like CPUID on x86. This
>> 1351 option provides emulation of the instruction on older Loongson
>> 1352 cores, back to Loongson-3A1000.
>> 1353
>> 1354 If unsure, please say Y.
>> 1355
>> 1356 config CPU_LOONGSON2E
>> 1357 bool "Loongson 2E"
>> 1358 depends on SYS_HAS_CPU_LOONGSON2E
>> 1359 select CPU_LOONGSON2EF
>> 1360 help
>> 1361 The Loongson 2E processor implements the MIPS III instruction set
>> 1362 with many extensions.
>> 1363
>> 1364 It has an internal FPGA northbridge, which is compatible to
>> 1365 bonito64.
>> 1366
>> 1367 config CPU_LOONGSON2F
>> 1368 bool "Loongson 2F"
>> 1369 depends on SYS_HAS_CPU_LOONGSON2F
>> 1370 select CPU_LOONGSON2EF
>> 1371 select GPIOLIB
>> 1372 help
>> 1373 The Loongson 2F processor implements the MIPS III instruction set
>> 1374 with many extensions.
>> 1375
>> 1376 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1377 have a similar programming interface with FPGA northbridge used in
>> 1378 Loongson2E.
>> 1379
>> 1380 config CPU_LOONGSON1B
>> 1381 bool "Loongson 1B"
>> 1382 depends on SYS_HAS_CPU_LOONGSON1B
>> 1383 select CPU_LOONGSON32
>> 1384 select LEDS_GPIO_REGISTER
>> 1385 help
>> 1386 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1387 Release 1 instruction set and part of the MIPS32 Release 2
>> 1388 instruction set.
>> 1389
>> 1390 config CPU_LOONGSON1C
>> 1391 bool "Loongson 1C"
>> 1392 depends on SYS_HAS_CPU_LOONGSON1C
>> 1393 select CPU_LOONGSON32
>> 1394 select LEDS_GPIO_REGISTER
>> 1395 help
>> 1396 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1397 Release 1 instruction set and part of the MIPS32 Release 2
>> 1398 instruction set.
>> 1399
>> 1400 config CPU_MIPS32_R1
>> 1401 bool "MIPS32 Release 1"
>> 1402 depends on SYS_HAS_CPU_MIPS32_R1
>> 1403 select CPU_HAS_PREFETCH
>> 1404 select CPU_SUPPORTS_32BIT_KERNEL
>> 1405 select CPU_SUPPORTS_HIGHMEM
>> 1406 help
>> 1407 Choose this option to build a kernel for release 1 or later of the
>> 1408 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1409 MIPS processor are based on a MIPS32 processor. If you know the
>> 1410 specific type of processor in your system, choose those that one
>> 1411 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1412 Release 2 of the MIPS32 architecture is available since several
>> 1413 years so chances are you even have a MIPS32 Release 2 processor
>> 1414 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1415 performance.
525 1416
526 endchoice !! 1417 config CPU_MIPS32_R2
>> 1418 bool "MIPS32 Release 2"
>> 1419 depends on SYS_HAS_CPU_MIPS32_R2
>> 1420 select CPU_HAS_PREFETCH
>> 1421 select CPU_SUPPORTS_32BIT_KERNEL
>> 1422 select CPU_SUPPORTS_HIGHMEM
>> 1423 select CPU_SUPPORTS_MSA
>> 1424 select HAVE_KVM
>> 1425 help
>> 1426 Choose this option to build a kernel for release 2 or later of the
>> 1427 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1428 MIPS processor are based on a MIPS32 processor. If you know the
>> 1429 specific type of processor in your system, choose those that one
>> 1430 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1431
>> 1432 config CPU_MIPS32_R5
>> 1433 bool "MIPS32 Release 5"
>> 1434 depends on SYS_HAS_CPU_MIPS32_R5
>> 1435 select CPU_HAS_PREFETCH
>> 1436 select CPU_SUPPORTS_32BIT_KERNEL
>> 1437 select CPU_SUPPORTS_HIGHMEM
>> 1438 select CPU_SUPPORTS_MSA
>> 1439 select HAVE_KVM
>> 1440 select MIPS_O32_FP64_SUPPORT
>> 1441 help
>> 1442 Choose this option to build a kernel for release 5 or later of the
>> 1443 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1444 family, are based on a MIPS32r5 processor. If you own an older
>> 1445 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1446
>> 1447 config CPU_MIPS32_R6
>> 1448 bool "MIPS32 Release 6"
>> 1449 depends on SYS_HAS_CPU_MIPS32_R6
>> 1450 select CPU_HAS_PREFETCH
>> 1451 select CPU_NO_LOAD_STORE_LR
>> 1452 select CPU_SUPPORTS_32BIT_KERNEL
>> 1453 select CPU_SUPPORTS_HIGHMEM
>> 1454 select CPU_SUPPORTS_MSA
>> 1455 select HAVE_KVM
>> 1456 select MIPS_O32_FP64_SUPPORT
>> 1457 help
>> 1458 Choose this option to build a kernel for release 6 or later of the
>> 1459 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1460 family, are based on a MIPS32r6 processor. If you own an older
>> 1461 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1462
>> 1463 config CPU_MIPS64_R1
>> 1464 bool "MIPS64 Release 1"
>> 1465 depends on SYS_HAS_CPU_MIPS64_R1
>> 1466 select CPU_HAS_PREFETCH
>> 1467 select CPU_SUPPORTS_32BIT_KERNEL
>> 1468 select CPU_SUPPORTS_64BIT_KERNEL
>> 1469 select CPU_SUPPORTS_HIGHMEM
>> 1470 select CPU_SUPPORTS_HUGEPAGES
>> 1471 help
>> 1472 Choose this option to build a kernel for release 1 or later of the
>> 1473 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1474 MIPS processor are based on a MIPS64 processor. If you know the
>> 1475 specific type of processor in your system, choose those that one
>> 1476 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1477 Release 2 of the MIPS64 architecture is available since several
>> 1478 years so chances are you even have a MIPS64 Release 2 processor
>> 1479 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1480 performance.
527 1481
528 config PPC_TRANSACTIONAL_MEM !! 1482 config CPU_MIPS64_R2
529 bool "Transactional Memory support for !! 1483 bool "MIPS64 Release 2"
530 depends on PPC_BOOK3S_64 !! 1484 depends on SYS_HAS_CPU_MIPS64_R2
531 depends on SMP !! 1485 select CPU_HAS_PREFETCH
532 select ALTIVEC !! 1486 select CPU_SUPPORTS_32BIT_KERNEL
533 select VSX !! 1487 select CPU_SUPPORTS_64BIT_KERNEL
>> 1488 select CPU_SUPPORTS_HIGHMEM
>> 1489 select CPU_SUPPORTS_HUGEPAGES
>> 1490 select CPU_SUPPORTS_MSA
>> 1491 select HAVE_KVM
>> 1492 help
>> 1493 Choose this option to build a kernel for release 2 or later of the
>> 1494 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1495 MIPS processor are based on a MIPS64 processor. If you know the
>> 1496 specific type of processor in your system, choose those that one
>> 1497 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1498
>> 1499 config CPU_MIPS64_R5
>> 1500 bool "MIPS64 Release 5"
>> 1501 depends on SYS_HAS_CPU_MIPS64_R5
>> 1502 select CPU_HAS_PREFETCH
>> 1503 select CPU_SUPPORTS_32BIT_KERNEL
>> 1504 select CPU_SUPPORTS_64BIT_KERNEL
>> 1505 select CPU_SUPPORTS_HIGHMEM
>> 1506 select CPU_SUPPORTS_HUGEPAGES
>> 1507 select CPU_SUPPORTS_MSA
>> 1508 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1509 select HAVE_KVM
>> 1510 help
>> 1511 Choose this option to build a kernel for release 5 or later of the
>> 1512 MIPS64 architecture. This is a intermediate MIPS architecture
>> 1513 release partly implementing release 6 features. Though there is no
>> 1514 any hardware known to be based on this release.
>> 1515
>> 1516 config CPU_MIPS64_R6
>> 1517 bool "MIPS64 Release 6"
>> 1518 depends on SYS_HAS_CPU_MIPS64_R6
>> 1519 select CPU_HAS_PREFETCH
>> 1520 select CPU_NO_LOAD_STORE_LR
>> 1521 select CPU_SUPPORTS_32BIT_KERNEL
>> 1522 select CPU_SUPPORTS_64BIT_KERNEL
>> 1523 select CPU_SUPPORTS_HIGHMEM
>> 1524 select CPU_SUPPORTS_HUGEPAGES
>> 1525 select CPU_SUPPORTS_MSA
>> 1526 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1527 select HAVE_KVM
>> 1528 help
>> 1529 Choose this option to build a kernel for release 6 or later of the
>> 1530 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1531 family, are based on a MIPS64r6 processor. If you own an older
>> 1532 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1533
>> 1534 config CPU_P5600
>> 1535 bool "MIPS Warrior P5600"
>> 1536 depends on SYS_HAS_CPU_P5600
>> 1537 select CPU_HAS_PREFETCH
>> 1538 select CPU_SUPPORTS_32BIT_KERNEL
>> 1539 select CPU_SUPPORTS_HIGHMEM
>> 1540 select CPU_SUPPORTS_MSA
>> 1541 select CPU_SUPPORTS_CPUFREQ
>> 1542 select CPU_MIPSR2_IRQ_VI
>> 1543 select CPU_MIPSR2_IRQ_EI
>> 1544 select HAVE_KVM
>> 1545 select MIPS_O32_FP64_SUPPORT
>> 1546 help
>> 1547 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
>> 1548 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
>> 1549 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
>> 1550 level features like up to six P5600 calculation cores, CM2 with L2
>> 1551 cache, IOCU/IOMMU (though might be unused depending on the system-
>> 1552 specific IP core configuration), GIC, CPC, virtualisation module,
>> 1553 eJTAG and PDtrace.
>> 1554
>> 1555 config CPU_R3000
>> 1556 bool "R3000"
>> 1557 depends on SYS_HAS_CPU_R3000
>> 1558 select CPU_HAS_WB
>> 1559 select CPU_R3K_TLB
>> 1560 select CPU_SUPPORTS_32BIT_KERNEL
>> 1561 select CPU_SUPPORTS_HIGHMEM
>> 1562 help
>> 1563 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1564 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1565 *not* work on R4000 machines and vice versa. However, since most
>> 1566 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1567 might be a safe bet. If the resulting kernel does not work,
>> 1568 try to recompile with R3000.
>> 1569
>> 1570 config CPU_R4300
>> 1571 bool "R4300"
>> 1572 depends on SYS_HAS_CPU_R4300
>> 1573 select CPU_SUPPORTS_32BIT_KERNEL
>> 1574 select CPU_SUPPORTS_64BIT_KERNEL
>> 1575 help
>> 1576 MIPS Technologies R4300-series processors.
>> 1577
>> 1578 config CPU_R4X00
>> 1579 bool "R4x00"
>> 1580 depends on SYS_HAS_CPU_R4X00
>> 1581 select CPU_SUPPORTS_32BIT_KERNEL
>> 1582 select CPU_SUPPORTS_64BIT_KERNEL
>> 1583 select CPU_SUPPORTS_HUGEPAGES
>> 1584 help
>> 1585 MIPS Technologies R4000-series processors other than 4300, including
>> 1586 the R4000, R4400, R4600, and 4700.
>> 1587
>> 1588 config CPU_TX49XX
>> 1589 bool "R49XX"
>> 1590 depends on SYS_HAS_CPU_TX49XX
>> 1591 select CPU_HAS_PREFETCH
>> 1592 select CPU_SUPPORTS_32BIT_KERNEL
>> 1593 select CPU_SUPPORTS_64BIT_KERNEL
>> 1594 select CPU_SUPPORTS_HUGEPAGES
>> 1595
>> 1596 config CPU_R5000
>> 1597 bool "R5000"
>> 1598 depends on SYS_HAS_CPU_R5000
>> 1599 select CPU_SUPPORTS_32BIT_KERNEL
>> 1600 select CPU_SUPPORTS_64BIT_KERNEL
>> 1601 select CPU_SUPPORTS_HUGEPAGES
>> 1602 help
>> 1603 MIPS Technologies R5000-series processors other than the Nevada.
>> 1604
>> 1605 config CPU_R5500
>> 1606 bool "R5500"
>> 1607 depends on SYS_HAS_CPU_R5500
>> 1608 select CPU_SUPPORTS_32BIT_KERNEL
>> 1609 select CPU_SUPPORTS_64BIT_KERNEL
>> 1610 select CPU_SUPPORTS_HUGEPAGES
>> 1611 help
>> 1612 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1613 instruction set.
>> 1614
>> 1615 config CPU_NEVADA
>> 1616 bool "RM52xx"
>> 1617 depends on SYS_HAS_CPU_NEVADA
>> 1618 select CPU_SUPPORTS_32BIT_KERNEL
>> 1619 select CPU_SUPPORTS_64BIT_KERNEL
>> 1620 select CPU_SUPPORTS_HUGEPAGES
>> 1621 help
>> 1622 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1623
>> 1624 config CPU_R10000
>> 1625 bool "R10000"
>> 1626 depends on SYS_HAS_CPU_R10000
>> 1627 select CPU_HAS_PREFETCH
>> 1628 select CPU_SUPPORTS_32BIT_KERNEL
>> 1629 select CPU_SUPPORTS_64BIT_KERNEL
>> 1630 select CPU_SUPPORTS_HIGHMEM
>> 1631 select CPU_SUPPORTS_HUGEPAGES
>> 1632 help
>> 1633 MIPS Technologies R10000-series processors.
>> 1634
>> 1635 config CPU_RM7000
>> 1636 bool "RM7000"
>> 1637 depends on SYS_HAS_CPU_RM7000
>> 1638 select CPU_HAS_PREFETCH
>> 1639 select CPU_SUPPORTS_32BIT_KERNEL
>> 1640 select CPU_SUPPORTS_64BIT_KERNEL
>> 1641 select CPU_SUPPORTS_HIGHMEM
>> 1642 select CPU_SUPPORTS_HUGEPAGES
>> 1643
>> 1644 config CPU_SB1
>> 1645 bool "SB1"
>> 1646 depends on SYS_HAS_CPU_SB1
>> 1647 select CPU_SUPPORTS_32BIT_KERNEL
>> 1648 select CPU_SUPPORTS_64BIT_KERNEL
>> 1649 select CPU_SUPPORTS_HIGHMEM
>> 1650 select CPU_SUPPORTS_HUGEPAGES
>> 1651 select WEAK_ORDERING
>> 1652
>> 1653 config CPU_CAVIUM_OCTEON
>> 1654 bool "Cavium Octeon processor"
>> 1655 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1656 select CPU_HAS_PREFETCH
>> 1657 select CPU_SUPPORTS_64BIT_KERNEL
>> 1658 select WEAK_ORDERING
>> 1659 select CPU_SUPPORTS_HIGHMEM
>> 1660 select CPU_SUPPORTS_HUGEPAGES
>> 1661 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1662 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1663 select MIPS_L1_CACHE_SHIFT_7
>> 1664 select HAVE_KVM
>> 1665 help
>> 1666 The Cavium Octeon processor is a highly integrated chip containing
>> 1667 many ethernet hardware widgets for networking tasks. The processor
>> 1668 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1669 Full details can be found at http://www.caviumnetworks.com.
>> 1670
>> 1671 config CPU_BMIPS
>> 1672 bool "Broadcom BMIPS"
>> 1673 depends on SYS_HAS_CPU_BMIPS
>> 1674 select CPU_MIPS32
>> 1675 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1676 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1677 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1678 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1679 select CPU_SUPPORTS_32BIT_KERNEL
>> 1680 select DMA_NONCOHERENT
>> 1681 select IRQ_MIPS_CPU
>> 1682 select SWAP_IO_SPACE
>> 1683 select WEAK_ORDERING
>> 1684 select CPU_SUPPORTS_HIGHMEM
>> 1685 select CPU_HAS_PREFETCH
>> 1686 select CPU_SUPPORTS_CPUFREQ
>> 1687 select MIPS_EXTERNAL_TIMER
>> 1688 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
534 help 1689 help
535 Support user-mode Transactional Memo !! 1690 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
536 1691
537 config PPC_UV !! 1692 endchoice
538 bool "Ultravisor support" !! 1693
539 depends on KVM_BOOK3S_HV_POSSIBLE !! 1694 config CPU_MIPS32_3_5_FEATURES
540 depends on DEVICE_PRIVATE !! 1695 bool "MIPS32 Release 3.5 Features"
>> 1696 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1697 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
>> 1698 CPU_P5600
>> 1699 help
>> 1700 Choose this option to build a kernel for release 2 or later of the
>> 1701 MIPS32 architecture including features from the 3.5 release such as
>> 1702 support for Enhanced Virtual Addressing (EVA).
>> 1703
>> 1704 config CPU_MIPS32_3_5_EVA
>> 1705 bool "Enhanced Virtual Addressing (EVA)"
>> 1706 depends on CPU_MIPS32_3_5_FEATURES
>> 1707 select EVA
>> 1708 default y
>> 1709 help
>> 1710 Choose this option if you want to enable the Enhanced Virtual
>> 1711 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1712 One of its primary benefits is an increase in the maximum size
>> 1713 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1714
>> 1715 config CPU_MIPS32_R5_FEATURES
>> 1716 bool "MIPS32 Release 5 Features"
>> 1717 depends on SYS_HAS_CPU_MIPS32_R5
>> 1718 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
>> 1719 help
>> 1720 Choose this option to build a kernel for release 2 or later of the
>> 1721 MIPS32 architecture including features from release 5 such as
>> 1722 support for Extended Physical Addressing (XPA).
>> 1723
>> 1724 config CPU_MIPS32_R5_XPA
>> 1725 bool "Extended Physical Addressing (XPA)"
>> 1726 depends on CPU_MIPS32_R5_FEATURES
>> 1727 depends on !EVA
>> 1728 depends on !PAGE_SIZE_4KB
>> 1729 depends on SYS_SUPPORTS_HIGHMEM
>> 1730 select XPA
>> 1731 select HIGHMEM
>> 1732 select PHYS_ADDR_T_64BIT
541 default n 1733 default n
542 help 1734 help
543 This option paravirtualizes the kern !! 1735 Choose this option if you want to enable the Extended Physical
544 supports the Protected Execution Fac !! 1736 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
545 the ultravisor firmware runs at a pr !! 1737 benefit is to increase physical addressing equal to or greater
546 hypervisor. !! 1738 than 40 bits. Note that this has the side effect of turning on
547 !! 1739 64-bit addressing which in turn makes the PTEs 64-bit in size.
548 If unsure, say "N". !! 1740 If unsure, say 'N' here.
549 <<
550 config LD_HEAD_STUB_CATCH <<
551 bool "Reserve 256 bytes to cope with l <<
552 depends on PPC64 <<
553 help <<
554 Very large kernels can cause linker <<
555 code in head_64.S, which moves the h <<
556 specified location. This option can <<
557 <<
558 If unsure, say "N". <<
559 <<
560 config MPROFILE_KERNEL <<
561 depends on PPC64_ELF_ABI_V2 && FUNCTIO <<
562 def_bool $(success,$(srctree)/arch/pow <<
563 def_bool $(success,$(srctree)/arch/pow <<
564 <<
565 config ARCH_USING_PATCHABLE_FUNCTION_ENTRY <<
566 depends on FUNCTION_TRACER && (PPC32 | <<
567 depends on $(cc-option,-fpatchable-fun <<
568 def_bool y if PPC32 <<
569 def_bool $(success,$(srctree)/arch/pow <<
570 def_bool $(success,$(srctree)/arch/pow <<
571 1741
572 config HOTPLUG_CPU !! 1742 if CPU_LOONGSON2F
573 bool "Support for enabling/disabling C !! 1743 config CPU_NOP_WORKAROUNDS
574 depends on SMP && (PPC_PSERIES || \ !! 1744 bool
575 PPC_PMAC || PPC_POWERNV || FSL <<
576 help <<
577 Say Y here to be able to disable and <<
578 CPUs at runtime on SMP machines. <<
579 <<
580 Say N if you are unsure. <<
581 <<
582 config INTERRUPT_SANITIZE_REGISTERS <<
583 bool "Clear gprs on interrupt arrival" <<
584 depends on PPC64 && ARCH_HAS_SYSCALL_W <<
585 default PPC_BOOK3E_64 || PPC_PSERIES | <<
586 help <<
587 Reduce the influence of user registe <<
588 syscalls through clearing user state <<
589 the exception. <<
590 1745
591 config PPC_QUEUED_SPINLOCKS !! 1746 config CPU_JUMP_WORKAROUNDS
592 bool "Queued spinlocks" if EXPERT !! 1747 bool
593 depends on SMP !! 1748
594 default PPC_BOOK3S_64 !! 1749 config CPU_LOONGSON2F_WORKAROUNDS
>> 1750 bool "Loongson 2F Workarounds"
>> 1751 default y
>> 1752 select CPU_NOP_WORKAROUNDS
>> 1753 select CPU_JUMP_WORKAROUNDS
595 help 1754 help
596 Say Y here to use queued spinlocks w !! 1755 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
597 fairness on large SMP and NUMA syste !! 1756 require workarounds. Without workarounds the system may hang
598 performance. !! 1757 unexpectedly. For more information please refer to the gas
>> 1758 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
599 1759
600 config ARCH_CPU_PROBE_RELEASE !! 1760 Loongson 2F03 and later have fixed these issues and no workarounds
601 def_bool y !! 1761 are needed. The workarounds have no significant side effect on them
602 depends on HOTPLUG_CPU !! 1762 but may decrease the performance of the system so this option should
>> 1763 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1764 systems.
603 1765
604 config PPC64_SUPPORTS_MEMORY_FAILURE !! 1766 If unsure, please say Y.
605 bool "Add support for memory hwpoison" !! 1767 endif # CPU_LOONGSON2F
606 depends on PPC_BOOK3S_64 <<
607 default "y" if PPC_POWERNV <<
608 select ARCH_SUPPORTS_MEMORY_FAILURE <<
609 1768
610 config ARCH_SUPPORTS_KEXEC !! 1769 config SYS_SUPPORTS_ZBOOT
611 def_bool PPC_BOOK3S || PPC_E500 || (44 !! 1770 bool
>> 1771 select HAVE_KERNEL_GZIP
>> 1772 select HAVE_KERNEL_BZIP2
>> 1773 select HAVE_KERNEL_LZ4
>> 1774 select HAVE_KERNEL_LZMA
>> 1775 select HAVE_KERNEL_LZO
>> 1776 select HAVE_KERNEL_XZ
>> 1777 select HAVE_KERNEL_ZSTD
612 1778
613 config ARCH_SUPPORTS_KEXEC_FILE !! 1779 config SYS_SUPPORTS_ZBOOT_UART16550
614 def_bool PPC64 !! 1780 bool
>> 1781 select SYS_SUPPORTS_ZBOOT
615 1782
616 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 1783 config SYS_SUPPORTS_ZBOOT_UART_PROM
617 def_bool y !! 1784 bool
>> 1785 select SYS_SUPPORTS_ZBOOT
618 1786
619 config ARCH_SELECTS_KEXEC_FILE !! 1787 config CPU_LOONGSON2EF
620 def_bool y !! 1788 bool
621 depends on KEXEC_FILE !! 1789 select CPU_SUPPORTS_32BIT_KERNEL
622 select KEXEC_ELF !! 1790 select CPU_SUPPORTS_64BIT_KERNEL
623 select HAVE_IMA_KEXEC if IMA !! 1791 select CPU_SUPPORTS_HIGHMEM
624 !! 1792 select CPU_SUPPORTS_HUGEPAGES
625 config PPC64_BIG_ENDIAN_ELF_ABI_V2 !! 1793 select ARCH_HAS_PHYS_TO_DMA
626 # Option is available to BFD, but LLD <<
627 # always true there. <<
628 prompt "Build big-endian kernel using <<
629 def_bool y <<
630 depends on PPC64 && CPU_BIG_ENDIAN <<
631 depends on CC_HAS_ELFV2 <<
632 help <<
633 This builds the kernel image using t <<
634 V2 ABI Specification", which has a r <<
635 function calls. This internal kernel <<
636 userspace compatibility. <<
637 <<
638 The V2 ABI is standard for 64-bit li <<
639 it is less well tested by kernel and <<
640 build userspace this way, and it can <<
641 1794
642 config RELOCATABLE !! 1795 config CPU_LOONGSON32
643 bool "Build a relocatable kernel" !! 1796 bool
644 depends on PPC64 || (FLATMEM && (44x | !! 1797 select CPU_MIPS32
645 select NONSTATIC_KERNEL !! 1798 select CPU_MIPSR2
646 help !! 1799 select CPU_HAS_PREFETCH
647 This builds a kernel image that is c !! 1800 select CPU_SUPPORTS_32BIT_KERNEL
648 location the kernel is loaded at. Fo !! 1801 select CPU_SUPPORTS_HIGHMEM
649 alignment restrictions, and this fea !! 1802 select CPU_SUPPORTS_CPUFREQ
650 DYNAMIC_MEMSTART and hence overrides <<
651 16k-aligned base address. The kernel <<
652 position-independent executable (PIE <<
653 which are processed early in the boo <<
654 <<
655 One use is for the kexec on panic ca <<
656 must live at a different physical ad <<
657 kernel. <<
658 <<
659 Note: If CONFIG_RELOCATABLE=y, then <<
660 it has been loaded at and the compil <<
661 CONFIG_PHYSICAL_START is ignored. H <<
662 setting can still be useful to bootw <<
663 load address of the kernel (eg. u-bo <<
664 1803
665 config RANDOMIZE_BASE !! 1804 config CPU_BMIPS32_3300
666 bool "Randomize the address of the ker !! 1805 select SMP_UP if SMP
667 depends on PPC_85xx && FLATMEM !! 1806 bool
668 depends on RELOCATABLE <<
669 help <<
670 Randomizes the virtual address at wh <<
671 loaded, as a security feature that d <<
672 relying on knowledge of the location <<
673 1807
674 If unsure, say Y. !! 1808 config CPU_BMIPS4350
>> 1809 bool
>> 1810 select SYS_SUPPORTS_SMP
>> 1811 select SYS_SUPPORTS_HOTPLUG_CPU
675 1812
676 config RELOCATABLE_TEST !! 1813 config CPU_BMIPS4380
677 bool "Test relocatable kernel" !! 1814 bool
678 depends on (PPC64 && RELOCATABLE) !! 1815 select MIPS_L1_CACHE_SHIFT_6
679 help !! 1816 select SYS_SUPPORTS_SMP
680 This runs the relocatable kernel at !! 1817 select SYS_SUPPORTS_HOTPLUG_CPU
681 loaded at, which tends to be non-zer !! 1818 select CPU_HAS_RIXI
682 relocation code. <<
683 1819
684 config ARCH_SUPPORTS_CRASH_DUMP !! 1820 config CPU_BMIPS5000
685 def_bool PPC64 || PPC_BOOK3S_32 || PPC !! 1821 bool
>> 1822 select MIPS_CPU_SCACHE
>> 1823 select MIPS_L1_CACHE_SHIFT_7
>> 1824 select SYS_SUPPORTS_SMP
>> 1825 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1826 select CPU_HAS_RIXI
686 1827
687 config ARCH_SELECTS_CRASH_DUMP !! 1828 config SYS_HAS_CPU_LOONGSON64
688 def_bool y !! 1829 bool
689 depends on CRASH_DUMP !! 1830 select CPU_SUPPORTS_CPUFREQ
690 select RELOCATABLE if PPC64 || 44x || !! 1831 select CPU_HAS_RIXI
691 1832
692 config ARCH_SUPPORTS_CRASH_HOTPLUG !! 1833 config SYS_HAS_CPU_LOONGSON2E
693 def_bool y !! 1834 bool
694 depends on PPC64 <<
695 1835
696 config FA_DUMP !! 1836 config SYS_HAS_CPU_LOONGSON2F
697 bool "Firmware-assisted dump" !! 1837 bool
698 depends on CRASH_DUMP && PPC64 && (PPC !! 1838 select CPU_SUPPORTS_CPUFREQ
699 help !! 1839 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
700 A robust mechanism to get reliable k <<
701 assistance from firmware. This appro <<
702 instead firmware assists in booting <<
703 while preserving memory contents. Fi <<
704 is meant to be a kdump replacement o <<
705 speed not possible without system fi <<
706 <<
707 If unsure, say "y". Only special ker <<
708 need to say "N" here. <<
709 <<
710 config PRESERVE_FA_DUMP <<
711 bool "Preserve Firmware-assisted dump" <<
712 depends on PPC64 && PPC_POWERNV && !FA <<
713 help <<
714 On a kernel with FA_DUMP disabled, t <<
715 crash data from a previously crash'e <<
716 memory preserving kernel boot would <<
717 Petitboot kernel is the typical usec <<
718 <<
719 config OPAL_CORE <<
720 bool "Export OPAL memory as /sys/firmw <<
721 depends on PPC64 && PPC_POWERNV <<
722 help <<
723 This option uses the MPIPL support i <<
724 ELF core of OPAL memory after a cras <<
725 as /sys/firmware/opal/core file whic <<
726 OPAL crashes using GDB. <<
727 1840
728 config IRQ_ALL_CPUS !! 1841 config SYS_HAS_CPU_LOONGSON1B
729 bool "Distribute interrupts on all CPU !! 1842 bool
730 depends on SMP <<
731 help <<
732 This option gives the kernel permiss <<
733 multiple CPUs. Saying N here will r <<
734 CPU. Generally saying Y is safe, al <<
735 reported with SMP Power Macintoshes <<
736 1843
737 config NUMA !! 1844 config SYS_HAS_CPU_LOONGSON1C
738 bool "NUMA Memory Allocation and Sched !! 1845 bool
739 depends on PPC64 && SMP <<
740 default y if PPC_PSERIES || PPC_POWERN <<
741 select USE_PERCPU_NUMA_NODE_ID <<
742 help <<
743 Enable NUMA (Non-Uniform Memory Acce <<
744 <<
745 The kernel will try to allocate memo <<
746 local memory controller of the CPU a <<
747 NUMA awareness to the kernel. <<
748 1846
749 config NODES_SHIFT !! 1847 config SYS_HAS_CPU_MIPS32_R1
750 int !! 1848 bool
751 default "8" if PPC64 <<
752 default "4" <<
753 depends on NUMA <<
754 1849
755 config HAVE_MEMORYLESS_NODES !! 1850 config SYS_HAS_CPU_MIPS32_R2
756 def_bool y !! 1851 bool
757 depends on NUMA <<
758 1852
759 config ARCH_SELECT_MEMORY_MODEL !! 1853 config SYS_HAS_CPU_MIPS32_R3_5
760 def_bool y !! 1854 bool
761 depends on PPC64 <<
762 1855
763 config ARCH_FLATMEM_ENABLE !! 1856 config SYS_HAS_CPU_MIPS32_R5
764 def_bool y !! 1857 bool
765 depends on (PPC64 && !NUMA) || PPC32 !! 1858 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
766 1859
767 config ARCH_SPARSEMEM_ENABLE !! 1860 config SYS_HAS_CPU_MIPS32_R6
768 def_bool y !! 1861 bool
769 depends on PPC64 !! 1862 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
770 select SPARSEMEM_VMEMMAP_ENABLE <<
771 1863
772 config ARCH_SPARSEMEM_DEFAULT !! 1864 config SYS_HAS_CPU_MIPS64_R1
773 def_bool y !! 1865 bool
774 depends on PPC_BOOK3S_64 !! 1866
>> 1867 config SYS_HAS_CPU_MIPS64_R2
>> 1868 bool
>> 1869
>> 1870 config SYS_HAS_CPU_MIPS64_R5
>> 1871 bool
>> 1872 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1873
>> 1874 config SYS_HAS_CPU_MIPS64_R6
>> 1875 bool
>> 1876 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1877
>> 1878 config SYS_HAS_CPU_P5600
>> 1879 bool
>> 1880 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1881
>> 1882 config SYS_HAS_CPU_R3000
>> 1883 bool
>> 1884
>> 1885 config SYS_HAS_CPU_R4300
>> 1886 bool
>> 1887
>> 1888 config SYS_HAS_CPU_R4X00
>> 1889 bool
>> 1890
>> 1891 config SYS_HAS_CPU_TX49XX
>> 1892 bool
>> 1893
>> 1894 config SYS_HAS_CPU_R5000
>> 1895 bool
>> 1896
>> 1897 config SYS_HAS_CPU_R5500
>> 1898 bool
>> 1899
>> 1900 config SYS_HAS_CPU_NEVADA
>> 1901 bool
>> 1902
>> 1903 config SYS_HAS_CPU_R10000
>> 1904 bool
>> 1905 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
775 1906
776 config ILLEGAL_POINTER_VALUE !! 1907 config SYS_HAS_CPU_RM7000
777 hex !! 1908 bool
778 # This is roughly half way between the !! 1909
779 # of kernel space, which seems about a !! 1910 config SYS_HAS_CPU_SB1
780 default 0x5deadbeef0000000 if PPC64 !! 1911 bool
>> 1912
>> 1913 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1914 bool
>> 1915
>> 1916 config SYS_HAS_CPU_BMIPS
>> 1917 bool
>> 1918
>> 1919 config SYS_HAS_CPU_BMIPS32_3300
>> 1920 bool
>> 1921 select SYS_HAS_CPU_BMIPS
>> 1922
>> 1923 config SYS_HAS_CPU_BMIPS4350
>> 1924 bool
>> 1925 select SYS_HAS_CPU_BMIPS
>> 1926
>> 1927 config SYS_HAS_CPU_BMIPS4380
>> 1928 bool
>> 1929 select SYS_HAS_CPU_BMIPS
>> 1930
>> 1931 config SYS_HAS_CPU_BMIPS5000
>> 1932 bool
>> 1933 select SYS_HAS_CPU_BMIPS
>> 1934 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 1935
>> 1936 #
>> 1937 # CPU may reorder R->R, R->W, W->R, W->W
>> 1938 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 1939 #
>> 1940 config WEAK_ORDERING
>> 1941 bool
>> 1942
>> 1943 #
>> 1944 # CPU may reorder reads and writes beyond LL/SC
>> 1945 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 1946 #
>> 1947 config WEAK_REORDERING_BEYOND_LLSC
>> 1948 bool
>> 1949 endmenu
>> 1950
>> 1951 #
>> 1952 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 1953 #
>> 1954 config CPU_MIPS32
>> 1955 bool
>> 1956 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
>> 1957 CPU_MIPS32_R6 || CPU_P5600
>> 1958
>> 1959 config CPU_MIPS64
>> 1960 bool
>> 1961 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
>> 1962 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
>> 1963
>> 1964 #
>> 1965 # These indicate the revision of the architecture
>> 1966 #
>> 1967 config CPU_MIPSR1
>> 1968 bool
>> 1969 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 1970
>> 1971 config CPU_MIPSR2
>> 1972 bool
>> 1973 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 1974 select CPU_HAS_RIXI
>> 1975 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1976 select MIPS_SPRAM
>> 1977
>> 1978 config CPU_MIPSR5
>> 1979 bool
>> 1980 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
>> 1981 select CPU_HAS_RIXI
>> 1982 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1983 select MIPS_SPRAM
>> 1984
>> 1985 config CPU_MIPSR6
>> 1986 bool
>> 1987 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 1988 select CPU_HAS_RIXI
>> 1989 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1990 select HAVE_ARCH_BITREVERSE
>> 1991 select MIPS_ASID_BITS_VARIABLE
>> 1992 select MIPS_CRC_SUPPORT
>> 1993 select MIPS_SPRAM
>> 1994
>> 1995 config TARGET_ISA_REV
>> 1996 int
>> 1997 default 1 if CPU_MIPSR1
>> 1998 default 2 if CPU_MIPSR2
>> 1999 default 5 if CPU_MIPSR5
>> 2000 default 6 if CPU_MIPSR6
781 default 0 2001 default 0
>> 2002 help
>> 2003 Reflects the ISA revision being targeted by the kernel build. This
>> 2004 is effectively the Kconfig equivalent of MIPS_ISA_REV.
782 2005
783 config ARCH_MEMORY_PROBE !! 2006 config EVA
784 def_bool y !! 2007 bool
785 depends on MEMORY_HOTPLUG !! 2008
>> 2009 config XPA
>> 2010 bool
>> 2011
>> 2012 config SYS_SUPPORTS_32BIT_KERNEL
>> 2013 bool
>> 2014 config SYS_SUPPORTS_64BIT_KERNEL
>> 2015 bool
>> 2016 config CPU_SUPPORTS_32BIT_KERNEL
>> 2017 bool
>> 2018 config CPU_SUPPORTS_64BIT_KERNEL
>> 2019 bool
>> 2020 config CPU_SUPPORTS_CPUFREQ
>> 2021 bool
>> 2022 config CPU_SUPPORTS_ADDRWINCFG
>> 2023 bool
>> 2024 config CPU_SUPPORTS_HUGEPAGES
>> 2025 bool
>> 2026 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
>> 2027 config MIPS_PGD_C0_CONTEXT
>> 2028 bool
>> 2029 depends on 64BIT
>> 2030 default y if (CPU_MIPSR2 || CPU_MIPSR6)
>> 2031
>> 2032 #
>> 2033 # Set to y for ptrace access to watch registers.
>> 2034 #
>> 2035 config HARDWARE_WATCHPOINTS
>> 2036 bool
>> 2037 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2038
>> 2039 menu "Kernel type"
786 2040
787 choice 2041 choice
788 prompt "Page size" !! 2042 prompt "Kernel code model"
789 default PPC_64K_PAGES if PPC_BOOK3S_64 !! 2043 help
790 default PPC_4K_PAGES !! 2044 You should only select this option if you have a workload that
791 help !! 2045 actually benefits from 64-bit processing or if your machine has
792 Select the kernel logical page size. !! 2046 large memory. You will only be presented a single option in this
793 will reduce software overhead at eac !! 2047 menu if your system does not support both 32-bit and 64-bit kernels.
794 hardware prefetch mechanisms to be m !! 2048
795 larger dma transfers increasing IO e !! 2049 config 32BIT
796 overhead. However the utilization of !! 2050 bool "32-bit kernel"
797 For example, each cached file will u !! 2051 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
798 page size to hold its contents and t !! 2052 select TRAD_SIGNALS
799 end of file and the end of page is w !! 2053 help
800 !! 2054 Select this option if you want to build a 32-bit kernel.
801 Some dedicated systems, such as soft !! 2055
802 accelerated calculations, have shown !! 2056 config 64BIT
803 !! 2057 bool "64-bit kernel"
804 If you configure a 64 bit kernel for !! 2058 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
805 processor does not support them, the !! 2059 help
806 them with 4k pages, loading them on !! 2060 Select this option if you want to build a 64-bit kernel.
807 reduced software overhead and larger <<
808 For the 32 bit kernel, a large page <<
809 unless it is supported by the config <<
810 <<
811 If unsure, choose 4K_PAGES. <<
812 <<
813 config PPC_4K_PAGES <<
814 bool "4k page size" <<
815 select HAVE_ARCH_SOFT_DIRTY if PPC_BOO <<
816 select HAVE_PAGE_SIZE_4KB <<
817 <<
818 config PPC_16K_PAGES <<
819 bool "16k page size" <<
820 depends on 44x || PPC_8xx <<
821 select HAVE_PAGE_SIZE_16KB <<
822 <<
823 config PPC_64K_PAGES <<
824 bool "64k page size" <<
825 depends on 44x || PPC_BOOK3S_64 <<
826 select HAVE_ARCH_SOFT_DIRTY if PPC_BOO <<
827 select HAVE_PAGE_SIZE_64KB <<
828 <<
829 config PPC_256K_PAGES <<
830 bool "256k page size (Requires non-sta <<
831 depends on 44x && !PPC_47x <<
832 select HAVE_PAGE_SIZE_256KB <<
833 help <<
834 Make the page size 256k. <<
835 <<
836 The kernel will only be able to run <<
837 compiled with '-zmax-page-size' set <<
838 binutils later than 2.17.50.0.3, or <<
839 definition from 0x10000 to 0x40000 i <<
840 2061
841 endchoice 2062 endchoice
842 2063
843 config THREAD_SHIFT !! 2064 config MIPS_VA_BITS_48
844 int "Thread shift" if EXPERT !! 2065 bool "48 bits virtual memory"
845 range 13 15 !! 2066 depends on 64BIT
846 default "15" if PPC_256K_PAGES !! 2067 help
847 default "15" if PPC_PSERIES || PPC_POW !! 2068 Support a maximum at least 48 bits of application virtual
848 default "14" if PPC64 !! 2069 memory. Default is 40 bits or less, depending on the CPU.
849 default "13" !! 2070 For page sizes 16k and above, this option results in a small
850 help !! 2071 memory overhead for page tables. For 4k page size, a fourth
851 Used to define the stack size. The d !! 2072 level of page tables is added which imposes both a memory
852 want. Only change this if you know w !! 2073 overhead as well as slower TLB fault handling.
853 !! 2074
854 config DATA_SHIFT_BOOL !! 2075 If unsure, say N.
855 bool "Set custom data alignment" !! 2076
856 depends on ADVANCED_OPTIONS !! 2077 config ZBOOT_LOAD_ADDRESS
857 depends on STRICT_KERNEL_RWX || DEBUG_ !! 2078 hex "Compressed kernel load address"
858 depends on (PPC_8xx && !PIN_TLB_DATA & !! 2079 default 0xffffffff80400000 if BCM47XX
859 PPC_BOOK3S_32 || PPC_85xx !! 2080 default 0x0
860 help !! 2081 depends on SYS_SUPPORTS_ZBOOT
861 This option allows you to set the ke !! 2082 help
862 RAM is mapped by blocks, the alignme !! 2083 The address to load compressed kernel, aka vmlinuz.
863 number of possible blocks. The defau !! 2084
864 !! 2085 This is only used if non-zero.
865 Say N here unless you know what you !! 2086
866 !! 2087 choice
867 config DATA_SHIFT !! 2088 prompt "Kernel page size"
868 int "Data shift" if DATA_SHIFT_BOOL !! 2089 default PAGE_SIZE_4KB
869 default 24 if STRICT_KERNEL_RWX && PPC !! 2090
870 range 17 28 if (STRICT_KERNEL_RWX || D !! 2091 config PAGE_SIZE_4KB
871 range 19 23 if (STRICT_KERNEL_RWX || D !! 2092 bool "4kB"
872 range 20 24 if (STRICT_KERNEL_RWX || D !! 2093 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
873 default 22 if STRICT_KERNEL_RWX && PPC !! 2094 help
874 default 18 if (DEBUG_PAGEALLOC || KFEN !! 2095 This option select the standard 4kB Linux page size. On some
875 default 23 if (STRICT_KERNEL_RWX || DE !! 2096 R3000-family processors this is the only available page size. Using
876 (PIN_TLB_DATA || PIN_TLB !! 2097 4kB page size will minimize memory consumption and is therefore
877 default 19 if (STRICT_KERNEL_RWX || DE !! 2098 recommended for low memory systems.
878 default 24 if STRICT_KERNEL_RWX && PPC !! 2099
879 default PAGE_SHIFT !! 2100 config PAGE_SIZE_8KB
880 help !! 2101 bool "8kB"
881 On Book3S 32 (603+), DBATs are used !! 2102 depends on CPU_CAVIUM_OCTEON
882 Smaller is the alignment, greater is !! 2103 depends on !MIPS_VA_BITS_48
883 !! 2104 help
884 On 8xx, large pages (512kb or 8M) ar !! 2105 Using 8kB page size will result in higher performance kernel at
885 memory. Aligning to 8M reduces TLB m !! 2106 the price of higher memory consumption. This option is available
886 in that case. If PIN_TLB is selected !! 2107 only on cnMIPS processors. Note that you will need a suitable Linux
887 8M pages will be pinned. !! 2108 distribution to support this.
>> 2109
>> 2110 config PAGE_SIZE_16KB
>> 2111 bool "16kB"
>> 2112 depends on !CPU_R3000
>> 2113 help
>> 2114 Using 16kB page size will result in higher performance kernel at
>> 2115 the price of higher memory consumption. This option is available on
>> 2116 all non-R3000 family processors. Note that you will need a suitable
>> 2117 Linux distribution to support this.
>> 2118
>> 2119 config PAGE_SIZE_32KB
>> 2120 bool "32kB"
>> 2121 depends on CPU_CAVIUM_OCTEON
>> 2122 depends on !MIPS_VA_BITS_48
>> 2123 help
>> 2124 Using 32kB page size will result in higher performance kernel at
>> 2125 the price of higher memory consumption. This option is available
>> 2126 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2127 distribution to support this.
>> 2128
>> 2129 config PAGE_SIZE_64KB
>> 2130 bool "64kB"
>> 2131 depends on !CPU_R3000
>> 2132 help
>> 2133 Using 64kB page size will result in higher performance kernel at
>> 2134 the price of higher memory consumption. This option is available on
>> 2135 all non-R3000 family processor. Not that at the time of this
>> 2136 writing this option is still high experimental.
>> 2137
>> 2138 endchoice
888 2139
889 config ARCH_FORCE_MAX_ORDER 2140 config ARCH_FORCE_MAX_ORDER
890 int "Order of maximal physically conti !! 2141 int "Maximum zone order"
891 range 7 8 if PPC64 && PPC_64K_PAGES !! 2142 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
892 default "8" if PPC64 && PPC_64K_PAGES !! 2143 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
893 range 12 12 if PPC64 && !PPC_64K_PAGES !! 2144 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
894 default "12" if PPC64 && !PPC_64K_PAGE !! 2145 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
895 range 8 10 if PPC32 && PPC_16K_PAGES !! 2146 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
896 default "8" if PPC32 && PPC_16K_PAGES !! 2147 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
897 range 6 10 if PPC32 && PPC_64K_PAGES !! 2148 range 0 64
898 default "6" if PPC32 && PPC_64K_PAGES !! 2149 default "11"
899 range 4 10 if PPC32 && PPC_256K_PAGES !! 2150 help
900 default "4" if PPC32 && PPC_256K_PAGES !! 2151 The kernel memory allocator divides physically contiguous memory
901 range 10 12 !! 2152 blocks into "zones", where each zone is a power of two number of
902 default "10" !! 2153 pages. This option selects the largest power of two that the kernel
903 help !! 2154 keeps in the memory allocator. If you need to allocate very large
904 The kernel page allocator limits the !! 2155 blocks of physically contiguous memory, then you may need to
905 contiguous allocations. The limit is !! 2156 increase this value.
906 defines the maximal power of two of <<
907 allocated as a single contiguous blo <<
908 overriding the default setting when <<
909 large blocks of physically contiguou <<
910 <<
911 The page size is not necessarily 4KB <<
912 systems, 64KB pages can be enabled v <<
913 this in mind when choosing a value f <<
914 2157
915 Don't change if unsure. !! 2158 This config option is actually maximum order plus one. For example,
>> 2159 a value of 11 means that the largest free memory block is 2^10 pages.
916 2160
917 config PPC_SUBPAGE_PROT !! 2161 The page size is not necessarily 4KB. Keep this in mind
918 bool "Support setting protections for !! 2162 when choosing a value for this option.
919 default n !! 2163
920 depends on PPC_64S_HASH_MMU && PPC_64K !! 2164 config BOARD_SCACHE
>> 2165 bool
>> 2166
>> 2167 config IP22_CPU_SCACHE
>> 2168 bool
>> 2169 select BOARD_SCACHE
>> 2170
>> 2171 #
>> 2172 # Support for a MIPS32 / MIPS64 style S-caches
>> 2173 #
>> 2174 config MIPS_CPU_SCACHE
>> 2175 bool
>> 2176 select BOARD_SCACHE
>> 2177
>> 2178 config R5000_CPU_SCACHE
>> 2179 bool
>> 2180 select BOARD_SCACHE
>> 2181
>> 2182 config RM7000_CPU_SCACHE
>> 2183 bool
>> 2184 select BOARD_SCACHE
>> 2185
>> 2186 config SIBYTE_DMA_PAGEOPS
>> 2187 bool "Use DMA to clear/copy pages"
>> 2188 depends on CPU_SB1
921 help 2189 help
922 This option adds support for system !! 2190 Instead of using the CPU to zero and copy pages, use a Data Mover
923 to set access permissions (read/writ !! 2191 channel. These DMA channels are otherwise unused by the standard
924 on the 4k subpages of each 64k page. !! 2192 SiByte Linux port. Seems to give a small performance benefit.
925 2193
926 If unsure, say N here. !! 2194 config CPU_HAS_PREFETCH
>> 2195 bool
>> 2196
>> 2197 config CPU_GENERIC_DUMP_TLB
>> 2198 bool
>> 2199 default y if !CPU_R3000
927 2200
928 config PPC_PROT_SAO_LPAR !! 2201 config MIPS_FP_SUPPORT
929 bool "Support PROT_SAO mappings in LPA !! 2202 bool "Floating Point support" if EXPERT
930 depends on PPC_BOOK3S_64 !! 2203 default y
931 help 2204 help
932 This option adds support for PROT_SA !! 2205 Select y to include support for floating point in the kernel
933 inside LPARs on supported CPUs. !! 2206 including initialization of FPU hardware, FP context save & restore
>> 2207 and emulation of an FPU where necessary. Without this support any
>> 2208 userland program attempting to use floating point instructions will
>> 2209 receive a SIGILL.
934 2210
935 This may cause issues when performin !! 2211 If you know that your userland will not attempt to use floating point
936 a CPU that supports SAO to one that !! 2212 instructions then you can say n here to shrink the kernel a little.
937 2213
938 If unsure, say N here. !! 2214 If unsure, say y.
939 2215
940 config PPC_COPRO_BASE !! 2216 config CPU_R2300_FPU
>> 2217 bool
>> 2218 depends on MIPS_FP_SUPPORT
>> 2219 default y if CPU_R3000
>> 2220
>> 2221 config CPU_R3K_TLB
>> 2222 bool
>> 2223
>> 2224 config CPU_R4K_FPU
>> 2225 bool
>> 2226 depends on MIPS_FP_SUPPORT
>> 2227 default y if !CPU_R2300_FPU
>> 2228
>> 2229 config CPU_R4K_CACHE_TLB
>> 2230 bool
>> 2231 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
>> 2232
>> 2233 config MIPS_MT_SMP
>> 2234 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2235 default y
>> 2236 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2237 select CPU_MIPSR2_IRQ_VI
>> 2238 select CPU_MIPSR2_IRQ_EI
>> 2239 select SYNC_R4K
>> 2240 select MIPS_MT
>> 2241 select SMP
>> 2242 select SMP_UP
>> 2243 select SYS_SUPPORTS_SMP
>> 2244 select SYS_SUPPORTS_SCHED_SMT
>> 2245 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2246 help
>> 2247 This is a kernel model which is known as SMVP. This is supported
>> 2248 on cores with the MT ASE and uses the available VPEs to implement
>> 2249 virtual processors which supports SMP. This is equivalent to the
>> 2250 Intel Hyperthreading feature. For further information go to
>> 2251 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2252
>> 2253 config MIPS_MT
941 bool 2254 bool
942 2255
943 config SCHED_SMT 2256 config SCHED_SMT
944 bool "SMT (Hyperthreading) scheduler s !! 2257 bool "SMT (multithreading) scheduler support"
945 depends on PPC64 && SMP !! 2258 depends on SYS_SUPPORTS_SCHED_SMT
>> 2259 default n
946 help 2260 help
947 SMT scheduler support improves the C 2261 SMT scheduler support improves the CPU scheduler's decision making
948 when dealing with POWER5 cpus at a c !! 2262 when dealing with MIPS MT enabled cores at a cost of slightly
949 overhead in some places. If unsure s !! 2263 increased overhead in some places. If unsure say N here.
950 2264
951 config PPC_DENORMALISATION !! 2265 config SYS_SUPPORTS_SCHED_SMT
952 bool "PowerPC denormalisation exceptio !! 2266 bool
953 depends on PPC_BOOK3S_64 <<
954 default "y" if PPC_POWERNV <<
955 help <<
956 Add support for handling denormalisa <<
957 values. Useful for bare metal only. <<
958 <<
959 config CMDLINE <<
960 string "Initial kernel command string" <<
961 default "" <<
962 help <<
963 On some platforms, there is currentl <<
964 pass arguments to the kernel. For th <<
965 some command-line options at build t <<
966 most cases you will need to specify <<
967 2267
968 choice !! 2268 config SYS_SUPPORTS_MULTITHREADING
969 prompt "Kernel command line type" !! 2269 bool
970 depends on CMDLINE != "" <<
971 default CMDLINE_FROM_BOOTLOADER <<
972 <<
973 config CMDLINE_FROM_BOOTLOADER <<
974 bool "Use bootloader kernel arguments <<
975 help <<
976 Uses the command-line options passed <<
977 the boot loader doesn't provide any, <<
978 string provided in CMDLINE will be u <<
979 <<
980 config CMDLINE_EXTEND <<
981 bool "Extend bootloader kernel argumen <<
982 help <<
983 The command-line arguments provided <<
984 appended to the default kernel comma <<
985 <<
986 config CMDLINE_FORCE <<
987 bool "Always use the default kernel co <<
988 help <<
989 Always use the default kernel comman <<
990 loader passes other arguments to the <<
991 This is useful if you cannot or don' <<
992 command-line options your boot loade <<
993 2270
994 endchoice !! 2271 config MIPS_MT_FPAFF
>> 2272 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2273 default y
>> 2274 depends on MIPS_MT_SMP
995 2275
996 config EXTRA_TARGETS !! 2276 config MIPSR2_TO_R6_EMULATOR
997 string "Additional default image types !! 2277 bool "MIPS R2-to-R6 emulator"
>> 2278 depends on CPU_MIPSR6
>> 2279 depends on MIPS_FP_SUPPORT
>> 2280 default y
998 help 2281 help
999 List additional targets to be built !! 2282 Choose this option if you want to run non-R6 MIPS userland code.
1000 by spaces). This is useful for tar !! 2283 Even if you say 'Y' here, the emulator will still be disabled by
1001 files in the .dts directory. !! 2284 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2285 The only reason this is a build-time option is to save ~14K from the
>> 2286 final kernel image.
1002 2287
1003 Targets in this list will be build !! 2288 config SYS_SUPPORTS_VPE_LOADER
1004 target, or when the user does a 'ma !! 2289 bool
1005 'make zImage.initrd'. !! 2290 depends on SYS_SUPPORTS_MULTITHREADING
>> 2291 help
>> 2292 Indicates that the platform supports the VPE loader, and provides
>> 2293 physical_memsize.
1006 2294
1007 If unsure, leave blank !! 2295 config MIPS_VPE_LOADER
>> 2296 bool "VPE loader support."
>> 2297 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2298 select CPU_MIPSR2_IRQ_VI
>> 2299 select CPU_MIPSR2_IRQ_EI
>> 2300 select MIPS_MT
>> 2301 help
>> 2302 Includes a loader for loading an elf relocatable object
>> 2303 onto another VPE and running it.
1008 2304
1009 config ARCH_WANTS_FREEZER_CONTROL !! 2305 config MIPS_VPE_LOADER_CMP
1010 def_bool y !! 2306 bool
1011 depends on ADB_PMU !! 2307 default "y"
>> 2308 depends on MIPS_VPE_LOADER && MIPS_CMP
1012 2309
1013 source "kernel/power/Kconfig" !! 2310 config MIPS_VPE_LOADER_MT
>> 2311 bool
>> 2312 default "y"
>> 2313 depends on MIPS_VPE_LOADER && !MIPS_CMP
1014 2314
1015 config PPC_MEM_KEYS !! 2315 config MIPS_VPE_LOADER_TOM
1016 prompt "PowerPC Memory Protection Key !! 2316 bool "Load VPE program into memory hidden from linux"
1017 def_bool y !! 2317 depends on MIPS_VPE_LOADER
1018 depends on PPC_BOOK3S_64 !! 2318 default y
1019 depends on PPC_64S_HASH_MMU !! 2319 help
1020 select ARCH_USES_HIGH_VMA_FLAGS !! 2320 The loader can use memory that is present but has been hidden from
1021 select ARCH_HAS_PKEYS !! 2321 Linux using the kernel command line option "mem=xxMB". It's up to
1022 help !! 2322 you to ensure the amount you put in the option and the space your
1023 Memory Protection Keys provides a m !! 2323 program requires is less or equal to the amount physically present.
1024 page-based protections, but without <<
1025 page tables when an application cha <<
1026 2324
1027 For details, see Documentation/core !! 2325 config MIPS_VPE_APSP_API
>> 2326 bool "Enable support for AP/SP API (RTLX)"
>> 2327 depends on MIPS_VPE_LOADER
1028 2328
1029 If unsure, say y. !! 2329 config MIPS_VPE_APSP_API_CMP
>> 2330 bool
>> 2331 default "y"
>> 2332 depends on MIPS_VPE_APSP_API && MIPS_CMP
1030 2333
1031 config ARCH_PKEY_BITS !! 2334 config MIPS_VPE_APSP_API_MT
1032 int !! 2335 bool
1033 default 5 !! 2336 default "y"
>> 2337 depends on MIPS_VPE_APSP_API && !MIPS_CMP
>> 2338
>> 2339 config MIPS_CMP
>> 2340 bool "MIPS CMP framework support (DEPRECATED)"
>> 2341 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2342 select SMP
>> 2343 select SYNC_R4K
>> 2344 select SYS_SUPPORTS_SMP
>> 2345 select WEAK_ORDERING
>> 2346 default n
>> 2347 help
>> 2348 Select this if you are using a bootloader which implements the "CMP
>> 2349 framework" protocol (ie. YAMON) and want your kernel to make use of
>> 2350 its ability to start secondary CPUs.
>> 2351
>> 2352 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2353 instead of this.
1034 2354
1035 config PPC_SECURE_BOOT !! 2355 config MIPS_CPS
1036 prompt "Enable secure boot support" !! 2356 bool "MIPS Coherent Processing System support"
>> 2357 depends on SYS_SUPPORTS_MIPS_CPS
>> 2358 select MIPS_CM
>> 2359 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2360 select SMP
>> 2361 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2362 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2363 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2364 select SYS_SUPPORTS_SMP
>> 2365 select WEAK_ORDERING
>> 2366 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
>> 2367 help
>> 2368 Select this if you wish to run an SMP kernel across multiple cores
>> 2369 within a MIPS Coherent Processing System. When this option is
>> 2370 enabled the kernel will probe for other cores and boot them with
>> 2371 no external assistance. It is safe to enable this when hardware
>> 2372 support is unavailable.
>> 2373
>> 2374 config MIPS_CPS_PM
>> 2375 depends on MIPS_CPS
1037 bool 2376 bool
1038 depends on PPC_POWERNV || PPC_PSERIES <<
1039 depends on IMA_ARCH_POLICY <<
1040 imply IMA_SECURE_AND_OR_TRUSTED_BOOT <<
1041 select PSERIES_PLPKS if PPC_PSERIES <<
1042 help <<
1043 Systems with firmware secure boot e <<
1044 policies to extend secure boot to t <<
1045 to enable OS secure boot on systems <<
1046 it. If in doubt say N. <<
1047 2377
1048 config PPC_SECVAR_SYSFS !! 2378 config MIPS_CM
1049 bool "Enable sysfs interface for POWE !! 2379 bool
>> 2380 select MIPS_CPC
>> 2381
>> 2382 config MIPS_CPC
>> 2383 bool
>> 2384
>> 2385 config SB1_PASS_2_WORKAROUNDS
>> 2386 bool
>> 2387 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2388 default y
>> 2389
>> 2390 config SB1_PASS_2_1_WORKAROUNDS
>> 2391 bool
>> 2392 depends on CPU_SB1 && CPU_SB1_PASS_2
1050 default y 2393 default y
1051 depends on PPC_SECURE_BOOT !! 2394
1052 depends on SYSFS !! 2395 choice
>> 2396 prompt "SmartMIPS or microMIPS ASE support"
>> 2397
>> 2398 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2399 bool "None"
1053 help 2400 help
1054 POWER secure variables are managed !! 2401 Select this if you want neither microMIPS nor SmartMIPS support
1055 These variables are exposed to user <<
1056 read/write operations on these vari <<
1057 secure boot enabled and want to exp <<
1058 2402
1059 endmenu !! 2403 config CPU_HAS_SMARTMIPS
>> 2404 depends on SYS_SUPPORTS_SMARTMIPS
>> 2405 bool "SmartMIPS"
>> 2406 help
>> 2407 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2408 increased security at both hardware and software level for
>> 2409 smartcards. Enabling this option will allow proper use of the
>> 2410 SmartMIPS instructions by Linux applications. However a kernel with
>> 2411 this option will not work on a MIPS core without SmartMIPS core. If
>> 2412 you don't know you probably don't have SmartMIPS and should say N
>> 2413 here.
>> 2414
>> 2415 config CPU_MICROMIPS
>> 2416 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2417 bool "microMIPS"
>> 2418 help
>> 2419 When this option is enabled the kernel will be built using the
>> 2420 microMIPS ISA
1060 2421
1061 config ISA_DMA_API !! 2422 endchoice
>> 2423
>> 2424 config CPU_HAS_MSA
>> 2425 bool "Support for the MIPS SIMD Architecture"
>> 2426 depends on CPU_SUPPORTS_MSA
>> 2427 depends on MIPS_FP_SUPPORT
>> 2428 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2429 help
>> 2430 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2431 and a set of SIMD instructions to operate on them. When this option
>> 2432 is enabled the kernel will support allocating & switching MSA
>> 2433 vector register contexts. If you know that your kernel will only be
>> 2434 running on CPUs which do not support MSA or that your userland will
>> 2435 not be making use of it then you may wish to say N here to reduce
>> 2436 the size & complexity of your kernel.
>> 2437
>> 2438 If unsure, say Y.
>> 2439
>> 2440 config CPU_HAS_WB
1062 bool 2441 bool
1063 default PCI <<
1064 2442
1065 menu "Bus options" !! 2443 config XKS01
>> 2444 bool
1066 2445
1067 config ISA !! 2446 config CPU_HAS_DIEI
1068 bool "Support for ISA-bus hardware" !! 2447 depends on !CPU_DIEI_BROKEN
1069 depends on PPC_CHRP !! 2448 bool
1070 select PPC_I8259 <<
1071 help <<
1072 Find out whether you have ISA slots <<
1073 name of a bus system, i.e. the way <<
1074 inside your box. If you have an Ap <<
1075 have an IBM RS/6000 or pSeries mach <<
1076 embedded board, consult your board <<
1077 2449
1078 config GENERIC_ISA_DMA !! 2450 config CPU_DIEI_BROKEN
1079 bool 2451 bool
1080 depends on ISA_DMA_API <<
1081 default y <<
1082 2452
1083 config PPC_INDIRECT_PCI !! 2453 config CPU_HAS_RIXI
1084 bool 2454 bool
1085 depends on PCI <<
1086 default y if 44x <<
1087 2455
1088 config SBUS !! 2456 config CPU_NO_LOAD_STORE_LR
1089 bool 2457 bool
>> 2458 help
>> 2459 CPU lacks support for unaligned load and store instructions:
>> 2460 LWL, LWR, SWL, SWR (Load/store word left/right).
>> 2461 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
>> 2462 systems).
1090 2463
1091 config FSL_SOC !! 2464 #
>> 2465 # Vectored interrupt mode is an R2 feature
>> 2466 #
>> 2467 config CPU_MIPSR2_IRQ_VI
1092 bool 2468 bool
1093 2469
1094 config FSL_PCI !! 2470 #
>> 2471 # Extended interrupt mode is an R2 feature
>> 2472 #
>> 2473 config CPU_MIPSR2_IRQ_EI
1095 bool 2474 bool
1096 select ARCH_HAS_DMA_SET_MASK <<
1097 select PPC_INDIRECT_PCI <<
1098 select PCI_QUIRKS <<
1099 2475
1100 config FSL_PMC !! 2476 config CPU_HAS_SYNC
1101 bool 2477 bool
>> 2478 depends on !CPU_R3000
1102 default y 2479 default y
1103 depends on SUSPEND && (PPC_85xx || PP !! 2480
>> 2481 #
>> 2482 # CPU non-features
>> 2483 #
>> 2484
>> 2485 # Work around the "daddi" and "daddiu" CPU errata:
>> 2486 #
>> 2487 # - The `daddi' instruction fails to trap on overflow.
>> 2488 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2489 # erratum #23
>> 2490 #
>> 2491 # - The `daddiu' instruction can produce an incorrect result.
>> 2492 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2493 # erratum #41
>> 2494 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
>> 2495 # #15
>> 2496 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
>> 2497 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
>> 2498 config CPU_DADDI_WORKAROUNDS
>> 2499 bool
>> 2500
>> 2501 # Work around certain R4000 CPU errata (as implemented by GCC):
>> 2502 #
>> 2503 # - A double-word or a variable shift may give an incorrect result
>> 2504 # if executed immediately after starting an integer division:
>> 2505 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2506 # erratum #28
>> 2507 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
>> 2508 # #19
>> 2509 #
>> 2510 # - A double-word or a variable shift may give an incorrect result
>> 2511 # if executed while an integer multiplication is in progress:
>> 2512 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2513 # errata #16 & #28
>> 2514 #
>> 2515 # - An integer division may give an incorrect result if started in
>> 2516 # a delay slot of a taken branch or a jump:
>> 2517 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2518 # erratum #52
>> 2519 config CPU_R4000_WORKAROUNDS
>> 2520 bool
>> 2521 select CPU_R4400_WORKAROUNDS
>> 2522
>> 2523 # Work around certain R4400 CPU errata (as implemented by GCC):
>> 2524 #
>> 2525 # - A double-word or a variable shift may give an incorrect result
>> 2526 # if executed immediately after starting an integer division:
>> 2527 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
>> 2528 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
>> 2529 config CPU_R4400_WORKAROUNDS
>> 2530 bool
>> 2531
>> 2532 config CPU_R4X00_BUGS64
>> 2533 bool
>> 2534 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
>> 2535
>> 2536 config MIPS_ASID_SHIFT
>> 2537 int
>> 2538 default 6 if CPU_R3000
>> 2539 default 0
>> 2540
>> 2541 config MIPS_ASID_BITS
>> 2542 int
>> 2543 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2544 default 6 if CPU_R3000
>> 2545 default 8
>> 2546
>> 2547 config MIPS_ASID_BITS_VARIABLE
>> 2548 bool
>> 2549
>> 2550 config MIPS_CRC_SUPPORT
>> 2551 bool
>> 2552
>> 2553 # R4600 erratum. Due to the lack of errata information the exact
>> 2554 # technical details aren't known. I've experimentally found that disabling
>> 2555 # interrupts during indexed I-cache flushes seems to be sufficient to deal
>> 2556 # with the issue.
>> 2557 config WAR_R4600_V1_INDEX_ICACHEOP
>> 2558 bool
>> 2559
>> 2560 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
>> 2561 #
>> 2562 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
>> 2563 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
>> 2564 # executed if there is no other dcache activity. If the dcache is
>> 2565 # accessed for another instruction immediately preceding when these
>> 2566 # cache instructions are executing, it is possible that the dcache
>> 2567 # tag match outputs used by these cache instructions will be
>> 2568 # incorrect. These cache instructions should be preceded by at least
>> 2569 # four instructions that are not any kind of load or store
>> 2570 # instruction.
>> 2571 #
>> 2572 # This is not allowed: lw
>> 2573 # nop
>> 2574 # nop
>> 2575 # nop
>> 2576 # cache Hit_Writeback_Invalidate_D
>> 2577 #
>> 2578 # This is allowed: lw
>> 2579 # nop
>> 2580 # nop
>> 2581 # nop
>> 2582 # nop
>> 2583 # cache Hit_Writeback_Invalidate_D
>> 2584 config WAR_R4600_V1_HIT_CACHEOP
>> 2585 bool
>> 2586
>> 2587 # Writeback and invalidate the primary cache dcache before DMA.
>> 2588 #
>> 2589 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
>> 2590 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
>> 2591 # operate correctly if the internal data cache refill buffer is empty. These
>> 2592 # CACHE instructions should be separated from any potential data cache miss
>> 2593 # by a load instruction to an uncached address to empty the response buffer."
>> 2594 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
>> 2595 # in .pdf format.)
>> 2596 config WAR_R4600_V2_HIT_CACHEOP
>> 2597 bool
>> 2598
>> 2599 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
>> 2600 # the line which this instruction itself exists, the following
>> 2601 # operation is not guaranteed."
>> 2602 #
>> 2603 # Workaround: do two phase flushing for Index_Invalidate_I
>> 2604 config WAR_TX49XX_ICACHE_INDEX_INV
>> 2605 bool
>> 2606
>> 2607 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
>> 2608 # opposes it being called that) where invalid instructions in the same
>> 2609 # I-cache line worth of instructions being fetched may case spurious
>> 2610 # exceptions.
>> 2611 config WAR_ICACHE_REFILLS
>> 2612 bool
>> 2613
>> 2614 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
>> 2615 # may cause ll / sc and lld / scd sequences to execute non-atomically.
>> 2616 config WAR_R10000_LLSC
>> 2617 bool
>> 2618
>> 2619 # 34K core erratum: "Problems Executing the TLBR Instruction"
>> 2620 config WAR_MIPS34K_MISSED_ITLB
>> 2621 bool
>> 2622
>> 2623 #
>> 2624 # - Highmem only makes sense for the 32-bit kernel.
>> 2625 # - The current highmem code will only work properly on physically indexed
>> 2626 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2627 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2628 # moment we protect the user and offer the highmem option only on machines
>> 2629 # where it's known to be safe. This will not offer highmem on a few systems
>> 2630 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2631 # indexed CPUs but we're playing safe.
>> 2632 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2633 # know they might have memory configurations that could make use of highmem
>> 2634 # support.
>> 2635 #
>> 2636 config HIGHMEM
>> 2637 bool "High Memory Support"
>> 2638 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2639 select KMAP_LOCAL
>> 2640
>> 2641 config CPU_SUPPORTS_HIGHMEM
>> 2642 bool
>> 2643
>> 2644 config SYS_SUPPORTS_HIGHMEM
>> 2645 bool
>> 2646
>> 2647 config SYS_SUPPORTS_SMARTMIPS
>> 2648 bool
>> 2649
>> 2650 config SYS_SUPPORTS_MICROMIPS
>> 2651 bool
>> 2652
>> 2653 config SYS_SUPPORTS_MIPS16
>> 2654 bool
1104 help 2655 help
1105 Freescale MPC85xx/MPC86xx power man !! 2656 This option must be set if a kernel might be executed on a MIPS16-
1106 (suspend/resume). For MPC83xx see p !! 2657 enabled CPU even if MIPS16 is not actually being used. In other
>> 2658 words, it makes the kernel MIPS16-tolerant.
>> 2659
>> 2660 config CPU_SUPPORTS_MSA
>> 2661 bool
>> 2662
>> 2663 config ARCH_FLATMEM_ENABLE
>> 2664 def_bool y
>> 2665 depends on !NUMA && !CPU_LOONGSON2EF
>> 2666
>> 2667 config ARCH_SPARSEMEM_ENABLE
>> 2668 bool
1107 2669
1108 config PPC4xx_CPM !! 2670 config NUMA
>> 2671 bool "NUMA Support"
>> 2672 depends on SYS_SUPPORTS_NUMA
>> 2673 select SMP
>> 2674 select HAVE_SETUP_PER_CPU_AREA
>> 2675 select NEED_PER_CPU_EMBED_FIRST_CHUNK
>> 2676 help
>> 2677 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2678 Access). This option improves performance on systems with more
>> 2679 than two nodes; on two node systems it is generally better to
>> 2680 leave it disabled; on single node systems leave this option
>> 2681 disabled.
>> 2682
>> 2683 config SYS_SUPPORTS_NUMA
1109 bool 2684 bool
>> 2685
>> 2686 config HAVE_ARCH_NODEDATA_EXTENSION
>> 2687 bool
>> 2688
>> 2689 config RELOCATABLE
>> 2690 bool "Relocatable kernel"
>> 2691 depends on SYS_SUPPORTS_RELOCATABLE
>> 2692 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
>> 2693 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
>> 2694 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
>> 2695 CPU_P5600 || CAVIUM_OCTEON_SOC || \
>> 2696 CPU_LOONGSON64
>> 2697 help
>> 2698 This builds a kernel image that retains relocation information
>> 2699 so it can be loaded someplace besides the default 1MB.
>> 2700 The relocations make the kernel binary about 15% larger,
>> 2701 but are discarded at runtime
>> 2702
>> 2703 config RELOCATION_TABLE_SIZE
>> 2704 hex "Relocation table size"
>> 2705 depends on RELOCATABLE
>> 2706 range 0x0 0x01000000
>> 2707 default "0x00200000" if CPU_LOONGSON64
>> 2708 default "0x00100000"
>> 2709 help
>> 2710 A table of relocation data will be appended to the kernel binary
>> 2711 and parsed at boot to fix up the relocated kernel.
>> 2712
>> 2713 This option allows the amount of space reserved for the table to be
>> 2714 adjusted, although the default of 1Mb should be ok in most cases.
>> 2715
>> 2716 The build will fail and a valid size suggested if this is too small.
>> 2717
>> 2718 If unsure, leave at the default value.
>> 2719
>> 2720 config RANDOMIZE_BASE
>> 2721 bool "Randomize the address of the kernel image"
>> 2722 depends on RELOCATABLE
>> 2723 help
>> 2724 Randomizes the physical and virtual address at which the
>> 2725 kernel image is loaded, as a security feature that
>> 2726 deters exploit attempts relying on knowledge of the location
>> 2727 of kernel internals.
>> 2728
>> 2729 Entropy is generated using any coprocessor 0 registers available.
>> 2730
>> 2731 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2732
>> 2733 If unsure, say N.
>> 2734
>> 2735 config RANDOMIZE_BASE_MAX_OFFSET
>> 2736 hex "Maximum kASLR offset" if EXPERT
>> 2737 depends on RANDOMIZE_BASE
>> 2738 range 0x0 0x40000000 if EVA || 64BIT
>> 2739 range 0x0 0x08000000
>> 2740 default "0x01000000"
>> 2741 help
>> 2742 When kASLR is active, this provides the maximum offset that will
>> 2743 be applied to the kernel image. It should be set according to the
>> 2744 amount of physical RAM available in the target system minus
>> 2745 PHYSICAL_START and must be a power of 2.
>> 2746
>> 2747 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2748 EVA or 64-bit. The default is 16Mb.
>> 2749
>> 2750 config NODES_SHIFT
>> 2751 int
>> 2752 default "6"
>> 2753 depends on NUMA
>> 2754
>> 2755 config HW_PERF_EVENTS
>> 2756 bool "Enable hardware performance counter support for perf events"
>> 2757 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
1110 default y 2758 default y
1111 depends on SUSPEND && 44x <<
1112 help 2759 help
1113 PPC4xx Clock Power Management (CPM) !! 2760 Enable hardware performance counter support for perf events. If
1114 It also enables support for two dif !! 2761 disabled, perf events will use software events only.
1115 and idle-doze). <<
1116 2762
1117 config FSL_LBC !! 2763 config DMI
1118 bool "Freescale Local Bus support" !! 2764 bool "Enable DMI scanning"
>> 2765 depends on MACH_LOONGSON64
>> 2766 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
>> 2767 default y
1119 help 2768 help
1120 Enables reporting of errors from th !! 2769 Enabled scanning of DMI to identify machine quirks. Say Y
1121 controller. Also contains some com !! 2770 here unless you have verified that your setup is not
1122 drivers for specific local bus peri !! 2771 affected by entries in the DMI blacklist. Required by PNP
>> 2772 BIOS code.
1123 2773
1124 config FSL_GTM !! 2774 config SMP
1125 bool !! 2775 bool "Multi-Processing support"
1126 depends on PPC_83xx || QUICC_ENGINE | !! 2776 depends on SYS_SUPPORTS_SMP
1127 help 2777 help
1128 Freescale General-purpose Timers su !! 2778 This enables support for systems with more than one CPU. If you have
>> 2779 a system with only one CPU, say N. If you have a system with more
>> 2780 than one CPU, say Y.
>> 2781
>> 2782 If you say N here, the kernel will run on uni- and multiprocessor
>> 2783 machines, but will use only one CPU of a multiprocessor machine. If
>> 2784 you say Y here, the kernel will run on many, but not all,
>> 2785 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2786 will run faster if you say N here.
1129 2787
1130 config FSL_RIO !! 2788 People using multiprocessor machines who say Y here should also say
1131 bool "Freescale Embedded SRIO Control !! 2789 Y to "Enhanced Real Time Clock Support", below.
1132 depends on RAPIDIO = y && HAVE_RAPIDI !! 2790
1133 default "n" !! 2791 See also the SMP-HOWTO available at
>> 2792 <https://www.tldp.org/docs.html#howto>.
>> 2793
>> 2794 If you don't know what to do here, say N.
>> 2795
>> 2796 config HOTPLUG_CPU
>> 2797 bool "Support for hot-pluggable CPUs"
>> 2798 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
1134 help 2799 help
1135 Include support for RapidIO control !! 2800 Say Y here to allow turning CPUs off and on. CPUs can be
1136 processors (MPC8548, MPC8641, etc). !! 2801 controlled through /sys/devices/system/cpu.
>> 2802 (Note: power management support will enable this option
>> 2803 automatically on SMP systems. )
>> 2804 Say N if you want to disable CPU hotplug.
1137 2805
1138 endmenu !! 2806 config SMP_UP
>> 2807 bool
1139 2808
1140 config NONSTATIC_KERNEL !! 2809 config SYS_SUPPORTS_MIPS_CMP
1141 bool 2810 bool
1142 2811
1143 menu "Advanced setup" !! 2812 config SYS_SUPPORTS_MIPS_CPS
1144 depends on PPC32 !! 2813 bool
>> 2814
>> 2815 config SYS_SUPPORTS_SMP
>> 2816 bool
>> 2817
>> 2818 config NR_CPUS_DEFAULT_4
>> 2819 bool
1145 2820
1146 config ADVANCED_OPTIONS !! 2821 config NR_CPUS_DEFAULT_8
1147 bool "Prompt for advanced kernel conf !! 2822 bool
>> 2823
>> 2824 config NR_CPUS_DEFAULT_16
>> 2825 bool
>> 2826
>> 2827 config NR_CPUS_DEFAULT_32
>> 2828 bool
>> 2829
>> 2830 config NR_CPUS_DEFAULT_64
>> 2831 bool
>> 2832
>> 2833 config NR_CPUS
>> 2834 int "Maximum number of CPUs (2-256)"
>> 2835 range 2 256
>> 2836 depends on SMP
>> 2837 default "4" if NR_CPUS_DEFAULT_4
>> 2838 default "8" if NR_CPUS_DEFAULT_8
>> 2839 default "16" if NR_CPUS_DEFAULT_16
>> 2840 default "32" if NR_CPUS_DEFAULT_32
>> 2841 default "64" if NR_CPUS_DEFAULT_64
1148 help 2842 help
1149 This option will enable prompting f !! 2843 This allows you to specify the maximum number of CPUs which this
1150 configuration options. These optio !! 2844 kernel will support. The maximum supported value is 32 for 32-bit
1151 work if they are set incorrectly, b !! 2845 kernel and 64 for 64-bit kernels; the minimum value which makes
1152 aspects of kernel memory management !! 2846 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2847 and 2 for all others.
1153 2848
1154 Unless you know what you are doing, !! 2849 This is purely to save memory - each supported CPU adds
>> 2850 approximately eight kilobytes to the kernel image. For best
>> 2851 performance should round up your number of processors to the next
>> 2852 power of two.
1155 2853
1156 comment "Default settings for advanced config !! 2854 config MIPS_PERF_SHARED_TC_COUNTERS
1157 depends on !ADVANCED_OPTIONS !! 2855 bool
1158 2856
1159 config LOWMEM_SIZE_BOOL !! 2857 config MIPS_NR_CPU_NR_MAP_1024
1160 bool "Set maximum low memory" !! 2858 bool
1161 depends on ADVANCED_OPTIONS !! 2859
>> 2860 config MIPS_NR_CPU_NR_MAP
>> 2861 int
>> 2862 depends on SMP
>> 2863 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2864 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2865
>> 2866 #
>> 2867 # Timer Interrupt Frequency Configuration
>> 2868 #
>> 2869
>> 2870 choice
>> 2871 prompt "Timer frequency"
>> 2872 default HZ_250
1162 help 2873 help
1163 This option allows you to set the m !! 2874 Allows the configuration of the timer frequency.
1164 will be used as "low memory", that !! 2875
1165 access directly, without having to !! 2876 config HZ_24
1166 This can be useful in optimizing th !! 2877 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
1167 memory. !! 2878
>> 2879 config HZ_48
>> 2880 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2881
>> 2882 config HZ_100
>> 2883 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2884
>> 2885 config HZ_128
>> 2886 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
1168 2887
1169 Say N here unless you know what you !! 2888 config HZ_250
>> 2889 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
1170 2890
1171 config LOWMEM_SIZE !! 2891 config HZ_256
1172 hex "Maximum low memory size (in byte !! 2892 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
1173 default "0x30000000" !! 2893
>> 2894 config HZ_1000
>> 2895 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2896
>> 2897 config HZ_1024
>> 2898 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2899
>> 2900 endchoice
>> 2901
>> 2902 config SYS_SUPPORTS_24HZ
>> 2903 bool
>> 2904
>> 2905 config SYS_SUPPORTS_48HZ
>> 2906 bool
>> 2907
>> 2908 config SYS_SUPPORTS_100HZ
>> 2909 bool
1174 2910
1175 config LOWMEM_CAM_NUM_BOOL !! 2911 config SYS_SUPPORTS_128HZ
1176 bool "Set number of CAMs to use to ma !! 2912 bool
1177 depends on ADVANCED_OPTIONS && PPC_85 !! 2913
>> 2914 config SYS_SUPPORTS_250HZ
>> 2915 bool
>> 2916
>> 2917 config SYS_SUPPORTS_256HZ
>> 2918 bool
>> 2919
>> 2920 config SYS_SUPPORTS_1000HZ
>> 2921 bool
>> 2922
>> 2923 config SYS_SUPPORTS_1024HZ
>> 2924 bool
>> 2925
>> 2926 config SYS_SUPPORTS_ARBIT_HZ
>> 2927 bool
>> 2928 default y if !SYS_SUPPORTS_24HZ && \
>> 2929 !SYS_SUPPORTS_48HZ && \
>> 2930 !SYS_SUPPORTS_100HZ && \
>> 2931 !SYS_SUPPORTS_128HZ && \
>> 2932 !SYS_SUPPORTS_250HZ && \
>> 2933 !SYS_SUPPORTS_256HZ && \
>> 2934 !SYS_SUPPORTS_1000HZ && \
>> 2935 !SYS_SUPPORTS_1024HZ
>> 2936
>> 2937 config HZ
>> 2938 int
>> 2939 default 24 if HZ_24
>> 2940 default 48 if HZ_48
>> 2941 default 100 if HZ_100
>> 2942 default 128 if HZ_128
>> 2943 default 250 if HZ_250
>> 2944 default 256 if HZ_256
>> 2945 default 1000 if HZ_1000
>> 2946 default 1024 if HZ_1024
>> 2947
>> 2948 config SCHED_HRTICK
>> 2949 def_bool HIGH_RES_TIMERS
>> 2950
>> 2951 config KEXEC
>> 2952 bool "Kexec system call"
>> 2953 select KEXEC_CORE
>> 2954 help
>> 2955 kexec is a system call that implements the ability to shutdown your
>> 2956 current kernel, and to start another kernel. It is like a reboot
>> 2957 but it is independent of the system firmware. And like a reboot
>> 2958 you can start any kernel with it, not just Linux.
>> 2959
>> 2960 The name comes from the similarity to the exec system call.
>> 2961
>> 2962 It is an ongoing process to be certain the hardware in a machine
>> 2963 is properly shutdown, so do not be surprised if this code does not
>> 2964 initially work for you. As of this writing the exact hardware
>> 2965 interface is strongly in flux, so no good recommendation can be
>> 2966 made.
>> 2967
>> 2968 config CRASH_DUMP
>> 2969 bool "Kernel crash dumps"
>> 2970 help
>> 2971 Generate crash dump after being started by kexec.
>> 2972 This should be normally only set in special crash dump kernels
>> 2973 which are loaded in the main kernel with kexec-tools into
>> 2974 a specially reserved region and then later executed after
>> 2975 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2976 to a memory address not used by the main kernel or firmware using
>> 2977 PHYSICAL_START.
>> 2978
>> 2979 config PHYSICAL_START
>> 2980 hex "Physical address where the kernel is loaded"
>> 2981 default "0xffffffff84000000"
>> 2982 depends on CRASH_DUMP
1178 help 2983 help
1179 This option allows you to set the m !! 2984 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
1180 will be used to map low memory. Th !! 2985 If you plan to use kernel for capturing the crash dump change
1181 available and even more limited num !! 2986 this value to start of the reserved region (the "X" value as
1182 However, using more entries will al !! 2987 specified in the "crashkernel=YM@XM" command line boot parameter
1183 can be useful in optimizing the lay !! 2988 passed to the panic-ed kernel).
>> 2989
>> 2990 config MIPS_O32_FP64_SUPPORT
>> 2991 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 2992 depends on 32BIT || MIPS32_O32
>> 2993 help
>> 2994 When this is enabled, the kernel will support use of 64-bit floating
>> 2995 point registers with binaries using the O32 ABI along with the
>> 2996 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2997 32-bit MIPS systems this support is at the cost of increasing the
>> 2998 size and complexity of the compiled FPU emulator. Thus if you are
>> 2999 running a MIPS32 system and know that none of your userland binaries
>> 3000 will require 64-bit floating point, you may wish to reduce the size
>> 3001 of your kernel & potentially improve FP emulation performance by
>> 3002 saying N here.
>> 3003
>> 3004 Although binutils currently supports use of this flag the details
>> 3005 concerning its effect upon the O32 ABI in userland are still being
>> 3006 worked on. In order to avoid userland becoming dependent upon current
>> 3007 behaviour before the details have been finalised, this option should
>> 3008 be considered experimental and only enabled by those working upon
>> 3009 said details.
1184 3010
1185 Say N here unless you know what you !! 3011 If unsure, say N.
1186 3012
1187 config LOWMEM_CAM_NUM !! 3013 config USE_OF
1188 depends on PPC_85xx !! 3014 bool
1189 int "Number of CAMs to use to map low !! 3015 select OF
1190 default 3 if !STRICT_KERNEL_RWX !! 3016 select OF_EARLY_FLATTREE
1191 default 9 if DATA_SHIFT >= 24 !! 3017 select IRQ_DOMAIN
1192 default 12 if DATA_SHIFT >= 22 !! 3018
>> 3019 config UHI_BOOT
>> 3020 bool
>> 3021
>> 3022 config BUILTIN_DTB
>> 3023 bool
>> 3024
>> 3025 choice
>> 3026 prompt "Kernel appended dtb support" if USE_OF
>> 3027 default MIPS_NO_APPENDED_DTB
>> 3028
>> 3029 config MIPS_NO_APPENDED_DTB
>> 3030 bool "None"
>> 3031 help
>> 3032 Do not enable appended dtb support.
>> 3033
>> 3034 config MIPS_ELF_APPENDED_DTB
>> 3035 bool "vmlinux"
>> 3036 help
>> 3037 With this option, the boot code will look for a device tree binary
>> 3038 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 3039 it is empty and the DTB can be appended using binutils command
>> 3040 objcopy:
>> 3041
>> 3042 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 3043
>> 3044 This is meant as a backward compatibility convenience for those
>> 3045 systems with a bootloader that can't be upgraded to accommodate
>> 3046 the documented boot protocol using a device tree.
>> 3047
>> 3048 config MIPS_RAW_APPENDED_DTB
>> 3049 bool "vmlinux.bin or vmlinuz.bin"
>> 3050 help
>> 3051 With this option, the boot code will look for a device tree binary
>> 3052 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 3053 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 3054
>> 3055 This is meant as a backward compatibility convenience for those
>> 3056 systems with a bootloader that can't be upgraded to accommodate
>> 3057 the documented boot protocol using a device tree.
>> 3058
>> 3059 Beware that there is very little in terms of protection against
>> 3060 this option being confused by leftover garbage in memory that might
>> 3061 look like a DTB header after a reboot if no actual DTB is appended
>> 3062 to vmlinux.bin. Do not leave this option active in a production kernel
>> 3063 if you don't intend to always append a DTB.
>> 3064 endchoice
>> 3065
>> 3066 choice
>> 3067 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
>> 3068 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 3069 !MACH_LOONGSON64 && !MIPS_MALTA && \
>> 3070 !CAVIUM_OCTEON_SOC
>> 3071 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 3072
>> 3073 config MIPS_CMDLINE_FROM_DTB
>> 3074 depends on USE_OF
>> 3075 bool "Dtb kernel arguments if available"
>> 3076
>> 3077 config MIPS_CMDLINE_DTB_EXTEND
>> 3078 depends on USE_OF
>> 3079 bool "Extend dtb kernel arguments with bootloader arguments"
>> 3080
>> 3081 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 3082 bool "Bootloader kernel arguments if available"
>> 3083
>> 3084 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3085 depends on CMDLINE_BOOL
>> 3086 bool "Extend builtin kernel arguments with bootloader arguments"
>> 3087 endchoice
>> 3088
>> 3089 endmenu
>> 3090
>> 3091 config LOCKDEP_SUPPORT
>> 3092 bool
>> 3093 default y
>> 3094
>> 3095 config STACKTRACE_SUPPORT
>> 3096 bool
>> 3097 default y
>> 3098
>> 3099 config PGTABLE_LEVELS
>> 3100 int
>> 3101 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3102 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
>> 3103 default 2
>> 3104
>> 3105 config MIPS_AUTO_PFN_OFFSET
>> 3106 bool
>> 3107
>> 3108 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 3109
>> 3110 config PCI_DRIVERS_GENERIC
>> 3111 select PCI_DOMAINS_GENERIC if PCI
>> 3112 bool
>> 3113
>> 3114 config PCI_DRIVERS_LEGACY
>> 3115 def_bool !PCI_DRIVERS_GENERIC
>> 3116 select NO_GENERIC_PCI_IOPORT_MAP
>> 3117 select PCI_DOMAINS if PCI
>> 3118
>> 3119 #
>> 3120 # ISA support is now enabled via select. Too many systems still have the one
>> 3121 # or other ISA chip on the board that users don't know about so don't expect
>> 3122 # users to choose the right thing ...
>> 3123 #
>> 3124 config ISA
>> 3125 bool
>> 3126
>> 3127 config TC
>> 3128 bool "TURBOchannel support"
>> 3129 depends on MACH_DECSTATION
>> 3130 help
>> 3131 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3132 processors. TURBOchannel programming specifications are available
>> 3133 at:
>> 3134 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3135 and:
>> 3136 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3137 Linux driver support status is documented at:
>> 3138 <http://www.linux-mips.org/wiki/DECstation>
>> 3139
>> 3140 config MMU
>> 3141 bool
>> 3142 default y
>> 3143
>> 3144 config ARCH_MMAP_RND_BITS_MIN
>> 3145 default 12 if 64BIT
>> 3146 default 8
>> 3147
>> 3148 config ARCH_MMAP_RND_BITS_MAX
>> 3149 default 18 if 64BIT
1193 default 15 3150 default 15
1194 3151
1195 config DYNAMIC_MEMSTART !! 3152 config ARCH_MMAP_RND_COMPAT_BITS_MIN
1196 bool "Enable page aligned dynamic loa !! 3153 default 8
1197 depends on ADVANCED_OPTIONS && FLATME !! 3154
1198 select NONSTATIC_KERNEL !! 3155 config ARCH_MMAP_RND_COMPAT_BITS_MAX
1199 help !! 3156 default 15
1200 This option enables the kernel to b !! 3157
1201 physical address. The kernel create !! 3158 config I8253
1202 the address where the kernel is loa !! 3159 bool
1203 the TLB page size of the mapping fo !! 3160 select CLKSRC_I8253
1204 Please refer to the init code for f !! 3161 select CLKEVT_I8253
1205 !! 3162 select MIPS_EXTERNAL_TIMER
1206 DYNAMIC_MEMSTART is an easy way of !! 3163 endmenu
1207 kernel image, where the only restri !! 3164
1208 load address. When this option is e !! 3165 config TRAD_SIGNALS
1209 address CONFIG_PHYSICAL_START is ig !! 3166 bool
1210 !! 3167
1211 This option is overridden by CONFIG !! 3168 config MIPS32_COMPAT
1212 !! 3169 bool
1213 config PAGE_OFFSET_BOOL !! 3170
1214 bool "Set custom page offset address" !! 3171 config COMPAT
1215 depends on ADVANCED_OPTIONS !! 3172 bool
1216 help !! 3173
1217 This option allows you to set the k !! 3174 config MIPS32_O32
1218 the kernel will map low memory. Th !! 3175 bool "Kernel support for o32 binaries"
1219 the virtual memory layout of the sy !! 3176 depends on 64BIT
1220 !! 3177 select ARCH_WANT_OLD_COMPAT_IPC
1221 Say N here unless you know what you !! 3178 select COMPAT
1222 !! 3179 select MIPS32_COMPAT
1223 config PAGE_OFFSET <<
1224 hex "Virtual address of memory base" <<
1225 default "0xc0000000" <<
1226 <<
1227 config KERNEL_START_BOOL <<
1228 bool "Set custom kernel base address" <<
1229 depends on ADVANCED_OPTIONS <<
1230 help <<
1231 This option allows you to set the k <<
1232 the kernel will be loaded. Normall <<
1233 however there are times (like kdump <<
1234 to be the same. <<
1235 <<
1236 Say N here unless you know what you <<
1237 <<
1238 config KERNEL_START <<
1239 hex "Virtual address of kernel base" <<
1240 default PAGE_OFFSET if PAGE_OFFSET_BO <<
1241 default "0xc2000000" if CRASH_DUMP && <<
1242 default "0xc0000000" <<
1243 <<
1244 config PHYSICAL_START_BOOL <<
1245 bool "Set physical address where the <<
1246 depends on ADVANCED_OPTIONS && FLATME <<
1247 help 3180 help
1248 This gives the physical address whe !! 3181 Select this option if you want to run o32 binaries. These are pure
>> 3182 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3183 existing binaries are in this format.
1249 3184
1250 Say N here unless you know what you !! 3185 If unsure, say Y.
1251 3186
1252 config PHYSICAL_START !! 3187 config MIPS32_N32
1253 hex "Physical address where the kerne !! 3188 bool "Kernel support for n32 binaries"
1254 default "0x02000000" if PPC_BOOK3S && !! 3189 depends on 64BIT
1255 default "0x00000000" !! 3190 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
1256 !! 3191 select COMPAT
1257 config PHYSICAL_ALIGN !! 3192 select MIPS32_COMPAT
1258 hex !! 3193 help
1259 default "0x04000000" if PPC_85xx !! 3194 Select this option if you want to run n32 binaries. These are
1260 help !! 3195 64-bit binaries using 32-bit quantities for addressing and certain
1261 This value puts the alignment restr !! 3196 data that would normally be 64-bit. They are used in special
1262 where kernel is loaded and run from !! 3197 cases.
1263 address which meets above alignment <<
1264 <<
1265 config TASK_SIZE_BOOL <<
1266 bool "Set custom user task size" <<
1267 depends on ADVANCED_OPTIONS <<
1268 help <<
1269 This option allows you to set the a <<
1270 allocated to user tasks. This can <<
1271 virtual memory layout of the system <<
1272 <<
1273 Say N here unless you know what you <<
1274 <<
1275 config TASK_SIZE <<
1276 hex "Size of user task space" if TASK <<
1277 default "0x80000000" if PPC_8xx <<
1278 default "0xb0000000" if PPC_BOOK3S_32 <<
1279 default "0xc0000000" <<
1280 <<
1281 config MODULES_SIZE_BOOL <<
1282 bool "Set custom size for modules/exe <<
1283 depends on EXECMEM && ADVANCED_OPTION <<
1284 help <<
1285 This option allows you to set the s <<
1286 space dedicated for modules/execmem <<
1287 For the time being it is only for 8 <<
1288 platform share it with vmalloc spac <<
1289 <<
1290 Say N here unless you know what you <<
1291 <<
1292 config MODULES_SIZE <<
1293 int "Size of modules/execmem area (In <<
1294 range 1 256 if EXECMEM <<
1295 default 64 if EXECMEM && PPC_BOOK3S_3 <<
1296 default 32 if EXECMEM && PPC_8xx <<
1297 default 0 <<
1298 3198
1299 endmenu !! 3199 If unsure, say N.
1300 3200
1301 if PPC64 !! 3201 config CC_HAS_MNO_BRANCH_LIKELY
1302 # This value must have zeroes in the bottom 6 !! 3202 def_bool y
1303 config PAGE_OFFSET !! 3203 depends on $(cc-option,-mno-branch-likely)
1304 hex !! 3204
1305 default "0xc000000000000000" !! 3205 # https://github.com/llvm/llvm-project/issues/61045
1306 config KERNEL_START !! 3206 config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
1307 hex !! 3207 def_bool y if CC_IS_CLANG
1308 default "0xc000000000000000" !! 3208
1309 config PHYSICAL_START !! 3209 menu "Power management options"
1310 hex !! 3210
1311 default "0x00000000" !! 3211 config ARCH_HIBERNATION_POSSIBLE
1312 endif !! 3212 def_bool y
>> 3213 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3214
>> 3215 config ARCH_SUSPEND_POSSIBLE
>> 3216 def_bool y
>> 3217 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3218
>> 3219 source "kernel/power/Kconfig"
>> 3220
>> 3221 endmenu
1313 3222
1314 config PPC_LIB_RHEAP !! 3223 config MIPS_EXTERNAL_TIMER
1315 bool 3224 bool
1316 3225
1317 source "arch/powerpc/kvm/Kconfig" !! 3226 menu "CPU Power Management"
>> 3227
>> 3228 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3229 source "drivers/cpufreq/Kconfig"
>> 3230 endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3231
>> 3232 source "drivers/cpuidle/Kconfig"
>> 3233
>> 3234 endmenu
>> 3235
>> 3236 source "arch/mips/kvm/Kconfig"
1318 3237
1319 source "kernel/livepatch/Kconfig" !! 3238 source "arch/mips/vdso/Kconfig"
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