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Linux/arch/powerpc/boot/dts/fsl/gef_sbc310.dts

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Diff markup

Differences between /arch/powerpc/boot/dts/fsl/gef_sbc310.dts (Architecture i386) and /arch/mips/boot/dts/fsl/gef_sbc310.dts (Architecture mips)


  1 // SPDX-License-Identifier: GPL-2.0-or-later      
  2 /*                                                
  3  * GE SBC310 Device Tree Source                   
  4  *                                                
  5  * Copyright 2008 GE Intelligent Platforms Emb    
  6  *                                                
  7  * Based on: SBS CM6 Device Tree Source           
  8  * Copyright 2007 SBS Technologies GmbH & Co.     
  9  * And: mpc8641_hpcn.dts (MPC8641 HPCN Device     
 10  * Copyright 2006 Freescale Semiconductor Inc.    
 11  */                                               
 12                                                   
 13 /*                                                
 14  * Compiled with dtc -I dts -O dtb -o gef_sbc3    
 15  */                                               
 16                                                   
 17 /include/ "mpc8641si-pre.dtsi"                    
 18                                                   
 19 / {                                               
 20         model = "GEF_SBC310";                     
 21         compatible = "gef,sbc310";                
 22                                                   
 23         memory {                                  
 24                 device_type = "memory";           
 25                 reg = <0x0 0x40000000>; // set    
 26         };                                        
 27                                                   
 28         lbc: localbus@fef05000 {                  
 29                 reg = <0xfef05000 0x1000>;        
 30                                                   
 31                 ranges = <0 0 0xff000000 0x010    
 32                           1 0 0xe0000000 0x080    
 33                           2 0 0xe8000000 0x080    
 34                           3 0 0xfc100000 0x000    
 35                           4 0 0xfc000000 0x000    
 36                                                   
 37                 /* flash@0,0 is a mirror of pa    
 38                 flash@0,0 {                       
 39                         compatible = "gef,sbc3    
 40                         reg = <0x0 0x0 0x01000    
 41                         bank-width = <2>;         
 42                         device-width = <2>;       
 43                         #address-cells = <1>;     
 44                         #size-cells = <1>;        
 45                         partition@0 {             
 46                                 label = "firmw    
 47                                 reg = <0x0 0x0    
 48                                 read-only;        
 49                         };                        
 50                 };                                
 51                 */                                
 52                                                   
 53                 flash@1,0 {                       
 54                         compatible = "gef,sbc3    
 55                         reg = <0x1 0x0 0x80000    
 56                         bank-width = <2>;         
 57                         device-width = <2>;       
 58                         #address-cells = <1>;     
 59                         #size-cells = <1>;        
 60                         partition@0 {             
 61                                 label = "user"    
 62                                 reg = <0x0 0x7    
 63                         };                        
 64                         partition@7800000 {       
 65                                 label = "firmw    
 66                                 reg = <0x78000    
 67                                 read-only;        
 68                         };                        
 69                 };                                
 70                                                   
 71                 nvram@3,0 {                       
 72                         device_type = "nvram";    
 73                         compatible = "simtek,s    
 74                         reg = <0x3 0x0 0x20000    
 75                 };                                
 76                                                   
 77                 fpga@4,0 {                        
 78                         compatible = "gef,fpga    
 79                         reg = <0x4 0x0 0x40>;     
 80                 };                                
 81                                                   
 82                 wdt@4,2000 {                      
 83                         compatible = "gef,sbc3    
 84                                 "gef,fpga-wdt"    
 85                         reg = <0x4 0x2000 0x8>    
 86                         interrupts = <0x1a 0x4    
 87                         interrupt-parent = <&g    
 88                 };                                
 89 /*                                                
 90                 wdt@4,2010 {                      
 91                         compatible = "gef,sbc3    
 92                                 "gef,fpga-wdt"    
 93                         reg = <0x4 0x2010 0x8>    
 94                         interrupts = <0x1b 0x4    
 95                         interrupt-parent = <&g    
 96                 };                                
 97 */                                                
 98                 gef_pic: pic@4,4000 {             
 99                         #interrupt-cells = <1>    
100                         interrupt-controller;     
101                         compatible = "gef,sbc3    
102                         reg = <0x4 0x4000 0x20    
103                         interrupts = <0x8 0x9     
104                                                   
105                 };                                
106                 gef_gpio: gpio@4,8000 {           
107                         #gpio-cells = <2>;        
108                         compatible = "gef,sbc3    
109                         reg = <0x4 0x8000 0x24    
110                         gpio-controller;          
111                 };                                
112         };                                        
113                                                   
114         soc: soc@fef00000 {                       
115                 ranges = <0x0 0xfef00000 0x001    
116                                                   
117                 i2c@3000 {                        
118                         rtc@51 {                  
119                                 compatible = "    
120                                 reg = <0x00000    
121                         };                        
122                 };                                
123                                                   
124                 i2c@3100 {                        
125                         hwmon@48 {                
126                                 compatible = "    
127                                 reg = <0x48>;     
128                         };                        
129                                                   
130                         hwmon@4c {                
131                                 compatible = "    
132                                 reg = <0x4c>;     
133                         };                        
134                                                   
135                         eti@6b {                  
136                                 compatible = "    
137                                 reg = <0x6b>;     
138                         };                        
139                 };                                
140                                                   
141                 enet0: ethernet@24000 {           
142                         tbi-handle = <&tbi0>;     
143                         phy-handle = <&phy0>;     
144                         phy-connection-type =     
145                 };                                
146                                                   
147                 mdio@24520 {                      
148                         phy0: ethernet-phy@0 {    
149                                 interrupt-pare    
150                                 interrupts = <    
151                                 reg = <1>;        
152                         };                        
153                         phy2: ethernet-phy@2 {    
154                                 interrupt-pare    
155                                 interrupts = <    
156                                 reg = <3>;        
157                         };                        
158                         tbi0: tbi-phy@11 {        
159                                 reg = <0x11>;     
160                                 device_type =     
161                         };                        
162                 };                                
163                                                   
164                 enet1: ethernet@26000 {           
165                         tbi-handle = <&tbi2>;     
166                         phy-handle = <&phy2>;     
167                         phy-connection-type =     
168                 };                                
169                                                   
170                 mdio@26520 {                      
171                         tbi2: tbi-phy@11 {        
172                                 reg = <0x11>;     
173                                 device_type =     
174                         };                        
175                 };                                
176                                                   
177                 enet2: ethernet@25000 {           
178                         status = "disabled";      
179                 };                                
180                                                   
181                 mdio@25520 {                      
182                         status = "disabled";      
183                 };                                
184                                                   
185                 enet3: ethernet@27000 {           
186                         status = "disabled";      
187                 };                                
188                                                   
189                 mdio@27520 {                      
190                         status = "disabled";      
191                 };                                
192         };                                        
193                                                   
194         pci0: pcie@fef08000 {                     
195                 reg = <0xfef08000 0x1000>;        
196                 ranges = <0x02000000 0x0 0x800    
197                           0x01000000 0x0 0x000    
198                 interrupt-map-mask = <0xff00 0    
199                 interrupt-map = <                 
200                         0x0000 0x0 0x0 0x1 &mp    
201                         0x0000 0x0 0x0 0x2 &mp    
202                         0x0000 0x0 0x0 0x3 &mp    
203                         0x0000 0x0 0x0 0x4 &mp    
204                 >;                                
205                                                   
206                 pcie@0 {                          
207                         ranges = <0x02000000 0    
208                                   0x02000000 0    
209                                   0x0 0x400000    
210                                                   
211                                   0x01000000 0    
212                                   0x01000000 0    
213                                   0x0 0x004000    
214                 };                                
215         };                                        
216                                                   
217         pci1: pcie@fef09000 {                     
218                 reg = <0xfef09000 0x1000>;        
219                 ranges = <0x02000000 0x0 0xc00    
220                           0x01000000 0x0 0x000    
221                                                   
222                 pcie@0 {                          
223                         ranges = <0x02000000 0    
224                                   0x02000000 0    
225                                   0x0 0x200000    
226                                                   
227                                   0x01000000 0    
228                                   0x01000000 0    
229                                   0x0 0x004000    
230                 };                                
231         };                                        
232 };                                                
233                                                   
234 /include/ "mpc8641si-post.dtsi"                   
                                                      

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