1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * MPC8544 DS Device Tree Source
4 *
5 * Copyright 2007, 2008 Freescale Semiconducto
6 */
7
8 /include/ "mpc8544si-pre.dtsi"
9
10 / {
11 model = "MPC8544DS";
12 compatible = "MPC8544DS", "MPC85xxDS";
13
14 memory {
15 device_type = "memory";
16 reg = <0 0 0 0>; // Fil
17 };
18
19 board_lbc: lbc: localbus@e0005000 {
20 reg = <0 0xe0005000 0 0x1000>;
21
22 ranges = <0x0 0x0 0x0 0xff8000
23 };
24
25 board_soc: soc: soc8544@e0000000 {
26 ranges = <0x0 0x0 0xe0000000 0
27 };
28
29 pci0: pci@e0008000 {
30 reg = <0 0xe0008000 0 0x1000>;
31 ranges = <0x2000000 0x0 0xc000
32 0x1000000 0x0 0x0000
33 clock-frequency = <66666666>;
34 interrupt-map-mask = <0xf800 0
35 interrupt-map = <
36
37 /* IDSEL 0x11 J17 Slot
38 0x8800 0x0 0x0 0x1 &mp
39 0x8800 0x0 0x0 0x2 &mp
40 0x8800 0x0 0x0 0x3 &mp
41 0x8800 0x0 0x0 0x4 &mp
42
43 /* IDSEL 0x12 J16 Slot
44
45 0x9000 0x0 0x0 0x1 &mp
46 0x9000 0x0 0x0 0x2 &mp
47 0x9000 0x0 0x0 0x3 &mp
48 0x9000 0x0 0x0 0x4 &mp
49 };
50
51 pci1: pcie@e0009000 {
52 reg = <0x0 0xe0009000 0x0 0x10
53 ranges = <0x2000000 0x0 0x8000
54 0x1000000 0x0 0x0000
55 pcie@0 {
56 ranges = <0x2000000 0x
57 0x2000000 0x
58 0x0 0x200000
59
60 0x1000000 0x
61 0x1000000 0x
62 0x0 0x10000>
63 };
64 };
65
66 pci2: pcie@e000a000 {
67 reg = <0x0 0xe000a000 0x0 0x10
68 ranges = <0x2000000 0x0 0xa000
69 0x1000000 0x0 0x0000
70 pcie@0 {
71 ranges = <0x2000000 0x
72 0x2000000 0x
73 0x0 0x100000
74
75 0x1000000 0x
76 0x1000000 0x
77 0x0 0x10000>
78 };
79 };
80
81 board_pci3: pci3: pcie@e000b000 {
82 reg = <0x0 0xe000b000 0x0 0x10
83 ranges = <0x2000000 0x0 0xb000
84 0x1000000 0x0 0x0000
85 pcie@0 {
86 ranges = <0x2000000 0x
87 0x2000000 0x
88 0x0 0x100000
89
90 0x1000000 0x
91 0x1000000 0x
92 0x0 0x100000
93 };
94 };
95 };
96
97 /*
98 * mpc8544ds.dtsi must be last to ensure board
99 * for interrupt-map & interrupt-map-mask
100 */
101
102 /include/ "mpc8544si-post.dtsi"
103 /include/ "mpc8544ds.dtsi"
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