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Linux/arch/powerpc/boot/dts/fsl/p1010rdb-pb_36b.dts

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Diff markup

Differences between /arch/powerpc/boot/dts/fsl/p1010rdb-pb_36b.dts (Architecture i386) and /arch/alpha/boot/dts/fsl/p1010rdb-pb_36b.dts (Architecture alpha)


  1 /*                                                
  2  * P1010 RDB Device Tree Source (36-bit addres    
  3  *                                                
  4  * Copyright 2011 Freescale Semiconductor Inc.    
  5  *                                                
  6  * Redistribution and use in source and binary    
  7  * modification, are permitted provided that t    
  8  *     * Redistributions of source code must r    
  9  *       notice, this list of conditions and t    
 10  *     * Redistributions in binary form must r    
 11  *       notice, this list of conditions and t    
 12  *       documentation and/or other materials     
 13  *     * Neither the name of Freescale Semicon    
 14  *       names of its contributors may be used    
 15  *       derived from this software without sp    
 16  *                                                
 17  *                                                
 18  * ALTERNATIVELY, this software may be distrib    
 19  * GNU General Public License ("GPL") as publi    
 20  * Foundation, either version 2 of that Licens    
 21  * later version.                                 
 22  *                                                
 23  * THIS SOFTWARE IS PROVIDED BY Freescale Semi    
 24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, B    
 25  * WARRANTIES OF MERCHANTABILITY AND FITNESS F    
 26  * DISCLAIMED. IN NO EVENT SHALL Freescale Sem    
 27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEM    
 28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT    
 29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS     
 30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONT    
 31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING    
 32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILIT    
 33  */                                               
 34                                                   
 35 /include/ "p1010si-pre.dtsi"                      
 36                                                   
 37 / {                                               
 38         model = "fsl,P1010RDB-PB";                
 39         compatible = "fsl,P1010RDB-PB";           
 40                                                   
 41         /include/ "p1010rdb_36b.dtsi"             
 42 };                                                
 43                                                   
 44 /include/ "p1010rdb.dtsi"                         
 45                                                   
 46 &phy0 {                                           
 47         interrupts = <0 1 0 0>;                   
 48 };                                                
 49                                                   
 50 &phy1 {                                           
 51         interrupts = <2 1 0 0>;                   
 52 };                                                
 53                                                   
 54 &phy2 {                                           
 55         interrupts = <1 1 0 0>;                   
 56 };                                                
 57                                                   
 58 /include/ "p1010si-post.dtsi"                     
 59                                                   
 60 &pci0 {                                           
 61         pcie@0 {                                  
 62                 interrupt-map = <                 
 63                         /* IDSEL 0x0 */           
 64                         /*                        
 65                          *irq[4:5] are active-    
 66                          *irq[6:7] are active-    
 67                          */                       
 68                         0000 0x0 0x0 0x1 &mpic    
 69                         0000 0x0 0x0 0x2 &mpic    
 70                         0000 0x0 0x0 0x3 &mpic    
 71                         0000 0x0 0x0 0x4 &mpic    
 72                         >;                        
 73         };                                        
 74 };                                                
                                                      

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