1 /*
2 * P1020/P1011 Silicon/SoC Device Tree Source
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary
7 * modification, are permitted provided that t
8 * * Redistributions of source code must r
9 * notice, this list of conditions and t
10 * * Redistributions in binary form must r
11 * notice, this list of conditions and t
12 * documentation and/or other materials
13 * * Neither the name of Freescale Semicon
14 * names of its contributors may be used
15 * derived from this software without sp
16 *
17 *
18 * ALTERNATIVELY, this software may be distrib
19 * GNU General Public License ("GPL") as publi
20 * Foundation, either version 2 of that Licens
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semi
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, B
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS F
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Sem
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEM
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILIT
33 */
34
35 &lbc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p1020-elbc", "fsl,el
39 interrupts = <19 2 0 0>,
40 <16 2 0 0>;
41 };
42
43 /* controller at 0x9000 */
44 &pci0 {
45 compatible = "fsl,mpc8548-pcie";
46 device_type = "pci";
47 #size-cells = <2>;
48 #address-cells = <3>;
49 bus-range = <0 255>;
50 clock-frequency = <33333333>;
51 interrupts = <16 2 0 0>;
52
53 pcie@0 {
54 reg = <0 0 0 0 0>;
55 #interrupt-cells = <1>;
56 #size-cells = <2>;
57 #address-cells = <3>;
58 device_type = "pci";
59 interrupts = <16 2 0 0>;
60 interrupt-map-mask = <0xf800 0
61 interrupt-map = <
62 /* IDSEL 0x0 */
63 0000 0x0 0x0 0x1 &mpic
64 0000 0x0 0x0 0x2 &mpic
65 0000 0x0 0x0 0x3 &mpic
66 0000 0x0 0x0 0x4 &mpic
67 >;
68 };
69 };
70
71 /* controller at 0xa000 */
72 &pci1 {
73 compatible = "fsl,mpc8548-pcie";
74 device_type = "pci";
75 #size-cells = <2>;
76 #address-cells = <3>;
77 bus-range = <0 255>;
78 clock-frequency = <33333333>;
79 interrupts = <16 2 0 0>;
80
81 pcie@0 {
82 reg = <0 0 0 0 0>;
83 #interrupt-cells = <1>;
84 #size-cells = <2>;
85 #address-cells = <3>;
86 device_type = "pci";
87 interrupts = <16 2 0 0>;
88 interrupt-map-mask = <0xf800 0
89
90 interrupt-map = <
91 /* IDSEL 0x0 */
92 0000 0x0 0x0 0x1 &mpic
93 0000 0x0 0x0 0x2 &mpic
94 0000 0x0 0x0 0x3 &mpic
95 0000 0x0 0x0 0x4 &mpic
96 >;
97 };
98 };
99
100 &soc {
101 #address-cells = <1>;
102 #size-cells = <1>;
103 device_type = "soc";
104 compatible = "fsl,p1020-immr", "simple
105 bus-frequency = <0>; // Fil
106
107 ecm-law@0 {
108 compatible = "fsl,ecm-law";
109 reg = <0x0 0x1000>;
110 fsl,num-laws = <12>;
111 };
112
113 ecm@1000 {
114 compatible = "fsl,p1020-ecm",
115 reg = <0x1000 0x1000>;
116 interrupts = <16 2 0 0>;
117 };
118
119 memory-controller@2000 {
120 compatible = "fsl,p1020-memory
121 reg = <0x2000 0x1000>;
122 interrupts = <16 2 0 0>;
123 };
124
125 /include/ "pq3-i2c-0.dtsi"
126 /include/ "pq3-i2c-1.dtsi"
127 /include/ "pq3-duart-0.dtsi"
128
129 /include/ "pq3-espi-0.dtsi"
130 spi@7000 {
131 fsl,espi-num-chipselects = <4>
132 };
133
134 /include/ "pq3-gpio-0.dtsi"
135
136 L2: l2-cache-controller@20000 {
137 compatible = "fsl,p1020-l2-cac
138 reg = <0x20000 0x1000>;
139 cache-line-size = <32>; // 32
140 cache-size = <0x40000>; // L2,
141 interrupts = <16 2 0 0>;
142 };
143
144 /include/ "pq3-dma-0.dtsi"
145 /include/ "pq3-usb2-dr-0.dtsi"
146 usb@22000 {
147 compatible = "fsl-usb2-dr-v1.6
148 };
149 /include/ "pq3-usb2-dr-1.dtsi"
150 usb@23000 {
151 compatible = "fsl-usb2-dr-v1.6
152 };
153
154 /include/ "pq3-esdhc-0.dtsi"
155 sdhc@2e000 {
156 compatible = "fsl,p1020-esdhc"
157 sdhci,auto-cmd12;
158 };
159 /include/ "pq3-sec3.3-0.dtsi"
160
161 /include/ "pq3-mpic.dtsi"
162 /include/ "pq3-mpic-timer-B.dtsi"
163
164 /include/ "pq3-etsec2-0.dtsi"
165 enet0: enet0_grp2: ethernet@b0000 {
166 fsl,pmc-handle = <&etsec1_clk>
167 };
168
169 /include/ "pq3-etsec2-1.dtsi"
170 enet1: enet1_grp2: ethernet@b1000 {
171 fsl,pmc-handle = <&etsec2_clk>
172 };
173
174 /include/ "pq3-etsec2-2.dtsi"
175 enet2: enet2_grp2: ethernet@b2000 {
176 fsl,pmc-handle = <&etsec3_clk>
177 };
178
179 global-utilities@e0000 {
180 compatible = "fsl,p1020-guts";
181 reg = <0xe0000 0x1000>;
182 fsl,has-rstcr;
183 };
184
185 /include/ "pq3-power.dtsi"
186 };
187
188 /include/ "pq3-etsec2-grp2-0.dtsi"
189 /include/ "pq3-etsec2-grp2-1.dtsi"
190 /include/ "pq3-etsec2-grp2-2.dtsi"
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.