1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * P1021 MDS Device Tree Source
4 *
5 * Copyright 2010,2012 Freescale Semiconductor
6 */
7
8 /include/ "p1021si-pre.dtsi"
9 / {
10 model = "fsl,P1021";
11 compatible = "fsl,P1021MDS";
12
13 aliases {
14 ethernet3 = &enet3;
15 ethernet4 = &enet4;
16 };
17
18 memory {
19 device_type = "memory";
20 };
21
22 lbc: localbus@ffe05000 {
23 reg = <0x0 0xffe05000 0x0 0x10
24
25 /* NAND Flash, BCSR, PMC0/1*/
26 ranges = <0x0 0x0 0x0 0xfc0000
27 0x1 0x0 0x0 0xf80000
28 0x2 0x0 0x0 0xf80100
29 0x3 0x0 0x0 0xf80200
30
31 nand@0,0 {
32 #address-cells = <1>;
33 #size-cells = <1>;
34 compatible = "fsl,p102
35 "fsl,elbc
36 reg = <0x0 0x0 0x40000
37
38 partition@0 {
39 /* This locati
40 /* 1MB for u-b
41 reg = <0x0 0x0
42 label = "NAND
43 read-only;
44 };
45
46 partition@100000 {
47 /* 1MB for DTB
48 reg = <0x00100
49 label = "NAND
50 read-only;
51 };
52
53 partition@200000 {
54 /* 4MB for Lin
55 reg = <0x00200
56 label = "NAND
57 read-only;
58 };
59
60 partition@600000 {
61 /* 5MB for Com
62 reg = <0x00600
63 label = "NAND
64 read-only;
65 };
66
67 partition@b00000 {
68 /* 6MB for JFF
69 reg = <0x00a00
70 label = "NAND
71 };
72
73 partition@1100000 {
74 /* 14MB for JF
75 reg = <0x01100
76 label = "NAND
77 };
78
79 partition@1f00000 {
80 /* 1MB for mic
81 reg = <0x01f00
82 label = "NAND
83 read-only;
84 };
85 };
86
87 bcsr@1,0 {
88 #address-cells = <1>;
89 #size-cells = <1>;
90 compatible = "fsl,p102
91 reg = <1 0 0x8000>;
92 ranges = <0 1 0 0x8000
93 };
94
95 pib@2,0 {
96 compatible = "fsl,p102
97 reg = <2 0 0x10000>;
98 };
99
100 pib@3,0 {
101 compatible = "fsl,p102
102 reg = <3 0 0x10000>;
103 };
104 };
105
106 soc: soc@ffe00000 {
107 compatible = "fsl,p1021-immr",
108 ranges = <0x0 0x0 0xffe00000 0
109
110 i2c@3000 {
111 rtc@68 {
112 compatible = "
113 reg = <0x68>;
114 };
115 };
116
117 spi@7000 {
118
119 flash@0 {
120 #address-cells
121 #size-cells =
122 compatible = "
123 reg = <0>;
124 spi-max-freque
125
126 partition@u-bo
127 label
128 reg =
129 read-o
130 };
131 partition@kern
132 label
133 reg =
134 read-o
135 };
136 partition@dtb
137 label
138 reg =
139 read-o
140 };
141 partition@fs {
142 label
143 reg =
144 };
145 };
146 };
147
148 usb@22000 {
149 phy_type = "ulpi";
150 dr_mode = "host";
151 };
152
153 mdio@24000 {
154 phy0: ethernet-phy@0 {
155 interrupts = <
156 reg = <0x0>;
157 };
158 phy1: ethernet-phy@1 {
159 interrupts = <
160 reg = <0x1>;
161 };
162 phy4: ethernet-phy@4 {
163 reg = <0x4>;
164 };
165 tbi-phy@5 {
166 device_type =
167 reg = <0x5>;
168 };
169 };
170
171 mdio@25000 {
172 tbi0: tbi-phy@11 {
173 reg = <0x11>;
174 device_type =
175 };
176 };
177
178 ethernet@b0000 {
179 phy-handle = <&phy0>;
180 phy-connection-type =
181 };
182
183 ethernet@b1000 {
184 phy-handle = <&phy4>;
185 tbi-handle = <&tbi0>;
186 phy-connection-type =
187 };
188
189 ethernet@b2000 {
190 phy-handle = <&phy1>;
191 phy-connection-type =
192 };
193
194 par_io@e0100 {
195 #address-cells = <1>;
196 #size-cells = <1>;
197 reg = <0xe0100 0x60>;
198 ranges = <0x0 0xe0100
199 device_type = "par_io"
200 num-ports = <3>;
201 pio1: ucc_pin@1 {
202 pio-map = <
203 /* port pin dir ope
204 0x1 0
205 0x1 0
206 0x0 0
207 0x0 0
208 0x0 0
209 0x0 0
210 0x0 0
211 0x0 0
212 0x0 0
213 0x0 0
214 0x0 0
215 0x0 0
216 0x0 0
217 0x0 0
218 0x0 0
219 0x0 0
220 0x0 0
221 0x0 0
222 };
223
224 pio2: ucc_pin@2 {
225 pio-map = <
226 /* port pin dir ope
227 0x1 0
228 0x1 0
229 0x1 0
230 0x1 0
231 0x1 0
232 0x1 0
233 0x1 0
234 0x1 0
235 0x1 0
236 0x1 0
237 };
238 };
239 };
240
241 pci0: pcie@ffe09000 {
242 reg = <0 0xffe09000 0 0x1000>;
243 ranges = <0x2000000 0x0 0xa000
244 0x1000000 0x0 0x0000
245 pcie@0 {
246 ranges = <0x2000000 0x
247 0x2000000 0x
248 0x0 0x200000
249
250 0x1000000 0x
251 0x1000000 0x
252 0x0 0x100000
253 };
254 };
255
256 pci1: pcie@ffe0a000 {
257 reg = <0 0xffe0a000 0 0x1000>;
258 ranges = <0x2000000 0x0 0xc000
259 0x1000000 0x0 0x0000
260 pcie@0 {
261 ranges = <0x2000000 0x
262 0x2000000 0x
263 0x0 0x200000
264
265 0x1000000 0x
266 0x1000000 0x
267 0x0 0x100000
268 };
269 };
270
271 qe: qe@ffe80000 {
272 ranges = <0x0 0x0 0xffe80000 0
273 reg = <0 0xffe80000 0 0x480>;
274 brg-frequency = <0>;
275 bus-frequency = <0>;
276 status = "disabled"; /* no fir
277
278 enet3: ucc@2000 {
279 device_type = "network
280 compatible = "ucc_geth
281 local-mac-address = [
282 rx-clock-name = "clk12
283 tx-clock-name = "clk9"
284 pio-handle = <&pio1>;
285 phy-handle = <&qe_phy0
286 phy-connection-type =
287 };
288
289 mdio@2120 {
290 qe_phy0: ethernet-phy@
291 interrupt-pare
292 interrupts = <
293 reg = <0x0>;
294 };
295 qe_phy1: ethernet-phy@
296 interrupt-pare
297 interrupts = <
298 reg = <0x3>;
299 };
300 tbi-phy@11 {
301 reg = <0x11>;
302 device_type =
303 };
304 };
305
306 enet4: ucc@2400 {
307 device_type = "network
308 compatible = "ucc_geth
309 local-mac-address = [
310 rx-clock-name = "none"
311 tx-clock-name = "clk13
312 pio-handle = <&pio2>;
313 phy-handle = <&qe_phy1
314 phy-connection-type =
315 };
316 };
317 };
318
319 /include/ "p1021si-post.dtsi"
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