1 /*
2 * QorIQ Sec/Crypto 5.2 device tree stub [ con
3 *
4 * Copyright 2011-2012 Freescale Semiconductor
5 *
6 * Redistribution and use in source and binary
7 * modification, are permitted provided that t
8 * * Redistributions of source code must r
9 * notice, this list of conditions and t
10 * * Redistributions in binary form must r
11 * notice, this list of conditions and t
12 * documentation and/or other materials
13 * * Neither the name of Freescale Semicon
14 * names of its contributors may be used
15 * derived from this software without sp
16 *
17 *
18 * ALTERNATIVELY, this software may be distrib
19 * GNU General Public License ("GPL") as publi
20 * Foundation, either version 2 of that Licens
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semi
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, B
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS F
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Sem
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEM
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILIT
33 */
34
35 crypto: crypto@300000 {
36 compatible = "fsl,sec-v5.2", "fsl,sec-
37 fsl,sec-era = <5>;
38 #address-cells = <1>;
39 #size-cells = <1>;
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000
42 interrupts = <92 2 0 0>;
43
44 sec_jr0: jr@1000 {
45 compatible = "fsl,sec-v5.2-job
46 "fsl,sec-v5.0-job
47 "fsl,sec-v4.0-job
48 reg = <0x1000 0x1000>;
49 interrupts = <88 2 0 0>;
50 };
51
52 sec_jr1: jr@2000 {
53 compatible = "fsl,sec-v5.2-job
54 "fsl,sec-v5.0-job
55 "fsl,sec-v4.0-job
56 reg = <0x2000 0x1000>;
57 interrupts = <89 2 0 0>;
58 };
59
60 sec_jr2: jr@3000 {
61 compatible = "fsl,sec-v5.2-job
62 "fsl,sec-v5.0-job
63 "fsl,sec-v4.0-job
64 reg = <0x3000 0x1000>;
65 interrupts = <90 2 0 0>;
66 };
67
68 sec_jr3: jr@4000 {
69 compatible = "fsl,sec-v5.2-job
70 "fsl,sec-v5.0-job
71 "fsl,sec-v4.0-job
72 reg = <0x4000 0x1000>;
73 interrupts = <91 2 0 0>;
74 };
75
76 rtic@6000 {
77 compatible = "fsl,sec-v5.2-rti
78 "fsl,sec-v5.0-rti
79 "fsl,sec-v4.0-rti
80 #address-cells = <1>;
81 #size-cells = <1>;
82 reg = <0x6000 0x100>;
83 ranges = <0x0 0x6100 0xe00>;
84
85 rtic_a: rtic-a@0 {
86 compatible = "fsl,sec-
87 "fsl,sec-
88 "fsl,sec-
89 reg = <0x00 0x20 0x100
90 };
91
92 rtic_b: rtic-b@20 {
93 compatible = "fsl,sec-
94 "fsl,sec-
95 "fsl,sec-
96 reg = <0x20 0x20 0x200
97 };
98
99 rtic_c: rtic-c@40 {
100 compatible = "fsl,sec-
101 "fsl,sec-
102 "fsl,sec-
103 reg = <0x40 0x20 0x300
104 };
105
106 rtic_d: rtic-d@60 {
107 compatible = "fsl,sec-
108 "fsl,sec-
109 "fsl,sec-
110 reg = <0x60 0x20 0x500
111 };
112 };
113 };
114
115 sec_mon: sec_mon@314000 {
116 compatible = "fsl,sec-v5.2-mon", "fsl,
117 reg = <0x314000 0x1000>;
118 interrupts = <93 2 0 0>;
119 };
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