1 /*
2 * T1023 RDB Device Tree Source
3 *
4 * Copyright 2014 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary
7 * modification, are permitted provided that t
8 * * Redistributions of source code must r
9 * notice, this list of conditions and t
10 * * Redistributions in binary form must r
11 * notice, this list of conditions and t
12 * documentation and/or other materials
13 * * Neither the name of Freescale Semicon
14 * names of its contributors may be used
15 * derived from this software without sp
16 *
17 *
18 * ALTERNATIVELY, this software may be distrib
19 * GNU General Public License ("GPL") as publi
20 * Foundation, either version 2 of that Licens
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semi
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, B
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS F
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Sem
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEM
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILIT
33 */
34
35 /include/ "t102xsi-pre.dtsi"
36
37 / {
38 model = "fsl,T1023RDB";
39 compatible = "fsl,T1023RDB";
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
43
44 reserved-memory {
45 #address-cells = <2>;
46 #size-cells = <2>;
47 ranges;
48
49 bman_fbpr: bman-fbpr {
50 size = <0 0x1000000>;
51 alignment = <0 0x10000
52 };
53
54 qman_fqd: qman-fqd {
55 size = <0 0x400000>;
56 alignment = <0 0x40000
57 };
58
59 qman_pfdr: qman-pfdr {
60 size = <0 0x2000000>;
61 alignment = <0 0x20000
62 };
63 };
64
65 ifc: localbus@ffe124000 {
66 reg = <0xf 0xfe124000 0 0x2000
67 ranges = <0 0 0xf 0xe8000000 0
68 1 0 0xf 0xff800000 0
69
70 nor@0,0 {
71 #address-cells = <1>;
72 #size-cells = <1>;
73 status = "disabled";
74 compatible = "cfi-flas
75 reg = <0x0 0x0 0x80000
76 bank-width = <2>;
77 device-width = <1>;
78 };
79
80 nand@1,0 {
81 #address-cells = <1>;
82 #size-cells = <1>;
83 compatible = "fsl,ifc-
84 reg = <0x1 0x0 0x10000
85 };
86 };
87
88 memory {
89 device_type = "memory";
90 };
91
92 dcsr: dcsr@f00000000 {
93 ranges = <0x00000000 0xf 0x000
94 };
95
96 bportals: bman-portals@ff4000000 {
97 ranges = <0x0 0xf 0xf4000000 0
98 };
99
100 qportals: qman-portals@ff6000000 {
101 ranges = <0x0 0xf 0xf6000000 0
102 };
103
104 soc: soc@ffe000000 {
105 ranges = <0x00000000 0xf 0xfe0
106 reg = <0xf 0xfe000000 0 0x0000
107 spi@110000 {
108 flash@0 {
109 #address-cells
110 #size-cells =
111 compatible = "
112 reg = <0>;
113 spi-max-freque
114 };
115 };
116
117 i2c@118000 {
118 eeprom@50 {
119 compatible = "
120 reg = <0x50>;
121 };
122
123 rtc@68 {
124 compatible = "
125 reg = <0x68>;
126 interrupts = <
127 };
128 };
129
130 i2c@118100 {
131 current-sensor@40 {
132 compatible = "
133 reg = <0x40>;
134 shunt-resistor
135 };
136
137 current-sensor@41 {
138 compatible = "
139 reg = <0x41>;
140 shunt-resistor
141 };
142 };
143
144 fman@400000 {
145 fm1mac1: ethernet@e000
146 phy-handle = <
147 phy-connection
148 sleep = <&rcpm
149 };
150
151 fm1mac2: ethernet@e200
152 sleep = <&rcpm
153 };
154
155 fm1mac3: ethernet@e400
156 phy-handle = <
157 phy-connection
158 sleep = <&rcpm
159 };
160
161 fm1mac4: ethernet@e600
162 phy-handle = <
163 phy-connection
164 sleep = <&rcpm
165 };
166
167
168 mdio0: mdio@fc000 {
169 rgmii_rtk_phy1
170 reg =
171 };
172 sgmii_rtk_phy2
173 reg =
174 };
175 };
176
177 xmdio0: mdio@fd000 {
178 sgmii_aqr_phy3
179 compat
180 reg =
181 };
182 };
183 };
184 };
185
186 pci0: pcie@ffe240000 {
187 reg = <0xf 0xfe240000 0 0x1000
188 ranges = <0x02000000 0 0xe0000
189 0x01000000 0 0x00000
190 pcie@0 {
191 ranges = <0x02000000 0
192 0x02000000 0
193 0 0x10000000
194
195 0x01000000 0
196 0x01000000 0
197 0 0x00010000
198 };
199 };
200
201 pci1: pcie@ffe250000 {
202 reg = <0xf 0xfe250000 0 0x1000
203 ranges = <0x02000000 0 0xe0000
204 0x01000000 0 0x00000
205 pcie@0 {
206 ranges = <0x02000000 0
207 0x02000000 0
208 0 0x10000000
209
210 0x01000000 0
211 0x01000000 0
212 0 0x00010000
213 };
214 };
215
216 pci2: pcie@ffe260000 {
217 reg = <0xf 0xfe260000 0 0x1000
218 ranges = <0x02000000 0 0xe0000
219 0x01000000 0 0x00000
220 pcie@0 {
221 ranges = <0x02000000 0
222 0x02000000 0
223 0 0x10000000
224
225 0x01000000 0
226 0x01000000 0
227 0 0x00010000
228 };
229 };
230 };
231
232 #include "t1023si-post.dtsi"
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