1 /*
2 * T1024 Silicon/SoC Device Tree Source (post
3 *
4 * Copyright 2014 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary
7 * modification, are permitted provided that t
8 * * Redistributions of source code must r
9 * notice, this list of conditions and t
10 * * Redistributions in binary form must r
11 * notice, this list of conditions and t
12 * documentation and/or other materials
13 * * Neither the name of Freescale Semicon
14 * names of its contributors may be used
15 * derived from this software without sp
16 *
17 *
18 * ALTERNATIVELY, this software may be distrib
19 * GNU General Public License ("GPL") as publi
20 * Foundation, either version 2 of that Licens
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semi
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, B
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS F
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Sem
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEM
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILIT
33 */
34
35 #include "t1023si-post.dtsi"
36
37 / {
38 aliases {
39 vga = &display;
40 display = &display;
41 };
42
43 qe:qe@ffe140000 {
44 #address-cells = <1>;
45 #size-cells = <1>;
46 device_type = "qe";
47 compatible = "fsl,qe";
48 ranges = <0x0 0xf 0xfe140000 0
49 reg = <0xf 0xfe140000 0 0x480>
50 fsl,qe-num-riscs = <1>;
51 fsl,qe-num-snums = <28>;
52 brg-frequency = <0>;
53 bus-frequency = <0>;
54 };
55 };
56
57 &soc {
58 display:display@180000 {
59 compatible = "fsl,t1024-diu",
60 reg = <0x180000 1000>;
61 interrupts = <74 2 0 0>;
62 };
63 };
64
65 &qe {
66 qeic: interrupt-controller@80 {
67 interrupt-controller;
68 compatible = "fsl,qe-ic";
69 #address-cells = <0>;
70 #interrupt-cells = <1>;
71 reg = <0x80 0x80>;
72 interrupts = <95 2 0 0 94 2 0
73 };
74
75 ucc@2000 {
76 cell-index = <1>;
77 reg = <0x2000 0x200>;
78 interrupts = <32>;
79 interrupt-parent = <&qeic>;
80 };
81
82 ucc@2200 {
83 cell-index = <3>;
84 reg = <0x2200 0x200>;
85 interrupts = <34>;
86 interrupt-parent = <&qeic>;
87 };
88
89 muram@10000 {
90 #address-cells = <1>;
91 #size-cells = <1>;
92 compatible = "fsl,qe-muram", "
93 ranges = <0x0 0x10000 0x6000>;
94
95 data-only@0 {
96 compatible = "fsl,qe-m
97 reg = <0x0 0x6000>;
98 };
99 };
100 };
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