1 /*
2 * Device Tree Source for FSP2
3 *
4 * Copyright 2010,2012 IBM Corp.
5 *
6 * This file is licensed under the terms of th
7 * License version 2. This program is license
8 * any warranty of any kind, whether express o
9 */
10
11
12 /dts-v1/;
13
14 / {
15 #address-cells = <2>;
16 #size-cells = <1>;
17 model = "ibm,fsp2";
18 compatible = "ibm,fsp2";
19 dcr-parent = <&{/cpus/cpu@0}>;
20
21 aliases {
22 ethernet0 = &EMAC0;
23 ethernet1 = &EMAC1;
24 serial0 = &UART0;
25 };
26
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 cpu@0 {
32 device_type = "cpu";
33 model = "PowerPC, 476F
34 reg = <0x0>;
35 clock-frequency = <0>;
36 timebase-frequency = <
37 i-cache-line-size = <3
38 d-cache-line-size = <3
39 d-cache-size = <32768>
40 i-cache-size = <32768>
41 dcr-controller;
42 dcr-access-method = "n
43 };
44 };
45
46 memory {
47 device_type = "memory";
48 reg = <0x00000000 0x00000000 0
49
50 };
51
52 clocks {
53 mmc_clk: mmc_clk {
54 compatible = "fixed-cl
55 #clock-cells = <0>;
56 clock-frequency = <500
57 clock-output-names = "
58 };
59 };
60
61 UIC0: uic0 {
62 #address-cells = <0>;
63 #size-cells = <0>;
64 #interrupt-cells = <2>;
65 compatible = "ibm,uic";
66 interrupt-controller;
67 cell-index = <0>;
68 dcr-reg = <0x2c0 0x8>;
69 };
70
71 /* "interrupts" field is <bit level bi
72 first pair is non-critical, second
73 UIC1_0: uic1_0 {
74 #address-cells = <0>;
75 #size-cells = <0>;
76 #interrupt-cells = <2>;
77
78 compatible = "ibm,uic";
79 interrupt-controller;
80 cell-index = <1>;
81 dcr-reg = <0x2c8 0x8>;
82 interrupt-parent = <&UIC0>;
83 interrupts = <21 0x4 4 0x84>;
84 };
85
86 /* PSI and DMA */
87 UIC1_1: uic1_1 {
88 #address-cells = <0>;
89 #size-cells = <0>;
90 #interrupt-cells = <2>;
91
92 compatible = "ibm,uic";
93 interrupt-controller;
94 cell-index = <2>;
95 dcr-reg = <0x350 0x8>;
96 interrupt-parent = <&UIC0>;
97 interrupts = <22 0x4 5 0x84>;
98 };
99
100 /* Ethernet and USB */
101 UIC1_2: uic1_2 {
102 #address-cells = <0>;
103 #size-cells = <0>;
104 #interrupt-cells = <2>;
105
106 compatible = "ibm,uic";
107 interrupt-controller;
108 cell-index = <3>;
109 dcr-reg = <0x358 0x8>;
110 interrupt-parent = <&UIC0>;
111 interrupts = <23 0x4 6 0x84>;
112 };
113
114 /* PLB Errors */
115 UIC1_3: uic1_3 {
116 #address-cells = <0>;
117 #size-cells = <0>;
118 #interrupt-cells = <2>;
119
120 compatible = "ibm,uic";
121 interrupt-controller;
122 cell-index = <4>;
123 dcr-reg = <0x360 0x8>;
124 interrupt-parent = <&UIC0>;
125 interrupts = <24 0x4 7 0x84>;
126 };
127
128 UIC1_4: uic1_4 {
129 #address-cells = <0>;
130 #size-cells = <0>;
131 #interrupt-cells = <2>;
132
133 compatible = "ibm,uic";
134 interrupt-controller;
135 cell-index = <5>;
136 dcr-reg = <0x368 0x8>;
137 interrupt-parent = <&UIC0>;
138 interrupts = <25 0x4 8 0x84>;
139 };
140
141 UIC1_5: uic1_5 {
142 #address-cells = <0>;
143 #size-cells = <0>;
144 #interrupt-cells = <2>;
145
146 compatible = "ibm,uic";
147 interrupt-controller;
148 cell-index = <6>;
149 dcr-reg = <0x370 0x8>;
150 interrupt-parent = <&UIC0>;
151 interrupts = <26 0x4 9 0x84>;
152 };
153
154 /* 2nd level UICs for FSI */
155 UIC2_0: uic2_0 {
156 #address-cells = <0>;
157 #size-cells = <0>;
158 #interrupt-cells = <2>;
159
160 compatible = "ibm,uic";
161 interrupt-controller;
162 cell-index = <7>;
163 dcr-reg = <0x2d0 0x8>;
164 interrupt-parent = <&UIC1_0>;
165 interrupts = <16 0x4 0 0x84>;
166 };
167
168 UIC2_1: uic2_1 {
169 #address-cells = <0>;
170 #size-cells = <0>;
171 #interrupt-cells = <2>;
172
173 compatible = "ibm,uic";
174 interrupt-controller;
175 cell-index = <8>;
176 dcr-reg = <0x2d8 0x8>;
177 interrupt-parent = <&UIC1_0>;
178 interrupts = <17 0x4 1 0x84>;
179 };
180
181 UIC2_2: uic2_2 {
182 #address-cells = <0>;
183 #size-cells = <0>;
184 #interrupt-cells = <2>;
185
186 compatible = "ibm,uic";
187 interrupt-controller;
188 cell-index = <9>;
189 dcr-reg = <0x2e0 0x8>;
190 interrupt-parent = <&UIC1_0>;
191 interrupts = <18 0x4 2 0x84>;
192 };
193
194 UIC2_3: uic2_3 {
195 #address-cells = <0>;
196 #size-cells = <0>;
197 #interrupt-cells = <2>;
198
199 compatible = "ibm,uic";
200 interrupt-controller;
201 cell-index = <10>;
202 dcr-reg = <0x2e8 0x8>;
203 interrupt-parent = <&UIC1_0>;
204 interrupts = <19 0x4 3 0x84>;
205 };
206
207 UIC2_4: uic2_4 {
208 #address-cells = <0>;
209 #size-cells = <0>;
210 #interrupt-cells = <2>;
211
212 compatible = "ibm,uic";
213 interrupt-controller;
214 cell-index = <11>;
215 dcr-reg = <0x2f0 0x8>;
216 interrupt-parent = <&UIC1_0>;
217 interrupts = <20 0x4 4 0x84>;
218 };
219
220 UIC2_5: uic2_5 {
221 #address-cells = <0>;
222 #size-cells = <0>;
223 #interrupt-cells = <2>;
224
225 compatible = "ibm,uic";
226 interrupt-controller;
227 cell-index = <12>;
228 dcr-reg = <0x2f8 0x8>;
229 interrupt-parent = <&UIC1_0>;
230 interrupts = <21 0x4 5 0x84>;
231 };
232
233 UIC2_6: uic2_6 {
234 #address-cells = <0>;
235 #size-cells = <0>;
236 #interrupt-cells = <2>;
237
238 compatible = "ibm,uic";
239 interrupt-controller;
240 cell-index = <13>;
241 dcr-reg = <0x300 0x8>;
242 interrupt-parent = <&UIC1_0>;
243 interrupts = <22 0x4 6 0x84>;
244 };
245
246 UIC2_7: uic2_7 {
247 #address-cells = <0>;
248 #size-cells = <0>;
249 #interrupt-cells = <2>;
250
251 compatible = "ibm,uic";
252 interrupt-controller;
253 cell-index = <14>;
254 dcr-reg = <0x308 0x8>;
255 interrupt-parent = <&UIC1_0>;
256 interrupts = <23 0x4 7 0x84>;
257 };
258
259 UIC2_8: uic2_8 {
260 #address-cells = <0>;
261 #size-cells = <0>;
262 #interrupt-cells = <2>;
263
264 compatible = "ibm,uic";
265 interrupt-controller;
266 cell-index = <15>;
267 dcr-reg = <0x310 0x8>;
268 interrupt-parent = <&UIC1_0>;
269 interrupts = <24 0x4 8 0x84>;
270 };
271
272 UIC2_9: uic2_9 {
273 #address-cells = <0>;
274 #size-cells = <0>;
275 #interrupt-cells = <2>;
276
277 compatible = "ibm,uic";
278 interrupt-controller;
279 cell-index = <16>;
280 dcr-reg = <0x318 0x8>;
281 interrupt-parent = <&UIC1_0>;
282 interrupts = <25 0x4 9 0x84>;
283 };
284
285 UIC2_10: uic2_10 {
286 #address-cells = <0>;
287 #size-cells = <0>;
288 #interrupt-cells = <2>;
289
290 compatible = "ibm,uic";
291 interrupt-controller;
292 cell-index = <17>;
293 dcr-reg = <0x320 0x8>;
294 interrupt-parent = <&UIC1_0>;
295 interrupts = <26 0x4 10 0x84>;
296 };
297
298 UIC2_11: uic2_11 {
299 #address-cells = <0>;
300 #size-cells = <0>;
301 #interrupt-cells = <2>;
302
303 compatible = "ibm,uic";
304 interrupt-controller;
305 cell-index = <18>;
306 dcr-reg = <0x328 0x8>;
307 interrupt-parent = <&UIC1_0>;
308 interrupts = <27 0x4 11 0x84>;
309 };
310
311 UIC2_12: uic2_12 {
312 #address-cells = <0>;
313 #size-cells = <0>;
314 #interrupt-cells = <2>;
315
316 compatible = "ibm,uic";
317 interrupt-controller;
318 cell-index = <19>;
319 dcr-reg = <0x330 0x8>;
320 interrupt-parent = <&UIC1_0>;
321 interrupts = <28 0x4 12 0x84>;
322 };
323
324 UIC2_13: uic2_13 {
325 #address-cells = <0>;
326 #size-cells = <0>;
327 #interrupt-cells = <2>;
328
329 compatible = "ibm,uic";
330 interrupt-controller;
331 cell-index = <20>;
332 dcr-reg = <0x338 0x8>;
333 interrupt-parent = <&UIC1_0>;
334 interrupts = <29 0x4 13 0x84>;
335 };
336
337 UIC2_14: uic2_14 {
338 #address-cells = <0>;
339 #size-cells = <0>;
340 #interrupt-cells = <2>;
341
342 compatible = "ibm,uic";
343 interrupt-controller;
344 cell-index = <21>;
345 dcr-reg = <0x340 0x8>;
346 interrupt-parent = <&UIC1_0>;
347 interrupts = <30 0x4 14 0x84>;
348 };
349
350 UIC2_15: uic2_15 {
351 #address-cells = <0>;
352 #size-cells = <0>;
353 #interrupt-cells = <2>;
354
355 compatible = "ibm,uic";
356 interrupt-controller;
357 cell-index = <22>;
358 dcr-reg = <0x348 0x8>;
359 interrupt-parent = <&UIC1_0>;
360 interrupts = <31 0x4 15 0x84>;
361 };
362
363 plb6 {
364 compatible = "ibm,plb6";
365 #address-cells = <2>;
366 #size-cells = <1>;
367 ranges;
368
369 MCW0: memory-controller-wrappe
370 compatible = "ibm,cw-4
371 dcr-reg = <0x11111800
372 };
373
374 MCIF0: memory-controller {
375 compatible = "ibm,sdra
376 dcr-reg = <0x11120000
377 mcer-device = <&MCW0>;
378 interrupt-parent = <&U
379 interrupts = <10 0x84
380 11 0x84>
381 };
382 };
383
384 plb4 {
385 compatible = "ibm,plb4";
386 #address-cells = <1>;
387 #size-cells = <1>;
388 ranges = <0x00000000 0x0000001
389 0x80000000 0x0000001
390 clock-frequency = <333333334>;
391
392 plb6-system-hung-irq {
393 compatible = "ibm,bus-
394 #interrupt-cells = <2>
395 interrupt-parent = <&U
396 interrupts = <0 0x84>;
397 };
398
399 l2-error-irq {
400 compatible = "ibm,bus-
401 #interrupt-cells = <2>
402 interrupt-parent = <&U
403 interrupts = <20 0x84>
404 };
405
406 plb6-plb4-irq {
407 compatible = "ibm,bus-
408 #interrupt-cells = <2>
409 interrupt-parent = <&U
410 interrupts = <1 0x84>;
411 };
412
413 plb4-ahb-irq {
414 compatible = "ibm,bus-
415 #interrupt-cells = <2>
416 interrupt-parent = <&U
417 interrupts = <20 0x84>
418 };
419
420 opbd-error-irq {
421 compatible = "ibm,opbd
422 #interrupt-cells = <2>
423 interrupt-parent = <&U
424 interrupts = <5 0x84>;
425 };
426
427 cmu-error-irq {
428 compatible = "ibm,cmu-
429 #interrupt-cells = <2>
430 interrupt-parent = <&U
431 interrupts = <28 0x84>
432 };
433
434 conf-error-irq {
435 compatible = "ibm,conf
436 #interrupt-cells = <2>
437 interrupt-parent = <&U
438 interrupts = <11 0x84>
439 };
440
441 mc-ue-irq {
442 compatible = "ibm,mc-u
443 #interrupt-cells = <2>
444 interrupt-parent = <&U
445 interrupts = <10 0x84>
446 };
447
448 reset-warning-irq {
449 compatible = "ibm,rese
450 #interrupt-cells = <2>
451 interrupt-parent = <&U
452 interrupts = <17 0x84>
453 };
454
455 MAL0: mcmal0 {
456 #interrupt-cells = <1>
457 #address-cells = <0>;
458 #size-cells = <0>;
459 compatible = "ibm,mcma
460 dcr-reg = <0x80 0x80>;
461 num-tx-chans = <1>;
462 num-rx-chans = <1>;
463 interrupt-parent = <&M
464 interrupts = <0 1 2 3
465 /* index interrupt-par
466 interrupt-map = </*TXE
467 /*RXE
468 /*SER
469 /*TXD
470 /*RXD
471 };
472
473 MAL1: mcmal1 {
474 #interrupt-cells = <1>
475 #address-cells = <0>;
476 #size-cells = <0>;
477 compatible = "ibm,mcma
478 dcr-reg = <0x100 0x80>
479 num-tx-chans = <1>;
480 num-rx-chans = <1>;
481 interrupt-parent = <&M
482 interrupts = <0 1 2 3
483 /* index interrupt-par
484 interrupt-map = </*TXE
485 /*RXE
486 /*SER
487 /*TXD
488 /*RXD
489 };
490
491 mmc0: mmc@20c0000 {
492 compatible = "st,
493 reg = <0x0
494 reg-names = "mmc
495 interrupts = <21
496 interrupt-parent = <&U
497 interrupt-names = "mmc
498 pinctrl-names = "def
499 pinctrl-0 = <>;
500 clock-names = "mmc
501 clocks = <&mm
502 bus-width = <4>;
503 non-removable;
504 sd-uhs-sdr50;
505 sd-uhs-sdr104;
506 sd-uhs-ddr50;
507 };
508
509 opb {
510 compatible = "ibm,opb"
511 #address-cells = <1>;
512 #size-cells = <1>;
513 ranges; // pass-thru t
514 clock-frequency = <833
515
516 EMAC0: ethernet@b00000
517 linux,network-
518 device_type =
519 compatible = "
520 has-inverted-s
521 interrupt-pare
522 interrupts = <
523 reg = <0xb0000
524 local-mac-addr
525
526 mal-device = <
527 mal-tx-channel
528 mal-rx-channel
529 cell-index = <
530 max-frame-size
531 rx-fifo-size =
532 tx-fifo-size =
533 rx-fifo-size-g
534 tx-fifo-size-g
535 phy-address =
536 phy-mode = "rg
537 phy-map = <000
538 rgmii-device =
539 rgmii-channel
540 };
541
542 EMAC1: ethernet@b00001
543 linux,network-
544 device_type =
545 compatible = "
546 has-inverted-s
547 interrupt-pare
548 interrupts = <
549 reg = <0xb0000
550 local-mac-addr
551
552 mal-device = <
553 mal-tx-channel
554 mal-rx-channel
555 cell-index = <
556 max-frame-size
557 rx-fifo-size =
558 tx-fifo-size =
559 rx-fifo-size-g
560 tx-fifo-size-g
561 phy-address =
562 phy-mode = "rg
563 phy-map = <000
564 rgmii-device =
565 rgmii-channel
566 };
567
568 RGMII: rgmii@b0000600
569 compatible = "
570 has-mdio;
571 reg = <0xb0000
572 };
573
574 UART0: serial@b0020000
575 device_type =
576 compatible = "
577 reg = <0xb0020
578 virtual-reg =
579 clock-frequenc
580 current-speed
581 interrupt-pare
582 interrupts = <
583 };
584 };
585
586 OHCI1: ohci@2040000 {
587 compatible = "ohci-le"
588 reg = <0x02040000 0xa0
589 interrupt-parent = <&U
590 interrupts = <28 0x8 2
591 };
592
593 OHCI2: ohci@2080000 {
594 compatible = "ohci-le"
595 reg = <0x02080000 0xa0
596 interrupt-parent = <&U
597 interrupts = <30 0x8 3
598 };
599
600 EHCI: ehci@2000000 {
601 compatible = "usb-ehci
602 reg = <0x02000000 0xa4
603 interrupt-parent = <&U
604 interrupts = <23 0x4>;
605 };
606
607 };
608
609 chosen {
610 stdout-path = "/plb/opb/serial
611 bootargs = "console=ttyS0,1152
612 };
613 };
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