1 /*
2 * Device Tree Source for AMCC Katmai eval boa
3 *
4 * Copyright (c) 2006, 2007 IBM Corp.
5 * Benjamin Herrenschmidt <benh@kernel.crashing
6 *
7 * Copyright (c) 2006, 2007 IBM Corp.
8 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
9 *
10 * This file is licensed under the terms of th
11 * License version 2. This program is license
12 * any warranty of any kind, whether express o
13 */
14
15 /dts-v1/;
16
17 / {
18 #address-cells = <2>;
19 #size-cells = <2>;
20 model = "amcc,katmai";
21 compatible = "amcc,katmai";
22 dcr-parent = <&{/cpus/cpu@0}>;
23
24 aliases {
25 ethernet0 = &EMAC0;
26 serial0 = &UART0;
27 serial1 = &UART1;
28 serial2 = &UART2;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 cpu@0 {
36 device_type = "cpu";
37 model = "PowerPC,440SP
38 reg = <0x00000000>;
39 clock-frequency = <0>;
40 timebase-frequency = <
41 i-cache-line-size = <3
42 d-cache-line-size = <3
43 i-cache-size = <32768>
44 d-cache-size = <32768>
45 dcr-controller;
46 dcr-access-method = "n
47 reset-type = <2>;
48 };
49 };
50
51 memory {
52 device_type = "memory";
53 reg = <0x0 0x00000000 0x0 0x00
54 };
55
56 UIC0: interrupt-controller0 {
57 compatible = "ibm,uic-440spe",
58 interrupt-controller;
59 cell-index = <0>;
60 dcr-reg = <0x0c0 0x009>;
61 #address-cells = <0>;
62 #size-cells = <0>;
63 #interrupt-cells = <2>;
64 };
65
66 UIC1: interrupt-controller1 {
67 compatible = "ibm,uic-440spe",
68 interrupt-controller;
69 cell-index = <1>;
70 dcr-reg = <0x0d0 0x009>;
71 #address-cells = <0>;
72 #size-cells = <0>;
73 #interrupt-cells = <2>;
74 interrupts = <0x1e 0x4 0x1f 0x
75 interrupt-parent = <&UIC0>;
76 };
77
78 UIC2: interrupt-controller2 {
79 compatible = "ibm,uic-440spe",
80 interrupt-controller;
81 cell-index = <2>;
82 dcr-reg = <0x0e0 0x009>;
83 #address-cells = <0>;
84 #size-cells = <0>;
85 #interrupt-cells = <2>;
86 interrupts = <0xa 0x4 0xb 0x4>
87 interrupt-parent = <&UIC0>;
88 };
89
90 UIC3: interrupt-controller3 {
91 compatible = "ibm,uic-440spe",
92 interrupt-controller;
93 cell-index = <3>;
94 dcr-reg = <0x0f0 0x009>;
95 #address-cells = <0>;
96 #size-cells = <0>;
97 #interrupt-cells = <2>;
98 interrupts = <0x10 0x4 0x11 0x
99 interrupt-parent = <&UIC0>;
100 };
101
102 SDR0: sdr {
103 compatible = "ibm,sdr-440spe";
104 dcr-reg = <0x00e 0x002>;
105 };
106
107 CPR0: cpr {
108 compatible = "ibm,cpr-440spe";
109 dcr-reg = <0x00c 0x002>;
110 };
111
112 MQ0: mq {
113 compatible = "ibm,mq-440spe";
114 dcr-reg = <0x040 0x020>;
115 };
116
117 plb {
118 compatible = "ibm,plb-440spe",
119 #address-cells = <2>;
120 #size-cells = <1>;
121 /* addr-child addr-
122 ranges = <0x4 0x00100000 0x4 0
123 0x4 0x00200000 0x4 0
124 0x4 0xe0000000 0x4 0
125 0xc 0x00000000 0xc 0
126 0xd 0x00000000 0xd 0
127 0xd 0x80000000 0xd 0
128 0xe 0x00000000 0xe 0
129 0xe 0x80000000 0xe 0
130 0xf 0x00000000 0xf 0
131 0xf 0x80000000 0xf 0
132 clock-frequency = <0>; /* Fill
133
134 SDRAM0: sdram {
135 compatible = "ibm,sdra
136 dcr-reg = <0x010 0x002
137 };
138
139 MAL0: mcmal {
140 compatible = "ibm,mcma
141 dcr-reg = <0x180 0x062
142 num-tx-chans = <2>;
143 num-rx-chans = <1>;
144 interrupt-parent = <&M
145 interrupts = <0x0 0x1
146 #interrupt-cells = <1>
147 #address-cells = <0>;
148 #size-cells = <0>;
149 interrupt-map = </*TXE
150 /*RXE
151 /*SER
152 /*TXD
153 /*RXD
154 };
155
156 POB0: opb {
157 compatible = "ibm,opb-
158 #address-cells = <1>;
159 #size-cells = <1>;
160 ranges = <0xe0000000 0
161 clock-frequency = <0>;
162
163 EBC0: ebc {
164 compatible = "
165 dcr-reg = <0x0
166 #address-cells
167 #size-cells =
168 clock-frequenc
169 /* ranges prop
170 interrupts = <
171 interrupt-pare
172
173 nor_flash@0,0
174 compat
175 bank-w
176 reg =
177 #addre
178 #size-
179 partit
180
181
182 };
183 partit
184
185
186 };
187 partit
188
189
190 };
191 partit
192
193
194 };
195 partit
196
197
198 };
199 partit
200
201
202 };
203 };
204 };
205
206 UART0: serial@f0000200
207 device_type =
208 compatible = "
209 reg = <0xf0000
210 virtual-reg =
211 clock-frequenc
212 current-speed
213 interrupt-pare
214 interrupts = <
215 };
216
217 UART1: serial@f0000300
218 device_type =
219 compatible = "
220 reg = <0xf0000
221 virtual-reg =
222 clock-frequenc
223 current-speed
224 interrupt-pare
225 interrupts = <
226 };
227
228
229 UART2: serial@f0000600
230 device_type =
231 compatible = "
232 reg = <0xf0000
233 virtual-reg =
234 clock-frequenc
235 current-speed
236 interrupt-pare
237 interrupts = <
238 };
239
240 IIC0: i2c@f0000400 {
241 compatible = "
242 reg = <0xf0000
243 interrupt-pare
244 interrupts = <
245 };
246
247 IIC1: i2c@f0000500 {
248 compatible = "
249 reg = <0xf0000
250 interrupt-pare
251 interrupts = <
252 };
253
254 EMAC0: ethernet@f00008
255 linux,network-
256 device_type =
257 compatible = "
258 interrupt-pare
259 interrupts = <
260 reg = <0xf0000
261 local-mac-addr
262 mal-device = <
263 mal-tx-channel
264 mal-rx-channel
265 cell-index = <
266 max-frame-size
267 rx-fifo-size =
268 tx-fifo-size =
269 phy-mode = "gm
270 phy-map = <0x0
271 has-inverted-s
272 has-new-stacr-
273 };
274 };
275
276 PCIX0: pci@c0ec00000 {
277 device_type = "pci";
278 #interrupt-cells = <1>
279 #size-cells = <2>;
280 #address-cells = <3>;
281 compatible = "ibm,plb-
282 primary;
283 large-inbound-windows;
284 enable-msi-hole;
285 reg = <0x0000000c 0x0e
286 0x00000000 0x00
287 0x0000000c 0x0e
288 0x0000000c 0x0e
289 0x0000000c 0x0e
290
291 /* Outbound ranges, on
292 * later cannot be cha
293 */
294 ranges = <0x02000000 0
295 0x01000000 0
296
297 /* Inbound 4GB range s
298 dma-ranges = <0x420000
299
300 /* This drives busses
301 bus-range = <0x0 0xf>;
302
303 /*
304 * On Katmai, the foll
305 * have to be enabled
306 * enabled per default
307 *
308 * INTB: J3: 1-2
309 * INTC: J2: 1-2
310 * INTD: J1: 1-2
311 */
312 interrupt-map-mask = <
313 interrupt-map = <
314 /* IDSEL 1 */
315 0x800 0x0 0x0
316 0x800 0x0 0x0
317 0x800 0x0 0x0
318 0x800 0x0 0x0
319 >;
320 };
321
322 PCIE0: pcie@d00000000 {
323 device_type = "pci";
324 #interrupt-cells = <1>
325 #size-cells = <2>;
326 #address-cells = <3>;
327 compatible = "ibm,plb-
328 primary;
329 port = <0x0>; /* port
330 reg = <0x0000000d 0x00
331 0x0000000c 0x10
332 dcr-reg = <0x100 0x020
333 sdr-base = <0x300>;
334
335 /* Outbound ranges, on
336 * later cannot be cha
337 */
338 ranges = <0x02000000 0
339 0x01000000 0
340
341 /* Inbound 4GB range s
342 dma-ranges = <0x420000
343
344 /* This drives busses
345 bus-range = <0x10 0x1f
346
347 /* Legacy interrupts (
348 * to invert PCIe lega
349 * We are de-swizzling
350 * port of the root co
351 * to avoid putting a
352 * below are basically
353 * The real slot is on
354 */
355 interrupt-map-mask = <
356 interrupt-map = <
357 0x0 0x0 0x0 0x
358 0x0 0x0 0x0 0x
359 0x0 0x0 0x0 0x
360 0x0 0x0 0x0 0x
361 };
362
363 PCIE1: pcie@d20000000 {
364 device_type = "pci";
365 #interrupt-cells = <1>
366 #size-cells = <2>;
367 #address-cells = <3>;
368 compatible = "ibm,plb-
369 primary;
370 port = <0x1>; /* port
371 reg = <0x0000000d 0x20
372 0x0000000c 0x10
373 dcr-reg = <0x120 0x020
374 sdr-base = <0x340>;
375
376 /* Outbound ranges, on
377 * later cannot be cha
378 */
379 ranges = <0x02000000 0
380 0x01000000 0
381
382 /* Inbound 4GB range s
383 dma-ranges = <0x420000
384
385 /* This drives busses
386 bus-range = <0x20 0x2f
387
388 /* Legacy interrupts (
389 * to invert PCIe lega
390 * We are de-swizzling
391 * port of the root co
392 * to avoid putting a
393 * below are basically
394 * The real slot is on
395 */
396 interrupt-map-mask = <
397 interrupt-map = <
398 0x0 0x0 0x0 0x
399 0x0 0x0 0x0 0x
400 0x0 0x0 0x0 0x
401 0x0 0x0 0x0 0x
402 };
403
404 PCIE2: pcie@d40000000 {
405 device_type = "pci";
406 #interrupt-cells = <1>
407 #size-cells = <2>;
408 #address-cells = <3>;
409 compatible = "ibm,plb-
410 primary;
411 port = <0x2>; /* port
412 reg = <0x0000000d 0x40
413 0x0000000c 0x10
414 dcr-reg = <0x140 0x020
415 sdr-base = <0x370>;
416
417 /* Outbound ranges, on
418 * later cannot be cha
419 */
420 ranges = <0x02000000 0
421 0x01000000 0
422
423 /* Inbound 4GB range s
424 dma-ranges = <0x420000
425
426 /* This drives busses
427 bus-range = <0x30 0x3f
428
429 /* Legacy interrupts (
430 * to invert PCIe lega
431 * We are de-swizzling
432 * port of the root co
433 * to avoid putting a
434 * below are basically
435 * The real slot is on
436 */
437 interrupt-map-mask = <
438 interrupt-map = <
439 0x0 0x0 0x0 0x
440 0x0 0x0 0x0 0x
441 0x0 0x0 0x0 0x
442 0x0 0x0 0x0 0x
443 };
444
445 I2O: i2o@400100000 {
446 compatible = "ibm,i2o-
447 reg = <0x00000004 0x00
448 dcr-reg = <0x060 0x020
449 };
450
451 DMA0: dma0@400100100 {
452 compatible = "ibm,dma-
453 cell-index = <0>;
454 reg = <0x00000004 0x00
455 dcr-reg = <0x060 0x020
456 interrupt-parent = <&D
457 interrupts = <0 1>;
458 #interrupt-cells = <1>
459 #address-cells = <0>;
460 #size-cells = <0>;
461 interrupt-map = <
462 0 &UIC0 0x14 4
463 1 &UIC1 0x16 4
464 };
465
466 DMA1: dma1@400100200 {
467 compatible = "ibm,dma-
468 cell-index = <1>;
469 reg = <0x00000004 0x00
470 dcr-reg = <0x060 0x020
471 interrupt-parent = <&D
472 interrupts = <0 1>;
473 #interrupt-cells = <1>
474 #address-cells = <0>;
475 #size-cells = <0>;
476 interrupt-map = <
477 0 &UIC0 0x16 4
478 1 &UIC1 0x16 4
479 };
480
481 xor-accel@400200000 {
482 compatible = "amcc,xor
483 reg = <0x00000004 0x00
484 interrupt-parent = <&U
485 interrupts = <0x1f 4>;
486 };
487 };
488
489 chosen {
490 stdout-path = "/plb/opb/serial
491 };
492 };
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