1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Device Tree for the MGCOGE plattform from k
4 *
5 * Copyright 2008 DENX Software Engineering Gm
6 * Heiko Schocher <hs@denx.de>
7 */
8
9 /dts-v1/;
10 / {
11 model = "MGCOGE";
12 compatible = "keymile,km82xx";
13 #address-cells = <1>;
14 #size-cells = <1>;
15
16 aliases {
17 ethernet0 = ð0;
18 serial0 = &smc2;
19 };
20
21 cpus {
22 #address-cells = <1>;
23 #size-cells = <0>;
24
25 PowerPC,8247@0 {
26 device_type = "cpu";
27 reg = <0>;
28 d-cache-line-size = <3
29 i-cache-line-size = <3
30 d-cache-size = <16384>
31 i-cache-size = <16384>
32 timebase-frequency = <
33 clock-frequency = <0>;
34 bus-frequency = <0>; /
35 };
36 };
37
38 localbus@f0010100 {
39 compatible = "fsl,mpc8247-loca
40 "fsl,pq2-localbus
41 "simple-bus";
42 #address-cells = <2>;
43 #size-cells = <1>;
44 reg = <0xf0010100 0x40>;
45
46 ranges = <0 0 0xfe000000 0x004
47 1 0 0x30000000 0x000
48 2 0 0x40000000 0x000
49 5 0 0x50000000 0x040
50 >;
51
52 flash@0,0 {
53 compatible = "cfi-flas
54 reg = <0 0x0 0x400000>
55 #address-cells = <1>;
56 #size-cells = <1>;
57 bank-width = <1>;
58 device-width = <1>;
59 partition@0 {
60 label = "u-boo
61 reg = <0x00000
62 };
63 partition@1 {
64 label = "env";
65 reg = <0xC0000
66 };
67 partition@2 {
68 label = "envre
69 reg = <0xE0000
70 };
71 partition@3 {
72 label = "free"
73 reg = <0x10000
74 };
75 };
76
77 flash@5,0 {
78 compatible = "cfi-flas
79 reg = <5 0x00000000 0x
80 5 0x02000000 0x
81 #address-cells = <1>;
82 #size-cells = <1>;
83 bank-width = <2>;
84 partition@app { /* 64
85 label = "ubi0"
86 reg = <0x00000
87 };
88 };
89 };
90
91 memory {
92 device_type = "memory";
93 reg = <0 0>; /* Filled in by U
94 };
95
96 soc@f0000000 {
97 #address-cells = <1>;
98 #size-cells = <1>;
99 compatible = "fsl,mpc8247-immr
100 ranges = <0x00000000 0xf000000
101
102 // Temporary until code stops
103 device_type = "soc";
104
105 cpm@119c0 {
106 #address-cells = <1>;
107 #size-cells = <1>;
108 #interrupt-cells = <2>
109 compatible = "fsl,mpc8
110 "simpl
111 reg = <0x119c0 0x30>;
112 ranges;
113
114 muram {
115 compatible = "
116 #address-cells
117 #size-cells =
118 ranges = <0 0
119
120 data@0 {
121 compat
122 reg =
123 };
124 };
125
126 brg@119f0 {
127 compatible = "
128 "
129 "
130 reg = <0x119f0
131 };
132
133 /* Monitor port/SMC2 *
134 smc2: serial@11a90 {
135 device_type =
136 compatible = "
137 "
138 reg = <0x11a90
139 interrupts = <
140 interrupt-pare
141 fsl,cpm-brg =
142 fsl,cpm-comman
143 current-speed
144 };
145
146 eth0: ethernet@11a60 {
147 device_type =
148 compatible = "
149 "
150 reg = <0x11a60
151 local-mac-addr
152 interrupts = <
153 interrupt-pare
154 linux,network-
155 fsl,cpm-comman
156 fixed-link = <
157 };
158
159 i2c@11860 {
160 compatible = "
161 "
162 reg = <0x11860
163 interrupts = <
164 interrupt-pare
165 fsl,cpm-comman
166 #address-cells
167 #size-cells =
168 };
169
170 mdio@10d40 {
171 compatible = "
172 reg = <0x10d00
173 #address-cells
174 #size-cells =
175 fsl,mdio-pin =
176 fsl,mdc-pin =
177
178 phy0: ethernet
179 reg =
180 };
181
182 phy1: ethernet
183 reg =
184 };
185 };
186
187 /* FCC1 management to
188 ethernet@11300 {
189 device_type =
190 compatible = "
191 reg = <0x11300
192 local-mac-addr
193 interrupts = <
194 interrupt-pare
195 phy-handle = <
196 linux,network-
197 fsl,cpm-comman
198 };
199
200 /* FCC2 to redundant c
201 ethernet@11320 {
202 device_type =
203 compatible = "
204 reg = <0x11320
205 local-mac-addr
206 interrupts = <
207 interrupt-pare
208 phy-handle = <
209 linux,network-
210 fsl,cpm-comman
211 };
212
213 usb@11b60 {
214 compatible = "
215 mode = "periph
216 reg = <0x11b60
217 interrupts = <
218 interrupt-pare
219 usb-clock = <5
220 };
221 spi@11aa0 {
222 cell-index = <
223 compatible = "
224 reg = <0x11a80
225 interrupts = <
226 interrupt-pare
227 cs-gpios = < &
228 };
229
230 };
231
232 cpm2_pio_d: gpio-controller@10
233 #gpio-cells = <2>;
234 compatible = "fsl,cpm2
235 reg = <0x10d60 0x14>;
236 gpio-controller;
237 };
238
239 cpm2_pio_c: gpio-controller@10
240 #gpio-cells = <2>;
241 compatible = "fsl,cpm2
242 reg = <0x10d40 0x14>;
243 gpio-controller;
244 };
245
246 PIC: interrupt-controller@10c0
247 #interrupt-cells = <2>
248 interrupt-controller;
249 reg = <0x10c00 0x80>;
250 compatible = "fsl,mpc8
251 };
252 };
253 };
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