1 /* SPDX-License-Identifier: GPL-2.0-or-later * 1
2 /*
3 * lppaca.h
4 * Copyright (C) 2001 Mike Corrigan IBM Corpo
5 */
6 #ifndef _ASM_POWERPC_LPPACA_H
7 #define _ASM_POWERPC_LPPACA_H
8
9 #ifdef __KERNEL__
10
11 /*
12 * These definitions relate to hypervisors tha
13 * a server type processor
14 */
15 #ifdef CONFIG_PPC_BOOK3S
16
17 /*
18 * This control block contains the data that i
19 * hypervisor and the OS.
20 */
21 #include <linux/cache.h>
22 #include <linux/threads.h>
23 #include <asm/types.h>
24 #include <asm/mmu.h>
25 #include <asm/firmware.h>
26 #include <asm/paca.h>
27
28 /*
29 * The lppaca is the "virtual processor area"
30 * H_REGISTER_VPA etc.
31 *
32 * According to PAPR, the structure is 640 byt
33 * aligned, and must not cross a 4kB boundary.
34 * least 640 bytes (but may be more).
35 *
36 * Pre-v4.14 KVM hypervisors reject the VPA if
37 * 1kB, so we dynamically allocate 1kB and adv
38 * this structure as the canonical 640 byte si
39 */
40 struct lppaca {
41 /* cacheline 1 contains read-only data
42
43 __be32 desc; /* Eye
44 __be16 size; /* Siz
45 u8 reserved1[3];
46 u8 __old_status; /* Old
47 u8 reserved3[14];
48 volatile __be32 dyn_hw_node_id; /* Dyn
49 volatile __be32 dyn_hw_proc_id; /* Dyn
50 u8 reserved4[56];
51 volatile u8 vphn_assoc_counts[8]; /* V
52 /* a
53 u8 reserved5[32];
54
55 /* cacheline 2 contains local read-wri
56
57 u8 reserved6[48];
58 u8 cede_latency_hint;
59 u8 ebb_regs_in_use;
60 u8 reserved7[6];
61 u8 dtl_enable_mask; /* Dis
62 u8 donate_dedicated_cpu; /* Don
63 u8 fpregs_in_use;
64 u8 pmcregs_in_use;
65 u8 l2_counters_enable; /* Enable
66 u8 reserved8[27];
67 __be64 wait_state_cycles; /* Wai
68 u8 reserved9[28];
69 __be16 slb_count; /* # o
70 u8 idle; /* Ind
71 u8 vmxregs_in_use;
72
73 /* cacheline 3 is shared with other pr
74
75 /*
76 * This is the yield_count. An "odd"
77 * the processor is yielded (either be
78 * hypervisor preempt). An even value
79 * currently executing.
80 * NOTE: Even dedicated processor part
81 * field cannot be used to determine i
82 */
83 volatile __be32 yield_count;
84 volatile __be32 dispersion_count; /* d
85 volatile __be64 cmo_faults; /* CMO
86 volatile __be64 cmo_fault_time; /* CMO
87 u8 reserved10[64]; /* [S]
88 volatile __be64 enqueue_dispatch_tb; /
89 volatile __be64 ready_enqueue_tb; /* T
90 volatile __be64 wait_ready_tb; /* Tot
91 u8 reserved11[16];
92
93 /* cacheline 4-5 */
94
95 __be32 page_ins; /* CMO
96 u8 reserved12[28];
97 volatile __be64 l1_to_l2_cs_tb;
98 volatile __be64 l2_to_l1_cs_tb;
99 volatile __be64 l2_runtime_tb;
100 u8 reserved13[96];
101 volatile __be64 dtl_idx; /* Dis
102 u8 reserved14[96];
103 } ____cacheline_aligned;
104
105 #define lppaca_of(cpu) (*paca_ptrs[cpu]->lppa
106
107 /*
108 * We are using a non architected field to det
109 * shared or dedicated. This currently works o
110 * we will have to transition to something bet
111 */
112 #define LPPACA_OLD_SHARED_PROC 2
113
114 #ifdef CONFIG_PPC_PSERIES
115 /*
116 * All CPUs should have the same shared proc v
117 * to avoid false positives from DEBUG_PREEMPT
118 */
119 static inline bool lppaca_shared_proc(void)
120 {
121 struct lppaca *l = local_paca->lppaca_
122
123 if (!firmware_has_feature(FW_FEATURE_S
124 return false;
125 return !!(l->__old_status & LPPACA_OLD
126 }
127
128 #define get_lppaca() (get_paca()->lppaca_pt
129 #endif
130
131 /*
132 * SLB shadow buffer structure as defined in t
133 * contains adjacent ESID and VSID pairs for e
134 * ESID is stored in the lower 64bits, then th
135 */
136 struct slb_shadow {
137 __be32 persistent; /* Num
138 __be32 buffer_length; /* Tot
139 __be64 reserved;
140 struct {
141 __be64 esid;
142 __be64 vsid;
143 } save_area[SLB_NUM_BOLTED];
144 } ____cacheline_aligned;
145
146 #endif /* CONFIG_PPC_BOOK3S */
147 #endif /* __KERNEL__ */
148 #endif /* _ASM_POWERPC_LPPACA_H */
149
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