1 /* SPDX-License-Identifier: GPL-2.0+ */ 1 2 // Copyright 2017 IBM Corp. 3 #ifndef _ASM_PNV_OCXL_H 4 #define _ASM_PNV_OCXL_H 5 6 #include <linux/bitfield.h> 7 #include <linux/pci.h> 8 9 #define PNV_OCXL_TL_MAX_TEMPLATE 63 10 #define PNV_OCXL_TL_BITS_PER_RATE 4 11 #define PNV_OCXL_TL_RATE_BUF_SIZE ((PNV_ 12 13 #define PNV_OCXL_ATSD_TIMEOUT 1 14 15 /* TLB Management Instructions */ 16 #define PNV_OCXL_ATSD_LNCH 0x00 17 /* Radix Invalidate */ 18 #define PNV_OCXL_ATSD_LNCH_R PPC_BI 19 /* Radix Invalidation Control 20 * 0b00 Just invalidate TLB. 21 * 0b01 Invalidate just Page Walk Cache. 22 * 0b10 Invalidate TLB, Page Walk Cache, and a 23 * caching of Partition and Process Table Entr 24 */ 25 #define PNV_OCXL_ATSD_LNCH_RIC PPC_BI 26 /* Number and Page Size of translations to be 27 #define PNV_OCXL_ATSD_LNCH_LP PPC_BI 28 /* Invalidation Criteria 29 * 0b00 Invalidate just the target VA. 30 * 0b01 Invalidate matching PID. 31 */ 32 #define PNV_OCXL_ATSD_LNCH_IS PPC_BI 33 /* 0b1: Process Scope, 0b0: Partition Scope */ 34 #define PNV_OCXL_ATSD_LNCH_PRS PPC_BI 35 /* Invalidation Flag */ 36 #define PNV_OCXL_ATSD_LNCH_B PPC_BI 37 /* Actual Page Size to be invalidated 38 * 000 4KB 39 * 101 64KB 40 * 001 2MB 41 * 010 1GB 42 */ 43 #define PNV_OCXL_ATSD_LNCH_AP PPC_BI 44 /* Defines the large page select 45 * L=0b0 for 4KB pages 46 * L=0b1 for large pages) 47 */ 48 #define PNV_OCXL_ATSD_LNCH_L PPC_BI 49 /* Process ID */ 50 #define PNV_OCXL_ATSD_LNCH_PID PPC_BI 51 /* NoFlush – Assumed to be 0b0 */ 52 #define PNV_OCXL_ATSD_LNCH_F PPC_BI 53 #define PNV_OCXL_ATSD_LNCH_OCAPI_SLBI PPC_BI 54 #define PNV_OCXL_ATSD_LNCH_OCAPI_SINGLETON 55 #define PNV_OCXL_ATSD_AVA 0x08 56 #define PNV_OCXL_ATSD_AVA_AVA PPC_BI 57 #define PNV_OCXL_ATSD_STAT 0x10 58 59 int pnv_ocxl_get_actag(struct pci_dev *dev, u1 60 int pnv_ocxl_get_pasid_count(struct pci_dev *d 61 62 int pnv_ocxl_get_tl_cap(struct pci_dev *dev, l 63 char *rate_buf, int ra 64 int pnv_ocxl_set_tl_conf(struct pci_dev *dev, 65 uint64_t rate_buf_phy 66 67 int pnv_ocxl_get_xsl_irq(struct pci_dev *dev, 68 void pnv_ocxl_unmap_xsl_regs(void __iomem *dsi 69 void __iomem *tfc 70 int pnv_ocxl_map_xsl_regs(struct pci_dev *dev, 71 void __iomem **dar, 72 void __iomem **pe_ha 73 74 int pnv_ocxl_spa_setup(struct pci_dev *dev, vo 75 void pnv_ocxl_spa_release(void *platform_data) 76 int pnv_ocxl_spa_remove_pe_from_cache(void *pl 77 78 int pnv_ocxl_map_lpar(struct pci_dev *dev, uin 79 uint64_t lpcr, void __io 80 void pnv_ocxl_unmap_lpar(void __iomem *arva); 81 void pnv_ocxl_tlb_invalidate(void __iomem *arv 82 unsigned long pid 83 unsigned long add 84 unsigned long pag 85 #endif /* _ASM_PNV_OCXL_H */ 86
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