1 /* SPDX-License-Identifier: GPL-2.0-or-later * 1
2 #ifndef _POWERPC_PROM_H
3 #define _POWERPC_PROM_H
4 #ifdef __KERNEL__
5
6 /*
7 * Definitions for talking to the Open Firmwar
8 * Power Macintosh computers.
9 *
10 * Copyright (C) 1996-2005 Paul Mackerras.
11 *
12 * Updates for PPC64 by Peter Bergner & David
13 */
14 #include <linux/types.h>
15 #include <asm/firmware.h>
16
17 struct device_node;
18 struct property;
19
20 #define OF_DT_BEGIN_NODE 0x1
21 #define OF_DT_END_NODE 0x2
22 #define OF_DT_PROP 0x3
23
24 #define OF_DT_NOP 0x4
25 #define OF_DT_END 0x9
26
27 #define OF_DT_VERSION 0x10
28
29 /*
30 * This is what gets passed to the kernel by p
31 *
32 * The dt struct contains the device tree stru
33 * property contents. The dt strings contain a
34 * the strings for the property names, and is
35 * self contained in a page, so that it can be
36 * each property name appears only once in thi
37 *
38 * the mem_rsvmap contains a map of reserved r
39 * passing it here instead of in the device-tr
40 * the job of everybody. It's just a list of u
41 * ends when size is 0
42 */
43 struct boot_param_header {
44 __be32 magic; /* mag
45 __be32 totalsize; /* tot
46 __be32 off_dt_struct; /* off
47 __be32 off_dt_strings; /* off
48 __be32 off_mem_rsvmap; /* off
49 __be32 version; /* for
50 __be32 last_comp_version; /* las
51 /* version 2 fields below */
52 __be32 boot_cpuid_phys; /* Phy
53 /* version 3 fields below */
54 __be32 dt_strings_size; /* siz
55 /* version 17 fields below */
56 __be32 dt_struct_size; /* siz
57 };
58
59 /*
60 * OF address retreival & translation
61 */
62
63 /* Parse the ibm,dma-window property of an OF
64 * size parameters.
65 */
66 void of_parse_dma_window(struct device_node *d
67 unsigned long *busno,
68 unsigned long *size);
69
70 extern void of_instantiate_rtc(void);
71
72 extern int of_get_ibm_chip_id(struct device_no
73
74 struct of_drc_info {
75 char *drc_type;
76 char *drc_name_prefix;
77 u32 drc_index_start;
78 u32 drc_name_suffix_start;
79 u32 num_sequential_elems;
80 u32 sequential_inc;
81 u32 drc_power_domain;
82 u32 last_drc_index;
83 };
84
85 extern int of_read_drc_info_cell(struct proper
86 const __be32 **curval,
87
88 extern unsigned int boot_cpu_node_count;
89
90 /*
91 * There are two methods for telling firmware
92 * Newer machines have an "ibm,client-architec
93 * root node. For older machines, we have to
94 * method in the /packages/elf-loader node, pa
95 * ELF header containing a couple of PT_NOTE s
96 * structures that contain various information
97 */
98
99 /* New method - extensible architecture descri
100
101 /* Option vector bits - generic bits in byte 1
102 #define OV_IGNORE 0x80 /* ign
103 #define OV_CESSATION_POLICY 0x40 /* hal
104
105 /* Option vector 1: processor architectures su
106 #define OV1_PPC_2_00 0x80 /* set
107 #define OV1_PPC_2_01 0x40 /* set
108 #define OV1_PPC_2_02 0x20 /* set
109 #define OV1_PPC_2_03 0x10 /* set
110 #define OV1_PPC_2_04 0x08 /* set
111 #define OV1_PPC_2_05 0x04 /* set
112 #define OV1_PPC_2_06 0x02 /* set
113 #define OV1_PPC_2_07 0x01 /* set
114
115 #define OV1_PPC_3_00 0x80 /* set
116 #define OV1_PPC_3_1 0x40
117
118 /* Option vector 2: Open Firmware options supp
119 #define OV2_REAL_MODE 0x20 /* set
120
121 /* Option vector 3: processor options supporte
122 #define OV3_FP 0x80 /* flo
123 #define OV3_VMX 0x40 /* VMX
124 #define OV3_DFP 0x20 /* dec
125
126 /* Option vector 4: IBM PAPR implementation */
127 #define OV4_MIN_ENT_CAP 0x01 /* min
128
129 /* Option vector 5: PAPR/OF options supported
130 * These bits are also used in firmware_has_fe
131 * the capabilities reported for vector 5 in t
132 * encode the vector index in the define and u
133 * and OV5_INDX() macros to extract the desire
134 */
135 #define OV5_FEAT(x) ((x) & 0xff)
136 #define OV5_INDX(x) ((x) >> 8)
137 #define OV5_LPAR 0x0280 /* log
138 #define OV5_SPLPAR 0x0240 /* sha
139 /* ibm,dynamic-reconfiguration-memory property
140 #define OV5_DRCONF_MEMORY 0x0220
141 #define OV5_LARGE_PAGES 0x0210 /* lar
142 #define OV5_DONATE_DEDICATE_CPU 0x0202 /* don
143 #define OV5_MSI 0x0201 /* PCI
144 #define OV5_CMO 0x0480 /* Coo
145 #define OV5_XCMO 0x0440 /* Pag
146 #define OV5_FORM1_AFFINITY 0x0580 /* FOR
147 #define OV5_PRRN 0x0540 /* Pla
148 #define OV5_FORM2_AFFINITY 0x0520 /* For
149 #define OV5_HP_EVT 0x0604 /* Hot
150 #define OV5_RESIZE_HPT 0x0601 /* Has
151 #define OV5_PFO_HW_RNG 0x1180 /* PFO
152 #define OV5_PFO_HW_842 0x1140 /* PFO
153 #define OV5_PFO_HW_ENCR 0x1120 /* PFO
154 #define OV5_SUB_PROCESSORS 0x1501 /* 1,2
155 #define OV5_DRMEM_V2 0x1680 /* ibm
156 #define OV5_XIVE_SUPPORT 0x17C0 /* XIV
157 #define OV5_XIVE_LEGACY 0x1700 /* XIV
158 #define OV5_XIVE_EXPLOIT 0x1740 /* XIV
159 #define OV5_XIVE_EITHER 0x1780 /* XIV
160 /* MMU Base Architecture */
161 #define OV5_MMU_SUPPORT 0x18C0 /* MMU
162 #define OV5_MMU_HASH 0x1800 /* Has
163 #define OV5_MMU_RADIX 0x1840 /* Rad
164 #define OV5_MMU_EITHER 0x1880 /* Has
165 #define OV5_MMU_DYNAMIC 0x18C0 /* Has
166 #define OV5_NMMU 0x1820 /* Nes
167 /* Hash Table Extensions */
168 #define OV5_HASH_SEG_TBL 0x1980 /* In
169 #define OV5_HASH_GTSE 0x1940 /* Gue
170 /* Radix Table Extensions */
171 #define OV5_RADIX_GTSE 0x1A40 /* Gue
172 #define OV5_DRC_INFO 0x1640 /* Red
173
174 /* Option Vector 6: IBM PAPR hints */
175 #define OV6_LINUX 0x02 /* Lin
176
177 #endif /* __KERNEL__ */
178 #endif /* _POWERPC_PROM_H */
179
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