1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* 2 /*
3 * User-space Probes (UProbes) for powerpc !! 3 * User-space Probes (UProbes) for sparc
4 * 4 *
5 * Copyright IBM Corporation, 2007-2012 !! 5 * Copyright (C) 2013 Oracle Inc.
6 * 6 *
7 * Adapted from the x86 port by Ananth N Mavin !! 7 * Authors:
>> 8 * Jose E. Marchesi <jose.marchesi@oracle.com>
>> 9 * Eric Saint Etienne <eric.saint.etienne@oracle.com>
8 */ 10 */
>> 11
9 #include <linux/kernel.h> 12 #include <linux/kernel.h>
10 #include <linux/sched.h> !! 13 #include <linux/highmem.h>
11 #include <linux/ptrace.h> <<
12 #include <linux/uprobes.h> 14 #include <linux/uprobes.h>
13 #include <linux/uaccess.h> 15 #include <linux/uaccess.h>
>> 16 #include <linux/sched.h> /* For struct task_struct */
14 #include <linux/kdebug.h> 17 #include <linux/kdebug.h>
15 18
16 #include <asm/sstep.h> !! 19 #include <asm/cacheflush.h>
17 #include <asm/inst.h> <<
18 <<
19 #define UPROBE_TRAP_NR UINT_MAX <<
20 20
21 /** !! 21 /* Compute the address of the breakpoint instruction and return it.
22 * is_trap_insn - check if the instruction is !! 22 *
23 * @insn: instruction to be checked. !! 23 * Note that uprobe_get_swbp_addr is defined as a weak symbol in
24 * Returns true if @insn is a trap variant. !! 24 * kernel/events/uprobe.c.
25 */ 25 */
26 bool is_trap_insn(uprobe_opcode_t *insn) !! 26 unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
>> 27 {
>> 28 return instruction_pointer(regs);
>> 29 }
>> 30
>> 31 static void copy_to_page(struct page *page, unsigned long vaddr,
>> 32 const void *src, int len)
27 { 33 {
28 return (is_trap(*insn)); !! 34 void *kaddr = kmap_atomic(page);
>> 35
>> 36 memcpy(kaddr + (vaddr & ~PAGE_MASK), src, len);
>> 37 kunmap_atomic(kaddr);
29 } 38 }
30 39
31 /** !! 40 /* Fill in the xol area with the probed instruction followed by the
32 * arch_uprobe_analyze_insn !! 41 * single-step trap. Some fixups in the copied instruction are
33 * @mm: the probed address space. !! 42 * performed at this point.
34 * @arch_uprobe: the probepoint information. !! 43 *
35 * @addr: vaddr to probe. !! 44 * Note that uprobe_xol_copy is defined as a weak symbol in
36 * Return 0 on success or a -ve number on erro !! 45 * kernel/events/uprobe.c.
37 */ 46 */
38 int arch_uprobe_analyze_insn(struct arch_uprob !! 47 void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
39 struct mm_struct *mm, unsigned !! 48 void *src, unsigned long len)
40 { 49 {
41 if (addr & 0x03) !! 50 const u32 stp_insn = UPROBE_STP_INSN;
42 return -EINVAL; !! 51 u32 insn = *(u32 *) src;
43 52
44 if (cpu_has_feature(CPU_FTR_ARCH_31) & !! 53 /* Branches annulling their delay slot must be fixed to not do
45 ppc_inst_prefixed(ppc_inst_read(au !! 54 * so. Clearing the annul bit on these instructions we can be
46 (addr & 0x3f) == 60) { !! 55 * sure the single-step breakpoint in the XOL slot will be
47 pr_info_ratelimited("Cannot re !! 56 * executed.
48 return -EINVAL; !! 57 */
49 } <<
50 58
51 if (!can_single_step(ppc_inst_val(ppc_ !! 59 u32 op = (insn >> 30) & 0x3;
52 pr_info_ratelimited("Cannot re !! 60 u32 op2 = (insn >> 22) & 0x7;
53 return -ENOTSUPP; !! 61
54 } !! 62 if (op == 0 &&
>> 63 (op2 == 1 || op2 == 2 || op2 == 3 || op2 == 5 || op2 == 6) &&
>> 64 (insn & ANNUL_BIT) == ANNUL_BIT)
>> 65 insn &= ~ANNUL_BIT;
55 66
>> 67 copy_to_page(page, vaddr, &insn, len);
>> 68 copy_to_page(page, vaddr+len, &stp_insn, 4);
>> 69 }
>> 70
>> 71
>> 72 /* Instruction analysis/validity.
>> 73 *
>> 74 * This function returns 0 on success or a -ve number on error.
>> 75 */
>> 76 int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe,
>> 77 struct mm_struct *mm, unsigned long addr)
>> 78 {
>> 79 /* Any unsupported instruction? Then return -EINVAL */
56 return 0; 80 return 0;
57 } 81 }
58 82
59 /* !! 83 /* If INSN is a relative control transfer instruction, return the
60 * arch_uprobe_pre_xol - prepare to execute ou !! 84 * corrected branch destination value.
61 * @auprobe: the probepoint information. !! 85 *
62 * @regs: reflects the saved user state of cur !! 86 * Note that regs->tpc and regs->tnpc still hold the values of the
>> 87 * program counters at the time of the single-step trap due to the
>> 88 * execution of the UPROBE_STP_INSN at utask->xol_vaddr + 4.
>> 89 *
63 */ 90 */
64 int arch_uprobe_pre_xol(struct arch_uprobe *au !! 91 static unsigned long relbranch_fixup(u32 insn, struct uprobe_task *utask,
>> 92 struct pt_regs *regs)
65 { 93 {
66 struct arch_uprobe_task *autask = &cur !! 94 /* Branch not taken, no mods necessary. */
>> 95 if (regs->tnpc == regs->tpc + 0x4UL)
>> 96 return utask->autask.saved_tnpc + 0x4UL;
67 97
68 autask->saved_trap_nr = current->threa !! 98 /* The three cases are call, branch w/prediction,
69 current->thread.trap_nr = UPROBE_TRAP_ !! 99 * and traditional branch.
70 regs_set_return_ip(regs, current->utas !! 100 */
>> 101 if ((insn & 0xc0000000) == 0x40000000 ||
>> 102 (insn & 0xc1c00000) == 0x00400000 ||
>> 103 (insn & 0xc1c00000) == 0x00800000) {
>> 104 unsigned long real_pc = (unsigned long) utask->vaddr;
>> 105 unsigned long ixol_addr = utask->xol_vaddr;
>> 106
>> 107 /* The instruction did all the work for us
>> 108 * already, just apply the offset to the correct
>> 109 * instruction location.
>> 110 */
>> 111 return (real_pc + (regs->tnpc - ixol_addr));
>> 112 }
71 113
72 user_enable_single_step(current); !! 114 /* It is jmpl or some other absolute PC modification instruction,
73 return 0; !! 115 * leave NPC as-is.
>> 116 */
>> 117 return regs->tnpc;
74 } 118 }
75 119
76 /** !! 120 /* If INSN is an instruction which writes its PC location
77 * uprobe_get_swbp_addr - compute address of s !! 121 * into a destination register, fix that up.
78 * @regs: Reflects the saved state of the task <<
79 * instruction. <<
80 * Return the address of the breakpoint instru <<
81 */ 122 */
82 unsigned long uprobe_get_swbp_addr(struct pt_r !! 123 static int retpc_fixup(struct pt_regs *regs, u32 insn,
>> 124 unsigned long real_pc)
83 { 125 {
84 return instruction_pointer(regs); !! 126 unsigned long *slot = NULL;
>> 127 int rc = 0;
>> 128
>> 129 /* Simplest case is 'call', which always uses %o7 */
>> 130 if ((insn & 0xc0000000) == 0x40000000)
>> 131 slot = ®s->u_regs[UREG_I7];
>> 132
>> 133 /* 'jmpl' encodes the register inside of the opcode */
>> 134 if ((insn & 0xc1f80000) == 0x81c00000) {
>> 135 unsigned long rd = ((insn >> 25) & 0x1f);
>> 136
>> 137 if (rd <= 15) {
>> 138 slot = ®s->u_regs[rd];
>> 139 } else {
>> 140 unsigned long fp = regs->u_regs[UREG_FP];
>> 141 /* Hard case, it goes onto the stack. */
>> 142 flushw_all();
>> 143
>> 144 rd -= 16;
>> 145 if (test_thread_64bit_stack(fp)) {
>> 146 unsigned long __user *uslot =
>> 147 (unsigned long __user *) (fp + STACK_BIAS) + rd;
>> 148 rc = __put_user(real_pc, uslot);
>> 149 } else {
>> 150 unsigned int __user *uslot = (unsigned int
>> 151 __user *) fp + rd;
>> 152 rc = __put_user((u32) real_pc, uslot);
>> 153 }
>> 154 }
>> 155 }
>> 156 if (slot != NULL)
>> 157 *slot = real_pc;
>> 158 return rc;
85 } 159 }
86 160
87 /* !! 161 /* Single-stepping can be avoided for certain instructions: NOPs and
88 * If xol insn itself traps and generates a si !! 162 * instructions that can be emulated. This function determines
89 * then detect the case where a singlestepped !! 163 * whether the instruction where the uprobe is installed falls in one
90 * own address. It is assumed that anything li !! 164 * of these cases and emulates it.
91 * sets thread.trap_nr != UINT_MAX. !! 165 *
92 * !! 166 * This function returns true if the single-stepping can be skipped,
93 * arch_uprobe_pre_xol/arch_uprobe_post_xol sa !! 167 * false otherwise.
94 * arch_uprobe_xol_was_trapped() simply checks <<
95 * UPROBE_TRAP_NR == UINT_MAX set by arch_upro <<
96 */ 168 */
97 bool arch_uprobe_xol_was_trapped(struct task_s !! 169 bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
98 { 170 {
99 if (t->thread.trap_nr != UPROBE_TRAP_N !! 171 /* We currently only emulate NOP instructions.
>> 172 */
>> 173
>> 174 if (auprobe->ixol == (1 << 24)) {
>> 175 regs->tnpc += 4;
>> 176 regs->tpc += 4;
100 return true; 177 return true;
>> 178 }
101 179
102 return false; 180 return false;
103 } 181 }
104 182
105 /* !! 183 /* Prepare to execute out of line. At this point
106 * Called after single-stepping. To avoid the !! 184 * current->utask->xol_vaddr points to an allocated XOL slot properly
107 * occur when we temporarily put back the orig !! 185 * initialized with the original instruction and the single-stepping
108 * single-step, we single-stepped a copy of th !! 186 * trap instruction.
109 * 187 *
110 * This function prepares to resume execution !! 188 * This function returns 0 on success, any other number on error.
111 */ 189 */
112 int arch_uprobe_post_xol(struct arch_uprobe *a !! 190 int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
113 { 191 {
114 struct uprobe_task *utask = current->u 192 struct uprobe_task *utask = current->utask;
>> 193 struct arch_uprobe_task *autask = ¤t->utask->autask;
115 194
116 WARN_ON_ONCE(current->thread.trap_nr ! !! 195 /* Save the current program counters so they can be restored
117 !! 196 * later.
118 current->thread.trap_nr = utask->autas !! 197 */
>> 198 autask->saved_tpc = regs->tpc;
>> 199 autask->saved_tnpc = regs->tnpc;
119 200
120 /* !! 201 /* Adjust PC and NPC so the first instruction in the XOL slot
121 * On powerpc, except for loads and st !! 202 * will be executed by the user task.
122 * including ones that alter code flow <<
123 * are emulated in the kernel. We get <<
124 * support doesn't exist and have to f <<
125 * to be executed. <<
126 */ 203 */
127 regs_set_return_ip(regs, (unsigned lon !! 204 instruction_pointer_set(regs, utask->xol_vaddr);
128 205
129 user_disable_single_step(current); <<
130 return 0; 206 return 0;
131 } 207 }
132 208
133 /* callback routine for handling exceptions. * !! 209 /* Prepare to resume execution after the single-step. Called after
134 int arch_uprobe_exception_notify(struct notifi !! 210 * single-stepping. To avoid the SMP problems that can occur when we
135 unsigned long !! 211 * temporarily put back the original opcode to single-step, we
>> 212 * single-stepped a copy of the instruction.
>> 213 *
>> 214 * This function returns 0 on success, any other number on error.
>> 215 */
>> 216 int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
>> 217 {
>> 218 struct uprobe_task *utask = current->utask;
>> 219 struct arch_uprobe_task *autask = &utask->autask;
>> 220 u32 insn = auprobe->ixol;
>> 221 int rc = 0;
>> 222
>> 223 if (utask->state == UTASK_SSTEP_ACK) {
>> 224 regs->tnpc = relbranch_fixup(insn, utask, regs);
>> 225 regs->tpc = autask->saved_tnpc;
>> 226 rc = retpc_fixup(regs, insn, (unsigned long) utask->vaddr);
>> 227 } else {
>> 228 regs->tnpc = utask->vaddr+4;
>> 229 regs->tpc = autask->saved_tnpc+4;
>> 230 }
>> 231 return rc;
>> 232 }
>> 233
>> 234 /* Handler for uprobe traps. This is called from the traps table and
>> 235 * triggers the proper die notification.
>> 236 */
>> 237 asmlinkage void uprobe_trap(struct pt_regs *regs,
>> 238 unsigned long trap_level)
136 { 239 {
137 struct die_args *args = data; !! 240 BUG_ON(trap_level != 0x173 && trap_level != 0x174);
138 struct pt_regs *regs = args->regs; <<
139 241
140 /* regs == NULL is a kernel bug */ !! 242 /* We are only interested in user-mode code. Uprobe traps
141 if (WARN_ON(!regs)) !! 243 * shall not be present in kernel code.
142 return NOTIFY_DONE; !! 244 */
>> 245 if (!user_mode(regs)) {
>> 246 local_irq_enable();
>> 247 bad_trap(regs, trap_level);
>> 248 return;
>> 249 }
>> 250
>> 251 /* trap_level == 0x173 --> ta 0x73
>> 252 * trap_level == 0x174 --> ta 0x74
>> 253 */
>> 254 if (notify_die((trap_level == 0x173) ? DIE_BPT : DIE_SSTEP,
>> 255 (trap_level == 0x173) ? "bpt" : "sstep",
>> 256 regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
>> 257 bad_trap(regs, trap_level);
>> 258 }
>> 259
>> 260 /* Callback routine for handling die notifications.
>> 261 */
>> 262 int arch_uprobe_exception_notify(struct notifier_block *self,
>> 263 unsigned long val, void *data)
>> 264 {
>> 265 int ret = NOTIFY_DONE;
>> 266 struct die_args *args = (struct die_args *)data;
143 267
144 /* We are only interested in userspace 268 /* We are only interested in userspace traps */
145 if (!user_mode(regs)) !! 269 if (args->regs && !user_mode(args->regs))
146 return NOTIFY_DONE; 270 return NOTIFY_DONE;
147 271
148 switch (val) { 272 switch (val) {
149 case DIE_BPT: 273 case DIE_BPT:
150 if (uprobe_pre_sstep_notifier( !! 274 if (uprobe_pre_sstep_notifier(args->regs))
151 return NOTIFY_STOP; !! 275 ret = NOTIFY_STOP;
152 break; 276 break;
>> 277
153 case DIE_SSTEP: 278 case DIE_SSTEP:
154 if (uprobe_post_sstep_notifier !! 279 if (uprobe_post_sstep_notifier(args->regs))
155 return NOTIFY_STOP; !! 280 ret = NOTIFY_STOP;
156 break; !! 281
157 default: 282 default:
158 break; 283 break;
159 } 284 }
160 return NOTIFY_DONE; !! 285
>> 286 return ret;
161 } 287 }
162 288
163 /* !! 289 /* This function gets called when a XOL instruction either gets
164 * This function gets called when XOL instruct !! 290 * trapped or the thread has a fatal signal, so reset the instruction
165 * the thread has a fatal signal, so reset the !! 291 * pointer to its probed address.
166 * probed address. <<
167 */ 292 */
168 void arch_uprobe_abort_xol(struct arch_uprobe 293 void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
169 { 294 {
170 struct uprobe_task *utask = current->u 295 struct uprobe_task *utask = current->utask;
171 296
172 current->thread.trap_nr = utask->autas <<
173 instruction_pointer_set(regs, utask->v 297 instruction_pointer_set(regs, utask->vaddr);
174 <<
175 user_disable_single_step(current); <<
176 } 298 }
177 299
178 /* !! 300 /* If xol insn itself traps and generates a signal(Say,
179 * See if the instruction can be emulated. !! 301 * SIGILL/SIGSEGV/etc), then detect the case where a singlestepped
180 * Returns true if instruction was emulated, f !! 302 * instruction jumps back to its own address.
181 */ 303 */
182 bool arch_uprobe_skip_sstep(struct arch_uprobe !! 304 bool arch_uprobe_xol_was_trapped(struct task_struct *t)
183 { 305 {
184 int ret; <<
185 <<
186 /* <<
187 * emulate_step() returns 1 if the ins <<
188 * For all other cases, we need to sin <<
189 */ <<
190 ret = emulate_step(regs, ppc_inst_read <<
191 if (ret > 0) <<
192 return true; <<
193 <<
194 return false; 306 return false;
195 } 307 }
196 308
197 unsigned long 309 unsigned long
198 arch_uretprobe_hijack_return_addr(unsigned lon !! 310 arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr,
>> 311 struct pt_regs *regs)
199 { 312 {
200 unsigned long orig_ret_vaddr; !! 313 unsigned long orig_ret_vaddr = regs->u_regs[UREG_I7];
201 314
202 orig_ret_vaddr = regs->link; !! 315 regs->u_regs[UREG_I7] = trampoline_vaddr-8;
203 316
204 /* Replace the return addr with trampo !! 317 return orig_ret_vaddr + 8;
205 regs->link = trampoline_vaddr; <<
206 <<
207 return orig_ret_vaddr; <<
208 } <<
209 <<
210 bool arch_uretprobe_is_alive(struct return_ins <<
211 struct pt_regs <<
212 { <<
213 if (ctx == RP_CHECK_CHAIN_CALL) <<
214 return regs->gpr[1] <= ret->st <<
215 else <<
216 return regs->gpr[1] < ret->sta <<
217 } 318 }
218 319
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