1 // SPDX-License-Identifier: GPL-2.0-only 1
2
3 /*
4 * Privileged (non-hypervisor) host registers
5 */
6 #include "asm/guest-state-buffer.h"
7
8 struct p9_host_os_sprs {
9 unsigned long iamr;
10 unsigned long amr;
11
12 unsigned int pmc1;
13 unsigned int pmc2;
14 unsigned int pmc3;
15 unsigned int pmc4;
16 unsigned int pmc5;
17 unsigned int pmc6;
18 unsigned long mmcr0;
19 unsigned long mmcr1;
20 unsigned long mmcr2;
21 unsigned long mmcr3;
22 unsigned long mmcra;
23 unsigned long siar;
24 unsigned long sier1;
25 unsigned long sier2;
26 unsigned long sier3;
27 unsigned long sdar;
28 };
29
30 static inline bool nesting_enabled(struct kvm
31 {
32 return kvm->arch.nested_enable && kvm_
33 }
34
35 bool load_vcpu_state(struct kvm_vcpu *vcpu,
36 struct p9_host_os_s
37 void store_vcpu_state(struct kvm_vcpu *vcpu);
38 void save_p9_host_os_sprs(struct p9_host_os_sp
39 void restore_p9_host_os_sprs(struct kvm_vcpu *
40 struct p9_
41 void switch_pmu_to_guest(struct kvm_vcpu *vcpu
42 struct p9_host_os_
43 void switch_pmu_to_host(struct kvm_vcpu *vcpu,
44 struct p9_host_os_
45
46 #ifdef CONFIG_KVM_BOOK3S_HV_P9_TIMING
47 void accumulate_time(struct kvm_vcpu *vcpu, st
48 #define start_timing(vcpu, next) accumulate_ti
49 #define end_timing(vcpu) accumulate_time(vcpu,
50 #else
51 #define accumulate_time(vcpu, next) do {} whil
52 #define start_timing(vcpu, next) do {} while (
53 #define end_timing(vcpu) do {} while (0)
54 #endif
55
56 static inline void __kvmppc_set_msr_hv(struct
57 {
58 vcpu->arch.shregs.msr = val;
59 kvmhv_nestedv2_mark_dirty(vcpu, KVMPPC
60 }
61
62 static inline u64 __kvmppc_get_msr_hv(struct k
63 {
64 WARN_ON(kvmhv_nestedv2_cached_reload(v
65 return vcpu->arch.shregs.msr;
66 }
67
68 #define KVMPPC_BOOK3S_HV_VCPU_ACCESSOR_SET(reg
69 static inline void kvmppc_set_##reg ##_hv(stru
70 {
71 vcpu->arch.reg = val;
72 kvmhv_nestedv2_mark_dirty(vcpu, iden);
73 }
74
75 #define KVMPPC_BOOK3S_HV_VCPU_ACCESSOR_GET(reg
76 static inline u##size kvmppc_get_##reg ##_hv(s
77 {
78 kvmhv_nestedv2_cached_reload(vcpu, ide
79 return vcpu->arch.reg;
80 }
81
82 #define KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(reg, si
83 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR_SET(reg
84 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR_GET(reg
85
86 #define KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR_S
87 static inline void kvmppc_set_##reg ##_hv(stru
88 {
89 vcpu->arch.reg[i] = val;
90 kvmhv_nestedv2_mark_dirty(vcpu, iden(i
91 }
92
93 #define KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR_G
94 static inline u##size kvmppc_get_##reg ##_hv(s
95 {
96 WARN_ON(kvmhv_nestedv2_cached_reload(v
97 return vcpu->arch.reg[i];
98 }
99
100 #define KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR(r
101 KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR_S
102 KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR_G
103
104 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(mmcra, 64, KVMP
105 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(hfscr, 64, KVMP
106 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(fscr, 64, KVMPP
107 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dscr, 64, KVMPP
108 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(purr, 64, KVMPP
109 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(spurr, 64, KVMP
110 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(amr, 64, KVMPPC
111 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(uamor, 64, KVMP
112 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(siar, 64, KVMPP
113 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(sdar, 64, KVMPP
114 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(iamr, 64, KVMPP
115 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawr0, 64, KVMP
116 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawr1, 64, KVMP
117 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawrx0, 64, KVM
118 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawrx1, 64, KVM
119 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dexcr, 64, KVMP
120 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(hashkeyr, 64, K
121 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(hashpkeyr, 64,
122 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(ciabr, 64, KVMP
123 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(wort, 64, KVMPP
124 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(ppr, 64, KVMPPC
125 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(ctrl, 64, KVMPP
126
127 KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR(mmcr, 64,
128 KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR(sier, 64,
129 KVMPPC_BOOK3S_HV_VCPU_ARRAY_ACCESSOR(pmc, 32,
130
131 KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(pspb, 32, KVMPP
132
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