1 # SPDX-License-Identifier: GPL-2.0-only !! 1 # SPDX-License-Identifier: GPL-2.0
2 # !! 2 config MIPS
3 # For a description of the syntax of this conf <<
4 # see Documentation/kbuild/kconfig-language.rs <<
5 # <<
6 <<
7 config 64BIT <<
8 bool 3 bool
9 !! 4 default y
10 config 32BIT !! 5 select ARCH_BINFMT_ELF_STATE
11 bool !! 6 select ARCH_CLOCKSOURCE_DATA
12 !! 7 select ARCH_DISCARD_MEMBLOCK
13 config RISCV !! 8 select ARCH_HAS_ELF_RANDOMIZE
14 def_bool y <<
15 select ACPI_GENERIC_GSI if ACPI <<
16 select ACPI_MCFG if (ACPI && PCI) <<
17 select ACPI_PPTT if ACPI <<
18 select ACPI_REDUCED_HARDWARE_ONLY if A <<
19 select ACPI_SPCR_TABLE if ACPI <<
20 select ARCH_DMA_DEFAULT_COHERENT <<
21 select ARCH_ENABLE_HUGEPAGE_MIGRATION <<
22 select ARCH_ENABLE_MEMORY_HOTPLUG if S <<
23 select ARCH_ENABLE_MEMORY_HOTREMOVE if <<
24 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if <<
25 select ARCH_ENABLE_THP_MIGRATION if TR <<
26 select ARCH_HAS_BINFMT_FLAT <<
27 select ARCH_HAS_CURRENT_STACK_POINTER <<
28 select ARCH_HAS_DEBUG_VIRTUAL if MMU <<
29 select ARCH_HAS_DEBUG_VM_PGTABLE <<
30 select ARCH_HAS_DEBUG_WX <<
31 select ARCH_HAS_FAST_MULTIPLIER <<
32 select ARCH_HAS_FORTIFY_SOURCE <<
33 select ARCH_HAS_GCOV_PROFILE_ALL <<
34 select ARCH_HAS_GIGANTIC_PAGE <<
35 select ARCH_HAS_KCOV <<
36 select ARCH_HAS_KERNEL_FPU_SUPPORT if <<
37 select ARCH_HAS_MEMBARRIER_CALLBACKS <<
38 select ARCH_HAS_MEMBARRIER_SYNC_CORE <<
39 select ARCH_HAS_MMIOWB <<
40 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
41 select ARCH_HAS_PMEM_API <<
42 select ARCH_HAS_PREPARE_SYNC_CORE_CMD <<
43 select ARCH_HAS_PTE_DEVMAP if 64BIT && <<
44 select ARCH_HAS_PTE_SPECIAL <<
45 select ARCH_HAS_SET_DIRECT_MAP if MMU <<
46 select ARCH_HAS_SET_MEMORY if MMU <<
47 select ARCH_HAS_STRICT_KERNEL_RWX if M <<
48 select ARCH_HAS_STRICT_MODULE_RWX if M <<
49 select ARCH_HAS_SYNC_CORE_BEFORE_USERM <<
50 select ARCH_HAS_SYSCALL_WRAPPER <<
51 select ARCH_HAS_TICK_BROADCAST if GENE 9 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
52 select ARCH_HAS_UBSAN !! 10 select ARCH_SUPPORTS_UPROBES
53 select ARCH_HAS_VDSO_DATA !! 11 select ARCH_USE_BUILTIN_BSWAP
54 select ARCH_KEEP_MEMBLOCK if ACPI <<
55 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL <<
56 select ARCH_OPTIONAL_KERNEL_RWX if ARC <<
57 select ARCH_OPTIONAL_KERNEL_RWX_DEFAUL <<
58 select ARCH_STACKWALK <<
59 select ARCH_SUPPORTS_ATOMIC_RMW <<
60 select ARCH_SUPPORTS_CFI_CLANG <<
61 select ARCH_SUPPORTS_DEBUG_PAGEALLOC i <<
62 select ARCH_SUPPORTS_HUGETLBFS if MMU <<
63 # LLD >= 14: https://github.com/llvm/l <<
64 select ARCH_SUPPORTS_LTO_CLANG if LLD_ <<
65 select ARCH_SUPPORTS_LTO_CLANG_THIN if <<
66 select ARCH_SUPPORTS_PAGE_TABLE_CHECK <<
67 select ARCH_SUPPORTS_PER_VMA_LOCK if M <<
68 select ARCH_SUPPORTS_RT <<
69 select ARCH_SUPPORTS_SHADOW_CALL_STACK <<
70 select ARCH_USE_CMPXCHG_LOCKREF if 64B 12 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
71 select ARCH_USE_MEMTEST <<
72 select ARCH_USE_QUEUED_RWLOCKS 13 select ARCH_USE_QUEUED_RWLOCKS
73 select ARCH_USE_SYM_ANNOTATIONS !! 14 select ARCH_USE_QUEUED_SPINLOCKS
74 select ARCH_USES_CFI_TRAPS if CFI_CLAN !! 15 select ARCH_WANT_IPC_PARSE_VERSION
75 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU !! 16 select BUILDTIME_EXTABLE_SORT
76 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ <<
77 select ARCH_WANT_FRAME_POINTERS <<
78 select ARCH_WANT_GENERAL_HUGETLB if !R <<
79 select ARCH_WANT_HUGE_PMD_SHARE if 64B <<
80 select ARCH_WANT_LD_ORPHAN_WARN if !XI <<
81 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
82 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM <<
83 select ARCH_WANTS_NO_INSTR <<
84 select ARCH_WANTS_THP_SWAP if HAVE_ARC <<
85 select BINFMT_FLAT_NO_DATA_START_OFFSE <<
86 select BUILDTIME_TABLE_SORT if MMU <<
87 select CLINT_TIMER if RISCV_M_MODE <<
88 select CLONE_BACKWARDS 17 select CLONE_BACKWARDS
89 select COMMON_CLK !! 18 select CPU_PM if CPU_IDLE
90 select CPU_PM if CPU_IDLE || HIBERNATI <<
91 select EDAC_SUPPORT <<
92 select FRAME_POINTER if PERF_EVENTS || <<
93 select FTRACE_MCOUNT_USE_PATCHABLE_FUN <<
94 select GENERIC_ARCH_TOPOLOGY <<
95 select GENERIC_ATOMIC64 if !64BIT 19 select GENERIC_ATOMIC64 if !64BIT
96 select GENERIC_CLOCKEVENTS_BROADCAST i !! 20 select GENERIC_CLOCKEVENTS
97 select GENERIC_CPU_DEVICES !! 21 select GENERIC_CMOS_UPDATE
98 select GENERIC_CPU_VULNERABILITIES !! 22 select GENERIC_CPU_AUTOPROBE
99 select GENERIC_EARLY_IOREMAP !! 23 select GENERIC_IRQ_PROBE
100 select GENERIC_ENTRY <<
101 select GENERIC_GETTIMEOFDAY if HAVE_GE <<
102 select GENERIC_IDLE_POLL_SETUP <<
103 select GENERIC_IOREMAP if MMU <<
104 select GENERIC_IRQ_IPI if SMP <<
105 select GENERIC_IRQ_IPI_MUX if SMP <<
106 select GENERIC_IRQ_MULTI_HANDLER <<
107 select GENERIC_IRQ_SHOW 24 select GENERIC_IRQ_SHOW
108 select GENERIC_IRQ_SHOW_LEVEL <<
109 select GENERIC_LIB_DEVMEM_IS_ALLOWED <<
110 select GENERIC_PCI_IOMAP 25 select GENERIC_PCI_IOMAP
111 select GENERIC_PTDUMP if MMU !! 26 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
112 select GENERIC_SCHED_CLOCK <<
113 select GENERIC_SMP_IDLE_THREAD 27 select GENERIC_SMP_IDLE_THREAD
114 select GENERIC_TIME_VSYSCALL if MMU && !! 28 select GENERIC_TIME_VSYSCALL
115 select GENERIC_VDSO_TIME_NS if HAVE_GE !! 29 select HANDLE_DOMAIN_IRQ
116 select HARDIRQS_SW_RESEND !! 30 select HAVE_ARCH_JUMP_LABEL
117 select HAS_IOPORT if MMU !! 31 select HAVE_ARCH_KGDB
118 select HAVE_ARCH_AUDITSYSCALL <<
119 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ <<
120 select HAVE_ARCH_HUGE_VMAP if MMU && 6 <<
121 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
122 select HAVE_ARCH_JUMP_LABEL_RELATIVE i <<
123 select HAVE_ARCH_KASAN if MMU && 64BIT <<
124 select HAVE_ARCH_KASAN_VMALLOC if MMU <<
125 select HAVE_ARCH_KFENCE if MMU && 64BI <<
126 select HAVE_ARCH_KGDB if !XIP_KERNEL <<
127 select HAVE_ARCH_KGDB_QXFER_PKT <<
128 select HAVE_ARCH_MMAP_RND_BITS if MMU 32 select HAVE_ARCH_MMAP_RND_BITS if MMU
129 select HAVE_ARCH_MMAP_RND_COMPAT_BITS !! 33 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
130 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
131 select HAVE_ARCH_SECCOMP_FILTER 34 select HAVE_ARCH_SECCOMP_FILTER
132 select HAVE_ARCH_STACKLEAK <<
133 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
134 select HAVE_ARCH_TRACEHOOK 35 select HAVE_ARCH_TRACEHOOK
135 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 36 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
136 select HAVE_ARCH_USERFAULTFD_MINOR if !! 37 select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS)
137 select HAVE_ARCH_VMAP_STACK if MMU && !! 38 select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS)
138 select HAVE_ASM_MODVERSIONS !! 39 select HAVE_CC_STACKPROTECTOR
139 select HAVE_CONTEXT_TRACKING_USER !! 40 select HAVE_CONTEXT_TRACKING
>> 41 select HAVE_COPY_THREAD_TLS
>> 42 select HAVE_C_RECORDMCOUNT
140 select HAVE_DEBUG_KMEMLEAK 43 select HAVE_DEBUG_KMEMLEAK
141 select HAVE_DMA_CONTIGUOUS if MMU !! 44 select HAVE_DEBUG_STACKOVERFLOW
142 select HAVE_DYNAMIC_FTRACE if !XIP_KER !! 45 select HAVE_DMA_API_DEBUG
143 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT !! 46 select HAVE_DMA_CONTIGUOUS
144 select HAVE_DYNAMIC_FTRACE_WITH_ARGS i !! 47 select HAVE_DYNAMIC_FTRACE
145 select HAVE_FTRACE_MCOUNT_RECORD if !X !! 48 select HAVE_EXIT_THREAD
>> 49 select HAVE_FTRACE_MCOUNT_RECORD
146 select HAVE_FUNCTION_GRAPH_TRACER 50 select HAVE_FUNCTION_GRAPH_TRACER
147 select HAVE_FUNCTION_GRAPH_RETVAL if H !! 51 select HAVE_FUNCTION_TRACER
148 select HAVE_FUNCTION_TRACER if !XIP_KE !! 52 select HAVE_GENERIC_DMA_COHERENT
149 select HAVE_EBPF_JIT if MMU !! 53 select HAVE_IDE
150 select HAVE_GUP_FAST if MMU !! 54 select HAVE_IRQ_EXIT_ON_IRQ_STACK
151 select HAVE_FUNCTION_ARG_ACCESS_API <<
152 select HAVE_FUNCTION_ERROR_INJECTION <<
153 select HAVE_GCC_PLUGINS <<
154 select HAVE_GENERIC_VDSO if MMU && 64B <<
155 select HAVE_IRQ_TIME_ACCOUNTING 55 select HAVE_IRQ_TIME_ACCOUNTING
156 select HAVE_KERNEL_BZIP2 if !XIP_KERNE !! 56 select HAVE_KPROBES
157 select HAVE_KERNEL_GZIP if !XIP_KERNEL !! 57 select HAVE_KRETPROBES
158 select HAVE_KERNEL_LZ4 if !XIP_KERNEL !! 58 select HAVE_MEMBLOCK
159 select HAVE_KERNEL_LZMA if !XIP_KERNEL !! 59 select HAVE_MEMBLOCK_NODE_MAP
160 select HAVE_KERNEL_LZO if !XIP_KERNEL !! 60 select HAVE_MOD_ARCH_SPECIFIC
161 select HAVE_KERNEL_UNCOMPRESSED if !XI !! 61 select HAVE_NMI
162 select HAVE_KERNEL_ZSTD if !XIP_KERNEL !! 62 select HAVE_OPROFILE
163 select HAVE_KERNEL_XZ if !XIP_KERNEL & <<
164 select HAVE_KPROBES if !XIP_KERNEL <<
165 select HAVE_KRETPROBES if !XIP_KERNEL <<
166 # https://github.com/ClangBuiltLinux/l <<
167 select HAVE_LD_DEAD_CODE_DATA_ELIMINAT <<
168 select HAVE_MOVE_PMD <<
169 select HAVE_MOVE_PUD <<
170 select HAVE_PAGE_SIZE_4KB <<
171 select HAVE_PCI <<
172 select HAVE_PERF_EVENTS 63 select HAVE_PERF_EVENTS
173 select HAVE_PERF_REGS <<
174 select HAVE_PERF_USER_STACK_DUMP <<
175 select HAVE_POSIX_CPU_TIMERS_TASK_WORK <<
176 select HAVE_PREEMPT_DYNAMIC_KEY if !XI <<
177 select HAVE_REGS_AND_STACK_ACCESS_API 64 select HAVE_REGS_AND_STACK_ACCESS_API
178 select HAVE_RETHOOK if !XIP_KERNEL <<
179 select HAVE_RSEQ <<
180 select HAVE_RUST if RUSTC_SUPPORTS_RIS <<
181 select HAVE_SAMPLE_FTRACE_DIRECT <<
182 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI <<
183 select HAVE_STACKPROTECTOR <<
184 select HAVE_SYSCALL_TRACEPOINTS 65 select HAVE_SYSCALL_TRACEPOINTS
185 select HOTPLUG_CORE_SYNC_DEAD if HOTPL !! 66 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
186 select IRQ_DOMAIN <<
187 select IRQ_FORCED_THREADING 67 select IRQ_FORCED_THREADING
188 select KASAN_VMALLOC if KASAN !! 68 select MODULES_USE_ELF_RELA if MODULES && 64BIT
189 select LOCK_MM_AND_FIND_VMA !! 69 select MODULES_USE_ELF_REL if MODULES
190 select MMU_GATHER_RCU_TABLE_FREE if SM !! 70 select PERF_USE_VMALLOC
191 select MODULES_USE_ELF_RELA if MODULES !! 71 select RTC_LIB if !MACH_LOONGSON64
192 select OF <<
193 select OF_EARLY_FLATTREE <<
194 select OF_IRQ <<
195 select PCI_DOMAINS_GENERIC if PCI <<
196 select PCI_ECAM if (ACPI && PCI) <<
197 select PCI_MSI if PCI <<
198 select RISCV_ALTERNATIVE if !XIP_KERNE <<
199 select RISCV_APLIC <<
200 select RISCV_IMSIC <<
201 select RISCV_INTC <<
202 select RISCV_TIMER if RISCV_SBI <<
203 select SIFIVE_PLIC <<
204 select SPARSE_IRQ <<
205 select SYSCTL_EXCEPTION_TRACE 72 select SYSCTL_EXCEPTION_TRACE
206 select THREAD_INFO_IN_TASK !! 73 select VIRT_TO_BUS
207 select TRACE_IRQFLAGS_SUPPORT !! 74
208 select UACCESS_MEMCPY if !MMU !! 75 menu "Machine selection"
209 select USER_STACKTRACE_SUPPORT !! 76
>> 77 choice
>> 78 prompt "System type"
>> 79 default MIPS_GENERIC
>> 80
>> 81 config MIPS_GENERIC
>> 82 bool "Generic board-agnostic MIPS kernel"
>> 83 select BOOT_RAW
>> 84 select BUILTIN_DTB
>> 85 select CEVT_R4K
>> 86 select CLKSRC_MIPS_GIC
>> 87 select COMMON_CLK
>> 88 select CPU_MIPSR2_IRQ_VI
>> 89 select CPU_MIPSR2_IRQ_EI
>> 90 select CSRC_R4K
>> 91 select DMA_PERDEV_COHERENT
>> 92 select HW_HAS_PCI
>> 93 select IRQ_MIPS_CPU
>> 94 select LIBFDT
>> 95 select MIPS_CPU_SCACHE
>> 96 select MIPS_GIC
>> 97 select MIPS_L1_CACHE_SHIFT_7
>> 98 select NO_EXCEPT_FILL
>> 99 select PCI_DRIVERS_GENERIC
>> 100 select PINCTRL
>> 101 select SMP_UP if SMP
>> 102 select SWAP_IO_SPACE
>> 103 select SYS_HAS_CPU_MIPS32_R1
>> 104 select SYS_HAS_CPU_MIPS32_R2
>> 105 select SYS_HAS_CPU_MIPS32_R6
>> 106 select SYS_HAS_CPU_MIPS64_R1
>> 107 select SYS_HAS_CPU_MIPS64_R2
>> 108 select SYS_HAS_CPU_MIPS64_R6
>> 109 select SYS_SUPPORTS_32BIT_KERNEL
>> 110 select SYS_SUPPORTS_64BIT_KERNEL
>> 111 select SYS_SUPPORTS_BIG_ENDIAN
>> 112 select SYS_SUPPORTS_HIGHMEM
>> 113 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 114 select SYS_SUPPORTS_MICROMIPS
>> 115 select SYS_SUPPORTS_MIPS_CPS
>> 116 select SYS_SUPPORTS_MIPS16
>> 117 select SYS_SUPPORTS_MULTITHREADING
>> 118 select SYS_SUPPORTS_RELOCATABLE
>> 119 select SYS_SUPPORTS_SMARTMIPS
>> 120 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 121 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 122 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 123 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 124 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 125 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 126 select USE_OF
>> 127 help
>> 128 Select this to build a kernel which aims to support multiple boards,
>> 129 generally using a flattened device tree passed from the bootloader
>> 130 using the boot protocol defined in the UHI (Unified Hosting
>> 131 Interface) specification.
>> 132
>> 133 config MIPS_ALCHEMY
>> 134 bool "Alchemy processor based machines"
>> 135 select ARCH_PHYS_ADDR_T_64BIT
>> 136 select CEVT_R4K
>> 137 select CSRC_R4K
>> 138 select IRQ_MIPS_CPU
>> 139 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 140 select SYS_HAS_CPU_MIPS32_R1
>> 141 select SYS_SUPPORTS_32BIT_KERNEL
>> 142 select SYS_SUPPORTS_APM_EMULATION
>> 143 select GPIOLIB
>> 144 select SYS_SUPPORTS_ZBOOT
>> 145 select COMMON_CLK
>> 146
>> 147 config AR7
>> 148 bool "Texas Instruments AR7"
>> 149 select BOOT_ELF32
>> 150 select DMA_NONCOHERENT
>> 151 select CEVT_R4K
>> 152 select CSRC_R4K
>> 153 select IRQ_MIPS_CPU
>> 154 select NO_EXCEPT_FILL
>> 155 select SWAP_IO_SPACE
>> 156 select SYS_HAS_CPU_MIPS32_R1
>> 157 select SYS_HAS_EARLY_PRINTK
>> 158 select SYS_SUPPORTS_32BIT_KERNEL
>> 159 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 160 select SYS_SUPPORTS_MIPS16
>> 161 select SYS_SUPPORTS_ZBOOT_UART16550
>> 162 select GPIOLIB
>> 163 select VLYNQ
>> 164 select HAVE_CLK
>> 165 help
>> 166 Support for the Texas Instruments AR7 System-on-a-Chip
>> 167 family: TNETD7100, 7200 and 7300.
>> 168
>> 169 config ATH25
>> 170 bool "Atheros AR231x/AR531x SoC support"
>> 171 select CEVT_R4K
>> 172 select CSRC_R4K
>> 173 select DMA_NONCOHERENT
>> 174 select IRQ_MIPS_CPU
>> 175 select IRQ_DOMAIN
>> 176 select SYS_HAS_CPU_MIPS32_R1
>> 177 select SYS_SUPPORTS_BIG_ENDIAN
>> 178 select SYS_SUPPORTS_32BIT_KERNEL
>> 179 select SYS_HAS_EARLY_PRINTK
>> 180 help
>> 181 Support for Atheros AR231x and Atheros AR531x based boards
>> 182
>> 183 config ATH79
>> 184 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 185 select ARCH_HAS_RESET_CONTROLLER
>> 186 select BOOT_RAW
>> 187 select CEVT_R4K
>> 188 select CSRC_R4K
>> 189 select DMA_NONCOHERENT
>> 190 select GPIOLIB
>> 191 select HAVE_CLK
>> 192 select COMMON_CLK
>> 193 select CLKDEV_LOOKUP
>> 194 select IRQ_MIPS_CPU
>> 195 select MIPS_MACHINE
>> 196 select SYS_HAS_CPU_MIPS32_R2
>> 197 select SYS_HAS_EARLY_PRINTK
>> 198 select SYS_SUPPORTS_32BIT_KERNEL
>> 199 select SYS_SUPPORTS_BIG_ENDIAN
>> 200 select SYS_SUPPORTS_MIPS16
>> 201 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 202 select USE_OF
>> 203 help
>> 204 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 205
>> 206 config BMIPS_GENERIC
>> 207 bool "Broadcom Generic BMIPS kernel"
>> 208 select BOOT_RAW
>> 209 select NO_EXCEPT_FILL
>> 210 select USE_OF
>> 211 select CEVT_R4K
>> 212 select CSRC_R4K
>> 213 select SYNC_R4K
>> 214 select COMMON_CLK
>> 215 select BCM6345_L1_IRQ
>> 216 select BCM7038_L1_IRQ
>> 217 select BCM7120_L2_IRQ
>> 218 select BRCMSTB_L2_IRQ
>> 219 select IRQ_MIPS_CPU
>> 220 select DMA_NONCOHERENT
>> 221 select SYS_SUPPORTS_32BIT_KERNEL
>> 222 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 223 select SYS_SUPPORTS_BIG_ENDIAN
>> 224 select SYS_SUPPORTS_HIGHMEM
>> 225 select SYS_HAS_CPU_BMIPS32_3300
>> 226 select SYS_HAS_CPU_BMIPS4350
>> 227 select SYS_HAS_CPU_BMIPS4380
>> 228 select SYS_HAS_CPU_BMIPS5000
>> 229 select SWAP_IO_SPACE
>> 230 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 231 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 232 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 233 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 234 select HARDIRQS_SW_RESEND
>> 235 help
>> 236 Build a generic DT-based kernel image that boots on select
>> 237 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 238 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 239 must be set appropriately for your board.
>> 240
>> 241 config BCM47XX
>> 242 bool "Broadcom BCM47XX based boards"
>> 243 select BOOT_RAW
>> 244 select CEVT_R4K
>> 245 select CSRC_R4K
>> 246 select DMA_NONCOHERENT
>> 247 select HW_HAS_PCI
>> 248 select IRQ_MIPS_CPU
>> 249 select SYS_HAS_CPU_MIPS32_R1
>> 250 select NO_EXCEPT_FILL
>> 251 select SYS_SUPPORTS_32BIT_KERNEL
>> 252 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 253 select SYS_SUPPORTS_MIPS16
>> 254 select SYS_SUPPORTS_ZBOOT
>> 255 select SYS_HAS_EARLY_PRINTK
>> 256 select USE_GENERIC_EARLY_PRINTK_8250
>> 257 select GPIOLIB
>> 258 select LEDS_GPIO_REGISTER
>> 259 select BCM47XX_NVRAM
>> 260 select BCM47XX_SPROM
>> 261 select BCM47XX_SSB if !BCM47XX_BCMA
>> 262 help
>> 263 Support for BCM47XX based boards
>> 264
>> 265 config BCM63XX
>> 266 bool "Broadcom BCM63XX based boards"
>> 267 select BOOT_RAW
>> 268 select CEVT_R4K
>> 269 select CSRC_R4K
>> 270 select SYNC_R4K
>> 271 select DMA_NONCOHERENT
>> 272 select IRQ_MIPS_CPU
>> 273 select SYS_SUPPORTS_32BIT_KERNEL
>> 274 select SYS_SUPPORTS_BIG_ENDIAN
>> 275 select SYS_HAS_EARLY_PRINTK
>> 276 select SWAP_IO_SPACE
>> 277 select GPIOLIB
>> 278 select HAVE_CLK
>> 279 select MIPS_L1_CACHE_SHIFT_4
>> 280 select CLKDEV_LOOKUP
>> 281 help
>> 282 Support for BCM63XX based boards
>> 283
>> 284 config MIPS_COBALT
>> 285 bool "Cobalt Server"
>> 286 select CEVT_R4K
>> 287 select CSRC_R4K
>> 288 select CEVT_GT641XX
>> 289 select DMA_NONCOHERENT
>> 290 select HW_HAS_PCI
>> 291 select I8253
>> 292 select I8259
>> 293 select IRQ_MIPS_CPU
>> 294 select IRQ_GT641XX
>> 295 select PCI_GT64XXX_PCI0
>> 296 select PCI
>> 297 select SYS_HAS_CPU_NEVADA
>> 298 select SYS_HAS_EARLY_PRINTK
>> 299 select SYS_SUPPORTS_32BIT_KERNEL
>> 300 select SYS_SUPPORTS_64BIT_KERNEL
>> 301 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 302 select USE_GENERIC_EARLY_PRINTK_8250
>> 303
>> 304 config MACH_DECSTATION
>> 305 bool "DECstations"
>> 306 select BOOT_ELF32
>> 307 select CEVT_DS1287
>> 308 select CEVT_R4K if CPU_R4X00
>> 309 select CSRC_IOASIC
>> 310 select CSRC_R4K if CPU_R4X00
>> 311 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 312 select CPU_R4000_WORKAROUNDS if 64BIT
>> 313 select CPU_R4400_WORKAROUNDS if 64BIT
>> 314 select DMA_NONCOHERENT
>> 315 select NO_IOPORT_MAP
>> 316 select IRQ_MIPS_CPU
>> 317 select SYS_HAS_CPU_R3000
>> 318 select SYS_HAS_CPU_R4X00
>> 319 select SYS_SUPPORTS_32BIT_KERNEL
>> 320 select SYS_SUPPORTS_64BIT_KERNEL
>> 321 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 322 select SYS_SUPPORTS_128HZ
>> 323 select SYS_SUPPORTS_256HZ
>> 324 select SYS_SUPPORTS_1024HZ
>> 325 select MIPS_L1_CACHE_SHIFT_4
>> 326 help
>> 327 This enables support for DEC's MIPS based workstations. For details
>> 328 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 329 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 330
>> 331 If you have one of the following DECstation Models you definitely
>> 332 want to choose R4xx0 for the CPU Type:
>> 333
>> 334 DECstation 5000/50
>> 335 DECstation 5000/150
>> 336 DECstation 5000/260
>> 337 DECsystem 5900/260
>> 338
>> 339 otherwise choose R3000.
>> 340
>> 341 config MACH_JAZZ
>> 342 bool "Jazz family of machines"
>> 343 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 344 select ARCH_MIGHT_HAVE_PC_SERIO
>> 345 select FW_ARC
>> 346 select FW_ARC32
>> 347 select ARCH_MAY_HAVE_PC_FDC
>> 348 select CEVT_R4K
>> 349 select CSRC_R4K
>> 350 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 351 select GENERIC_ISA_DMA
>> 352 select HAVE_PCSPKR_PLATFORM
>> 353 select IRQ_MIPS_CPU
>> 354 select I8253
>> 355 select I8259
>> 356 select ISA
>> 357 select SYS_HAS_CPU_R4X00
>> 358 select SYS_SUPPORTS_32BIT_KERNEL
>> 359 select SYS_SUPPORTS_64BIT_KERNEL
>> 360 select SYS_SUPPORTS_100HZ
>> 361 help
>> 362 This a family of machines based on the MIPS R4030 chipset which was
>> 363 used by several vendors to build RISC/os and Windows NT workstations.
>> 364 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 365 Olivetti M700-10 workstations.
>> 366
>> 367 config MACH_INGENIC
>> 368 bool "Ingenic SoC based machines"
>> 369 select SYS_SUPPORTS_32BIT_KERNEL
>> 370 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 371 select SYS_SUPPORTS_ZBOOT_UART16550
>> 372 select DMA_NONCOHERENT
>> 373 select IRQ_MIPS_CPU
>> 374 select PINCTRL
>> 375 select GPIOLIB
>> 376 select COMMON_CLK
>> 377 select GENERIC_IRQ_CHIP
>> 378 select BUILTIN_DTB
>> 379 select USE_OF
>> 380 select LIBFDT
>> 381
>> 382 config LANTIQ
>> 383 bool "Lantiq based platforms"
>> 384 select DMA_NONCOHERENT
>> 385 select IRQ_MIPS_CPU
>> 386 select CEVT_R4K
>> 387 select CSRC_R4K
>> 388 select SYS_HAS_CPU_MIPS32_R1
>> 389 select SYS_HAS_CPU_MIPS32_R2
>> 390 select SYS_SUPPORTS_BIG_ENDIAN
>> 391 select SYS_SUPPORTS_32BIT_KERNEL
>> 392 select SYS_SUPPORTS_MIPS16
>> 393 select SYS_SUPPORTS_MULTITHREADING
>> 394 select SYS_SUPPORTS_VPE_LOADER
>> 395 select SYS_HAS_EARLY_PRINTK
>> 396 select GPIOLIB
>> 397 select SWAP_IO_SPACE
>> 398 select BOOT_RAW
>> 399 select CLKDEV_LOOKUP
>> 400 select USE_OF
>> 401 select PINCTRL
>> 402 select PINCTRL_LANTIQ
>> 403 select ARCH_HAS_RESET_CONTROLLER
>> 404 select RESET_CONTROLLER
>> 405
>> 406 config LASAT
>> 407 bool "LASAT Networks platforms"
>> 408 select CEVT_R4K
>> 409 select CRC32
>> 410 select CSRC_R4K
>> 411 select DMA_NONCOHERENT
>> 412 select SYS_HAS_EARLY_PRINTK
>> 413 select HW_HAS_PCI
>> 414 select IRQ_MIPS_CPU
>> 415 select PCI_GT64XXX_PCI0
>> 416 select MIPS_NILE4
>> 417 select R5000_CPU_SCACHE
>> 418 select SYS_HAS_CPU_R5000
>> 419 select SYS_SUPPORTS_32BIT_KERNEL
>> 420 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 421 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 422
>> 423 config MACH_LOONGSON32
>> 424 bool "Loongson-1 family of machines"
>> 425 select SYS_SUPPORTS_ZBOOT
>> 426 help
>> 427 This enables support for the Loongson-1 family of machines.
>> 428
>> 429 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 430 the Institute of Computing Technology (ICT), Chinese Academy of
>> 431 Sciences (CAS).
>> 432
>> 433 config MACH_LOONGSON64
>> 434 bool "Loongson-2/3 family of machines"
>> 435 select ARCH_HAS_PHYS_TO_DMA
>> 436 select SYS_SUPPORTS_ZBOOT
>> 437 help
>> 438 This enables the support of Loongson-2/3 family of machines.
>> 439
>> 440 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 441 family of multi-core CPUs. They are both 64-bit general-purpose
>> 442 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 443 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 444 in the People's Republic of China. The chief architect is Professor
>> 445 Weiwu Hu.
>> 446
>> 447 config MACH_PISTACHIO
>> 448 bool "IMG Pistachio SoC based boards"
>> 449 select BOOT_ELF32
>> 450 select BOOT_RAW
>> 451 select CEVT_R4K
>> 452 select CLKSRC_MIPS_GIC
>> 453 select COMMON_CLK
>> 454 select CSRC_R4K
>> 455 select DMA_NONCOHERENT
>> 456 select GPIOLIB
>> 457 select IRQ_MIPS_CPU
>> 458 select LIBFDT
>> 459 select MFD_SYSCON
>> 460 select MIPS_CPU_SCACHE
>> 461 select MIPS_GIC
>> 462 select PINCTRL
>> 463 select REGULATOR
>> 464 select SYS_HAS_CPU_MIPS32_R2
>> 465 select SYS_SUPPORTS_32BIT_KERNEL
>> 466 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 467 select SYS_SUPPORTS_MIPS_CPS
>> 468 select SYS_SUPPORTS_MULTITHREADING
>> 469 select SYS_SUPPORTS_RELOCATABLE
>> 470 select SYS_SUPPORTS_ZBOOT
>> 471 select SYS_HAS_EARLY_PRINTK
>> 472 select USE_GENERIC_EARLY_PRINTK_8250
>> 473 select USE_OF
>> 474 help
>> 475 This enables support for the IMG Pistachio SoC platform.
>> 476
>> 477 config MIPS_MALTA
>> 478 bool "MIPS Malta board"
>> 479 select ARCH_MAY_HAVE_PC_FDC
>> 480 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 481 select ARCH_MIGHT_HAVE_PC_SERIO
>> 482 select BOOT_ELF32
>> 483 select BOOT_RAW
>> 484 select BUILTIN_DTB
>> 485 select CEVT_R4K
>> 486 select CSRC_R4K
>> 487 select CLKSRC_MIPS_GIC
>> 488 select COMMON_CLK
>> 489 select DMA_MAYBE_COHERENT
>> 490 select GENERIC_ISA_DMA
>> 491 select HAVE_PCSPKR_PLATFORM
>> 492 select IRQ_MIPS_CPU
>> 493 select MIPS_GIC
>> 494 select HW_HAS_PCI
>> 495 select I8253
>> 496 select I8259
>> 497 select MIPS_BONITO64
>> 498 select MIPS_CPU_SCACHE
>> 499 select MIPS_L1_CACHE_SHIFT_6
>> 500 select PCI_GT64XXX_PCI0
>> 501 select MIPS_MSC
>> 502 select SMP_UP if SMP
>> 503 select SWAP_IO_SPACE
>> 504 select SYS_HAS_CPU_MIPS32_R1
>> 505 select SYS_HAS_CPU_MIPS32_R2
>> 506 select SYS_HAS_CPU_MIPS32_R3_5
>> 507 select SYS_HAS_CPU_MIPS32_R5
>> 508 select SYS_HAS_CPU_MIPS32_R6
>> 509 select SYS_HAS_CPU_MIPS64_R1
>> 510 select SYS_HAS_CPU_MIPS64_R2
>> 511 select SYS_HAS_CPU_MIPS64_R6
>> 512 select SYS_HAS_CPU_NEVADA
>> 513 select SYS_HAS_CPU_RM7000
>> 514 select SYS_SUPPORTS_32BIT_KERNEL
>> 515 select SYS_SUPPORTS_64BIT_KERNEL
>> 516 select SYS_SUPPORTS_BIG_ENDIAN
>> 517 select SYS_SUPPORTS_HIGHMEM
>> 518 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 519 select SYS_SUPPORTS_MICROMIPS
>> 520 select SYS_SUPPORTS_MIPS_CMP
>> 521 select SYS_SUPPORTS_MIPS_CPS
>> 522 select SYS_SUPPORTS_MIPS16
>> 523 select SYS_SUPPORTS_MULTITHREADING
>> 524 select SYS_SUPPORTS_SMARTMIPS
>> 525 select SYS_SUPPORTS_VPE_LOADER
>> 526 select SYS_SUPPORTS_ZBOOT
>> 527 select SYS_SUPPORTS_RELOCATABLE
>> 528 select USE_OF
>> 529 select LIBFDT
210 select ZONE_DMA32 if 64BIT 530 select ZONE_DMA32 if 64BIT
>> 531 select BUILTIN_DTB
>> 532 select LIBFDT
>> 533 help
>> 534 This enables support for the MIPS Technologies Malta evaluation
>> 535 board.
211 536
212 config RUSTC_SUPPORTS_RISCV !! 537 config MACH_PIC32
213 def_bool y !! 538 bool "Microchip PIC32 Family"
214 depends on 64BIT !! 539 help
215 # Shadow call stack requires rustc ver !! 540 This enables support for the Microchip PIC32 family of platforms.
216 # -Zsanitizer=shadow-call-stack flag. <<
217 depends on !SHADOW_CALL_STACK || RUSTC <<
218 <<
219 config CLANG_SUPPORTS_DYNAMIC_FTRACE <<
220 def_bool CC_IS_CLANG <<
221 # https://github.com/ClangBuiltLinux/l <<
222 depends on AS_IS_GNU || (AS_IS_LLVM && <<
223 <<
224 config GCC_SUPPORTS_DYNAMIC_FTRACE <<
225 def_bool CC_IS_GCC <<
226 depends on $(cc-option,-fpatchable-fun <<
227 <<
228 config HAVE_SHADOW_CALL_STACK <<
229 def_bool $(cc-option,-fsanitize=shadow <<
230 # https://github.com/riscv-non-isa/ris <<
231 depends on $(ld-option,--no-relax-gp) <<
232 541
233 config RISCV_USE_LINKER_RELAXATION !! 542 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
234 def_bool y !! 543 microcontrollers.
235 # https://github.com/llvm/llvm-project !! 544
236 depends on !LD_IS_LLD || LLD_VERSION > !! 545 config NEC_MARKEINS
>> 546 bool "NEC EMMA2RH Mark-eins board"
>> 547 select SOC_EMMA2RH
>> 548 select HW_HAS_PCI
>> 549 help
>> 550 This enables support for the NEC Electronics Mark-eins boards.
>> 551
>> 552 config MACH_VR41XX
>> 553 bool "NEC VR4100 series based machines"
>> 554 select CEVT_R4K
>> 555 select CSRC_R4K
>> 556 select SYS_HAS_CPU_VR41XX
>> 557 select SYS_SUPPORTS_MIPS16
>> 558 select GPIOLIB
>> 559
>> 560 config NXP_STB220
>> 561 bool "NXP STB220 board"
>> 562 select SOC_PNX833X
>> 563 help
>> 564 Support for NXP Semiconductors STB220 Development Board.
>> 565
>> 566 config NXP_STB225
>> 567 bool "NXP 225 board"
>> 568 select SOC_PNX833X
>> 569 select SOC_PNX8335
>> 570 help
>> 571 Support for NXP Semiconductors STB225 Development Board.
>> 572
>> 573 config PMC_MSP
>> 574 bool "PMC-Sierra MSP chipsets"
>> 575 select CEVT_R4K
>> 576 select CSRC_R4K
>> 577 select DMA_NONCOHERENT
>> 578 select SWAP_IO_SPACE
>> 579 select NO_EXCEPT_FILL
>> 580 select BOOT_RAW
>> 581 select SYS_HAS_CPU_MIPS32_R1
>> 582 select SYS_HAS_CPU_MIPS32_R2
>> 583 select SYS_SUPPORTS_32BIT_KERNEL
>> 584 select SYS_SUPPORTS_BIG_ENDIAN
>> 585 select SYS_SUPPORTS_MIPS16
>> 586 select IRQ_MIPS_CPU
>> 587 select SERIAL_8250
>> 588 select SERIAL_8250_CONSOLE
>> 589 select USB_EHCI_BIG_ENDIAN_MMIO
>> 590 select USB_EHCI_BIG_ENDIAN_DESC
>> 591 help
>> 592 This adds support for the PMC-Sierra family of Multi-Service
>> 593 Processor System-On-A-Chips. These parts include a number
>> 594 of integrated peripherals, interfaces and DSPs in addition to
>> 595 a variety of MIPS cores.
>> 596
>> 597 config RALINK
>> 598 bool "Ralink based machines"
>> 599 select CEVT_R4K
>> 600 select CSRC_R4K
>> 601 select BOOT_RAW
>> 602 select DMA_NONCOHERENT
>> 603 select IRQ_MIPS_CPU
>> 604 select USE_OF
>> 605 select SYS_HAS_CPU_MIPS32_R1
>> 606 select SYS_HAS_CPU_MIPS32_R2
>> 607 select SYS_SUPPORTS_32BIT_KERNEL
>> 608 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 609 select SYS_SUPPORTS_MIPS16
>> 610 select SYS_HAS_EARLY_PRINTK
>> 611 select CLKDEV_LOOKUP
>> 612 select ARCH_HAS_RESET_CONTROLLER
>> 613 select RESET_CONTROLLER
>> 614
>> 615 config SGI_IP22
>> 616 bool "SGI IP22 (Indy/Indigo2)"
>> 617 select FW_ARC
>> 618 select FW_ARC32
>> 619 select ARCH_MIGHT_HAVE_PC_SERIO
>> 620 select BOOT_ELF32
>> 621 select CEVT_R4K
>> 622 select CSRC_R4K
>> 623 select DEFAULT_SGI_PARTITION
>> 624 select DMA_NONCOHERENT
>> 625 select HW_HAS_EISA
>> 626 select I8253
>> 627 select I8259
>> 628 select IP22_CPU_SCACHE
>> 629 select IRQ_MIPS_CPU
>> 630 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 631 select SGI_HAS_I8042
>> 632 select SGI_HAS_INDYDOG
>> 633 select SGI_HAS_HAL2
>> 634 select SGI_HAS_SEEQ
>> 635 select SGI_HAS_WD93
>> 636 select SGI_HAS_ZILOG
>> 637 select SWAP_IO_SPACE
>> 638 select SYS_HAS_CPU_R4X00
>> 639 select SYS_HAS_CPU_R5000
>> 640 #
>> 641 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 642 # memory during early boot on some machines.
>> 643 #
>> 644 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 645 # for a more details discussion
>> 646 #
>> 647 # select SYS_HAS_EARLY_PRINTK
>> 648 select SYS_SUPPORTS_32BIT_KERNEL
>> 649 select SYS_SUPPORTS_64BIT_KERNEL
>> 650 select SYS_SUPPORTS_BIG_ENDIAN
>> 651 select MIPS_L1_CACHE_SHIFT_7
>> 652 help
>> 653 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 654 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 655 that runs on these, say Y here.
>> 656
>> 657 config SGI_IP27
>> 658 bool "SGI IP27 (Origin200/2000)"
>> 659 select FW_ARC
>> 660 select FW_ARC64
>> 661 select BOOT_ELF64
>> 662 select DEFAULT_SGI_PARTITION
>> 663 select DMA_COHERENT
>> 664 select SYS_HAS_EARLY_PRINTK
>> 665 select HW_HAS_PCI
>> 666 select NR_CPUS_DEFAULT_64
>> 667 select SYS_HAS_CPU_R10000
>> 668 select SYS_SUPPORTS_64BIT_KERNEL
>> 669 select SYS_SUPPORTS_BIG_ENDIAN
>> 670 select SYS_SUPPORTS_NUMA
>> 671 select SYS_SUPPORTS_SMP
>> 672 select MIPS_L1_CACHE_SHIFT_7
>> 673 help
>> 674 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 675 workstations. To compile a Linux kernel that runs on these, say Y
>> 676 here.
237 677
238 # https://github.com/llvm/llvm-project/commit/ !! 678 config SGI_IP28
239 config ARCH_HAS_BROKEN_DWARF5 !! 679 bool "SGI IP28 (Indigo2 R10k)"
240 def_bool y !! 680 select FW_ARC
241 depends on RISCV_USE_LINKER_RELAXATION !! 681 select FW_ARC64
242 # https://github.com/llvm/llvm-project !! 682 select ARCH_MIGHT_HAVE_PC_SERIO
243 depends on AS_IS_LLVM && AS_VERSION < !! 683 select BOOT_ELF64
244 # https://github.com/llvm/llvm-project !! 684 select CEVT_R4K
245 depends on LD_IS_LLD && LLD_VERSION < !! 685 select CSRC_R4K
>> 686 select DEFAULT_SGI_PARTITION
>> 687 select DMA_NONCOHERENT
>> 688 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 689 select IRQ_MIPS_CPU
>> 690 select HW_HAS_EISA
>> 691 select I8253
>> 692 select I8259
>> 693 select SGI_HAS_I8042
>> 694 select SGI_HAS_INDYDOG
>> 695 select SGI_HAS_HAL2
>> 696 select SGI_HAS_SEEQ
>> 697 select SGI_HAS_WD93
>> 698 select SGI_HAS_ZILOG
>> 699 select SWAP_IO_SPACE
>> 700 select SYS_HAS_CPU_R10000
>> 701 #
>> 702 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 703 # memory during early boot on some machines.
>> 704 #
>> 705 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 706 # for a more details discussion
>> 707 #
>> 708 # select SYS_HAS_EARLY_PRINTK
>> 709 select SYS_SUPPORTS_64BIT_KERNEL
>> 710 select SYS_SUPPORTS_BIG_ENDIAN
>> 711 select MIPS_L1_CACHE_SHIFT_7
>> 712 help
>> 713 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 714 kernel that runs on these, say Y here.
>> 715
>> 716 config SGI_IP32
>> 717 bool "SGI IP32 (O2)"
>> 718 select FW_ARC
>> 719 select FW_ARC32
>> 720 select BOOT_ELF32
>> 721 select CEVT_R4K
>> 722 select CSRC_R4K
>> 723 select DMA_NONCOHERENT
>> 724 select HW_HAS_PCI
>> 725 select IRQ_MIPS_CPU
>> 726 select R5000_CPU_SCACHE
>> 727 select RM7000_CPU_SCACHE
>> 728 select SYS_HAS_CPU_R5000
>> 729 select SYS_HAS_CPU_R10000 if BROKEN
>> 730 select SYS_HAS_CPU_RM7000
>> 731 select SYS_HAS_CPU_NEVADA
>> 732 select SYS_SUPPORTS_64BIT_KERNEL
>> 733 select SYS_SUPPORTS_BIG_ENDIAN
>> 734 help
>> 735 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 736
>> 737 config SIBYTE_CRHINE
>> 738 bool "Sibyte BCM91120C-CRhine"
>> 739 select BOOT_ELF32
>> 740 select DMA_COHERENT
>> 741 select SIBYTE_BCM1120
>> 742 select SWAP_IO_SPACE
>> 743 select SYS_HAS_CPU_SB1
>> 744 select SYS_SUPPORTS_BIG_ENDIAN
>> 745 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 746
>> 747 config SIBYTE_CARMEL
>> 748 bool "Sibyte BCM91120x-Carmel"
>> 749 select BOOT_ELF32
>> 750 select DMA_COHERENT
>> 751 select SIBYTE_BCM1120
>> 752 select SWAP_IO_SPACE
>> 753 select SYS_HAS_CPU_SB1
>> 754 select SYS_SUPPORTS_BIG_ENDIAN
>> 755 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 756
>> 757 config SIBYTE_CRHONE
>> 758 bool "Sibyte BCM91125C-CRhone"
>> 759 select BOOT_ELF32
>> 760 select DMA_COHERENT
>> 761 select SIBYTE_BCM1125
>> 762 select SWAP_IO_SPACE
>> 763 select SYS_HAS_CPU_SB1
>> 764 select SYS_SUPPORTS_BIG_ENDIAN
>> 765 select SYS_SUPPORTS_HIGHMEM
>> 766 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 767
>> 768 config SIBYTE_RHONE
>> 769 bool "Sibyte BCM91125E-Rhone"
>> 770 select BOOT_ELF32
>> 771 select DMA_COHERENT
>> 772 select SIBYTE_BCM1125H
>> 773 select SWAP_IO_SPACE
>> 774 select SYS_HAS_CPU_SB1
>> 775 select SYS_SUPPORTS_BIG_ENDIAN
>> 776 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 777
>> 778 config SIBYTE_SWARM
>> 779 bool "Sibyte BCM91250A-SWARM"
>> 780 select BOOT_ELF32
>> 781 select DMA_COHERENT
>> 782 select HAVE_PATA_PLATFORM
>> 783 select SIBYTE_SB1250
>> 784 select SWAP_IO_SPACE
>> 785 select SYS_HAS_CPU_SB1
>> 786 select SYS_SUPPORTS_BIG_ENDIAN
>> 787 select SYS_SUPPORTS_HIGHMEM
>> 788 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 789 select ZONE_DMA32 if 64BIT
246 790
247 config ARCH_MMAP_RND_BITS_MIN !! 791 config SIBYTE_LITTLESUR
248 default 18 if 64BIT !! 792 bool "Sibyte BCM91250C2-LittleSur"
249 default 8 !! 793 select BOOT_ELF32
>> 794 select DMA_COHERENT
>> 795 select HAVE_PATA_PLATFORM
>> 796 select SIBYTE_SB1250
>> 797 select SWAP_IO_SPACE
>> 798 select SYS_HAS_CPU_SB1
>> 799 select SYS_SUPPORTS_BIG_ENDIAN
>> 800 select SYS_SUPPORTS_HIGHMEM
>> 801 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 802
>> 803 config SIBYTE_SENTOSA
>> 804 bool "Sibyte BCM91250E-Sentosa"
>> 805 select BOOT_ELF32
>> 806 select DMA_COHERENT
>> 807 select SIBYTE_SB1250
>> 808 select SWAP_IO_SPACE
>> 809 select SYS_HAS_CPU_SB1
>> 810 select SYS_SUPPORTS_BIG_ENDIAN
>> 811 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 812
>> 813 config SIBYTE_BIGSUR
>> 814 bool "Sibyte BCM91480B-BigSur"
>> 815 select BOOT_ELF32
>> 816 select DMA_COHERENT
>> 817 select NR_CPUS_DEFAULT_4
>> 818 select SIBYTE_BCM1x80
>> 819 select SWAP_IO_SPACE
>> 820 select SYS_HAS_CPU_SB1
>> 821 select SYS_SUPPORTS_BIG_ENDIAN
>> 822 select SYS_SUPPORTS_HIGHMEM
>> 823 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 824 select ZONE_DMA32 if 64BIT
250 825
251 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 826 config SNI_RM
252 default 8 !! 827 bool "SNI RM200/300/400"
>> 828 select FW_ARC if CPU_LITTLE_ENDIAN
>> 829 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 830 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 831 select ARCH_MAY_HAVE_PC_FDC
>> 832 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 833 select ARCH_MIGHT_HAVE_PC_SERIO
>> 834 select BOOT_ELF32
>> 835 select CEVT_R4K
>> 836 select CSRC_R4K
>> 837 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 838 select DMA_NONCOHERENT
>> 839 select GENERIC_ISA_DMA
>> 840 select HAVE_PCSPKR_PLATFORM
>> 841 select HW_HAS_EISA
>> 842 select HW_HAS_PCI
>> 843 select IRQ_MIPS_CPU
>> 844 select I8253
>> 845 select I8259
>> 846 select ISA
>> 847 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 848 select SYS_HAS_CPU_R4X00
>> 849 select SYS_HAS_CPU_R5000
>> 850 select SYS_HAS_CPU_R10000
>> 851 select R5000_CPU_SCACHE
>> 852 select SYS_HAS_EARLY_PRINTK
>> 853 select SYS_SUPPORTS_32BIT_KERNEL
>> 854 select SYS_SUPPORTS_64BIT_KERNEL
>> 855 select SYS_SUPPORTS_BIG_ENDIAN
>> 856 select SYS_SUPPORTS_HIGHMEM
>> 857 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 858 help
>> 859 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 860 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 861 Technology and now in turn merged with Fujitsu. Say Y here to
>> 862 support this machine type.
>> 863
>> 864 config MACH_TX39XX
>> 865 bool "Toshiba TX39 series based machines"
>> 866
>> 867 config MACH_TX49XX
>> 868 bool "Toshiba TX49 series based machines"
>> 869
>> 870 config MIKROTIK_RB532
>> 871 bool "Mikrotik RB532 boards"
>> 872 select CEVT_R4K
>> 873 select CSRC_R4K
>> 874 select DMA_NONCOHERENT
>> 875 select HW_HAS_PCI
>> 876 select IRQ_MIPS_CPU
>> 877 select SYS_HAS_CPU_MIPS32_R1
>> 878 select SYS_SUPPORTS_32BIT_KERNEL
>> 879 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 880 select SWAP_IO_SPACE
>> 881 select BOOT_RAW
>> 882 select GPIOLIB
>> 883 select MIPS_L1_CACHE_SHIFT_4
>> 884 help
>> 885 Support the Mikrotik(tm) RouterBoard 532 series,
>> 886 based on the IDT RC32434 SoC.
>> 887
>> 888 config CAVIUM_OCTEON_SOC
>> 889 bool "Cavium Networks Octeon SoC based boards"
>> 890 select CEVT_R4K
>> 891 select ARCH_HAS_PHYS_TO_DMA
>> 892 select ARCH_PHYS_ADDR_T_64BIT
>> 893 select DMA_COHERENT
>> 894 select SYS_SUPPORTS_64BIT_KERNEL
>> 895 select SYS_SUPPORTS_BIG_ENDIAN
>> 896 select EDAC_SUPPORT
>> 897 select EDAC_ATOMIC_SCRUB
>> 898 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 899 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 900 select SYS_HAS_EARLY_PRINTK
>> 901 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 902 select HW_HAS_PCI
>> 903 select ZONE_DMA32
>> 904 select HOLES_IN_ZONE
>> 905 select GPIOLIB
>> 906 select LIBFDT
>> 907 select USE_OF
>> 908 select ARCH_SPARSEMEM_ENABLE
>> 909 select SYS_SUPPORTS_SMP
>> 910 select NR_CPUS_DEFAULT_64
>> 911 select MIPS_NR_CPU_NR_MAP_1024
>> 912 select BUILTIN_DTB
>> 913 select MTD_COMPLEX_MAPPINGS
>> 914 select SYS_SUPPORTS_RELOCATABLE
>> 915 help
>> 916 This option supports all of the Octeon reference boards from Cavium
>> 917 Networks. It builds a kernel that dynamically determines the Octeon
>> 918 CPU type and supports all known board reference implementations.
>> 919 Some of the supported boards are:
>> 920 EBT3000
>> 921 EBH3000
>> 922 EBH3100
>> 923 Thunder
>> 924 Kodama
>> 925 Hikari
>> 926 Say Y here for most Octeon reference boards.
>> 927
>> 928 config NLM_XLR_BOARD
>> 929 bool "Netlogic XLR/XLS based systems"
>> 930 select BOOT_ELF32
>> 931 select NLM_COMMON
>> 932 select SYS_HAS_CPU_XLR
>> 933 select SYS_SUPPORTS_SMP
>> 934 select HW_HAS_PCI
>> 935 select SWAP_IO_SPACE
>> 936 select SYS_SUPPORTS_32BIT_KERNEL
>> 937 select SYS_SUPPORTS_64BIT_KERNEL
>> 938 select ARCH_PHYS_ADDR_T_64BIT
>> 939 select SYS_SUPPORTS_BIG_ENDIAN
>> 940 select SYS_SUPPORTS_HIGHMEM
>> 941 select DMA_COHERENT
>> 942 select NR_CPUS_DEFAULT_32
>> 943 select CEVT_R4K
>> 944 select CSRC_R4K
>> 945 select IRQ_MIPS_CPU
>> 946 select ZONE_DMA32 if 64BIT
>> 947 select SYNC_R4K
>> 948 select SYS_HAS_EARLY_PRINTK
>> 949 select SYS_SUPPORTS_ZBOOT
>> 950 select SYS_SUPPORTS_ZBOOT_UART16550
>> 951 help
>> 952 Support for systems based on Netlogic XLR and XLS processors.
>> 953 Say Y here if you have a XLR or XLS based board.
>> 954
>> 955 config NLM_XLP_BOARD
>> 956 bool "Netlogic XLP based systems"
>> 957 select BOOT_ELF32
>> 958 select NLM_COMMON
>> 959 select SYS_HAS_CPU_XLP
>> 960 select SYS_SUPPORTS_SMP
>> 961 select HW_HAS_PCI
>> 962 select SYS_SUPPORTS_32BIT_KERNEL
>> 963 select SYS_SUPPORTS_64BIT_KERNEL
>> 964 select ARCH_PHYS_ADDR_T_64BIT
>> 965 select GPIOLIB
>> 966 select SYS_SUPPORTS_BIG_ENDIAN
>> 967 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 968 select SYS_SUPPORTS_HIGHMEM
>> 969 select DMA_COHERENT
>> 970 select NR_CPUS_DEFAULT_32
>> 971 select CEVT_R4K
>> 972 select CSRC_R4K
>> 973 select IRQ_MIPS_CPU
>> 974 select ZONE_DMA32 if 64BIT
>> 975 select SYNC_R4K
>> 976 select SYS_HAS_EARLY_PRINTK
>> 977 select USE_OF
>> 978 select SYS_SUPPORTS_ZBOOT
>> 979 select SYS_SUPPORTS_ZBOOT_UART16550
>> 980 help
>> 981 This board is based on Netlogic XLP Processor.
>> 982 Say Y here if you have a XLP based board.
>> 983
>> 984 config MIPS_PARAVIRT
>> 985 bool "Para-Virtualized guest system"
>> 986 select CEVT_R4K
>> 987 select CSRC_R4K
>> 988 select DMA_COHERENT
>> 989 select SYS_SUPPORTS_64BIT_KERNEL
>> 990 select SYS_SUPPORTS_32BIT_KERNEL
>> 991 select SYS_SUPPORTS_BIG_ENDIAN
>> 992 select SYS_SUPPORTS_SMP
>> 993 select NR_CPUS_DEFAULT_4
>> 994 select SYS_HAS_EARLY_PRINTK
>> 995 select SYS_HAS_CPU_MIPS32_R2
>> 996 select SYS_HAS_CPU_MIPS64_R2
>> 997 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 998 select HW_HAS_PCI
>> 999 select SWAP_IO_SPACE
>> 1000 help
>> 1001 This option supports guest running under ????
253 1002
254 # max bits determined by the following formula !! 1003 endchoice
255 # VA_BITS - PAGE_SHIFT - 3 <<
256 config ARCH_MMAP_RND_BITS_MAX <<
257 default 24 if 64BIT # SV39 based <<
258 default 17 <<
259 1004
260 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 1005 source "arch/mips/alchemy/Kconfig"
261 default 17 !! 1006 source "arch/mips/ath25/Kconfig"
>> 1007 source "arch/mips/ath79/Kconfig"
>> 1008 source "arch/mips/bcm47xx/Kconfig"
>> 1009 source "arch/mips/bcm63xx/Kconfig"
>> 1010 source "arch/mips/bmips/Kconfig"
>> 1011 source "arch/mips/generic/Kconfig"
>> 1012 source "arch/mips/jazz/Kconfig"
>> 1013 source "arch/mips/jz4740/Kconfig"
>> 1014 source "arch/mips/lantiq/Kconfig"
>> 1015 source "arch/mips/lasat/Kconfig"
>> 1016 source "arch/mips/pic32/Kconfig"
>> 1017 source "arch/mips/pistachio/Kconfig"
>> 1018 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1019 source "arch/mips/ralink/Kconfig"
>> 1020 source "arch/mips/sgi-ip27/Kconfig"
>> 1021 source "arch/mips/sibyte/Kconfig"
>> 1022 source "arch/mips/txx9/Kconfig"
>> 1023 source "arch/mips/vr41xx/Kconfig"
>> 1024 source "arch/mips/cavium-octeon/Kconfig"
>> 1025 source "arch/mips/loongson32/Kconfig"
>> 1026 source "arch/mips/loongson64/Kconfig"
>> 1027 source "arch/mips/netlogic/Kconfig"
>> 1028 source "arch/mips/paravirt/Kconfig"
>> 1029
>> 1030 endmenu
>> 1031
>> 1032 config RWSEM_GENERIC_SPINLOCK
>> 1033 bool
>> 1034 default y
>> 1035
>> 1036 config RWSEM_XCHGADD_ALGORITHM
>> 1037 bool
262 1038
263 # set if we run in machine mode, cleared if we !! 1039 config GENERIC_HWEIGHT
264 config RISCV_M_MODE !! 1040 bool
265 bool "Build a kernel that runs in mach <<
266 depends on !MMU <<
267 default y 1041 default y
268 help <<
269 Select this option if you want to ru <<
270 without the assistance of any other <<
271 1042
272 # set if we are running in S-mode and can use !! 1043 config GENERIC_CALIBRATE_DELAY
273 config RISCV_SBI <<
274 bool 1044 bool
275 depends on !RISCV_M_MODE <<
276 default y 1045 default y
277 1046
278 config MMU !! 1047 config SCHED_OMIT_FRAME_POINTER
279 bool "MMU-based Paged Memory Managemen !! 1048 bool
280 default y 1049 default y
281 help <<
282 Select if you want MMU-based virtual <<
283 support by paged memory management. <<
284 1050
285 config PAGE_OFFSET !! 1051 #
286 hex !! 1052 # Select some configuration options automatically based on user selections.
287 default 0x80000000 if !MMU && RISCV_M_ !! 1053 #
288 default 0x80200000 if !MMU !! 1054 config FW_ARC
289 default 0xc0000000 if 32BIT !! 1055 bool
290 default 0xff60000000000000 if 64BIT <<
291 <<
292 config KASAN_SHADOW_OFFSET <<
293 hex <<
294 depends on KASAN_GENERIC <<
295 default 0xdfffffff00000000 if 64BIT <<
296 default 0xffffffff if 32BIT <<
297 1056
298 config ARCH_FLATMEM_ENABLE !! 1057 config ARCH_MAY_HAVE_PC_FDC
299 def_bool !NUMA !! 1058 bool
300 1059
301 config ARCH_SPARSEMEM_ENABLE !! 1060 config BOOT_RAW
302 def_bool y !! 1061 bool
303 depends on MMU !! 1062
304 select SPARSEMEM_STATIC if 32BIT && SP !! 1063 config CEVT_BCM1480
305 select SPARSEMEM_VMEMMAP_ENABLE if 64B !! 1064 bool
306 1065
307 config ARCH_SELECT_MEMORY_MODEL !! 1066 config CEVT_DS1287
308 def_bool ARCH_SPARSEMEM_ENABLE !! 1067 bool
>> 1068
>> 1069 config CEVT_GT641XX
>> 1070 bool
>> 1071
>> 1072 config CEVT_R4K
>> 1073 bool
>> 1074
>> 1075 config CEVT_SB1250
>> 1076 bool
>> 1077
>> 1078 config CEVT_TXX9
>> 1079 bool
>> 1080
>> 1081 config CSRC_BCM1480
>> 1082 bool
>> 1083
>> 1084 config CSRC_IOASIC
>> 1085 bool
>> 1086
>> 1087 config CSRC_R4K
>> 1088 bool
>> 1089
>> 1090 config CSRC_SB1250
>> 1091 bool
>> 1092
>> 1093 config MIPS_CLOCK_VSYSCALL
>> 1094 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1095
>> 1096 config GPIO_TXX9
>> 1097 select GPIOLIB
>> 1098 bool
>> 1099
>> 1100 config FW_CFE
>> 1101 bool
>> 1102
>> 1103 config ARCH_DMA_ADDR_T_64BIT
>> 1104 def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
309 1105
310 config ARCH_SUPPORTS_UPROBES 1106 config ARCH_SUPPORTS_UPROBES
311 def_bool y !! 1107 bool
312 1108
313 config STACKTRACE_SUPPORT !! 1109 config DMA_MAYBE_COHERENT
314 def_bool y !! 1110 select DMA_NONCOHERENT
>> 1111 bool
315 1112
316 config GENERIC_BUG !! 1113 config DMA_PERDEV_COHERENT
317 def_bool y !! 1114 bool
318 depends on BUG !! 1115 select DMA_MAYBE_COHERENT
319 select GENERIC_BUG_RELATIVE_POINTERS i <<
320 1116
321 config GENERIC_BUG_RELATIVE_POINTERS !! 1117 config DMA_COHERENT
322 bool 1118 bool
323 1119
324 config GENERIC_CALIBRATE_DELAY !! 1120 config DMA_NONCOHERENT
325 def_bool y !! 1121 bool
>> 1122 select NEED_DMA_MAP_STATE
326 1123
327 config GENERIC_CSUM !! 1124 config NEED_DMA_MAP_STATE
328 def_bool y !! 1125 bool
329 1126
330 config GENERIC_HWEIGHT !! 1127 config SYS_HAS_EARLY_PRINTK
331 def_bool y !! 1128 bool
332 1129
333 config FIX_EARLYCON_MEM !! 1130 config SYS_SUPPORTS_HOTPLUG_CPU
334 def_bool MMU !! 1131 bool
335 1132
336 config ILLEGAL_POINTER_VALUE !! 1133 config MIPS_BONITO64
337 hex !! 1134 bool
338 default 0 if 32BIT <<
339 default 0xdead000000000000 if 64BIT <<
340 1135
341 config PGTABLE_LEVELS !! 1136 config MIPS_MSC
342 int !! 1137 bool
343 default 5 if 64BIT <<
344 default 2 <<
345 1138
346 config LOCKDEP_SUPPORT !! 1139 config MIPS_NILE4
347 def_bool y !! 1140 bool
348 1141
349 config RISCV_DMA_NONCOHERENT !! 1142 config SYNC_R4K
350 bool 1143 bool
351 select ARCH_HAS_DMA_PREP_COHERENT <<
352 select ARCH_HAS_SETUP_DMA_OPS <<
353 select ARCH_HAS_SYNC_DMA_FOR_CPU <<
354 select ARCH_HAS_SYNC_DMA_FOR_DEVICE <<
355 select DMA_BOUNCE_UNALIGNED_KMALLOC if <<
356 1144
357 config RISCV_NONSTANDARD_CACHE_OPS !! 1145 config MIPS_MACHINE
>> 1146 def_bool n
>> 1147
>> 1148 config NO_IOPORT_MAP
>> 1149 def_bool n
>> 1150
>> 1151 config GENERIC_CSUM
358 bool 1152 bool
359 help <<
360 This enables function pointer suppor <<
361 systems to handle cache management. <<
362 1153
363 config AS_HAS_INSN !! 1154 config GENERIC_ISA_DMA
364 def_bool $(as-instr,.insn r 51$(comma) !! 1155 bool
>> 1156 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1157 select ISA_DMA_API
365 1158
366 config AS_HAS_OPTION_ARCH !! 1159 config GENERIC_ISA_DMA_SUPPORT_BROKEN
367 # https://github.com/llvm/llvm-project !! 1160 bool
368 def_bool y !! 1161 select GENERIC_ISA_DMA
369 depends on $(as-instr, .option arch$(c <<
370 1162
371 source "arch/riscv/Kconfig.socs" !! 1163 config ISA_DMA_API
372 source "arch/riscv/Kconfig.errata" !! 1164 bool
373 1165
374 menu "Platform type" !! 1166 config HOLES_IN_ZONE
>> 1167 bool
375 1168
376 config NONPORTABLE !! 1169 config SYS_SUPPORTS_RELOCATABLE
377 bool "Allow configurations that result !! 1170 bool
378 help 1171 help
379 RISC-V kernel binaries are compatibl !! 1172 Selected if the platform supports relocating the kernel.
380 whenever possible, but there are som !! 1173 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
381 satisfied by configurations that res !! 1174 to allow access to command line and entropy sources.
382 not portable between systems. <<
383 1175
384 Selecting N does not guarantee kerne !! 1176 config MIPS_CBPF_JIT
385 systems. Selecting any of the optio !! 1177 def_bool y
386 result in kernel binaries that are u !! 1178 depends on BPF_JIT && HAVE_CBPF_JIT
387 systems. <<
388 1179
389 If unsure, say N. !! 1180 config MIPS_EBPF_JIT
>> 1181 def_bool y
>> 1182 depends on BPF_JIT && HAVE_EBPF_JIT
390 1183
>> 1184
>> 1185 #
>> 1186 # Endianness selection. Sufficiently obscure so many users don't know what to
>> 1187 # answer,so we try hard to limit the available choices. Also the use of a
>> 1188 # choice statement should be more obvious to the user.
>> 1189 #
391 choice 1190 choice
392 prompt "Base ISA" !! 1191 prompt "Endianness selection"
393 default ARCH_RV64I <<
394 help 1192 help
395 This selects the base ISA that this !! 1193 Some MIPS machines can be configured for either little or big endian
396 the target platform. !! 1194 byte order. These modes require different kernels and a different
397 !! 1195 Linux distribution. In general there is one preferred byteorder for a
398 config ARCH_RV32I !! 1196 particular system but some systems are just as commonly used in the
399 bool "RV32I" !! 1197 one or the other endianness.
400 depends on NONPORTABLE !! 1198
401 select 32BIT !! 1199 config CPU_BIG_ENDIAN
402 select GENERIC_LIB_ASHLDI3 !! 1200 bool "Big endian"
403 select GENERIC_LIB_ASHRDI3 !! 1201 depends on SYS_SUPPORTS_BIG_ENDIAN
404 select GENERIC_LIB_LSHRDI3 !! 1202
405 select GENERIC_LIB_UCMPDI2 !! 1203 config CPU_LITTLE_ENDIAN
406 !! 1204 bool "Little endian"
407 config ARCH_RV64I !! 1205 depends on SYS_SUPPORTS_LITTLE_ENDIAN
408 bool "RV64I" <<
409 select 64BIT <<
410 select ARCH_SUPPORTS_INT128 if CC_HAS_ <<
411 select SWIOTLB if MMU <<
412 1206
413 endchoice 1207 endchoice
414 1208
415 # We must be able to map all physical memory i !! 1209 config EXPORT_UASM
416 # is still a bit more efficient when generatin !! 1210 bool
417 # such that it can only map 2GiB of memory. <<
418 choice <<
419 prompt "Kernel Code Model" <<
420 default CMODEL_MEDLOW if 32BIT <<
421 default CMODEL_MEDANY if 64BIT <<
422 <<
423 config CMODEL_MEDLOW <<
424 bool "medium low code model" <<
425 config CMODEL_MEDANY <<
426 bool "medium any code model" <<
427 endchoice <<
428 1211
429 config MODULE_SECTIONS !! 1212 config SYS_SUPPORTS_APM_EMULATION
430 bool 1213 bool
431 select HAVE_MOD_ARCH_SPECIFIC <<
432 1214
433 config SMP !! 1215 config SYS_SUPPORTS_BIG_ENDIAN
434 bool "Symmetric Multi-Processing" !! 1216 bool
435 help <<
436 This enables support for systems wit <<
437 you say N here, the kernel will run <<
438 multiprocessor machines, but will us <<
439 multiprocessor machine. If you say Y <<
440 on many, but not all, single process <<
441 processor machine, the kernel will r <<
442 here. <<
443 1217
444 If you don't know what to do here, s !! 1218 config SYS_SUPPORTS_LITTLE_ENDIAN
>> 1219 bool
445 1220
446 config SCHED_MC !! 1221 config SYS_SUPPORTS_HUGETLBFS
447 bool "Multi-core scheduler support" !! 1222 bool
448 depends on SMP !! 1223 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
449 help !! 1224 default y
450 Multi-core scheduler support improve <<
451 making when dealing with multi-core <<
452 increased overhead in some places. I <<
453 1225
454 config NR_CPUS !! 1226 config MIPS_HUGE_TLB_SUPPORT
455 int "Maximum number of CPUs (2-512)" !! 1227 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
456 depends on SMP <<
457 range 2 512 if !RISCV_SBI_V01 <<
458 range 2 32 if RISCV_SBI_V01 && 32BIT <<
459 range 2 64 if RISCV_SBI_V01 && 64BIT <<
460 default "32" if 32BIT <<
461 default "64" if 64BIT <<
462 1228
463 config HOTPLUG_CPU !! 1229 config IRQ_CPU_RM7K
464 bool "Support for hot-pluggable CPUs" !! 1230 bool
465 depends on SMP <<
466 select GENERIC_IRQ_MIGRATION <<
467 help <<
468 1231
469 Say Y here to experiment with turnin !! 1232 config IRQ_MSP_SLP
470 can be controlled through /sys/devic !! 1233 bool
471 1234
472 Say N if you want to disable CPU hot !! 1235 config IRQ_MSP_CIC
>> 1236 bool
473 1237
474 choice !! 1238 config IRQ_TXX9
475 prompt "CPU Tuning" !! 1239 bool
476 default TUNE_GENERIC <<
477 1240
478 config TUNE_GENERIC !! 1241 config IRQ_GT641XX
479 bool "generic" !! 1242 bool
480 1243
481 endchoice !! 1244 config PCI_GT64XXX_PCI0
>> 1245 bool
482 1246
483 # Common NUMA Features !! 1247 config NO_EXCEPT_FILL
484 config NUMA !! 1248 bool
485 bool "NUMA Memory Allocation and Sched <<
486 depends on SMP && MMU <<
487 select ARCH_SUPPORTS_NUMA_BALANCING <<
488 select GENERIC_ARCH_NUMA <<
489 select HAVE_SETUP_PER_CPU_AREA <<
490 select NEED_PER_CPU_EMBED_FIRST_CHUNK <<
491 select NEED_PER_CPU_PAGE_FIRST_CHUNK <<
492 select OF_NUMA <<
493 select USE_PERCPU_NUMA_NODE_ID <<
494 help <<
495 Enable NUMA (Non-Uniform Memory Acce <<
496 1249
497 The kernel will try to allocate memo !! 1250 config SOC_EMMA2RH
498 local memory of the CPU and add some !! 1251 bool
>> 1252 select CEVT_R4K
>> 1253 select CSRC_R4K
>> 1254 select DMA_NONCOHERENT
>> 1255 select IRQ_MIPS_CPU
>> 1256 select SWAP_IO_SPACE
>> 1257 select SYS_HAS_CPU_R5500
>> 1258 select SYS_SUPPORTS_32BIT_KERNEL
>> 1259 select SYS_SUPPORTS_64BIT_KERNEL
>> 1260 select SYS_SUPPORTS_BIG_ENDIAN
499 1261
500 config NODES_SHIFT !! 1262 config SOC_PNX833X
501 int "Maximum NUMA Nodes (as a power of !! 1263 bool
502 range 1 10 !! 1264 select CEVT_R4K
503 default "2" !! 1265 select CSRC_R4K
504 depends on NUMA !! 1266 select IRQ_MIPS_CPU
505 help !! 1267 select DMA_NONCOHERENT
506 Specify the maximum number of NUMA N !! 1268 select SYS_HAS_CPU_MIPS32_R2
507 system. Increases memory reserved t !! 1269 select SYS_SUPPORTS_32BIT_KERNEL
>> 1270 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1271 select SYS_SUPPORTS_BIG_ENDIAN
>> 1272 select SYS_SUPPORTS_MIPS16
>> 1273 select CPU_MIPSR2_IRQ_VI
508 1274
509 config RISCV_ALTERNATIVE !! 1275 config SOC_PNX8335
510 bool 1276 bool
511 depends on !XIP_KERNEL !! 1277 select SOC_PNX833X
512 help <<
513 This Kconfig allows the kernel to au <<
514 erratum or cpufeature required by th <<
515 time. The code patching overhead is <<
516 once at boot and once on each module <<
517 1278
518 config RISCV_ALTERNATIVE_EARLY !! 1279 config MIPS_SPRAM
>> 1280 bool
>> 1281
>> 1282 config SWAP_IO_SPACE
519 bool 1283 bool
520 depends on RISCV_ALTERNATIVE <<
521 help <<
522 Allows early patching of the kernel <<
523 1284
524 config RISCV_ISA_C !! 1285 config SGI_HAS_INDYDOG
525 bool "Emit compressed instructions whe !! 1286 bool
>> 1287
>> 1288 config SGI_HAS_HAL2
>> 1289 bool
>> 1290
>> 1291 config SGI_HAS_SEEQ
>> 1292 bool
>> 1293
>> 1294 config SGI_HAS_WD93
>> 1295 bool
>> 1296
>> 1297 config SGI_HAS_ZILOG
>> 1298 bool
>> 1299
>> 1300 config SGI_HAS_I8042
>> 1301 bool
>> 1302
>> 1303 config DEFAULT_SGI_PARTITION
>> 1304 bool
>> 1305
>> 1306 config FW_ARC32
>> 1307 bool
>> 1308
>> 1309 config FW_SNIPROM
>> 1310 bool
>> 1311
>> 1312 config BOOT_ELF32
>> 1313 bool
>> 1314
>> 1315 config MIPS_L1_CACHE_SHIFT_4
>> 1316 bool
>> 1317
>> 1318 config MIPS_L1_CACHE_SHIFT_5
>> 1319 bool
>> 1320
>> 1321 config MIPS_L1_CACHE_SHIFT_6
>> 1322 bool
>> 1323
>> 1324 config MIPS_L1_CACHE_SHIFT_7
>> 1325 bool
>> 1326
>> 1327 config MIPS_L1_CACHE_SHIFT
>> 1328 int
>> 1329 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1330 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1331 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1332 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1333 default "5"
>> 1334
>> 1335 config HAVE_STD_PC_SERIAL_PORT
>> 1336 bool
>> 1337
>> 1338 config ARC_CONSOLE
>> 1339 bool "ARC console support"
>> 1340 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1341
>> 1342 config ARC_MEMORY
>> 1343 bool
>> 1344 depends on MACH_JAZZ || SNI_RM || SGI_IP32
>> 1345 default y
>> 1346
>> 1347 config ARC_PROMLIB
>> 1348 bool
>> 1349 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
526 default y 1350 default y
>> 1351
>> 1352 config FW_ARC64
>> 1353 bool
>> 1354
>> 1355 config BOOT_ELF64
>> 1356 bool
>> 1357
>> 1358 menu "CPU selection"
>> 1359
>> 1360 choice
>> 1361 prompt "CPU type"
>> 1362 default CPU_R4X00
>> 1363
>> 1364 config CPU_LOONGSON3
>> 1365 bool "Loongson 3 CPU"
>> 1366 depends on SYS_HAS_CPU_LOONGSON3
>> 1367 select CPU_SUPPORTS_64BIT_KERNEL
>> 1368 select CPU_SUPPORTS_HIGHMEM
>> 1369 select CPU_SUPPORTS_HUGEPAGES
>> 1370 select WEAK_ORDERING
>> 1371 select WEAK_REORDERING_BEYOND_LLSC
>> 1372 select MIPS_PGD_C0_CONTEXT
>> 1373 select MIPS_L1_CACHE_SHIFT_6
>> 1374 select GPIOLIB
527 help 1375 help
528 Adds "C" to the ISA subsets that the !! 1376 The Loongson 3 processor implements the MIPS64R2 instruction
529 when building Linux, which results i !! 1377 set with many extensions.
530 Linux binary. <<
531 1378
532 If you don't know what to do here, s !! 1379 config LOONGSON3_ENHANCEMENT
>> 1380 bool "New Loongson 3 CPU Enhancements"
>> 1381 default n
>> 1382 select CPU_MIPSR2
>> 1383 select CPU_HAS_PREFETCH
>> 1384 depends on CPU_LOONGSON3
>> 1385 help
>> 1386 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1387 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1388 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1389 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1390 Fast TLB refill support, etc.
>> 1391
>> 1392 This option enable those enhancements which are not probed at run
>> 1393 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1394 please say 'N' here. If you want a high-performance kernel to run on
>> 1395 new Loongson 3 machines only, please say 'Y' here.
>> 1396
>> 1397 config CPU_LOONGSON2E
>> 1398 bool "Loongson 2E"
>> 1399 depends on SYS_HAS_CPU_LOONGSON2E
>> 1400 select CPU_LOONGSON2
>> 1401 help
>> 1402 The Loongson 2E processor implements the MIPS III instruction set
>> 1403 with many extensions.
>> 1404
>> 1405 It has an internal FPGA northbridge, which is compatible to
>> 1406 bonito64.
>> 1407
>> 1408 config CPU_LOONGSON2F
>> 1409 bool "Loongson 2F"
>> 1410 depends on SYS_HAS_CPU_LOONGSON2F
>> 1411 select CPU_LOONGSON2
>> 1412 select GPIOLIB
>> 1413 help
>> 1414 The Loongson 2F processor implements the MIPS III instruction set
>> 1415 with many extensions.
>> 1416
>> 1417 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1418 have a similar programming interface with FPGA northbridge used in
>> 1419 Loongson2E.
>> 1420
>> 1421 config CPU_LOONGSON1B
>> 1422 bool "Loongson 1B"
>> 1423 depends on SYS_HAS_CPU_LOONGSON1B
>> 1424 select CPU_LOONGSON1
>> 1425 select LEDS_GPIO_REGISTER
>> 1426 help
>> 1427 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1428 release 2 instruction set.
>> 1429
>> 1430 config CPU_LOONGSON1C
>> 1431 bool "Loongson 1C"
>> 1432 depends on SYS_HAS_CPU_LOONGSON1C
>> 1433 select CPU_LOONGSON1
>> 1434 select LEDS_GPIO_REGISTER
>> 1435 help
>> 1436 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1437 release 2 instruction set.
>> 1438
>> 1439 config CPU_MIPS32_R1
>> 1440 bool "MIPS32 Release 1"
>> 1441 depends on SYS_HAS_CPU_MIPS32_R1
>> 1442 select CPU_HAS_PREFETCH
>> 1443 select CPU_SUPPORTS_32BIT_KERNEL
>> 1444 select CPU_SUPPORTS_HIGHMEM
>> 1445 help
>> 1446 Choose this option to build a kernel for release 1 or later of the
>> 1447 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1448 MIPS processor are based on a MIPS32 processor. If you know the
>> 1449 specific type of processor in your system, choose those that one
>> 1450 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1451 Release 2 of the MIPS32 architecture is available since several
>> 1452 years so chances are you even have a MIPS32 Release 2 processor
>> 1453 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1454 performance.
>> 1455
>> 1456 config CPU_MIPS32_R2
>> 1457 bool "MIPS32 Release 2"
>> 1458 depends on SYS_HAS_CPU_MIPS32_R2
>> 1459 select CPU_HAS_PREFETCH
>> 1460 select CPU_SUPPORTS_32BIT_KERNEL
>> 1461 select CPU_SUPPORTS_HIGHMEM
>> 1462 select CPU_SUPPORTS_MSA
>> 1463 select HAVE_KVM
>> 1464 help
>> 1465 Choose this option to build a kernel for release 2 or later of the
>> 1466 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1467 MIPS processor are based on a MIPS32 processor. If you know the
>> 1468 specific type of processor in your system, choose those that one
>> 1469 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1470
>> 1471 config CPU_MIPS32_R6
>> 1472 bool "MIPS32 Release 6"
>> 1473 depends on SYS_HAS_CPU_MIPS32_R6
>> 1474 select CPU_HAS_PREFETCH
>> 1475 select CPU_SUPPORTS_32BIT_KERNEL
>> 1476 select CPU_SUPPORTS_HIGHMEM
>> 1477 select CPU_SUPPORTS_MSA
>> 1478 select GENERIC_CSUM
>> 1479 select HAVE_KVM
>> 1480 select MIPS_O32_FP64_SUPPORT
>> 1481 help
>> 1482 Choose this option to build a kernel for release 6 or later of the
>> 1483 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1484 family, are based on a MIPS32r6 processor. If you own an older
>> 1485 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1486
>> 1487 config CPU_MIPS64_R1
>> 1488 bool "MIPS64 Release 1"
>> 1489 depends on SYS_HAS_CPU_MIPS64_R1
>> 1490 select CPU_HAS_PREFETCH
>> 1491 select CPU_SUPPORTS_32BIT_KERNEL
>> 1492 select CPU_SUPPORTS_64BIT_KERNEL
>> 1493 select CPU_SUPPORTS_HIGHMEM
>> 1494 select CPU_SUPPORTS_HUGEPAGES
>> 1495 help
>> 1496 Choose this option to build a kernel for release 1 or later of the
>> 1497 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1498 MIPS processor are based on a MIPS64 processor. If you know the
>> 1499 specific type of processor in your system, choose those that one
>> 1500 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1501 Release 2 of the MIPS64 architecture is available since several
>> 1502 years so chances are you even have a MIPS64 Release 2 processor
>> 1503 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1504 performance.
>> 1505
>> 1506 config CPU_MIPS64_R2
>> 1507 bool "MIPS64 Release 2"
>> 1508 depends on SYS_HAS_CPU_MIPS64_R2
>> 1509 select CPU_HAS_PREFETCH
>> 1510 select CPU_SUPPORTS_32BIT_KERNEL
>> 1511 select CPU_SUPPORTS_64BIT_KERNEL
>> 1512 select CPU_SUPPORTS_HIGHMEM
>> 1513 select CPU_SUPPORTS_HUGEPAGES
>> 1514 select CPU_SUPPORTS_MSA
>> 1515 select HAVE_KVM
>> 1516 help
>> 1517 Choose this option to build a kernel for release 2 or later of the
>> 1518 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1519 MIPS processor are based on a MIPS64 processor. If you know the
>> 1520 specific type of processor in your system, choose those that one
>> 1521 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1522
>> 1523 config CPU_MIPS64_R6
>> 1524 bool "MIPS64 Release 6"
>> 1525 depends on SYS_HAS_CPU_MIPS64_R6
>> 1526 select CPU_HAS_PREFETCH
>> 1527 select CPU_SUPPORTS_32BIT_KERNEL
>> 1528 select CPU_SUPPORTS_64BIT_KERNEL
>> 1529 select CPU_SUPPORTS_HIGHMEM
>> 1530 select CPU_SUPPORTS_MSA
>> 1531 select GENERIC_CSUM
>> 1532 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1533 select HAVE_KVM
>> 1534 help
>> 1535 Choose this option to build a kernel for release 6 or later of the
>> 1536 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1537 family, are based on a MIPS64r6 processor. If you own an older
>> 1538 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1539
>> 1540 config CPU_R3000
>> 1541 bool "R3000"
>> 1542 depends on SYS_HAS_CPU_R3000
>> 1543 select CPU_HAS_WB
>> 1544 select CPU_SUPPORTS_32BIT_KERNEL
>> 1545 select CPU_SUPPORTS_HIGHMEM
>> 1546 help
>> 1547 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1548 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1549 *not* work on R4000 machines and vice versa. However, since most
>> 1550 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1551 might be a safe bet. If the resulting kernel does not work,
>> 1552 try to recompile with R3000.
>> 1553
>> 1554 config CPU_TX39XX
>> 1555 bool "R39XX"
>> 1556 depends on SYS_HAS_CPU_TX39XX
>> 1557 select CPU_SUPPORTS_32BIT_KERNEL
>> 1558
>> 1559 config CPU_VR41XX
>> 1560 bool "R41xx"
>> 1561 depends on SYS_HAS_CPU_VR41XX
>> 1562 select CPU_SUPPORTS_32BIT_KERNEL
>> 1563 select CPU_SUPPORTS_64BIT_KERNEL
>> 1564 help
>> 1565 The options selects support for the NEC VR4100 series of processors.
>> 1566 Only choose this option if you have one of these processors as a
>> 1567 kernel built with this option will not run on any other type of
>> 1568 processor or vice versa.
>> 1569
>> 1570 config CPU_R4300
>> 1571 bool "R4300"
>> 1572 depends on SYS_HAS_CPU_R4300
>> 1573 select CPU_SUPPORTS_32BIT_KERNEL
>> 1574 select CPU_SUPPORTS_64BIT_KERNEL
>> 1575 help
>> 1576 MIPS Technologies R4300-series processors.
>> 1577
>> 1578 config CPU_R4X00
>> 1579 bool "R4x00"
>> 1580 depends on SYS_HAS_CPU_R4X00
>> 1581 select CPU_SUPPORTS_32BIT_KERNEL
>> 1582 select CPU_SUPPORTS_64BIT_KERNEL
>> 1583 select CPU_SUPPORTS_HUGEPAGES
>> 1584 help
>> 1585 MIPS Technologies R4000-series processors other than 4300, including
>> 1586 the R4000, R4400, R4600, and 4700.
>> 1587
>> 1588 config CPU_TX49XX
>> 1589 bool "R49XX"
>> 1590 depends on SYS_HAS_CPU_TX49XX
>> 1591 select CPU_HAS_PREFETCH
>> 1592 select CPU_SUPPORTS_32BIT_KERNEL
>> 1593 select CPU_SUPPORTS_64BIT_KERNEL
>> 1594 select CPU_SUPPORTS_HUGEPAGES
>> 1595
>> 1596 config CPU_R5000
>> 1597 bool "R5000"
>> 1598 depends on SYS_HAS_CPU_R5000
>> 1599 select CPU_SUPPORTS_32BIT_KERNEL
>> 1600 select CPU_SUPPORTS_64BIT_KERNEL
>> 1601 select CPU_SUPPORTS_HUGEPAGES
>> 1602 help
>> 1603 MIPS Technologies R5000-series processors other than the Nevada.
>> 1604
>> 1605 config CPU_R5432
>> 1606 bool "R5432"
>> 1607 depends on SYS_HAS_CPU_R5432
>> 1608 select CPU_SUPPORTS_32BIT_KERNEL
>> 1609 select CPU_SUPPORTS_64BIT_KERNEL
>> 1610 select CPU_SUPPORTS_HUGEPAGES
>> 1611
>> 1612 config CPU_R5500
>> 1613 bool "R5500"
>> 1614 depends on SYS_HAS_CPU_R5500
>> 1615 select CPU_SUPPORTS_32BIT_KERNEL
>> 1616 select CPU_SUPPORTS_64BIT_KERNEL
>> 1617 select CPU_SUPPORTS_HUGEPAGES
>> 1618 help
>> 1619 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1620 instruction set.
>> 1621
>> 1622 config CPU_NEVADA
>> 1623 bool "RM52xx"
>> 1624 depends on SYS_HAS_CPU_NEVADA
>> 1625 select CPU_SUPPORTS_32BIT_KERNEL
>> 1626 select CPU_SUPPORTS_64BIT_KERNEL
>> 1627 select CPU_SUPPORTS_HUGEPAGES
>> 1628 help
>> 1629 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1630
>> 1631 config CPU_R8000
>> 1632 bool "R8000"
>> 1633 depends on SYS_HAS_CPU_R8000
>> 1634 select CPU_HAS_PREFETCH
>> 1635 select CPU_SUPPORTS_64BIT_KERNEL
>> 1636 help
>> 1637 MIPS Technologies R8000 processors. Note these processors are
>> 1638 uncommon and the support for them is incomplete.
>> 1639
>> 1640 config CPU_R10000
>> 1641 bool "R10000"
>> 1642 depends on SYS_HAS_CPU_R10000
>> 1643 select CPU_HAS_PREFETCH
>> 1644 select CPU_SUPPORTS_32BIT_KERNEL
>> 1645 select CPU_SUPPORTS_64BIT_KERNEL
>> 1646 select CPU_SUPPORTS_HIGHMEM
>> 1647 select CPU_SUPPORTS_HUGEPAGES
>> 1648 help
>> 1649 MIPS Technologies R10000-series processors.
>> 1650
>> 1651 config CPU_RM7000
>> 1652 bool "RM7000"
>> 1653 depends on SYS_HAS_CPU_RM7000
>> 1654 select CPU_HAS_PREFETCH
>> 1655 select CPU_SUPPORTS_32BIT_KERNEL
>> 1656 select CPU_SUPPORTS_64BIT_KERNEL
>> 1657 select CPU_SUPPORTS_HIGHMEM
>> 1658 select CPU_SUPPORTS_HUGEPAGES
>> 1659
>> 1660 config CPU_SB1
>> 1661 bool "SB1"
>> 1662 depends on SYS_HAS_CPU_SB1
>> 1663 select CPU_SUPPORTS_32BIT_KERNEL
>> 1664 select CPU_SUPPORTS_64BIT_KERNEL
>> 1665 select CPU_SUPPORTS_HIGHMEM
>> 1666 select CPU_SUPPORTS_HUGEPAGES
>> 1667 select WEAK_ORDERING
>> 1668
>> 1669 config CPU_CAVIUM_OCTEON
>> 1670 bool "Cavium Octeon processor"
>> 1671 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1672 select CPU_HAS_PREFETCH
>> 1673 select CPU_SUPPORTS_64BIT_KERNEL
>> 1674 select WEAK_ORDERING
>> 1675 select CPU_SUPPORTS_HIGHMEM
>> 1676 select CPU_SUPPORTS_HUGEPAGES
>> 1677 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1678 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1679 select MIPS_L1_CACHE_SHIFT_7
>> 1680 select HAVE_KVM
>> 1681 help
>> 1682 The Cavium Octeon processor is a highly integrated chip containing
>> 1683 many ethernet hardware widgets for networking tasks. The processor
>> 1684 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1685 Full details can be found at http://www.caviumnetworks.com.
>> 1686
>> 1687 config CPU_BMIPS
>> 1688 bool "Broadcom BMIPS"
>> 1689 depends on SYS_HAS_CPU_BMIPS
>> 1690 select CPU_MIPS32
>> 1691 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1692 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1693 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1694 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1695 select CPU_SUPPORTS_32BIT_KERNEL
>> 1696 select DMA_NONCOHERENT
>> 1697 select IRQ_MIPS_CPU
>> 1698 select SWAP_IO_SPACE
>> 1699 select WEAK_ORDERING
>> 1700 select CPU_SUPPORTS_HIGHMEM
>> 1701 select CPU_HAS_PREFETCH
>> 1702 select CPU_SUPPORTS_CPUFREQ
>> 1703 select MIPS_EXTERNAL_TIMER
>> 1704 help
>> 1705 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1706
>> 1707 config CPU_XLR
>> 1708 bool "Netlogic XLR SoC"
>> 1709 depends on SYS_HAS_CPU_XLR
>> 1710 select CPU_SUPPORTS_32BIT_KERNEL
>> 1711 select CPU_SUPPORTS_64BIT_KERNEL
>> 1712 select CPU_SUPPORTS_HIGHMEM
>> 1713 select CPU_SUPPORTS_HUGEPAGES
>> 1714 select WEAK_ORDERING
>> 1715 select WEAK_REORDERING_BEYOND_LLSC
>> 1716 help
>> 1717 Netlogic Microsystems XLR/XLS processors.
>> 1718
>> 1719 config CPU_XLP
>> 1720 bool "Netlogic XLP SoC"
>> 1721 depends on SYS_HAS_CPU_XLP
>> 1722 select CPU_SUPPORTS_32BIT_KERNEL
>> 1723 select CPU_SUPPORTS_64BIT_KERNEL
>> 1724 select CPU_SUPPORTS_HIGHMEM
>> 1725 select WEAK_ORDERING
>> 1726 select WEAK_REORDERING_BEYOND_LLSC
>> 1727 select CPU_HAS_PREFETCH
>> 1728 select CPU_MIPSR2
>> 1729 select CPU_SUPPORTS_HUGEPAGES
>> 1730 select MIPS_ASID_BITS_VARIABLE
>> 1731 help
>> 1732 Netlogic Microsystems XLP processors.
>> 1733 endchoice
533 1734
534 config RISCV_ISA_SVNAPOT !! 1735 config CPU_MIPS32_3_5_FEATURES
535 bool "Svnapot extension support for su !! 1736 bool "MIPS32 Release 3.5 Features"
536 depends on 64BIT && MMU !! 1737 depends on SYS_HAS_CPU_MIPS32_R3_5
537 depends on RISCV_ALTERNATIVE !! 1738 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
538 default y !! 1739 help
>> 1740 Choose this option to build a kernel for release 2 or later of the
>> 1741 MIPS32 architecture including features from the 3.5 release such as
>> 1742 support for Enhanced Virtual Addressing (EVA).
>> 1743
>> 1744 config CPU_MIPS32_3_5_EVA
>> 1745 bool "Enhanced Virtual Addressing (EVA)"
>> 1746 depends on CPU_MIPS32_3_5_FEATURES
>> 1747 select EVA
>> 1748 default y
>> 1749 help
>> 1750 Choose this option if you want to enable the Enhanced Virtual
>> 1751 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1752 One of its primary benefits is an increase in the maximum size
>> 1753 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1754
>> 1755 config CPU_MIPS32_R5_FEATURES
>> 1756 bool "MIPS32 Release 5 Features"
>> 1757 depends on SYS_HAS_CPU_MIPS32_R5
>> 1758 depends on CPU_MIPS32_R2
>> 1759 help
>> 1760 Choose this option to build a kernel for release 2 or later of the
>> 1761 MIPS32 architecture including features from release 5 such as
>> 1762 support for Extended Physical Addressing (XPA).
>> 1763
>> 1764 config CPU_MIPS32_R5_XPA
>> 1765 bool "Extended Physical Addressing (XPA)"
>> 1766 depends on CPU_MIPS32_R5_FEATURES
>> 1767 depends on !EVA
>> 1768 depends on !PAGE_SIZE_4KB
>> 1769 depends on SYS_SUPPORTS_HIGHMEM
>> 1770 select XPA
>> 1771 select HIGHMEM
>> 1772 select ARCH_PHYS_ADDR_T_64BIT
>> 1773 default n
539 help 1774 help
540 Allow kernel to detect the Svnapot I !! 1775 Choose this option if you want to enable the Extended Physical
541 time and enable its usage. !! 1776 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1777 benefit is to increase physical addressing equal to or greater
>> 1778 than 40 bits. Note that this has the side effect of turning on
>> 1779 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1780 If unsure, say 'N' here.
542 1781
543 The Svnapot extension is used to mar !! 1782 if CPU_LOONGSON2F
544 of contiguous virtual-to-physical tr !! 1783 config CPU_NOP_WORKAROUNDS
545 aligned power-of-2 (NAPOT) granulari !! 1784 bool
546 size. When HUGETLBFS is also selecte <<
547 allocates some memory for each NAPOT <<
548 When optimizing for low memory consu <<
549 the Svnapot extension, it may be bet <<
550 1785
551 If you don't know what to do here, s !! 1786 config CPU_JUMP_WORKAROUNDS
>> 1787 bool
552 1788
553 config RISCV_ISA_SVPBMT !! 1789 config CPU_LOONGSON2F_WORKAROUNDS
554 bool "Svpbmt extension support for sup !! 1790 bool "Loongson 2F Workarounds"
555 depends on 64BIT && MMU <<
556 depends on RISCV_ALTERNATIVE <<
557 default y 1791 default y
>> 1792 select CPU_NOP_WORKAROUNDS
>> 1793 select CPU_JUMP_WORKAROUNDS
558 help 1794 help
559 Adds support to dynamically detect !! 1795 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
560 ISA-extension (Supervisor-mode: pag !! 1796 require workarounds. Without workarounds the system may hang
561 enable its usage. !! 1797 unexpectedly. For more information please refer to the gas
>> 1798 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1799
>> 1800 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1801 are needed. The workarounds have no significant side effect on them
>> 1802 but may decrease the performance of the system so this option should
>> 1803 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1804 systems.
562 1805
563 The memory type for a page contains !! 1806 If unsure, please say Y.
564 that indicate the cacheability, ide !! 1807 endif # CPU_LOONGSON2F
565 properties for access to that page. <<
566 1808
567 The Svpbmt extension is only availa !! 1809 config SYS_SUPPORTS_ZBOOT
>> 1810 bool
>> 1811 select HAVE_KERNEL_GZIP
>> 1812 select HAVE_KERNEL_BZIP2
>> 1813 select HAVE_KERNEL_LZ4
>> 1814 select HAVE_KERNEL_LZMA
>> 1815 select HAVE_KERNEL_LZO
>> 1816 select HAVE_KERNEL_XZ
568 1817
569 If you don't know what to do here, !! 1818 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1819 bool
>> 1820 select SYS_SUPPORTS_ZBOOT
570 1821
571 config TOOLCHAIN_HAS_V !! 1822 config SYS_SUPPORTS_ZBOOT_UART_PROM
572 bool 1823 bool
573 default y !! 1824 select SYS_SUPPORTS_ZBOOT
574 depends on !64BIT || $(cc-option,-mabi !! 1825
575 depends on !32BIT || $(cc-option,-mabi !! 1826 config CPU_LOONGSON2
576 depends on LLD_VERSION >= 140000 || LD !! 1827 bool
577 depends on AS_HAS_OPTION_ARCH !! 1828 select CPU_SUPPORTS_32BIT_KERNEL
>> 1829 select CPU_SUPPORTS_64BIT_KERNEL
>> 1830 select CPU_SUPPORTS_HIGHMEM
>> 1831 select CPU_SUPPORTS_HUGEPAGES
578 1832
579 config RISCV_ISA_V !! 1833 config CPU_LOONGSON1
580 bool "VECTOR extension support" !! 1834 bool
581 depends on TOOLCHAIN_HAS_V !! 1835 select CPU_MIPS32
582 depends on FPU !! 1836 select CPU_MIPSR2
583 select DYNAMIC_SIGFRAME !! 1837 select CPU_HAS_PREFETCH
>> 1838 select CPU_SUPPORTS_32BIT_KERNEL
>> 1839 select CPU_SUPPORTS_HIGHMEM
>> 1840 select CPU_SUPPORTS_CPUFREQ
>> 1841
>> 1842 config CPU_BMIPS32_3300
>> 1843 select SMP_UP if SMP
>> 1844 bool
>> 1845
>> 1846 config CPU_BMIPS4350
>> 1847 bool
>> 1848 select SYS_SUPPORTS_SMP
>> 1849 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1850
>> 1851 config CPU_BMIPS4380
>> 1852 bool
>> 1853 select MIPS_L1_CACHE_SHIFT_6
>> 1854 select SYS_SUPPORTS_SMP
>> 1855 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1856 select CPU_HAS_RIXI
>> 1857
>> 1858 config CPU_BMIPS5000
>> 1859 bool
>> 1860 select MIPS_CPU_SCACHE
>> 1861 select MIPS_L1_CACHE_SHIFT_7
>> 1862 select SYS_SUPPORTS_SMP
>> 1863 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1864 select CPU_HAS_RIXI
>> 1865
>> 1866 config SYS_HAS_CPU_LOONGSON3
>> 1867 bool
>> 1868 select CPU_SUPPORTS_CPUFREQ
>> 1869 select CPU_HAS_RIXI
>> 1870
>> 1871 config SYS_HAS_CPU_LOONGSON2E
>> 1872 bool
>> 1873
>> 1874 config SYS_HAS_CPU_LOONGSON2F
>> 1875 bool
>> 1876 select CPU_SUPPORTS_CPUFREQ
>> 1877 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1878 select CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 1879
>> 1880 config SYS_HAS_CPU_LOONGSON1B
>> 1881 bool
>> 1882
>> 1883 config SYS_HAS_CPU_LOONGSON1C
>> 1884 bool
>> 1885
>> 1886 config SYS_HAS_CPU_MIPS32_R1
>> 1887 bool
>> 1888
>> 1889 config SYS_HAS_CPU_MIPS32_R2
>> 1890 bool
>> 1891
>> 1892 config SYS_HAS_CPU_MIPS32_R3_5
>> 1893 bool
>> 1894
>> 1895 config SYS_HAS_CPU_MIPS32_R5
>> 1896 bool
>> 1897
>> 1898 config SYS_HAS_CPU_MIPS32_R6
>> 1899 bool
>> 1900
>> 1901 config SYS_HAS_CPU_MIPS64_R1
>> 1902 bool
>> 1903
>> 1904 config SYS_HAS_CPU_MIPS64_R2
>> 1905 bool
>> 1906
>> 1907 config SYS_HAS_CPU_MIPS64_R6
>> 1908 bool
>> 1909
>> 1910 config SYS_HAS_CPU_R3000
>> 1911 bool
>> 1912
>> 1913 config SYS_HAS_CPU_TX39XX
>> 1914 bool
>> 1915
>> 1916 config SYS_HAS_CPU_VR41XX
>> 1917 bool
>> 1918
>> 1919 config SYS_HAS_CPU_R4300
>> 1920 bool
>> 1921
>> 1922 config SYS_HAS_CPU_R4X00
>> 1923 bool
>> 1924
>> 1925 config SYS_HAS_CPU_TX49XX
>> 1926 bool
>> 1927
>> 1928 config SYS_HAS_CPU_R5000
>> 1929 bool
>> 1930
>> 1931 config SYS_HAS_CPU_R5432
>> 1932 bool
>> 1933
>> 1934 config SYS_HAS_CPU_R5500
>> 1935 bool
>> 1936
>> 1937 config SYS_HAS_CPU_NEVADA
>> 1938 bool
>> 1939
>> 1940 config SYS_HAS_CPU_R8000
>> 1941 bool
>> 1942
>> 1943 config SYS_HAS_CPU_R10000
>> 1944 bool
>> 1945
>> 1946 config SYS_HAS_CPU_RM7000
>> 1947 bool
>> 1948
>> 1949 config SYS_HAS_CPU_SB1
>> 1950 bool
>> 1951
>> 1952 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1953 bool
>> 1954
>> 1955 config SYS_HAS_CPU_BMIPS
>> 1956 bool
>> 1957
>> 1958 config SYS_HAS_CPU_BMIPS32_3300
>> 1959 bool
>> 1960 select SYS_HAS_CPU_BMIPS
>> 1961
>> 1962 config SYS_HAS_CPU_BMIPS4350
>> 1963 bool
>> 1964 select SYS_HAS_CPU_BMIPS
>> 1965
>> 1966 config SYS_HAS_CPU_BMIPS4380
>> 1967 bool
>> 1968 select SYS_HAS_CPU_BMIPS
>> 1969
>> 1970 config SYS_HAS_CPU_BMIPS5000
>> 1971 bool
>> 1972 select SYS_HAS_CPU_BMIPS
>> 1973
>> 1974 config SYS_HAS_CPU_XLR
>> 1975 bool
>> 1976
>> 1977 config SYS_HAS_CPU_XLP
>> 1978 bool
>> 1979
>> 1980 config MIPS_MALTA_PM
>> 1981 depends on MIPS_MALTA
>> 1982 depends on PCI
>> 1983 bool
584 default y 1984 default y
>> 1985
>> 1986 #
>> 1987 # CPU may reorder R->R, R->W, W->R, W->W
>> 1988 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 1989 #
>> 1990 config WEAK_ORDERING
>> 1991 bool
>> 1992
>> 1993 #
>> 1994 # CPU may reorder reads and writes beyond LL/SC
>> 1995 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 1996 #
>> 1997 config WEAK_REORDERING_BEYOND_LLSC
>> 1998 bool
>> 1999 endmenu
>> 2000
>> 2001 #
>> 2002 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2003 #
>> 2004 config CPU_MIPS32
>> 2005 bool
>> 2006 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 2007
>> 2008 config CPU_MIPS64
>> 2009 bool
>> 2010 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
>> 2011
>> 2012 #
>> 2013 # These two indicate the revision of the architecture, either Release 1 or Release 2
>> 2014 #
>> 2015 config CPU_MIPSR1
>> 2016 bool
>> 2017 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2018
>> 2019 config CPU_MIPSR2
>> 2020 bool
>> 2021 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2022 select CPU_HAS_RIXI
>> 2023 select MIPS_SPRAM
>> 2024
>> 2025 config CPU_MIPSR6
>> 2026 bool
>> 2027 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2028 select CPU_HAS_RIXI
>> 2029 select HAVE_ARCH_BITREVERSE
>> 2030 select MIPS_ASID_BITS_VARIABLE
>> 2031 select MIPS_SPRAM
>> 2032
>> 2033 config EVA
>> 2034 bool
>> 2035
>> 2036 config XPA
>> 2037 bool
>> 2038
>> 2039 config SYS_SUPPORTS_32BIT_KERNEL
>> 2040 bool
>> 2041 config SYS_SUPPORTS_64BIT_KERNEL
>> 2042 bool
>> 2043 config CPU_SUPPORTS_32BIT_KERNEL
>> 2044 bool
>> 2045 config CPU_SUPPORTS_64BIT_KERNEL
>> 2046 bool
>> 2047 config CPU_SUPPORTS_CPUFREQ
>> 2048 bool
>> 2049 config CPU_SUPPORTS_ADDRWINCFG
>> 2050 bool
>> 2051 config CPU_SUPPORTS_HUGEPAGES
>> 2052 bool
>> 2053 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2054 bool
>> 2055 config MIPS_PGD_C0_CONTEXT
>> 2056 bool
>> 2057 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
>> 2058
>> 2059 #
>> 2060 # Set to y for ptrace access to watch registers.
>> 2061 #
>> 2062 config HARDWARE_WATCHPOINTS
>> 2063 bool
>> 2064 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2065
>> 2066 menu "Kernel type"
>> 2067
>> 2068 choice
>> 2069 prompt "Kernel code model"
585 help 2070 help
586 Say N here if you want to disable al !! 2071 You should only select this option if you have a workload that
587 in the kernel. !! 2072 actually benefits from 64-bit processing or if your machine has
>> 2073 large memory. You will only be presented a single option in this
>> 2074 menu if your system does not support both 32-bit and 64-bit kernels.
588 2075
589 If you don't know what to do here, s !! 2076 config 32BIT
>> 2077 bool "32-bit kernel"
>> 2078 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2079 select TRAD_SIGNALS
>> 2080 help
>> 2081 Select this option if you want to build a 32-bit kernel.
590 2082
591 config RISCV_ISA_V_DEFAULT_ENABLE !! 2083 config 64BIT
592 bool "Enable userspace Vector by defau !! 2084 bool "64-bit kernel"
593 depends on RISCV_ISA_V !! 2085 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
594 default y <<
595 help 2086 help
596 Say Y here if you want to enable Vec !! 2087 Select this option if you want to build a 64-bit kernel.
597 Otherwise, userspace has to make exp <<
598 Vector, or enable it via the sysctl <<
599 2088
600 If you don't know what to do here, s !! 2089 endchoice
>> 2090
>> 2091 config KVM_GUEST
>> 2092 bool "KVM Guest Kernel"
>> 2093 depends on BROKEN_ON_SMP
>> 2094 help
>> 2095 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2096 mode.
>> 2097
>> 2098 config KVM_GUEST_TIMER_FREQ
>> 2099 int "Count/Compare Timer Frequency (MHz)"
>> 2100 depends on KVM_GUEST
>> 2101 default 100
>> 2102 help
>> 2103 Set this to non-zero if building a guest kernel for KVM to skip RTC
>> 2104 emulation when determining guest CPU Frequency. Instead, the guest's
>> 2105 timer frequency is specified directly.
601 2106
602 config RISCV_ISA_V_UCOPY_THRESHOLD !! 2107 config MIPS_VA_BITS_48
603 int "Threshold size for vectorized use !! 2108 bool "48 bits virtual memory"
604 depends on RISCV_ISA_V !! 2109 depends on 64BIT
605 default 768 <<
606 help 2110 help
607 Prefer using vectorized copy_to_user !! 2111 Support a maximum at least 48 bits of application virtual
608 workload size exceeds this value. !! 2112 memory. Default is 40 bits or less, depending on the CPU.
>> 2113 For page sizes 16k and above, this option results in a small
>> 2114 memory overhead for page tables. For 4k page size, a fourth
>> 2115 level of page tables is added which imposes both a memory
>> 2116 overhead as well as slower TLB fault handling.
609 2117
610 config RISCV_ISA_V_PREEMPTIVE !! 2118 If unsure, say N.
611 bool "Run kernel-mode Vector with kern !! 2119
612 depends on PREEMPTION !! 2120 choice
613 depends on RISCV_ISA_V !! 2121 prompt "Kernel page size"
614 default y !! 2122 default PAGE_SIZE_4KB
>> 2123
>> 2124 config PAGE_SIZE_4KB
>> 2125 bool "4kB"
>> 2126 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
>> 2127 help
>> 2128 This option select the standard 4kB Linux page size. On some
>> 2129 R3000-family processors this is the only available page size. Using
>> 2130 4kB page size will minimize memory consumption and is therefore
>> 2131 recommended for low memory systems.
>> 2132
>> 2133 config PAGE_SIZE_8KB
>> 2134 bool "8kB"
>> 2135 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
>> 2136 depends on !MIPS_VA_BITS_48
>> 2137 help
>> 2138 Using 8kB page size will result in higher performance kernel at
>> 2139 the price of higher memory consumption. This option is available
>> 2140 only on R8000 and cnMIPS processors. Note that you will need a
>> 2141 suitable Linux distribution to support this.
>> 2142
>> 2143 config PAGE_SIZE_16KB
>> 2144 bool "16kB"
>> 2145 depends on !CPU_R3000 && !CPU_TX39XX
>> 2146 help
>> 2147 Using 16kB page size will result in higher performance kernel at
>> 2148 the price of higher memory consumption. This option is available on
>> 2149 all non-R3000 family processors. Note that you will need a suitable
>> 2150 Linux distribution to support this.
>> 2151
>> 2152 config PAGE_SIZE_32KB
>> 2153 bool "32kB"
>> 2154 depends on CPU_CAVIUM_OCTEON
>> 2155 depends on !MIPS_VA_BITS_48
>> 2156 help
>> 2157 Using 32kB page size will result in higher performance kernel at
>> 2158 the price of higher memory consumption. This option is available
>> 2159 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2160 distribution to support this.
>> 2161
>> 2162 config PAGE_SIZE_64KB
>> 2163 bool "64kB"
>> 2164 depends on !CPU_R3000 && !CPU_TX39XX
>> 2165 help
>> 2166 Using 64kB page size will result in higher performance kernel at
>> 2167 the price of higher memory consumption. This option is available on
>> 2168 all non-R3000 family processor. Not that at the time of this
>> 2169 writing this option is still high experimental.
>> 2170
>> 2171 endchoice
>> 2172
>> 2173 config FORCE_MAX_ZONEORDER
>> 2174 int "Maximum zone order"
>> 2175 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2176 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2177 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2178 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2179 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2180 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2181 range 11 64
>> 2182 default "11"
>> 2183 help
>> 2184 The kernel memory allocator divides physically contiguous memory
>> 2185 blocks into "zones", where each zone is a power of two number of
>> 2186 pages. This option selects the largest power of two that the kernel
>> 2187 keeps in the memory allocator. If you need to allocate very large
>> 2188 blocks of physically contiguous memory, then you may need to
>> 2189 increase this value.
>> 2190
>> 2191 This config option is actually maximum order plus one. For example,
>> 2192 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2193
>> 2194 The page size is not necessarily 4KB. Keep this in mind
>> 2195 when choosing a value for this option.
>> 2196
>> 2197 config BOARD_SCACHE
>> 2198 bool
>> 2199
>> 2200 config IP22_CPU_SCACHE
>> 2201 bool
>> 2202 select BOARD_SCACHE
>> 2203
>> 2204 #
>> 2205 # Support for a MIPS32 / MIPS64 style S-caches
>> 2206 #
>> 2207 config MIPS_CPU_SCACHE
>> 2208 bool
>> 2209 select BOARD_SCACHE
>> 2210
>> 2211 config R5000_CPU_SCACHE
>> 2212 bool
>> 2213 select BOARD_SCACHE
>> 2214
>> 2215 config RM7000_CPU_SCACHE
>> 2216 bool
>> 2217 select BOARD_SCACHE
>> 2218
>> 2219 config SIBYTE_DMA_PAGEOPS
>> 2220 bool "Use DMA to clear/copy pages"
>> 2221 depends on CPU_SB1
615 help 2222 help
616 Usually, in-kernel SIMD routines are !! 2223 Instead of using the CPU to zero and copy pages, use a Data Mover
617 Functions which envoke long running !! 2224 channel. These DMA channels are otherwise unused by the standard
618 vector unit to prevent blocking othe !! 2225 SiByte Linux port. Seems to give a small performance benefit.
619 2226
620 This config allows kernel to run SIM !! 2227 config CPU_HAS_PREFETCH
621 preemption. Enabling this config wil !! 2228 bool
622 consumption due to the allocation of !! 2229
>> 2230 config CPU_GENERIC_DUMP_TLB
>> 2231 bool
>> 2232 default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX)
623 2233
624 config RISCV_ISA_ZAWRS !! 2234 config CPU_R4K_FPU
625 bool "Zawrs extension support for more !! 2235 bool
626 depends on RISCV_ALTERNATIVE !! 2236 default y if !(CPU_R3000 || CPU_TX39XX)
>> 2237
>> 2238 config CPU_R4K_CACHE_TLB
>> 2239 bool
>> 2240 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
>> 2241
>> 2242 config MIPS_MT_SMP
>> 2243 bool "MIPS MT SMP support (1 TC on each available VPE)"
627 default y 2244 default y
>> 2245 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2246 select CPU_MIPSR2_IRQ_VI
>> 2247 select CPU_MIPSR2_IRQ_EI
>> 2248 select SYNC_R4K
>> 2249 select MIPS_MT
>> 2250 select SMP
>> 2251 select SMP_UP
>> 2252 select SYS_SUPPORTS_SMP
>> 2253 select SYS_SUPPORTS_SCHED_SMT
>> 2254 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2255 help
>> 2256 This is a kernel model which is known as SMVP. This is supported
>> 2257 on cores with the MT ASE and uses the available VPEs to implement
>> 2258 virtual processors which supports SMP. This is equivalent to the
>> 2259 Intel Hyperthreading feature. For further information go to
>> 2260 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2261
>> 2262 config MIPS_MT
>> 2263 bool
>> 2264
>> 2265 config SCHED_SMT
>> 2266 bool "SMT (multithreading) scheduler support"
>> 2267 depends on SYS_SUPPORTS_SCHED_SMT
>> 2268 default n
628 help 2269 help
629 The Zawrs extension defines instruct !! 2270 SMT scheduler support improves the CPU scheduler's decision making
630 which allow a hart to enter a low-po !! 2271 when dealing with MIPS MT enabled cores at a cost of slightly
631 hypervisor while waiting on a store !! 2272 increased overhead in some places. If unsure say N here.
632 use of these instructions in the ker <<
633 detected at boot. <<
634 2273
635 If you don't know what to do here, s !! 2274 config SYS_SUPPORTS_SCHED_SMT
>> 2275 bool
636 2276
637 config TOOLCHAIN_HAS_ZBB !! 2277 config SYS_SUPPORTS_MULTITHREADING
638 bool 2278 bool
639 default y <<
640 depends on !64BIT || $(cc-option,-mabi <<
641 depends on !32BIT || $(cc-option,-mabi <<
642 depends on LLD_VERSION >= 150000 || LD <<
643 depends on AS_HAS_OPTION_ARCH <<
644 2279
645 # This symbol indicates that the toolchain sup !! 2280 config MIPS_MT_FPAFF
646 # extensions, including Zvk*, Zvbb, and Zvbc. !! 2281 bool "Dynamic FPU affinity for FP-intensive threads"
647 # binutils added all except Zvkb, then added Z !! 2282 default y
648 config TOOLCHAIN_HAS_VECTOR_CRYPTO !! 2283 depends on MIPS_MT_SMP
649 def_bool $(as-instr, .option arch$(com <<
650 depends on AS_HAS_OPTION_ARCH <<
651 2284
652 config RISCV_ISA_ZBA !! 2285 config MIPSR2_TO_R6_EMULATOR
653 bool "Zba extension support for bit ma !! 2286 bool "MIPS R2-to-R6 emulator"
>> 2287 depends on CPU_MIPSR6
654 default y 2288 default y
655 help 2289 help
656 Add support for enabling optimisati !! 2290 Choose this option if you want to run non-R6 MIPS userland code.
657 extension is detected at boot. !! 2291 Even if you say 'Y' here, the emulator will still be disabled by
>> 2292 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2293 The only reason this is a build-time option is to save ~14K from the
>> 2294 final kernel image.
>> 2295
>> 2296 config SYS_SUPPORTS_VPE_LOADER
>> 2297 bool
>> 2298 depends on SYS_SUPPORTS_MULTITHREADING
>> 2299 help
>> 2300 Indicates that the platform supports the VPE loader, and provides
>> 2301 physical_memsize.
658 2302
659 The Zba extension provides instruct !! 2303 config MIPS_VPE_LOADER
660 of addresses that index into arrays !! 2304 bool "VPE loader support."
>> 2305 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2306 select CPU_MIPSR2_IRQ_VI
>> 2307 select CPU_MIPSR2_IRQ_EI
>> 2308 select MIPS_MT
>> 2309 help
>> 2310 Includes a loader for loading an elf relocatable object
>> 2311 onto another VPE and running it.
>> 2312
>> 2313 config MIPS_VPE_LOADER_CMP
>> 2314 bool
>> 2315 default "y"
>> 2316 depends on MIPS_VPE_LOADER && MIPS_CMP
661 2317
662 If you don't know what to do here, !! 2318 config MIPS_VPE_LOADER_MT
>> 2319 bool
>> 2320 default "y"
>> 2321 depends on MIPS_VPE_LOADER && !MIPS_CMP
663 2322
664 config RISCV_ISA_ZBB !! 2323 config MIPS_VPE_LOADER_TOM
665 bool "Zbb extension support for bit ma !! 2324 bool "Load VPE program into memory hidden from linux"
666 depends on TOOLCHAIN_HAS_ZBB !! 2325 depends on MIPS_VPE_LOADER
667 depends on RISCV_ALTERNATIVE <<
668 default y 2326 default y
669 help 2327 help
670 Adds support to dynamically detect !! 2328 The loader can use memory that is present but has been hidden from
671 extension (basic bit manipulation) !! 2329 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2330 you to ensure the amount you put in the option and the space your
>> 2331 program requires is less or equal to the amount physically present.
>> 2332
>> 2333 config MIPS_VPE_APSP_API
>> 2334 bool "Enable support for AP/SP API (RTLX)"
>> 2335 depends on MIPS_VPE_LOADER
>> 2336
>> 2337 config MIPS_VPE_APSP_API_CMP
>> 2338 bool
>> 2339 default "y"
>> 2340 depends on MIPS_VPE_APSP_API && MIPS_CMP
>> 2341
>> 2342 config MIPS_VPE_APSP_API_MT
>> 2343 bool
>> 2344 default "y"
>> 2345 depends on MIPS_VPE_APSP_API && !MIPS_CMP
>> 2346
>> 2347 config MIPS_CMP
>> 2348 bool "MIPS CMP framework support (DEPRECATED)"
>> 2349 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2350 select SMP
>> 2351 select SYNC_R4K
>> 2352 select SYS_SUPPORTS_SMP
>> 2353 select WEAK_ORDERING
>> 2354 default n
>> 2355 help
>> 2356 Select this if you are using a bootloader which implements the "CMP
>> 2357 framework" protocol (ie. YAMON) and want your kernel to make use of
>> 2358 its ability to start secondary CPUs.
>> 2359
>> 2360 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2361 instead of this.
>> 2362
>> 2363 config MIPS_CPS
>> 2364 bool "MIPS Coherent Processing System support"
>> 2365 depends on SYS_SUPPORTS_MIPS_CPS
>> 2366 select MIPS_CM
>> 2367 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2368 select SMP
>> 2369 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2370 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2371 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2372 select SYS_SUPPORTS_SMP
>> 2373 select WEAK_ORDERING
>> 2374 help
>> 2375 Select this if you wish to run an SMP kernel across multiple cores
>> 2376 within a MIPS Coherent Processing System. When this option is
>> 2377 enabled the kernel will probe for other cores and boot them with
>> 2378 no external assistance. It is safe to enable this when hardware
>> 2379 support is unavailable.
>> 2380
>> 2381 config MIPS_CPS_PM
>> 2382 depends on MIPS_CPS
>> 2383 bool
672 2384
673 The Zbb extension provides instruct !! 2385 config MIPS_CM
674 of bit-specific operations (count b !! 2386 bool
675 bitrotation, etc). !! 2387 select MIPS_CPC
676 2388
677 If you don't know what to do here, !! 2389 config MIPS_CPC
>> 2390 bool
678 2391
679 config TOOLCHAIN_HAS_ZBC !! 2392 config SB1_PASS_2_WORKAROUNDS
680 bool 2393 bool
>> 2394 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
681 default y 2395 default y
682 depends on !64BIT || $(cc-option,-mabi <<
683 depends on !32BIT || $(cc-option,-mabi <<
684 depends on LLD_VERSION >= 150000 || LD <<
685 depends on AS_HAS_OPTION_ARCH <<
686 2396
687 config RISCV_ISA_ZBC !! 2397 config SB1_PASS_2_1_WORKAROUNDS
688 bool "Zbc extension support for carry- !! 2398 bool
689 depends on TOOLCHAIN_HAS_ZBC !! 2399 depends on CPU_SB1 && CPU_SB1_PASS_2
690 depends on MMU <<
691 depends on RISCV_ALTERNATIVE <<
692 default y 2400 default y
>> 2401
>> 2402
>> 2403 config ARCH_PHYS_ADDR_T_64BIT
>> 2404 bool
>> 2405
>> 2406 choice
>> 2407 prompt "SmartMIPS or microMIPS ASE support"
>> 2408
>> 2409 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2410 bool "None"
693 help 2411 help
694 Adds support to dynamically detect !! 2412 Select this if you want neither microMIPS nor SmartMIPS support
695 extension (carry-less multiplicatio <<
696 2413
697 The Zbc extension could accelerate !! 2414 config CPU_HAS_SMARTMIPS
698 calculations. !! 2415 depends on SYS_SUPPORTS_SMARTMIPS
>> 2416 bool "SmartMIPS"
>> 2417 help
>> 2418 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2419 increased security at both hardware and software level for
>> 2420 smartcards. Enabling this option will allow proper use of the
>> 2421 SmartMIPS instructions by Linux applications. However a kernel with
>> 2422 this option will not work on a MIPS core without SmartMIPS core. If
>> 2423 you don't know you probably don't have SmartMIPS and should say N
>> 2424 here.
699 2425
700 If you don't know what to do here, !! 2426 config CPU_MICROMIPS
>> 2427 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2428 bool "microMIPS"
>> 2429 help
>> 2430 When this option is enabled the kernel will be built using the
>> 2431 microMIPS ISA
701 2432
702 config RISCV_ISA_ZICBOM !! 2433 endchoice
703 bool "Zicbom extension support for non !! 2434
704 depends on MMU !! 2435 config CPU_HAS_MSA
705 depends on RISCV_ALTERNATIVE !! 2436 bool "Support for the MIPS SIMD Architecture"
>> 2437 depends on CPU_SUPPORTS_MSA
>> 2438 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2439 help
>> 2440 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2441 and a set of SIMD instructions to operate on them. When this option
>> 2442 is enabled the kernel will support allocating & switching MSA
>> 2443 vector register contexts. If you know that your kernel will only be
>> 2444 running on CPUs which do not support MSA or that your userland will
>> 2445 not be making use of it then you may wish to say N here to reduce
>> 2446 the size & complexity of your kernel.
>> 2447
>> 2448 If unsure, say Y.
>> 2449
>> 2450 config CPU_HAS_WB
>> 2451 bool
>> 2452
>> 2453 config XKS01
>> 2454 bool
>> 2455
>> 2456 config CPU_HAS_RIXI
>> 2457 bool
>> 2458
>> 2459 #
>> 2460 # Vectored interrupt mode is an R2 feature
>> 2461 #
>> 2462 config CPU_MIPSR2_IRQ_VI
>> 2463 bool
>> 2464
>> 2465 #
>> 2466 # Extended interrupt mode is an R2 feature
>> 2467 #
>> 2468 config CPU_MIPSR2_IRQ_EI
>> 2469 bool
>> 2470
>> 2471 config CPU_HAS_SYNC
>> 2472 bool
>> 2473 depends on !CPU_R3000
706 default y 2474 default y
707 select RISCV_DMA_NONCOHERENT !! 2475
708 select DMA_DIRECT_REMAP !! 2476 #
>> 2477 # CPU non-features
>> 2478 #
>> 2479 config CPU_DADDI_WORKAROUNDS
>> 2480 bool
>> 2481
>> 2482 config CPU_R4000_WORKAROUNDS
>> 2483 bool
>> 2484 select CPU_R4400_WORKAROUNDS
>> 2485
>> 2486 config CPU_R4400_WORKAROUNDS
>> 2487 bool
>> 2488
>> 2489 config MIPS_ASID_SHIFT
>> 2490 int
>> 2491 default 6 if CPU_R3000 || CPU_TX39XX
>> 2492 default 4 if CPU_R8000
>> 2493 default 0
>> 2494
>> 2495 config MIPS_ASID_BITS
>> 2496 int
>> 2497 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2498 default 6 if CPU_R3000 || CPU_TX39XX
>> 2499 default 8
>> 2500
>> 2501 config MIPS_ASID_BITS_VARIABLE
>> 2502 bool
>> 2503
>> 2504 #
>> 2505 # - Highmem only makes sense for the 32-bit kernel.
>> 2506 # - The current highmem code will only work properly on physically indexed
>> 2507 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2508 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2509 # moment we protect the user and offer the highmem option only on machines
>> 2510 # where it's known to be safe. This will not offer highmem on a few systems
>> 2511 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2512 # indexed CPUs but we're playing safe.
>> 2513 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2514 # know they might have memory configurations that could make use of highmem
>> 2515 # support.
>> 2516 #
>> 2517 config HIGHMEM
>> 2518 bool "High Memory Support"
>> 2519 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2520
>> 2521 config CPU_SUPPORTS_HIGHMEM
>> 2522 bool
>> 2523
>> 2524 config SYS_SUPPORTS_HIGHMEM
>> 2525 bool
>> 2526
>> 2527 config SYS_SUPPORTS_SMARTMIPS
>> 2528 bool
>> 2529
>> 2530 config SYS_SUPPORTS_MICROMIPS
>> 2531 bool
>> 2532
>> 2533 config SYS_SUPPORTS_MIPS16
>> 2534 bool
709 help 2535 help
710 Adds support to dynamically detect !! 2536 This option must be set if a kernel might be executed on a MIPS16-
711 extension (Cache Block Management O !! 2537 enabled CPU even if MIPS16 is not actually being used. In other
712 usage. !! 2538 words, it makes the kernel MIPS16-tolerant.
713 2539
714 The Zicbom extension can be used to !! 2540 config CPU_SUPPORTS_MSA
715 non-coherent DMA support on devices !! 2541 bool
716 2542
717 If you don't know what to do here, !! 2543 config ARCH_FLATMEM_ENABLE
>> 2544 def_bool y
>> 2545 depends on !NUMA && !CPU_LOONGSON2
718 2546
719 config RISCV_ISA_ZICBOZ !! 2547 config ARCH_DISCONTIGMEM_ENABLE
720 bool "Zicboz extension support for fas !! 2548 bool
721 depends on RISCV_ALTERNATIVE !! 2549 default y if SGI_IP27
722 default y <<
723 help 2550 help
724 Enable the use of the Zicboz extens !! 2551 Say Y to support efficient handling of discontiguous physical memory,
725 when available. !! 2552 for architectures which are either NUMA (Non-Uniform Memory Access)
>> 2553 or have huge holes in the physical address space for other reasons.
>> 2554 See <file:Documentation/vm/numa> for more.
726 2555
727 The Zicboz extension is used for fa !! 2556 config ARCH_SPARSEMEM_ENABLE
>> 2557 bool
>> 2558 select SPARSEMEM_STATIC
728 2559
729 If you don't know what to do here, !! 2560 config NUMA
>> 2561 bool "NUMA Support"
>> 2562 depends on SYS_SUPPORTS_NUMA
>> 2563 help
>> 2564 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2565 Access). This option improves performance on systems with more
>> 2566 than two nodes; on two node systems it is generally better to
>> 2567 leave it disabled; on single node systems disable this option
>> 2568 disabled.
730 2569
731 config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI !! 2570 config SYS_SUPPORTS_NUMA
732 def_bool y !! 2571 bool
733 # https://sourceware.org/git/?p=binuti <<
734 # https://gcc.gnu.org/git/?p=gcc.git;a <<
735 depends on AS_IS_GNU && AS_VERSION >= <<
736 help <<
737 Binutils-2.38 and GCC-12.1.0 bumped <<
738 20191213 version, which moves some i <<
739 the Zicsr and Zifencei extensions. T <<
740 Zicsr and Zifencei when binutils >= <<
741 and Zifencei are supported in binuti <<
742 To make life easier, and avoid forci <<
743 newer ISA spec to version 2.2, relax <<
744 For clang < 17 or GCC < 11.3.0, for <<
745 special treatment, this is dealt wit <<
746 2572
747 config TOOLCHAIN_NEEDS_OLD_ISA_SPEC !! 2573 config RELOCATABLE
748 def_bool y !! 2574 bool "Relocatable kernel"
749 depends on TOOLCHAIN_NEEDS_EXPLICIT_ZI !! 2575 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
750 # https://github.com/llvm/llvm-project <<
751 # https://gcc.gnu.org/git/?p=gcc.git;a <<
752 depends on (CC_IS_CLANG && CLANG_VERSI <<
753 help 2576 help
754 Certain versions of clang and GCC do !! 2577 This builds a kernel image that retains relocation information
755 -march. This option causes an older !! 2578 so it can be loaded someplace besides the default 1MB.
756 versions of clang and GCC to be pass !! 2579 The relocations make the kernel binary about 15% larger,
757 as passing zicsr and zifencei to -ma !! 2580 but are discarded at runtime
>> 2581
>> 2582 config RELOCATION_TABLE_SIZE
>> 2583 hex "Relocation table size"
>> 2584 depends on RELOCATABLE
>> 2585 range 0x0 0x01000000
>> 2586 default "0x00100000"
>> 2587 ---help---
>> 2588 A table of relocation data will be appended to the kernel binary
>> 2589 and parsed at boot to fix up the relocated kernel.
>> 2590
>> 2591 This option allows the amount of space reserved for the table to be
>> 2592 adjusted, although the default of 1Mb should be ok in most cases.
>> 2593
>> 2594 The build will fail and a valid size suggested if this is too small.
758 2595
759 config FPU !! 2596 If unsure, leave at the default value.
760 bool "FPU support" !! 2597
>> 2598 config RANDOMIZE_BASE
>> 2599 bool "Randomize the address of the kernel image"
>> 2600 depends on RELOCATABLE
>> 2601 ---help---
>> 2602 Randomizes the physical and virtual address at which the
>> 2603 kernel image is loaded, as a security feature that
>> 2604 deters exploit attempts relying on knowledge of the location
>> 2605 of kernel internals.
>> 2606
>> 2607 Entropy is generated using any coprocessor 0 registers available.
>> 2608
>> 2609 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2610
>> 2611 If unsure, say N.
>> 2612
>> 2613 config RANDOMIZE_BASE_MAX_OFFSET
>> 2614 hex "Maximum kASLR offset" if EXPERT
>> 2615 depends on RANDOMIZE_BASE
>> 2616 range 0x0 0x40000000 if EVA || 64BIT
>> 2617 range 0x0 0x08000000
>> 2618 default "0x01000000"
>> 2619 ---help---
>> 2620 When kASLR is active, this provides the maximum offset that will
>> 2621 be applied to the kernel image. It should be set according to the
>> 2622 amount of physical RAM available in the target system minus
>> 2623 PHYSICAL_START and must be a power of 2.
>> 2624
>> 2625 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2626 EVA or 64-bit. The default is 16Mb.
>> 2627
>> 2628 config NODES_SHIFT
>> 2629 int
>> 2630 default "6"
>> 2631 depends on NEED_MULTIPLE_NODES
>> 2632
>> 2633 config HW_PERF_EVENTS
>> 2634 bool "Enable hardware performance counter support for perf events"
>> 2635 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
761 default y 2636 default y
762 help 2637 help
763 Say N here if you want to disable al !! 2638 Enable hardware performance counter support for perf events. If
764 in the kernel. !! 2639 disabled, perf events will use software events only.
765 2640
766 If you don't know what to do here, s !! 2641 source "mm/Kconfig"
767 2642
768 config IRQ_STACKS !! 2643 config SMP
769 bool "Independent irq & softirq stacks !! 2644 bool "Multi-Processing support"
770 default y !! 2645 depends on SYS_SUPPORTS_SMP
771 select HAVE_IRQ_EXIT_ON_IRQ_STACK <<
772 select HAVE_SOFTIRQ_ON_OWN_STACK <<
773 help 2646 help
774 Add independent irq & softirq stacks !! 2647 This enables support for systems with more than one CPU. If you have
775 overflows. We may save some memory f !! 2648 a system with only one CPU, say N. If you have a system with more
>> 2649 than one CPU, say Y.
>> 2650
>> 2651 If you say N here, the kernel will run on uni- and multiprocessor
>> 2652 machines, but will use only one CPU of a multiprocessor machine. If
>> 2653 you say Y here, the kernel will run on many, but not all,
>> 2654 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2655 will run faster if you say N here.
776 2656
777 config THREAD_SIZE_ORDER !! 2657 People using multiprocessor machines who say Y here should also say
778 int "Kernel stack size (in power-of-tw !! 2658 Y to "Enhanced Real Time Clock Support", below.
779 range 0 4 !! 2659
780 default 1 if 32BIT !! 2660 See also the SMP-HOWTO available at
781 default 2 !! 2661 <http://www.tldp.org/docs.html#howto>.
>> 2662
>> 2663 If you don't know what to do here, say N.
>> 2664
>> 2665 config HOTPLUG_CPU
>> 2666 bool "Support for hot-pluggable CPUs"
>> 2667 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
782 help 2668 help
783 Specify the Pages of thread stack si !! 2669 Say Y here to allow turning CPUs off and on. CPUs can be
784 affects irq stack size, which is equ !! 2670 controlled through /sys/devices/system/cpu.
>> 2671 (Note: power management support will enable this option
>> 2672 automatically on SMP systems. )
>> 2673 Say N if you want to disable CPU hotplug.
785 2674
786 config RISCV_MISALIGNED !! 2675 config SMP_UP
787 bool 2676 bool
788 select SYSCTL_ARCH_UNALIGN_ALLOW <<
789 help <<
790 Embed support for emulating misalign <<
791 2677
792 choice !! 2678 config SYS_SUPPORTS_MIPS_CMP
793 prompt "Unaligned Accesses Support" !! 2679 bool
794 default RISCV_PROBE_UNALIGNED_ACCESS <<
795 help <<
796 This determines the level of support <<
797 information is used by the kernel to <<
798 exposed to user space via the hwprob <<
799 probed at boot by default. <<
800 <<
801 config RISCV_PROBE_UNALIGNED_ACCESS <<
802 bool "Probe for hardware unaligned acc <<
803 select RISCV_MISALIGNED <<
804 help <<
805 During boot, the kernel will run a s <<
806 speed of unaligned accesses. This pr <<
807 the speed of unaligned accesses on t <<
808 memory accesses trap into the kernel <<
809 system, the kernel will emulate the <<
810 UABI. <<
811 <<
812 config RISCV_EMULATED_UNALIGNED_ACCESS <<
813 bool "Emulate unaligned access where s <<
814 select RISCV_MISALIGNED <<
815 help <<
816 If unaligned memory accesses trap in <<
817 supported by the system, the kernel <<
818 accesses to preserve the UABI. When <<
819 unaligned accesses, the unaligned ac <<
820 <<
821 config RISCV_SLOW_UNALIGNED_ACCESS <<
822 bool "Assume the system supports slow <<
823 depends on NONPORTABLE <<
824 help <<
825 Assume that the system supports slow <<
826 kernel and userspace programs may no <<
827 that do not support unaligned memory <<
828 <<
829 config RISCV_EFFICIENT_UNALIGNED_ACCESS <<
830 bool "Assume the system supports fast <<
831 depends on NONPORTABLE <<
832 select DCACHE_WORD_ACCESS if MMU <<
833 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
834 help <<
835 Assume that the system supports fast <<
836 enabled, this option improves the pe <<
837 systems. However, the kernel and use <<
838 slowly, or will not be able to run a <<
839 support efficient unaligned memory a <<
840 2680
841 endchoice !! 2681 config SYS_SUPPORTS_MIPS_CPS
>> 2682 bool
842 2683
843 source "arch/riscv/Kconfig.vendor" !! 2684 config SYS_SUPPORTS_SMP
>> 2685 bool
844 2686
845 endmenu # "Platform type" !! 2687 config NR_CPUS_DEFAULT_4
>> 2688 bool
846 2689
847 menu "Kernel features" !! 2690 config NR_CPUS_DEFAULT_8
>> 2691 bool
848 2692
849 source "kernel/Kconfig.hz" !! 2693 config NR_CPUS_DEFAULT_16
>> 2694 bool
850 2695
851 config RISCV_SBI_V01 !! 2696 config NR_CPUS_DEFAULT_32
852 bool "SBI v0.1 support" !! 2697 bool
853 depends on RISCV_SBI <<
854 help <<
855 This config allows kernel to use SBI <<
856 deprecated in future once legacy M-m <<
857 2698
858 config RISCV_BOOT_SPINWAIT !! 2699 config NR_CPUS_DEFAULT_64
859 bool "Spinwait booting method" !! 2700 bool
>> 2701
>> 2702 config NR_CPUS
>> 2703 int "Maximum number of CPUs (2-256)"
>> 2704 range 2 256
860 depends on SMP 2705 depends on SMP
861 default y if RISCV_SBI_V01 || RISCV_M_ !! 2706 default "4" if NR_CPUS_DEFAULT_4
>> 2707 default "8" if NR_CPUS_DEFAULT_8
>> 2708 default "16" if NR_CPUS_DEFAULT_16
>> 2709 default "32" if NR_CPUS_DEFAULT_32
>> 2710 default "64" if NR_CPUS_DEFAULT_64
>> 2711 help
>> 2712 This allows you to specify the maximum number of CPUs which this
>> 2713 kernel will support. The maximum supported value is 32 for 32-bit
>> 2714 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2715 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2716 and 2 for all others.
>> 2717
>> 2718 This is purely to save memory - each supported CPU adds
>> 2719 approximately eight kilobytes to the kernel image. For best
>> 2720 performance should round up your number of processors to the next
>> 2721 power of two.
>> 2722
>> 2723 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2724 bool
>> 2725
>> 2726 config MIPS_NR_CPU_NR_MAP_1024
>> 2727 bool
>> 2728
>> 2729 config MIPS_NR_CPU_NR_MAP
>> 2730 int
>> 2731 depends on SMP
>> 2732 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2733 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2734
>> 2735 #
>> 2736 # Timer Interrupt Frequency Configuration
>> 2737 #
>> 2738
>> 2739 choice
>> 2740 prompt "Timer frequency"
>> 2741 default HZ_250
862 help 2742 help
863 This enables support for booting Lin !! 2743 Allows the configuration of the timer frequency.
864 spinwait method, all cores randomly <<
865 gets chosen via lottery and all othe <<
866 variable. This method cannot support <<
867 scheme. It should be only enabled fo <<
868 on older firmware without SBI HSM ex <<
869 rely on ordered booting via SBI HSM <<
870 dynamically at runtime if the firmwa <<
871 <<
872 Since spinwait is incompatible with <<
873 NR_CPUS be large enough to contain t <<
874 hart to enter Linux. <<
875 2744
876 If unsure what to do here, say N. !! 2745 config HZ_24
>> 2746 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
877 2747
878 config ARCH_SUPPORTS_KEXEC !! 2748 config HZ_48
879 def_bool y !! 2749 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
880 2750
881 config ARCH_SELECTS_KEXEC !! 2751 config HZ_100
882 def_bool y !! 2752 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
883 depends on KEXEC <<
884 select HOTPLUG_CPU if SMP <<
885 2753
886 config ARCH_SUPPORTS_KEXEC_FILE !! 2754 config HZ_128
887 def_bool 64BIT !! 2755 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
888 2756
889 config ARCH_SELECTS_KEXEC_FILE !! 2757 config HZ_250
890 def_bool y !! 2758 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
891 depends on KEXEC_FILE <<
892 select HAVE_IMA_KEXEC if IMA <<
893 select KEXEC_ELF <<
894 2759
895 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2760 config HZ_256
896 def_bool ARCH_SUPPORTS_KEXEC_FILE !! 2761 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
897 2762
898 config ARCH_SUPPORTS_CRASH_DUMP !! 2763 config HZ_1000
899 def_bool y !! 2764 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
900 2765
901 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATIO !! 2766 config HZ_1024
902 def_bool CRASH_RESERVE !! 2767 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
903 2768
904 config COMPAT !! 2769 endchoice
905 bool "Kernel support for 32-bit U-mode <<
906 default 64BIT <<
907 depends on 64BIT && MMU <<
908 help <<
909 This option enables support for a 32 <<
910 kernel at S-mode. riscv32-specific c <<
911 the user helper functions (vdso), si <<
912 ptrace interface are handled appropr <<
913 <<
914 If you want to execute 32-bit usersp <<
915 <<
916 config PARAVIRT <<
917 bool "Enable paravirtualization code" <<
918 depends on RISCV_SBI <<
919 help <<
920 This changes the kernel so it can mo <<
921 under a hypervisor, potentially impr <<
922 over full virtualization. <<
923 <<
924 config PARAVIRT_TIME_ACCOUNTING <<
925 bool "Paravirtual steal time accountin <<
926 depends on PARAVIRT <<
927 help <<
928 Select this option to enable fine gr <<
929 accounting. Time spent executing oth <<
930 the current vCPU is discounted from <<
931 that, there can be a small performan <<
932 2770
933 If in doubt, say N here. !! 2771 config SYS_SUPPORTS_24HZ
>> 2772 bool
934 2773
935 config RELOCATABLE !! 2774 config SYS_SUPPORTS_48HZ
936 bool "Build a relocatable kernel" !! 2775 bool
937 depends on MMU && 64BIT && !XIP_KERNEL <<
938 select MODULE_SECTIONS if MODULES <<
939 help <<
940 This builds a kernel as a Position I <<
941 which retains all relocation metadat <<
942 kernel binary at runtime to a differ <<
943 address it was linked at. <<
944 Since RISCV uses the RELA relocation <<
945 relocation pass at runtime even if t <<
946 same address it was linked at. <<
947 2776
948 If unsure, say N. !! 2777 config SYS_SUPPORTS_100HZ
>> 2778 bool
949 2779
950 config RANDOMIZE_BASE !! 2780 config SYS_SUPPORTS_128HZ
951 bool "Randomize the address of the ker !! 2781 bool
952 select RELOCATABLE !! 2782
953 depends on MMU && 64BIT && !XIP_KERNEL !! 2783 config SYS_SUPPORTS_250HZ
954 help !! 2784 bool
955 Randomizes the virtual address at wh !! 2785
956 loaded, as a security feature that d !! 2786 config SYS_SUPPORTS_256HZ
957 relying on knowledge of the location !! 2787 bool
958 !! 2788
959 It is the bootloader's job to provid !! 2789 config SYS_SUPPORTS_1000HZ
960 random u64 value in /chosen/kaslr-se !! 2790 bool
961 !! 2791
962 When booting via the UEFI stub, it w !! 2792 config SYS_SUPPORTS_1024HZ
963 EFI_RNG_PROTOCOL implementation (if !! 2793 bool
964 to the kernel proper. In addition, i !! 2794
965 location of the kernel Image as well !! 2795 config SYS_SUPPORTS_ARBIT_HZ
966 !! 2796 bool
967 If unsure, say N. !! 2797 default y if !SYS_SUPPORTS_24HZ && \
968 !! 2798 !SYS_SUPPORTS_48HZ && \
969 endmenu # "Kernel features" !! 2799 !SYS_SUPPORTS_100HZ && \
970 !! 2800 !SYS_SUPPORTS_128HZ && \
971 menu "Boot options" !! 2801 !SYS_SUPPORTS_250HZ && \
972 !! 2802 !SYS_SUPPORTS_256HZ && \
973 config CMDLINE !! 2803 !SYS_SUPPORTS_1000HZ && \
974 string "Built-in kernel command line" !! 2804 !SYS_SUPPORTS_1024HZ
975 help !! 2805
976 For most platforms, the arguments fo !! 2806 config HZ
977 are provided at run-time, during boo !! 2807 int
978 where either no arguments are being !! 2808 default 24 if HZ_24
979 arguments are insufficient or even i !! 2809 default 48 if HZ_48
>> 2810 default 100 if HZ_100
>> 2811 default 128 if HZ_128
>> 2812 default 250 if HZ_250
>> 2813 default 256 if HZ_256
>> 2814 default 1000 if HZ_1000
>> 2815 default 1024 if HZ_1024
>> 2816
>> 2817 config SCHED_HRTICK
>> 2818 def_bool HIGH_RES_TIMERS
>> 2819
>> 2820 source "kernel/Kconfig.preempt"
>> 2821
>> 2822 config KEXEC
>> 2823 bool "Kexec system call"
>> 2824 select KEXEC_CORE
>> 2825 help
>> 2826 kexec is a system call that implements the ability to shutdown your
>> 2827 current kernel, and to start another kernel. It is like a reboot
>> 2828 but it is independent of the system firmware. And like a reboot
>> 2829 you can start any kernel with it, not just Linux.
>> 2830
>> 2831 The name comes from the similarity to the exec system call.
>> 2832
>> 2833 It is an ongoing process to be certain the hardware in a machine
>> 2834 is properly shutdown, so do not be surprised if this code does not
>> 2835 initially work for you. As of this writing the exact hardware
>> 2836 interface is strongly in flux, so no good recommendation can be
>> 2837 made.
>> 2838
>> 2839 config CRASH_DUMP
>> 2840 bool "Kernel crash dumps"
>> 2841 help
>> 2842 Generate crash dump after being started by kexec.
>> 2843 This should be normally only set in special crash dump kernels
>> 2844 which are loaded in the main kernel with kexec-tools into
>> 2845 a specially reserved region and then later executed after
>> 2846 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2847 to a memory address not used by the main kernel or firmware using
>> 2848 PHYSICAL_START.
>> 2849
>> 2850 config PHYSICAL_START
>> 2851 hex "Physical address where the kernel is loaded"
>> 2852 default "0xffffffff84000000" if 64BIT
>> 2853 default "0x84000000" if 32BIT
>> 2854 depends on CRASH_DUMP
>> 2855 help
>> 2856 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2857 If you plan to use kernel for capturing the crash dump change
>> 2858 this value to start of the reserved region (the "X" value as
>> 2859 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2860 passed to the panic-ed kernel).
>> 2861
>> 2862 config SECCOMP
>> 2863 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2864 depends on PROC_FS
>> 2865 default y
>> 2866 help
>> 2867 This kernel feature is useful for number crunching applications
>> 2868 that may need to compute untrusted bytecode during their
>> 2869 execution. By using pipes or other transports made available to
>> 2870 the process as file descriptors supporting the read/write
>> 2871 syscalls, it's possible to isolate those applications in
>> 2872 their own address space using seccomp. Once seccomp is
>> 2873 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2874 and the task is only allowed to execute a few safe syscalls
>> 2875 defined by each seccomp mode.
>> 2876
>> 2877 If unsure, say Y. Only embedded should say N here.
>> 2878
>> 2879 config MIPS_O32_FP64_SUPPORT
>> 2880 bool "Support for O32 binaries using 64-bit FP"
>> 2881 depends on 32BIT || MIPS32_O32
>> 2882 help
>> 2883 When this is enabled, the kernel will support use of 64-bit floating
>> 2884 point registers with binaries using the O32 ABI along with the
>> 2885 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2886 32-bit MIPS systems this support is at the cost of increasing the
>> 2887 size and complexity of the compiled FPU emulator. Thus if you are
>> 2888 running a MIPS32 system and know that none of your userland binaries
>> 2889 will require 64-bit floating point, you may wish to reduce the size
>> 2890 of your kernel & potentially improve FP emulation performance by
>> 2891 saying N here.
>> 2892
>> 2893 Although binutils currently supports use of this flag the details
>> 2894 concerning its effect upon the O32 ABI in userland are still being
>> 2895 worked on. In order to avoid userland becoming dependant upon current
>> 2896 behaviour before the details have been finalised, this option should
>> 2897 be considered experimental and only enabled by those working upon
>> 2898 said details.
980 2899
981 When that occurs, it is possible to !! 2900 If unsure, say N.
982 line here and choose how the kernel !! 2901
>> 2902 config USE_OF
>> 2903 bool
>> 2904 select OF
>> 2905 select OF_EARLY_FLATTREE
>> 2906 select IRQ_DOMAIN
>> 2907
>> 2908 config BUILTIN_DTB
>> 2909 bool
983 2910
984 choice 2911 choice
985 prompt "Built-in command line usage" !! 2912 prompt "Kernel appended dtb support" if USE_OF
986 depends on CMDLINE != "" !! 2913 default MIPS_NO_APPENDED_DTB
987 default CMDLINE_FALLBACK <<
988 help <<
989 Choose how the kernel will handle th <<
990 line. <<
991 <<
992 config CMDLINE_FALLBACK <<
993 bool "Use bootloader kernel arguments <<
994 help <<
995 Use the built-in command line as fal <<
996 during boot. This is the default beh <<
997 <<
998 config CMDLINE_EXTEND <<
999 bool "Extend bootloader kernel argumen <<
1000 help <<
1001 The command-line arguments provided <<
1002 appended to the built-in command li <<
1003 cases where the provided arguments <<
1004 you don't want to or cannot modify <<
1005 <<
1006 config CMDLINE_FORCE <<
1007 bool "Always use the default kernel c <<
1008 help <<
1009 Always use the built-in command lin <<
1010 boot. This is useful in case you ne <<
1011 command line on systems where you d <<
1012 over it. <<
1013 2914
>> 2915 config MIPS_NO_APPENDED_DTB
>> 2916 bool "None"
>> 2917 help
>> 2918 Do not enable appended dtb support.
>> 2919
>> 2920 config MIPS_ELF_APPENDED_DTB
>> 2921 bool "vmlinux"
>> 2922 help
>> 2923 With this option, the boot code will look for a device tree binary
>> 2924 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 2925 it is empty and the DTB can be appended using binutils command
>> 2926 objcopy:
>> 2927
>> 2928 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 2929
>> 2930 This is meant as a backward compatiblity convenience for those
>> 2931 systems with a bootloader that can't be upgraded to accommodate
>> 2932 the documented boot protocol using a device tree.
>> 2933
>> 2934 config MIPS_RAW_APPENDED_DTB
>> 2935 bool "vmlinux.bin or vmlinuz.bin"
>> 2936 help
>> 2937 With this option, the boot code will look for a device tree binary
>> 2938 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2939 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2940
>> 2941 This is meant as a backward compatibility convenience for those
>> 2942 systems with a bootloader that can't be upgraded to accommodate
>> 2943 the documented boot protocol using a device tree.
>> 2944
>> 2945 Beware that there is very little in terms of protection against
>> 2946 this option being confused by leftover garbage in memory that might
>> 2947 look like a DTB header after a reboot if no actual DTB is appended
>> 2948 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2949 if you don't intend to always append a DTB.
1014 endchoice 2950 endchoice
1015 2951
1016 config EFI_STUB !! 2952 choice
>> 2953 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
>> 2954 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 2955 !MIPS_MALTA && \
>> 2956 !CAVIUM_OCTEON_SOC
>> 2957 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2958
>> 2959 config MIPS_CMDLINE_FROM_DTB
>> 2960 depends on USE_OF
>> 2961 bool "Dtb kernel arguments if available"
>> 2962
>> 2963 config MIPS_CMDLINE_DTB_EXTEND
>> 2964 depends on USE_OF
>> 2965 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2966
>> 2967 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2968 bool "Bootloader kernel arguments if available"
>> 2969
>> 2970 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 2971 depends on CMDLINE_BOOL
>> 2972 bool "Extend builtin kernel arguments with bootloader arguments"
>> 2973 endchoice
>> 2974
>> 2975 endmenu
>> 2976
>> 2977 config LOCKDEP_SUPPORT
1017 bool 2978 bool
>> 2979 default y
1018 2980
1019 config EFI !! 2981 config STACKTRACE_SUPPORT
1020 bool "UEFI runtime support" !! 2982 bool
1021 depends on OF && !XIP_KERNEL !! 2983 default y
1022 depends on MMU <<
1023 default y <<
1024 select ARCH_SUPPORTS_ACPI if 64BIT <<
1025 select EFI_GENERIC_STUB <<
1026 select EFI_PARAMS_FROM_FDT <<
1027 select EFI_RUNTIME_WRAPPERS <<
1028 select EFI_STUB <<
1029 select LIBFDT <<
1030 select RISCV_ISA_C <<
1031 select UCS2_STRING <<
1032 help <<
1033 This option provides support for ru <<
1034 by UEFI firmware (such as non-volat <<
1035 clock, and platform reset). A UEFI <<
1036 allow the kernel to be booted as an <<
1037 is only useful on systems that have <<
1038 2984
1039 config DMI !! 2985 config HAVE_LATENCYTOP_SUPPORT
1040 bool "Enable support for SMBIOS (DMI) !! 2986 bool
1041 depends on EFI <<
1042 default y 2987 default y
1043 help <<
1044 This enables SMBIOS/DMI feature for <<
1045 2988
1046 This option is only useful on syste !! 2989 config PGTABLE_LEVELS
1047 However, even with this option, the !! 2990 int
1048 continue to boot on existing non-UE !! 2991 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 2992 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 2993 default 2
1049 2994
1050 config CC_HAVE_STACKPROTECTOR_TLS !! 2995 source "init/Kconfig"
1051 def_bool $(cc-option,-mstack-protecto <<
1052 2996
1053 config STACKPROTECTOR_PER_TASK !! 2997 source "kernel/Kconfig.freezer"
1054 def_bool y <<
1055 depends on !RANDSTRUCT <<
1056 depends on STACKPROTECTOR && CC_HAVE_ <<
1057 2998
1058 config PHYS_RAM_BASE_FIXED !! 2999 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
1059 bool "Explicitly specified physical R <<
1060 depends on NONPORTABLE <<
1061 default n <<
1062 3000
1063 config PHYS_RAM_BASE !! 3001 config HW_HAS_EISA
1064 hex "Platform Physical RAM address" !! 3002 bool
1065 depends on PHYS_RAM_BASE_FIXED !! 3003 config HW_HAS_PCI
1066 default "0x80000000" !! 3004 bool
1067 help <<
1068 This is the physical address of RAM <<
1069 explicitly specified to run early r <<
1070 from flash to RAM. <<
1071 <<
1072 config XIP_KERNEL <<
1073 bool "Kernel Execute-In-Place from RO <<
1074 depends on MMU && SPARSEMEM && NONPOR <<
1075 # This prevents XIP from being enable <<
1076 # fail to build since XIP doesn't sup <<
1077 depends on !COMPILE_TEST <<
1078 select PHYS_RAM_BASE_FIXED <<
1079 help <<
1080 Execute-In-Place allows the kernel <<
1081 directly addressable by the CPU, su <<
1082 space since the text section of the <<
1083 to RAM. Read-write sections, such <<
1084 are still copied to RAM. The XIP k <<
1085 it has to run directly from flash, <<
1086 store it. The flash address used t <<
1087 and for storing it, is configuratio <<
1088 say Y here, you must know the prope <<
1089 store the kernel image depending on <<
1090 <<
1091 Also note that the make target beco <<
1092 "make zImage" or "make Image". The <<
1093 ROM memory will be arch/riscv/boot/ <<
1094 <<
1095 SPARSEMEM is required because the k <<
1096 flash resident are not backed by me <<
1097 a struct page on those regions will <<
1098 3005
1099 If unsure, say N. !! 3006 config PCI
>> 3007 bool "Support for PCI controller"
>> 3008 depends on HW_HAS_PCI
>> 3009 select PCI_DOMAINS
>> 3010 help
>> 3011 Find out whether you have a PCI motherboard. PCI is the name of a
>> 3012 bus system, i.e. the way the CPU talks to the other stuff inside
>> 3013 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
>> 3014 say Y, otherwise N.
>> 3015
>> 3016 config HT_PCI
>> 3017 bool "Support for HT-linked PCI"
>> 3018 default y
>> 3019 depends on CPU_LOONGSON3
>> 3020 select PCI
>> 3021 select PCI_DOMAINS
>> 3022 help
>> 3023 Loongson family machines use Hyper-Transport bus for inter-core
>> 3024 connection and device connection. The PCI bus is a subordinate
>> 3025 linked at HT. Choose Y for Loongson-3 based machines.
1100 3026
1101 config XIP_PHYS_ADDR !! 3027 config PCI_DOMAINS
1102 hex "XIP Kernel Physical Location" !! 3028 bool
1103 depends on XIP_KERNEL <<
1104 default "0x21000000" <<
1105 help <<
1106 This is the physical address in you <<
1107 be linked for and stored to. This <<
1108 own flash usage. <<
1109 <<
1110 config RISCV_ISA_FALLBACK <<
1111 bool "Permit falling back to parsing <<
1112 default y <<
1113 help <<
1114 Parsing the "riscv,isa" devicetree <<
1115 replaced by a list of explicitly de <<
1116 with existing platforms, the kernel <<
1117 "riscv,isa" property if the replace <<
1118 <<
1119 Selecting N here will result in a k <<
1120 fallback, unless the commandline "r <<
1121 present. <<
1122 <<
1123 Please see the dt-binding, located <<
1124 Documentation/devicetree/bindings/r <<
1125 on the replacement properties, "ris <<
1126 "riscv,isa-extensions". <<
1127 3029
1128 config BUILTIN_DTB !! 3030 config PCI_DOMAINS_GENERIC
1129 bool "Built-in device tree" !! 3031 bool
1130 depends on OF && NONPORTABLE !! 3032
1131 help !! 3033 config PCI_DRIVERS_GENERIC
1132 Build a device tree into the Linux !! 3034 select PCI_DOMAINS_GENERIC if PCI_DOMAINS
1133 This option should be selected if n !! 3035 bool
1134 If unsure, say N. !! 3036
>> 3037 config PCI_DRIVERS_LEGACY
>> 3038 def_bool !PCI_DRIVERS_GENERIC
>> 3039 select NO_GENERIC_PCI_IOPORT_MAP
>> 3040
>> 3041 source "drivers/pci/Kconfig"
>> 3042
>> 3043 #
>> 3044 # ISA support is now enabled via select. Too many systems still have the one
>> 3045 # or other ISA chip on the board that users don't know about so don't expect
>> 3046 # users to choose the right thing ...
>> 3047 #
>> 3048 config ISA
>> 3049 bool
>> 3050
>> 3051 config EISA
>> 3052 bool "EISA support"
>> 3053 depends on HW_HAS_EISA
>> 3054 select ISA
>> 3055 select GENERIC_ISA_DMA
>> 3056 ---help---
>> 3057 The Extended Industry Standard Architecture (EISA) bus was
>> 3058 developed as an open alternative to the IBM MicroChannel bus.
>> 3059
>> 3060 The EISA bus provided some of the features of the IBM MicroChannel
>> 3061 bus while maintaining backward compatibility with cards made for
>> 3062 the older ISA bus. The EISA bus saw limited use between 1988 and
>> 3063 1995 when it was made obsolete by the PCI bus.
>> 3064
>> 3065 Say Y here if you are building a kernel for an EISA-based machine.
>> 3066
>> 3067 Otherwise, say N.
>> 3068
>> 3069 source "drivers/eisa/Kconfig"
>> 3070
>> 3071 config TC
>> 3072 bool "TURBOchannel support"
>> 3073 depends on MACH_DECSTATION
>> 3074 help
>> 3075 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3076 processors. TURBOchannel programming specifications are available
>> 3077 at:
>> 3078 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3079 and:
>> 3080 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3081 Linux driver support status is documented at:
>> 3082 <http://www.linux-mips.org/wiki/DECstation>
>> 3083
>> 3084 config MMU
>> 3085 bool
>> 3086 default y
>> 3087
>> 3088 config ARCH_MMAP_RND_BITS_MIN
>> 3089 default 12 if 64BIT
>> 3090 default 8
>> 3091
>> 3092 config ARCH_MMAP_RND_BITS_MAX
>> 3093 default 18 if 64BIT
>> 3094 default 15
>> 3095
>> 3096 config ARCH_MMAP_RND_COMPAT_BITS_MIN
>> 3097 default 8
>> 3098
>> 3099 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3100 default 15
>> 3101
>> 3102 config I8253
>> 3103 bool
>> 3104 select CLKSRC_I8253
>> 3105 select CLKEVT_I8253
>> 3106 select MIPS_EXTERNAL_TIMER
1135 3107
>> 3108 config ZONE_DMA
>> 3109 bool
>> 3110
>> 3111 config ZONE_DMA32
>> 3112 bool
1136 3113
1137 config BUILTIN_DTB_SOURCE !! 3114 source "drivers/pcmcia/Kconfig"
1138 string "Built-in device tree source" !! 3115
1139 depends on BUILTIN_DTB !! 3116 config RAPIDIO
>> 3117 tristate "RapidIO support"
>> 3118 depends on PCI
>> 3119 default n
1140 help 3120 help
1141 DTS file path (without suffix, rela !! 3121 If you say Y here, the kernel will include drivers and
1142 for the DTS file that will be used !! 3122 infrastructure code to support RapidIO interconnect devices.
1143 kernel. !! 3123
>> 3124 source "drivers/rapidio/Kconfig"
1144 3125
1145 endmenu # "Boot options" !! 3126 endmenu
1146 3127
1147 config PORTABLE !! 3128 menu "Executable file formats"
>> 3129
>> 3130 source "fs/Kconfig.binfmt"
>> 3131
>> 3132 config TRAD_SIGNALS
1148 bool 3133 bool
1149 default !NONPORTABLE <<
1150 select EFI <<
1151 select MMU <<
1152 select OF <<
1153 3134
1154 config ARCH_PROC_KCORE_TEXT !! 3135 config MIPS32_COMPAT
1155 def_bool y !! 3136 bool
1156 3137
1157 menu "Power management options" !! 3138 config COMPAT
>> 3139 bool
1158 3140
1159 source "kernel/power/Kconfig" !! 3141 config SYSVIPC_COMPAT
>> 3142 bool
>> 3143
>> 3144 config MIPS32_O32
>> 3145 bool "Kernel support for o32 binaries"
>> 3146 depends on 64BIT
>> 3147 select ARCH_WANT_OLD_COMPAT_IPC
>> 3148 select COMPAT
>> 3149 select MIPS32_COMPAT
>> 3150 select SYSVIPC_COMPAT if SYSVIPC
>> 3151 help
>> 3152 Select this option if you want to run o32 binaries. These are pure
>> 3153 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3154 existing binaries are in this format.
>> 3155
>> 3156 If unsure, say Y.
>> 3157
>> 3158 config MIPS32_N32
>> 3159 bool "Kernel support for n32 binaries"
>> 3160 depends on 64BIT
>> 3161 select COMPAT
>> 3162 select MIPS32_COMPAT
>> 3163 select SYSVIPC_COMPAT if SYSVIPC
>> 3164 help
>> 3165 Select this option if you want to run n32 binaries. These are
>> 3166 64-bit binaries using 32-bit quantities for addressing and certain
>> 3167 data that would normally be 64-bit. They are used in special
>> 3168 cases.
>> 3169
>> 3170 If unsure, say N.
>> 3171
>> 3172 config BINFMT_ELF32
>> 3173 bool
>> 3174 default y if MIPS32_O32 || MIPS32_N32
>> 3175 select ELFCORE
>> 3176
>> 3177 endmenu
>> 3178
>> 3179 menu "Power management options"
1160 3180
1161 config ARCH_HIBERNATION_POSSIBLE 3181 config ARCH_HIBERNATION_POSSIBLE
1162 def_bool y 3182 def_bool y
1163 !! 3183 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
1164 config ARCH_HIBERNATION_HEADER <<
1165 def_bool HIBERNATION <<
1166 3184
1167 config ARCH_SUSPEND_POSSIBLE 3185 config ARCH_SUSPEND_POSSIBLE
1168 def_bool y 3186 def_bool y
>> 3187 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
1169 3188
1170 endmenu # "Power management options" !! 3189 source "kernel/power/Kconfig"
>> 3190
>> 3191 endmenu
>> 3192
>> 3193 config MIPS_EXTERNAL_TIMER
>> 3194 bool
1171 3195
1172 menu "CPU Power Management" 3196 menu "CPU Power Management"
1173 3197
>> 3198 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3199 source "drivers/cpufreq/Kconfig"
>> 3200 endif
>> 3201
1174 source "drivers/cpuidle/Kconfig" 3202 source "drivers/cpuidle/Kconfig"
1175 3203
1176 source "drivers/cpufreq/Kconfig" !! 3204 endmenu
>> 3205
>> 3206 source "net/Kconfig"
>> 3207
>> 3208 source "drivers/Kconfig"
>> 3209
>> 3210 source "drivers/firmware/Kconfig"
>> 3211
>> 3212 source "fs/Kconfig"
>> 3213
>> 3214 source "arch/mips/Kconfig.debug"
>> 3215
>> 3216 source "security/Kconfig"
1177 3217
1178 endmenu # "CPU Power Management" !! 3218 source "crypto/Kconfig"
1179 3219
1180 source "arch/riscv/kvm/Kconfig" !! 3220 source "lib/Kconfig"
1181 3221
1182 source "drivers/acpi/Kconfig" !! 3222 source "arch/mips/kvm/Kconfig"
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