1 # SPDX-License-Identifier: GPL-2.0-only !! 1 # SPDX-License-Identifier: GPL-2.0
2 # !! 2 config MIPS
3 # For a description of the syntax of this conf <<
4 # see Documentation/kbuild/kconfig-language.rs <<
5 # <<
6 <<
7 config 64BIT <<
8 bool 3 bool
9 !! 4 default y
10 config 32BIT !! 5 select ARCH_32BIT_OFF_T if !64BIT
11 bool !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
12 !! 7 select ARCH_CLOCKSOURCE_DATA
13 config RISCV !! 8 select ARCH_HAS_CPU_FINALIZE_INIT
14 def_bool y <<
15 select ACPI_GENERIC_GSI if ACPI <<
16 select ACPI_MCFG if (ACPI && PCI) <<
17 select ACPI_PPTT if ACPI <<
18 select ACPI_REDUCED_HARDWARE_ONLY if A <<
19 select ACPI_SPCR_TABLE if ACPI <<
20 select ARCH_DMA_DEFAULT_COHERENT <<
21 select ARCH_ENABLE_HUGEPAGE_MIGRATION <<
22 select ARCH_ENABLE_MEMORY_HOTPLUG if S <<
23 select ARCH_ENABLE_MEMORY_HOTREMOVE if <<
24 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if <<
25 select ARCH_ENABLE_THP_MIGRATION if TR <<
26 select ARCH_HAS_BINFMT_FLAT <<
27 select ARCH_HAS_CURRENT_STACK_POINTER <<
28 select ARCH_HAS_DEBUG_VIRTUAL if MMU <<
29 select ARCH_HAS_DEBUG_VM_PGTABLE <<
30 select ARCH_HAS_DEBUG_WX <<
31 select ARCH_HAS_FAST_MULTIPLIER <<
32 select ARCH_HAS_FORTIFY_SOURCE <<
33 select ARCH_HAS_GCOV_PROFILE_ALL <<
34 select ARCH_HAS_GIGANTIC_PAGE <<
35 select ARCH_HAS_KCOV <<
36 select ARCH_HAS_KERNEL_FPU_SUPPORT if <<
37 select ARCH_HAS_MEMBARRIER_CALLBACKS <<
38 select ARCH_HAS_MEMBARRIER_SYNC_CORE <<
39 select ARCH_HAS_MMIOWB <<
40 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
41 select ARCH_HAS_PMEM_API <<
42 select ARCH_HAS_PREPARE_SYNC_CORE_CMD <<
43 select ARCH_HAS_PTE_DEVMAP if 64BIT && <<
44 select ARCH_HAS_PTE_SPECIAL <<
45 select ARCH_HAS_SET_DIRECT_MAP if MMU <<
46 select ARCH_HAS_SET_MEMORY if MMU <<
47 select ARCH_HAS_STRICT_KERNEL_RWX if M <<
48 select ARCH_HAS_STRICT_MODULE_RWX if M <<
49 select ARCH_HAS_SYNC_CORE_BEFORE_USERM <<
50 select ARCH_HAS_SYSCALL_WRAPPER <<
51 select ARCH_HAS_TICK_BROADCAST if GENE 9 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
52 select ARCH_HAS_UBSAN !! 10 select ARCH_HAS_UBSAN_SANITIZE_ALL
53 select ARCH_HAS_VDSO_DATA !! 11 select ARCH_SUPPORTS_UPROBES
54 select ARCH_KEEP_MEMBLOCK if ACPI !! 12 select ARCH_USE_BUILTIN_BSWAP
55 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL <<
56 select ARCH_OPTIONAL_KERNEL_RWX if ARC <<
57 select ARCH_OPTIONAL_KERNEL_RWX_DEFAUL <<
58 select ARCH_STACKWALK <<
59 select ARCH_SUPPORTS_ATOMIC_RMW <<
60 select ARCH_SUPPORTS_CFI_CLANG <<
61 select ARCH_SUPPORTS_DEBUG_PAGEALLOC i <<
62 select ARCH_SUPPORTS_HUGETLBFS if MMU <<
63 # LLD >= 14: https://github.com/llvm/l <<
64 select ARCH_SUPPORTS_LTO_CLANG if LLD_ <<
65 select ARCH_SUPPORTS_LTO_CLANG_THIN if <<
66 select ARCH_SUPPORTS_PAGE_TABLE_CHECK <<
67 select ARCH_SUPPORTS_PER_VMA_LOCK if M <<
68 select ARCH_SUPPORTS_RT <<
69 select ARCH_SUPPORTS_SHADOW_CALL_STACK <<
70 select ARCH_USE_CMPXCHG_LOCKREF if 64B 13 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
71 select ARCH_USE_MEMTEST <<
72 select ARCH_USE_QUEUED_RWLOCKS 14 select ARCH_USE_QUEUED_RWLOCKS
73 select ARCH_USE_SYM_ANNOTATIONS !! 15 select ARCH_USE_QUEUED_SPINLOCKS
74 select ARCH_USES_CFI_TRAPS if CFI_CLAN <<
75 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU <<
76 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ 16 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
77 select ARCH_WANT_FRAME_POINTERS !! 17 select ARCH_WANT_IPC_PARSE_VERSION
78 select ARCH_WANT_GENERAL_HUGETLB if !R !! 18 select BUILDTIME_EXTABLE_SORT
79 select ARCH_WANT_HUGE_PMD_SHARE if 64B <<
80 select ARCH_WANT_LD_ORPHAN_WARN if !XI <<
81 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
82 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM <<
83 select ARCH_WANTS_NO_INSTR <<
84 select ARCH_WANTS_THP_SWAP if HAVE_ARC <<
85 select BINFMT_FLAT_NO_DATA_START_OFFSE <<
86 select BUILDTIME_TABLE_SORT if MMU <<
87 select CLINT_TIMER if RISCV_M_MODE <<
88 select CLONE_BACKWARDS 19 select CLONE_BACKWARDS
89 select COMMON_CLK !! 20 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
90 select CPU_PM if CPU_IDLE || HIBERNATI !! 21 select CPU_PM if CPU_IDLE
91 select EDAC_SUPPORT <<
92 select FRAME_POINTER if PERF_EVENTS || <<
93 select FTRACE_MCOUNT_USE_PATCHABLE_FUN <<
94 select GENERIC_ARCH_TOPOLOGY <<
95 select GENERIC_ATOMIC64 if !64BIT 22 select GENERIC_ATOMIC64 if !64BIT
96 select GENERIC_CLOCKEVENTS_BROADCAST i !! 23 select GENERIC_CLOCKEVENTS
97 select GENERIC_CPU_DEVICES !! 24 select GENERIC_CMOS_UPDATE
98 select GENERIC_CPU_VULNERABILITIES !! 25 select GENERIC_CPU_AUTOPROBE
99 select GENERIC_EARLY_IOREMAP !! 26 select GENERIC_GETTIMEOFDAY
100 select GENERIC_ENTRY !! 27 select GENERIC_IOMAP
101 select GENERIC_GETTIMEOFDAY if HAVE_GE !! 28 select GENERIC_IRQ_PROBE
102 select GENERIC_IDLE_POLL_SETUP <<
103 select GENERIC_IOREMAP if MMU <<
104 select GENERIC_IRQ_IPI if SMP <<
105 select GENERIC_IRQ_IPI_MUX if SMP <<
106 select GENERIC_IRQ_MULTI_HANDLER <<
107 select GENERIC_IRQ_SHOW 29 select GENERIC_IRQ_SHOW
108 select GENERIC_IRQ_SHOW_LEVEL !! 30 select GENERIC_ISA_DMA if EISA
109 select GENERIC_LIB_DEVMEM_IS_ALLOWED !! 31 select GENERIC_LIB_ASHLDI3
110 select GENERIC_PCI_IOMAP !! 32 select GENERIC_LIB_ASHRDI3
111 select GENERIC_PTDUMP if MMU !! 33 select GENERIC_LIB_CMPDI2
112 select GENERIC_SCHED_CLOCK !! 34 select GENERIC_LIB_LSHRDI3
>> 35 select GENERIC_LIB_UCMPDI2
>> 36 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
113 select GENERIC_SMP_IDLE_THREAD 37 select GENERIC_SMP_IDLE_THREAD
114 select GENERIC_TIME_VSYSCALL if MMU && !! 38 select GENERIC_TIME_VSYSCALL
115 select GENERIC_VDSO_TIME_NS if HAVE_GE !! 39 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
116 select HARDIRQS_SW_RESEND !! 40 select HANDLE_DOMAIN_IRQ
117 select HAS_IOPORT if MMU !! 41 select HAVE_ARCH_COMPILER_H
118 select HAVE_ARCH_AUDITSYSCALL !! 42 select HAVE_ARCH_JUMP_LABEL
119 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ !! 43 select HAVE_ARCH_KGDB
120 select HAVE_ARCH_HUGE_VMAP if MMU && 6 <<
121 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
122 select HAVE_ARCH_JUMP_LABEL_RELATIVE i <<
123 select HAVE_ARCH_KASAN if MMU && 64BIT <<
124 select HAVE_ARCH_KASAN_VMALLOC if MMU <<
125 select HAVE_ARCH_KFENCE if MMU && 64BI <<
126 select HAVE_ARCH_KGDB if !XIP_KERNEL <<
127 select HAVE_ARCH_KGDB_QXFER_PKT <<
128 select HAVE_ARCH_MMAP_RND_BITS if MMU 44 select HAVE_ARCH_MMAP_RND_BITS if MMU
129 select HAVE_ARCH_MMAP_RND_COMPAT_BITS !! 45 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
130 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
131 select HAVE_ARCH_SECCOMP_FILTER 46 select HAVE_ARCH_SECCOMP_FILTER
132 select HAVE_ARCH_STACKLEAK <<
133 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
134 select HAVE_ARCH_TRACEHOOK 47 select HAVE_ARCH_TRACEHOOK
135 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 48 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
136 select HAVE_ARCH_USERFAULTFD_MINOR if <<
137 select HAVE_ARCH_VMAP_STACK if MMU && <<
138 select HAVE_ASM_MODVERSIONS 49 select HAVE_ASM_MODVERSIONS
139 select HAVE_CONTEXT_TRACKING_USER !! 50 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
>> 51 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
>> 52 select HAVE_CONTEXT_TRACKING
>> 53 select HAVE_COPY_THREAD_TLS
>> 54 select HAVE_C_RECORDMCOUNT
140 select HAVE_DEBUG_KMEMLEAK 55 select HAVE_DEBUG_KMEMLEAK
141 select HAVE_DMA_CONTIGUOUS if MMU !! 56 select HAVE_DEBUG_STACKOVERFLOW
142 select HAVE_DYNAMIC_FTRACE if !XIP_KER !! 57 select HAVE_DMA_CONTIGUOUS
143 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT !! 58 select HAVE_DYNAMIC_FTRACE
144 select HAVE_DYNAMIC_FTRACE_WITH_ARGS i !! 59 select HAVE_EXIT_THREAD
145 select HAVE_FTRACE_MCOUNT_RECORD if !X !! 60 select HAVE_FAST_GUP
>> 61 select HAVE_FTRACE_MCOUNT_RECORD
146 select HAVE_FUNCTION_GRAPH_TRACER 62 select HAVE_FUNCTION_GRAPH_TRACER
147 select HAVE_FUNCTION_GRAPH_RETVAL if H !! 63 select HAVE_FUNCTION_TRACER
148 select HAVE_FUNCTION_TRACER if !XIP_KE !! 64 select HAVE_IDE
149 select HAVE_EBPF_JIT if MMU !! 65 select HAVE_IOREMAP_PROT
150 select HAVE_GUP_FAST if MMU !! 66 select HAVE_IRQ_EXIT_ON_IRQ_STACK
151 select HAVE_FUNCTION_ARG_ACCESS_API <<
152 select HAVE_FUNCTION_ERROR_INJECTION <<
153 select HAVE_GCC_PLUGINS <<
154 select HAVE_GENERIC_VDSO if MMU && 64B <<
155 select HAVE_IRQ_TIME_ACCOUNTING 67 select HAVE_IRQ_TIME_ACCOUNTING
156 select HAVE_KERNEL_BZIP2 if !XIP_KERNE !! 68 select HAVE_KPROBES
157 select HAVE_KERNEL_GZIP if !XIP_KERNEL !! 69 select HAVE_KRETPROBES
158 select HAVE_KERNEL_LZ4 if !XIP_KERNEL !! 70 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
159 select HAVE_KERNEL_LZMA if !XIP_KERNEL !! 71 select HAVE_MEMBLOCK_NODE_MAP
160 select HAVE_KERNEL_LZO if !XIP_KERNEL !! 72 select HAVE_MOD_ARCH_SPECIFIC
161 select HAVE_KERNEL_UNCOMPRESSED if !XI !! 73 select HAVE_NMI
162 select HAVE_KERNEL_ZSTD if !XIP_KERNEL !! 74 select HAVE_OPROFILE
163 select HAVE_KERNEL_XZ if !XIP_KERNEL & <<
164 select HAVE_KPROBES if !XIP_KERNEL <<
165 select HAVE_KRETPROBES if !XIP_KERNEL <<
166 # https://github.com/ClangBuiltLinux/l <<
167 select HAVE_LD_DEAD_CODE_DATA_ELIMINAT <<
168 select HAVE_MOVE_PMD <<
169 select HAVE_MOVE_PUD <<
170 select HAVE_PAGE_SIZE_4KB <<
171 select HAVE_PCI <<
172 select HAVE_PERF_EVENTS 75 select HAVE_PERF_EVENTS
173 select HAVE_PERF_REGS <<
174 select HAVE_PERF_USER_STACK_DUMP <<
175 select HAVE_POSIX_CPU_TIMERS_TASK_WORK <<
176 select HAVE_PREEMPT_DYNAMIC_KEY if !XI <<
177 select HAVE_REGS_AND_STACK_ACCESS_API 76 select HAVE_REGS_AND_STACK_ACCESS_API
178 select HAVE_RETHOOK if !XIP_KERNEL <<
179 select HAVE_RSEQ 77 select HAVE_RSEQ
180 select HAVE_RUST if RUSTC_SUPPORTS_RIS <<
181 select HAVE_SAMPLE_FTRACE_DIRECT <<
182 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI <<
183 select HAVE_STACKPROTECTOR 78 select HAVE_STACKPROTECTOR
184 select HAVE_SYSCALL_TRACEPOINTS 79 select HAVE_SYSCALL_TRACEPOINTS
185 select HOTPLUG_CORE_SYNC_DEAD if HOTPL !! 80 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
186 select IRQ_DOMAIN !! 81 select HAVE_GENERIC_VDSO
187 select IRQ_FORCED_THREADING 82 select IRQ_FORCED_THREADING
188 select KASAN_VMALLOC if KASAN !! 83 select ISA if EISA
189 select LOCK_MM_AND_FIND_VMA !! 84 select MODULES_USE_ELF_RELA if MODULES && 64BIT
190 select MMU_GATHER_RCU_TABLE_FREE if SM !! 85 select MODULES_USE_ELF_REL if MODULES
191 select MODULES_USE_ELF_RELA if MODULES !! 86 select PERF_USE_VMALLOC
192 select OF !! 87 select RTC_LIB
193 select OF_EARLY_FLATTREE <<
194 select OF_IRQ <<
195 select PCI_DOMAINS_GENERIC if PCI <<
196 select PCI_ECAM if (ACPI && PCI) <<
197 select PCI_MSI if PCI <<
198 select RISCV_ALTERNATIVE if !XIP_KERNE <<
199 select RISCV_APLIC <<
200 select RISCV_IMSIC <<
201 select RISCV_INTC <<
202 select RISCV_TIMER if RISCV_SBI <<
203 select SIFIVE_PLIC <<
204 select SPARSE_IRQ <<
205 select SYSCTL_EXCEPTION_TRACE 88 select SYSCTL_EXCEPTION_TRACE
206 select THREAD_INFO_IN_TASK !! 89 select VIRT_TO_BUS
207 select TRACE_IRQFLAGS_SUPPORT !! 90 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
208 select UACCESS_MEMCPY if !MMU !! 91
209 select USER_STACKTRACE_SUPPORT !! 92 menu "Machine selection"
>> 93
>> 94 choice
>> 95 prompt "System type"
>> 96 default MIPS_GENERIC
>> 97
>> 98 config MIPS_GENERIC
>> 99 bool "Generic board-agnostic MIPS kernel"
>> 100 select BOOT_RAW
>> 101 select BUILTIN_DTB
>> 102 select CEVT_R4K
>> 103 select CLKSRC_MIPS_GIC
>> 104 select COMMON_CLK
>> 105 select CPU_MIPSR2_IRQ_VI
>> 106 select CPU_MIPSR2_IRQ_EI
>> 107 select CSRC_R4K
>> 108 select DMA_PERDEV_COHERENT
>> 109 select HAVE_PCI
>> 110 select IRQ_MIPS_CPU
>> 111 select LIBFDT
>> 112 select MIPS_AUTO_PFN_OFFSET
>> 113 select MIPS_CPU_SCACHE
>> 114 select MIPS_GIC
>> 115 select MIPS_L1_CACHE_SHIFT_7
>> 116 select NO_EXCEPT_FILL
>> 117 select PCI_DRIVERS_GENERIC
>> 118 select PINCTRL
>> 119 select SMP_UP if SMP
>> 120 select SWAP_IO_SPACE
>> 121 select SYS_HAS_CPU_MIPS32_R1
>> 122 select SYS_HAS_CPU_MIPS32_R2
>> 123 select SYS_HAS_CPU_MIPS32_R6
>> 124 select SYS_HAS_CPU_MIPS64_R1
>> 125 select SYS_HAS_CPU_MIPS64_R2
>> 126 select SYS_HAS_CPU_MIPS64_R6
>> 127 select SYS_SUPPORTS_32BIT_KERNEL
>> 128 select SYS_SUPPORTS_64BIT_KERNEL
>> 129 select SYS_SUPPORTS_BIG_ENDIAN
>> 130 select SYS_SUPPORTS_HIGHMEM
>> 131 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 132 select SYS_SUPPORTS_MICROMIPS
>> 133 select SYS_SUPPORTS_MIPS_CPS
>> 134 select SYS_SUPPORTS_MIPS16
>> 135 select SYS_SUPPORTS_MULTITHREADING
>> 136 select SYS_SUPPORTS_RELOCATABLE
>> 137 select SYS_SUPPORTS_SMARTMIPS
>> 138 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 139 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 140 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 141 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 142 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 143 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 144 select USE_OF
>> 145 select UHI_BOOT
>> 146 help
>> 147 Select this to build a kernel which aims to support multiple boards,
>> 148 generally using a flattened device tree passed from the bootloader
>> 149 using the boot protocol defined in the UHI (Unified Hosting
>> 150 Interface) specification.
>> 151
>> 152 config MIPS_ALCHEMY
>> 153 bool "Alchemy processor based machines"
>> 154 select PHYS_ADDR_T_64BIT
>> 155 select CEVT_R4K
>> 156 select CSRC_R4K
>> 157 select IRQ_MIPS_CPU
>> 158 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 159 select SYS_HAS_CPU_MIPS32_R1
>> 160 select SYS_SUPPORTS_32BIT_KERNEL
>> 161 select SYS_SUPPORTS_APM_EMULATION
>> 162 select GPIOLIB
>> 163 select SYS_SUPPORTS_ZBOOT
>> 164 select COMMON_CLK
>> 165
>> 166 config AR7
>> 167 bool "Texas Instruments AR7"
>> 168 select BOOT_ELF32
>> 169 select DMA_NONCOHERENT
>> 170 select CEVT_R4K
>> 171 select CSRC_R4K
>> 172 select IRQ_MIPS_CPU
>> 173 select NO_EXCEPT_FILL
>> 174 select SWAP_IO_SPACE
>> 175 select SYS_HAS_CPU_MIPS32_R1
>> 176 select SYS_HAS_EARLY_PRINTK
>> 177 select SYS_SUPPORTS_32BIT_KERNEL
>> 178 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 179 select SYS_SUPPORTS_MIPS16
>> 180 select SYS_SUPPORTS_ZBOOT_UART16550
>> 181 select GPIOLIB
>> 182 select VLYNQ
>> 183 select HAVE_CLK
>> 184 help
>> 185 Support for the Texas Instruments AR7 System-on-a-Chip
>> 186 family: TNETD7100, 7200 and 7300.
>> 187
>> 188 config ATH25
>> 189 bool "Atheros AR231x/AR531x SoC support"
>> 190 select CEVT_R4K
>> 191 select CSRC_R4K
>> 192 select DMA_NONCOHERENT
>> 193 select IRQ_MIPS_CPU
>> 194 select IRQ_DOMAIN
>> 195 select SYS_HAS_CPU_MIPS32_R1
>> 196 select SYS_SUPPORTS_BIG_ENDIAN
>> 197 select SYS_SUPPORTS_32BIT_KERNEL
>> 198 select SYS_HAS_EARLY_PRINTK
>> 199 help
>> 200 Support for Atheros AR231x and Atheros AR531x based boards
>> 201
>> 202 config ATH79
>> 203 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 204 select ARCH_HAS_RESET_CONTROLLER
>> 205 select BOOT_RAW
>> 206 select CEVT_R4K
>> 207 select CSRC_R4K
>> 208 select DMA_NONCOHERENT
>> 209 select GPIOLIB
>> 210 select PINCTRL
>> 211 select HAVE_CLK
>> 212 select COMMON_CLK
>> 213 select CLKDEV_LOOKUP
>> 214 select IRQ_MIPS_CPU
>> 215 select SYS_HAS_CPU_MIPS32_R2
>> 216 select SYS_HAS_EARLY_PRINTK
>> 217 select SYS_SUPPORTS_32BIT_KERNEL
>> 218 select SYS_SUPPORTS_BIG_ENDIAN
>> 219 select SYS_SUPPORTS_MIPS16
>> 220 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 221 select USE_OF
>> 222 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 223 help
>> 224 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 225
>> 226 config BMIPS_GENERIC
>> 227 bool "Broadcom Generic BMIPS kernel"
>> 228 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 229 select ARCH_HAS_PHYS_TO_DMA
>> 230 select BOOT_RAW
>> 231 select NO_EXCEPT_FILL
>> 232 select USE_OF
>> 233 select CEVT_R4K
>> 234 select CSRC_R4K
>> 235 select SYNC_R4K
>> 236 select COMMON_CLK
>> 237 select BCM6345_L1_IRQ
>> 238 select BCM7038_L1_IRQ
>> 239 select BCM7120_L2_IRQ
>> 240 select BRCMSTB_L2_IRQ
>> 241 select IRQ_MIPS_CPU
>> 242 select DMA_NONCOHERENT
>> 243 select SYS_SUPPORTS_32BIT_KERNEL
>> 244 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 245 select SYS_SUPPORTS_BIG_ENDIAN
>> 246 select SYS_SUPPORTS_HIGHMEM
>> 247 select SYS_HAS_CPU_BMIPS32_3300
>> 248 select SYS_HAS_CPU_BMIPS4350
>> 249 select SYS_HAS_CPU_BMIPS4380
>> 250 select SYS_HAS_CPU_BMIPS5000
>> 251 select SWAP_IO_SPACE
>> 252 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 253 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 254 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 255 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 256 select HARDIRQS_SW_RESEND
>> 257 help
>> 258 Build a generic DT-based kernel image that boots on select
>> 259 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 260 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 261 must be set appropriately for your board.
>> 262
>> 263 config BCM47XX
>> 264 bool "Broadcom BCM47XX based boards"
>> 265 select BOOT_RAW
>> 266 select CEVT_R4K
>> 267 select CSRC_R4K
>> 268 select DMA_NONCOHERENT
>> 269 select HAVE_PCI
>> 270 select IRQ_MIPS_CPU
>> 271 select SYS_HAS_CPU_MIPS32_R1
>> 272 select NO_EXCEPT_FILL
>> 273 select SYS_SUPPORTS_32BIT_KERNEL
>> 274 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 275 select SYS_SUPPORTS_MIPS16
>> 276 select SYS_SUPPORTS_ZBOOT
>> 277 select SYS_HAS_EARLY_PRINTK
>> 278 select USE_GENERIC_EARLY_PRINTK_8250
>> 279 select GPIOLIB
>> 280 select LEDS_GPIO_REGISTER
>> 281 select BCM47XX_NVRAM
>> 282 select BCM47XX_SPROM
>> 283 select BCM47XX_SSB if !BCM47XX_BCMA
>> 284 help
>> 285 Support for BCM47XX based boards
>> 286
>> 287 config BCM63XX
>> 288 bool "Broadcom BCM63XX based boards"
>> 289 select BOOT_RAW
>> 290 select CEVT_R4K
>> 291 select CSRC_R4K
>> 292 select SYNC_R4K
>> 293 select DMA_NONCOHERENT
>> 294 select IRQ_MIPS_CPU
>> 295 select SYS_SUPPORTS_32BIT_KERNEL
>> 296 select SYS_SUPPORTS_BIG_ENDIAN
>> 297 select SYS_HAS_EARLY_PRINTK
>> 298 select SYS_HAS_CPU_BMIPS32_3300
>> 299 select SYS_HAS_CPU_BMIPS4350
>> 300 select SYS_HAS_CPU_BMIPS4380
>> 301 select SWAP_IO_SPACE
>> 302 select GPIOLIB
>> 303 select HAVE_CLK
>> 304 select MIPS_L1_CACHE_SHIFT_4
>> 305 select CLKDEV_LOOKUP
>> 306 help
>> 307 Support for BCM63XX based boards
>> 308
>> 309 config MIPS_COBALT
>> 310 bool "Cobalt Server"
>> 311 select CEVT_R4K
>> 312 select CSRC_R4K
>> 313 select CEVT_GT641XX
>> 314 select DMA_NONCOHERENT
>> 315 select FORCE_PCI
>> 316 select I8253
>> 317 select I8259
>> 318 select IRQ_MIPS_CPU
>> 319 select IRQ_GT641XX
>> 320 select PCI_GT64XXX_PCI0
>> 321 select SYS_HAS_CPU_NEVADA
>> 322 select SYS_HAS_EARLY_PRINTK
>> 323 select SYS_SUPPORTS_32BIT_KERNEL
>> 324 select SYS_SUPPORTS_64BIT_KERNEL
>> 325 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 326 select USE_GENERIC_EARLY_PRINTK_8250
>> 327
>> 328 config MACH_DECSTATION
>> 329 bool "DECstations"
>> 330 select BOOT_ELF32
>> 331 select CEVT_DS1287
>> 332 select CEVT_R4K if CPU_R4X00
>> 333 select CSRC_IOASIC
>> 334 select CSRC_R4K if CPU_R4X00
>> 335 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 336 select CPU_R4000_WORKAROUNDS if 64BIT
>> 337 select CPU_R4400_WORKAROUNDS if 64BIT
>> 338 select DMA_NONCOHERENT
>> 339 select NO_IOPORT_MAP
>> 340 select IRQ_MIPS_CPU
>> 341 select SYS_HAS_CPU_R3000
>> 342 select SYS_HAS_CPU_R4X00
>> 343 select SYS_SUPPORTS_32BIT_KERNEL
>> 344 select SYS_SUPPORTS_64BIT_KERNEL
>> 345 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 346 select SYS_SUPPORTS_128HZ
>> 347 select SYS_SUPPORTS_256HZ
>> 348 select SYS_SUPPORTS_1024HZ
>> 349 select MIPS_L1_CACHE_SHIFT_4
>> 350 help
>> 351 This enables support for DEC's MIPS based workstations. For details
>> 352 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 353 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 354
>> 355 If you have one of the following DECstation Models you definitely
>> 356 want to choose R4xx0 for the CPU Type:
>> 357
>> 358 DECstation 5000/50
>> 359 DECstation 5000/150
>> 360 DECstation 5000/260
>> 361 DECsystem 5900/260
>> 362
>> 363 otherwise choose R3000.
>> 364
>> 365 config MACH_JAZZ
>> 366 bool "Jazz family of machines"
>> 367 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 368 select ARCH_MIGHT_HAVE_PC_SERIO
>> 369 select FW_ARC
>> 370 select FW_ARC32
>> 371 select ARCH_MAY_HAVE_PC_FDC
>> 372 select CEVT_R4K
>> 373 select CSRC_R4K
>> 374 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 375 select GENERIC_ISA_DMA
>> 376 select HAVE_PCSPKR_PLATFORM
>> 377 select IRQ_MIPS_CPU
>> 378 select I8253
>> 379 select I8259
>> 380 select ISA
>> 381 select SYS_HAS_CPU_R4X00
>> 382 select SYS_SUPPORTS_32BIT_KERNEL
>> 383 select SYS_SUPPORTS_64BIT_KERNEL
>> 384 select SYS_SUPPORTS_100HZ
>> 385 help
>> 386 This a family of machines based on the MIPS R4030 chipset which was
>> 387 used by several vendors to build RISC/os and Windows NT workstations.
>> 388 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 389 Olivetti M700-10 workstations.
>> 390
>> 391 config MACH_INGENIC
>> 392 bool "Ingenic SoC based machines"
>> 393 select SYS_SUPPORTS_32BIT_KERNEL
>> 394 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 395 select SYS_SUPPORTS_ZBOOT_UART16550
>> 396 select CPU_SUPPORTS_HUGEPAGES
>> 397 select DMA_NONCOHERENT
>> 398 select IRQ_MIPS_CPU
>> 399 select PINCTRL
>> 400 select GPIOLIB
>> 401 select COMMON_CLK
>> 402 select GENERIC_IRQ_CHIP
>> 403 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 404 select USE_OF
>> 405 select LIBFDT
>> 406
>> 407 config LANTIQ
>> 408 bool "Lantiq based platforms"
>> 409 select DMA_NONCOHERENT
>> 410 select IRQ_MIPS_CPU
>> 411 select CEVT_R4K
>> 412 select CSRC_R4K
>> 413 select SYS_HAS_CPU_MIPS32_R1
>> 414 select SYS_HAS_CPU_MIPS32_R2
>> 415 select SYS_SUPPORTS_BIG_ENDIAN
>> 416 select SYS_SUPPORTS_32BIT_KERNEL
>> 417 select SYS_SUPPORTS_MIPS16
>> 418 select SYS_SUPPORTS_MULTITHREADING
>> 419 select SYS_SUPPORTS_VPE_LOADER
>> 420 select SYS_HAS_EARLY_PRINTK
>> 421 select GPIOLIB
>> 422 select SWAP_IO_SPACE
>> 423 select BOOT_RAW
>> 424 select CLKDEV_LOOKUP
>> 425 select USE_OF
>> 426 select PINCTRL
>> 427 select PINCTRL_LANTIQ
>> 428 select ARCH_HAS_RESET_CONTROLLER
>> 429 select RESET_CONTROLLER
>> 430
>> 431 config LASAT
>> 432 bool "LASAT Networks platforms"
>> 433 select CEVT_R4K
>> 434 select CRC32
>> 435 select CSRC_R4K
>> 436 select DMA_NONCOHERENT
>> 437 select SYS_HAS_EARLY_PRINTK
>> 438 select HAVE_PCI
>> 439 select IRQ_MIPS_CPU
>> 440 select PCI_GT64XXX_PCI0
>> 441 select MIPS_NILE4
>> 442 select R5000_CPU_SCACHE
>> 443 select SYS_HAS_CPU_R5000
>> 444 select SYS_SUPPORTS_32BIT_KERNEL
>> 445 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 446 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 447
>> 448 config MACH_LOONGSON32
>> 449 bool "Loongson-1 family of machines"
>> 450 select SYS_SUPPORTS_ZBOOT
>> 451 help
>> 452 This enables support for the Loongson-1 family of machines.
>> 453
>> 454 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 455 the Institute of Computing Technology (ICT), Chinese Academy of
>> 456 Sciences (CAS).
>> 457
>> 458 config MACH_LOONGSON64
>> 459 bool "Loongson-2/3 family of machines"
>> 460 select SYS_SUPPORTS_ZBOOT
>> 461 help
>> 462 This enables the support of Loongson-2/3 family of machines.
>> 463
>> 464 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 465 family of multi-core CPUs. They are both 64-bit general-purpose
>> 466 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 467 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 468 in the People's Republic of China. The chief architect is Professor
>> 469 Weiwu Hu.
>> 470
>> 471 config MACH_PISTACHIO
>> 472 bool "IMG Pistachio SoC based boards"
>> 473 select BOOT_ELF32
>> 474 select BOOT_RAW
>> 475 select CEVT_R4K
>> 476 select CLKSRC_MIPS_GIC
>> 477 select COMMON_CLK
>> 478 select CSRC_R4K
>> 479 select DMA_NONCOHERENT
>> 480 select GPIOLIB
>> 481 select IRQ_MIPS_CPU
>> 482 select LIBFDT
>> 483 select MFD_SYSCON
>> 484 select MIPS_CPU_SCACHE
>> 485 select MIPS_GIC
>> 486 select PINCTRL
>> 487 select REGULATOR
>> 488 select SYS_HAS_CPU_MIPS32_R2
>> 489 select SYS_SUPPORTS_32BIT_KERNEL
>> 490 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 491 select SYS_SUPPORTS_MIPS_CPS
>> 492 select SYS_SUPPORTS_MULTITHREADING
>> 493 select SYS_SUPPORTS_RELOCATABLE
>> 494 select SYS_SUPPORTS_ZBOOT
>> 495 select SYS_HAS_EARLY_PRINTK
>> 496 select USE_GENERIC_EARLY_PRINTK_8250
>> 497 select USE_OF
>> 498 help
>> 499 This enables support for the IMG Pistachio SoC platform.
>> 500
>> 501 config MIPS_MALTA
>> 502 bool "MIPS Malta board"
>> 503 select ARCH_MAY_HAVE_PC_FDC
>> 504 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 505 select ARCH_MIGHT_HAVE_PC_SERIO
>> 506 select BOOT_ELF32
>> 507 select BOOT_RAW
>> 508 select BUILTIN_DTB
>> 509 select CEVT_R4K
>> 510 select CLKSRC_MIPS_GIC
>> 511 select COMMON_CLK
>> 512 select CSRC_R4K
>> 513 select DMA_MAYBE_COHERENT
>> 514 select GENERIC_ISA_DMA
>> 515 select HAVE_PCSPKR_PLATFORM
>> 516 select HAVE_PCI
>> 517 select I8253
>> 518 select I8259
>> 519 select IRQ_MIPS_CPU
>> 520 select LIBFDT
>> 521 select MIPS_BONITO64
>> 522 select MIPS_CPU_SCACHE
>> 523 select MIPS_GIC
>> 524 select MIPS_L1_CACHE_SHIFT_6
>> 525 select MIPS_MSC
>> 526 select PCI_GT64XXX_PCI0
>> 527 select SMP_UP if SMP
>> 528 select SWAP_IO_SPACE
>> 529 select SYS_HAS_CPU_MIPS32_R1
>> 530 select SYS_HAS_CPU_MIPS32_R2
>> 531 select SYS_HAS_CPU_MIPS32_R3_5
>> 532 select SYS_HAS_CPU_MIPS32_R5
>> 533 select SYS_HAS_CPU_MIPS32_R6
>> 534 select SYS_HAS_CPU_MIPS64_R1
>> 535 select SYS_HAS_CPU_MIPS64_R2
>> 536 select SYS_HAS_CPU_MIPS64_R6
>> 537 select SYS_HAS_CPU_NEVADA
>> 538 select SYS_HAS_CPU_RM7000
>> 539 select SYS_SUPPORTS_32BIT_KERNEL
>> 540 select SYS_SUPPORTS_64BIT_KERNEL
>> 541 select SYS_SUPPORTS_BIG_ENDIAN
>> 542 select SYS_SUPPORTS_HIGHMEM
>> 543 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 544 select SYS_SUPPORTS_MICROMIPS
>> 545 select SYS_SUPPORTS_MIPS16
>> 546 select SYS_SUPPORTS_MIPS_CMP
>> 547 select SYS_SUPPORTS_MIPS_CPS
>> 548 select SYS_SUPPORTS_MULTITHREADING
>> 549 select SYS_SUPPORTS_RELOCATABLE
>> 550 select SYS_SUPPORTS_SMARTMIPS
>> 551 select SYS_SUPPORTS_VPE_LOADER
>> 552 select SYS_SUPPORTS_ZBOOT
>> 553 select USE_OF
210 select ZONE_DMA32 if 64BIT 554 select ZONE_DMA32 if 64BIT
>> 555 help
>> 556 This enables support for the MIPS Technologies Malta evaluation
>> 557 board.
211 558
212 config RUSTC_SUPPORTS_RISCV !! 559 config MACH_PIC32
213 def_bool y !! 560 bool "Microchip PIC32 Family"
214 depends on 64BIT !! 561 help
215 # Shadow call stack requires rustc ver !! 562 This enables support for the Microchip PIC32 family of platforms.
216 # -Zsanitizer=shadow-call-stack flag. <<
217 depends on !SHADOW_CALL_STACK || RUSTC <<
218 <<
219 config CLANG_SUPPORTS_DYNAMIC_FTRACE <<
220 def_bool CC_IS_CLANG <<
221 # https://github.com/ClangBuiltLinux/l <<
222 depends on AS_IS_GNU || (AS_IS_LLVM && <<
223 <<
224 config GCC_SUPPORTS_DYNAMIC_FTRACE <<
225 def_bool CC_IS_GCC <<
226 depends on $(cc-option,-fpatchable-fun <<
227 <<
228 config HAVE_SHADOW_CALL_STACK <<
229 def_bool $(cc-option,-fsanitize=shadow <<
230 # https://github.com/riscv-non-isa/ris <<
231 depends on $(ld-option,--no-relax-gp) <<
232 563
233 config RISCV_USE_LINKER_RELAXATION !! 564 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
234 def_bool y !! 565 microcontrollers.
235 # https://github.com/llvm/llvm-project <<
236 depends on !LD_IS_LLD || LLD_VERSION > <<
237 566
238 # https://github.com/llvm/llvm-project/commit/ !! 567 config NEC_MARKEINS
239 config ARCH_HAS_BROKEN_DWARF5 !! 568 bool "NEC EMMA2RH Mark-eins board"
240 def_bool y !! 569 select SOC_EMMA2RH
241 depends on RISCV_USE_LINKER_RELAXATION !! 570 select HAVE_PCI
242 # https://github.com/llvm/llvm-project !! 571 help
243 depends on AS_IS_LLVM && AS_VERSION < !! 572 This enables support for the NEC Electronics Mark-eins boards.
244 # https://github.com/llvm/llvm-project <<
245 depends on LD_IS_LLD && LLD_VERSION < <<
246 573
247 config ARCH_MMAP_RND_BITS_MIN !! 574 config MACH_VR41XX
248 default 18 if 64BIT !! 575 bool "NEC VR4100 series based machines"
249 default 8 !! 576 select CEVT_R4K
>> 577 select CSRC_R4K
>> 578 select SYS_HAS_CPU_VR41XX
>> 579 select SYS_SUPPORTS_MIPS16
>> 580 select GPIOLIB
>> 581
>> 582 config NXP_STB220
>> 583 bool "NXP STB220 board"
>> 584 select SOC_PNX833X
>> 585 help
>> 586 Support for NXP Semiconductors STB220 Development Board.
>> 587
>> 588 config NXP_STB225
>> 589 bool "NXP 225 board"
>> 590 select SOC_PNX833X
>> 591 select SOC_PNX8335
>> 592 help
>> 593 Support for NXP Semiconductors STB225 Development Board.
>> 594
>> 595 config PMC_MSP
>> 596 bool "PMC-Sierra MSP chipsets"
>> 597 select CEVT_R4K
>> 598 select CSRC_R4K
>> 599 select DMA_NONCOHERENT
>> 600 select SWAP_IO_SPACE
>> 601 select NO_EXCEPT_FILL
>> 602 select BOOT_RAW
>> 603 select SYS_HAS_CPU_MIPS32_R1
>> 604 select SYS_HAS_CPU_MIPS32_R2
>> 605 select SYS_SUPPORTS_32BIT_KERNEL
>> 606 select SYS_SUPPORTS_BIG_ENDIAN
>> 607 select SYS_SUPPORTS_MIPS16
>> 608 select IRQ_MIPS_CPU
>> 609 select SERIAL_8250
>> 610 select SERIAL_8250_CONSOLE
>> 611 select USB_EHCI_BIG_ENDIAN_MMIO
>> 612 select USB_EHCI_BIG_ENDIAN_DESC
>> 613 help
>> 614 This adds support for the PMC-Sierra family of Multi-Service
>> 615 Processor System-On-A-Chips. These parts include a number
>> 616 of integrated peripherals, interfaces and DSPs in addition to
>> 617 a variety of MIPS cores.
>> 618
>> 619 config RALINK
>> 620 bool "Ralink based machines"
>> 621 select CEVT_R4K
>> 622 select CSRC_R4K
>> 623 select BOOT_RAW
>> 624 select DMA_NONCOHERENT
>> 625 select IRQ_MIPS_CPU
>> 626 select USE_OF
>> 627 select SYS_HAS_CPU_MIPS32_R1
>> 628 select SYS_HAS_CPU_MIPS32_R2
>> 629 select SYS_SUPPORTS_32BIT_KERNEL
>> 630 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 631 select SYS_SUPPORTS_MIPS16
>> 632 select SYS_HAS_EARLY_PRINTK
>> 633 select CLKDEV_LOOKUP
>> 634 select ARCH_HAS_RESET_CONTROLLER
>> 635 select RESET_CONTROLLER
>> 636
>> 637 config SGI_IP22
>> 638 bool "SGI IP22 (Indy/Indigo2)"
>> 639 select FW_ARC
>> 640 select FW_ARC32
>> 641 select ARCH_MIGHT_HAVE_PC_SERIO
>> 642 select BOOT_ELF32
>> 643 select CEVT_R4K
>> 644 select CSRC_R4K
>> 645 select DEFAULT_SGI_PARTITION
>> 646 select DMA_NONCOHERENT
>> 647 select HAVE_EISA
>> 648 select I8253
>> 649 select I8259
>> 650 select IP22_CPU_SCACHE
>> 651 select IRQ_MIPS_CPU
>> 652 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 653 select SGI_HAS_I8042
>> 654 select SGI_HAS_INDYDOG
>> 655 select SGI_HAS_HAL2
>> 656 select SGI_HAS_SEEQ
>> 657 select SGI_HAS_WD93
>> 658 select SGI_HAS_ZILOG
>> 659 select SWAP_IO_SPACE
>> 660 select SYS_HAS_CPU_R4X00
>> 661 select SYS_HAS_CPU_R5000
>> 662 #
>> 663 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 664 # memory during early boot on some machines.
>> 665 #
>> 666 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 667 # for a more details discussion
>> 668 #
>> 669 # select SYS_HAS_EARLY_PRINTK
>> 670 select SYS_SUPPORTS_32BIT_KERNEL
>> 671 select SYS_SUPPORTS_64BIT_KERNEL
>> 672 select SYS_SUPPORTS_BIG_ENDIAN
>> 673 select MIPS_L1_CACHE_SHIFT_7
>> 674 help
>> 675 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 676 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 677 that runs on these, say Y here.
>> 678
>> 679 config SGI_IP27
>> 680 bool "SGI IP27 (Origin200/2000)"
>> 681 select ARCH_HAS_PHYS_TO_DMA
>> 682 select FW_ARC
>> 683 select FW_ARC64
>> 684 select BOOT_ELF64
>> 685 select DEFAULT_SGI_PARTITION
>> 686 select SYS_HAS_EARLY_PRINTK
>> 687 select HAVE_PCI
>> 688 select IRQ_MIPS_CPU
>> 689 select IRQ_DOMAIN_HIERARCHY
>> 690 select NR_CPUS_DEFAULT_64
>> 691 select PCI_DRIVERS_GENERIC
>> 692 select PCI_XTALK_BRIDGE
>> 693 select SYS_HAS_CPU_R10000
>> 694 select SYS_SUPPORTS_64BIT_KERNEL
>> 695 select SYS_SUPPORTS_BIG_ENDIAN
>> 696 select SYS_SUPPORTS_NUMA
>> 697 select SYS_SUPPORTS_SMP
>> 698 select MIPS_L1_CACHE_SHIFT_7
>> 699 help
>> 700 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 701 workstations. To compile a Linux kernel that runs on these, say Y
>> 702 here.
250 703
251 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 704 config SGI_IP28
252 default 8 !! 705 bool "SGI IP28 (Indigo2 R10k)"
>> 706 select FW_ARC
>> 707 select FW_ARC64
>> 708 select ARCH_MIGHT_HAVE_PC_SERIO
>> 709 select BOOT_ELF64
>> 710 select CEVT_R4K
>> 711 select CSRC_R4K
>> 712 select DEFAULT_SGI_PARTITION
>> 713 select DMA_NONCOHERENT
>> 714 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 715 select IRQ_MIPS_CPU
>> 716 select HAVE_EISA
>> 717 select I8253
>> 718 select I8259
>> 719 select SGI_HAS_I8042
>> 720 select SGI_HAS_INDYDOG
>> 721 select SGI_HAS_HAL2
>> 722 select SGI_HAS_SEEQ
>> 723 select SGI_HAS_WD93
>> 724 select SGI_HAS_ZILOG
>> 725 select SWAP_IO_SPACE
>> 726 select SYS_HAS_CPU_R10000
>> 727 #
>> 728 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 729 # memory during early boot on some machines.
>> 730 #
>> 731 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 732 # for a more details discussion
>> 733 #
>> 734 # select SYS_HAS_EARLY_PRINTK
>> 735 select SYS_SUPPORTS_64BIT_KERNEL
>> 736 select SYS_SUPPORTS_BIG_ENDIAN
>> 737 select MIPS_L1_CACHE_SHIFT_7
>> 738 help
>> 739 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 740 kernel that runs on these, say Y here.
>> 741
>> 742 config SGI_IP32
>> 743 bool "SGI IP32 (O2)"
>> 744 select ARCH_HAS_PHYS_TO_DMA
>> 745 select FW_ARC
>> 746 select FW_ARC32
>> 747 select BOOT_ELF32
>> 748 select CEVT_R4K
>> 749 select CSRC_R4K
>> 750 select DMA_NONCOHERENT
>> 751 select HAVE_PCI
>> 752 select IRQ_MIPS_CPU
>> 753 select R5000_CPU_SCACHE
>> 754 select RM7000_CPU_SCACHE
>> 755 select SYS_HAS_CPU_R5000
>> 756 select SYS_HAS_CPU_R10000 if BROKEN
>> 757 select SYS_HAS_CPU_RM7000
>> 758 select SYS_HAS_CPU_NEVADA
>> 759 select SYS_SUPPORTS_64BIT_KERNEL
>> 760 select SYS_SUPPORTS_BIG_ENDIAN
>> 761 help
>> 762 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 763
>> 764 config SIBYTE_CRHINE
>> 765 bool "Sibyte BCM91120C-CRhine"
>> 766 select BOOT_ELF32
>> 767 select SIBYTE_BCM1120
>> 768 select SWAP_IO_SPACE
>> 769 select SYS_HAS_CPU_SB1
>> 770 select SYS_SUPPORTS_BIG_ENDIAN
>> 771 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 772
>> 773 config SIBYTE_CARMEL
>> 774 bool "Sibyte BCM91120x-Carmel"
>> 775 select BOOT_ELF32
>> 776 select SIBYTE_BCM1120
>> 777 select SWAP_IO_SPACE
>> 778 select SYS_HAS_CPU_SB1
>> 779 select SYS_SUPPORTS_BIG_ENDIAN
>> 780 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 781
>> 782 config SIBYTE_CRHONE
>> 783 bool "Sibyte BCM91125C-CRhone"
>> 784 select BOOT_ELF32
>> 785 select SIBYTE_BCM1125
>> 786 select SWAP_IO_SPACE
>> 787 select SYS_HAS_CPU_SB1
>> 788 select SYS_SUPPORTS_BIG_ENDIAN
>> 789 select SYS_SUPPORTS_HIGHMEM
>> 790 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 791
>> 792 config SIBYTE_RHONE
>> 793 bool "Sibyte BCM91125E-Rhone"
>> 794 select BOOT_ELF32
>> 795 select SIBYTE_BCM1125H
>> 796 select SWAP_IO_SPACE
>> 797 select SYS_HAS_CPU_SB1
>> 798 select SYS_SUPPORTS_BIG_ENDIAN
>> 799 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 800
>> 801 config SIBYTE_SWARM
>> 802 bool "Sibyte BCM91250A-SWARM"
>> 803 select BOOT_ELF32
>> 804 select HAVE_PATA_PLATFORM
>> 805 select SIBYTE_SB1250
>> 806 select SWAP_IO_SPACE
>> 807 select SYS_HAS_CPU_SB1
>> 808 select SYS_SUPPORTS_BIG_ENDIAN
>> 809 select SYS_SUPPORTS_HIGHMEM
>> 810 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 811 select ZONE_DMA32 if 64BIT
>> 812 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
253 813
254 # max bits determined by the following formula !! 814 config SIBYTE_LITTLESUR
255 # VA_BITS - PAGE_SHIFT - 3 !! 815 bool "Sibyte BCM91250C2-LittleSur"
256 config ARCH_MMAP_RND_BITS_MAX !! 816 select BOOT_ELF32
257 default 24 if 64BIT # SV39 based !! 817 select HAVE_PATA_PLATFORM
258 default 17 !! 818 select SIBYTE_SB1250
>> 819 select SWAP_IO_SPACE
>> 820 select SYS_HAS_CPU_SB1
>> 821 select SYS_SUPPORTS_BIG_ENDIAN
>> 822 select SYS_SUPPORTS_HIGHMEM
>> 823 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 824 select ZONE_DMA32 if 64BIT
259 825
260 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 826 config SIBYTE_SENTOSA
261 default 17 !! 827 bool "Sibyte BCM91250E-Sentosa"
>> 828 select BOOT_ELF32
>> 829 select SIBYTE_SB1250
>> 830 select SWAP_IO_SPACE
>> 831 select SYS_HAS_CPU_SB1
>> 832 select SYS_SUPPORTS_BIG_ENDIAN
>> 833 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 834 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 835
>> 836 config SIBYTE_BIGSUR
>> 837 bool "Sibyte BCM91480B-BigSur"
>> 838 select BOOT_ELF32
>> 839 select NR_CPUS_DEFAULT_4
>> 840 select SIBYTE_BCM1x80
>> 841 select SWAP_IO_SPACE
>> 842 select SYS_HAS_CPU_SB1
>> 843 select SYS_SUPPORTS_BIG_ENDIAN
>> 844 select SYS_SUPPORTS_HIGHMEM
>> 845 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 846 select ZONE_DMA32 if 64BIT
>> 847 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
262 848
263 # set if we run in machine mode, cleared if we !! 849 config SNI_RM
264 config RISCV_M_MODE !! 850 bool "SNI RM200/300/400"
265 bool "Build a kernel that runs in mach !! 851 select FW_ARC if CPU_LITTLE_ENDIAN
266 depends on !MMU !! 852 select FW_ARC32 if CPU_LITTLE_ENDIAN
267 default y !! 853 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 854 select ARCH_MAY_HAVE_PC_FDC
>> 855 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 856 select ARCH_MIGHT_HAVE_PC_SERIO
>> 857 select BOOT_ELF32
>> 858 select CEVT_R4K
>> 859 select CSRC_R4K
>> 860 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 861 select DMA_NONCOHERENT
>> 862 select GENERIC_ISA_DMA
>> 863 select HAVE_EISA
>> 864 select HAVE_PCSPKR_PLATFORM
>> 865 select HAVE_PCI
>> 866 select IRQ_MIPS_CPU
>> 867 select I8253
>> 868 select I8259
>> 869 select ISA
>> 870 select MIPS_L1_CACHE_SHIFT_6
>> 871 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 872 select SYS_HAS_CPU_R4X00
>> 873 select SYS_HAS_CPU_R5000
>> 874 select SYS_HAS_CPU_R10000
>> 875 select R5000_CPU_SCACHE
>> 876 select SYS_HAS_EARLY_PRINTK
>> 877 select SYS_SUPPORTS_32BIT_KERNEL
>> 878 select SYS_SUPPORTS_64BIT_KERNEL
>> 879 select SYS_SUPPORTS_BIG_ENDIAN
>> 880 select SYS_SUPPORTS_HIGHMEM
>> 881 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 882 help
>> 883 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 884 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 885 Technology and now in turn merged with Fujitsu. Say Y here to
>> 886 support this machine type.
>> 887
>> 888 config MACH_TX39XX
>> 889 bool "Toshiba TX39 series based machines"
>> 890
>> 891 config MACH_TX49XX
>> 892 bool "Toshiba TX49 series based machines"
>> 893
>> 894 config MIKROTIK_RB532
>> 895 bool "Mikrotik RB532 boards"
>> 896 select CEVT_R4K
>> 897 select CSRC_R4K
>> 898 select DMA_NONCOHERENT
>> 899 select HAVE_PCI
>> 900 select IRQ_MIPS_CPU
>> 901 select SYS_HAS_CPU_MIPS32_R1
>> 902 select SYS_SUPPORTS_32BIT_KERNEL
>> 903 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 904 select SWAP_IO_SPACE
>> 905 select BOOT_RAW
>> 906 select GPIOLIB
>> 907 select MIPS_L1_CACHE_SHIFT_4
>> 908 help
>> 909 Support the Mikrotik(tm) RouterBoard 532 series,
>> 910 based on the IDT RC32434 SoC.
>> 911
>> 912 config CAVIUM_OCTEON_SOC
>> 913 bool "Cavium Networks Octeon SoC based boards"
>> 914 select CEVT_R4K
>> 915 select ARCH_HAS_PHYS_TO_DMA
>> 916 select HAVE_RAPIDIO
>> 917 select PHYS_ADDR_T_64BIT
>> 918 select SYS_SUPPORTS_64BIT_KERNEL
>> 919 select SYS_SUPPORTS_BIG_ENDIAN
>> 920 select EDAC_SUPPORT
>> 921 select EDAC_ATOMIC_SCRUB
>> 922 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 923 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 924 select SYS_HAS_EARLY_PRINTK
>> 925 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 926 select HAVE_PCI
>> 927 select ZONE_DMA32
>> 928 select HOLES_IN_ZONE
>> 929 select GPIOLIB
>> 930 select LIBFDT
>> 931 select USE_OF
>> 932 select ARCH_SPARSEMEM_ENABLE
>> 933 select SYS_SUPPORTS_SMP
>> 934 select NR_CPUS_DEFAULT_64
>> 935 select MIPS_NR_CPU_NR_MAP_1024
>> 936 select BUILTIN_DTB
>> 937 select MTD_COMPLEX_MAPPINGS
>> 938 select SWIOTLB
>> 939 select SYS_SUPPORTS_RELOCATABLE
>> 940 help
>> 941 This option supports all of the Octeon reference boards from Cavium
>> 942 Networks. It builds a kernel that dynamically determines the Octeon
>> 943 CPU type and supports all known board reference implementations.
>> 944 Some of the supported boards are:
>> 945 EBT3000
>> 946 EBH3000
>> 947 EBH3100
>> 948 Thunder
>> 949 Kodama
>> 950 Hikari
>> 951 Say Y here for most Octeon reference boards.
>> 952
>> 953 config NLM_XLR_BOARD
>> 954 bool "Netlogic XLR/XLS based systems"
>> 955 select BOOT_ELF32
>> 956 select NLM_COMMON
>> 957 select SYS_HAS_CPU_XLR
>> 958 select SYS_SUPPORTS_SMP
>> 959 select HAVE_PCI
>> 960 select SWAP_IO_SPACE
>> 961 select SYS_SUPPORTS_32BIT_KERNEL
>> 962 select SYS_SUPPORTS_64BIT_KERNEL
>> 963 select PHYS_ADDR_T_64BIT
>> 964 select SYS_SUPPORTS_BIG_ENDIAN
>> 965 select SYS_SUPPORTS_HIGHMEM
>> 966 select NR_CPUS_DEFAULT_32
>> 967 select CEVT_R4K
>> 968 select CSRC_R4K
>> 969 select IRQ_MIPS_CPU
>> 970 select ZONE_DMA32 if 64BIT
>> 971 select SYNC_R4K
>> 972 select SYS_HAS_EARLY_PRINTK
>> 973 select SYS_SUPPORTS_ZBOOT
>> 974 select SYS_SUPPORTS_ZBOOT_UART16550
>> 975 help
>> 976 Support for systems based on Netlogic XLR and XLS processors.
>> 977 Say Y here if you have a XLR or XLS based board.
>> 978
>> 979 config NLM_XLP_BOARD
>> 980 bool "Netlogic XLP based systems"
>> 981 select BOOT_ELF32
>> 982 select NLM_COMMON
>> 983 select SYS_HAS_CPU_XLP
>> 984 select SYS_SUPPORTS_SMP
>> 985 select HAVE_PCI
>> 986 select SYS_SUPPORTS_32BIT_KERNEL
>> 987 select SYS_SUPPORTS_64BIT_KERNEL
>> 988 select PHYS_ADDR_T_64BIT
>> 989 select GPIOLIB
>> 990 select SYS_SUPPORTS_BIG_ENDIAN
>> 991 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 992 select SYS_SUPPORTS_HIGHMEM
>> 993 select NR_CPUS_DEFAULT_32
>> 994 select CEVT_R4K
>> 995 select CSRC_R4K
>> 996 select IRQ_MIPS_CPU
>> 997 select ZONE_DMA32 if 64BIT
>> 998 select SYNC_R4K
>> 999 select SYS_HAS_EARLY_PRINTK
>> 1000 select USE_OF
>> 1001 select SYS_SUPPORTS_ZBOOT
>> 1002 select SYS_SUPPORTS_ZBOOT_UART16550
>> 1003 help
>> 1004 This board is based on Netlogic XLP Processor.
>> 1005 Say Y here if you have a XLP based board.
>> 1006
>> 1007 config MIPS_PARAVIRT
>> 1008 bool "Para-Virtualized guest system"
>> 1009 select CEVT_R4K
>> 1010 select CSRC_R4K
>> 1011 select SYS_SUPPORTS_64BIT_KERNEL
>> 1012 select SYS_SUPPORTS_32BIT_KERNEL
>> 1013 select SYS_SUPPORTS_BIG_ENDIAN
>> 1014 select SYS_SUPPORTS_SMP
>> 1015 select NR_CPUS_DEFAULT_4
>> 1016 select SYS_HAS_EARLY_PRINTK
>> 1017 select SYS_HAS_CPU_MIPS32_R2
>> 1018 select SYS_HAS_CPU_MIPS64_R2
>> 1019 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1020 select HAVE_PCI
>> 1021 select SWAP_IO_SPACE
268 help 1022 help
269 Select this option if you want to ru !! 1023 This option supports guest running under ????
270 without the assistance of any other !! 1024
>> 1025 endchoice
>> 1026
>> 1027 source "arch/mips/alchemy/Kconfig"
>> 1028 source "arch/mips/ath25/Kconfig"
>> 1029 source "arch/mips/ath79/Kconfig"
>> 1030 source "arch/mips/bcm47xx/Kconfig"
>> 1031 source "arch/mips/bcm63xx/Kconfig"
>> 1032 source "arch/mips/bmips/Kconfig"
>> 1033 source "arch/mips/generic/Kconfig"
>> 1034 source "arch/mips/jazz/Kconfig"
>> 1035 source "arch/mips/jz4740/Kconfig"
>> 1036 source "arch/mips/lantiq/Kconfig"
>> 1037 source "arch/mips/lasat/Kconfig"
>> 1038 source "arch/mips/pic32/Kconfig"
>> 1039 source "arch/mips/pistachio/Kconfig"
>> 1040 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1041 source "arch/mips/ralink/Kconfig"
>> 1042 source "arch/mips/sgi-ip27/Kconfig"
>> 1043 source "arch/mips/sibyte/Kconfig"
>> 1044 source "arch/mips/txx9/Kconfig"
>> 1045 source "arch/mips/vr41xx/Kconfig"
>> 1046 source "arch/mips/cavium-octeon/Kconfig"
>> 1047 source "arch/mips/loongson32/Kconfig"
>> 1048 source "arch/mips/loongson64/Kconfig"
>> 1049 source "arch/mips/netlogic/Kconfig"
>> 1050 source "arch/mips/paravirt/Kconfig"
>> 1051
>> 1052 endmenu
>> 1053
>> 1054 config GENERIC_HWEIGHT
>> 1055 bool
>> 1056 default y
271 1057
272 # set if we are running in S-mode and can use !! 1058 config GENERIC_CALIBRATE_DELAY
273 config RISCV_SBI <<
274 bool 1059 bool
275 depends on !RISCV_M_MODE <<
276 default y 1060 default y
277 1061
278 config MMU !! 1062 config SCHED_OMIT_FRAME_POINTER
279 bool "MMU-based Paged Memory Managemen !! 1063 bool
280 default y 1064 default y
281 help <<
282 Select if you want MMU-based virtual <<
283 support by paged memory management. <<
284 1065
285 config PAGE_OFFSET !! 1066 #
286 hex !! 1067 # Select some configuration options automatically based on user selections.
287 default 0x80000000 if !MMU && RISCV_M_ !! 1068 #
288 default 0x80200000 if !MMU !! 1069 config FW_ARC
289 default 0xc0000000 if 32BIT !! 1070 bool
290 default 0xff60000000000000 if 64BIT <<
291 <<
292 config KASAN_SHADOW_OFFSET <<
293 hex <<
294 depends on KASAN_GENERIC <<
295 default 0xdfffffff00000000 if 64BIT <<
296 default 0xffffffff if 32BIT <<
297 1071
298 config ARCH_FLATMEM_ENABLE !! 1072 config ARCH_MAY_HAVE_PC_FDC
299 def_bool !NUMA !! 1073 bool
300 1074
301 config ARCH_SPARSEMEM_ENABLE !! 1075 config BOOT_RAW
302 def_bool y !! 1076 bool
303 depends on MMU <<
304 select SPARSEMEM_STATIC if 32BIT && SP <<
305 select SPARSEMEM_VMEMMAP_ENABLE if 64B <<
306 1077
307 config ARCH_SELECT_MEMORY_MODEL !! 1078 config CEVT_BCM1480
308 def_bool ARCH_SPARSEMEM_ENABLE !! 1079 bool
309 1080
310 config ARCH_SUPPORTS_UPROBES !! 1081 config CEVT_DS1287
311 def_bool y !! 1082 bool
312 1083
313 config STACKTRACE_SUPPORT !! 1084 config CEVT_GT641XX
314 def_bool y !! 1085 bool
315 1086
316 config GENERIC_BUG !! 1087 config CEVT_R4K
317 def_bool y !! 1088 bool
318 depends on BUG <<
319 select GENERIC_BUG_RELATIVE_POINTERS i <<
320 1089
321 config GENERIC_BUG_RELATIVE_POINTERS !! 1090 config CEVT_SB1250
322 bool 1091 bool
323 1092
324 config GENERIC_CALIBRATE_DELAY !! 1093 config CEVT_TXX9
325 def_bool y !! 1094 bool
326 1095
327 config GENERIC_CSUM !! 1096 config CSRC_BCM1480
328 def_bool y !! 1097 bool
329 1098
330 config GENERIC_HWEIGHT !! 1099 config CSRC_IOASIC
331 def_bool y !! 1100 bool
332 1101
333 config FIX_EARLYCON_MEM !! 1102 config CSRC_R4K
334 def_bool MMU !! 1103 bool
335 1104
336 config ILLEGAL_POINTER_VALUE !! 1105 config CSRC_SB1250
337 hex !! 1106 bool
338 default 0 if 32BIT <<
339 default 0xdead000000000000 if 64BIT <<
340 1107
341 config PGTABLE_LEVELS !! 1108 config MIPS_CLOCK_VSYSCALL
342 int !! 1109 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
343 default 5 if 64BIT <<
344 default 2 <<
345 1110
346 config LOCKDEP_SUPPORT !! 1111 config GPIO_TXX9
347 def_bool y !! 1112 select GPIOLIB
>> 1113 bool
>> 1114
>> 1115 config FW_CFE
>> 1116 bool
348 1117
349 config RISCV_DMA_NONCOHERENT !! 1118 config ARCH_SUPPORTS_UPROBES
>> 1119 bool
>> 1120
>> 1121 config DMA_MAYBE_COHERENT
>> 1122 select ARCH_HAS_DMA_COHERENCE_H
>> 1123 select DMA_NONCOHERENT
>> 1124 bool
>> 1125
>> 1126 config DMA_PERDEV_COHERENT
350 bool 1127 bool
351 select ARCH_HAS_DMA_PREP_COHERENT <<
352 select ARCH_HAS_SETUP_DMA_OPS 1128 select ARCH_HAS_SETUP_DMA_OPS
353 select ARCH_HAS_SYNC_DMA_FOR_CPU !! 1129 select DMA_NONCOHERENT
>> 1130
>> 1131 config DMA_NONCOHERENT
>> 1132 bool
>> 1133 #
>> 1134 # MIPS allows mixing "slightly different" Cacheability and Coherency
>> 1135 # Attribute bits. It is believed that the uncached access through
>> 1136 # KSEG1 and the implementation specific "uncached accelerated" used
>> 1137 # by pgprot_writcombine can be mixed, and the latter sometimes provides
>> 1138 # significant advantages.
>> 1139 #
>> 1140 select ARCH_HAS_DMA_WRITE_COMBINE
354 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 1141 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
355 select DMA_BOUNCE_UNALIGNED_KMALLOC if !! 1142 select ARCH_HAS_UNCACHED_SEGMENT
>> 1143 select NEED_DMA_MAP_STATE
>> 1144 select ARCH_HAS_DMA_COHERENT_TO_PFN
>> 1145 select DMA_NONCOHERENT_CACHE_SYNC
356 1146
357 config RISCV_NONSTANDARD_CACHE_OPS !! 1147 config SYS_HAS_EARLY_PRINTK
358 bool 1148 bool
359 help <<
360 This enables function pointer suppor <<
361 systems to handle cache management. <<
362 1149
363 config AS_HAS_INSN !! 1150 config SYS_SUPPORTS_HOTPLUG_CPU
364 def_bool $(as-instr,.insn r 51$(comma) !! 1151 bool
365 1152
366 config AS_HAS_OPTION_ARCH !! 1153 config MIPS_BONITO64
367 # https://github.com/llvm/llvm-project !! 1154 bool
368 def_bool y <<
369 depends on $(as-instr, .option arch$(c <<
370 1155
371 source "arch/riscv/Kconfig.socs" !! 1156 config MIPS_MSC
372 source "arch/riscv/Kconfig.errata" !! 1157 bool
373 1158
374 menu "Platform type" !! 1159 config MIPS_NILE4
>> 1160 bool
375 1161
376 config NONPORTABLE !! 1162 config SYNC_R4K
377 bool "Allow configurations that result !! 1163 bool
378 help <<
379 RISC-V kernel binaries are compatibl <<
380 whenever possible, but there are som <<
381 satisfied by configurations that res <<
382 not portable between systems. <<
383 1164
384 Selecting N does not guarantee kerne !! 1165 config MIPS_MACHINE
385 systems. Selecting any of the optio !! 1166 def_bool n
386 result in kernel binaries that are u <<
387 systems. <<
388 1167
389 If unsure, say N. !! 1168 config NO_IOPORT_MAP
>> 1169 def_bool n
390 1170
391 choice !! 1171 config GENERIC_CSUM
392 prompt "Base ISA" !! 1172 bool
393 default ARCH_RV64I !! 1173 default y if !CPU_HAS_LOAD_STORE_LR
>> 1174
>> 1175 config GENERIC_ISA_DMA
>> 1176 bool
>> 1177 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1178 select ISA_DMA_API
>> 1179
>> 1180 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1181 bool
>> 1182 select GENERIC_ISA_DMA
>> 1183
>> 1184 config ISA_DMA_API
>> 1185 bool
>> 1186
>> 1187 config HOLES_IN_ZONE
>> 1188 bool
>> 1189
>> 1190 config SYS_SUPPORTS_RELOCATABLE
>> 1191 bool
394 help 1192 help
395 This selects the base ISA that this !! 1193 Selected if the platform supports relocating the kernel.
396 the target platform. !! 1194 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1195 to allow access to command line and entropy sources.
397 1196
398 config ARCH_RV32I !! 1197 config MIPS_CBPF_JIT
399 bool "RV32I" !! 1198 def_bool y
400 depends on NONPORTABLE !! 1199 depends on BPF_JIT && HAVE_CBPF_JIT
401 select 32BIT <<
402 select GENERIC_LIB_ASHLDI3 <<
403 select GENERIC_LIB_ASHRDI3 <<
404 select GENERIC_LIB_LSHRDI3 <<
405 select GENERIC_LIB_UCMPDI2 <<
406 1200
407 config ARCH_RV64I !! 1201 config MIPS_EBPF_JIT
408 bool "RV64I" !! 1202 def_bool y
409 select 64BIT !! 1203 depends on BPF_JIT && HAVE_EBPF_JIT
410 select ARCH_SUPPORTS_INT128 if CC_HAS_ <<
411 select SWIOTLB if MMU <<
412 1204
413 endchoice <<
414 1205
415 # We must be able to map all physical memory i !! 1206 #
416 # is still a bit more efficient when generatin !! 1207 # Endianness selection. Sufficiently obscure so many users don't know what to
417 # such that it can only map 2GiB of memory. !! 1208 # answer,so we try hard to limit the available choices. Also the use of a
>> 1209 # choice statement should be more obvious to the user.
>> 1210 #
418 choice 1211 choice
419 prompt "Kernel Code Model" !! 1212 prompt "Endianness selection"
420 default CMODEL_MEDLOW if 32BIT !! 1213 help
421 default CMODEL_MEDANY if 64BIT !! 1214 Some MIPS machines can be configured for either little or big endian
422 !! 1215 byte order. These modes require different kernels and a different
423 config CMODEL_MEDLOW !! 1216 Linux distribution. In general there is one preferred byteorder for a
424 bool "medium low code model" !! 1217 particular system but some systems are just as commonly used in the
425 config CMODEL_MEDANY !! 1218 one or the other endianness.
426 bool "medium any code model" !! 1219
>> 1220 config CPU_BIG_ENDIAN
>> 1221 bool "Big endian"
>> 1222 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1223
>> 1224 config CPU_LITTLE_ENDIAN
>> 1225 bool "Little endian"
>> 1226 depends on SYS_SUPPORTS_LITTLE_ENDIAN
>> 1227
427 endchoice 1228 endchoice
428 1229
429 config MODULE_SECTIONS !! 1230 config EXPORT_UASM
430 bool 1231 bool
431 select HAVE_MOD_ARCH_SPECIFIC <<
432 1232
433 config SMP !! 1233 config SYS_SUPPORTS_APM_EMULATION
434 bool "Symmetric Multi-Processing" !! 1234 bool
435 help <<
436 This enables support for systems wit <<
437 you say N here, the kernel will run <<
438 multiprocessor machines, but will us <<
439 multiprocessor machine. If you say Y <<
440 on many, but not all, single process <<
441 processor machine, the kernel will r <<
442 here. <<
443 1235
444 If you don't know what to do here, s !! 1236 config SYS_SUPPORTS_BIG_ENDIAN
>> 1237 bool
445 1238
446 config SCHED_MC !! 1239 config SYS_SUPPORTS_LITTLE_ENDIAN
447 bool "Multi-core scheduler support" !! 1240 bool
448 depends on SMP <<
449 help <<
450 Multi-core scheduler support improve <<
451 making when dealing with multi-core <<
452 increased overhead in some places. I <<
453 1241
454 config NR_CPUS !! 1242 config SYS_SUPPORTS_HUGETLBFS
455 int "Maximum number of CPUs (2-512)" !! 1243 bool
456 depends on SMP !! 1244 depends on CPU_SUPPORTS_HUGEPAGES
457 range 2 512 if !RISCV_SBI_V01 !! 1245 default y
458 range 2 32 if RISCV_SBI_V01 && 32BIT <<
459 range 2 64 if RISCV_SBI_V01 && 64BIT <<
460 default "32" if 32BIT <<
461 default "64" if 64BIT <<
462 1246
463 config HOTPLUG_CPU !! 1247 config MIPS_HUGE_TLB_SUPPORT
464 bool "Support for hot-pluggable CPUs" !! 1248 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
465 depends on SMP <<
466 select GENERIC_IRQ_MIGRATION <<
467 help <<
468 1249
469 Say Y here to experiment with turnin !! 1250 config IRQ_CPU_RM7K
470 can be controlled through /sys/devic !! 1251 bool
471 1252
472 Say N if you want to disable CPU hot !! 1253 config IRQ_MSP_SLP
>> 1254 bool
>> 1255
>> 1256 config IRQ_MSP_CIC
>> 1257 bool
>> 1258
>> 1259 config IRQ_TXX9
>> 1260 bool
>> 1261
>> 1262 config IRQ_GT641XX
>> 1263 bool
>> 1264
>> 1265 config PCI_GT64XXX_PCI0
>> 1266 bool
>> 1267
>> 1268 config PCI_XTALK_BRIDGE
>> 1269 bool
>> 1270
>> 1271 config NO_EXCEPT_FILL
>> 1272 bool
>> 1273
>> 1274 config SOC_EMMA2RH
>> 1275 bool
>> 1276 select CEVT_R4K
>> 1277 select CSRC_R4K
>> 1278 select DMA_NONCOHERENT
>> 1279 select IRQ_MIPS_CPU
>> 1280 select SWAP_IO_SPACE
>> 1281 select SYS_HAS_CPU_R5500
>> 1282 select SYS_SUPPORTS_32BIT_KERNEL
>> 1283 select SYS_SUPPORTS_64BIT_KERNEL
>> 1284 select SYS_SUPPORTS_BIG_ENDIAN
>> 1285
>> 1286 config SOC_PNX833X
>> 1287 bool
>> 1288 select CEVT_R4K
>> 1289 select CSRC_R4K
>> 1290 select IRQ_MIPS_CPU
>> 1291 select DMA_NONCOHERENT
>> 1292 select SYS_HAS_CPU_MIPS32_R2
>> 1293 select SYS_SUPPORTS_32BIT_KERNEL
>> 1294 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1295 select SYS_SUPPORTS_BIG_ENDIAN
>> 1296 select SYS_SUPPORTS_MIPS16
>> 1297 select CPU_MIPSR2_IRQ_VI
>> 1298
>> 1299 config SOC_PNX8335
>> 1300 bool
>> 1301 select SOC_PNX833X
>> 1302
>> 1303 config MIPS_SPRAM
>> 1304 bool
>> 1305
>> 1306 config SWAP_IO_SPACE
>> 1307 bool
>> 1308
>> 1309 config SGI_HAS_INDYDOG
>> 1310 bool
>> 1311
>> 1312 config SGI_HAS_HAL2
>> 1313 bool
>> 1314
>> 1315 config SGI_HAS_SEEQ
>> 1316 bool
>> 1317
>> 1318 config SGI_HAS_WD93
>> 1319 bool
>> 1320
>> 1321 config SGI_HAS_ZILOG
>> 1322 bool
>> 1323
>> 1324 config SGI_HAS_I8042
>> 1325 bool
>> 1326
>> 1327 config DEFAULT_SGI_PARTITION
>> 1328 bool
>> 1329
>> 1330 config FW_ARC32
>> 1331 bool
>> 1332
>> 1333 config FW_SNIPROM
>> 1334 bool
>> 1335
>> 1336 config BOOT_ELF32
>> 1337 bool
>> 1338
>> 1339 config MIPS_L1_CACHE_SHIFT_4
>> 1340 bool
>> 1341
>> 1342 config MIPS_L1_CACHE_SHIFT_5
>> 1343 bool
>> 1344
>> 1345 config MIPS_L1_CACHE_SHIFT_6
>> 1346 bool
>> 1347
>> 1348 config MIPS_L1_CACHE_SHIFT_7
>> 1349 bool
>> 1350
>> 1351 config MIPS_L1_CACHE_SHIFT
>> 1352 int
>> 1353 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1354 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1355 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1356 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1357 default "5"
>> 1358
>> 1359 config HAVE_STD_PC_SERIAL_PORT
>> 1360 bool
>> 1361
>> 1362 config ARC_CONSOLE
>> 1363 bool "ARC console support"
>> 1364 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1365
>> 1366 config ARC_MEMORY
>> 1367 bool
>> 1368 depends on MACH_JAZZ || SNI_RM || SGI_IP32
>> 1369 default y
>> 1370
>> 1371 config ARC_PROMLIB
>> 1372 bool
>> 1373 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
>> 1374 default y
>> 1375
>> 1376 config FW_ARC64
>> 1377 bool
>> 1378
>> 1379 config BOOT_ELF64
>> 1380 bool
>> 1381
>> 1382 menu "CPU selection"
473 1383
474 choice 1384 choice
475 prompt "CPU Tuning" !! 1385 prompt "CPU type"
476 default TUNE_GENERIC !! 1386 default CPU_R4X00
477 1387
478 config TUNE_GENERIC !! 1388 config CPU_LOONGSON3
479 bool "generic" !! 1389 bool "Loongson 3 CPU"
>> 1390 depends on SYS_HAS_CPU_LOONGSON3
>> 1391 select ARCH_HAS_PHYS_TO_DMA
>> 1392 select CPU_SUPPORTS_64BIT_KERNEL
>> 1393 select CPU_SUPPORTS_HIGHMEM
>> 1394 select CPU_SUPPORTS_HUGEPAGES
>> 1395 select CPU_HAS_LOAD_STORE_LR
>> 1396 select WEAK_ORDERING
>> 1397 select WEAK_REORDERING_BEYOND_LLSC
>> 1398 select MIPS_PGD_C0_CONTEXT
>> 1399 select MIPS_L1_CACHE_SHIFT_6
>> 1400 select MIPS_FP_SUPPORT
>> 1401 select GPIOLIB
>> 1402 select SWIOTLB
>> 1403 help
>> 1404 The Loongson 3 processor implements the MIPS64R2 instruction
>> 1405 set with many extensions.
480 1406
>> 1407 config LOONGSON3_ENHANCEMENT
>> 1408 bool "New Loongson 3 CPU Enhancements"
>> 1409 default n
>> 1410 select CPU_MIPSR2
>> 1411 select CPU_HAS_PREFETCH
>> 1412 depends on CPU_LOONGSON3
>> 1413 help
>> 1414 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1415 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1416 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1417 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1418 Fast TLB refill support, etc.
>> 1419
>> 1420 This option enable those enhancements which are not probed at run
>> 1421 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1422 please say 'N' here. If you want a high-performance kernel to run on
>> 1423 new Loongson 3 machines only, please say 'Y' here.
>> 1424
>> 1425 config CPU_LOONGSON3_WORKAROUNDS
>> 1426 bool "Old Loongson 3 LLSC Workarounds"
>> 1427 default y if SMP
>> 1428 depends on CPU_LOONGSON3
>> 1429 help
>> 1430 Loongson 3 processors have the llsc issues which require workarounds.
>> 1431 Without workarounds the system may hang unexpectedly.
>> 1432
>> 1433 Newer Loongson 3 will fix these issues and no workarounds are needed.
>> 1434 The workarounds have no significant side effect on them but may
>> 1435 decrease the performance of the system so this option should be
>> 1436 disabled unless the kernel is intended to be run on old systems.
>> 1437
>> 1438 If unsure, please say Y.
>> 1439
>> 1440 config CPU_LOONGSON2E
>> 1441 bool "Loongson 2E"
>> 1442 depends on SYS_HAS_CPU_LOONGSON2E
>> 1443 select CPU_LOONGSON2
>> 1444 help
>> 1445 The Loongson 2E processor implements the MIPS III instruction set
>> 1446 with many extensions.
>> 1447
>> 1448 It has an internal FPGA northbridge, which is compatible to
>> 1449 bonito64.
>> 1450
>> 1451 config CPU_LOONGSON2F
>> 1452 bool "Loongson 2F"
>> 1453 depends on SYS_HAS_CPU_LOONGSON2F
>> 1454 select CPU_LOONGSON2
>> 1455 select GPIOLIB
>> 1456 help
>> 1457 The Loongson 2F processor implements the MIPS III instruction set
>> 1458 with many extensions.
>> 1459
>> 1460 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1461 have a similar programming interface with FPGA northbridge used in
>> 1462 Loongson2E.
>> 1463
>> 1464 config CPU_LOONGSON1B
>> 1465 bool "Loongson 1B"
>> 1466 depends on SYS_HAS_CPU_LOONGSON1B
>> 1467 select CPU_LOONGSON1
>> 1468 select LEDS_GPIO_REGISTER
>> 1469 help
>> 1470 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1471 Release 1 instruction set and part of the MIPS32 Release 2
>> 1472 instruction set.
>> 1473
>> 1474 config CPU_LOONGSON1C
>> 1475 bool "Loongson 1C"
>> 1476 depends on SYS_HAS_CPU_LOONGSON1C
>> 1477 select CPU_LOONGSON1
>> 1478 select LEDS_GPIO_REGISTER
>> 1479 help
>> 1480 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1481 Release 1 instruction set and part of the MIPS32 Release 2
>> 1482 instruction set.
>> 1483
>> 1484 config CPU_MIPS32_R1
>> 1485 bool "MIPS32 Release 1"
>> 1486 depends on SYS_HAS_CPU_MIPS32_R1
>> 1487 select CPU_HAS_PREFETCH
>> 1488 select CPU_HAS_LOAD_STORE_LR
>> 1489 select CPU_SUPPORTS_32BIT_KERNEL
>> 1490 select CPU_SUPPORTS_HIGHMEM
>> 1491 help
>> 1492 Choose this option to build a kernel for release 1 or later of the
>> 1493 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1494 MIPS processor are based on a MIPS32 processor. If you know the
>> 1495 specific type of processor in your system, choose those that one
>> 1496 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1497 Release 2 of the MIPS32 architecture is available since several
>> 1498 years so chances are you even have a MIPS32 Release 2 processor
>> 1499 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1500 performance.
>> 1501
>> 1502 config CPU_MIPS32_R2
>> 1503 bool "MIPS32 Release 2"
>> 1504 depends on SYS_HAS_CPU_MIPS32_R2
>> 1505 select CPU_HAS_PREFETCH
>> 1506 select CPU_HAS_LOAD_STORE_LR
>> 1507 select CPU_SUPPORTS_32BIT_KERNEL
>> 1508 select CPU_SUPPORTS_HIGHMEM
>> 1509 select CPU_SUPPORTS_MSA
>> 1510 select HAVE_KVM
>> 1511 help
>> 1512 Choose this option to build a kernel for release 2 or later of the
>> 1513 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1514 MIPS processor are based on a MIPS32 processor. If you know the
>> 1515 specific type of processor in your system, choose those that one
>> 1516 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1517
>> 1518 config CPU_MIPS32_R6
>> 1519 bool "MIPS32 Release 6"
>> 1520 depends on SYS_HAS_CPU_MIPS32_R6
>> 1521 select CPU_HAS_PREFETCH
>> 1522 select CPU_SUPPORTS_32BIT_KERNEL
>> 1523 select CPU_SUPPORTS_HIGHMEM
>> 1524 select CPU_SUPPORTS_MSA
>> 1525 select HAVE_KVM
>> 1526 select MIPS_O32_FP64_SUPPORT
>> 1527 help
>> 1528 Choose this option to build a kernel for release 6 or later of the
>> 1529 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1530 family, are based on a MIPS32r6 processor. If you own an older
>> 1531 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1532
>> 1533 config CPU_MIPS64_R1
>> 1534 bool "MIPS64 Release 1"
>> 1535 depends on SYS_HAS_CPU_MIPS64_R1
>> 1536 select CPU_HAS_PREFETCH
>> 1537 select CPU_HAS_LOAD_STORE_LR
>> 1538 select CPU_SUPPORTS_32BIT_KERNEL
>> 1539 select CPU_SUPPORTS_64BIT_KERNEL
>> 1540 select CPU_SUPPORTS_HIGHMEM
>> 1541 select CPU_SUPPORTS_HUGEPAGES
>> 1542 help
>> 1543 Choose this option to build a kernel for release 1 or later of the
>> 1544 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1545 MIPS processor are based on a MIPS64 processor. If you know the
>> 1546 specific type of processor in your system, choose those that one
>> 1547 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1548 Release 2 of the MIPS64 architecture is available since several
>> 1549 years so chances are you even have a MIPS64 Release 2 processor
>> 1550 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1551 performance.
>> 1552
>> 1553 config CPU_MIPS64_R2
>> 1554 bool "MIPS64 Release 2"
>> 1555 depends on SYS_HAS_CPU_MIPS64_R2
>> 1556 select CPU_HAS_PREFETCH
>> 1557 select CPU_HAS_LOAD_STORE_LR
>> 1558 select CPU_SUPPORTS_32BIT_KERNEL
>> 1559 select CPU_SUPPORTS_64BIT_KERNEL
>> 1560 select CPU_SUPPORTS_HIGHMEM
>> 1561 select CPU_SUPPORTS_HUGEPAGES
>> 1562 select CPU_SUPPORTS_MSA
>> 1563 select HAVE_KVM
>> 1564 help
>> 1565 Choose this option to build a kernel for release 2 or later of the
>> 1566 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1567 MIPS processor are based on a MIPS64 processor. If you know the
>> 1568 specific type of processor in your system, choose those that one
>> 1569 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1570
>> 1571 config CPU_MIPS64_R6
>> 1572 bool "MIPS64 Release 6"
>> 1573 depends on SYS_HAS_CPU_MIPS64_R6
>> 1574 select CPU_HAS_PREFETCH
>> 1575 select CPU_SUPPORTS_32BIT_KERNEL
>> 1576 select CPU_SUPPORTS_64BIT_KERNEL
>> 1577 select CPU_SUPPORTS_HIGHMEM
>> 1578 select CPU_SUPPORTS_HUGEPAGES
>> 1579 select CPU_SUPPORTS_MSA
>> 1580 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1581 select HAVE_KVM
>> 1582 help
>> 1583 Choose this option to build a kernel for release 6 or later of the
>> 1584 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1585 family, are based on a MIPS64r6 processor. If you own an older
>> 1586 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1587
>> 1588 config CPU_R3000
>> 1589 bool "R3000"
>> 1590 depends on SYS_HAS_CPU_R3000
>> 1591 select CPU_HAS_WB
>> 1592 select CPU_HAS_LOAD_STORE_LR
>> 1593 select CPU_R3K_TLB
>> 1594 select CPU_SUPPORTS_32BIT_KERNEL
>> 1595 select CPU_SUPPORTS_HIGHMEM
>> 1596 help
>> 1597 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1598 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1599 *not* work on R4000 machines and vice versa. However, since most
>> 1600 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1601 might be a safe bet. If the resulting kernel does not work,
>> 1602 try to recompile with R3000.
>> 1603
>> 1604 config CPU_TX39XX
>> 1605 bool "R39XX"
>> 1606 depends on SYS_HAS_CPU_TX39XX
>> 1607 select CPU_SUPPORTS_32BIT_KERNEL
>> 1608 select CPU_HAS_LOAD_STORE_LR
>> 1609 select CPU_R3K_TLB
>> 1610
>> 1611 config CPU_VR41XX
>> 1612 bool "R41xx"
>> 1613 depends on SYS_HAS_CPU_VR41XX
>> 1614 select CPU_SUPPORTS_32BIT_KERNEL
>> 1615 select CPU_SUPPORTS_64BIT_KERNEL
>> 1616 select CPU_HAS_LOAD_STORE_LR
>> 1617 help
>> 1618 The options selects support for the NEC VR4100 series of processors.
>> 1619 Only choose this option if you have one of these processors as a
>> 1620 kernel built with this option will not run on any other type of
>> 1621 processor or vice versa.
>> 1622
>> 1623 config CPU_R4X00
>> 1624 bool "R4x00"
>> 1625 depends on SYS_HAS_CPU_R4X00
>> 1626 select CPU_SUPPORTS_32BIT_KERNEL
>> 1627 select CPU_SUPPORTS_64BIT_KERNEL
>> 1628 select CPU_SUPPORTS_HUGEPAGES
>> 1629 select CPU_HAS_LOAD_STORE_LR
>> 1630 help
>> 1631 MIPS Technologies R4000-series processors other than 4300, including
>> 1632 the R4000, R4400, R4600, and 4700.
>> 1633
>> 1634 config CPU_TX49XX
>> 1635 bool "R49XX"
>> 1636 depends on SYS_HAS_CPU_TX49XX
>> 1637 select CPU_HAS_PREFETCH
>> 1638 select CPU_HAS_LOAD_STORE_LR
>> 1639 select CPU_SUPPORTS_32BIT_KERNEL
>> 1640 select CPU_SUPPORTS_64BIT_KERNEL
>> 1641 select CPU_SUPPORTS_HUGEPAGES
>> 1642
>> 1643 config CPU_R5000
>> 1644 bool "R5000"
>> 1645 depends on SYS_HAS_CPU_R5000
>> 1646 select CPU_SUPPORTS_32BIT_KERNEL
>> 1647 select CPU_SUPPORTS_64BIT_KERNEL
>> 1648 select CPU_SUPPORTS_HUGEPAGES
>> 1649 select CPU_HAS_LOAD_STORE_LR
>> 1650 help
>> 1651 MIPS Technologies R5000-series processors other than the Nevada.
>> 1652
>> 1653 config CPU_R5500
>> 1654 bool "R5500"
>> 1655 depends on SYS_HAS_CPU_R5500
>> 1656 select CPU_SUPPORTS_32BIT_KERNEL
>> 1657 select CPU_SUPPORTS_64BIT_KERNEL
>> 1658 select CPU_SUPPORTS_HUGEPAGES
>> 1659 select CPU_HAS_LOAD_STORE_LR
>> 1660 help
>> 1661 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1662 instruction set.
>> 1663
>> 1664 config CPU_NEVADA
>> 1665 bool "RM52xx"
>> 1666 depends on SYS_HAS_CPU_NEVADA
>> 1667 select CPU_SUPPORTS_32BIT_KERNEL
>> 1668 select CPU_SUPPORTS_64BIT_KERNEL
>> 1669 select CPU_SUPPORTS_HUGEPAGES
>> 1670 select CPU_HAS_LOAD_STORE_LR
>> 1671 help
>> 1672 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1673
>> 1674 config CPU_R10000
>> 1675 bool "R10000"
>> 1676 depends on SYS_HAS_CPU_R10000
>> 1677 select CPU_HAS_PREFETCH
>> 1678 select CPU_HAS_LOAD_STORE_LR
>> 1679 select CPU_SUPPORTS_32BIT_KERNEL
>> 1680 select CPU_SUPPORTS_64BIT_KERNEL
>> 1681 select CPU_SUPPORTS_HIGHMEM
>> 1682 select CPU_SUPPORTS_HUGEPAGES
>> 1683 help
>> 1684 MIPS Technologies R10000-series processors.
>> 1685
>> 1686 config CPU_RM7000
>> 1687 bool "RM7000"
>> 1688 depends on SYS_HAS_CPU_RM7000
>> 1689 select CPU_HAS_PREFETCH
>> 1690 select CPU_HAS_LOAD_STORE_LR
>> 1691 select CPU_SUPPORTS_32BIT_KERNEL
>> 1692 select CPU_SUPPORTS_64BIT_KERNEL
>> 1693 select CPU_SUPPORTS_HIGHMEM
>> 1694 select CPU_SUPPORTS_HUGEPAGES
>> 1695
>> 1696 config CPU_SB1
>> 1697 bool "SB1"
>> 1698 depends on SYS_HAS_CPU_SB1
>> 1699 select CPU_HAS_LOAD_STORE_LR
>> 1700 select CPU_SUPPORTS_32BIT_KERNEL
>> 1701 select CPU_SUPPORTS_64BIT_KERNEL
>> 1702 select CPU_SUPPORTS_HIGHMEM
>> 1703 select CPU_SUPPORTS_HUGEPAGES
>> 1704 select WEAK_ORDERING
>> 1705
>> 1706 config CPU_CAVIUM_OCTEON
>> 1707 bool "Cavium Octeon processor"
>> 1708 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1709 select CPU_HAS_PREFETCH
>> 1710 select CPU_HAS_LOAD_STORE_LR
>> 1711 select CPU_SUPPORTS_64BIT_KERNEL
>> 1712 select WEAK_ORDERING
>> 1713 select CPU_SUPPORTS_HIGHMEM
>> 1714 select CPU_SUPPORTS_HUGEPAGES
>> 1715 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1716 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1717 select MIPS_L1_CACHE_SHIFT_7
>> 1718 select HAVE_KVM
>> 1719 help
>> 1720 The Cavium Octeon processor is a highly integrated chip containing
>> 1721 many ethernet hardware widgets for networking tasks. The processor
>> 1722 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1723 Full details can be found at http://www.caviumnetworks.com.
>> 1724
>> 1725 config CPU_BMIPS
>> 1726 bool "Broadcom BMIPS"
>> 1727 depends on SYS_HAS_CPU_BMIPS
>> 1728 select CPU_MIPS32
>> 1729 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1730 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1731 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1732 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1733 select CPU_SUPPORTS_32BIT_KERNEL
>> 1734 select DMA_NONCOHERENT
>> 1735 select IRQ_MIPS_CPU
>> 1736 select SWAP_IO_SPACE
>> 1737 select WEAK_ORDERING
>> 1738 select CPU_SUPPORTS_HIGHMEM
>> 1739 select CPU_HAS_PREFETCH
>> 1740 select CPU_HAS_LOAD_STORE_LR
>> 1741 select CPU_SUPPORTS_CPUFREQ
>> 1742 select MIPS_EXTERNAL_TIMER
>> 1743 help
>> 1744 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1745
>> 1746 config CPU_XLR
>> 1747 bool "Netlogic XLR SoC"
>> 1748 depends on SYS_HAS_CPU_XLR
>> 1749 select CPU_HAS_LOAD_STORE_LR
>> 1750 select CPU_SUPPORTS_32BIT_KERNEL
>> 1751 select CPU_SUPPORTS_64BIT_KERNEL
>> 1752 select CPU_SUPPORTS_HIGHMEM
>> 1753 select CPU_SUPPORTS_HUGEPAGES
>> 1754 select WEAK_ORDERING
>> 1755 select WEAK_REORDERING_BEYOND_LLSC
>> 1756 help
>> 1757 Netlogic Microsystems XLR/XLS processors.
>> 1758
>> 1759 config CPU_XLP
>> 1760 bool "Netlogic XLP SoC"
>> 1761 depends on SYS_HAS_CPU_XLP
>> 1762 select CPU_SUPPORTS_32BIT_KERNEL
>> 1763 select CPU_SUPPORTS_64BIT_KERNEL
>> 1764 select CPU_SUPPORTS_HIGHMEM
>> 1765 select WEAK_ORDERING
>> 1766 select WEAK_REORDERING_BEYOND_LLSC
>> 1767 select CPU_HAS_PREFETCH
>> 1768 select CPU_HAS_LOAD_STORE_LR
>> 1769 select CPU_MIPSR2
>> 1770 select CPU_SUPPORTS_HUGEPAGES
>> 1771 select MIPS_ASID_BITS_VARIABLE
>> 1772 help
>> 1773 Netlogic Microsystems XLP processors.
481 endchoice 1774 endchoice
482 1775
483 # Common NUMA Features !! 1776 config CPU_MIPS32_3_5_FEATURES
484 config NUMA !! 1777 bool "MIPS32 Release 3.5 Features"
485 bool "NUMA Memory Allocation and Sched !! 1778 depends on SYS_HAS_CPU_MIPS32_R3_5
486 depends on SMP && MMU !! 1779 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
487 select ARCH_SUPPORTS_NUMA_BALANCING !! 1780 help
488 select GENERIC_ARCH_NUMA !! 1781 Choose this option to build a kernel for release 2 or later of the
489 select HAVE_SETUP_PER_CPU_AREA !! 1782 MIPS32 architecture including features from the 3.5 release such as
490 select NEED_PER_CPU_EMBED_FIRST_CHUNK !! 1783 support for Enhanced Virtual Addressing (EVA).
491 select NEED_PER_CPU_PAGE_FIRST_CHUNK !! 1784
492 select OF_NUMA !! 1785 config CPU_MIPS32_3_5_EVA
493 select USE_PERCPU_NUMA_NODE_ID !! 1786 bool "Enhanced Virtual Addressing (EVA)"
>> 1787 depends on CPU_MIPS32_3_5_FEATURES
>> 1788 select EVA
>> 1789 default y
>> 1790 help
>> 1791 Choose this option if you want to enable the Enhanced Virtual
>> 1792 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1793 One of its primary benefits is an increase in the maximum size
>> 1794 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1795
>> 1796 config CPU_MIPS32_R5_FEATURES
>> 1797 bool "MIPS32 Release 5 Features"
>> 1798 depends on SYS_HAS_CPU_MIPS32_R5
>> 1799 depends on CPU_MIPS32_R2
>> 1800 help
>> 1801 Choose this option to build a kernel for release 2 or later of the
>> 1802 MIPS32 architecture including features from release 5 such as
>> 1803 support for Extended Physical Addressing (XPA).
>> 1804
>> 1805 config CPU_MIPS32_R5_XPA
>> 1806 bool "Extended Physical Addressing (XPA)"
>> 1807 depends on CPU_MIPS32_R5_FEATURES
>> 1808 depends on !EVA
>> 1809 depends on !PAGE_SIZE_4KB
>> 1810 depends on SYS_SUPPORTS_HIGHMEM
>> 1811 select XPA
>> 1812 select HIGHMEM
>> 1813 select PHYS_ADDR_T_64BIT
>> 1814 default n
494 help 1815 help
495 Enable NUMA (Non-Uniform Memory Acce !! 1816 Choose this option if you want to enable the Extended Physical
>> 1817 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1818 benefit is to increase physical addressing equal to or greater
>> 1819 than 40 bits. Note that this has the side effect of turning on
>> 1820 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1821 If unsure, say 'N' here.
496 1822
497 The kernel will try to allocate memo !! 1823 if CPU_LOONGSON2F
498 local memory of the CPU and add some !! 1824 config CPU_NOP_WORKAROUNDS
>> 1825 bool
499 1826
500 config NODES_SHIFT !! 1827 config CPU_JUMP_WORKAROUNDS
501 int "Maximum NUMA Nodes (as a power of !! 1828 bool
502 range 1 10 !! 1829
503 default "2" !! 1830 config CPU_LOONGSON2F_WORKAROUNDS
504 depends on NUMA !! 1831 bool "Loongson 2F Workarounds"
>> 1832 default y
>> 1833 select CPU_NOP_WORKAROUNDS
>> 1834 select CPU_JUMP_WORKAROUNDS
505 help 1835 help
506 Specify the maximum number of NUMA N !! 1836 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
507 system. Increases memory reserved t !! 1837 require workarounds. Without workarounds the system may hang
>> 1838 unexpectedly. For more information please refer to the gas
>> 1839 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1840
>> 1841 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1842 are needed. The workarounds have no significant side effect on them
>> 1843 but may decrease the performance of the system so this option should
>> 1844 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1845 systems.
>> 1846
>> 1847 If unsure, please say Y.
>> 1848 endif # CPU_LOONGSON2F
508 1849
509 config RISCV_ALTERNATIVE !! 1850 config SYS_SUPPORTS_ZBOOT
510 bool 1851 bool
511 depends on !XIP_KERNEL !! 1852 select HAVE_KERNEL_GZIP
512 help !! 1853 select HAVE_KERNEL_BZIP2
513 This Kconfig allows the kernel to au !! 1854 select HAVE_KERNEL_LZ4
514 erratum or cpufeature required by th !! 1855 select HAVE_KERNEL_LZMA
515 time. The code patching overhead is !! 1856 select HAVE_KERNEL_LZO
516 once at boot and once on each module !! 1857 select HAVE_KERNEL_XZ
>> 1858
>> 1859 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1860 bool
>> 1861 select SYS_SUPPORTS_ZBOOT
>> 1862
>> 1863 config SYS_SUPPORTS_ZBOOT_UART_PROM
>> 1864 bool
>> 1865 select SYS_SUPPORTS_ZBOOT
>> 1866
>> 1867 config CPU_LOONGSON2
>> 1868 bool
>> 1869 select CPU_SUPPORTS_32BIT_KERNEL
>> 1870 select CPU_SUPPORTS_64BIT_KERNEL
>> 1871 select CPU_SUPPORTS_HIGHMEM
>> 1872 select CPU_SUPPORTS_HUGEPAGES
>> 1873 select ARCH_HAS_PHYS_TO_DMA
>> 1874 select CPU_HAS_LOAD_STORE_LR
>> 1875
>> 1876 config CPU_LOONGSON1
>> 1877 bool
>> 1878 select CPU_MIPS32
>> 1879 select CPU_MIPSR2
>> 1880 select CPU_HAS_PREFETCH
>> 1881 select CPU_HAS_LOAD_STORE_LR
>> 1882 select CPU_SUPPORTS_32BIT_KERNEL
>> 1883 select CPU_SUPPORTS_HIGHMEM
>> 1884 select CPU_SUPPORTS_CPUFREQ
>> 1885
>> 1886 config CPU_BMIPS32_3300
>> 1887 select SMP_UP if SMP
>> 1888 bool
>> 1889
>> 1890 config CPU_BMIPS4350
>> 1891 bool
>> 1892 select SYS_SUPPORTS_SMP
>> 1893 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1894
>> 1895 config CPU_BMIPS4380
>> 1896 bool
>> 1897 select MIPS_L1_CACHE_SHIFT_6
>> 1898 select SYS_SUPPORTS_SMP
>> 1899 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1900 select CPU_HAS_RIXI
>> 1901
>> 1902 config CPU_BMIPS5000
>> 1903 bool
>> 1904 select MIPS_CPU_SCACHE
>> 1905 select MIPS_L1_CACHE_SHIFT_7
>> 1906 select SYS_SUPPORTS_SMP
>> 1907 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1908 select CPU_HAS_RIXI
>> 1909
>> 1910 config SYS_HAS_CPU_LOONGSON3
>> 1911 bool
>> 1912 select CPU_SUPPORTS_CPUFREQ
>> 1913 select CPU_HAS_RIXI
>> 1914
>> 1915 config SYS_HAS_CPU_LOONGSON2E
>> 1916 bool
>> 1917
>> 1918 config SYS_HAS_CPU_LOONGSON2F
>> 1919 bool
>> 1920 select CPU_SUPPORTS_CPUFREQ
>> 1921 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1922 select CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 1923
>> 1924 config SYS_HAS_CPU_LOONGSON1B
>> 1925 bool
>> 1926
>> 1927 config SYS_HAS_CPU_LOONGSON1C
>> 1928 bool
>> 1929
>> 1930 config SYS_HAS_CPU_MIPS32_R1
>> 1931 bool
>> 1932
>> 1933 config SYS_HAS_CPU_MIPS32_R2
>> 1934 bool
>> 1935
>> 1936 config SYS_HAS_CPU_MIPS32_R3_5
>> 1937 bool
>> 1938
>> 1939 config SYS_HAS_CPU_MIPS32_R5
>> 1940 bool
>> 1941 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1942
>> 1943 config SYS_HAS_CPU_MIPS32_R6
>> 1944 bool
>> 1945 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1946
>> 1947 config SYS_HAS_CPU_MIPS64_R1
>> 1948 bool
>> 1949
>> 1950 config SYS_HAS_CPU_MIPS64_R2
>> 1951 bool
>> 1952
>> 1953 config SYS_HAS_CPU_MIPS64_R6
>> 1954 bool
>> 1955 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1956
>> 1957 config SYS_HAS_CPU_R3000
>> 1958 bool
>> 1959
>> 1960 config SYS_HAS_CPU_TX39XX
>> 1961 bool
>> 1962
>> 1963 config SYS_HAS_CPU_VR41XX
>> 1964 bool
>> 1965
>> 1966 config SYS_HAS_CPU_R4X00
>> 1967 bool
>> 1968
>> 1969 config SYS_HAS_CPU_TX49XX
>> 1970 bool
>> 1971
>> 1972 config SYS_HAS_CPU_R5000
>> 1973 bool
>> 1974
>> 1975 config SYS_HAS_CPU_R5500
>> 1976 bool
>> 1977
>> 1978 config SYS_HAS_CPU_NEVADA
>> 1979 bool
>> 1980
>> 1981 config SYS_HAS_CPU_R10000
>> 1982 bool
>> 1983 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1984
>> 1985 config SYS_HAS_CPU_RM7000
>> 1986 bool
>> 1987
>> 1988 config SYS_HAS_CPU_SB1
>> 1989 bool
>> 1990
>> 1991 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1992 bool
>> 1993
>> 1994 config SYS_HAS_CPU_BMIPS
>> 1995 bool
>> 1996
>> 1997 config SYS_HAS_CPU_BMIPS32_3300
>> 1998 bool
>> 1999 select SYS_HAS_CPU_BMIPS
>> 2000
>> 2001 config SYS_HAS_CPU_BMIPS4350
>> 2002 bool
>> 2003 select SYS_HAS_CPU_BMIPS
517 2004
518 config RISCV_ALTERNATIVE_EARLY !! 2005 config SYS_HAS_CPU_BMIPS4380
519 bool 2006 bool
520 depends on RISCV_ALTERNATIVE !! 2007 select SYS_HAS_CPU_BMIPS
>> 2008
>> 2009 config SYS_HAS_CPU_BMIPS5000
>> 2010 bool
>> 2011 select SYS_HAS_CPU_BMIPS
>> 2012 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 2013
>> 2014 config SYS_HAS_CPU_XLR
>> 2015 bool
>> 2016
>> 2017 config SYS_HAS_CPU_XLP
>> 2018 bool
>> 2019
>> 2020 #
>> 2021 # CPU may reorder R->R, R->W, W->R, W->W
>> 2022 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 2023 #
>> 2024 config WEAK_ORDERING
>> 2025 bool
>> 2026
>> 2027 #
>> 2028 # CPU may reorder reads and writes beyond LL/SC
>> 2029 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 2030 #
>> 2031 config WEAK_REORDERING_BEYOND_LLSC
>> 2032 bool
>> 2033 endmenu
>> 2034
>> 2035 #
>> 2036 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2037 #
>> 2038 config CPU_MIPS32
>> 2039 bool
>> 2040 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 2041
>> 2042 config CPU_MIPS64
>> 2043 bool
>> 2044 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
>> 2045
>> 2046 #
>> 2047 # These indicate the revision of the architecture
>> 2048 #
>> 2049 config CPU_MIPSR1
>> 2050 bool
>> 2051 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2052
>> 2053 config CPU_MIPSR2
>> 2054 bool
>> 2055 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2056 select CPU_HAS_RIXI
>> 2057 select MIPS_SPRAM
>> 2058
>> 2059 config CPU_MIPSR6
>> 2060 bool
>> 2061 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2062 select CPU_HAS_RIXI
>> 2063 select HAVE_ARCH_BITREVERSE
>> 2064 select MIPS_ASID_BITS_VARIABLE
>> 2065 select MIPS_CRC_SUPPORT
>> 2066 select MIPS_SPRAM
>> 2067
>> 2068 config TARGET_ISA_REV
>> 2069 int
>> 2070 default 1 if CPU_MIPSR1
>> 2071 default 2 if CPU_MIPSR2
>> 2072 default 6 if CPU_MIPSR6
>> 2073 default 0
521 help 2074 help
522 Allows early patching of the kernel !! 2075 Reflects the ISA revision being targeted by the kernel build. This
>> 2076 is effectively the Kconfig equivalent of MIPS_ISA_REV.
523 2077
524 config RISCV_ISA_C !! 2078 config EVA
525 bool "Emit compressed instructions whe !! 2079 bool
526 default y !! 2080
>> 2081 config XPA
>> 2082 bool
>> 2083
>> 2084 config SYS_SUPPORTS_32BIT_KERNEL
>> 2085 bool
>> 2086 config SYS_SUPPORTS_64BIT_KERNEL
>> 2087 bool
>> 2088 config CPU_SUPPORTS_32BIT_KERNEL
>> 2089 bool
>> 2090 config CPU_SUPPORTS_64BIT_KERNEL
>> 2091 bool
>> 2092 config CPU_SUPPORTS_CPUFREQ
>> 2093 bool
>> 2094 config CPU_SUPPORTS_ADDRWINCFG
>> 2095 bool
>> 2096 config CPU_SUPPORTS_HUGEPAGES
>> 2097 bool
>> 2098 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
>> 2099 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2100 bool
>> 2101 config MIPS_PGD_C0_CONTEXT
>> 2102 bool
>> 2103 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
>> 2104
>> 2105 #
>> 2106 # Set to y for ptrace access to watch registers.
>> 2107 #
>> 2108 config HARDWARE_WATCHPOINTS
>> 2109 bool
>> 2110 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2111
>> 2112 menu "Kernel type"
>> 2113
>> 2114 choice
>> 2115 prompt "Kernel code model"
527 help 2116 help
528 Adds "C" to the ISA subsets that the !! 2117 You should only select this option if you have a workload that
529 when building Linux, which results i !! 2118 actually benefits from 64-bit processing or if your machine has
530 Linux binary. !! 2119 large memory. You will only be presented a single option in this
>> 2120 menu if your system does not support both 32-bit and 64-bit kernels.
531 2121
532 If you don't know what to do here, s !! 2122 config 32BIT
>> 2123 bool "32-bit kernel"
>> 2124 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2125 select TRAD_SIGNALS
>> 2126 help
>> 2127 Select this option if you want to build a 32-bit kernel.
533 2128
534 config RISCV_ISA_SVNAPOT !! 2129 config 64BIT
535 bool "Svnapot extension support for su !! 2130 bool "64-bit kernel"
536 depends on 64BIT && MMU !! 2131 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
537 depends on RISCV_ALTERNATIVE <<
538 default y <<
539 help 2132 help
540 Allow kernel to detect the Svnapot I !! 2133 Select this option if you want to build a 64-bit kernel.
541 time and enable its usage. <<
542 2134
543 The Svnapot extension is used to mar !! 2135 endchoice
544 of contiguous virtual-to-physical tr <<
545 aligned power-of-2 (NAPOT) granulari <<
546 size. When HUGETLBFS is also selecte <<
547 allocates some memory for each NAPOT <<
548 When optimizing for low memory consu <<
549 the Svnapot extension, it may be bet <<
550 2136
551 If you don't know what to do here, s !! 2137 config KVM_GUEST
>> 2138 bool "KVM Guest Kernel"
>> 2139 depends on BROKEN_ON_SMP
>> 2140 help
>> 2141 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2142 mode.
>> 2143
>> 2144 config KVM_GUEST_TIMER_FREQ
>> 2145 int "Count/Compare Timer Frequency (MHz)"
>> 2146 depends on KVM_GUEST
>> 2147 default 100
>> 2148 help
>> 2149 Set this to non-zero if building a guest kernel for KVM to skip RTC
>> 2150 emulation when determining guest CPU Frequency. Instead, the guest's
>> 2151 timer frequency is specified directly.
552 2152
553 config RISCV_ISA_SVPBMT !! 2153 config MIPS_VA_BITS_48
554 bool "Svpbmt extension support for sup !! 2154 bool "48 bits virtual memory"
555 depends on 64BIT && MMU !! 2155 depends on 64BIT
556 depends on RISCV_ALTERNATIVE <<
557 default y <<
558 help 2156 help
559 Adds support to dynamically detect !! 2157 Support a maximum at least 48 bits of application virtual
560 ISA-extension (Supervisor-mode: pag !! 2158 memory. Default is 40 bits or less, depending on the CPU.
561 enable its usage. !! 2159 For page sizes 16k and above, this option results in a small
>> 2160 memory overhead for page tables. For 4k page size, a fourth
>> 2161 level of page tables is added which imposes both a memory
>> 2162 overhead as well as slower TLB fault handling.
562 2163
563 The memory type for a page contains !! 2164 If unsure, say N.
564 that indicate the cacheability, ide !! 2165
565 properties for access to that page. !! 2166 choice
>> 2167 prompt "Kernel page size"
>> 2168 default PAGE_SIZE_4KB
>> 2169
>> 2170 config PAGE_SIZE_4KB
>> 2171 bool "4kB"
>> 2172 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
>> 2173 help
>> 2174 This option select the standard 4kB Linux page size. On some
>> 2175 R3000-family processors this is the only available page size. Using
>> 2176 4kB page size will minimize memory consumption and is therefore
>> 2177 recommended for low memory systems.
>> 2178
>> 2179 config PAGE_SIZE_8KB
>> 2180 bool "8kB"
>> 2181 depends on CPU_CAVIUM_OCTEON
>> 2182 depends on !MIPS_VA_BITS_48
>> 2183 help
>> 2184 Using 8kB page size will result in higher performance kernel at
>> 2185 the price of higher memory consumption. This option is available
>> 2186 only on cnMIPS processors. Note that you will need a suitable Linux
>> 2187 distribution to support this.
>> 2188
>> 2189 config PAGE_SIZE_16KB
>> 2190 bool "16kB"
>> 2191 depends on !CPU_R3000 && !CPU_TX39XX
>> 2192 help
>> 2193 Using 16kB page size will result in higher performance kernel at
>> 2194 the price of higher memory consumption. This option is available on
>> 2195 all non-R3000 family processors. Note that you will need a suitable
>> 2196 Linux distribution to support this.
>> 2197
>> 2198 config PAGE_SIZE_32KB
>> 2199 bool "32kB"
>> 2200 depends on CPU_CAVIUM_OCTEON
>> 2201 depends on !MIPS_VA_BITS_48
>> 2202 help
>> 2203 Using 32kB page size will result in higher performance kernel at
>> 2204 the price of higher memory consumption. This option is available
>> 2205 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2206 distribution to support this.
>> 2207
>> 2208 config PAGE_SIZE_64KB
>> 2209 bool "64kB"
>> 2210 depends on !CPU_R3000 && !CPU_TX39XX
>> 2211 help
>> 2212 Using 64kB page size will result in higher performance kernel at
>> 2213 the price of higher memory consumption. This option is available on
>> 2214 all non-R3000 family processor. Not that at the time of this
>> 2215 writing this option is still high experimental.
>> 2216
>> 2217 endchoice
566 2218
567 The Svpbmt extension is only availa !! 2219 config FORCE_MAX_ZONEORDER
>> 2220 int "Maximum zone order"
>> 2221 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2222 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2223 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2224 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2225 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2226 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2227 range 11 64
>> 2228 default "11"
>> 2229 help
>> 2230 The kernel memory allocator divides physically contiguous memory
>> 2231 blocks into "zones", where each zone is a power of two number of
>> 2232 pages. This option selects the largest power of two that the kernel
>> 2233 keeps in the memory allocator. If you need to allocate very large
>> 2234 blocks of physically contiguous memory, then you may need to
>> 2235 increase this value.
568 2236
569 If you don't know what to do here, !! 2237 This config option is actually maximum order plus one. For example,
>> 2238 a value of 11 means that the largest free memory block is 2^10 pages.
570 2239
571 config TOOLCHAIN_HAS_V !! 2240 The page size is not necessarily 4KB. Keep this in mind
>> 2241 when choosing a value for this option.
>> 2242
>> 2243 config BOARD_SCACHE
572 bool 2244 bool
573 default y <<
574 depends on !64BIT || $(cc-option,-mabi <<
575 depends on !32BIT || $(cc-option,-mabi <<
576 depends on LLD_VERSION >= 140000 || LD <<
577 depends on AS_HAS_OPTION_ARCH <<
578 2245
579 config RISCV_ISA_V !! 2246 config IP22_CPU_SCACHE
580 bool "VECTOR extension support" !! 2247 bool
581 depends on TOOLCHAIN_HAS_V !! 2248 select BOARD_SCACHE
582 depends on FPU !! 2249
583 select DYNAMIC_SIGFRAME !! 2250 #
584 default y !! 2251 # Support for a MIPS32 / MIPS64 style S-caches
>> 2252 #
>> 2253 config MIPS_CPU_SCACHE
>> 2254 bool
>> 2255 select BOARD_SCACHE
>> 2256
>> 2257 config R5000_CPU_SCACHE
>> 2258 bool
>> 2259 select BOARD_SCACHE
>> 2260
>> 2261 config RM7000_CPU_SCACHE
>> 2262 bool
>> 2263 select BOARD_SCACHE
>> 2264
>> 2265 config SIBYTE_DMA_PAGEOPS
>> 2266 bool "Use DMA to clear/copy pages"
>> 2267 depends on CPU_SB1
585 help 2268 help
586 Say N here if you want to disable al !! 2269 Instead of using the CPU to zero and copy pages, use a Data Mover
587 in the kernel. !! 2270 channel. These DMA channels are otherwise unused by the standard
>> 2271 SiByte Linux port. Seems to give a small performance benefit.
588 2272
589 If you don't know what to do here, s !! 2273 config CPU_HAS_PREFETCH
>> 2274 bool
>> 2275
>> 2276 config CPU_GENERIC_DUMP_TLB
>> 2277 bool
>> 2278 default y if !(CPU_R3000 || CPU_TX39XX)
590 2279
591 config RISCV_ISA_V_DEFAULT_ENABLE !! 2280 config MIPS_FP_SUPPORT
592 bool "Enable userspace Vector by defau !! 2281 bool "Floating Point support" if EXPERT
593 depends on RISCV_ISA_V <<
594 default y 2282 default y
595 help 2283 help
596 Say Y here if you want to enable Vec !! 2284 Select y to include support for floating point in the kernel
597 Otherwise, userspace has to make exp !! 2285 including initialization of FPU hardware, FP context save & restore
598 Vector, or enable it via the sysctl !! 2286 and emulation of an FPU where necessary. Without this support any
>> 2287 userland program attempting to use floating point instructions will
>> 2288 receive a SIGILL.
599 2289
600 If you don't know what to do here, s !! 2290 If you know that your userland will not attempt to use floating point
>> 2291 instructions then you can say n here to shrink the kernel a little.
601 2292
602 config RISCV_ISA_V_UCOPY_THRESHOLD !! 2293 If unsure, say y.
603 int "Threshold size for vectorized use !! 2294
604 depends on RISCV_ISA_V !! 2295 config CPU_R2300_FPU
605 default 768 !! 2296 bool
606 help !! 2297 depends on MIPS_FP_SUPPORT
607 Prefer using vectorized copy_to_user !! 2298 default y if CPU_R3000 || CPU_TX39XX
608 workload size exceeds this value. !! 2299
>> 2300 config CPU_R3K_TLB
>> 2301 bool
609 2302
610 config RISCV_ISA_V_PREEMPTIVE !! 2303 config CPU_R4K_FPU
611 bool "Run kernel-mode Vector with kern !! 2304 bool
612 depends on PREEMPTION !! 2305 depends on MIPS_FP_SUPPORT
613 depends on RISCV_ISA_V !! 2306 default y if !CPU_R2300_FPU
>> 2307
>> 2308 config CPU_R4K_CACHE_TLB
>> 2309 bool
>> 2310 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
>> 2311
>> 2312 config MIPS_MT_SMP
>> 2313 bool "MIPS MT SMP support (1 TC on each available VPE)"
614 default y 2314 default y
>> 2315 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2316 select CPU_MIPSR2_IRQ_VI
>> 2317 select CPU_MIPSR2_IRQ_EI
>> 2318 select SYNC_R4K
>> 2319 select MIPS_MT
>> 2320 select SMP
>> 2321 select SMP_UP
>> 2322 select SYS_SUPPORTS_SMP
>> 2323 select SYS_SUPPORTS_SCHED_SMT
>> 2324 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2325 help
>> 2326 This is a kernel model which is known as SMVP. This is supported
>> 2327 on cores with the MT ASE and uses the available VPEs to implement
>> 2328 virtual processors which supports SMP. This is equivalent to the
>> 2329 Intel Hyperthreading feature. For further information go to
>> 2330 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2331
>> 2332 config MIPS_MT
>> 2333 bool
>> 2334
>> 2335 config SCHED_SMT
>> 2336 bool "SMT (multithreading) scheduler support"
>> 2337 depends on SYS_SUPPORTS_SCHED_SMT
>> 2338 default n
615 help 2339 help
616 Usually, in-kernel SIMD routines are !! 2340 SMT scheduler support improves the CPU scheduler's decision making
617 Functions which envoke long running !! 2341 when dealing with MIPS MT enabled cores at a cost of slightly
618 vector unit to prevent blocking othe !! 2342 increased overhead in some places. If unsure say N here.
>> 2343
>> 2344 config SYS_SUPPORTS_SCHED_SMT
>> 2345 bool
619 2346
620 This config allows kernel to run SIM !! 2347 config SYS_SUPPORTS_MULTITHREADING
621 preemption. Enabling this config wil !! 2348 bool
622 consumption due to the allocation of !! 2349
>> 2350 config MIPS_MT_FPAFF
>> 2351 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2352 default y
>> 2353 depends on MIPS_MT_SMP
623 2354
624 config RISCV_ISA_ZAWRS !! 2355 config MIPSR2_TO_R6_EMULATOR
625 bool "Zawrs extension support for more !! 2356 bool "MIPS R2-to-R6 emulator"
626 depends on RISCV_ALTERNATIVE !! 2357 depends on CPU_MIPSR6
>> 2358 depends on MIPS_FP_SUPPORT
627 default y 2359 default y
628 help 2360 help
629 The Zawrs extension defines instruct !! 2361 Choose this option if you want to run non-R6 MIPS userland code.
630 which allow a hart to enter a low-po !! 2362 Even if you say 'Y' here, the emulator will still be disabled by
631 hypervisor while waiting on a store !! 2363 default. You can enable it using the 'mipsr2emu' kernel option.
632 use of these instructions in the ker !! 2364 The only reason this is a build-time option is to save ~14K from the
633 detected at boot. !! 2365 final kernel image.
634 2366
635 If you don't know what to do here, s !! 2367 config SYS_SUPPORTS_VPE_LOADER
>> 2368 bool
>> 2369 depends on SYS_SUPPORTS_MULTITHREADING
>> 2370 help
>> 2371 Indicates that the platform supports the VPE loader, and provides
>> 2372 physical_memsize.
636 2373
637 config TOOLCHAIN_HAS_ZBB !! 2374 config MIPS_VPE_LOADER
>> 2375 bool "VPE loader support."
>> 2376 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2377 select CPU_MIPSR2_IRQ_VI
>> 2378 select CPU_MIPSR2_IRQ_EI
>> 2379 select MIPS_MT
>> 2380 help
>> 2381 Includes a loader for loading an elf relocatable object
>> 2382 onto another VPE and running it.
>> 2383
>> 2384 config MIPS_VPE_LOADER_CMP
638 bool 2385 bool
639 default y !! 2386 default "y"
640 depends on !64BIT || $(cc-option,-mabi !! 2387 depends on MIPS_VPE_LOADER && MIPS_CMP
641 depends on !32BIT || $(cc-option,-mabi <<
642 depends on LLD_VERSION >= 150000 || LD <<
643 depends on AS_HAS_OPTION_ARCH <<
644 2388
645 # This symbol indicates that the toolchain sup !! 2389 config MIPS_VPE_LOADER_MT
646 # extensions, including Zvk*, Zvbb, and Zvbc. !! 2390 bool
647 # binutils added all except Zvkb, then added Z !! 2391 default "y"
648 config TOOLCHAIN_HAS_VECTOR_CRYPTO !! 2392 depends on MIPS_VPE_LOADER && !MIPS_CMP
649 def_bool $(as-instr, .option arch$(com <<
650 depends on AS_HAS_OPTION_ARCH <<
651 2393
652 config RISCV_ISA_ZBA !! 2394 config MIPS_VPE_LOADER_TOM
653 bool "Zba extension support for bit ma !! 2395 bool "Load VPE program into memory hidden from linux"
>> 2396 depends on MIPS_VPE_LOADER
654 default y 2397 default y
655 help 2398 help
656 Add support for enabling optimisati !! 2399 The loader can use memory that is present but has been hidden from
657 extension is detected at boot. !! 2400 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2401 you to ensure the amount you put in the option and the space your
>> 2402 program requires is less or equal to the amount physically present.
658 2403
659 The Zba extension provides instruct !! 2404 config MIPS_VPE_APSP_API
660 of addresses that index into arrays !! 2405 bool "Enable support for AP/SP API (RTLX)"
>> 2406 depends on MIPS_VPE_LOADER
661 2407
662 If you don't know what to do here, !! 2408 config MIPS_VPE_APSP_API_CMP
>> 2409 bool
>> 2410 default "y"
>> 2411 depends on MIPS_VPE_APSP_API && MIPS_CMP
663 2412
664 config RISCV_ISA_ZBB !! 2413 config MIPS_VPE_APSP_API_MT
665 bool "Zbb extension support for bit ma !! 2414 bool
666 depends on TOOLCHAIN_HAS_ZBB !! 2415 default "y"
667 depends on RISCV_ALTERNATIVE !! 2416 depends on MIPS_VPE_APSP_API && !MIPS_CMP
668 default y !! 2417
>> 2418 config MIPS_CMP
>> 2419 bool "MIPS CMP framework support (DEPRECATED)"
>> 2420 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2421 select SMP
>> 2422 select SYNC_R4K
>> 2423 select SYS_SUPPORTS_SMP
>> 2424 select WEAK_ORDERING
>> 2425 default n
669 help 2426 help
670 Adds support to dynamically detect !! 2427 Select this if you are using a bootloader which implements the "CMP
671 extension (basic bit manipulation) !! 2428 framework" protocol (ie. YAMON) and want your kernel to make use of
>> 2429 its ability to start secondary CPUs.
>> 2430
>> 2431 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2432 instead of this.
>> 2433
>> 2434 config MIPS_CPS
>> 2435 bool "MIPS Coherent Processing System support"
>> 2436 depends on SYS_SUPPORTS_MIPS_CPS
>> 2437 select MIPS_CM
>> 2438 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2439 select SMP
>> 2440 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2441 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2442 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2443 select SYS_SUPPORTS_SMP
>> 2444 select WEAK_ORDERING
>> 2445 help
>> 2446 Select this if you wish to run an SMP kernel across multiple cores
>> 2447 within a MIPS Coherent Processing System. When this option is
>> 2448 enabled the kernel will probe for other cores and boot them with
>> 2449 no external assistance. It is safe to enable this when hardware
>> 2450 support is unavailable.
672 2451
673 The Zbb extension provides instruct !! 2452 config MIPS_CPS_PM
674 of bit-specific operations (count b !! 2453 depends on MIPS_CPS
675 bitrotation, etc). !! 2454 bool
676 2455
677 If you don't know what to do here, !! 2456 config MIPS_CM
>> 2457 bool
>> 2458 select MIPS_CPC
678 2459
679 config TOOLCHAIN_HAS_ZBC !! 2460 config MIPS_CPC
680 bool 2461 bool
>> 2462
>> 2463 config SB1_PASS_2_WORKAROUNDS
>> 2464 bool
>> 2465 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
681 default y 2466 default y
682 depends on !64BIT || $(cc-option,-mabi <<
683 depends on !32BIT || $(cc-option,-mabi <<
684 depends on LLD_VERSION >= 150000 || LD <<
685 depends on AS_HAS_OPTION_ARCH <<
686 2467
687 config RISCV_ISA_ZBC !! 2468 config SB1_PASS_2_1_WORKAROUNDS
688 bool "Zbc extension support for carry- !! 2469 bool
689 depends on TOOLCHAIN_HAS_ZBC !! 2470 depends on CPU_SB1 && CPU_SB1_PASS_2
690 depends on MMU <<
691 depends on RISCV_ALTERNATIVE <<
692 default y 2471 default y
>> 2472
>> 2473 choice
>> 2474 prompt "SmartMIPS or microMIPS ASE support"
>> 2475
>> 2476 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2477 bool "None"
693 help 2478 help
694 Adds support to dynamically detect !! 2479 Select this if you want neither microMIPS nor SmartMIPS support
695 extension (carry-less multiplicatio <<
696 2480
697 The Zbc extension could accelerate !! 2481 config CPU_HAS_SMARTMIPS
698 calculations. !! 2482 depends on SYS_SUPPORTS_SMARTMIPS
>> 2483 bool "SmartMIPS"
>> 2484 help
>> 2485 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2486 increased security at both hardware and software level for
>> 2487 smartcards. Enabling this option will allow proper use of the
>> 2488 SmartMIPS instructions by Linux applications. However a kernel with
>> 2489 this option will not work on a MIPS core without SmartMIPS core. If
>> 2490 you don't know you probably don't have SmartMIPS and should say N
>> 2491 here.
699 2492
700 If you don't know what to do here, !! 2493 config CPU_MICROMIPS
>> 2494 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2495 bool "microMIPS"
>> 2496 help
>> 2497 When this option is enabled the kernel will be built using the
>> 2498 microMIPS ISA
701 2499
702 config RISCV_ISA_ZICBOM !! 2500 endchoice
703 bool "Zicbom extension support for non !! 2501
704 depends on MMU !! 2502 config CPU_HAS_MSA
705 depends on RISCV_ALTERNATIVE !! 2503 bool "Support for the MIPS SIMD Architecture"
706 default y !! 2504 depends on CPU_SUPPORTS_MSA
707 select RISCV_DMA_NONCOHERENT !! 2505 depends on MIPS_FP_SUPPORT
708 select DMA_DIRECT_REMAP !! 2506 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2507 help
>> 2508 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2509 and a set of SIMD instructions to operate on them. When this option
>> 2510 is enabled the kernel will support allocating & switching MSA
>> 2511 vector register contexts. If you know that your kernel will only be
>> 2512 running on CPUs which do not support MSA or that your userland will
>> 2513 not be making use of it then you may wish to say N here to reduce
>> 2514 the size & complexity of your kernel.
>> 2515
>> 2516 If unsure, say Y.
>> 2517
>> 2518 config CPU_HAS_WB
>> 2519 bool
>> 2520
>> 2521 config XKS01
>> 2522 bool
>> 2523
>> 2524 config CPU_HAS_RIXI
>> 2525 bool
>> 2526
>> 2527 config CPU_HAS_LOAD_STORE_LR
>> 2528 bool
709 help 2529 help
710 Adds support to dynamically detect !! 2530 CPU has support for unaligned load and store instructions:
711 extension (Cache Block Management O !! 2531 LWL, LWR, SWL, SWR (Load/store word left/right).
712 usage. !! 2532 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems).
713 2533
714 The Zicbom extension can be used to !! 2534 #
715 non-coherent DMA support on devices !! 2535 # Vectored interrupt mode is an R2 feature
>> 2536 #
>> 2537 config CPU_MIPSR2_IRQ_VI
>> 2538 bool
716 2539
717 If you don't know what to do here, !! 2540 #
>> 2541 # Extended interrupt mode is an R2 feature
>> 2542 #
>> 2543 config CPU_MIPSR2_IRQ_EI
>> 2544 bool
718 2545
719 config RISCV_ISA_ZICBOZ !! 2546 config CPU_HAS_SYNC
720 bool "Zicboz extension support for fas !! 2547 bool
721 depends on RISCV_ALTERNATIVE !! 2548 depends on !CPU_R3000
722 default y 2549 default y
723 help <<
724 Enable the use of the Zicboz extens <<
725 when available. <<
726 2550
727 The Zicboz extension is used for fa !! 2551 #
>> 2552 # CPU non-features
>> 2553 #
>> 2554 config CPU_DADDI_WORKAROUNDS
>> 2555 bool
728 2556
729 If you don't know what to do here, !! 2557 config CPU_R4000_WORKAROUNDS
>> 2558 bool
>> 2559 select CPU_R4400_WORKAROUNDS
730 2560
731 config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI !! 2561 config CPU_R4400_WORKAROUNDS
732 def_bool y !! 2562 bool
733 # https://sourceware.org/git/?p=binuti !! 2563
734 # https://gcc.gnu.org/git/?p=gcc.git;a !! 2564 config MIPS_ASID_SHIFT
735 depends on AS_IS_GNU && AS_VERSION >= !! 2565 int
736 help !! 2566 default 6 if CPU_R3000 || CPU_TX39XX
737 Binutils-2.38 and GCC-12.1.0 bumped !! 2567 default 0
738 20191213 version, which moves some i !! 2568
739 the Zicsr and Zifencei extensions. T !! 2569 config MIPS_ASID_BITS
740 Zicsr and Zifencei when binutils >= !! 2570 int
741 and Zifencei are supported in binuti !! 2571 default 0 if MIPS_ASID_BITS_VARIABLE
742 To make life easier, and avoid forci !! 2572 default 6 if CPU_R3000 || CPU_TX39XX
743 newer ISA spec to version 2.2, relax !! 2573 default 8
744 For clang < 17 or GCC < 11.3.0, for !! 2574
745 special treatment, this is dealt wit !! 2575 config MIPS_ASID_BITS_VARIABLE
>> 2576 bool
>> 2577
>> 2578 config MIPS_CRC_SUPPORT
>> 2579 bool
>> 2580
>> 2581 #
>> 2582 # - Highmem only makes sense for the 32-bit kernel.
>> 2583 # - The current highmem code will only work properly on physically indexed
>> 2584 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2585 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2586 # moment we protect the user and offer the highmem option only on machines
>> 2587 # where it's known to be safe. This will not offer highmem on a few systems
>> 2588 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2589 # indexed CPUs but we're playing safe.
>> 2590 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2591 # know they might have memory configurations that could make use of highmem
>> 2592 # support.
>> 2593 #
>> 2594 config HIGHMEM
>> 2595 bool "High Memory Support"
>> 2596 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2597
>> 2598 config CPU_SUPPORTS_HIGHMEM
>> 2599 bool
>> 2600
>> 2601 config SYS_SUPPORTS_HIGHMEM
>> 2602 bool
>> 2603
>> 2604 config SYS_SUPPORTS_SMARTMIPS
>> 2605 bool
>> 2606
>> 2607 config SYS_SUPPORTS_MICROMIPS
>> 2608 bool
>> 2609
>> 2610 config SYS_SUPPORTS_MIPS16
>> 2611 bool
>> 2612 help
>> 2613 This option must be set if a kernel might be executed on a MIPS16-
>> 2614 enabled CPU even if MIPS16 is not actually being used. In other
>> 2615 words, it makes the kernel MIPS16-tolerant.
>> 2616
>> 2617 config CPU_SUPPORTS_MSA
>> 2618 bool
746 2619
747 config TOOLCHAIN_NEEDS_OLD_ISA_SPEC !! 2620 config ARCH_FLATMEM_ENABLE
748 def_bool y 2621 def_bool y
749 depends on TOOLCHAIN_NEEDS_EXPLICIT_ZI !! 2622 depends on !NUMA && !CPU_LOONGSON2
750 # https://github.com/llvm/llvm-project !! 2623
751 # https://gcc.gnu.org/git/?p=gcc.git;a !! 2624 config ARCH_DISCONTIGMEM_ENABLE
752 depends on (CC_IS_CLANG && CLANG_VERSI !! 2625 bool
>> 2626 default y if SGI_IP27
753 help 2627 help
754 Certain versions of clang and GCC do !! 2628 Say Y to support efficient handling of discontiguous physical memory,
755 -march. This option causes an older !! 2629 for architectures which are either NUMA (Non-Uniform Memory Access)
756 versions of clang and GCC to be pass !! 2630 or have huge holes in the physical address space for other reasons.
757 as passing zicsr and zifencei to -ma !! 2631 See <file:Documentation/vm/numa.rst> for more.
758 2632
759 config FPU !! 2633 config ARCH_SPARSEMEM_ENABLE
760 bool "FPU support" !! 2634 bool
761 default y !! 2635 select SPARSEMEM_STATIC
>> 2636
>> 2637 config NUMA
>> 2638 bool "NUMA Support"
>> 2639 depends on SYS_SUPPORTS_NUMA
762 help 2640 help
763 Say N here if you want to disable al !! 2641 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
764 in the kernel. !! 2642 Access). This option improves performance on systems with more
>> 2643 than two nodes; on two node systems it is generally better to
>> 2644 leave it disabled; on single node systems disable this option
>> 2645 disabled.
765 2646
766 If you don't know what to do here, s !! 2647 config SYS_SUPPORTS_NUMA
>> 2648 bool
767 2649
768 config IRQ_STACKS !! 2650 config RELOCATABLE
769 bool "Independent irq & softirq stacks !! 2651 bool "Relocatable kernel"
770 default y !! 2652 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
771 select HAVE_IRQ_EXIT_ON_IRQ_STACK <<
772 select HAVE_SOFTIRQ_ON_OWN_STACK <<
773 help 2653 help
774 Add independent irq & softirq stacks !! 2654 This builds a kernel image that retains relocation information
775 overflows. We may save some memory f !! 2655 so it can be loaded someplace besides the default 1MB.
>> 2656 The relocations make the kernel binary about 15% larger,
>> 2657 but are discarded at runtime
>> 2658
>> 2659 config RELOCATION_TABLE_SIZE
>> 2660 hex "Relocation table size"
>> 2661 depends on RELOCATABLE
>> 2662 range 0x0 0x01000000
>> 2663 default "0x00100000"
>> 2664 ---help---
>> 2665 A table of relocation data will be appended to the kernel binary
>> 2666 and parsed at boot to fix up the relocated kernel.
776 2667
777 config THREAD_SIZE_ORDER !! 2668 This option allows the amount of space reserved for the table to be
778 int "Kernel stack size (in power-of-tw !! 2669 adjusted, although the default of 1Mb should be ok in most cases.
779 range 0 4 !! 2670
780 default 1 if 32BIT !! 2671 The build will fail and a valid size suggested if this is too small.
781 default 2 !! 2672
>> 2673 If unsure, leave at the default value.
>> 2674
>> 2675 config RANDOMIZE_BASE
>> 2676 bool "Randomize the address of the kernel image"
>> 2677 depends on RELOCATABLE
>> 2678 ---help---
>> 2679 Randomizes the physical and virtual address at which the
>> 2680 kernel image is loaded, as a security feature that
>> 2681 deters exploit attempts relying on knowledge of the location
>> 2682 of kernel internals.
>> 2683
>> 2684 Entropy is generated using any coprocessor 0 registers available.
>> 2685
>> 2686 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2687
>> 2688 If unsure, say N.
>> 2689
>> 2690 config RANDOMIZE_BASE_MAX_OFFSET
>> 2691 hex "Maximum kASLR offset" if EXPERT
>> 2692 depends on RANDOMIZE_BASE
>> 2693 range 0x0 0x40000000 if EVA || 64BIT
>> 2694 range 0x0 0x08000000
>> 2695 default "0x01000000"
>> 2696 ---help---
>> 2697 When kASLR is active, this provides the maximum offset that will
>> 2698 be applied to the kernel image. It should be set according to the
>> 2699 amount of physical RAM available in the target system minus
>> 2700 PHYSICAL_START and must be a power of 2.
>> 2701
>> 2702 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2703 EVA or 64-bit. The default is 16Mb.
>> 2704
>> 2705 config NODES_SHIFT
>> 2706 int
>> 2707 default "6"
>> 2708 depends on NEED_MULTIPLE_NODES
>> 2709
>> 2710 config HW_PERF_EVENTS
>> 2711 bool "Enable hardware performance counter support for perf events"
>> 2712 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
>> 2713 default y
782 help 2714 help
783 Specify the Pages of thread stack si !! 2715 Enable hardware performance counter support for perf events. If
784 affects irq stack size, which is equ !! 2716 disabled, perf events will use software events only.
785 2717
786 config RISCV_MISALIGNED !! 2718 config SMP
787 bool !! 2719 bool "Multi-Processing support"
788 select SYSCTL_ARCH_UNALIGN_ALLOW !! 2720 depends on SYS_SUPPORTS_SMP
789 help 2721 help
790 Embed support for emulating misalign !! 2722 This enables support for systems with more than one CPU. If you have
>> 2723 a system with only one CPU, say N. If you have a system with more
>> 2724 than one CPU, say Y.
>> 2725
>> 2726 If you say N here, the kernel will run on uni- and multiprocessor
>> 2727 machines, but will use only one CPU of a multiprocessor machine. If
>> 2728 you say Y here, the kernel will run on many, but not all,
>> 2729 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2730 will run faster if you say N here.
791 2731
792 choice !! 2732 People using multiprocessor machines who say Y here should also say
793 prompt "Unaligned Accesses Support" !! 2733 Y to "Enhanced Real Time Clock Support", below.
794 default RISCV_PROBE_UNALIGNED_ACCESS !! 2734
>> 2735 See also the SMP-HOWTO available at
>> 2736 <http://www.tldp.org/docs.html#howto>.
>> 2737
>> 2738 If you don't know what to do here, say N.
>> 2739
>> 2740 config HOTPLUG_CPU
>> 2741 bool "Support for hot-pluggable CPUs"
>> 2742 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
795 help 2743 help
796 This determines the level of support !! 2744 Say Y here to allow turning CPUs off and on. CPUs can be
797 information is used by the kernel to !! 2745 controlled through /sys/devices/system/cpu.
798 exposed to user space via the hwprob !! 2746 (Note: power management support will enable this option
799 probed at boot by default. !! 2747 automatically on SMP systems. )
800 !! 2748 Say N if you want to disable CPU hotplug.
801 config RISCV_PROBE_UNALIGNED_ACCESS <<
802 bool "Probe for hardware unaligned acc <<
803 select RISCV_MISALIGNED <<
804 help <<
805 During boot, the kernel will run a s <<
806 speed of unaligned accesses. This pr <<
807 the speed of unaligned accesses on t <<
808 memory accesses trap into the kernel <<
809 system, the kernel will emulate the <<
810 UABI. <<
811 <<
812 config RISCV_EMULATED_UNALIGNED_ACCESS <<
813 bool "Emulate unaligned access where s <<
814 select RISCV_MISALIGNED <<
815 help <<
816 If unaligned memory accesses trap in <<
817 supported by the system, the kernel <<
818 accesses to preserve the UABI. When <<
819 unaligned accesses, the unaligned ac <<
820 <<
821 config RISCV_SLOW_UNALIGNED_ACCESS <<
822 bool "Assume the system supports slow <<
823 depends on NONPORTABLE <<
824 help <<
825 Assume that the system supports slow <<
826 kernel and userspace programs may no <<
827 that do not support unaligned memory <<
828 <<
829 config RISCV_EFFICIENT_UNALIGNED_ACCESS <<
830 bool "Assume the system supports fast <<
831 depends on NONPORTABLE <<
832 select DCACHE_WORD_ACCESS if MMU <<
833 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
834 help <<
835 Assume that the system supports fast <<
836 enabled, this option improves the pe <<
837 systems. However, the kernel and use <<
838 slowly, or will not be able to run a <<
839 support efficient unaligned memory a <<
840 2749
841 endchoice !! 2750 config SMP_UP
>> 2751 bool
>> 2752
>> 2753 config SYS_SUPPORTS_MIPS_CMP
>> 2754 bool
>> 2755
>> 2756 config SYS_SUPPORTS_MIPS_CPS
>> 2757 bool
842 2758
843 source "arch/riscv/Kconfig.vendor" !! 2759 config SYS_SUPPORTS_SMP
>> 2760 bool
844 2761
845 endmenu # "Platform type" !! 2762 config NR_CPUS_DEFAULT_4
>> 2763 bool
846 2764
847 menu "Kernel features" !! 2765 config NR_CPUS_DEFAULT_8
>> 2766 bool
848 2767
849 source "kernel/Kconfig.hz" !! 2768 config NR_CPUS_DEFAULT_16
>> 2769 bool
850 2770
851 config RISCV_SBI_V01 !! 2771 config NR_CPUS_DEFAULT_32
852 bool "SBI v0.1 support" !! 2772 bool
853 depends on RISCV_SBI !! 2773
854 help !! 2774 config NR_CPUS_DEFAULT_64
855 This config allows kernel to use SBI !! 2775 bool
856 deprecated in future once legacy M-m !! 2776
>> 2777 config NR_CPUS
>> 2778 int "Maximum number of CPUs (2-256)"
>> 2779 range 2 256
>> 2780 depends on SMP
>> 2781 default "4" if NR_CPUS_DEFAULT_4
>> 2782 default "8" if NR_CPUS_DEFAULT_8
>> 2783 default "16" if NR_CPUS_DEFAULT_16
>> 2784 default "32" if NR_CPUS_DEFAULT_32
>> 2785 default "64" if NR_CPUS_DEFAULT_64
>> 2786 help
>> 2787 This allows you to specify the maximum number of CPUs which this
>> 2788 kernel will support. The maximum supported value is 32 for 32-bit
>> 2789 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2790 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2791 and 2 for all others.
>> 2792
>> 2793 This is purely to save memory - each supported CPU adds
>> 2794 approximately eight kilobytes to the kernel image. For best
>> 2795 performance should round up your number of processors to the next
>> 2796 power of two.
>> 2797
>> 2798 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2799 bool
857 2800
858 config RISCV_BOOT_SPINWAIT !! 2801 config MIPS_NR_CPU_NR_MAP_1024
859 bool "Spinwait booting method" !! 2802 bool
>> 2803
>> 2804 config MIPS_NR_CPU_NR_MAP
>> 2805 int
860 depends on SMP 2806 depends on SMP
861 default y if RISCV_SBI_V01 || RISCV_M_ !! 2807 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2808 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2809
>> 2810 #
>> 2811 # Timer Interrupt Frequency Configuration
>> 2812 #
>> 2813
>> 2814 choice
>> 2815 prompt "Timer frequency"
>> 2816 default HZ_250
862 help 2817 help
863 This enables support for booting Lin !! 2818 Allows the configuration of the timer frequency.
864 spinwait method, all cores randomly <<
865 gets chosen via lottery and all othe <<
866 variable. This method cannot support <<
867 scheme. It should be only enabled fo <<
868 on older firmware without SBI HSM ex <<
869 rely on ordered booting via SBI HSM <<
870 dynamically at runtime if the firmwa <<
871 <<
872 Since spinwait is incompatible with <<
873 NR_CPUS be large enough to contain t <<
874 hart to enter Linux. <<
875 2819
876 If unsure what to do here, say N. !! 2820 config HZ_24
>> 2821 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
877 2822
878 config ARCH_SUPPORTS_KEXEC !! 2823 config HZ_48
879 def_bool y !! 2824 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
880 2825
881 config ARCH_SELECTS_KEXEC !! 2826 config HZ_100
882 def_bool y !! 2827 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
883 depends on KEXEC <<
884 select HOTPLUG_CPU if SMP <<
885 2828
886 config ARCH_SUPPORTS_KEXEC_FILE !! 2829 config HZ_128
887 def_bool 64BIT !! 2830 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
888 2831
889 config ARCH_SELECTS_KEXEC_FILE !! 2832 config HZ_250
890 def_bool y !! 2833 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
891 depends on KEXEC_FILE <<
892 select HAVE_IMA_KEXEC if IMA <<
893 select KEXEC_ELF <<
894 2834
895 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2835 config HZ_256
896 def_bool ARCH_SUPPORTS_KEXEC_FILE !! 2836 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
897 2837
898 config ARCH_SUPPORTS_CRASH_DUMP !! 2838 config HZ_1000
899 def_bool y !! 2839 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
900 2840
901 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATIO !! 2841 config HZ_1024
902 def_bool CRASH_RESERVE !! 2842 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
903 2843
904 config COMPAT !! 2844 endchoice
905 bool "Kernel support for 32-bit U-mode <<
906 default 64BIT <<
907 depends on 64BIT && MMU <<
908 help <<
909 This option enables support for a 32 <<
910 kernel at S-mode. riscv32-specific c <<
911 the user helper functions (vdso), si <<
912 ptrace interface are handled appropr <<
913 <<
914 If you want to execute 32-bit usersp <<
915 <<
916 config PARAVIRT <<
917 bool "Enable paravirtualization code" <<
918 depends on RISCV_SBI <<
919 help <<
920 This changes the kernel so it can mo <<
921 under a hypervisor, potentially impr <<
922 over full virtualization. <<
923 <<
924 config PARAVIRT_TIME_ACCOUNTING <<
925 bool "Paravirtual steal time accountin <<
926 depends on PARAVIRT <<
927 help <<
928 Select this option to enable fine gr <<
929 accounting. Time spent executing oth <<
930 the current vCPU is discounted from <<
931 that, there can be a small performan <<
932 2845
933 If in doubt, say N here. !! 2846 config SYS_SUPPORTS_24HZ
>> 2847 bool
934 2848
935 config RELOCATABLE !! 2849 config SYS_SUPPORTS_48HZ
936 bool "Build a relocatable kernel" !! 2850 bool
937 depends on MMU && 64BIT && !XIP_KERNEL <<
938 select MODULE_SECTIONS if MODULES <<
939 help <<
940 This builds a kernel as a Position I <<
941 which retains all relocation metadat <<
942 kernel binary at runtime to a differ <<
943 address it was linked at. <<
944 Since RISCV uses the RELA relocation <<
945 relocation pass at runtime even if t <<
946 same address it was linked at. <<
947 2851
948 If unsure, say N. !! 2852 config SYS_SUPPORTS_100HZ
>> 2853 bool
949 2854
950 config RANDOMIZE_BASE !! 2855 config SYS_SUPPORTS_128HZ
951 bool "Randomize the address of the ker !! 2856 bool
952 select RELOCATABLE !! 2857
953 depends on MMU && 64BIT && !XIP_KERNEL !! 2858 config SYS_SUPPORTS_250HZ
954 help !! 2859 bool
955 Randomizes the virtual address at wh !! 2860
956 loaded, as a security feature that d !! 2861 config SYS_SUPPORTS_256HZ
957 relying on knowledge of the location !! 2862 bool
958 !! 2863
959 It is the bootloader's job to provid !! 2864 config SYS_SUPPORTS_1000HZ
960 random u64 value in /chosen/kaslr-se !! 2865 bool
961 !! 2866
962 When booting via the UEFI stub, it w !! 2867 config SYS_SUPPORTS_1024HZ
963 EFI_RNG_PROTOCOL implementation (if !! 2868 bool
964 to the kernel proper. In addition, i !! 2869
965 location of the kernel Image as well !! 2870 config SYS_SUPPORTS_ARBIT_HZ
966 !! 2871 bool
967 If unsure, say N. !! 2872 default y if !SYS_SUPPORTS_24HZ && \
968 !! 2873 !SYS_SUPPORTS_48HZ && \
969 endmenu # "Kernel features" !! 2874 !SYS_SUPPORTS_100HZ && \
970 !! 2875 !SYS_SUPPORTS_128HZ && \
971 menu "Boot options" !! 2876 !SYS_SUPPORTS_250HZ && \
972 !! 2877 !SYS_SUPPORTS_256HZ && \
973 config CMDLINE !! 2878 !SYS_SUPPORTS_1000HZ && \
974 string "Built-in kernel command line" !! 2879 !SYS_SUPPORTS_1024HZ
975 help !! 2880
976 For most platforms, the arguments fo !! 2881 config HZ
977 are provided at run-time, during boo !! 2882 int
978 where either no arguments are being !! 2883 default 24 if HZ_24
979 arguments are insufficient or even i !! 2884 default 48 if HZ_48
>> 2885 default 100 if HZ_100
>> 2886 default 128 if HZ_128
>> 2887 default 250 if HZ_250
>> 2888 default 256 if HZ_256
>> 2889 default 1000 if HZ_1000
>> 2890 default 1024 if HZ_1024
>> 2891
>> 2892 config SCHED_HRTICK
>> 2893 def_bool HIGH_RES_TIMERS
>> 2894
>> 2895 config KEXEC
>> 2896 bool "Kexec system call"
>> 2897 select KEXEC_CORE
>> 2898 help
>> 2899 kexec is a system call that implements the ability to shutdown your
>> 2900 current kernel, and to start another kernel. It is like a reboot
>> 2901 but it is independent of the system firmware. And like a reboot
>> 2902 you can start any kernel with it, not just Linux.
>> 2903
>> 2904 The name comes from the similarity to the exec system call.
>> 2905
>> 2906 It is an ongoing process to be certain the hardware in a machine
>> 2907 is properly shutdown, so do not be surprised if this code does not
>> 2908 initially work for you. As of this writing the exact hardware
>> 2909 interface is strongly in flux, so no good recommendation can be
>> 2910 made.
>> 2911
>> 2912 config CRASH_DUMP
>> 2913 bool "Kernel crash dumps"
>> 2914 help
>> 2915 Generate crash dump after being started by kexec.
>> 2916 This should be normally only set in special crash dump kernels
>> 2917 which are loaded in the main kernel with kexec-tools into
>> 2918 a specially reserved region and then later executed after
>> 2919 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2920 to a memory address not used by the main kernel or firmware using
>> 2921 PHYSICAL_START.
>> 2922
>> 2923 config PHYSICAL_START
>> 2924 hex "Physical address where the kernel is loaded"
>> 2925 default "0xffffffff84000000"
>> 2926 depends on CRASH_DUMP
>> 2927 help
>> 2928 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2929 If you plan to use kernel for capturing the crash dump change
>> 2930 this value to start of the reserved region (the "X" value as
>> 2931 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2932 passed to the panic-ed kernel).
>> 2933
>> 2934 config SECCOMP
>> 2935 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2936 depends on PROC_FS
>> 2937 default y
>> 2938 help
>> 2939 This kernel feature is useful for number crunching applications
>> 2940 that may need to compute untrusted bytecode during their
>> 2941 execution. By using pipes or other transports made available to
>> 2942 the process as file descriptors supporting the read/write
>> 2943 syscalls, it's possible to isolate those applications in
>> 2944 their own address space using seccomp. Once seccomp is
>> 2945 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2946 and the task is only allowed to execute a few safe syscalls
>> 2947 defined by each seccomp mode.
>> 2948
>> 2949 If unsure, say Y. Only embedded should say N here.
>> 2950
>> 2951 config MIPS_O32_FP64_SUPPORT
>> 2952 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 2953 depends on 32BIT || MIPS32_O32
>> 2954 help
>> 2955 When this is enabled, the kernel will support use of 64-bit floating
>> 2956 point registers with binaries using the O32 ABI along with the
>> 2957 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2958 32-bit MIPS systems this support is at the cost of increasing the
>> 2959 size and complexity of the compiled FPU emulator. Thus if you are
>> 2960 running a MIPS32 system and know that none of your userland binaries
>> 2961 will require 64-bit floating point, you may wish to reduce the size
>> 2962 of your kernel & potentially improve FP emulation performance by
>> 2963 saying N here.
>> 2964
>> 2965 Although binutils currently supports use of this flag the details
>> 2966 concerning its effect upon the O32 ABI in userland are still being
>> 2967 worked on. In order to avoid userland becoming dependant upon current
>> 2968 behaviour before the details have been finalised, this option should
>> 2969 be considered experimental and only enabled by those working upon
>> 2970 said details.
>> 2971
>> 2972 If unsure, say N.
>> 2973
>> 2974 config USE_OF
>> 2975 bool
>> 2976 select OF
>> 2977 select OF_EARLY_FLATTREE
>> 2978 select IRQ_DOMAIN
>> 2979
>> 2980 config UHI_BOOT
>> 2981 bool
980 2982
981 When that occurs, it is possible to !! 2983 config BUILTIN_DTB
982 line here and choose how the kernel !! 2984 bool
983 2985
984 choice 2986 choice
985 prompt "Built-in command line usage" !! 2987 prompt "Kernel appended dtb support" if USE_OF
986 depends on CMDLINE != "" !! 2988 default MIPS_NO_APPENDED_DTB
987 default CMDLINE_FALLBACK <<
988 help <<
989 Choose how the kernel will handle th <<
990 line. <<
991 <<
992 config CMDLINE_FALLBACK <<
993 bool "Use bootloader kernel arguments <<
994 help <<
995 Use the built-in command line as fal <<
996 during boot. This is the default beh <<
997 <<
998 config CMDLINE_EXTEND <<
999 bool "Extend bootloader kernel argumen <<
1000 help <<
1001 The command-line arguments provided <<
1002 appended to the built-in command li <<
1003 cases where the provided arguments <<
1004 you don't want to or cannot modify <<
1005 <<
1006 config CMDLINE_FORCE <<
1007 bool "Always use the default kernel c <<
1008 help <<
1009 Always use the built-in command lin <<
1010 boot. This is useful in case you ne <<
1011 command line on systems where you d <<
1012 over it. <<
1013 2989
>> 2990 config MIPS_NO_APPENDED_DTB
>> 2991 bool "None"
>> 2992 help
>> 2993 Do not enable appended dtb support.
>> 2994
>> 2995 config MIPS_ELF_APPENDED_DTB
>> 2996 bool "vmlinux"
>> 2997 help
>> 2998 With this option, the boot code will look for a device tree binary
>> 2999 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 3000 it is empty and the DTB can be appended using binutils command
>> 3001 objcopy:
>> 3002
>> 3003 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 3004
>> 3005 This is meant as a backward compatiblity convenience for those
>> 3006 systems with a bootloader that can't be upgraded to accommodate
>> 3007 the documented boot protocol using a device tree.
>> 3008
>> 3009 config MIPS_RAW_APPENDED_DTB
>> 3010 bool "vmlinux.bin or vmlinuz.bin"
>> 3011 help
>> 3012 With this option, the boot code will look for a device tree binary
>> 3013 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 3014 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 3015
>> 3016 This is meant as a backward compatibility convenience for those
>> 3017 systems with a bootloader that can't be upgraded to accommodate
>> 3018 the documented boot protocol using a device tree.
>> 3019
>> 3020 Beware that there is very little in terms of protection against
>> 3021 this option being confused by leftover garbage in memory that might
>> 3022 look like a DTB header after a reboot if no actual DTB is appended
>> 3023 to vmlinux.bin. Do not leave this option active in a production kernel
>> 3024 if you don't intend to always append a DTB.
>> 3025 endchoice
>> 3026
>> 3027 choice
>> 3028 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
>> 3029 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 3030 !MIPS_MALTA && \
>> 3031 !CAVIUM_OCTEON_SOC
>> 3032 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 3033
>> 3034 config MIPS_CMDLINE_FROM_DTB
>> 3035 depends on USE_OF
>> 3036 bool "Dtb kernel arguments if available"
>> 3037
>> 3038 config MIPS_CMDLINE_DTB_EXTEND
>> 3039 depends on USE_OF
>> 3040 bool "Extend dtb kernel arguments with bootloader arguments"
>> 3041
>> 3042 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 3043 bool "Bootloader kernel arguments if available"
>> 3044
>> 3045 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3046 depends on CMDLINE_BOOL
>> 3047 bool "Extend builtin kernel arguments with bootloader arguments"
1014 endchoice 3048 endchoice
1015 3049
1016 config EFI_STUB !! 3050 endmenu
>> 3051
>> 3052 config LOCKDEP_SUPPORT
1017 bool 3053 bool
>> 3054 default y
1018 3055
1019 config EFI !! 3056 config STACKTRACE_SUPPORT
1020 bool "UEFI runtime support" !! 3057 bool
1021 depends on OF && !XIP_KERNEL !! 3058 default y
1022 depends on MMU <<
1023 default y <<
1024 select ARCH_SUPPORTS_ACPI if 64BIT <<
1025 select EFI_GENERIC_STUB <<
1026 select EFI_PARAMS_FROM_FDT <<
1027 select EFI_RUNTIME_WRAPPERS <<
1028 select EFI_STUB <<
1029 select LIBFDT <<
1030 select RISCV_ISA_C <<
1031 select UCS2_STRING <<
1032 help <<
1033 This option provides support for ru <<
1034 by UEFI firmware (such as non-volat <<
1035 clock, and platform reset). A UEFI <<
1036 allow the kernel to be booted as an <<
1037 is only useful on systems that have <<
1038 3059
1039 config DMI !! 3060 config PGTABLE_LEVELS
1040 bool "Enable support for SMBIOS (DMI) !! 3061 int
1041 depends on EFI !! 3062 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3063 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
>> 3064 default 2
>> 3065
>> 3066 config MIPS_AUTO_PFN_OFFSET
>> 3067 bool
>> 3068
>> 3069 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 3070
>> 3071 config PCI_DRIVERS_GENERIC
>> 3072 select PCI_DOMAINS_GENERIC if PCI
>> 3073 bool
>> 3074
>> 3075 config PCI_DRIVERS_LEGACY
>> 3076 def_bool !PCI_DRIVERS_GENERIC
>> 3077 select NO_GENERIC_PCI_IOPORT_MAP
>> 3078 select PCI_DOMAINS if PCI
>> 3079
>> 3080 #
>> 3081 # ISA support is now enabled via select. Too many systems still have the one
>> 3082 # or other ISA chip on the board that users don't know about so don't expect
>> 3083 # users to choose the right thing ...
>> 3084 #
>> 3085 config ISA
>> 3086 bool
>> 3087
>> 3088 config TC
>> 3089 bool "TURBOchannel support"
>> 3090 depends on MACH_DECSTATION
>> 3091 help
>> 3092 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3093 processors. TURBOchannel programming specifications are available
>> 3094 at:
>> 3095 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3096 and:
>> 3097 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3098 Linux driver support status is documented at:
>> 3099 <http://www.linux-mips.org/wiki/DECstation>
>> 3100
>> 3101 config MMU
>> 3102 bool
1042 default y 3103 default y
1043 help <<
1044 This enables SMBIOS/DMI feature for <<
1045 3104
1046 This option is only useful on syste !! 3105 config ARCH_MMAP_RND_BITS_MIN
1047 However, even with this option, the !! 3106 default 12 if 64BIT
1048 continue to boot on existing non-UE !! 3107 default 8
1049 3108
1050 config CC_HAVE_STACKPROTECTOR_TLS !! 3109 config ARCH_MMAP_RND_BITS_MAX
1051 def_bool $(cc-option,-mstack-protecto !! 3110 default 18 if 64BIT
>> 3111 default 15
1052 3112
1053 config STACKPROTECTOR_PER_TASK !! 3113 config ARCH_MMAP_RND_COMPAT_BITS_MIN
1054 def_bool y !! 3114 default 8
1055 depends on !RANDSTRUCT <<
1056 depends on STACKPROTECTOR && CC_HAVE_ <<
1057 3115
1058 config PHYS_RAM_BASE_FIXED !! 3116 config ARCH_MMAP_RND_COMPAT_BITS_MAX
1059 bool "Explicitly specified physical R !! 3117 default 15
1060 depends on NONPORTABLE <<
1061 default n <<
1062 3118
1063 config PHYS_RAM_BASE !! 3119 config I8253
1064 hex "Platform Physical RAM address" !! 3120 bool
1065 depends on PHYS_RAM_BASE_FIXED !! 3121 select CLKSRC_I8253
1066 default "0x80000000" !! 3122 select CLKEVT_I8253
1067 help !! 3123 select MIPS_EXTERNAL_TIMER
1068 This is the physical address of RAM <<
1069 explicitly specified to run early r <<
1070 from flash to RAM. <<
1071 <<
1072 config XIP_KERNEL <<
1073 bool "Kernel Execute-In-Place from RO <<
1074 depends on MMU && SPARSEMEM && NONPOR <<
1075 # This prevents XIP from being enable <<
1076 # fail to build since XIP doesn't sup <<
1077 depends on !COMPILE_TEST <<
1078 select PHYS_RAM_BASE_FIXED <<
1079 help <<
1080 Execute-In-Place allows the kernel <<
1081 directly addressable by the CPU, su <<
1082 space since the text section of the <<
1083 to RAM. Read-write sections, such <<
1084 are still copied to RAM. The XIP k <<
1085 it has to run directly from flash, <<
1086 store it. The flash address used t <<
1087 and for storing it, is configuratio <<
1088 say Y here, you must know the prope <<
1089 store the kernel image depending on <<
1090 <<
1091 Also note that the make target beco <<
1092 "make zImage" or "make Image". The <<
1093 ROM memory will be arch/riscv/boot/ <<
1094 <<
1095 SPARSEMEM is required because the k <<
1096 flash resident are not backed by me <<
1097 a struct page on those regions will <<
1098 3124
1099 If unsure, say N. !! 3125 config ZONE_DMA
>> 3126 bool
1100 3127
1101 config XIP_PHYS_ADDR !! 3128 config ZONE_DMA32
1102 hex "XIP Kernel Physical Location" !! 3129 bool
1103 depends on XIP_KERNEL <<
1104 default "0x21000000" <<
1105 help <<
1106 This is the physical address in you <<
1107 be linked for and stored to. This <<
1108 own flash usage. <<
1109 <<
1110 config RISCV_ISA_FALLBACK <<
1111 bool "Permit falling back to parsing <<
1112 default y <<
1113 help <<
1114 Parsing the "riscv,isa" devicetree <<
1115 replaced by a list of explicitly de <<
1116 with existing platforms, the kernel <<
1117 "riscv,isa" property if the replace <<
1118 <<
1119 Selecting N here will result in a k <<
1120 fallback, unless the commandline "r <<
1121 present. <<
1122 <<
1123 Please see the dt-binding, located <<
1124 Documentation/devicetree/bindings/r <<
1125 on the replacement properties, "ris <<
1126 "riscv,isa-extensions". <<
1127 3130
1128 config BUILTIN_DTB !! 3131 endmenu
1129 bool "Built-in device tree" <<
1130 depends on OF && NONPORTABLE <<
1131 help <<
1132 Build a device tree into the Linux <<
1133 This option should be selected if n <<
1134 If unsure, say N. <<
1135 3132
>> 3133 config TRAD_SIGNALS
>> 3134 bool
1136 3135
1137 config BUILTIN_DTB_SOURCE !! 3136 config MIPS32_COMPAT
1138 string "Built-in device tree source" !! 3137 bool
1139 depends on BUILTIN_DTB <<
1140 help <<
1141 DTS file path (without suffix, rela <<
1142 for the DTS file that will be used <<
1143 kernel. <<
1144 3138
1145 endmenu # "Boot options" !! 3139 config COMPAT
>> 3140 bool
1146 3141
1147 config PORTABLE !! 3142 config SYSVIPC_COMPAT
1148 bool 3143 bool
1149 default !NONPORTABLE <<
1150 select EFI <<
1151 select MMU <<
1152 select OF <<
1153 3144
1154 config ARCH_PROC_KCORE_TEXT !! 3145 config MIPS32_O32
1155 def_bool y !! 3146 bool "Kernel support for o32 binaries"
>> 3147 depends on 64BIT
>> 3148 select ARCH_WANT_OLD_COMPAT_IPC
>> 3149 select COMPAT
>> 3150 select MIPS32_COMPAT
>> 3151 select SYSVIPC_COMPAT if SYSVIPC
>> 3152 help
>> 3153 Select this option if you want to run o32 binaries. These are pure
>> 3154 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3155 existing binaries are in this format.
1156 3156
1157 menu "Power management options" !! 3157 If unsure, say Y.
1158 3158
1159 source "kernel/power/Kconfig" !! 3159 config MIPS32_N32
>> 3160 bool "Kernel support for n32 binaries"
>> 3161 depends on 64BIT
>> 3162 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
>> 3163 select COMPAT
>> 3164 select MIPS32_COMPAT
>> 3165 select SYSVIPC_COMPAT if SYSVIPC
>> 3166 help
>> 3167 Select this option if you want to run n32 binaries. These are
>> 3168 64-bit binaries using 32-bit quantities for addressing and certain
>> 3169 data that would normally be 64-bit. They are used in special
>> 3170 cases.
>> 3171
>> 3172 If unsure, say N.
>> 3173
>> 3174 config BINFMT_ELF32
>> 3175 bool
>> 3176 default y if MIPS32_O32 || MIPS32_N32
>> 3177 select ELFCORE
>> 3178
>> 3179 menu "Power management options"
1160 3180
1161 config ARCH_HIBERNATION_POSSIBLE 3181 config ARCH_HIBERNATION_POSSIBLE
1162 def_bool y 3182 def_bool y
1163 !! 3183 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
1164 config ARCH_HIBERNATION_HEADER <<
1165 def_bool HIBERNATION <<
1166 3184
1167 config ARCH_SUSPEND_POSSIBLE 3185 config ARCH_SUSPEND_POSSIBLE
1168 def_bool y 3186 def_bool y
>> 3187 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
1169 3188
1170 endmenu # "Power management options" !! 3189 source "kernel/power/Kconfig"
1171 3190
1172 menu "CPU Power Management" !! 3191 endmenu
1173 3192
1174 source "drivers/cpuidle/Kconfig" !! 3193 config MIPS_EXTERNAL_TIMER
>> 3194 bool
>> 3195
>> 3196 menu "CPU Power Management"
1175 3197
>> 3198 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
1176 source "drivers/cpufreq/Kconfig" 3199 source "drivers/cpufreq/Kconfig"
>> 3200 endif
>> 3201
>> 3202 source "drivers/cpuidle/Kconfig"
1177 3203
1178 endmenu # "CPU Power Management" !! 3204 endmenu
1179 3205
1180 source "arch/riscv/kvm/Kconfig" !! 3206 source "drivers/firmware/Kconfig"
1181 3207
1182 source "drivers/acpi/Kconfig" !! 3208 source "arch/mips/kvm/Kconfig"
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