1 # SPDX-License-Identifier: GPL-2.0-only !! 1 # SPDX-License-Identifier: GPL-2.0
2 # !! 2 config MIPS
3 # For a description of the syntax of this conf <<
4 # see Documentation/kbuild/kconfig-language.rs <<
5 # <<
6 <<
7 config 64BIT <<
8 bool 3 bool
9 !! 4 default y
10 config 32BIT !! 5 select ARCH_32BIT_OFF_T if !64BIT
11 bool !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
12 !! 7 select ARCH_CLOCKSOURCE_DATA
13 config RISCV <<
14 def_bool y <<
15 select ACPI_GENERIC_GSI if ACPI <<
16 select ACPI_MCFG if (ACPI && PCI) <<
17 select ACPI_PPTT if ACPI <<
18 select ACPI_REDUCED_HARDWARE_ONLY if A <<
19 select ACPI_SPCR_TABLE if ACPI <<
20 select ARCH_DMA_DEFAULT_COHERENT <<
21 select ARCH_ENABLE_HUGEPAGE_MIGRATION <<
22 select ARCH_ENABLE_MEMORY_HOTPLUG if S <<
23 select ARCH_ENABLE_MEMORY_HOTREMOVE if <<
24 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if <<
25 select ARCH_ENABLE_THP_MIGRATION if TR <<
26 select ARCH_HAS_BINFMT_FLAT <<
27 select ARCH_HAS_CURRENT_STACK_POINTER <<
28 select ARCH_HAS_DEBUG_VIRTUAL if MMU <<
29 select ARCH_HAS_DEBUG_VM_PGTABLE <<
30 select ARCH_HAS_DEBUG_WX <<
31 select ARCH_HAS_FAST_MULTIPLIER <<
32 select ARCH_HAS_FORTIFY_SOURCE <<
33 select ARCH_HAS_GCOV_PROFILE_ALL <<
34 select ARCH_HAS_GIGANTIC_PAGE <<
35 select ARCH_HAS_KCOV <<
36 select ARCH_HAS_KERNEL_FPU_SUPPORT if <<
37 select ARCH_HAS_MEMBARRIER_CALLBACKS <<
38 select ARCH_HAS_MEMBARRIER_SYNC_CORE <<
39 select ARCH_HAS_MMIOWB <<
40 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
41 select ARCH_HAS_PMEM_API <<
42 select ARCH_HAS_PREPARE_SYNC_CORE_CMD <<
43 select ARCH_HAS_PTE_DEVMAP if 64BIT && <<
44 select ARCH_HAS_PTE_SPECIAL <<
45 select ARCH_HAS_SET_DIRECT_MAP if MMU <<
46 select ARCH_HAS_SET_MEMORY if MMU <<
47 select ARCH_HAS_STRICT_KERNEL_RWX if M <<
48 select ARCH_HAS_STRICT_MODULE_RWX if M <<
49 select ARCH_HAS_SYNC_CORE_BEFORE_USERM <<
50 select ARCH_HAS_SYSCALL_WRAPPER <<
51 select ARCH_HAS_TICK_BROADCAST if GENE 8 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
52 select ARCH_HAS_UBSAN !! 9 select ARCH_HAS_UBSAN_SANITIZE_ALL
53 select ARCH_HAS_VDSO_DATA !! 10 select ARCH_HAS_FORTIFY_SOURCE
54 select ARCH_KEEP_MEMBLOCK if ACPI !! 11 select ARCH_SUPPORTS_UPROBES
55 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL !! 12 select ARCH_USE_BUILTIN_BSWAP
56 select ARCH_OPTIONAL_KERNEL_RWX if ARC <<
57 select ARCH_OPTIONAL_KERNEL_RWX_DEFAUL <<
58 select ARCH_STACKWALK <<
59 select ARCH_SUPPORTS_ATOMIC_RMW <<
60 select ARCH_SUPPORTS_CFI_CLANG <<
61 select ARCH_SUPPORTS_DEBUG_PAGEALLOC i <<
62 select ARCH_SUPPORTS_HUGETLBFS if MMU <<
63 # LLD >= 14: https://github.com/llvm/l <<
64 select ARCH_SUPPORTS_LTO_CLANG if LLD_ <<
65 select ARCH_SUPPORTS_LTO_CLANG_THIN if <<
66 select ARCH_SUPPORTS_PAGE_TABLE_CHECK <<
67 select ARCH_SUPPORTS_PER_VMA_LOCK if M <<
68 select ARCH_SUPPORTS_RT <<
69 select ARCH_SUPPORTS_SHADOW_CALL_STACK <<
70 select ARCH_USE_CMPXCHG_LOCKREF if 64B 13 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
71 select ARCH_USE_MEMTEST <<
72 select ARCH_USE_QUEUED_RWLOCKS 14 select ARCH_USE_QUEUED_RWLOCKS
73 select ARCH_USE_SYM_ANNOTATIONS !! 15 select ARCH_USE_QUEUED_SPINLOCKS
74 select ARCH_USES_CFI_TRAPS if CFI_CLAN <<
75 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU <<
76 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ 16 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
77 select ARCH_WANT_FRAME_POINTERS !! 17 select ARCH_WANT_IPC_PARSE_VERSION
78 select ARCH_WANT_GENERAL_HUGETLB if !R !! 18 select BUILDTIME_EXTABLE_SORT
79 select ARCH_WANT_HUGE_PMD_SHARE if 64B <<
80 select ARCH_WANT_LD_ORPHAN_WARN if !XI <<
81 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
82 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM <<
83 select ARCH_WANTS_NO_INSTR <<
84 select ARCH_WANTS_THP_SWAP if HAVE_ARC <<
85 select BINFMT_FLAT_NO_DATA_START_OFFSE <<
86 select BUILDTIME_TABLE_SORT if MMU <<
87 select CLINT_TIMER if RISCV_M_MODE <<
88 select CLONE_BACKWARDS 19 select CLONE_BACKWARDS
89 select COMMON_CLK !! 20 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
90 select CPU_PM if CPU_IDLE || HIBERNATI !! 21 select CPU_PM if CPU_IDLE
91 select EDAC_SUPPORT <<
92 select FRAME_POINTER if PERF_EVENTS || <<
93 select FTRACE_MCOUNT_USE_PATCHABLE_FUN <<
94 select GENERIC_ARCH_TOPOLOGY <<
95 select GENERIC_ATOMIC64 if !64BIT 22 select GENERIC_ATOMIC64 if !64BIT
96 select GENERIC_CLOCKEVENTS_BROADCAST i !! 23 select GENERIC_CLOCKEVENTS
97 select GENERIC_CPU_DEVICES !! 24 select GENERIC_CMOS_UPDATE
98 select GENERIC_CPU_VULNERABILITIES !! 25 select GENERIC_CPU_AUTOPROBE
99 select GENERIC_EARLY_IOREMAP !! 26 select GENERIC_GETTIMEOFDAY
100 select GENERIC_ENTRY !! 27 select GENERIC_IOMAP
101 select GENERIC_GETTIMEOFDAY if HAVE_GE !! 28 select GENERIC_IRQ_PROBE
102 select GENERIC_IDLE_POLL_SETUP <<
103 select GENERIC_IOREMAP if MMU <<
104 select GENERIC_IRQ_IPI if SMP <<
105 select GENERIC_IRQ_IPI_MUX if SMP <<
106 select GENERIC_IRQ_MULTI_HANDLER <<
107 select GENERIC_IRQ_SHOW 29 select GENERIC_IRQ_SHOW
108 select GENERIC_IRQ_SHOW_LEVEL !! 30 select GENERIC_ISA_DMA if EISA
109 select GENERIC_LIB_DEVMEM_IS_ALLOWED !! 31 select GENERIC_LIB_ASHLDI3
110 select GENERIC_PCI_IOMAP !! 32 select GENERIC_LIB_ASHRDI3
111 select GENERIC_PTDUMP if MMU !! 33 select GENERIC_LIB_CMPDI2
112 select GENERIC_SCHED_CLOCK !! 34 select GENERIC_LIB_LSHRDI3
>> 35 select GENERIC_LIB_UCMPDI2
>> 36 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
113 select GENERIC_SMP_IDLE_THREAD 37 select GENERIC_SMP_IDLE_THREAD
114 select GENERIC_TIME_VSYSCALL if MMU && !! 38 select GENERIC_TIME_VSYSCALL
115 select GENERIC_VDSO_TIME_NS if HAVE_GE !! 39 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
116 select HARDIRQS_SW_RESEND !! 40 select HANDLE_DOMAIN_IRQ
117 select HAS_IOPORT if MMU !! 41 select HAVE_ARCH_COMPILER_H
118 select HAVE_ARCH_AUDITSYSCALL !! 42 select HAVE_ARCH_JUMP_LABEL
119 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ !! 43 select HAVE_ARCH_KGDB
120 select HAVE_ARCH_HUGE_VMAP if MMU && 6 <<
121 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
122 select HAVE_ARCH_JUMP_LABEL_RELATIVE i <<
123 select HAVE_ARCH_KASAN if MMU && 64BIT <<
124 select HAVE_ARCH_KASAN_VMALLOC if MMU <<
125 select HAVE_ARCH_KFENCE if MMU && 64BI <<
126 select HAVE_ARCH_KGDB if !XIP_KERNEL <<
127 select HAVE_ARCH_KGDB_QXFER_PKT <<
128 select HAVE_ARCH_MMAP_RND_BITS if MMU 44 select HAVE_ARCH_MMAP_RND_BITS if MMU
129 select HAVE_ARCH_MMAP_RND_COMPAT_BITS !! 45 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
130 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
131 select HAVE_ARCH_SECCOMP_FILTER 46 select HAVE_ARCH_SECCOMP_FILTER
132 select HAVE_ARCH_STACKLEAK <<
133 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
134 select HAVE_ARCH_TRACEHOOK 47 select HAVE_ARCH_TRACEHOOK
135 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 48 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
136 select HAVE_ARCH_USERFAULTFD_MINOR if <<
137 select HAVE_ARCH_VMAP_STACK if MMU && <<
138 select HAVE_ASM_MODVERSIONS 49 select HAVE_ASM_MODVERSIONS
139 select HAVE_CONTEXT_TRACKING_USER !! 50 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
>> 51 select HAVE_CONTEXT_TRACKING
>> 52 select HAVE_COPY_THREAD_TLS
>> 53 select HAVE_C_RECORDMCOUNT
140 select HAVE_DEBUG_KMEMLEAK 54 select HAVE_DEBUG_KMEMLEAK
141 select HAVE_DMA_CONTIGUOUS if MMU !! 55 select HAVE_DEBUG_STACKOVERFLOW
142 select HAVE_DYNAMIC_FTRACE if !XIP_KER !! 56 select HAVE_DMA_CONTIGUOUS
143 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT !! 57 select HAVE_DYNAMIC_FTRACE
144 select HAVE_DYNAMIC_FTRACE_WITH_ARGS i !! 58 select HAVE_EXIT_THREAD
145 select HAVE_FTRACE_MCOUNT_RECORD if !X !! 59 select HAVE_FAST_GUP
>> 60 select HAVE_FTRACE_MCOUNT_RECORD
146 select HAVE_FUNCTION_GRAPH_TRACER 61 select HAVE_FUNCTION_GRAPH_TRACER
147 select HAVE_FUNCTION_GRAPH_RETVAL if H !! 62 select HAVE_FUNCTION_TRACER
148 select HAVE_FUNCTION_TRACER if !XIP_KE !! 63 select HAVE_IDE
149 select HAVE_EBPF_JIT if MMU !! 64 select HAVE_IOREMAP_PROT
150 select HAVE_GUP_FAST if MMU !! 65 select HAVE_IRQ_EXIT_ON_IRQ_STACK
151 select HAVE_FUNCTION_ARG_ACCESS_API <<
152 select HAVE_FUNCTION_ERROR_INJECTION <<
153 select HAVE_GCC_PLUGINS <<
154 select HAVE_GENERIC_VDSO if MMU && 64B <<
155 select HAVE_IRQ_TIME_ACCOUNTING 66 select HAVE_IRQ_TIME_ACCOUNTING
156 select HAVE_KERNEL_BZIP2 if !XIP_KERNE !! 67 select HAVE_KPROBES
157 select HAVE_KERNEL_GZIP if !XIP_KERNEL !! 68 select HAVE_KRETPROBES
158 select HAVE_KERNEL_LZ4 if !XIP_KERNEL !! 69 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
159 select HAVE_KERNEL_LZMA if !XIP_KERNEL !! 70 select HAVE_MEMBLOCK_NODE_MAP
160 select HAVE_KERNEL_LZO if !XIP_KERNEL !! 71 select HAVE_MOD_ARCH_SPECIFIC
161 select HAVE_KERNEL_UNCOMPRESSED if !XI !! 72 select HAVE_NMI
162 select HAVE_KERNEL_ZSTD if !XIP_KERNEL !! 73 select HAVE_OPROFILE
163 select HAVE_KERNEL_XZ if !XIP_KERNEL & <<
164 select HAVE_KPROBES if !XIP_KERNEL <<
165 select HAVE_KRETPROBES if !XIP_KERNEL <<
166 # https://github.com/ClangBuiltLinux/l <<
167 select HAVE_LD_DEAD_CODE_DATA_ELIMINAT <<
168 select HAVE_MOVE_PMD <<
169 select HAVE_MOVE_PUD <<
170 select HAVE_PAGE_SIZE_4KB <<
171 select HAVE_PCI <<
172 select HAVE_PERF_EVENTS 74 select HAVE_PERF_EVENTS
173 select HAVE_PERF_REGS <<
174 select HAVE_PERF_USER_STACK_DUMP <<
175 select HAVE_POSIX_CPU_TIMERS_TASK_WORK <<
176 select HAVE_PREEMPT_DYNAMIC_KEY if !XI <<
177 select HAVE_REGS_AND_STACK_ACCESS_API 75 select HAVE_REGS_AND_STACK_ACCESS_API
178 select HAVE_RETHOOK if !XIP_KERNEL <<
179 select HAVE_RSEQ 76 select HAVE_RSEQ
180 select HAVE_RUST if RUSTC_SUPPORTS_RIS !! 77 select HAVE_SPARSE_SYSCALL_NR
181 select HAVE_SAMPLE_FTRACE_DIRECT <<
182 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI <<
183 select HAVE_STACKPROTECTOR 78 select HAVE_STACKPROTECTOR
184 select HAVE_SYSCALL_TRACEPOINTS 79 select HAVE_SYSCALL_TRACEPOINTS
185 select HOTPLUG_CORE_SYNC_DEAD if HOTPL !! 80 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
186 select IRQ_DOMAIN !! 81 select HAVE_GENERIC_VDSO
187 select IRQ_FORCED_THREADING 82 select IRQ_FORCED_THREADING
188 select KASAN_VMALLOC if KASAN !! 83 select ISA if EISA
189 select LOCK_MM_AND_FIND_VMA !! 84 select MODULES_USE_ELF_RELA if MODULES && 64BIT
190 select MMU_GATHER_RCU_TABLE_FREE if SM !! 85 select MODULES_USE_ELF_REL if MODULES
191 select MODULES_USE_ELF_RELA if MODULES !! 86 select PERF_USE_VMALLOC
192 select OF !! 87 select RTC_LIB
193 select OF_EARLY_FLATTREE <<
194 select OF_IRQ <<
195 select PCI_DOMAINS_GENERIC if PCI <<
196 select PCI_ECAM if (ACPI && PCI) <<
197 select PCI_MSI if PCI <<
198 select RISCV_ALTERNATIVE if !XIP_KERNE <<
199 select RISCV_APLIC <<
200 select RISCV_IMSIC <<
201 select RISCV_INTC <<
202 select RISCV_TIMER if RISCV_SBI <<
203 select SIFIVE_PLIC <<
204 select SPARSE_IRQ <<
205 select SYSCTL_EXCEPTION_TRACE 88 select SYSCTL_EXCEPTION_TRACE
206 select THREAD_INFO_IN_TASK !! 89 select VIRT_TO_BUS
207 select TRACE_IRQFLAGS_SUPPORT !! 90 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
208 select UACCESS_MEMCPY if !MMU !! 91 select ARCH_HAS_KCOV
209 select USER_STACKTRACE_SUPPORT !! 92 select HAVE_GCC_PLUGINS
>> 93
>> 94 menu "Machine selection"
>> 95
>> 96 choice
>> 97 prompt "System type"
>> 98 default MIPS_GENERIC
>> 99
>> 100 config MIPS_GENERIC
>> 101 bool "Generic board-agnostic MIPS kernel"
>> 102 select BOOT_RAW
>> 103 select BUILTIN_DTB
>> 104 select CEVT_R4K
>> 105 select CLKSRC_MIPS_GIC
>> 106 select COMMON_CLK
>> 107 select CPU_MIPSR2_IRQ_VI
>> 108 select CPU_MIPSR2_IRQ_EI
>> 109 select CSRC_R4K
>> 110 select DMA_PERDEV_COHERENT
>> 111 select HAVE_PCI
>> 112 select IRQ_MIPS_CPU
>> 113 select LIBFDT
>> 114 select MIPS_AUTO_PFN_OFFSET
>> 115 select MIPS_CPU_SCACHE
>> 116 select MIPS_GIC
>> 117 select MIPS_L1_CACHE_SHIFT_7
>> 118 select NO_EXCEPT_FILL
>> 119 select PCI_DRIVERS_GENERIC
>> 120 select PINCTRL
>> 121 select SMP_UP if SMP
>> 122 select SWAP_IO_SPACE
>> 123 select SYS_HAS_CPU_MIPS32_R1
>> 124 select SYS_HAS_CPU_MIPS32_R2
>> 125 select SYS_HAS_CPU_MIPS32_R6
>> 126 select SYS_HAS_CPU_MIPS64_R1
>> 127 select SYS_HAS_CPU_MIPS64_R2
>> 128 select SYS_HAS_CPU_MIPS64_R6
>> 129 select SYS_SUPPORTS_32BIT_KERNEL
>> 130 select SYS_SUPPORTS_64BIT_KERNEL
>> 131 select SYS_SUPPORTS_BIG_ENDIAN
>> 132 select SYS_SUPPORTS_HIGHMEM
>> 133 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 134 select SYS_SUPPORTS_MICROMIPS
>> 135 select SYS_SUPPORTS_MIPS_CPS
>> 136 select SYS_SUPPORTS_MIPS16
>> 137 select SYS_SUPPORTS_MULTITHREADING
>> 138 select SYS_SUPPORTS_RELOCATABLE
>> 139 select SYS_SUPPORTS_SMARTMIPS
>> 140 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 141 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 142 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 143 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 144 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 145 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 146 select USE_OF
>> 147 select UHI_BOOT
>> 148 help
>> 149 Select this to build a kernel which aims to support multiple boards,
>> 150 generally using a flattened device tree passed from the bootloader
>> 151 using the boot protocol defined in the UHI (Unified Hosting
>> 152 Interface) specification.
>> 153
>> 154 config MIPS_ALCHEMY
>> 155 bool "Alchemy processor based machines"
>> 156 select PHYS_ADDR_T_64BIT
>> 157 select CEVT_R4K
>> 158 select CSRC_R4K
>> 159 select IRQ_MIPS_CPU
>> 160 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 161 select SYS_HAS_CPU_MIPS32_R1
>> 162 select SYS_SUPPORTS_32BIT_KERNEL
>> 163 select SYS_SUPPORTS_APM_EMULATION
>> 164 select GPIOLIB
>> 165 select SYS_SUPPORTS_ZBOOT
>> 166 select COMMON_CLK
>> 167
>> 168 config AR7
>> 169 bool "Texas Instruments AR7"
>> 170 select BOOT_ELF32
>> 171 select DMA_NONCOHERENT
>> 172 select CEVT_R4K
>> 173 select CSRC_R4K
>> 174 select IRQ_MIPS_CPU
>> 175 select NO_EXCEPT_FILL
>> 176 select SWAP_IO_SPACE
>> 177 select SYS_HAS_CPU_MIPS32_R1
>> 178 select SYS_HAS_EARLY_PRINTK
>> 179 select SYS_SUPPORTS_32BIT_KERNEL
>> 180 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 181 select SYS_SUPPORTS_MIPS16
>> 182 select SYS_SUPPORTS_ZBOOT_UART16550
>> 183 select GPIOLIB
>> 184 select VLYNQ
>> 185 select HAVE_CLK
>> 186 help
>> 187 Support for the Texas Instruments AR7 System-on-a-Chip
>> 188 family: TNETD7100, 7200 and 7300.
>> 189
>> 190 config ATH25
>> 191 bool "Atheros AR231x/AR531x SoC support"
>> 192 select CEVT_R4K
>> 193 select CSRC_R4K
>> 194 select DMA_NONCOHERENT
>> 195 select IRQ_MIPS_CPU
>> 196 select IRQ_DOMAIN
>> 197 select SYS_HAS_CPU_MIPS32_R1
>> 198 select SYS_SUPPORTS_BIG_ENDIAN
>> 199 select SYS_SUPPORTS_32BIT_KERNEL
>> 200 select SYS_HAS_EARLY_PRINTK
>> 201 help
>> 202 Support for Atheros AR231x and Atheros AR531x based boards
>> 203
>> 204 config ATH79
>> 205 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 206 select ARCH_HAS_RESET_CONTROLLER
>> 207 select BOOT_RAW
>> 208 select CEVT_R4K
>> 209 select CSRC_R4K
>> 210 select DMA_NONCOHERENT
>> 211 select GPIOLIB
>> 212 select PINCTRL
>> 213 select HAVE_CLK
>> 214 select COMMON_CLK
>> 215 select CLKDEV_LOOKUP
>> 216 select IRQ_MIPS_CPU
>> 217 select SYS_HAS_CPU_MIPS32_R2
>> 218 select SYS_HAS_EARLY_PRINTK
>> 219 select SYS_SUPPORTS_32BIT_KERNEL
>> 220 select SYS_SUPPORTS_BIG_ENDIAN
>> 221 select SYS_SUPPORTS_MIPS16
>> 222 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 223 select USE_OF
>> 224 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 225 help
>> 226 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 227
>> 228 config BMIPS_GENERIC
>> 229 bool "Broadcom Generic BMIPS kernel"
>> 230 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 231 select ARCH_HAS_PHYS_TO_DMA
>> 232 select BOOT_RAW
>> 233 select NO_EXCEPT_FILL
>> 234 select USE_OF
>> 235 select CEVT_R4K
>> 236 select CSRC_R4K
>> 237 select SYNC_R4K
>> 238 select COMMON_CLK
>> 239 select BCM6345_L1_IRQ
>> 240 select BCM7038_L1_IRQ
>> 241 select BCM7120_L2_IRQ
>> 242 select BRCMSTB_L2_IRQ
>> 243 select IRQ_MIPS_CPU
>> 244 select DMA_NONCOHERENT
>> 245 select SYS_SUPPORTS_32BIT_KERNEL
>> 246 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 247 select SYS_SUPPORTS_BIG_ENDIAN
>> 248 select SYS_SUPPORTS_HIGHMEM
>> 249 select SYS_HAS_CPU_BMIPS32_3300
>> 250 select SYS_HAS_CPU_BMIPS4350
>> 251 select SYS_HAS_CPU_BMIPS4380
>> 252 select SYS_HAS_CPU_BMIPS5000
>> 253 select SWAP_IO_SPACE
>> 254 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 255 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 256 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 257 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 258 select HARDIRQS_SW_RESEND
>> 259 help
>> 260 Build a generic DT-based kernel image that boots on select
>> 261 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 262 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 263 must be set appropriately for your board.
>> 264
>> 265 config BCM47XX
>> 266 bool "Broadcom BCM47XX based boards"
>> 267 select BOOT_RAW
>> 268 select CEVT_R4K
>> 269 select CSRC_R4K
>> 270 select DMA_NONCOHERENT
>> 271 select HAVE_PCI
>> 272 select IRQ_MIPS_CPU
>> 273 select SYS_HAS_CPU_MIPS32_R1
>> 274 select NO_EXCEPT_FILL
>> 275 select SYS_SUPPORTS_32BIT_KERNEL
>> 276 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 277 select SYS_SUPPORTS_MIPS16
>> 278 select SYS_SUPPORTS_ZBOOT
>> 279 select SYS_HAS_EARLY_PRINTK
>> 280 select USE_GENERIC_EARLY_PRINTK_8250
>> 281 select GPIOLIB
>> 282 select LEDS_GPIO_REGISTER
>> 283 select BCM47XX_NVRAM
>> 284 select BCM47XX_SPROM
>> 285 select BCM47XX_SSB if !BCM47XX_BCMA
>> 286 help
>> 287 Support for BCM47XX based boards
>> 288
>> 289 config BCM63XX
>> 290 bool "Broadcom BCM63XX based boards"
>> 291 select BOOT_RAW
>> 292 select CEVT_R4K
>> 293 select CSRC_R4K
>> 294 select SYNC_R4K
>> 295 select DMA_NONCOHERENT
>> 296 select IRQ_MIPS_CPU
>> 297 select SYS_SUPPORTS_32BIT_KERNEL
>> 298 select SYS_SUPPORTS_BIG_ENDIAN
>> 299 select SYS_HAS_EARLY_PRINTK
>> 300 select SWAP_IO_SPACE
>> 301 select GPIOLIB
>> 302 select HAVE_CLK
>> 303 select MIPS_L1_CACHE_SHIFT_4
>> 304 select CLKDEV_LOOKUP
>> 305 help
>> 306 Support for BCM63XX based boards
>> 307
>> 308 config MIPS_COBALT
>> 309 bool "Cobalt Server"
>> 310 select CEVT_R4K
>> 311 select CSRC_R4K
>> 312 select CEVT_GT641XX
>> 313 select DMA_NONCOHERENT
>> 314 select FORCE_PCI
>> 315 select I8253
>> 316 select I8259
>> 317 select IRQ_MIPS_CPU
>> 318 select IRQ_GT641XX
>> 319 select PCI_GT64XXX_PCI0
>> 320 select SYS_HAS_CPU_NEVADA
>> 321 select SYS_HAS_EARLY_PRINTK
>> 322 select SYS_SUPPORTS_32BIT_KERNEL
>> 323 select SYS_SUPPORTS_64BIT_KERNEL
>> 324 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 325 select USE_GENERIC_EARLY_PRINTK_8250
>> 326
>> 327 config MACH_DECSTATION
>> 328 bool "DECstations"
>> 329 select BOOT_ELF32
>> 330 select CEVT_DS1287
>> 331 select CEVT_R4K if CPU_R4X00
>> 332 select CSRC_IOASIC
>> 333 select CSRC_R4K if CPU_R4X00
>> 334 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 335 select CPU_R4000_WORKAROUNDS if 64BIT
>> 336 select CPU_R4400_WORKAROUNDS if 64BIT
>> 337 select DMA_NONCOHERENT
>> 338 select NO_IOPORT_MAP
>> 339 select IRQ_MIPS_CPU
>> 340 select SYS_HAS_CPU_R3000
>> 341 select SYS_HAS_CPU_R4X00
>> 342 select SYS_SUPPORTS_32BIT_KERNEL
>> 343 select SYS_SUPPORTS_64BIT_KERNEL
>> 344 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 345 select SYS_SUPPORTS_128HZ
>> 346 select SYS_SUPPORTS_256HZ
>> 347 select SYS_SUPPORTS_1024HZ
>> 348 select MIPS_L1_CACHE_SHIFT_4
>> 349 help
>> 350 This enables support for DEC's MIPS based workstations. For details
>> 351 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 352 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 353
>> 354 If you have one of the following DECstation Models you definitely
>> 355 want to choose R4xx0 for the CPU Type:
>> 356
>> 357 DECstation 5000/50
>> 358 DECstation 5000/150
>> 359 DECstation 5000/260
>> 360 DECsystem 5900/260
>> 361
>> 362 otherwise choose R3000.
>> 363
>> 364 config MACH_JAZZ
>> 365 bool "Jazz family of machines"
>> 366 select ARC_MEMORY
>> 367 select ARC_PROMLIB
>> 368 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 369 select ARCH_MIGHT_HAVE_PC_SERIO
>> 370 select FW_ARC
>> 371 select FW_ARC32
>> 372 select ARCH_MAY_HAVE_PC_FDC
>> 373 select CEVT_R4K
>> 374 select CSRC_R4K
>> 375 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 376 select GENERIC_ISA_DMA
>> 377 select HAVE_PCSPKR_PLATFORM
>> 378 select IRQ_MIPS_CPU
>> 379 select I8253
>> 380 select I8259
>> 381 select ISA
>> 382 select SYS_HAS_CPU_R4X00
>> 383 select SYS_SUPPORTS_32BIT_KERNEL
>> 384 select SYS_SUPPORTS_64BIT_KERNEL
>> 385 select SYS_SUPPORTS_100HZ
>> 386 help
>> 387 This a family of machines based on the MIPS R4030 chipset which was
>> 388 used by several vendors to build RISC/os and Windows NT workstations.
>> 389 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 390 Olivetti M700-10 workstations.
>> 391
>> 392 config MACH_INGENIC
>> 393 bool "Ingenic SoC based machines"
>> 394 select SYS_SUPPORTS_32BIT_KERNEL
>> 395 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 396 select SYS_SUPPORTS_ZBOOT_UART16550
>> 397 select CPU_SUPPORTS_HUGEPAGES
>> 398 select DMA_NONCOHERENT
>> 399 select IRQ_MIPS_CPU
>> 400 select PINCTRL
>> 401 select GPIOLIB
>> 402 select COMMON_CLK
>> 403 select GENERIC_IRQ_CHIP
>> 404 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 405 select USE_OF
>> 406 select LIBFDT
>> 407
>> 408 config LANTIQ
>> 409 bool "Lantiq based platforms"
>> 410 select DMA_NONCOHERENT
>> 411 select IRQ_MIPS_CPU
>> 412 select CEVT_R4K
>> 413 select CSRC_R4K
>> 414 select SYS_HAS_CPU_MIPS32_R1
>> 415 select SYS_HAS_CPU_MIPS32_R2
>> 416 select SYS_SUPPORTS_BIG_ENDIAN
>> 417 select SYS_SUPPORTS_32BIT_KERNEL
>> 418 select SYS_SUPPORTS_MIPS16
>> 419 select SYS_SUPPORTS_MULTITHREADING
>> 420 select SYS_SUPPORTS_VPE_LOADER
>> 421 select SYS_HAS_EARLY_PRINTK
>> 422 select GPIOLIB
>> 423 select SWAP_IO_SPACE
>> 424 select BOOT_RAW
>> 425 select CLKDEV_LOOKUP
>> 426 select USE_OF
>> 427 select PINCTRL
>> 428 select PINCTRL_LANTIQ
>> 429 select ARCH_HAS_RESET_CONTROLLER
>> 430 select RESET_CONTROLLER
>> 431
>> 432 config LASAT
>> 433 bool "LASAT Networks platforms"
>> 434 select CEVT_R4K
>> 435 select CRC32
>> 436 select CSRC_R4K
>> 437 select DMA_NONCOHERENT
>> 438 select SYS_HAS_EARLY_PRINTK
>> 439 select HAVE_PCI
>> 440 select IRQ_MIPS_CPU
>> 441 select PCI_GT64XXX_PCI0
>> 442 select MIPS_NILE4
>> 443 select R5000_CPU_SCACHE
>> 444 select SYS_HAS_CPU_R5000
>> 445 select SYS_SUPPORTS_32BIT_KERNEL
>> 446 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 447 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 448
>> 449 config MACH_LOONGSON32
>> 450 bool "Loongson 32-bit family of machines"
>> 451 select SYS_SUPPORTS_ZBOOT
>> 452 help
>> 453 This enables support for the Loongson-1 family of machines.
>> 454
>> 455 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 456 the Institute of Computing Technology (ICT), Chinese Academy of
>> 457 Sciences (CAS).
>> 458
>> 459 config MACH_LOONGSON2EF
>> 460 bool "Loongson-2E/F family of machines"
>> 461 select SYS_SUPPORTS_ZBOOT
>> 462 help
>> 463 This enables the support of early Loongson-2E/F family of machines.
>> 464
>> 465 config MACH_LOONGSON64
>> 466 bool "Loongson 64-bit family of machines"
>> 467 select ARCH_SPARSEMEM_ENABLE
>> 468 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 469 select ARCH_MIGHT_HAVE_PC_SERIO
>> 470 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 471 select BOOT_ELF32
>> 472 select BOARD_SCACHE
>> 473 select CSRC_R4K
>> 474 select CEVT_R4K
>> 475 select CPU_HAS_WB
>> 476 select FORCE_PCI
>> 477 select ISA
>> 478 select I8259
>> 479 select IRQ_MIPS_CPU
>> 480 select NR_CPUS_DEFAULT_4
>> 481 select USE_GENERIC_EARLY_PRINTK_8250
>> 482 select SYS_HAS_CPU_LOONGSON64
>> 483 select SYS_HAS_EARLY_PRINTK
>> 484 select SYS_SUPPORTS_SMP
>> 485 select SYS_SUPPORTS_HOTPLUG_CPU
>> 486 select SYS_SUPPORTS_NUMA
>> 487 select SYS_SUPPORTS_64BIT_KERNEL
>> 488 select SYS_SUPPORTS_HIGHMEM
>> 489 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 490 select SYS_SUPPORTS_ZBOOT
>> 491 select LOONGSON_MC146818
>> 492 select ZONE_DMA32
>> 493 select NUMA
>> 494 help
>> 495 This enables the support of Loongson-2/3 family of machines.
>> 496
>> 497 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
>> 498 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
>> 499 and Loongson-2F which will be removed), developed by the Institute
>> 500 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
>> 501
>> 502 config MACH_PISTACHIO
>> 503 bool "IMG Pistachio SoC based boards"
>> 504 select BOOT_ELF32
>> 505 select BOOT_RAW
>> 506 select CEVT_R4K
>> 507 select CLKSRC_MIPS_GIC
>> 508 select COMMON_CLK
>> 509 select CSRC_R4K
>> 510 select DMA_NONCOHERENT
>> 511 select GPIOLIB
>> 512 select IRQ_MIPS_CPU
>> 513 select LIBFDT
>> 514 select MFD_SYSCON
>> 515 select MIPS_CPU_SCACHE
>> 516 select MIPS_GIC
>> 517 select PINCTRL
>> 518 select REGULATOR
>> 519 select SYS_HAS_CPU_MIPS32_R2
>> 520 select SYS_SUPPORTS_32BIT_KERNEL
>> 521 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 522 select SYS_SUPPORTS_MIPS_CPS
>> 523 select SYS_SUPPORTS_MULTITHREADING
>> 524 select SYS_SUPPORTS_RELOCATABLE
>> 525 select SYS_SUPPORTS_ZBOOT
>> 526 select SYS_HAS_EARLY_PRINTK
>> 527 select USE_GENERIC_EARLY_PRINTK_8250
>> 528 select USE_OF
>> 529 help
>> 530 This enables support for the IMG Pistachio SoC platform.
>> 531
>> 532 config MIPS_MALTA
>> 533 bool "MIPS Malta board"
>> 534 select ARCH_MAY_HAVE_PC_FDC
>> 535 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 536 select ARCH_MIGHT_HAVE_PC_SERIO
>> 537 select BOOT_ELF32
>> 538 select BOOT_RAW
>> 539 select BUILTIN_DTB
>> 540 select CEVT_R4K
>> 541 select CLKSRC_MIPS_GIC
>> 542 select COMMON_CLK
>> 543 select CSRC_R4K
>> 544 select DMA_MAYBE_COHERENT
>> 545 select GENERIC_ISA_DMA
>> 546 select HAVE_PCSPKR_PLATFORM
>> 547 select HAVE_PCI
>> 548 select I8253
>> 549 select I8259
>> 550 select IRQ_MIPS_CPU
>> 551 select LIBFDT
>> 552 select MIPS_BONITO64
>> 553 select MIPS_CPU_SCACHE
>> 554 select MIPS_GIC
>> 555 select MIPS_L1_CACHE_SHIFT_6
>> 556 select MIPS_MSC
>> 557 select PCI_GT64XXX_PCI0
>> 558 select SMP_UP if SMP
>> 559 select SWAP_IO_SPACE
>> 560 select SYS_HAS_CPU_MIPS32_R1
>> 561 select SYS_HAS_CPU_MIPS32_R2
>> 562 select SYS_HAS_CPU_MIPS32_R3_5
>> 563 select SYS_HAS_CPU_MIPS32_R5
>> 564 select SYS_HAS_CPU_MIPS32_R6
>> 565 select SYS_HAS_CPU_MIPS64_R1
>> 566 select SYS_HAS_CPU_MIPS64_R2
>> 567 select SYS_HAS_CPU_MIPS64_R6
>> 568 select SYS_HAS_CPU_NEVADA
>> 569 select SYS_HAS_CPU_RM7000
>> 570 select SYS_SUPPORTS_32BIT_KERNEL
>> 571 select SYS_SUPPORTS_64BIT_KERNEL
>> 572 select SYS_SUPPORTS_BIG_ENDIAN
>> 573 select SYS_SUPPORTS_HIGHMEM
>> 574 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 575 select SYS_SUPPORTS_MICROMIPS
>> 576 select SYS_SUPPORTS_MIPS16
>> 577 select SYS_SUPPORTS_MIPS_CMP
>> 578 select SYS_SUPPORTS_MIPS_CPS
>> 579 select SYS_SUPPORTS_MULTITHREADING
>> 580 select SYS_SUPPORTS_RELOCATABLE
>> 581 select SYS_SUPPORTS_SMARTMIPS
>> 582 select SYS_SUPPORTS_VPE_LOADER
>> 583 select SYS_SUPPORTS_ZBOOT
>> 584 select USE_OF
210 select ZONE_DMA32 if 64BIT 585 select ZONE_DMA32 if 64BIT
>> 586 help
>> 587 This enables support for the MIPS Technologies Malta evaluation
>> 588 board.
211 589
212 config RUSTC_SUPPORTS_RISCV !! 590 config MACH_PIC32
213 def_bool y !! 591 bool "Microchip PIC32 Family"
214 depends on 64BIT !! 592 help
215 # Shadow call stack requires rustc ver !! 593 This enables support for the Microchip PIC32 family of platforms.
216 # -Zsanitizer=shadow-call-stack flag. <<
217 depends on !SHADOW_CALL_STACK || RUSTC <<
218 <<
219 config CLANG_SUPPORTS_DYNAMIC_FTRACE <<
220 def_bool CC_IS_CLANG <<
221 # https://github.com/ClangBuiltLinux/l <<
222 depends on AS_IS_GNU || (AS_IS_LLVM && <<
223 <<
224 config GCC_SUPPORTS_DYNAMIC_FTRACE <<
225 def_bool CC_IS_GCC <<
226 depends on $(cc-option,-fpatchable-fun <<
227 <<
228 config HAVE_SHADOW_CALL_STACK <<
229 def_bool $(cc-option,-fsanitize=shadow <<
230 # https://github.com/riscv-non-isa/ris <<
231 depends on $(ld-option,--no-relax-gp) <<
232 594
233 config RISCV_USE_LINKER_RELAXATION !! 595 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
234 def_bool y !! 596 microcontrollers.
235 # https://github.com/llvm/llvm-project <<
236 depends on !LD_IS_LLD || LLD_VERSION > <<
237 597
238 # https://github.com/llvm/llvm-project/commit/ !! 598 config NEC_MARKEINS
239 config ARCH_HAS_BROKEN_DWARF5 !! 599 bool "NEC EMMA2RH Mark-eins board"
240 def_bool y !! 600 select SOC_EMMA2RH
241 depends on RISCV_USE_LINKER_RELAXATION !! 601 select HAVE_PCI
242 # https://github.com/llvm/llvm-project !! 602 help
243 depends on AS_IS_LLVM && AS_VERSION < !! 603 This enables support for the NEC Electronics Mark-eins boards.
244 # https://github.com/llvm/llvm-project <<
245 depends on LD_IS_LLD && LLD_VERSION < <<
246 604
247 config ARCH_MMAP_RND_BITS_MIN !! 605 config MACH_VR41XX
248 default 18 if 64BIT !! 606 bool "NEC VR4100 series based machines"
249 default 8 !! 607 select CEVT_R4K
>> 608 select CSRC_R4K
>> 609 select SYS_HAS_CPU_VR41XX
>> 610 select SYS_SUPPORTS_MIPS16
>> 611 select GPIOLIB
>> 612
>> 613 config NXP_STB220
>> 614 bool "NXP STB220 board"
>> 615 select SOC_PNX833X
>> 616 help
>> 617 Support for NXP Semiconductors STB220 Development Board.
>> 618
>> 619 config NXP_STB225
>> 620 bool "NXP 225 board"
>> 621 select SOC_PNX833X
>> 622 select SOC_PNX8335
>> 623 help
>> 624 Support for NXP Semiconductors STB225 Development Board.
>> 625
>> 626 config PMC_MSP
>> 627 bool "PMC-Sierra MSP chipsets"
>> 628 select CEVT_R4K
>> 629 select CSRC_R4K
>> 630 select DMA_NONCOHERENT
>> 631 select SWAP_IO_SPACE
>> 632 select NO_EXCEPT_FILL
>> 633 select BOOT_RAW
>> 634 select SYS_HAS_CPU_MIPS32_R1
>> 635 select SYS_HAS_CPU_MIPS32_R2
>> 636 select SYS_SUPPORTS_32BIT_KERNEL
>> 637 select SYS_SUPPORTS_BIG_ENDIAN
>> 638 select SYS_SUPPORTS_MIPS16
>> 639 select IRQ_MIPS_CPU
>> 640 select SERIAL_8250
>> 641 select SERIAL_8250_CONSOLE
>> 642 select USB_EHCI_BIG_ENDIAN_MMIO
>> 643 select USB_EHCI_BIG_ENDIAN_DESC
>> 644 help
>> 645 This adds support for the PMC-Sierra family of Multi-Service
>> 646 Processor System-On-A-Chips. These parts include a number
>> 647 of integrated peripherals, interfaces and DSPs in addition to
>> 648 a variety of MIPS cores.
>> 649
>> 650 config RALINK
>> 651 bool "Ralink based machines"
>> 652 select CEVT_R4K
>> 653 select CSRC_R4K
>> 654 select BOOT_RAW
>> 655 select DMA_NONCOHERENT
>> 656 select IRQ_MIPS_CPU
>> 657 select USE_OF
>> 658 select SYS_HAS_CPU_MIPS32_R1
>> 659 select SYS_HAS_CPU_MIPS32_R2
>> 660 select SYS_SUPPORTS_32BIT_KERNEL
>> 661 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 662 select SYS_SUPPORTS_MIPS16
>> 663 select SYS_HAS_EARLY_PRINTK
>> 664 select CLKDEV_LOOKUP
>> 665 select ARCH_HAS_RESET_CONTROLLER
>> 666 select RESET_CONTROLLER
>> 667
>> 668 config SGI_IP22
>> 669 bool "SGI IP22 (Indy/Indigo2)"
>> 670 select ARC_MEMORY
>> 671 select ARC_PROMLIB
>> 672 select FW_ARC
>> 673 select FW_ARC32
>> 674 select ARCH_MIGHT_HAVE_PC_SERIO
>> 675 select BOOT_ELF32
>> 676 select CEVT_R4K
>> 677 select CSRC_R4K
>> 678 select DEFAULT_SGI_PARTITION
>> 679 select DMA_NONCOHERENT
>> 680 select HAVE_EISA
>> 681 select I8253
>> 682 select I8259
>> 683 select IP22_CPU_SCACHE
>> 684 select IRQ_MIPS_CPU
>> 685 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 686 select SGI_HAS_I8042
>> 687 select SGI_HAS_INDYDOG
>> 688 select SGI_HAS_HAL2
>> 689 select SGI_HAS_SEEQ
>> 690 select SGI_HAS_WD93
>> 691 select SGI_HAS_ZILOG
>> 692 select SWAP_IO_SPACE
>> 693 select SYS_HAS_CPU_R4X00
>> 694 select SYS_HAS_CPU_R5000
>> 695 select SYS_HAS_EARLY_PRINTK
>> 696 select SYS_SUPPORTS_32BIT_KERNEL
>> 697 select SYS_SUPPORTS_64BIT_KERNEL
>> 698 select SYS_SUPPORTS_BIG_ENDIAN
>> 699 select MIPS_L1_CACHE_SHIFT_7
>> 700 help
>> 701 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 702 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 703 that runs on these, say Y here.
>> 704
>> 705 config SGI_IP27
>> 706 bool "SGI IP27 (Origin200/2000)"
>> 707 select ARCH_HAS_PHYS_TO_DMA
>> 708 select ARCH_SPARSEMEM_ENABLE
>> 709 select FW_ARC
>> 710 select FW_ARC64
>> 711 select ARC_CMDLINE_ONLY
>> 712 select BOOT_ELF64
>> 713 select DEFAULT_SGI_PARTITION
>> 714 select SYS_HAS_EARLY_PRINTK
>> 715 select HAVE_PCI
>> 716 select IRQ_MIPS_CPU
>> 717 select IRQ_DOMAIN_HIERARCHY
>> 718 select NR_CPUS_DEFAULT_64
>> 719 select PCI_DRIVERS_GENERIC
>> 720 select PCI_XTALK_BRIDGE
>> 721 select SYS_HAS_CPU_R10000
>> 722 select SYS_SUPPORTS_64BIT_KERNEL
>> 723 select SYS_SUPPORTS_BIG_ENDIAN
>> 724 select SYS_SUPPORTS_NUMA
>> 725 select SYS_SUPPORTS_SMP
>> 726 select MIPS_L1_CACHE_SHIFT_7
>> 727 help
>> 728 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 729 workstations. To compile a Linux kernel that runs on these, say Y
>> 730 here.
250 731
251 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 732 config SGI_IP28
252 default 8 !! 733 bool "SGI IP28 (Indigo2 R10k)"
>> 734 select ARC_MEMORY
>> 735 select ARC_PROMLIB
>> 736 select FW_ARC
>> 737 select FW_ARC64
>> 738 select ARCH_MIGHT_HAVE_PC_SERIO
>> 739 select BOOT_ELF64
>> 740 select CEVT_R4K
>> 741 select CSRC_R4K
>> 742 select DEFAULT_SGI_PARTITION
>> 743 select DMA_NONCOHERENT
>> 744 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 745 select IRQ_MIPS_CPU
>> 746 select HAVE_EISA
>> 747 select I8253
>> 748 select I8259
>> 749 select SGI_HAS_I8042
>> 750 select SGI_HAS_INDYDOG
>> 751 select SGI_HAS_HAL2
>> 752 select SGI_HAS_SEEQ
>> 753 select SGI_HAS_WD93
>> 754 select SGI_HAS_ZILOG
>> 755 select SWAP_IO_SPACE
>> 756 select SYS_HAS_CPU_R10000
>> 757 select SYS_HAS_EARLY_PRINTK
>> 758 select SYS_SUPPORTS_64BIT_KERNEL
>> 759 select SYS_SUPPORTS_BIG_ENDIAN
>> 760 select MIPS_L1_CACHE_SHIFT_7
>> 761 help
>> 762 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 763 kernel that runs on these, say Y here.
>> 764
>> 765 config SGI_IP30
>> 766 bool "SGI IP30 (Octane/Octane2)"
>> 767 select ARCH_HAS_PHYS_TO_DMA
>> 768 select FW_ARC
>> 769 select FW_ARC64
>> 770 select BOOT_ELF64
>> 771 select CEVT_R4K
>> 772 select CSRC_R4K
>> 773 select SYNC_R4K if SMP
>> 774 select ZONE_DMA32
>> 775 select HAVE_PCI
>> 776 select IRQ_MIPS_CPU
>> 777 select IRQ_DOMAIN_HIERARCHY
>> 778 select NR_CPUS_DEFAULT_2
>> 779 select PCI_DRIVERS_GENERIC
>> 780 select PCI_XTALK_BRIDGE
>> 781 select SYS_HAS_EARLY_PRINTK
>> 782 select SYS_HAS_CPU_R10000
>> 783 select SYS_SUPPORTS_64BIT_KERNEL
>> 784 select SYS_SUPPORTS_BIG_ENDIAN
>> 785 select SYS_SUPPORTS_SMP
>> 786 select MIPS_L1_CACHE_SHIFT_7
>> 787 select ARC_MEMORY
>> 788 help
>> 789 These are the SGI Octane and Octane2 graphics workstations. To
>> 790 compile a Linux kernel that runs on these, say Y here.
>> 791
>> 792 config SGI_IP32
>> 793 bool "SGI IP32 (O2)"
>> 794 select ARC_MEMORY
>> 795 select ARC_PROMLIB
>> 796 select ARCH_HAS_PHYS_TO_DMA
>> 797 select FW_ARC
>> 798 select FW_ARC32
>> 799 select BOOT_ELF32
>> 800 select CEVT_R4K
>> 801 select CSRC_R4K
>> 802 select DMA_NONCOHERENT
>> 803 select HAVE_PCI
>> 804 select IRQ_MIPS_CPU
>> 805 select R5000_CPU_SCACHE
>> 806 select RM7000_CPU_SCACHE
>> 807 select SYS_HAS_CPU_R5000
>> 808 select SYS_HAS_CPU_R10000 if BROKEN
>> 809 select SYS_HAS_CPU_RM7000
>> 810 select SYS_HAS_CPU_NEVADA
>> 811 select SYS_SUPPORTS_64BIT_KERNEL
>> 812 select SYS_SUPPORTS_BIG_ENDIAN
>> 813 help
>> 814 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 815
>> 816 config SIBYTE_CRHINE
>> 817 bool "Sibyte BCM91120C-CRhine"
>> 818 select BOOT_ELF32
>> 819 select SIBYTE_BCM1120
>> 820 select SWAP_IO_SPACE
>> 821 select SYS_HAS_CPU_SB1
>> 822 select SYS_SUPPORTS_BIG_ENDIAN
>> 823 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 824
>> 825 config SIBYTE_CARMEL
>> 826 bool "Sibyte BCM91120x-Carmel"
>> 827 select BOOT_ELF32
>> 828 select SIBYTE_BCM1120
>> 829 select SWAP_IO_SPACE
>> 830 select SYS_HAS_CPU_SB1
>> 831 select SYS_SUPPORTS_BIG_ENDIAN
>> 832 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 833
>> 834 config SIBYTE_CRHONE
>> 835 bool "Sibyte BCM91125C-CRhone"
>> 836 select BOOT_ELF32
>> 837 select SIBYTE_BCM1125
>> 838 select SWAP_IO_SPACE
>> 839 select SYS_HAS_CPU_SB1
>> 840 select SYS_SUPPORTS_BIG_ENDIAN
>> 841 select SYS_SUPPORTS_HIGHMEM
>> 842 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 843
>> 844 config SIBYTE_RHONE
>> 845 bool "Sibyte BCM91125E-Rhone"
>> 846 select BOOT_ELF32
>> 847 select SIBYTE_BCM1125H
>> 848 select SWAP_IO_SPACE
>> 849 select SYS_HAS_CPU_SB1
>> 850 select SYS_SUPPORTS_BIG_ENDIAN
>> 851 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 852
>> 853 config SIBYTE_SWARM
>> 854 bool "Sibyte BCM91250A-SWARM"
>> 855 select BOOT_ELF32
>> 856 select HAVE_PATA_PLATFORM
>> 857 select SIBYTE_SB1250
>> 858 select SWAP_IO_SPACE
>> 859 select SYS_HAS_CPU_SB1
>> 860 select SYS_SUPPORTS_BIG_ENDIAN
>> 861 select SYS_SUPPORTS_HIGHMEM
>> 862 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 863 select ZONE_DMA32 if 64BIT
>> 864 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
253 865
254 # max bits determined by the following formula !! 866 config SIBYTE_LITTLESUR
255 # VA_BITS - PAGE_SHIFT - 3 !! 867 bool "Sibyte BCM91250C2-LittleSur"
256 config ARCH_MMAP_RND_BITS_MAX !! 868 select BOOT_ELF32
257 default 24 if 64BIT # SV39 based !! 869 select HAVE_PATA_PLATFORM
258 default 17 !! 870 select SIBYTE_SB1250
>> 871 select SWAP_IO_SPACE
>> 872 select SYS_HAS_CPU_SB1
>> 873 select SYS_SUPPORTS_BIG_ENDIAN
>> 874 select SYS_SUPPORTS_HIGHMEM
>> 875 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 876 select ZONE_DMA32 if 64BIT
259 877
260 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 878 config SIBYTE_SENTOSA
261 default 17 !! 879 bool "Sibyte BCM91250E-Sentosa"
>> 880 select BOOT_ELF32
>> 881 select SIBYTE_SB1250
>> 882 select SWAP_IO_SPACE
>> 883 select SYS_HAS_CPU_SB1
>> 884 select SYS_SUPPORTS_BIG_ENDIAN
>> 885 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 886 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 887
>> 888 config SIBYTE_BIGSUR
>> 889 bool "Sibyte BCM91480B-BigSur"
>> 890 select BOOT_ELF32
>> 891 select NR_CPUS_DEFAULT_4
>> 892 select SIBYTE_BCM1x80
>> 893 select SWAP_IO_SPACE
>> 894 select SYS_HAS_CPU_SB1
>> 895 select SYS_SUPPORTS_BIG_ENDIAN
>> 896 select SYS_SUPPORTS_HIGHMEM
>> 897 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 898 select ZONE_DMA32 if 64BIT
>> 899 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
262 900
263 # set if we run in machine mode, cleared if we !! 901 config SNI_RM
264 config RISCV_M_MODE !! 902 bool "SNI RM200/300/400"
265 bool "Build a kernel that runs in mach !! 903 select ARC_MEMORY
266 depends on !MMU !! 904 select ARC_PROMLIB
267 default y !! 905 select FW_ARC if CPU_LITTLE_ENDIAN
>> 906 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 907 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 908 select ARCH_MAY_HAVE_PC_FDC
>> 909 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 910 select ARCH_MIGHT_HAVE_PC_SERIO
>> 911 select BOOT_ELF32
>> 912 select CEVT_R4K
>> 913 select CSRC_R4K
>> 914 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 915 select DMA_NONCOHERENT
>> 916 select GENERIC_ISA_DMA
>> 917 select HAVE_EISA
>> 918 select HAVE_PCSPKR_PLATFORM
>> 919 select HAVE_PCI
>> 920 select IRQ_MIPS_CPU
>> 921 select I8253
>> 922 select I8259
>> 923 select ISA
>> 924 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 925 select SYS_HAS_CPU_R4X00
>> 926 select SYS_HAS_CPU_R5000
>> 927 select SYS_HAS_CPU_R10000
>> 928 select R5000_CPU_SCACHE
>> 929 select SYS_HAS_EARLY_PRINTK
>> 930 select SYS_SUPPORTS_32BIT_KERNEL
>> 931 select SYS_SUPPORTS_64BIT_KERNEL
>> 932 select SYS_SUPPORTS_BIG_ENDIAN
>> 933 select SYS_SUPPORTS_HIGHMEM
>> 934 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 935 help
>> 936 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 937 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 938 Technology and now in turn merged with Fujitsu. Say Y here to
>> 939 support this machine type.
>> 940
>> 941 config MACH_TX39XX
>> 942 bool "Toshiba TX39 series based machines"
>> 943
>> 944 config MACH_TX49XX
>> 945 bool "Toshiba TX49 series based machines"
>> 946
>> 947 config MIKROTIK_RB532
>> 948 bool "Mikrotik RB532 boards"
>> 949 select CEVT_R4K
>> 950 select CSRC_R4K
>> 951 select DMA_NONCOHERENT
>> 952 select HAVE_PCI
>> 953 select IRQ_MIPS_CPU
>> 954 select SYS_HAS_CPU_MIPS32_R1
>> 955 select SYS_SUPPORTS_32BIT_KERNEL
>> 956 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 957 select SWAP_IO_SPACE
>> 958 select BOOT_RAW
>> 959 select GPIOLIB
>> 960 select MIPS_L1_CACHE_SHIFT_4
>> 961 help
>> 962 Support the Mikrotik(tm) RouterBoard 532 series,
>> 963 based on the IDT RC32434 SoC.
>> 964
>> 965 config CAVIUM_OCTEON_SOC
>> 966 bool "Cavium Networks Octeon SoC based boards"
>> 967 select CEVT_R4K
>> 968 select ARCH_HAS_PHYS_TO_DMA
>> 969 select HAVE_RAPIDIO
>> 970 select PHYS_ADDR_T_64BIT
>> 971 select SYS_SUPPORTS_64BIT_KERNEL
>> 972 select SYS_SUPPORTS_BIG_ENDIAN
>> 973 select EDAC_SUPPORT
>> 974 select EDAC_ATOMIC_SCRUB
>> 975 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 976 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 977 select SYS_HAS_EARLY_PRINTK
>> 978 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 979 select HAVE_PCI
>> 980 select ZONE_DMA32
>> 981 select HOLES_IN_ZONE
>> 982 select GPIOLIB
>> 983 select LIBFDT
>> 984 select USE_OF
>> 985 select ARCH_SPARSEMEM_ENABLE
>> 986 select SYS_SUPPORTS_SMP
>> 987 select NR_CPUS_DEFAULT_64
>> 988 select MIPS_NR_CPU_NR_MAP_1024
>> 989 select BUILTIN_DTB
>> 990 select MTD_COMPLEX_MAPPINGS
>> 991 select SWIOTLB
>> 992 select SYS_SUPPORTS_RELOCATABLE
>> 993 help
>> 994 This option supports all of the Octeon reference boards from Cavium
>> 995 Networks. It builds a kernel that dynamically determines the Octeon
>> 996 CPU type and supports all known board reference implementations.
>> 997 Some of the supported boards are:
>> 998 EBT3000
>> 999 EBH3000
>> 1000 EBH3100
>> 1001 Thunder
>> 1002 Kodama
>> 1003 Hikari
>> 1004 Say Y here for most Octeon reference boards.
>> 1005
>> 1006 config NLM_XLR_BOARD
>> 1007 bool "Netlogic XLR/XLS based systems"
>> 1008 select BOOT_ELF32
>> 1009 select NLM_COMMON
>> 1010 select SYS_HAS_CPU_XLR
>> 1011 select SYS_SUPPORTS_SMP
>> 1012 select HAVE_PCI
>> 1013 select SWAP_IO_SPACE
>> 1014 select SYS_SUPPORTS_32BIT_KERNEL
>> 1015 select SYS_SUPPORTS_64BIT_KERNEL
>> 1016 select PHYS_ADDR_T_64BIT
>> 1017 select SYS_SUPPORTS_BIG_ENDIAN
>> 1018 select SYS_SUPPORTS_HIGHMEM
>> 1019 select NR_CPUS_DEFAULT_32
>> 1020 select CEVT_R4K
>> 1021 select CSRC_R4K
>> 1022 select IRQ_MIPS_CPU
>> 1023 select ZONE_DMA32 if 64BIT
>> 1024 select SYNC_R4K
>> 1025 select SYS_HAS_EARLY_PRINTK
>> 1026 select SYS_SUPPORTS_ZBOOT
>> 1027 select SYS_SUPPORTS_ZBOOT_UART16550
>> 1028 help
>> 1029 Support for systems based on Netlogic XLR and XLS processors.
>> 1030 Say Y here if you have a XLR or XLS based board.
>> 1031
>> 1032 config NLM_XLP_BOARD
>> 1033 bool "Netlogic XLP based systems"
>> 1034 select BOOT_ELF32
>> 1035 select NLM_COMMON
>> 1036 select SYS_HAS_CPU_XLP
>> 1037 select SYS_SUPPORTS_SMP
>> 1038 select HAVE_PCI
>> 1039 select SYS_SUPPORTS_32BIT_KERNEL
>> 1040 select SYS_SUPPORTS_64BIT_KERNEL
>> 1041 select PHYS_ADDR_T_64BIT
>> 1042 select GPIOLIB
>> 1043 select SYS_SUPPORTS_BIG_ENDIAN
>> 1044 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1045 select SYS_SUPPORTS_HIGHMEM
>> 1046 select NR_CPUS_DEFAULT_32
>> 1047 select CEVT_R4K
>> 1048 select CSRC_R4K
>> 1049 select IRQ_MIPS_CPU
>> 1050 select ZONE_DMA32 if 64BIT
>> 1051 select SYNC_R4K
>> 1052 select SYS_HAS_EARLY_PRINTK
>> 1053 select USE_OF
>> 1054 select SYS_SUPPORTS_ZBOOT
>> 1055 select SYS_SUPPORTS_ZBOOT_UART16550
>> 1056 help
>> 1057 This board is based on Netlogic XLP Processor.
>> 1058 Say Y here if you have a XLP based board.
>> 1059
>> 1060 config MIPS_PARAVIRT
>> 1061 bool "Para-Virtualized guest system"
>> 1062 select CEVT_R4K
>> 1063 select CSRC_R4K
>> 1064 select SYS_SUPPORTS_64BIT_KERNEL
>> 1065 select SYS_SUPPORTS_32BIT_KERNEL
>> 1066 select SYS_SUPPORTS_BIG_ENDIAN
>> 1067 select SYS_SUPPORTS_SMP
>> 1068 select NR_CPUS_DEFAULT_4
>> 1069 select SYS_HAS_EARLY_PRINTK
>> 1070 select SYS_HAS_CPU_MIPS32_R2
>> 1071 select SYS_HAS_CPU_MIPS64_R2
>> 1072 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1073 select HAVE_PCI
>> 1074 select SWAP_IO_SPACE
268 help 1075 help
269 Select this option if you want to ru !! 1076 This option supports guest running under ????
270 without the assistance of any other <<
271 1077
272 # set if we are running in S-mode and can use !! 1078 endchoice
273 config RISCV_SBI !! 1079
>> 1080 source "arch/mips/alchemy/Kconfig"
>> 1081 source "arch/mips/ath25/Kconfig"
>> 1082 source "arch/mips/ath79/Kconfig"
>> 1083 source "arch/mips/bcm47xx/Kconfig"
>> 1084 source "arch/mips/bcm63xx/Kconfig"
>> 1085 source "arch/mips/bmips/Kconfig"
>> 1086 source "arch/mips/generic/Kconfig"
>> 1087 source "arch/mips/jazz/Kconfig"
>> 1088 source "arch/mips/jz4740/Kconfig"
>> 1089 source "arch/mips/lantiq/Kconfig"
>> 1090 source "arch/mips/lasat/Kconfig"
>> 1091 source "arch/mips/pic32/Kconfig"
>> 1092 source "arch/mips/pistachio/Kconfig"
>> 1093 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1094 source "arch/mips/ralink/Kconfig"
>> 1095 source "arch/mips/sgi-ip27/Kconfig"
>> 1096 source "arch/mips/sibyte/Kconfig"
>> 1097 source "arch/mips/txx9/Kconfig"
>> 1098 source "arch/mips/vr41xx/Kconfig"
>> 1099 source "arch/mips/cavium-octeon/Kconfig"
>> 1100 source "arch/mips/loongson2ef/Kconfig"
>> 1101 source "arch/mips/loongson32/Kconfig"
>> 1102 source "arch/mips/loongson64/Kconfig"
>> 1103 source "arch/mips/netlogic/Kconfig"
>> 1104 source "arch/mips/paravirt/Kconfig"
>> 1105
>> 1106 endmenu
>> 1107
>> 1108 config GENERIC_HWEIGHT
274 bool 1109 bool
275 depends on !RISCV_M_MODE <<
276 default y 1110 default y
277 1111
278 config MMU !! 1112 config GENERIC_CALIBRATE_DELAY
279 bool "MMU-based Paged Memory Managemen !! 1113 bool
280 default y 1114 default y
281 help <<
282 Select if you want MMU-based virtual <<
283 support by paged memory management. <<
284 1115
285 config PAGE_OFFSET !! 1116 config SCHED_OMIT_FRAME_POINTER
286 hex !! 1117 bool
287 default 0x80000000 if !MMU && RISCV_M_ !! 1118 default y
288 default 0x80200000 if !MMU <<
289 default 0xc0000000 if 32BIT <<
290 default 0xff60000000000000 if 64BIT <<
291 <<
292 config KASAN_SHADOW_OFFSET <<
293 hex <<
294 depends on KASAN_GENERIC <<
295 default 0xdfffffff00000000 if 64BIT <<
296 default 0xffffffff if 32BIT <<
297 1119
298 config ARCH_FLATMEM_ENABLE !! 1120 #
299 def_bool !NUMA !! 1121 # Select some configuration options automatically based on user selections.
>> 1122 #
>> 1123 config FW_ARC
>> 1124 bool
300 1125
301 config ARCH_SPARSEMEM_ENABLE !! 1126 config ARCH_MAY_HAVE_PC_FDC
302 def_bool y !! 1127 bool
303 depends on MMU <<
304 select SPARSEMEM_STATIC if 32BIT && SP <<
305 select SPARSEMEM_VMEMMAP_ENABLE if 64B <<
306 1128
307 config ARCH_SELECT_MEMORY_MODEL !! 1129 config BOOT_RAW
308 def_bool ARCH_SPARSEMEM_ENABLE !! 1130 bool
309 1131
310 config ARCH_SUPPORTS_UPROBES !! 1132 config CEVT_BCM1480
311 def_bool y !! 1133 bool
312 1134
313 config STACKTRACE_SUPPORT !! 1135 config CEVT_DS1287
314 def_bool y !! 1136 bool
315 1137
316 config GENERIC_BUG !! 1138 config CEVT_GT641XX
317 def_bool y !! 1139 bool
318 depends on BUG <<
319 select GENERIC_BUG_RELATIVE_POINTERS i <<
320 1140
321 config GENERIC_BUG_RELATIVE_POINTERS !! 1141 config CEVT_R4K
322 bool 1142 bool
323 1143
324 config GENERIC_CALIBRATE_DELAY !! 1144 config CEVT_SB1250
325 def_bool y !! 1145 bool
326 1146
327 config GENERIC_CSUM !! 1147 config CEVT_TXX9
328 def_bool y !! 1148 bool
329 1149
330 config GENERIC_HWEIGHT !! 1150 config CSRC_BCM1480
331 def_bool y !! 1151 bool
332 1152
333 config FIX_EARLYCON_MEM !! 1153 config CSRC_IOASIC
334 def_bool MMU !! 1154 bool
335 1155
336 config ILLEGAL_POINTER_VALUE !! 1156 config CSRC_R4K
337 hex !! 1157 bool
338 default 0 if 32BIT <<
339 default 0xdead000000000000 if 64BIT <<
340 1158
341 config PGTABLE_LEVELS !! 1159 config CSRC_SB1250
342 int !! 1160 bool
343 default 5 if 64BIT <<
344 default 2 <<
345 1161
346 config LOCKDEP_SUPPORT !! 1162 config MIPS_CLOCK_VSYSCALL
347 def_bool y !! 1163 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
348 1164
349 config RISCV_DMA_NONCOHERENT !! 1165 config GPIO_TXX9
>> 1166 select GPIOLIB
>> 1167 bool
>> 1168
>> 1169 config FW_CFE
>> 1170 bool
>> 1171
>> 1172 config ARCH_SUPPORTS_UPROBES
>> 1173 bool
>> 1174
>> 1175 config DMA_MAYBE_COHERENT
>> 1176 select ARCH_HAS_DMA_COHERENCE_H
>> 1177 select DMA_NONCOHERENT
>> 1178 bool
>> 1179
>> 1180 config DMA_PERDEV_COHERENT
350 bool 1181 bool
351 select ARCH_HAS_DMA_PREP_COHERENT <<
352 select ARCH_HAS_SETUP_DMA_OPS 1182 select ARCH_HAS_SETUP_DMA_OPS
353 select ARCH_HAS_SYNC_DMA_FOR_CPU !! 1183 select DMA_NONCOHERENT
>> 1184
>> 1185 config DMA_NONCOHERENT
>> 1186 bool
>> 1187 #
>> 1188 # MIPS allows mixing "slightly different" Cacheability and Coherency
>> 1189 # Attribute bits. It is believed that the uncached access through
>> 1190 # KSEG1 and the implementation specific "uncached accelerated" used
>> 1191 # by pgprot_writcombine can be mixed, and the latter sometimes provides
>> 1192 # significant advantages.
>> 1193 #
>> 1194 select ARCH_HAS_DMA_WRITE_COMBINE
354 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 1195 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
355 select DMA_BOUNCE_UNALIGNED_KMALLOC if !! 1196 select ARCH_HAS_UNCACHED_SEGMENT
>> 1197 select DMA_NONCOHERENT_MMAP
>> 1198 select DMA_NONCOHERENT_CACHE_SYNC
>> 1199 select NEED_DMA_MAP_STATE
356 1200
357 config RISCV_NONSTANDARD_CACHE_OPS !! 1201 config SYS_HAS_EARLY_PRINTK
358 bool 1202 bool
359 help <<
360 This enables function pointer suppor <<
361 systems to handle cache management. <<
362 1203
363 config AS_HAS_INSN !! 1204 config SYS_SUPPORTS_HOTPLUG_CPU
364 def_bool $(as-instr,.insn r 51$(comma) !! 1205 bool
365 1206
366 config AS_HAS_OPTION_ARCH !! 1207 config MIPS_BONITO64
367 # https://github.com/llvm/llvm-project !! 1208 bool
368 def_bool y <<
369 depends on $(as-instr, .option arch$(c <<
370 1209
371 source "arch/riscv/Kconfig.socs" !! 1210 config MIPS_MSC
372 source "arch/riscv/Kconfig.errata" !! 1211 bool
373 1212
374 menu "Platform type" !! 1213 config MIPS_NILE4
>> 1214 bool
375 1215
376 config NONPORTABLE !! 1216 config SYNC_R4K
377 bool "Allow configurations that result !! 1217 bool
378 help <<
379 RISC-V kernel binaries are compatibl <<
380 whenever possible, but there are som <<
381 satisfied by configurations that res <<
382 not portable between systems. <<
383 1218
384 Selecting N does not guarantee kerne !! 1219 config MIPS_MACHINE
385 systems. Selecting any of the optio !! 1220 def_bool n
386 result in kernel binaries that are u <<
387 systems. <<
388 1221
389 If unsure, say N. !! 1222 config NO_IOPORT_MAP
>> 1223 def_bool n
390 1224
391 choice !! 1225 config GENERIC_CSUM
392 prompt "Base ISA" !! 1226 bool
393 default ARCH_RV64I !! 1227 default y if !CPU_HAS_LOAD_STORE_LR
>> 1228
>> 1229 config GENERIC_ISA_DMA
>> 1230 bool
>> 1231 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1232 select ISA_DMA_API
>> 1233
>> 1234 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1235 bool
>> 1236 select GENERIC_ISA_DMA
>> 1237
>> 1238 config ISA_DMA_API
>> 1239 bool
>> 1240
>> 1241 config HOLES_IN_ZONE
>> 1242 bool
>> 1243
>> 1244 config SYS_SUPPORTS_RELOCATABLE
>> 1245 bool
394 help 1246 help
395 This selects the base ISA that this !! 1247 Selected if the platform supports relocating the kernel.
396 the target platform. !! 1248 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1249 to allow access to command line and entropy sources.
397 1250
398 config ARCH_RV32I !! 1251 config MIPS_CBPF_JIT
399 bool "RV32I" !! 1252 def_bool y
400 depends on NONPORTABLE !! 1253 depends on BPF_JIT && HAVE_CBPF_JIT
401 select 32BIT <<
402 select GENERIC_LIB_ASHLDI3 <<
403 select GENERIC_LIB_ASHRDI3 <<
404 select GENERIC_LIB_LSHRDI3 <<
405 select GENERIC_LIB_UCMPDI2 <<
406 1254
407 config ARCH_RV64I !! 1255 config MIPS_EBPF_JIT
408 bool "RV64I" !! 1256 def_bool y
409 select 64BIT !! 1257 depends on BPF_JIT && HAVE_EBPF_JIT
410 select ARCH_SUPPORTS_INT128 if CC_HAS_ <<
411 select SWIOTLB if MMU <<
412 1258
413 endchoice <<
414 1259
415 # We must be able to map all physical memory i !! 1260 #
416 # is still a bit more efficient when generatin !! 1261 # Endianness selection. Sufficiently obscure so many users don't know what to
417 # such that it can only map 2GiB of memory. !! 1262 # answer,so we try hard to limit the available choices. Also the use of a
>> 1263 # choice statement should be more obvious to the user.
>> 1264 #
418 choice 1265 choice
419 prompt "Kernel Code Model" !! 1266 prompt "Endianness selection"
420 default CMODEL_MEDLOW if 32BIT !! 1267 help
421 default CMODEL_MEDANY if 64BIT !! 1268 Some MIPS machines can be configured for either little or big endian
422 !! 1269 byte order. These modes require different kernels and a different
423 config CMODEL_MEDLOW !! 1270 Linux distribution. In general there is one preferred byteorder for a
424 bool "medium low code model" !! 1271 particular system but some systems are just as commonly used in the
425 config CMODEL_MEDANY !! 1272 one or the other endianness.
426 bool "medium any code model" !! 1273
>> 1274 config CPU_BIG_ENDIAN
>> 1275 bool "Big endian"
>> 1276 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1277
>> 1278 config CPU_LITTLE_ENDIAN
>> 1279 bool "Little endian"
>> 1280 depends on SYS_SUPPORTS_LITTLE_ENDIAN
>> 1281
427 endchoice 1282 endchoice
428 1283
429 config MODULE_SECTIONS !! 1284 config EXPORT_UASM
430 bool 1285 bool
431 select HAVE_MOD_ARCH_SPECIFIC <<
432 1286
433 config SMP !! 1287 config SYS_SUPPORTS_APM_EMULATION
434 bool "Symmetric Multi-Processing" !! 1288 bool
435 help <<
436 This enables support for systems wit <<
437 you say N here, the kernel will run <<
438 multiprocessor machines, but will us <<
439 multiprocessor machine. If you say Y <<
440 on many, but not all, single process <<
441 processor machine, the kernel will r <<
442 here. <<
443 1289
444 If you don't know what to do here, s !! 1290 config SYS_SUPPORTS_BIG_ENDIAN
>> 1291 bool
445 1292
446 config SCHED_MC !! 1293 config SYS_SUPPORTS_LITTLE_ENDIAN
447 bool "Multi-core scheduler support" !! 1294 bool
448 depends on SMP <<
449 help <<
450 Multi-core scheduler support improve <<
451 making when dealing with multi-core <<
452 increased overhead in some places. I <<
453 1295
454 config NR_CPUS !! 1296 config SYS_SUPPORTS_HUGETLBFS
455 int "Maximum number of CPUs (2-512)" !! 1297 bool
456 depends on SMP !! 1298 depends on CPU_SUPPORTS_HUGEPAGES
457 range 2 512 if !RISCV_SBI_V01 !! 1299 default y
458 range 2 32 if RISCV_SBI_V01 && 32BIT <<
459 range 2 64 if RISCV_SBI_V01 && 64BIT <<
460 default "32" if 32BIT <<
461 default "64" if 64BIT <<
462 1300
463 config HOTPLUG_CPU !! 1301 config MIPS_HUGE_TLB_SUPPORT
464 bool "Support for hot-pluggable CPUs" !! 1302 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
465 depends on SMP !! 1303
466 select GENERIC_IRQ_MIGRATION !! 1304 config IRQ_CPU_RM7K
467 help !! 1305 bool
468 1306
469 Say Y here to experiment with turnin !! 1307 config IRQ_MSP_SLP
470 can be controlled through /sys/devic !! 1308 bool
471 1309
472 Say N if you want to disable CPU hot !! 1310 config IRQ_MSP_CIC
>> 1311 bool
>> 1312
>> 1313 config IRQ_TXX9
>> 1314 bool
>> 1315
>> 1316 config IRQ_GT641XX
>> 1317 bool
>> 1318
>> 1319 config PCI_GT64XXX_PCI0
>> 1320 bool
>> 1321
>> 1322 config PCI_XTALK_BRIDGE
>> 1323 bool
>> 1324
>> 1325 config NO_EXCEPT_FILL
>> 1326 bool
>> 1327
>> 1328 config SOC_EMMA2RH
>> 1329 bool
>> 1330 select CEVT_R4K
>> 1331 select CSRC_R4K
>> 1332 select DMA_NONCOHERENT
>> 1333 select IRQ_MIPS_CPU
>> 1334 select SWAP_IO_SPACE
>> 1335 select SYS_HAS_CPU_R5500
>> 1336 select SYS_SUPPORTS_32BIT_KERNEL
>> 1337 select SYS_SUPPORTS_64BIT_KERNEL
>> 1338 select SYS_SUPPORTS_BIG_ENDIAN
>> 1339
>> 1340 config SOC_PNX833X
>> 1341 bool
>> 1342 select CEVT_R4K
>> 1343 select CSRC_R4K
>> 1344 select IRQ_MIPS_CPU
>> 1345 select DMA_NONCOHERENT
>> 1346 select SYS_HAS_CPU_MIPS32_R2
>> 1347 select SYS_SUPPORTS_32BIT_KERNEL
>> 1348 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1349 select SYS_SUPPORTS_BIG_ENDIAN
>> 1350 select SYS_SUPPORTS_MIPS16
>> 1351 select CPU_MIPSR2_IRQ_VI
>> 1352
>> 1353 config SOC_PNX8335
>> 1354 bool
>> 1355 select SOC_PNX833X
>> 1356
>> 1357 config MIPS_SPRAM
>> 1358 bool
>> 1359
>> 1360 config SWAP_IO_SPACE
>> 1361 bool
>> 1362
>> 1363 config SGI_HAS_INDYDOG
>> 1364 bool
>> 1365
>> 1366 config SGI_HAS_HAL2
>> 1367 bool
>> 1368
>> 1369 config SGI_HAS_SEEQ
>> 1370 bool
>> 1371
>> 1372 config SGI_HAS_WD93
>> 1373 bool
>> 1374
>> 1375 config SGI_HAS_ZILOG
>> 1376 bool
>> 1377
>> 1378 config SGI_HAS_I8042
>> 1379 bool
>> 1380
>> 1381 config DEFAULT_SGI_PARTITION
>> 1382 bool
>> 1383
>> 1384 config FW_ARC32
>> 1385 bool
>> 1386
>> 1387 config FW_SNIPROM
>> 1388 bool
>> 1389
>> 1390 config BOOT_ELF32
>> 1391 bool
>> 1392
>> 1393 config MIPS_L1_CACHE_SHIFT_4
>> 1394 bool
>> 1395
>> 1396 config MIPS_L1_CACHE_SHIFT_5
>> 1397 bool
>> 1398
>> 1399 config MIPS_L1_CACHE_SHIFT_6
>> 1400 bool
>> 1401
>> 1402 config MIPS_L1_CACHE_SHIFT_7
>> 1403 bool
>> 1404
>> 1405 config MIPS_L1_CACHE_SHIFT
>> 1406 int
>> 1407 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1408 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1409 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1410 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1411 default "5"
>> 1412
>> 1413 config HAVE_STD_PC_SERIAL_PORT
>> 1414 bool
>> 1415
>> 1416 config ARC_CMDLINE_ONLY
>> 1417 bool
>> 1418
>> 1419 config ARC_CONSOLE
>> 1420 bool "ARC console support"
>> 1421 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1422
>> 1423 config ARC_MEMORY
>> 1424 bool
>> 1425
>> 1426 config ARC_PROMLIB
>> 1427 bool
>> 1428
>> 1429 config FW_ARC64
>> 1430 bool
>> 1431
>> 1432 config BOOT_ELF64
>> 1433 bool
>> 1434
>> 1435 menu "CPU selection"
473 1436
474 choice 1437 choice
475 prompt "CPU Tuning" !! 1438 prompt "CPU type"
476 default TUNE_GENERIC !! 1439 default CPU_R4X00
477 1440
478 config TUNE_GENERIC !! 1441 config CPU_LOONGSON64
479 bool "generic" !! 1442 bool "Loongson 64-bit CPU"
>> 1443 depends on SYS_HAS_CPU_LOONGSON64
>> 1444 select ARCH_HAS_PHYS_TO_DMA
>> 1445 select CPU_SUPPORTS_64BIT_KERNEL
>> 1446 select CPU_SUPPORTS_HIGHMEM
>> 1447 select CPU_SUPPORTS_HUGEPAGES
>> 1448 select CPU_SUPPORTS_MSA
>> 1449 select CPU_HAS_LOAD_STORE_LR
>> 1450 select WEAK_ORDERING
>> 1451 select WEAK_REORDERING_BEYOND_LLSC
>> 1452 select MIPS_ASID_BITS_VARIABLE
>> 1453 select MIPS_PGD_C0_CONTEXT
>> 1454 select MIPS_L1_CACHE_SHIFT_6
>> 1455 select GPIOLIB
>> 1456 select SWIOTLB
>> 1457 help
>> 1458 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
>> 1459 cores implements the MIPS64R2 instruction set with many extensions,
>> 1460 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
>> 1461 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
>> 1462 Loongson-2E/2F is not covered here and will be removed in future.
480 1463
>> 1464 config LOONGSON3_ENHANCEMENT
>> 1465 bool "New Loongson-3 CPU Enhancements"
>> 1466 default n
>> 1467 select CPU_MIPSR2
>> 1468 select CPU_HAS_PREFETCH
>> 1469 depends on CPU_LOONGSON64
>> 1470 help
>> 1471 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
>> 1472 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1473 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
>> 1474 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1475 Fast TLB refill support, etc.
>> 1476
>> 1477 This option enable those enhancements which are not probed at run
>> 1478 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1479 please say 'N' here. If you want a high-performance kernel to run on
>> 1480 new Loongson-3 machines only, please say 'Y' here.
>> 1481
>> 1482 config CPU_LOONGSON3_WORKAROUNDS
>> 1483 bool "Old Loongson-3 LLSC Workarounds"
>> 1484 default y if SMP
>> 1485 depends on CPU_LOONGSON64
>> 1486 help
>> 1487 Loongson-3 processors have the llsc issues which require workarounds.
>> 1488 Without workarounds the system may hang unexpectedly.
>> 1489
>> 1490 Newer Loongson-3 will fix these issues and no workarounds are needed.
>> 1491 The workarounds have no significant side effect on them but may
>> 1492 decrease the performance of the system so this option should be
>> 1493 disabled unless the kernel is intended to be run on old systems.
>> 1494
>> 1495 If unsure, please say Y.
>> 1496
>> 1497 config CPU_LOONGSON2E
>> 1498 bool "Loongson 2E"
>> 1499 depends on SYS_HAS_CPU_LOONGSON2E
>> 1500 select CPU_LOONGSON2EF
>> 1501 help
>> 1502 The Loongson 2E processor implements the MIPS III instruction set
>> 1503 with many extensions.
>> 1504
>> 1505 It has an internal FPGA northbridge, which is compatible to
>> 1506 bonito64.
>> 1507
>> 1508 config CPU_LOONGSON2F
>> 1509 bool "Loongson 2F"
>> 1510 depends on SYS_HAS_CPU_LOONGSON2F
>> 1511 select CPU_LOONGSON2EF
>> 1512 select GPIOLIB
>> 1513 help
>> 1514 The Loongson 2F processor implements the MIPS III instruction set
>> 1515 with many extensions.
>> 1516
>> 1517 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1518 have a similar programming interface with FPGA northbridge used in
>> 1519 Loongson2E.
>> 1520
>> 1521 config CPU_LOONGSON1B
>> 1522 bool "Loongson 1B"
>> 1523 depends on SYS_HAS_CPU_LOONGSON1B
>> 1524 select CPU_LOONGSON32
>> 1525 select LEDS_GPIO_REGISTER
>> 1526 help
>> 1527 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1528 Release 1 instruction set and part of the MIPS32 Release 2
>> 1529 instruction set.
>> 1530
>> 1531 config CPU_LOONGSON1C
>> 1532 bool "Loongson 1C"
>> 1533 depends on SYS_HAS_CPU_LOONGSON1C
>> 1534 select CPU_LOONGSON32
>> 1535 select LEDS_GPIO_REGISTER
>> 1536 help
>> 1537 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1538 Release 1 instruction set and part of the MIPS32 Release 2
>> 1539 instruction set.
>> 1540
>> 1541 config CPU_MIPS32_R1
>> 1542 bool "MIPS32 Release 1"
>> 1543 depends on SYS_HAS_CPU_MIPS32_R1
>> 1544 select CPU_HAS_PREFETCH
>> 1545 select CPU_HAS_LOAD_STORE_LR
>> 1546 select CPU_SUPPORTS_32BIT_KERNEL
>> 1547 select CPU_SUPPORTS_HIGHMEM
>> 1548 help
>> 1549 Choose this option to build a kernel for release 1 or later of the
>> 1550 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1551 MIPS processor are based on a MIPS32 processor. If you know the
>> 1552 specific type of processor in your system, choose those that one
>> 1553 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1554 Release 2 of the MIPS32 architecture is available since several
>> 1555 years so chances are you even have a MIPS32 Release 2 processor
>> 1556 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1557 performance.
>> 1558
>> 1559 config CPU_MIPS32_R2
>> 1560 bool "MIPS32 Release 2"
>> 1561 depends on SYS_HAS_CPU_MIPS32_R2
>> 1562 select CPU_HAS_PREFETCH
>> 1563 select CPU_HAS_LOAD_STORE_LR
>> 1564 select CPU_SUPPORTS_32BIT_KERNEL
>> 1565 select CPU_SUPPORTS_HIGHMEM
>> 1566 select CPU_SUPPORTS_MSA
>> 1567 select HAVE_KVM
>> 1568 help
>> 1569 Choose this option to build a kernel for release 2 or later of the
>> 1570 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1571 MIPS processor are based on a MIPS32 processor. If you know the
>> 1572 specific type of processor in your system, choose those that one
>> 1573 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1574
>> 1575 config CPU_MIPS32_R6
>> 1576 bool "MIPS32 Release 6"
>> 1577 depends on SYS_HAS_CPU_MIPS32_R6
>> 1578 select CPU_HAS_PREFETCH
>> 1579 select CPU_SUPPORTS_32BIT_KERNEL
>> 1580 select CPU_SUPPORTS_HIGHMEM
>> 1581 select CPU_SUPPORTS_MSA
>> 1582 select HAVE_KVM
>> 1583 select MIPS_O32_FP64_SUPPORT
>> 1584 help
>> 1585 Choose this option to build a kernel for release 6 or later of the
>> 1586 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1587 family, are based on a MIPS32r6 processor. If you own an older
>> 1588 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1589
>> 1590 config CPU_MIPS64_R1
>> 1591 bool "MIPS64 Release 1"
>> 1592 depends on SYS_HAS_CPU_MIPS64_R1
>> 1593 select CPU_HAS_PREFETCH
>> 1594 select CPU_HAS_LOAD_STORE_LR
>> 1595 select CPU_SUPPORTS_32BIT_KERNEL
>> 1596 select CPU_SUPPORTS_64BIT_KERNEL
>> 1597 select CPU_SUPPORTS_HIGHMEM
>> 1598 select CPU_SUPPORTS_HUGEPAGES
>> 1599 help
>> 1600 Choose this option to build a kernel for release 1 or later of the
>> 1601 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1602 MIPS processor are based on a MIPS64 processor. If you know the
>> 1603 specific type of processor in your system, choose those that one
>> 1604 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1605 Release 2 of the MIPS64 architecture is available since several
>> 1606 years so chances are you even have a MIPS64 Release 2 processor
>> 1607 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1608 performance.
>> 1609
>> 1610 config CPU_MIPS64_R2
>> 1611 bool "MIPS64 Release 2"
>> 1612 depends on SYS_HAS_CPU_MIPS64_R2
>> 1613 select CPU_HAS_PREFETCH
>> 1614 select CPU_HAS_LOAD_STORE_LR
>> 1615 select CPU_SUPPORTS_32BIT_KERNEL
>> 1616 select CPU_SUPPORTS_64BIT_KERNEL
>> 1617 select CPU_SUPPORTS_HIGHMEM
>> 1618 select CPU_SUPPORTS_HUGEPAGES
>> 1619 select CPU_SUPPORTS_MSA
>> 1620 select HAVE_KVM
>> 1621 help
>> 1622 Choose this option to build a kernel for release 2 or later of the
>> 1623 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1624 MIPS processor are based on a MIPS64 processor. If you know the
>> 1625 specific type of processor in your system, choose those that one
>> 1626 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1627
>> 1628 config CPU_MIPS64_R6
>> 1629 bool "MIPS64 Release 6"
>> 1630 depends on SYS_HAS_CPU_MIPS64_R6
>> 1631 select CPU_HAS_PREFETCH
>> 1632 select CPU_SUPPORTS_32BIT_KERNEL
>> 1633 select CPU_SUPPORTS_64BIT_KERNEL
>> 1634 select CPU_SUPPORTS_HIGHMEM
>> 1635 select CPU_SUPPORTS_HUGEPAGES
>> 1636 select CPU_SUPPORTS_MSA
>> 1637 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1638 select HAVE_KVM
>> 1639 help
>> 1640 Choose this option to build a kernel for release 6 or later of the
>> 1641 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1642 family, are based on a MIPS64r6 processor. If you own an older
>> 1643 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1644
>> 1645 config CPU_R3000
>> 1646 bool "R3000"
>> 1647 depends on SYS_HAS_CPU_R3000
>> 1648 select CPU_HAS_WB
>> 1649 select CPU_HAS_LOAD_STORE_LR
>> 1650 select CPU_R3K_TLB
>> 1651 select CPU_SUPPORTS_32BIT_KERNEL
>> 1652 select CPU_SUPPORTS_HIGHMEM
>> 1653 help
>> 1654 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1655 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1656 *not* work on R4000 machines and vice versa. However, since most
>> 1657 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1658 might be a safe bet. If the resulting kernel does not work,
>> 1659 try to recompile with R3000.
>> 1660
>> 1661 config CPU_TX39XX
>> 1662 bool "R39XX"
>> 1663 depends on SYS_HAS_CPU_TX39XX
>> 1664 select CPU_SUPPORTS_32BIT_KERNEL
>> 1665 select CPU_HAS_LOAD_STORE_LR
>> 1666 select CPU_R3K_TLB
>> 1667
>> 1668 config CPU_VR41XX
>> 1669 bool "R41xx"
>> 1670 depends on SYS_HAS_CPU_VR41XX
>> 1671 select CPU_SUPPORTS_32BIT_KERNEL
>> 1672 select CPU_SUPPORTS_64BIT_KERNEL
>> 1673 select CPU_HAS_LOAD_STORE_LR
>> 1674 help
>> 1675 The options selects support for the NEC VR4100 series of processors.
>> 1676 Only choose this option if you have one of these processors as a
>> 1677 kernel built with this option will not run on any other type of
>> 1678 processor or vice versa.
>> 1679
>> 1680 config CPU_R4X00
>> 1681 bool "R4x00"
>> 1682 depends on SYS_HAS_CPU_R4X00
>> 1683 select CPU_SUPPORTS_32BIT_KERNEL
>> 1684 select CPU_SUPPORTS_64BIT_KERNEL
>> 1685 select CPU_SUPPORTS_HUGEPAGES
>> 1686 select CPU_HAS_LOAD_STORE_LR
>> 1687 help
>> 1688 MIPS Technologies R4000-series processors other than 4300, including
>> 1689 the R4000, R4400, R4600, and 4700.
>> 1690
>> 1691 config CPU_TX49XX
>> 1692 bool "R49XX"
>> 1693 depends on SYS_HAS_CPU_TX49XX
>> 1694 select CPU_HAS_PREFETCH
>> 1695 select CPU_HAS_LOAD_STORE_LR
>> 1696 select CPU_SUPPORTS_32BIT_KERNEL
>> 1697 select CPU_SUPPORTS_64BIT_KERNEL
>> 1698 select CPU_SUPPORTS_HUGEPAGES
>> 1699
>> 1700 config CPU_R5000
>> 1701 bool "R5000"
>> 1702 depends on SYS_HAS_CPU_R5000
>> 1703 select CPU_SUPPORTS_32BIT_KERNEL
>> 1704 select CPU_SUPPORTS_64BIT_KERNEL
>> 1705 select CPU_SUPPORTS_HUGEPAGES
>> 1706 select CPU_HAS_LOAD_STORE_LR
>> 1707 help
>> 1708 MIPS Technologies R5000-series processors other than the Nevada.
>> 1709
>> 1710 config CPU_R5500
>> 1711 bool "R5500"
>> 1712 depends on SYS_HAS_CPU_R5500
>> 1713 select CPU_SUPPORTS_32BIT_KERNEL
>> 1714 select CPU_SUPPORTS_64BIT_KERNEL
>> 1715 select CPU_SUPPORTS_HUGEPAGES
>> 1716 select CPU_HAS_LOAD_STORE_LR
>> 1717 help
>> 1718 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1719 instruction set.
>> 1720
>> 1721 config CPU_NEVADA
>> 1722 bool "RM52xx"
>> 1723 depends on SYS_HAS_CPU_NEVADA
>> 1724 select CPU_SUPPORTS_32BIT_KERNEL
>> 1725 select CPU_SUPPORTS_64BIT_KERNEL
>> 1726 select CPU_SUPPORTS_HUGEPAGES
>> 1727 select CPU_HAS_LOAD_STORE_LR
>> 1728 help
>> 1729 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1730
>> 1731 config CPU_R10000
>> 1732 bool "R10000"
>> 1733 depends on SYS_HAS_CPU_R10000
>> 1734 select CPU_HAS_PREFETCH
>> 1735 select CPU_HAS_LOAD_STORE_LR
>> 1736 select CPU_SUPPORTS_32BIT_KERNEL
>> 1737 select CPU_SUPPORTS_64BIT_KERNEL
>> 1738 select CPU_SUPPORTS_HIGHMEM
>> 1739 select CPU_SUPPORTS_HUGEPAGES
>> 1740 help
>> 1741 MIPS Technologies R10000-series processors.
>> 1742
>> 1743 config CPU_RM7000
>> 1744 bool "RM7000"
>> 1745 depends on SYS_HAS_CPU_RM7000
>> 1746 select CPU_HAS_PREFETCH
>> 1747 select CPU_HAS_LOAD_STORE_LR
>> 1748 select CPU_SUPPORTS_32BIT_KERNEL
>> 1749 select CPU_SUPPORTS_64BIT_KERNEL
>> 1750 select CPU_SUPPORTS_HIGHMEM
>> 1751 select CPU_SUPPORTS_HUGEPAGES
>> 1752
>> 1753 config CPU_SB1
>> 1754 bool "SB1"
>> 1755 depends on SYS_HAS_CPU_SB1
>> 1756 select CPU_HAS_LOAD_STORE_LR
>> 1757 select CPU_SUPPORTS_32BIT_KERNEL
>> 1758 select CPU_SUPPORTS_64BIT_KERNEL
>> 1759 select CPU_SUPPORTS_HIGHMEM
>> 1760 select CPU_SUPPORTS_HUGEPAGES
>> 1761 select WEAK_ORDERING
>> 1762
>> 1763 config CPU_CAVIUM_OCTEON
>> 1764 bool "Cavium Octeon processor"
>> 1765 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1766 select CPU_HAS_PREFETCH
>> 1767 select CPU_HAS_LOAD_STORE_LR
>> 1768 select CPU_SUPPORTS_64BIT_KERNEL
>> 1769 select WEAK_ORDERING
>> 1770 select CPU_SUPPORTS_HIGHMEM
>> 1771 select CPU_SUPPORTS_HUGEPAGES
>> 1772 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1773 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1774 select MIPS_L1_CACHE_SHIFT_7
>> 1775 select HAVE_KVM
>> 1776 help
>> 1777 The Cavium Octeon processor is a highly integrated chip containing
>> 1778 many ethernet hardware widgets for networking tasks. The processor
>> 1779 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1780 Full details can be found at http://www.caviumnetworks.com.
>> 1781
>> 1782 config CPU_BMIPS
>> 1783 bool "Broadcom BMIPS"
>> 1784 depends on SYS_HAS_CPU_BMIPS
>> 1785 select CPU_MIPS32
>> 1786 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1787 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1788 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1789 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1790 select CPU_SUPPORTS_32BIT_KERNEL
>> 1791 select DMA_NONCOHERENT
>> 1792 select IRQ_MIPS_CPU
>> 1793 select SWAP_IO_SPACE
>> 1794 select WEAK_ORDERING
>> 1795 select CPU_SUPPORTS_HIGHMEM
>> 1796 select CPU_HAS_PREFETCH
>> 1797 select CPU_HAS_LOAD_STORE_LR
>> 1798 select CPU_SUPPORTS_CPUFREQ
>> 1799 select MIPS_EXTERNAL_TIMER
>> 1800 help
>> 1801 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1802
>> 1803 config CPU_XLR
>> 1804 bool "Netlogic XLR SoC"
>> 1805 depends on SYS_HAS_CPU_XLR
>> 1806 select CPU_HAS_LOAD_STORE_LR
>> 1807 select CPU_SUPPORTS_32BIT_KERNEL
>> 1808 select CPU_SUPPORTS_64BIT_KERNEL
>> 1809 select CPU_SUPPORTS_HIGHMEM
>> 1810 select CPU_SUPPORTS_HUGEPAGES
>> 1811 select WEAK_ORDERING
>> 1812 select WEAK_REORDERING_BEYOND_LLSC
>> 1813 help
>> 1814 Netlogic Microsystems XLR/XLS processors.
>> 1815
>> 1816 config CPU_XLP
>> 1817 bool "Netlogic XLP SoC"
>> 1818 depends on SYS_HAS_CPU_XLP
>> 1819 select CPU_SUPPORTS_32BIT_KERNEL
>> 1820 select CPU_SUPPORTS_64BIT_KERNEL
>> 1821 select CPU_SUPPORTS_HIGHMEM
>> 1822 select WEAK_ORDERING
>> 1823 select WEAK_REORDERING_BEYOND_LLSC
>> 1824 select CPU_HAS_PREFETCH
>> 1825 select CPU_HAS_LOAD_STORE_LR
>> 1826 select CPU_MIPSR2
>> 1827 select CPU_SUPPORTS_HUGEPAGES
>> 1828 select MIPS_ASID_BITS_VARIABLE
>> 1829 help
>> 1830 Netlogic Microsystems XLP processors.
481 endchoice 1831 endchoice
482 1832
483 # Common NUMA Features !! 1833 config CPU_MIPS32_3_5_FEATURES
484 config NUMA !! 1834 bool "MIPS32 Release 3.5 Features"
485 bool "NUMA Memory Allocation and Sched !! 1835 depends on SYS_HAS_CPU_MIPS32_R3_5
486 depends on SMP && MMU !! 1836 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
487 select ARCH_SUPPORTS_NUMA_BALANCING !! 1837 help
488 select GENERIC_ARCH_NUMA !! 1838 Choose this option to build a kernel for release 2 or later of the
489 select HAVE_SETUP_PER_CPU_AREA !! 1839 MIPS32 architecture including features from the 3.5 release such as
490 select NEED_PER_CPU_EMBED_FIRST_CHUNK !! 1840 support for Enhanced Virtual Addressing (EVA).
491 select NEED_PER_CPU_PAGE_FIRST_CHUNK !! 1841
492 select OF_NUMA !! 1842 config CPU_MIPS32_3_5_EVA
493 select USE_PERCPU_NUMA_NODE_ID !! 1843 bool "Enhanced Virtual Addressing (EVA)"
>> 1844 depends on CPU_MIPS32_3_5_FEATURES
>> 1845 select EVA
>> 1846 default y
>> 1847 help
>> 1848 Choose this option if you want to enable the Enhanced Virtual
>> 1849 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1850 One of its primary benefits is an increase in the maximum size
>> 1851 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1852
>> 1853 config CPU_MIPS32_R5_FEATURES
>> 1854 bool "MIPS32 Release 5 Features"
>> 1855 depends on SYS_HAS_CPU_MIPS32_R5
>> 1856 depends on CPU_MIPS32_R2
>> 1857 help
>> 1858 Choose this option to build a kernel for release 2 or later of the
>> 1859 MIPS32 architecture including features from release 5 such as
>> 1860 support for Extended Physical Addressing (XPA).
>> 1861
>> 1862 config CPU_MIPS32_R5_XPA
>> 1863 bool "Extended Physical Addressing (XPA)"
>> 1864 depends on CPU_MIPS32_R5_FEATURES
>> 1865 depends on !EVA
>> 1866 depends on !PAGE_SIZE_4KB
>> 1867 depends on SYS_SUPPORTS_HIGHMEM
>> 1868 select XPA
>> 1869 select HIGHMEM
>> 1870 select PHYS_ADDR_T_64BIT
>> 1871 default n
494 help 1872 help
495 Enable NUMA (Non-Uniform Memory Acce !! 1873 Choose this option if you want to enable the Extended Physical
>> 1874 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1875 benefit is to increase physical addressing equal to or greater
>> 1876 than 40 bits. Note that this has the side effect of turning on
>> 1877 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1878 If unsure, say 'N' here.
496 1879
497 The kernel will try to allocate memo !! 1880 if CPU_LOONGSON2F
498 local memory of the CPU and add some !! 1881 config CPU_NOP_WORKAROUNDS
>> 1882 bool
499 1883
500 config NODES_SHIFT !! 1884 config CPU_JUMP_WORKAROUNDS
501 int "Maximum NUMA Nodes (as a power of !! 1885 bool
502 range 1 10 !! 1886
503 default "2" !! 1887 config CPU_LOONGSON2F_WORKAROUNDS
504 depends on NUMA !! 1888 bool "Loongson 2F Workarounds"
>> 1889 default y
>> 1890 select CPU_NOP_WORKAROUNDS
>> 1891 select CPU_JUMP_WORKAROUNDS
505 help 1892 help
506 Specify the maximum number of NUMA N !! 1893 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
507 system. Increases memory reserved t !! 1894 require workarounds. Without workarounds the system may hang
>> 1895 unexpectedly. For more information please refer to the gas
>> 1896 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1897
>> 1898 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1899 are needed. The workarounds have no significant side effect on them
>> 1900 but may decrease the performance of the system so this option should
>> 1901 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1902 systems.
>> 1903
>> 1904 If unsure, please say Y.
>> 1905 endif # CPU_LOONGSON2F
>> 1906
>> 1907 config SYS_SUPPORTS_ZBOOT
>> 1908 bool
>> 1909 select HAVE_KERNEL_GZIP
>> 1910 select HAVE_KERNEL_BZIP2
>> 1911 select HAVE_KERNEL_LZ4
>> 1912 select HAVE_KERNEL_LZMA
>> 1913 select HAVE_KERNEL_LZO
>> 1914 select HAVE_KERNEL_XZ
>> 1915
>> 1916 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1917 bool
>> 1918 select SYS_SUPPORTS_ZBOOT
>> 1919
>> 1920 config SYS_SUPPORTS_ZBOOT_UART_PROM
>> 1921 bool
>> 1922 select SYS_SUPPORTS_ZBOOT
>> 1923
>> 1924 config CPU_LOONGSON2EF
>> 1925 bool
>> 1926 select CPU_SUPPORTS_32BIT_KERNEL
>> 1927 select CPU_SUPPORTS_64BIT_KERNEL
>> 1928 select CPU_SUPPORTS_HIGHMEM
>> 1929 select CPU_SUPPORTS_HUGEPAGES
>> 1930 select ARCH_HAS_PHYS_TO_DMA
>> 1931 select CPU_HAS_LOAD_STORE_LR
>> 1932
>> 1933 config CPU_LOONGSON32
>> 1934 bool
>> 1935 select CPU_MIPS32
>> 1936 select CPU_MIPSR2
>> 1937 select CPU_HAS_PREFETCH
>> 1938 select CPU_HAS_LOAD_STORE_LR
>> 1939 select CPU_SUPPORTS_32BIT_KERNEL
>> 1940 select CPU_SUPPORTS_HIGHMEM
>> 1941 select CPU_SUPPORTS_CPUFREQ
>> 1942
>> 1943 config CPU_BMIPS32_3300
>> 1944 select SMP_UP if SMP
>> 1945 bool
>> 1946
>> 1947 config CPU_BMIPS4350
>> 1948 bool
>> 1949 select SYS_SUPPORTS_SMP
>> 1950 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1951
>> 1952 config CPU_BMIPS4380
>> 1953 bool
>> 1954 select MIPS_L1_CACHE_SHIFT_6
>> 1955 select SYS_SUPPORTS_SMP
>> 1956 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1957 select CPU_HAS_RIXI
>> 1958
>> 1959 config CPU_BMIPS5000
>> 1960 bool
>> 1961 select MIPS_CPU_SCACHE
>> 1962 select MIPS_L1_CACHE_SHIFT_7
>> 1963 select SYS_SUPPORTS_SMP
>> 1964 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1965 select CPU_HAS_RIXI
>> 1966
>> 1967 config SYS_HAS_CPU_LOONGSON64
>> 1968 bool
>> 1969 select CPU_SUPPORTS_CPUFREQ
>> 1970 select CPU_HAS_RIXI
>> 1971
>> 1972 config SYS_HAS_CPU_LOONGSON2E
>> 1973 bool
>> 1974
>> 1975 config SYS_HAS_CPU_LOONGSON2F
>> 1976 bool
>> 1977 select CPU_SUPPORTS_CPUFREQ
>> 1978 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1979
>> 1980 config SYS_HAS_CPU_LOONGSON1B
>> 1981 bool
>> 1982
>> 1983 config SYS_HAS_CPU_LOONGSON1C
>> 1984 bool
>> 1985
>> 1986 config SYS_HAS_CPU_MIPS32_R1
>> 1987 bool
>> 1988
>> 1989 config SYS_HAS_CPU_MIPS32_R2
>> 1990 bool
>> 1991
>> 1992 config SYS_HAS_CPU_MIPS32_R3_5
>> 1993 bool
>> 1994
>> 1995 config SYS_HAS_CPU_MIPS32_R5
>> 1996 bool
>> 1997 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1998
>> 1999 config SYS_HAS_CPU_MIPS32_R6
>> 2000 bool
>> 2001 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 2002
>> 2003 config SYS_HAS_CPU_MIPS64_R1
>> 2004 bool
>> 2005
>> 2006 config SYS_HAS_CPU_MIPS64_R2
>> 2007 bool
>> 2008
>> 2009 config SYS_HAS_CPU_MIPS64_R6
>> 2010 bool
>> 2011 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 2012
>> 2013 config SYS_HAS_CPU_R3000
>> 2014 bool
>> 2015
>> 2016 config SYS_HAS_CPU_TX39XX
>> 2017 bool
>> 2018
>> 2019 config SYS_HAS_CPU_VR41XX
>> 2020 bool
>> 2021
>> 2022 config SYS_HAS_CPU_R4X00
>> 2023 bool
>> 2024
>> 2025 config SYS_HAS_CPU_TX49XX
>> 2026 bool
>> 2027
>> 2028 config SYS_HAS_CPU_R5000
>> 2029 bool
>> 2030
>> 2031 config SYS_HAS_CPU_R5500
>> 2032 bool
>> 2033
>> 2034 config SYS_HAS_CPU_NEVADA
>> 2035 bool
>> 2036
>> 2037 config SYS_HAS_CPU_R10000
>> 2038 bool
>> 2039 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 2040
>> 2041 config SYS_HAS_CPU_RM7000
>> 2042 bool
508 2043
509 config RISCV_ALTERNATIVE !! 2044 config SYS_HAS_CPU_SB1
510 bool 2045 bool
511 depends on !XIP_KERNEL !! 2046
>> 2047 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 2048 bool
>> 2049
>> 2050 config SYS_HAS_CPU_BMIPS
>> 2051 bool
>> 2052
>> 2053 config SYS_HAS_CPU_BMIPS32_3300
>> 2054 bool
>> 2055 select SYS_HAS_CPU_BMIPS
>> 2056
>> 2057 config SYS_HAS_CPU_BMIPS4350
>> 2058 bool
>> 2059 select SYS_HAS_CPU_BMIPS
>> 2060
>> 2061 config SYS_HAS_CPU_BMIPS4380
>> 2062 bool
>> 2063 select SYS_HAS_CPU_BMIPS
>> 2064
>> 2065 config SYS_HAS_CPU_BMIPS5000
>> 2066 bool
>> 2067 select SYS_HAS_CPU_BMIPS
>> 2068 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 2069
>> 2070 config SYS_HAS_CPU_XLR
>> 2071 bool
>> 2072
>> 2073 config SYS_HAS_CPU_XLP
>> 2074 bool
>> 2075
>> 2076 #
>> 2077 # CPU may reorder R->R, R->W, W->R, W->W
>> 2078 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 2079 #
>> 2080 config WEAK_ORDERING
>> 2081 bool
>> 2082
>> 2083 #
>> 2084 # CPU may reorder reads and writes beyond LL/SC
>> 2085 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 2086 #
>> 2087 config WEAK_REORDERING_BEYOND_LLSC
>> 2088 bool
>> 2089 endmenu
>> 2090
>> 2091 #
>> 2092 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2093 #
>> 2094 config CPU_MIPS32
>> 2095 bool
>> 2096 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 2097
>> 2098 config CPU_MIPS64
>> 2099 bool
>> 2100 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
>> 2101
>> 2102 #
>> 2103 # These indicate the revision of the architecture
>> 2104 #
>> 2105 config CPU_MIPSR1
>> 2106 bool
>> 2107 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2108
>> 2109 config CPU_MIPSR2
>> 2110 bool
>> 2111 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2112 select CPU_HAS_RIXI
>> 2113 select MIPS_SPRAM
>> 2114
>> 2115 config CPU_MIPSR6
>> 2116 bool
>> 2117 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2118 select CPU_HAS_RIXI
>> 2119 select HAVE_ARCH_BITREVERSE
>> 2120 select MIPS_ASID_BITS_VARIABLE
>> 2121 select MIPS_CRC_SUPPORT
>> 2122 select MIPS_SPRAM
>> 2123
>> 2124 config TARGET_ISA_REV
>> 2125 int
>> 2126 default 1 if CPU_MIPSR1
>> 2127 default 2 if CPU_MIPSR2
>> 2128 default 6 if CPU_MIPSR6
>> 2129 default 0
512 help 2130 help
513 This Kconfig allows the kernel to au !! 2131 Reflects the ISA revision being targeted by the kernel build. This
514 erratum or cpufeature required by th !! 2132 is effectively the Kconfig equivalent of MIPS_ISA_REV.
515 time. The code patching overhead is !! 2133
516 once at boot and once on each module !! 2134 config EVA
>> 2135 bool
>> 2136
>> 2137 config XPA
>> 2138 bool
517 2139
518 config RISCV_ALTERNATIVE_EARLY !! 2140 config SYS_SUPPORTS_32BIT_KERNEL
>> 2141 bool
>> 2142 config SYS_SUPPORTS_64BIT_KERNEL
>> 2143 bool
>> 2144 config CPU_SUPPORTS_32BIT_KERNEL
>> 2145 bool
>> 2146 config CPU_SUPPORTS_64BIT_KERNEL
>> 2147 bool
>> 2148 config CPU_SUPPORTS_CPUFREQ
>> 2149 bool
>> 2150 config CPU_SUPPORTS_ADDRWINCFG
>> 2151 bool
>> 2152 config CPU_SUPPORTS_HUGEPAGES
>> 2153 bool
>> 2154 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
>> 2155 config MIPS_PGD_C0_CONTEXT
>> 2156 bool
>> 2157 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
>> 2158
>> 2159 #
>> 2160 # Set to y for ptrace access to watch registers.
>> 2161 #
>> 2162 config HARDWARE_WATCHPOINTS
519 bool 2163 bool
520 depends on RISCV_ALTERNATIVE !! 2164 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2165
>> 2166 menu "Kernel type"
>> 2167
>> 2168 choice
>> 2169 prompt "Kernel code model"
521 help 2170 help
522 Allows early patching of the kernel !! 2171 You should only select this option if you have a workload that
>> 2172 actually benefits from 64-bit processing or if your machine has
>> 2173 large memory. You will only be presented a single option in this
>> 2174 menu if your system does not support both 32-bit and 64-bit kernels.
523 2175
524 config RISCV_ISA_C !! 2176 config 32BIT
525 bool "Emit compressed instructions whe !! 2177 bool "32-bit kernel"
526 default y !! 2178 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2179 select TRAD_SIGNALS
527 help 2180 help
528 Adds "C" to the ISA subsets that the !! 2181 Select this option if you want to build a 32-bit kernel.
529 when building Linux, which results i !! 2182
530 Linux binary. !! 2183 config 64BIT
531 !! 2184 bool "64-bit kernel"
532 If you don't know what to do here, s !! 2185 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
533 <<
534 config RISCV_ISA_SVNAPOT <<
535 bool "Svnapot extension support for su <<
536 depends on 64BIT && MMU <<
537 depends on RISCV_ALTERNATIVE <<
538 default y <<
539 help 2186 help
540 Allow kernel to detect the Svnapot I !! 2187 Select this option if you want to build a 64-bit kernel.
541 time and enable its usage. <<
542 2188
543 The Svnapot extension is used to mar !! 2189 endchoice
544 of contiguous virtual-to-physical tr !! 2190
545 aligned power-of-2 (NAPOT) granulari !! 2191 config KVM_GUEST
546 size. When HUGETLBFS is also selecte !! 2192 bool "KVM Guest Kernel"
547 allocates some memory for each NAPOT !! 2193 depends on BROKEN_ON_SMP
548 When optimizing for low memory consu !! 2194 help
549 the Svnapot extension, it may be bet !! 2195 Select this option if building a guest kernel for KVM (Trap & Emulate)
550 !! 2196 mode.
551 If you don't know what to do here, s !! 2197
552 !! 2198 config KVM_GUEST_TIMER_FREQ
553 config RISCV_ISA_SVPBMT !! 2199 int "Count/Compare Timer Frequency (MHz)"
554 bool "Svpbmt extension support for sup !! 2200 depends on KVM_GUEST
555 depends on 64BIT && MMU !! 2201 default 100
556 depends on RISCV_ALTERNATIVE !! 2202 help
557 default y !! 2203 Set this to non-zero if building a guest kernel for KVM to skip RTC
>> 2204 emulation when determining guest CPU Frequency. Instead, the guest's
>> 2205 timer frequency is specified directly.
>> 2206
>> 2207 config MIPS_VA_BITS_48
>> 2208 bool "48 bits virtual memory"
>> 2209 depends on 64BIT
558 help 2210 help
559 Adds support to dynamically detect !! 2211 Support a maximum at least 48 bits of application virtual
560 ISA-extension (Supervisor-mode: pag !! 2212 memory. Default is 40 bits or less, depending on the CPU.
561 enable its usage. !! 2213 For page sizes 16k and above, this option results in a small
>> 2214 memory overhead for page tables. For 4k page size, a fourth
>> 2215 level of page tables is added which imposes both a memory
>> 2216 overhead as well as slower TLB fault handling.
562 2217
563 The memory type for a page contains !! 2218 If unsure, say N.
564 that indicate the cacheability, ide <<
565 properties for access to that page. <<
566 2219
567 The Svpbmt extension is only availa !! 2220 choice
>> 2221 prompt "Kernel page size"
>> 2222 default PAGE_SIZE_4KB
568 2223
569 If you don't know what to do here, !! 2224 config PAGE_SIZE_4KB
>> 2225 bool "4kB"
>> 2226 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
>> 2227 help
>> 2228 This option select the standard 4kB Linux page size. On some
>> 2229 R3000-family processors this is the only available page size. Using
>> 2230 4kB page size will minimize memory consumption and is therefore
>> 2231 recommended for low memory systems.
>> 2232
>> 2233 config PAGE_SIZE_8KB
>> 2234 bool "8kB"
>> 2235 depends on CPU_CAVIUM_OCTEON
>> 2236 depends on !MIPS_VA_BITS_48
>> 2237 help
>> 2238 Using 8kB page size will result in higher performance kernel at
>> 2239 the price of higher memory consumption. This option is available
>> 2240 only on cnMIPS processors. Note that you will need a suitable Linux
>> 2241 distribution to support this.
>> 2242
>> 2243 config PAGE_SIZE_16KB
>> 2244 bool "16kB"
>> 2245 depends on !CPU_R3000 && !CPU_TX39XX
>> 2246 help
>> 2247 Using 16kB page size will result in higher performance kernel at
>> 2248 the price of higher memory consumption. This option is available on
>> 2249 all non-R3000 family processors. Note that you will need a suitable
>> 2250 Linux distribution to support this.
>> 2251
>> 2252 config PAGE_SIZE_32KB
>> 2253 bool "32kB"
>> 2254 depends on CPU_CAVIUM_OCTEON
>> 2255 depends on !MIPS_VA_BITS_48
>> 2256 help
>> 2257 Using 32kB page size will result in higher performance kernel at
>> 2258 the price of higher memory consumption. This option is available
>> 2259 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2260 distribution to support this.
>> 2261
>> 2262 config PAGE_SIZE_64KB
>> 2263 bool "64kB"
>> 2264 depends on !CPU_R3000 && !CPU_TX39XX
>> 2265 help
>> 2266 Using 64kB page size will result in higher performance kernel at
>> 2267 the price of higher memory consumption. This option is available on
>> 2268 all non-R3000 family processor. Not that at the time of this
>> 2269 writing this option is still high experimental.
570 2270
571 config TOOLCHAIN_HAS_V !! 2271 endchoice
>> 2272
>> 2273 config FORCE_MAX_ZONEORDER
>> 2274 int "Maximum zone order"
>> 2275 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2276 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2277 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2278 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2279 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2280 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2281 range 11 64
>> 2282 default "11"
>> 2283 help
>> 2284 The kernel memory allocator divides physically contiguous memory
>> 2285 blocks into "zones", where each zone is a power of two number of
>> 2286 pages. This option selects the largest power of two that the kernel
>> 2287 keeps in the memory allocator. If you need to allocate very large
>> 2288 blocks of physically contiguous memory, then you may need to
>> 2289 increase this value.
>> 2290
>> 2291 This config option is actually maximum order plus one. For example,
>> 2292 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2293
>> 2294 The page size is not necessarily 4KB. Keep this in mind
>> 2295 when choosing a value for this option.
>> 2296
>> 2297 config BOARD_SCACHE
572 bool 2298 bool
573 default y <<
574 depends on !64BIT || $(cc-option,-mabi <<
575 depends on !32BIT || $(cc-option,-mabi <<
576 depends on LLD_VERSION >= 140000 || LD <<
577 depends on AS_HAS_OPTION_ARCH <<
578 <<
579 config RISCV_ISA_V <<
580 bool "VECTOR extension support" <<
581 depends on TOOLCHAIN_HAS_V <<
582 depends on FPU <<
583 select DYNAMIC_SIGFRAME <<
584 default y <<
585 help <<
586 Say N here if you want to disable al <<
587 in the kernel. <<
588 2299
589 If you don't know what to do here, s !! 2300 config IP22_CPU_SCACHE
>> 2301 bool
>> 2302 select BOARD_SCACHE
590 2303
591 config RISCV_ISA_V_DEFAULT_ENABLE !! 2304 #
592 bool "Enable userspace Vector by defau !! 2305 # Support for a MIPS32 / MIPS64 style S-caches
593 depends on RISCV_ISA_V !! 2306 #
594 default y !! 2307 config MIPS_CPU_SCACHE
>> 2308 bool
>> 2309 select BOARD_SCACHE
>> 2310
>> 2311 config R5000_CPU_SCACHE
>> 2312 bool
>> 2313 select BOARD_SCACHE
>> 2314
>> 2315 config RM7000_CPU_SCACHE
>> 2316 bool
>> 2317 select BOARD_SCACHE
>> 2318
>> 2319 config SIBYTE_DMA_PAGEOPS
>> 2320 bool "Use DMA to clear/copy pages"
>> 2321 depends on CPU_SB1
595 help 2322 help
596 Say Y here if you want to enable Vec !! 2323 Instead of using the CPU to zero and copy pages, use a Data Mover
597 Otherwise, userspace has to make exp !! 2324 channel. These DMA channels are otherwise unused by the standard
598 Vector, or enable it via the sysctl !! 2325 SiByte Linux port. Seems to give a small performance benefit.
599 !! 2326
600 If you don't know what to do here, s !! 2327 config CPU_HAS_PREFETCH
601 !! 2328 bool
602 config RISCV_ISA_V_UCOPY_THRESHOLD !! 2329
603 int "Threshold size for vectorized use !! 2330 config CPU_GENERIC_DUMP_TLB
604 depends on RISCV_ISA_V !! 2331 bool
605 default 768 !! 2332 default y if !(CPU_R3000 || CPU_TX39XX)
606 help !! 2333
607 Prefer using vectorized copy_to_user !! 2334 config MIPS_FP_SUPPORT
608 workload size exceeds this value. !! 2335 bool "Floating Point support" if EXPERT
609 <<
610 config RISCV_ISA_V_PREEMPTIVE <<
611 bool "Run kernel-mode Vector with kern <<
612 depends on PREEMPTION <<
613 depends on RISCV_ISA_V <<
614 default y 2336 default y
615 help 2337 help
616 Usually, in-kernel SIMD routines are !! 2338 Select y to include support for floating point in the kernel
617 Functions which envoke long running !! 2339 including initialization of FPU hardware, FP context save & restore
618 vector unit to prevent blocking othe !! 2340 and emulation of an FPU where necessary. Without this support any
619 !! 2341 userland program attempting to use floating point instructions will
620 This config allows kernel to run SIM !! 2342 receive a SIGILL.
621 preemption. Enabling this config wil !! 2343
622 consumption due to the allocation of !! 2344 If you know that your userland will not attempt to use floating point
623 !! 2345 instructions then you can say n here to shrink the kernel a little.
624 config RISCV_ISA_ZAWRS !! 2346
625 bool "Zawrs extension support for more !! 2347 If unsure, say y.
626 depends on RISCV_ALTERNATIVE !! 2348
>> 2349 config CPU_R2300_FPU
>> 2350 bool
>> 2351 depends on MIPS_FP_SUPPORT
>> 2352 default y if CPU_R3000 || CPU_TX39XX
>> 2353
>> 2354 config CPU_R3K_TLB
>> 2355 bool
>> 2356
>> 2357 config CPU_R4K_FPU
>> 2358 bool
>> 2359 depends on MIPS_FP_SUPPORT
>> 2360 default y if !CPU_R2300_FPU
>> 2361
>> 2362 config CPU_R4K_CACHE_TLB
>> 2363 bool
>> 2364 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
>> 2365
>> 2366 config MIPS_MT_SMP
>> 2367 bool "MIPS MT SMP support (1 TC on each available VPE)"
627 default y 2368 default y
>> 2369 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2370 select CPU_MIPSR2_IRQ_VI
>> 2371 select CPU_MIPSR2_IRQ_EI
>> 2372 select SYNC_R4K
>> 2373 select MIPS_MT
>> 2374 select SMP
>> 2375 select SMP_UP
>> 2376 select SYS_SUPPORTS_SMP
>> 2377 select SYS_SUPPORTS_SCHED_SMT
>> 2378 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2379 help
>> 2380 This is a kernel model which is known as SMVP. This is supported
>> 2381 on cores with the MT ASE and uses the available VPEs to implement
>> 2382 virtual processors which supports SMP. This is equivalent to the
>> 2383 Intel Hyperthreading feature. For further information go to
>> 2384 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2385
>> 2386 config MIPS_MT
>> 2387 bool
>> 2388
>> 2389 config SCHED_SMT
>> 2390 bool "SMT (multithreading) scheduler support"
>> 2391 depends on SYS_SUPPORTS_SCHED_SMT
>> 2392 default n
628 help 2393 help
629 The Zawrs extension defines instruct !! 2394 SMT scheduler support improves the CPU scheduler's decision making
630 which allow a hart to enter a low-po !! 2395 when dealing with MIPS MT enabled cores at a cost of slightly
631 hypervisor while waiting on a store !! 2396 increased overhead in some places. If unsure say N here.
632 use of these instructions in the ker <<
633 detected at boot. <<
634 2397
635 If you don't know what to do here, s !! 2398 config SYS_SUPPORTS_SCHED_SMT
>> 2399 bool
636 2400
637 config TOOLCHAIN_HAS_ZBB !! 2401 config SYS_SUPPORTS_MULTITHREADING
638 bool 2402 bool
>> 2403
>> 2404 config MIPS_MT_FPAFF
>> 2405 bool "Dynamic FPU affinity for FP-intensive threads"
639 default y 2406 default y
640 depends on !64BIT || $(cc-option,-mabi !! 2407 depends on MIPS_MT_SMP
641 depends on !32BIT || $(cc-option,-mabi <<
642 depends on LLD_VERSION >= 150000 || LD <<
643 depends on AS_HAS_OPTION_ARCH <<
644 <<
645 # This symbol indicates that the toolchain sup <<
646 # extensions, including Zvk*, Zvbb, and Zvbc. <<
647 # binutils added all except Zvkb, then added Z <<
648 config TOOLCHAIN_HAS_VECTOR_CRYPTO <<
649 def_bool $(as-instr, .option arch$(com <<
650 depends on AS_HAS_OPTION_ARCH <<
651 2408
652 config RISCV_ISA_ZBA !! 2409 config MIPSR2_TO_R6_EMULATOR
653 bool "Zba extension support for bit ma !! 2410 bool "MIPS R2-to-R6 emulator"
>> 2411 depends on CPU_MIPSR6
>> 2412 depends on MIPS_FP_SUPPORT
654 default y 2413 default y
655 help 2414 help
656 Add support for enabling optimisati !! 2415 Choose this option if you want to run non-R6 MIPS userland code.
657 extension is detected at boot. !! 2416 Even if you say 'Y' here, the emulator will still be disabled by
>> 2417 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2418 The only reason this is a build-time option is to save ~14K from the
>> 2419 final kernel image.
658 2420
659 The Zba extension provides instruct !! 2421 config SYS_SUPPORTS_VPE_LOADER
660 of addresses that index into arrays !! 2422 bool
>> 2423 depends on SYS_SUPPORTS_MULTITHREADING
>> 2424 help
>> 2425 Indicates that the platform supports the VPE loader, and provides
>> 2426 physical_memsize.
661 2427
662 If you don't know what to do here, !! 2428 config MIPS_VPE_LOADER
>> 2429 bool "VPE loader support."
>> 2430 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2431 select CPU_MIPSR2_IRQ_VI
>> 2432 select CPU_MIPSR2_IRQ_EI
>> 2433 select MIPS_MT
>> 2434 help
>> 2435 Includes a loader for loading an elf relocatable object
>> 2436 onto another VPE and running it.
663 2437
664 config RISCV_ISA_ZBB !! 2438 config MIPS_VPE_LOADER_CMP
665 bool "Zbb extension support for bit ma !! 2439 bool
666 depends on TOOLCHAIN_HAS_ZBB !! 2440 default "y"
667 depends on RISCV_ALTERNATIVE !! 2441 depends on MIPS_VPE_LOADER && MIPS_CMP
>> 2442
>> 2443 config MIPS_VPE_LOADER_MT
>> 2444 bool
>> 2445 default "y"
>> 2446 depends on MIPS_VPE_LOADER && !MIPS_CMP
>> 2447
>> 2448 config MIPS_VPE_LOADER_TOM
>> 2449 bool "Load VPE program into memory hidden from linux"
>> 2450 depends on MIPS_VPE_LOADER
668 default y 2451 default y
669 help 2452 help
670 Adds support to dynamically detect !! 2453 The loader can use memory that is present but has been hidden from
671 extension (basic bit manipulation) !! 2454 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2455 you to ensure the amount you put in the option and the space your
>> 2456 program requires is less or equal to the amount physically present.
>> 2457
>> 2458 config MIPS_VPE_APSP_API
>> 2459 bool "Enable support for AP/SP API (RTLX)"
>> 2460 depends on MIPS_VPE_LOADER
>> 2461
>> 2462 config MIPS_VPE_APSP_API_CMP
>> 2463 bool
>> 2464 default "y"
>> 2465 depends on MIPS_VPE_APSP_API && MIPS_CMP
>> 2466
>> 2467 config MIPS_VPE_APSP_API_MT
>> 2468 bool
>> 2469 default "y"
>> 2470 depends on MIPS_VPE_APSP_API && !MIPS_CMP
>> 2471
>> 2472 config MIPS_CMP
>> 2473 bool "MIPS CMP framework support (DEPRECATED)"
>> 2474 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2475 select SMP
>> 2476 select SYNC_R4K
>> 2477 select SYS_SUPPORTS_SMP
>> 2478 select WEAK_ORDERING
>> 2479 default n
>> 2480 help
>> 2481 Select this if you are using a bootloader which implements the "CMP
>> 2482 framework" protocol (ie. YAMON) and want your kernel to make use of
>> 2483 its ability to start secondary CPUs.
>> 2484
>> 2485 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2486 instead of this.
>> 2487
>> 2488 config MIPS_CPS
>> 2489 bool "MIPS Coherent Processing System support"
>> 2490 depends on SYS_SUPPORTS_MIPS_CPS
>> 2491 select MIPS_CM
>> 2492 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2493 select SMP
>> 2494 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2495 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2496 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2497 select SYS_SUPPORTS_SMP
>> 2498 select WEAK_ORDERING
>> 2499 help
>> 2500 Select this if you wish to run an SMP kernel across multiple cores
>> 2501 within a MIPS Coherent Processing System. When this option is
>> 2502 enabled the kernel will probe for other cores and boot them with
>> 2503 no external assistance. It is safe to enable this when hardware
>> 2504 support is unavailable.
672 2505
673 The Zbb extension provides instruct !! 2506 config MIPS_CPS_PM
674 of bit-specific operations (count b !! 2507 depends on MIPS_CPS
675 bitrotation, etc). !! 2508 bool
676 2509
677 If you don't know what to do here, !! 2510 config MIPS_CM
>> 2511 bool
>> 2512 select MIPS_CPC
678 2513
679 config TOOLCHAIN_HAS_ZBC !! 2514 config MIPS_CPC
680 bool 2515 bool
>> 2516
>> 2517 config SB1_PASS_2_WORKAROUNDS
>> 2518 bool
>> 2519 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
681 default y 2520 default y
682 depends on !64BIT || $(cc-option,-mabi !! 2521
683 depends on !32BIT || $(cc-option,-mabi !! 2522 config SB1_PASS_2_1_WORKAROUNDS
684 depends on LLD_VERSION >= 150000 || LD !! 2523 bool
685 depends on AS_HAS_OPTION_ARCH !! 2524 depends on CPU_SB1 && CPU_SB1_PASS_2
686 <<
687 config RISCV_ISA_ZBC <<
688 bool "Zbc extension support for carry- <<
689 depends on TOOLCHAIN_HAS_ZBC <<
690 depends on MMU <<
691 depends on RISCV_ALTERNATIVE <<
692 default y 2525 default y
>> 2526
>> 2527 choice
>> 2528 prompt "SmartMIPS or microMIPS ASE support"
>> 2529
>> 2530 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2531 bool "None"
693 help 2532 help
694 Adds support to dynamically detect !! 2533 Select this if you want neither microMIPS nor SmartMIPS support
695 extension (carry-less multiplicatio <<
696 2534
697 The Zbc extension could accelerate !! 2535 config CPU_HAS_SMARTMIPS
698 calculations. !! 2536 depends on SYS_SUPPORTS_SMARTMIPS
>> 2537 bool "SmartMIPS"
>> 2538 help
>> 2539 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2540 increased security at both hardware and software level for
>> 2541 smartcards. Enabling this option will allow proper use of the
>> 2542 SmartMIPS instructions by Linux applications. However a kernel with
>> 2543 this option will not work on a MIPS core without SmartMIPS core. If
>> 2544 you don't know you probably don't have SmartMIPS and should say N
>> 2545 here.
699 2546
700 If you don't know what to do here, !! 2547 config CPU_MICROMIPS
>> 2548 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2549 bool "microMIPS"
>> 2550 help
>> 2551 When this option is enabled the kernel will be built using the
>> 2552 microMIPS ISA
701 2553
702 config RISCV_ISA_ZICBOM !! 2554 endchoice
703 bool "Zicbom extension support for non !! 2555
704 depends on MMU !! 2556 config CPU_HAS_MSA
705 depends on RISCV_ALTERNATIVE !! 2557 bool "Support for the MIPS SIMD Architecture"
706 default y !! 2558 depends on CPU_SUPPORTS_MSA
707 select RISCV_DMA_NONCOHERENT !! 2559 depends on MIPS_FP_SUPPORT
708 select DMA_DIRECT_REMAP !! 2560 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2561 help
>> 2562 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2563 and a set of SIMD instructions to operate on them. When this option
>> 2564 is enabled the kernel will support allocating & switching MSA
>> 2565 vector register contexts. If you know that your kernel will only be
>> 2566 running on CPUs which do not support MSA or that your userland will
>> 2567 not be making use of it then you may wish to say N here to reduce
>> 2568 the size & complexity of your kernel.
>> 2569
>> 2570 If unsure, say Y.
>> 2571
>> 2572 config CPU_HAS_WB
>> 2573 bool
>> 2574
>> 2575 config XKS01
>> 2576 bool
>> 2577
>> 2578 config CPU_HAS_RIXI
>> 2579 bool
>> 2580
>> 2581 config CPU_HAS_LOAD_STORE_LR
>> 2582 bool
709 help 2583 help
710 Adds support to dynamically detect !! 2584 CPU has support for unaligned load and store instructions:
711 extension (Cache Block Management O !! 2585 LWL, LWR, SWL, SWR (Load/store word left/right).
712 usage. !! 2586 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems).
713 2587
714 The Zicbom extension can be used to !! 2588 #
715 non-coherent DMA support on devices !! 2589 # Vectored interrupt mode is an R2 feature
>> 2590 #
>> 2591 config CPU_MIPSR2_IRQ_VI
>> 2592 bool
716 2593
717 If you don't know what to do here, !! 2594 #
>> 2595 # Extended interrupt mode is an R2 feature
>> 2596 #
>> 2597 config CPU_MIPSR2_IRQ_EI
>> 2598 bool
718 2599
719 config RISCV_ISA_ZICBOZ !! 2600 config CPU_HAS_SYNC
720 bool "Zicboz extension support for fas !! 2601 bool
721 depends on RISCV_ALTERNATIVE !! 2602 depends on !CPU_R3000
722 default y 2603 default y
723 help <<
724 Enable the use of the Zicboz extens <<
725 when available. <<
726 2604
727 The Zicboz extension is used for fa !! 2605 #
>> 2606 # CPU non-features
>> 2607 #
>> 2608 config CPU_DADDI_WORKAROUNDS
>> 2609 bool
728 2610
729 If you don't know what to do here, !! 2611 config CPU_R4000_WORKAROUNDS
>> 2612 bool
>> 2613 select CPU_R4400_WORKAROUNDS
730 2614
731 config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI !! 2615 config CPU_R4400_WORKAROUNDS
732 def_bool y !! 2616 bool
733 # https://sourceware.org/git/?p=binuti !! 2617
734 # https://gcc.gnu.org/git/?p=gcc.git;a !! 2618 config CPU_R4X00_BUGS64
735 depends on AS_IS_GNU && AS_VERSION >= !! 2619 bool
736 help !! 2620 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
737 Binutils-2.38 and GCC-12.1.0 bumped !! 2621
738 20191213 version, which moves some i !! 2622 config MIPS_ASID_SHIFT
739 the Zicsr and Zifencei extensions. T !! 2623 int
740 Zicsr and Zifencei when binutils >= !! 2624 default 6 if CPU_R3000 || CPU_TX39XX
741 and Zifencei are supported in binuti !! 2625 default 0
742 To make life easier, and avoid forci !! 2626
743 newer ISA spec to version 2.2, relax !! 2627 config MIPS_ASID_BITS
744 For clang < 17 or GCC < 11.3.0, for !! 2628 int
745 special treatment, this is dealt wit !! 2629 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2630 default 6 if CPU_R3000 || CPU_TX39XX
>> 2631 default 8
>> 2632
>> 2633 config MIPS_ASID_BITS_VARIABLE
>> 2634 bool
>> 2635
>> 2636 config MIPS_CRC_SUPPORT
>> 2637 bool
>> 2638
>> 2639 #
>> 2640 # - Highmem only makes sense for the 32-bit kernel.
>> 2641 # - The current highmem code will only work properly on physically indexed
>> 2642 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2643 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2644 # moment we protect the user and offer the highmem option only on machines
>> 2645 # where it's known to be safe. This will not offer highmem on a few systems
>> 2646 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2647 # indexed CPUs but we're playing safe.
>> 2648 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2649 # know they might have memory configurations that could make use of highmem
>> 2650 # support.
>> 2651 #
>> 2652 config HIGHMEM
>> 2653 bool "High Memory Support"
>> 2654 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2655
>> 2656 config CPU_SUPPORTS_HIGHMEM
>> 2657 bool
>> 2658
>> 2659 config SYS_SUPPORTS_HIGHMEM
>> 2660 bool
746 2661
747 config TOOLCHAIN_NEEDS_OLD_ISA_SPEC !! 2662 config SYS_SUPPORTS_SMARTMIPS
>> 2663 bool
>> 2664
>> 2665 config SYS_SUPPORTS_MICROMIPS
>> 2666 bool
>> 2667
>> 2668 config SYS_SUPPORTS_MIPS16
>> 2669 bool
>> 2670 help
>> 2671 This option must be set if a kernel might be executed on a MIPS16-
>> 2672 enabled CPU even if MIPS16 is not actually being used. In other
>> 2673 words, it makes the kernel MIPS16-tolerant.
>> 2674
>> 2675 config CPU_SUPPORTS_MSA
>> 2676 bool
>> 2677
>> 2678 config ARCH_FLATMEM_ENABLE
748 def_bool y 2679 def_bool y
749 depends on TOOLCHAIN_NEEDS_EXPLICIT_ZI !! 2680 depends on !NUMA && !CPU_LOONGSON2EF
750 # https://github.com/llvm/llvm-project <<
751 # https://gcc.gnu.org/git/?p=gcc.git;a <<
752 depends on (CC_IS_CLANG && CLANG_VERSI <<
753 help <<
754 Certain versions of clang and GCC do <<
755 -march. This option causes an older <<
756 versions of clang and GCC to be pass <<
757 as passing zicsr and zifencei to -ma <<
758 2681
759 config FPU !! 2682 config ARCH_SPARSEMEM_ENABLE
760 bool "FPU support" !! 2683 bool
761 default y !! 2684 select SPARSEMEM_STATIC if !SGI_IP27
>> 2685
>> 2686 config NUMA
>> 2687 bool "NUMA Support"
>> 2688 depends on SYS_SUPPORTS_NUMA
762 help 2689 help
763 Say N here if you want to disable al !! 2690 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
764 in the kernel. !! 2691 Access). This option improves performance on systems with more
>> 2692 than two nodes; on two node systems it is generally better to
>> 2693 leave it disabled; on single node systems disable this option
>> 2694 disabled.
765 2695
766 If you don't know what to do here, s !! 2696 config SYS_SUPPORTS_NUMA
>> 2697 bool
767 2698
768 config IRQ_STACKS !! 2699 config RELOCATABLE
769 bool "Independent irq & softirq stacks !! 2700 bool "Relocatable kernel"
770 default y !! 2701 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
771 select HAVE_IRQ_EXIT_ON_IRQ_STACK <<
772 select HAVE_SOFTIRQ_ON_OWN_STACK <<
773 help 2702 help
774 Add independent irq & softirq stacks !! 2703 This builds a kernel image that retains relocation information
775 overflows. We may save some memory f !! 2704 so it can be loaded someplace besides the default 1MB.
>> 2705 The relocations make the kernel binary about 15% larger,
>> 2706 but are discarded at runtime
>> 2707
>> 2708 config RELOCATION_TABLE_SIZE
>> 2709 hex "Relocation table size"
>> 2710 depends on RELOCATABLE
>> 2711 range 0x0 0x01000000
>> 2712 default "0x00100000"
>> 2713 ---help---
>> 2714 A table of relocation data will be appended to the kernel binary
>> 2715 and parsed at boot to fix up the relocated kernel.
776 2716
777 config THREAD_SIZE_ORDER !! 2717 This option allows the amount of space reserved for the table to be
778 int "Kernel stack size (in power-of-tw !! 2718 adjusted, although the default of 1Mb should be ok in most cases.
779 range 0 4 !! 2719
780 default 1 if 32BIT !! 2720 The build will fail and a valid size suggested if this is too small.
781 default 2 !! 2721
>> 2722 If unsure, leave at the default value.
>> 2723
>> 2724 config RANDOMIZE_BASE
>> 2725 bool "Randomize the address of the kernel image"
>> 2726 depends on RELOCATABLE
>> 2727 ---help---
>> 2728 Randomizes the physical and virtual address at which the
>> 2729 kernel image is loaded, as a security feature that
>> 2730 deters exploit attempts relying on knowledge of the location
>> 2731 of kernel internals.
>> 2732
>> 2733 Entropy is generated using any coprocessor 0 registers available.
>> 2734
>> 2735 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2736
>> 2737 If unsure, say N.
>> 2738
>> 2739 config RANDOMIZE_BASE_MAX_OFFSET
>> 2740 hex "Maximum kASLR offset" if EXPERT
>> 2741 depends on RANDOMIZE_BASE
>> 2742 range 0x0 0x40000000 if EVA || 64BIT
>> 2743 range 0x0 0x08000000
>> 2744 default "0x01000000"
>> 2745 ---help---
>> 2746 When kASLR is active, this provides the maximum offset that will
>> 2747 be applied to the kernel image. It should be set according to the
>> 2748 amount of physical RAM available in the target system minus
>> 2749 PHYSICAL_START and must be a power of 2.
>> 2750
>> 2751 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2752 EVA or 64-bit. The default is 16Mb.
>> 2753
>> 2754 config NODES_SHIFT
>> 2755 int
>> 2756 default "6"
>> 2757 depends on NEED_MULTIPLE_NODES
>> 2758
>> 2759 config HW_PERF_EVENTS
>> 2760 bool "Enable hardware performance counter support for perf events"
>> 2761 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
>> 2762 default y
782 help 2763 help
783 Specify the Pages of thread stack si !! 2764 Enable hardware performance counter support for perf events. If
784 affects irq stack size, which is equ !! 2765 disabled, perf events will use software events only.
785 2766
786 config RISCV_MISALIGNED !! 2767 config SMP
787 bool !! 2768 bool "Multi-Processing support"
788 select SYSCTL_ARCH_UNALIGN_ALLOW !! 2769 depends on SYS_SUPPORTS_SMP
789 help 2770 help
790 Embed support for emulating misalign !! 2771 This enables support for systems with more than one CPU. If you have
>> 2772 a system with only one CPU, say N. If you have a system with more
>> 2773 than one CPU, say Y.
>> 2774
>> 2775 If you say N here, the kernel will run on uni- and multiprocessor
>> 2776 machines, but will use only one CPU of a multiprocessor machine. If
>> 2777 you say Y here, the kernel will run on many, but not all,
>> 2778 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2779 will run faster if you say N here.
791 2780
792 choice !! 2781 People using multiprocessor machines who say Y here should also say
793 prompt "Unaligned Accesses Support" !! 2782 Y to "Enhanced Real Time Clock Support", below.
794 default RISCV_PROBE_UNALIGNED_ACCESS !! 2783
>> 2784 See also the SMP-HOWTO available at
>> 2785 <http://www.tldp.org/docs.html#howto>.
>> 2786
>> 2787 If you don't know what to do here, say N.
>> 2788
>> 2789 config HOTPLUG_CPU
>> 2790 bool "Support for hot-pluggable CPUs"
>> 2791 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
795 help 2792 help
796 This determines the level of support !! 2793 Say Y here to allow turning CPUs off and on. CPUs can be
797 information is used by the kernel to !! 2794 controlled through /sys/devices/system/cpu.
798 exposed to user space via the hwprob !! 2795 (Note: power management support will enable this option
799 probed at boot by default. !! 2796 automatically on SMP systems. )
800 !! 2797 Say N if you want to disable CPU hotplug.
801 config RISCV_PROBE_UNALIGNED_ACCESS <<
802 bool "Probe for hardware unaligned acc <<
803 select RISCV_MISALIGNED <<
804 help <<
805 During boot, the kernel will run a s <<
806 speed of unaligned accesses. This pr <<
807 the speed of unaligned accesses on t <<
808 memory accesses trap into the kernel <<
809 system, the kernel will emulate the <<
810 UABI. <<
811 <<
812 config RISCV_EMULATED_UNALIGNED_ACCESS <<
813 bool "Emulate unaligned access where s <<
814 select RISCV_MISALIGNED <<
815 help <<
816 If unaligned memory accesses trap in <<
817 supported by the system, the kernel <<
818 accesses to preserve the UABI. When <<
819 unaligned accesses, the unaligned ac <<
820 <<
821 config RISCV_SLOW_UNALIGNED_ACCESS <<
822 bool "Assume the system supports slow <<
823 depends on NONPORTABLE <<
824 help <<
825 Assume that the system supports slow <<
826 kernel and userspace programs may no <<
827 that do not support unaligned memory <<
828 <<
829 config RISCV_EFFICIENT_UNALIGNED_ACCESS <<
830 bool "Assume the system supports fast <<
831 depends on NONPORTABLE <<
832 select DCACHE_WORD_ACCESS if MMU <<
833 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
834 help <<
835 Assume that the system supports fast <<
836 enabled, this option improves the pe <<
837 systems. However, the kernel and use <<
838 slowly, or will not be able to run a <<
839 support efficient unaligned memory a <<
840 2798
841 endchoice !! 2799 config SMP_UP
>> 2800 bool
>> 2801
>> 2802 config SYS_SUPPORTS_MIPS_CMP
>> 2803 bool
842 2804
843 source "arch/riscv/Kconfig.vendor" !! 2805 config SYS_SUPPORTS_MIPS_CPS
>> 2806 bool
844 2807
845 endmenu # "Platform type" !! 2808 config SYS_SUPPORTS_SMP
>> 2809 bool
846 2810
847 menu "Kernel features" !! 2811 config NR_CPUS_DEFAULT_4
>> 2812 bool
848 2813
849 source "kernel/Kconfig.hz" !! 2814 config NR_CPUS_DEFAULT_8
>> 2815 bool
850 2816
851 config RISCV_SBI_V01 !! 2817 config NR_CPUS_DEFAULT_16
852 bool "SBI v0.1 support" !! 2818 bool
853 depends on RISCV_SBI !! 2819
854 help !! 2820 config NR_CPUS_DEFAULT_32
855 This config allows kernel to use SBI !! 2821 bool
856 deprecated in future once legacy M-m !! 2822
>> 2823 config NR_CPUS_DEFAULT_64
>> 2824 bool
>> 2825
>> 2826 config NR_CPUS
>> 2827 int "Maximum number of CPUs (2-256)"
>> 2828 range 2 256
>> 2829 depends on SMP
>> 2830 default "4" if NR_CPUS_DEFAULT_4
>> 2831 default "8" if NR_CPUS_DEFAULT_8
>> 2832 default "16" if NR_CPUS_DEFAULT_16
>> 2833 default "32" if NR_CPUS_DEFAULT_32
>> 2834 default "64" if NR_CPUS_DEFAULT_64
>> 2835 help
>> 2836 This allows you to specify the maximum number of CPUs which this
>> 2837 kernel will support. The maximum supported value is 32 for 32-bit
>> 2838 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2839 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2840 and 2 for all others.
>> 2841
>> 2842 This is purely to save memory - each supported CPU adds
>> 2843 approximately eight kilobytes to the kernel image. For best
>> 2844 performance should round up your number of processors to the next
>> 2845 power of two.
>> 2846
>> 2847 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2848 bool
>> 2849
>> 2850 config MIPS_NR_CPU_NR_MAP_1024
>> 2851 bool
857 2852
858 config RISCV_BOOT_SPINWAIT !! 2853 config MIPS_NR_CPU_NR_MAP
859 bool "Spinwait booting method" !! 2854 int
860 depends on SMP 2855 depends on SMP
861 default y if RISCV_SBI_V01 || RISCV_M_ !! 2856 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2857 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2858
>> 2859 #
>> 2860 # Timer Interrupt Frequency Configuration
>> 2861 #
>> 2862
>> 2863 choice
>> 2864 prompt "Timer frequency"
>> 2865 default HZ_250
862 help 2866 help
863 This enables support for booting Lin !! 2867 Allows the configuration of the timer frequency.
864 spinwait method, all cores randomly <<
865 gets chosen via lottery and all othe <<
866 variable. This method cannot support <<
867 scheme. It should be only enabled fo <<
868 on older firmware without SBI HSM ex <<
869 rely on ordered booting via SBI HSM <<
870 dynamically at runtime if the firmwa <<
871 <<
872 Since spinwait is incompatible with <<
873 NR_CPUS be large enough to contain t <<
874 hart to enter Linux. <<
875 2868
876 If unsure what to do here, say N. !! 2869 config HZ_24
>> 2870 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
877 2871
878 config ARCH_SUPPORTS_KEXEC !! 2872 config HZ_48
879 def_bool y !! 2873 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
880 2874
881 config ARCH_SELECTS_KEXEC !! 2875 config HZ_100
882 def_bool y !! 2876 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
883 depends on KEXEC <<
884 select HOTPLUG_CPU if SMP <<
885 2877
886 config ARCH_SUPPORTS_KEXEC_FILE !! 2878 config HZ_128
887 def_bool 64BIT !! 2879 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
888 2880
889 config ARCH_SELECTS_KEXEC_FILE !! 2881 config HZ_250
890 def_bool y !! 2882 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
891 depends on KEXEC_FILE <<
892 select HAVE_IMA_KEXEC if IMA <<
893 select KEXEC_ELF <<
894 2883
895 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2884 config HZ_256
896 def_bool ARCH_SUPPORTS_KEXEC_FILE !! 2885 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
897 2886
898 config ARCH_SUPPORTS_CRASH_DUMP !! 2887 config HZ_1000
899 def_bool y !! 2888 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
900 2889
901 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATIO !! 2890 config HZ_1024
902 def_bool CRASH_RESERVE !! 2891 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
903 2892
904 config COMPAT !! 2893 endchoice
905 bool "Kernel support for 32-bit U-mode <<
906 default 64BIT <<
907 depends on 64BIT && MMU <<
908 help <<
909 This option enables support for a 32 <<
910 kernel at S-mode. riscv32-specific c <<
911 the user helper functions (vdso), si <<
912 ptrace interface are handled appropr <<
913 <<
914 If you want to execute 32-bit usersp <<
915 <<
916 config PARAVIRT <<
917 bool "Enable paravirtualization code" <<
918 depends on RISCV_SBI <<
919 help <<
920 This changes the kernel so it can mo <<
921 under a hypervisor, potentially impr <<
922 over full virtualization. <<
923 <<
924 config PARAVIRT_TIME_ACCOUNTING <<
925 bool "Paravirtual steal time accountin <<
926 depends on PARAVIRT <<
927 help <<
928 Select this option to enable fine gr <<
929 accounting. Time spent executing oth <<
930 the current vCPU is discounted from <<
931 that, there can be a small performan <<
932 2894
933 If in doubt, say N here. !! 2895 config SYS_SUPPORTS_24HZ
>> 2896 bool
934 2897
935 config RELOCATABLE !! 2898 config SYS_SUPPORTS_48HZ
936 bool "Build a relocatable kernel" !! 2899 bool
937 depends on MMU && 64BIT && !XIP_KERNEL !! 2900
938 select MODULE_SECTIONS if MODULES !! 2901 config SYS_SUPPORTS_100HZ
939 help !! 2902 bool
940 This builds a kernel as a Position I <<
941 which retains all relocation metadat <<
942 kernel binary at runtime to a differ <<
943 address it was linked at. <<
944 Since RISCV uses the RELA relocation <<
945 relocation pass at runtime even if t <<
946 same address it was linked at. <<
947 2903
948 If unsure, say N. !! 2904 config SYS_SUPPORTS_128HZ
>> 2905 bool
949 2906
950 config RANDOMIZE_BASE !! 2907 config SYS_SUPPORTS_250HZ
951 bool "Randomize the address of the ker !! 2908 bool
952 select RELOCATABLE !! 2909
953 depends on MMU && 64BIT && !XIP_KERNEL !! 2910 config SYS_SUPPORTS_256HZ
954 help !! 2911 bool
955 Randomizes the virtual address at wh <<
956 loaded, as a security feature that d <<
957 relying on knowledge of the location <<
958 <<
959 It is the bootloader's job to provid <<
960 random u64 value in /chosen/kaslr-se <<
961 <<
962 When booting via the UEFI stub, it w <<
963 EFI_RNG_PROTOCOL implementation (if <<
964 to the kernel proper. In addition, i <<
965 location of the kernel Image as well <<
966 <<
967 If unsure, say N. <<
968 <<
969 endmenu # "Kernel features" <<
970 <<
971 menu "Boot options" <<
972 <<
973 config CMDLINE <<
974 string "Built-in kernel command line" <<
975 help <<
976 For most platforms, the arguments fo <<
977 are provided at run-time, during boo <<
978 where either no arguments are being <<
979 arguments are insufficient or even i <<
980 2912
981 When that occurs, it is possible to !! 2913 config SYS_SUPPORTS_1000HZ
982 line here and choose how the kernel !! 2914 bool
>> 2915
>> 2916 config SYS_SUPPORTS_1024HZ
>> 2917 bool
>> 2918
>> 2919 config SYS_SUPPORTS_ARBIT_HZ
>> 2920 bool
>> 2921 default y if !SYS_SUPPORTS_24HZ && \
>> 2922 !SYS_SUPPORTS_48HZ && \
>> 2923 !SYS_SUPPORTS_100HZ && \
>> 2924 !SYS_SUPPORTS_128HZ && \
>> 2925 !SYS_SUPPORTS_250HZ && \
>> 2926 !SYS_SUPPORTS_256HZ && \
>> 2927 !SYS_SUPPORTS_1000HZ && \
>> 2928 !SYS_SUPPORTS_1024HZ
>> 2929
>> 2930 config HZ
>> 2931 int
>> 2932 default 24 if HZ_24
>> 2933 default 48 if HZ_48
>> 2934 default 100 if HZ_100
>> 2935 default 128 if HZ_128
>> 2936 default 250 if HZ_250
>> 2937 default 256 if HZ_256
>> 2938 default 1000 if HZ_1000
>> 2939 default 1024 if HZ_1024
>> 2940
>> 2941 config SCHED_HRTICK
>> 2942 def_bool HIGH_RES_TIMERS
>> 2943
>> 2944 config KEXEC
>> 2945 bool "Kexec system call"
>> 2946 select KEXEC_CORE
>> 2947 help
>> 2948 kexec is a system call that implements the ability to shutdown your
>> 2949 current kernel, and to start another kernel. It is like a reboot
>> 2950 but it is independent of the system firmware. And like a reboot
>> 2951 you can start any kernel with it, not just Linux.
>> 2952
>> 2953 The name comes from the similarity to the exec system call.
>> 2954
>> 2955 It is an ongoing process to be certain the hardware in a machine
>> 2956 is properly shutdown, so do not be surprised if this code does not
>> 2957 initially work for you. As of this writing the exact hardware
>> 2958 interface is strongly in flux, so no good recommendation can be
>> 2959 made.
>> 2960
>> 2961 config CRASH_DUMP
>> 2962 bool "Kernel crash dumps"
>> 2963 help
>> 2964 Generate crash dump after being started by kexec.
>> 2965 This should be normally only set in special crash dump kernels
>> 2966 which are loaded in the main kernel with kexec-tools into
>> 2967 a specially reserved region and then later executed after
>> 2968 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2969 to a memory address not used by the main kernel or firmware using
>> 2970 PHYSICAL_START.
>> 2971
>> 2972 config PHYSICAL_START
>> 2973 hex "Physical address where the kernel is loaded"
>> 2974 default "0xffffffff84000000"
>> 2975 depends on CRASH_DUMP
>> 2976 help
>> 2977 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2978 If you plan to use kernel for capturing the crash dump change
>> 2979 this value to start of the reserved region (the "X" value as
>> 2980 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2981 passed to the panic-ed kernel).
>> 2982
>> 2983 config SECCOMP
>> 2984 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2985 depends on PROC_FS
>> 2986 default y
>> 2987 help
>> 2988 This kernel feature is useful for number crunching applications
>> 2989 that may need to compute untrusted bytecode during their
>> 2990 execution. By using pipes or other transports made available to
>> 2991 the process as file descriptors supporting the read/write
>> 2992 syscalls, it's possible to isolate those applications in
>> 2993 their own address space using seccomp. Once seccomp is
>> 2994 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2995 and the task is only allowed to execute a few safe syscalls
>> 2996 defined by each seccomp mode.
>> 2997
>> 2998 If unsure, say Y. Only embedded should say N here.
>> 2999
>> 3000 config MIPS_O32_FP64_SUPPORT
>> 3001 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 3002 depends on 32BIT || MIPS32_O32
>> 3003 help
>> 3004 When this is enabled, the kernel will support use of 64-bit floating
>> 3005 point registers with binaries using the O32 ABI along with the
>> 3006 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 3007 32-bit MIPS systems this support is at the cost of increasing the
>> 3008 size and complexity of the compiled FPU emulator. Thus if you are
>> 3009 running a MIPS32 system and know that none of your userland binaries
>> 3010 will require 64-bit floating point, you may wish to reduce the size
>> 3011 of your kernel & potentially improve FP emulation performance by
>> 3012 saying N here.
>> 3013
>> 3014 Although binutils currently supports use of this flag the details
>> 3015 concerning its effect upon the O32 ABI in userland are still being
>> 3016 worked on. In order to avoid userland becoming dependant upon current
>> 3017 behaviour before the details have been finalised, this option should
>> 3018 be considered experimental and only enabled by those working upon
>> 3019 said details.
>> 3020
>> 3021 If unsure, say N.
>> 3022
>> 3023 config USE_OF
>> 3024 bool
>> 3025 select OF
>> 3026 select OF_EARLY_FLATTREE
>> 3027 select IRQ_DOMAIN
>> 3028
>> 3029 config UHI_BOOT
>> 3030 bool
>> 3031
>> 3032 config BUILTIN_DTB
>> 3033 bool
983 3034
984 choice 3035 choice
985 prompt "Built-in command line usage" !! 3036 prompt "Kernel appended dtb support" if USE_OF
986 depends on CMDLINE != "" !! 3037 default MIPS_NO_APPENDED_DTB
987 default CMDLINE_FALLBACK <<
988 help <<
989 Choose how the kernel will handle th <<
990 line. <<
991 <<
992 config CMDLINE_FALLBACK <<
993 bool "Use bootloader kernel arguments <<
994 help <<
995 Use the built-in command line as fal <<
996 during boot. This is the default beh <<
997 <<
998 config CMDLINE_EXTEND <<
999 bool "Extend bootloader kernel argumen <<
1000 help <<
1001 The command-line arguments provided <<
1002 appended to the built-in command li <<
1003 cases where the provided arguments <<
1004 you don't want to or cannot modify <<
1005 <<
1006 config CMDLINE_FORCE <<
1007 bool "Always use the default kernel c <<
1008 help <<
1009 Always use the built-in command lin <<
1010 boot. This is useful in case you ne <<
1011 command line on systems where you d <<
1012 over it. <<
1013 3038
>> 3039 config MIPS_NO_APPENDED_DTB
>> 3040 bool "None"
>> 3041 help
>> 3042 Do not enable appended dtb support.
>> 3043
>> 3044 config MIPS_ELF_APPENDED_DTB
>> 3045 bool "vmlinux"
>> 3046 help
>> 3047 With this option, the boot code will look for a device tree binary
>> 3048 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 3049 it is empty and the DTB can be appended using binutils command
>> 3050 objcopy:
>> 3051
>> 3052 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 3053
>> 3054 This is meant as a backward compatiblity convenience for those
>> 3055 systems with a bootloader that can't be upgraded to accommodate
>> 3056 the documented boot protocol using a device tree.
>> 3057
>> 3058 config MIPS_RAW_APPENDED_DTB
>> 3059 bool "vmlinux.bin or vmlinuz.bin"
>> 3060 help
>> 3061 With this option, the boot code will look for a device tree binary
>> 3062 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 3063 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 3064
>> 3065 This is meant as a backward compatibility convenience for those
>> 3066 systems with a bootloader that can't be upgraded to accommodate
>> 3067 the documented boot protocol using a device tree.
>> 3068
>> 3069 Beware that there is very little in terms of protection against
>> 3070 this option being confused by leftover garbage in memory that might
>> 3071 look like a DTB header after a reboot if no actual DTB is appended
>> 3072 to vmlinux.bin. Do not leave this option active in a production kernel
>> 3073 if you don't intend to always append a DTB.
1014 endchoice 3074 endchoice
1015 3075
1016 config EFI_STUB !! 3076 choice
1017 bool !! 3077 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
>> 3078 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 3079 !MIPS_MALTA && \
>> 3080 !CAVIUM_OCTEON_SOC
>> 3081 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 3082
>> 3083 config MIPS_CMDLINE_FROM_DTB
>> 3084 depends on USE_OF
>> 3085 bool "Dtb kernel arguments if available"
>> 3086
>> 3087 config MIPS_CMDLINE_DTB_EXTEND
>> 3088 depends on USE_OF
>> 3089 bool "Extend dtb kernel arguments with bootloader arguments"
>> 3090
>> 3091 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 3092 bool "Bootloader kernel arguments if available"
>> 3093
>> 3094 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3095 depends on CMDLINE_BOOL
>> 3096 bool "Extend builtin kernel arguments with bootloader arguments"
>> 3097 endchoice
1018 3098
1019 config EFI !! 3099 endmenu
1020 bool "UEFI runtime support" !! 3100
1021 depends on OF && !XIP_KERNEL !! 3101 config LOCKDEP_SUPPORT
1022 depends on MMU !! 3102 bool
1023 default y 3103 default y
1024 select ARCH_SUPPORTS_ACPI if 64BIT !! 3104
1025 select EFI_GENERIC_STUB !! 3105 config STACKTRACE_SUPPORT
1026 select EFI_PARAMS_FROM_FDT !! 3106 bool
1027 select EFI_RUNTIME_WRAPPERS <<
1028 select EFI_STUB <<
1029 select LIBFDT <<
1030 select RISCV_ISA_C <<
1031 select UCS2_STRING <<
1032 help <<
1033 This option provides support for ru <<
1034 by UEFI firmware (such as non-volat <<
1035 clock, and platform reset). A UEFI <<
1036 allow the kernel to be booted as an <<
1037 is only useful on systems that have <<
1038 <<
1039 config DMI <<
1040 bool "Enable support for SMBIOS (DMI) <<
1041 depends on EFI <<
1042 default y 3107 default y
1043 help <<
1044 This enables SMBIOS/DMI feature for <<
1045 3108
1046 This option is only useful on syste !! 3109 config PGTABLE_LEVELS
1047 However, even with this option, the !! 3110 int
1048 continue to boot on existing non-UE !! 3111 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3112 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 3113 default 2
1049 3114
1050 config CC_HAVE_STACKPROTECTOR_TLS !! 3115 config MIPS_AUTO_PFN_OFFSET
1051 def_bool $(cc-option,-mstack-protecto !! 3116 bool
1052 3117
1053 config STACKPROTECTOR_PER_TASK !! 3118 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
1054 def_bool y <<
1055 depends on !RANDSTRUCT <<
1056 depends on STACKPROTECTOR && CC_HAVE_ <<
1057 3119
1058 config PHYS_RAM_BASE_FIXED !! 3120 config PCI_DRIVERS_GENERIC
1059 bool "Explicitly specified physical R !! 3121 select PCI_DOMAINS_GENERIC if PCI
1060 depends on NONPORTABLE !! 3122 bool
1061 default n <<
1062 3123
1063 config PHYS_RAM_BASE !! 3124 config PCI_DRIVERS_LEGACY
1064 hex "Platform Physical RAM address" !! 3125 def_bool !PCI_DRIVERS_GENERIC
1065 depends on PHYS_RAM_BASE_FIXED !! 3126 select NO_GENERIC_PCI_IOPORT_MAP
1066 default "0x80000000" !! 3127 select PCI_DOMAINS if PCI
1067 help <<
1068 This is the physical address of RAM <<
1069 explicitly specified to run early r <<
1070 from flash to RAM. <<
1071 <<
1072 config XIP_KERNEL <<
1073 bool "Kernel Execute-In-Place from RO <<
1074 depends on MMU && SPARSEMEM && NONPOR <<
1075 # This prevents XIP from being enable <<
1076 # fail to build since XIP doesn't sup <<
1077 depends on !COMPILE_TEST <<
1078 select PHYS_RAM_BASE_FIXED <<
1079 help <<
1080 Execute-In-Place allows the kernel <<
1081 directly addressable by the CPU, su <<
1082 space since the text section of the <<
1083 to RAM. Read-write sections, such <<
1084 are still copied to RAM. The XIP k <<
1085 it has to run directly from flash, <<
1086 store it. The flash address used t <<
1087 and for storing it, is configuratio <<
1088 say Y here, you must know the prope <<
1089 store the kernel image depending on <<
1090 <<
1091 Also note that the make target beco <<
1092 "make zImage" or "make Image". The <<
1093 ROM memory will be arch/riscv/boot/ <<
1094 <<
1095 SPARSEMEM is required because the k <<
1096 flash resident are not backed by me <<
1097 a struct page on those regions will <<
1098 3128
1099 If unsure, say N. !! 3129 #
>> 3130 # ISA support is now enabled via select. Too many systems still have the one
>> 3131 # or other ISA chip on the board that users don't know about so don't expect
>> 3132 # users to choose the right thing ...
>> 3133 #
>> 3134 config ISA
>> 3135 bool
1100 3136
1101 config XIP_PHYS_ADDR !! 3137 config TC
1102 hex "XIP Kernel Physical Location" !! 3138 bool "TURBOchannel support"
1103 depends on XIP_KERNEL !! 3139 depends on MACH_DECSTATION
1104 default "0x21000000" !! 3140 help
1105 help !! 3141 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
1106 This is the physical address in you !! 3142 processors. TURBOchannel programming specifications are available
1107 be linked for and stored to. This !! 3143 at:
1108 own flash usage. !! 3144 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3145 and:
>> 3146 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3147 Linux driver support status is documented at:
>> 3148 <http://www.linux-mips.org/wiki/DECstation>
1109 3149
1110 config RISCV_ISA_FALLBACK !! 3150 config MMU
1111 bool "Permit falling back to parsing !! 3151 bool
1112 default y 3152 default y
1113 help <<
1114 Parsing the "riscv,isa" devicetree <<
1115 replaced by a list of explicitly de <<
1116 with existing platforms, the kernel <<
1117 "riscv,isa" property if the replace <<
1118 <<
1119 Selecting N here will result in a k <<
1120 fallback, unless the commandline "r <<
1121 present. <<
1122 <<
1123 Please see the dt-binding, located <<
1124 Documentation/devicetree/bindings/r <<
1125 on the replacement properties, "ris <<
1126 "riscv,isa-extensions". <<
1127 3153
1128 config BUILTIN_DTB !! 3154 config ARCH_MMAP_RND_BITS_MIN
1129 bool "Built-in device tree" !! 3155 default 12 if 64BIT
1130 depends on OF && NONPORTABLE !! 3156 default 8
1131 help <<
1132 Build a device tree into the Linux <<
1133 This option should be selected if n <<
1134 If unsure, say N. <<
1135 3157
>> 3158 config ARCH_MMAP_RND_BITS_MAX
>> 3159 default 18 if 64BIT
>> 3160 default 15
1136 3161
1137 config BUILTIN_DTB_SOURCE !! 3162 config ARCH_MMAP_RND_COMPAT_BITS_MIN
1138 string "Built-in device tree source" !! 3163 default 8
1139 depends on BUILTIN_DTB <<
1140 help <<
1141 DTS file path (without suffix, rela <<
1142 for the DTS file that will be used <<
1143 kernel. <<
1144 3164
1145 endmenu # "Boot options" !! 3165 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3166 default 15
1146 3167
1147 config PORTABLE !! 3168 config I8253
1148 bool 3169 bool
1149 default !NONPORTABLE !! 3170 select CLKSRC_I8253
1150 select EFI !! 3171 select CLKEVT_I8253
1151 select MMU !! 3172 select MIPS_EXTERNAL_TIMER
1152 select OF <<
1153 3173
1154 config ARCH_PROC_KCORE_TEXT !! 3174 config ZONE_DMA
1155 def_bool y !! 3175 bool
1156 3176
1157 menu "Power management options" !! 3177 config ZONE_DMA32
>> 3178 bool
1158 3179
1159 source "kernel/power/Kconfig" !! 3180 endmenu
>> 3181
>> 3182 config TRAD_SIGNALS
>> 3183 bool
>> 3184
>> 3185 config MIPS32_COMPAT
>> 3186 bool
>> 3187
>> 3188 config COMPAT
>> 3189 bool
>> 3190
>> 3191 config SYSVIPC_COMPAT
>> 3192 bool
>> 3193
>> 3194 config MIPS32_O32
>> 3195 bool "Kernel support for o32 binaries"
>> 3196 depends on 64BIT
>> 3197 select ARCH_WANT_OLD_COMPAT_IPC
>> 3198 select COMPAT
>> 3199 select MIPS32_COMPAT
>> 3200 select SYSVIPC_COMPAT if SYSVIPC
>> 3201 help
>> 3202 Select this option if you want to run o32 binaries. These are pure
>> 3203 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3204 existing binaries are in this format.
>> 3205
>> 3206 If unsure, say Y.
>> 3207
>> 3208 config MIPS32_N32
>> 3209 bool "Kernel support for n32 binaries"
>> 3210 depends on 64BIT
>> 3211 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
>> 3212 select COMPAT
>> 3213 select MIPS32_COMPAT
>> 3214 select SYSVIPC_COMPAT if SYSVIPC
>> 3215 help
>> 3216 Select this option if you want to run n32 binaries. These are
>> 3217 64-bit binaries using 32-bit quantities for addressing and certain
>> 3218 data that would normally be 64-bit. They are used in special
>> 3219 cases.
>> 3220
>> 3221 If unsure, say N.
>> 3222
>> 3223 config BINFMT_ELF32
>> 3224 bool
>> 3225 default y if MIPS32_O32 || MIPS32_N32
>> 3226 select ELFCORE
>> 3227
>> 3228 menu "Power management options"
1160 3229
1161 config ARCH_HIBERNATION_POSSIBLE 3230 config ARCH_HIBERNATION_POSSIBLE
1162 def_bool y 3231 def_bool y
1163 !! 3232 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
1164 config ARCH_HIBERNATION_HEADER <<
1165 def_bool HIBERNATION <<
1166 3233
1167 config ARCH_SUSPEND_POSSIBLE 3234 config ARCH_SUSPEND_POSSIBLE
1168 def_bool y 3235 def_bool y
>> 3236 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
1169 3237
1170 endmenu # "Power management options" !! 3238 source "kernel/power/Kconfig"
1171 3239
1172 menu "CPU Power Management" !! 3240 endmenu
1173 3241
1174 source "drivers/cpuidle/Kconfig" !! 3242 config MIPS_EXTERNAL_TIMER
>> 3243 bool
>> 3244
>> 3245 menu "CPU Power Management"
1175 3246
>> 3247 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
1176 source "drivers/cpufreq/Kconfig" 3248 source "drivers/cpufreq/Kconfig"
>> 3249 endif
>> 3250
>> 3251 source "drivers/cpuidle/Kconfig"
1177 3252
1178 endmenu # "CPU Power Management" !! 3253 endmenu
1179 3254
1180 source "arch/riscv/kvm/Kconfig" !! 3255 source "drivers/firmware/Kconfig"
1181 3256
1182 source "drivers/acpi/Kconfig" !! 3257 source "arch/mips/kvm/Kconfig"
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