1 # SPDX-License-Identifier: GPL-2.0-only !! 1 # SPDX-License-Identifier: GPL-2.0
2 # !! 2 config MIPS
3 # For a description of the syntax of this conf <<
4 # see Documentation/kbuild/kconfig-language.rs <<
5 # <<
6 <<
7 config 64BIT <<
8 bool 3 bool
9 !! 4 default y
10 config 32BIT !! 5 select ARCH_32BIT_OFF_T if !64BIT
11 bool !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
12 <<
13 config RISCV <<
14 def_bool y <<
15 select ACPI_GENERIC_GSI if ACPI <<
16 select ACPI_MCFG if (ACPI && PCI) <<
17 select ACPI_PPTT if ACPI <<
18 select ACPI_REDUCED_HARDWARE_ONLY if A <<
19 select ACPI_SPCR_TABLE if ACPI <<
20 select ARCH_DMA_DEFAULT_COHERENT <<
21 select ARCH_ENABLE_HUGEPAGE_MIGRATION <<
22 select ARCH_ENABLE_MEMORY_HOTPLUG if S <<
23 select ARCH_ENABLE_MEMORY_HOTREMOVE if <<
24 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if <<
25 select ARCH_ENABLE_THP_MIGRATION if TR <<
26 select ARCH_HAS_BINFMT_FLAT <<
27 select ARCH_HAS_CURRENT_STACK_POINTER <<
28 select ARCH_HAS_DEBUG_VIRTUAL if MMU <<
29 select ARCH_HAS_DEBUG_VM_PGTABLE <<
30 select ARCH_HAS_DEBUG_WX <<
31 select ARCH_HAS_FAST_MULTIPLIER <<
32 select ARCH_HAS_FORTIFY_SOURCE 7 select ARCH_HAS_FORTIFY_SOURCE
33 select ARCH_HAS_GCOV_PROFILE_ALL <<
34 select ARCH_HAS_GIGANTIC_PAGE <<
35 select ARCH_HAS_KCOV 8 select ARCH_HAS_KCOV
36 select ARCH_HAS_KERNEL_FPU_SUPPORT if !! 9 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
37 select ARCH_HAS_MEMBARRIER_CALLBACKS <<
38 select ARCH_HAS_MEMBARRIER_SYNC_CORE <<
39 select ARCH_HAS_MMIOWB <<
40 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
41 select ARCH_HAS_PMEM_API <<
42 select ARCH_HAS_PREPARE_SYNC_CORE_CMD <<
43 select ARCH_HAS_PTE_DEVMAP if 64BIT && <<
44 select ARCH_HAS_PTE_SPECIAL <<
45 select ARCH_HAS_SET_DIRECT_MAP if MMU <<
46 select ARCH_HAS_SET_MEMORY if MMU <<
47 select ARCH_HAS_STRICT_KERNEL_RWX if M <<
48 select ARCH_HAS_STRICT_MODULE_RWX if M <<
49 select ARCH_HAS_SYNC_CORE_BEFORE_USERM <<
50 select ARCH_HAS_SYSCALL_WRAPPER <<
51 select ARCH_HAS_TICK_BROADCAST if GENE 10 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
52 select ARCH_HAS_UBSAN !! 11 select ARCH_HAS_UBSAN_SANITIZE_ALL
53 select ARCH_HAS_VDSO_DATA !! 12 select ARCH_SUPPORTS_UPROBES
54 select ARCH_KEEP_MEMBLOCK if ACPI !! 13 select ARCH_USE_BUILTIN_BSWAP
55 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL <<
56 select ARCH_OPTIONAL_KERNEL_RWX if ARC <<
57 select ARCH_OPTIONAL_KERNEL_RWX_DEFAUL <<
58 select ARCH_STACKWALK <<
59 select ARCH_SUPPORTS_ATOMIC_RMW <<
60 select ARCH_SUPPORTS_CFI_CLANG <<
61 select ARCH_SUPPORTS_DEBUG_PAGEALLOC i <<
62 select ARCH_SUPPORTS_HUGETLBFS if MMU <<
63 # LLD >= 14: https://github.com/llvm/l <<
64 select ARCH_SUPPORTS_LTO_CLANG if LLD_ <<
65 select ARCH_SUPPORTS_LTO_CLANG_THIN if <<
66 select ARCH_SUPPORTS_PAGE_TABLE_CHECK <<
67 select ARCH_SUPPORTS_PER_VMA_LOCK if M <<
68 select ARCH_SUPPORTS_RT <<
69 select ARCH_SUPPORTS_SHADOW_CALL_STACK <<
70 select ARCH_USE_CMPXCHG_LOCKREF if 64B 14 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
71 select ARCH_USE_MEMTEST <<
72 select ARCH_USE_QUEUED_RWLOCKS 15 select ARCH_USE_QUEUED_RWLOCKS
73 select ARCH_USE_SYM_ANNOTATIONS !! 16 select ARCH_USE_QUEUED_SPINLOCKS
74 select ARCH_USES_CFI_TRAPS if CFI_CLAN <<
75 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU <<
76 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ 17 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
77 select ARCH_WANT_FRAME_POINTERS !! 18 select ARCH_WANT_IPC_PARSE_VERSION
78 select ARCH_WANT_GENERAL_HUGETLB if !R !! 19 select BUILDTIME_TABLE_SORT
79 select ARCH_WANT_HUGE_PMD_SHARE if 64B <<
80 select ARCH_WANT_LD_ORPHAN_WARN if !XI <<
81 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
82 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM <<
83 select ARCH_WANTS_NO_INSTR <<
84 select ARCH_WANTS_THP_SWAP if HAVE_ARC <<
85 select BINFMT_FLAT_NO_DATA_START_OFFSE <<
86 select BUILDTIME_TABLE_SORT if MMU <<
87 select CLINT_TIMER if RISCV_M_MODE <<
88 select CLONE_BACKWARDS 20 select CLONE_BACKWARDS
89 select COMMON_CLK !! 21 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
90 select CPU_PM if CPU_IDLE || HIBERNATI !! 22 select CPU_PM if CPU_IDLE
91 select EDAC_SUPPORT <<
92 select FRAME_POINTER if PERF_EVENTS || <<
93 select FTRACE_MCOUNT_USE_PATCHABLE_FUN <<
94 select GENERIC_ARCH_TOPOLOGY <<
95 select GENERIC_ATOMIC64 if !64BIT 23 select GENERIC_ATOMIC64 if !64BIT
96 select GENERIC_CLOCKEVENTS_BROADCAST i !! 24 select GENERIC_CLOCKEVENTS
97 select GENERIC_CPU_DEVICES !! 25 select GENERIC_CMOS_UPDATE
98 select GENERIC_CPU_VULNERABILITIES !! 26 select GENERIC_CPU_AUTOPROBE
99 select GENERIC_EARLY_IOREMAP !! 27 select GENERIC_GETTIMEOFDAY
100 select GENERIC_ENTRY !! 28 select GENERIC_IOMAP
101 select GENERIC_GETTIMEOFDAY if HAVE_GE !! 29 select GENERIC_IRQ_PROBE
102 select GENERIC_IDLE_POLL_SETUP <<
103 select GENERIC_IOREMAP if MMU <<
104 select GENERIC_IRQ_IPI if SMP <<
105 select GENERIC_IRQ_IPI_MUX if SMP <<
106 select GENERIC_IRQ_MULTI_HANDLER <<
107 select GENERIC_IRQ_SHOW 30 select GENERIC_IRQ_SHOW
108 select GENERIC_IRQ_SHOW_LEVEL !! 31 select GENERIC_ISA_DMA if EISA
109 select GENERIC_LIB_DEVMEM_IS_ALLOWED !! 32 select GENERIC_LIB_ASHLDI3
110 select GENERIC_PCI_IOMAP !! 33 select GENERIC_LIB_ASHRDI3
111 select GENERIC_PTDUMP if MMU !! 34 select GENERIC_LIB_CMPDI2
112 select GENERIC_SCHED_CLOCK !! 35 select GENERIC_LIB_LSHRDI3
>> 36 select GENERIC_LIB_UCMPDI2
>> 37 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
113 select GENERIC_SMP_IDLE_THREAD 38 select GENERIC_SMP_IDLE_THREAD
114 select GENERIC_TIME_VSYSCALL if MMU && !! 39 select GENERIC_TIME_VSYSCALL
115 select GENERIC_VDSO_TIME_NS if HAVE_GE !! 40 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
116 select HARDIRQS_SW_RESEND !! 41 select HANDLE_DOMAIN_IRQ
117 select HAS_IOPORT if MMU !! 42 select HAVE_ARCH_COMPILER_H
118 select HAVE_ARCH_AUDITSYSCALL !! 43 select HAVE_ARCH_JUMP_LABEL
119 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ !! 44 select HAVE_ARCH_KGDB
120 select HAVE_ARCH_HUGE_VMAP if MMU && 6 <<
121 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
122 select HAVE_ARCH_JUMP_LABEL_RELATIVE i <<
123 select HAVE_ARCH_KASAN if MMU && 64BIT <<
124 select HAVE_ARCH_KASAN_VMALLOC if MMU <<
125 select HAVE_ARCH_KFENCE if MMU && 64BI <<
126 select HAVE_ARCH_KGDB if !XIP_KERNEL <<
127 select HAVE_ARCH_KGDB_QXFER_PKT <<
128 select HAVE_ARCH_MMAP_RND_BITS if MMU 45 select HAVE_ARCH_MMAP_RND_BITS if MMU
129 select HAVE_ARCH_MMAP_RND_COMPAT_BITS !! 46 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
130 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
131 select HAVE_ARCH_SECCOMP_FILTER 47 select HAVE_ARCH_SECCOMP_FILTER
132 select HAVE_ARCH_STACKLEAK <<
133 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
134 select HAVE_ARCH_TRACEHOOK 48 select HAVE_ARCH_TRACEHOOK
135 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 49 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
136 select HAVE_ARCH_USERFAULTFD_MINOR if <<
137 select HAVE_ARCH_VMAP_STACK if MMU && <<
138 select HAVE_ASM_MODVERSIONS 50 select HAVE_ASM_MODVERSIONS
139 select HAVE_CONTEXT_TRACKING_USER !! 51 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
>> 52 select HAVE_CONTEXT_TRACKING
>> 53 select HAVE_TIF_NOHZ
>> 54 select HAVE_COPY_THREAD_TLS
>> 55 select HAVE_C_RECORDMCOUNT
140 select HAVE_DEBUG_KMEMLEAK 56 select HAVE_DEBUG_KMEMLEAK
141 select HAVE_DMA_CONTIGUOUS if MMU !! 57 select HAVE_DEBUG_STACKOVERFLOW
142 select HAVE_DYNAMIC_FTRACE if !XIP_KER !! 58 select HAVE_DMA_CONTIGUOUS
143 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT !! 59 select HAVE_DYNAMIC_FTRACE
144 select HAVE_DYNAMIC_FTRACE_WITH_ARGS i !! 60 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
145 select HAVE_FTRACE_MCOUNT_RECORD if !X !! 61 select HAVE_EXIT_THREAD
>> 62 select HAVE_FAST_GUP
>> 63 select HAVE_FTRACE_MCOUNT_RECORD
146 select HAVE_FUNCTION_GRAPH_TRACER 64 select HAVE_FUNCTION_GRAPH_TRACER
147 select HAVE_FUNCTION_GRAPH_RETVAL if H !! 65 select HAVE_FUNCTION_TRACER
148 select HAVE_FUNCTION_TRACER if !XIP_KE <<
149 select HAVE_EBPF_JIT if MMU <<
150 select HAVE_GUP_FAST if MMU <<
151 select HAVE_FUNCTION_ARG_ACCESS_API <<
152 select HAVE_FUNCTION_ERROR_INJECTION <<
153 select HAVE_GCC_PLUGINS 66 select HAVE_GCC_PLUGINS
154 select HAVE_GENERIC_VDSO if MMU && 64B !! 67 select HAVE_GENERIC_VDSO
>> 68 select HAVE_IDE
>> 69 select HAVE_IOREMAP_PROT
>> 70 select HAVE_IRQ_EXIT_ON_IRQ_STACK
155 select HAVE_IRQ_TIME_ACCOUNTING 71 select HAVE_IRQ_TIME_ACCOUNTING
156 select HAVE_KERNEL_BZIP2 if !XIP_KERNE !! 72 select HAVE_KPROBES
157 select HAVE_KERNEL_GZIP if !XIP_KERNEL !! 73 select HAVE_KRETPROBES
158 select HAVE_KERNEL_LZ4 if !XIP_KERNEL !! 74 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
159 select HAVE_KERNEL_LZMA if !XIP_KERNEL !! 75 select HAVE_MEMBLOCK_NODE_MAP
160 select HAVE_KERNEL_LZO if !XIP_KERNEL !! 76 select HAVE_MOD_ARCH_SPECIFIC
161 select HAVE_KERNEL_UNCOMPRESSED if !XI !! 77 select HAVE_NMI
162 select HAVE_KERNEL_ZSTD if !XIP_KERNEL !! 78 select HAVE_OPROFILE
163 select HAVE_KERNEL_XZ if !XIP_KERNEL & <<
164 select HAVE_KPROBES if !XIP_KERNEL <<
165 select HAVE_KRETPROBES if !XIP_KERNEL <<
166 # https://github.com/ClangBuiltLinux/l <<
167 select HAVE_LD_DEAD_CODE_DATA_ELIMINAT <<
168 select HAVE_MOVE_PMD <<
169 select HAVE_MOVE_PUD <<
170 select HAVE_PAGE_SIZE_4KB <<
171 select HAVE_PCI <<
172 select HAVE_PERF_EVENTS 79 select HAVE_PERF_EVENTS
173 select HAVE_PERF_REGS <<
174 select HAVE_PERF_USER_STACK_DUMP <<
175 select HAVE_POSIX_CPU_TIMERS_TASK_WORK <<
176 select HAVE_PREEMPT_DYNAMIC_KEY if !XI <<
177 select HAVE_REGS_AND_STACK_ACCESS_API 80 select HAVE_REGS_AND_STACK_ACCESS_API
178 select HAVE_RETHOOK if !XIP_KERNEL <<
179 select HAVE_RSEQ 81 select HAVE_RSEQ
180 select HAVE_RUST if RUSTC_SUPPORTS_RIS !! 82 select HAVE_SPARSE_SYSCALL_NR
181 select HAVE_SAMPLE_FTRACE_DIRECT <<
182 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI <<
183 select HAVE_STACKPROTECTOR 83 select HAVE_STACKPROTECTOR
184 select HAVE_SYSCALL_TRACEPOINTS 84 select HAVE_SYSCALL_TRACEPOINTS
185 select HOTPLUG_CORE_SYNC_DEAD if HOTPL !! 85 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
186 select IRQ_DOMAIN <<
187 select IRQ_FORCED_THREADING 86 select IRQ_FORCED_THREADING
188 select KASAN_VMALLOC if KASAN !! 87 select ISA if EISA
189 select LOCK_MM_AND_FIND_VMA !! 88 select MODULES_USE_ELF_REL if MODULES
190 select MMU_GATHER_RCU_TABLE_FREE if SM !! 89 select MODULES_USE_ELF_RELA if MODULES && 64BIT
191 select MODULES_USE_ELF_RELA if MODULES !! 90 select PERF_USE_VMALLOC
192 select OF !! 91 select RTC_LIB
193 select OF_EARLY_FLATTREE <<
194 select OF_IRQ <<
195 select PCI_DOMAINS_GENERIC if PCI <<
196 select PCI_ECAM if (ACPI && PCI) <<
197 select PCI_MSI if PCI <<
198 select RISCV_ALTERNATIVE if !XIP_KERNE <<
199 select RISCV_APLIC <<
200 select RISCV_IMSIC <<
201 select RISCV_INTC <<
202 select RISCV_TIMER if RISCV_SBI <<
203 select SIFIVE_PLIC <<
204 select SPARSE_IRQ <<
205 select SYSCTL_EXCEPTION_TRACE 92 select SYSCTL_EXCEPTION_TRACE
206 select THREAD_INFO_IN_TASK !! 93 select VIRT_TO_BUS
207 select TRACE_IRQFLAGS_SUPPORT !! 94
208 select UACCESS_MEMCPY if !MMU !! 95 menu "Machine selection"
209 select USER_STACKTRACE_SUPPORT !! 96
>> 97 choice
>> 98 prompt "System type"
>> 99 default MIPS_GENERIC
>> 100
>> 101 config MIPS_GENERIC
>> 102 bool "Generic board-agnostic MIPS kernel"
>> 103 select BOOT_RAW
>> 104 select BUILTIN_DTB
>> 105 select CEVT_R4K
>> 106 select CLKSRC_MIPS_GIC
>> 107 select COMMON_CLK
>> 108 select CPU_MIPSR2_IRQ_EI
>> 109 select CPU_MIPSR2_IRQ_VI
>> 110 select CSRC_R4K
>> 111 select DMA_PERDEV_COHERENT
>> 112 select HAVE_PCI
>> 113 select IRQ_MIPS_CPU
>> 114 select MIPS_AUTO_PFN_OFFSET
>> 115 select MIPS_CPU_SCACHE
>> 116 select MIPS_GIC
>> 117 select MIPS_L1_CACHE_SHIFT_7
>> 118 select NO_EXCEPT_FILL
>> 119 select PCI_DRIVERS_GENERIC
>> 120 select SMP_UP if SMP
>> 121 select SWAP_IO_SPACE
>> 122 select SYS_HAS_CPU_MIPS32_R1
>> 123 select SYS_HAS_CPU_MIPS32_R2
>> 124 select SYS_HAS_CPU_MIPS32_R6
>> 125 select SYS_HAS_CPU_MIPS64_R1
>> 126 select SYS_HAS_CPU_MIPS64_R2
>> 127 select SYS_HAS_CPU_MIPS64_R6
>> 128 select SYS_SUPPORTS_32BIT_KERNEL
>> 129 select SYS_SUPPORTS_64BIT_KERNEL
>> 130 select SYS_SUPPORTS_BIG_ENDIAN
>> 131 select SYS_SUPPORTS_HIGHMEM
>> 132 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 133 select SYS_SUPPORTS_MICROMIPS
>> 134 select SYS_SUPPORTS_MIPS16
>> 135 select SYS_SUPPORTS_MIPS_CPS
>> 136 select SYS_SUPPORTS_MULTITHREADING
>> 137 select SYS_SUPPORTS_RELOCATABLE
>> 138 select SYS_SUPPORTS_SMARTMIPS
>> 139 select UHI_BOOT
>> 140 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 141 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 142 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 143 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 144 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 145 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 146 select USE_OF
>> 147 help
>> 148 Select this to build a kernel which aims to support multiple boards,
>> 149 generally using a flattened device tree passed from the bootloader
>> 150 using the boot protocol defined in the UHI (Unified Hosting
>> 151 Interface) specification.
>> 152
>> 153 config MIPS_ALCHEMY
>> 154 bool "Alchemy processor based machines"
>> 155 select PHYS_ADDR_T_64BIT
>> 156 select CEVT_R4K
>> 157 select CSRC_R4K
>> 158 select IRQ_MIPS_CPU
>> 159 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 160 select SYS_HAS_CPU_MIPS32_R1
>> 161 select SYS_SUPPORTS_32BIT_KERNEL
>> 162 select SYS_SUPPORTS_APM_EMULATION
>> 163 select GPIOLIB
>> 164 select SYS_SUPPORTS_ZBOOT
>> 165 select COMMON_CLK
>> 166
>> 167 config AR7
>> 168 bool "Texas Instruments AR7"
>> 169 select BOOT_ELF32
>> 170 select DMA_NONCOHERENT
>> 171 select CEVT_R4K
>> 172 select CSRC_R4K
>> 173 select IRQ_MIPS_CPU
>> 174 select NO_EXCEPT_FILL
>> 175 select SWAP_IO_SPACE
>> 176 select SYS_HAS_CPU_MIPS32_R1
>> 177 select SYS_HAS_EARLY_PRINTK
>> 178 select SYS_SUPPORTS_32BIT_KERNEL
>> 179 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 180 select SYS_SUPPORTS_MIPS16
>> 181 select SYS_SUPPORTS_ZBOOT_UART16550
>> 182 select GPIOLIB
>> 183 select VLYNQ
>> 184 select HAVE_CLK
>> 185 help
>> 186 Support for the Texas Instruments AR7 System-on-a-Chip
>> 187 family: TNETD7100, 7200 and 7300.
>> 188
>> 189 config ATH25
>> 190 bool "Atheros AR231x/AR531x SoC support"
>> 191 select CEVT_R4K
>> 192 select CSRC_R4K
>> 193 select DMA_NONCOHERENT
>> 194 select IRQ_MIPS_CPU
>> 195 select IRQ_DOMAIN
>> 196 select SYS_HAS_CPU_MIPS32_R1
>> 197 select SYS_SUPPORTS_BIG_ENDIAN
>> 198 select SYS_SUPPORTS_32BIT_KERNEL
>> 199 select SYS_HAS_EARLY_PRINTK
>> 200 help
>> 201 Support for Atheros AR231x and Atheros AR531x based boards
>> 202
>> 203 config ATH79
>> 204 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 205 select ARCH_HAS_RESET_CONTROLLER
>> 206 select BOOT_RAW
>> 207 select CEVT_R4K
>> 208 select CSRC_R4K
>> 209 select DMA_NONCOHERENT
>> 210 select GPIOLIB
>> 211 select PINCTRL
>> 212 select HAVE_CLK
>> 213 select COMMON_CLK
>> 214 select CLKDEV_LOOKUP
>> 215 select IRQ_MIPS_CPU
>> 216 select SYS_HAS_CPU_MIPS32_R2
>> 217 select SYS_HAS_EARLY_PRINTK
>> 218 select SYS_SUPPORTS_32BIT_KERNEL
>> 219 select SYS_SUPPORTS_BIG_ENDIAN
>> 220 select SYS_SUPPORTS_MIPS16
>> 221 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 222 select USE_OF
>> 223 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 224 help
>> 225 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 226
>> 227 config BMIPS_GENERIC
>> 228 bool "Broadcom Generic BMIPS kernel"
>> 229 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 230 select ARCH_HAS_PHYS_TO_DMA
>> 231 select BOOT_RAW
>> 232 select NO_EXCEPT_FILL
>> 233 select USE_OF
>> 234 select CEVT_R4K
>> 235 select CSRC_R4K
>> 236 select SYNC_R4K
>> 237 select COMMON_CLK
>> 238 select BCM6345_L1_IRQ
>> 239 select BCM7038_L1_IRQ
>> 240 select BCM7120_L2_IRQ
>> 241 select BRCMSTB_L2_IRQ
>> 242 select IRQ_MIPS_CPU
>> 243 select DMA_NONCOHERENT
>> 244 select SYS_SUPPORTS_32BIT_KERNEL
>> 245 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 246 select SYS_SUPPORTS_BIG_ENDIAN
>> 247 select SYS_SUPPORTS_HIGHMEM
>> 248 select SYS_HAS_CPU_BMIPS32_3300
>> 249 select SYS_HAS_CPU_BMIPS4350
>> 250 select SYS_HAS_CPU_BMIPS4380
>> 251 select SYS_HAS_CPU_BMIPS5000
>> 252 select SWAP_IO_SPACE
>> 253 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 254 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 255 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 256 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 257 select HARDIRQS_SW_RESEND
>> 258 help
>> 259 Build a generic DT-based kernel image that boots on select
>> 260 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 261 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 262 must be set appropriately for your board.
>> 263
>> 264 config BCM47XX
>> 265 bool "Broadcom BCM47XX based boards"
>> 266 select BOOT_RAW
>> 267 select CEVT_R4K
>> 268 select CSRC_R4K
>> 269 select DMA_NONCOHERENT
>> 270 select HAVE_PCI
>> 271 select IRQ_MIPS_CPU
>> 272 select SYS_HAS_CPU_MIPS32_R1
>> 273 select NO_EXCEPT_FILL
>> 274 select SYS_SUPPORTS_32BIT_KERNEL
>> 275 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 276 select SYS_SUPPORTS_MIPS16
>> 277 select SYS_SUPPORTS_ZBOOT
>> 278 select SYS_HAS_EARLY_PRINTK
>> 279 select USE_GENERIC_EARLY_PRINTK_8250
>> 280 select GPIOLIB
>> 281 select LEDS_GPIO_REGISTER
>> 282 select BCM47XX_NVRAM
>> 283 select BCM47XX_SPROM
>> 284 select BCM47XX_SSB if !BCM47XX_BCMA
>> 285 help
>> 286 Support for BCM47XX based boards
>> 287
>> 288 config BCM63XX
>> 289 bool "Broadcom BCM63XX based boards"
>> 290 select BOOT_RAW
>> 291 select CEVT_R4K
>> 292 select CSRC_R4K
>> 293 select SYNC_R4K
>> 294 select DMA_NONCOHERENT
>> 295 select IRQ_MIPS_CPU
>> 296 select SYS_SUPPORTS_32BIT_KERNEL
>> 297 select SYS_SUPPORTS_BIG_ENDIAN
>> 298 select SYS_HAS_EARLY_PRINTK
>> 299 select SWAP_IO_SPACE
>> 300 select GPIOLIB
>> 301 select HAVE_CLK
>> 302 select MIPS_L1_CACHE_SHIFT_4
>> 303 select CLKDEV_LOOKUP
>> 304 help
>> 305 Support for BCM63XX based boards
>> 306
>> 307 config MIPS_COBALT
>> 308 bool "Cobalt Server"
>> 309 select CEVT_R4K
>> 310 select CSRC_R4K
>> 311 select CEVT_GT641XX
>> 312 select DMA_NONCOHERENT
>> 313 select FORCE_PCI
>> 314 select I8253
>> 315 select I8259
>> 316 select IRQ_MIPS_CPU
>> 317 select IRQ_GT641XX
>> 318 select PCI_GT64XXX_PCI0
>> 319 select SYS_HAS_CPU_NEVADA
>> 320 select SYS_HAS_EARLY_PRINTK
>> 321 select SYS_SUPPORTS_32BIT_KERNEL
>> 322 select SYS_SUPPORTS_64BIT_KERNEL
>> 323 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 324 select USE_GENERIC_EARLY_PRINTK_8250
>> 325
>> 326 config MACH_DECSTATION
>> 327 bool "DECstations"
>> 328 select BOOT_ELF32
>> 329 select CEVT_DS1287
>> 330 select CEVT_R4K if CPU_R4X00
>> 331 select CSRC_IOASIC
>> 332 select CSRC_R4K if CPU_R4X00
>> 333 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 334 select CPU_R4000_WORKAROUNDS if 64BIT
>> 335 select CPU_R4400_WORKAROUNDS if 64BIT
>> 336 select DMA_NONCOHERENT
>> 337 select NO_IOPORT_MAP
>> 338 select IRQ_MIPS_CPU
>> 339 select SYS_HAS_CPU_R3000
>> 340 select SYS_HAS_CPU_R4X00
>> 341 select SYS_SUPPORTS_32BIT_KERNEL
>> 342 select SYS_SUPPORTS_64BIT_KERNEL
>> 343 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 344 select SYS_SUPPORTS_128HZ
>> 345 select SYS_SUPPORTS_256HZ
>> 346 select SYS_SUPPORTS_1024HZ
>> 347 select MIPS_L1_CACHE_SHIFT_4
>> 348 help
>> 349 This enables support for DEC's MIPS based workstations. For details
>> 350 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 351 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 352
>> 353 If you have one of the following DECstation Models you definitely
>> 354 want to choose R4xx0 for the CPU Type:
>> 355
>> 356 DECstation 5000/50
>> 357 DECstation 5000/150
>> 358 DECstation 5000/260
>> 359 DECsystem 5900/260
>> 360
>> 361 otherwise choose R3000.
>> 362
>> 363 config MACH_JAZZ
>> 364 bool "Jazz family of machines"
>> 365 select ARC_MEMORY
>> 366 select ARC_PROMLIB
>> 367 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 368 select ARCH_MIGHT_HAVE_PC_SERIO
>> 369 select FW_ARC
>> 370 select FW_ARC32
>> 371 select ARCH_MAY_HAVE_PC_FDC
>> 372 select CEVT_R4K
>> 373 select CSRC_R4K
>> 374 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 375 select GENERIC_ISA_DMA
>> 376 select HAVE_PCSPKR_PLATFORM
>> 377 select IRQ_MIPS_CPU
>> 378 select I8253
>> 379 select I8259
>> 380 select ISA
>> 381 select SYS_HAS_CPU_R4X00
>> 382 select SYS_SUPPORTS_32BIT_KERNEL
>> 383 select SYS_SUPPORTS_64BIT_KERNEL
>> 384 select SYS_SUPPORTS_100HZ
>> 385 help
>> 386 This a family of machines based on the MIPS R4030 chipset which was
>> 387 used by several vendors to build RISC/os and Windows NT workstations.
>> 388 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 389 Olivetti M700-10 workstations.
>> 390
>> 391 config MACH_INGENIC
>> 392 bool "Ingenic SoC based machines"
>> 393 select SYS_SUPPORTS_32BIT_KERNEL
>> 394 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 395 select SYS_SUPPORTS_ZBOOT_UART16550
>> 396 select CPU_SUPPORTS_HUGEPAGES
>> 397 select DMA_NONCOHERENT
>> 398 select IRQ_MIPS_CPU
>> 399 select PINCTRL
>> 400 select GPIOLIB
>> 401 select COMMON_CLK
>> 402 select GENERIC_IRQ_CHIP
>> 403 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 404 select USE_OF
>> 405
>> 406 config LANTIQ
>> 407 bool "Lantiq based platforms"
>> 408 select DMA_NONCOHERENT
>> 409 select IRQ_MIPS_CPU
>> 410 select CEVT_R4K
>> 411 select CSRC_R4K
>> 412 select SYS_HAS_CPU_MIPS32_R1
>> 413 select SYS_HAS_CPU_MIPS32_R2
>> 414 select SYS_SUPPORTS_BIG_ENDIAN
>> 415 select SYS_SUPPORTS_32BIT_KERNEL
>> 416 select SYS_SUPPORTS_MIPS16
>> 417 select SYS_SUPPORTS_MULTITHREADING
>> 418 select SYS_SUPPORTS_VPE_LOADER
>> 419 select SYS_HAS_EARLY_PRINTK
>> 420 select GPIOLIB
>> 421 select SWAP_IO_SPACE
>> 422 select BOOT_RAW
>> 423 select CLKDEV_LOOKUP
>> 424 select USE_OF
>> 425 select PINCTRL
>> 426 select PINCTRL_LANTIQ
>> 427 select ARCH_HAS_RESET_CONTROLLER
>> 428 select RESET_CONTROLLER
>> 429
>> 430 config LASAT
>> 431 bool "LASAT Networks platforms"
>> 432 select CEVT_R4K
>> 433 select CRC32
>> 434 select CSRC_R4K
>> 435 select DMA_NONCOHERENT
>> 436 select SYS_HAS_EARLY_PRINTK
>> 437 select HAVE_PCI
>> 438 select IRQ_MIPS_CPU
>> 439 select PCI_GT64XXX_PCI0
>> 440 select MIPS_NILE4
>> 441 select R5000_CPU_SCACHE
>> 442 select SYS_HAS_CPU_R5000
>> 443 select SYS_SUPPORTS_32BIT_KERNEL
>> 444 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 445 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 446
>> 447 config MACH_LOONGSON32
>> 448 bool "Loongson 32-bit family of machines"
>> 449 select SYS_SUPPORTS_ZBOOT
>> 450 help
>> 451 This enables support for the Loongson-1 family of machines.
>> 452
>> 453 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 454 the Institute of Computing Technology (ICT), Chinese Academy of
>> 455 Sciences (CAS).
>> 456
>> 457 config MACH_LOONGSON2EF
>> 458 bool "Loongson-2E/F family of machines"
>> 459 select SYS_SUPPORTS_ZBOOT
>> 460 help
>> 461 This enables the support of early Loongson-2E/F family of machines.
>> 462
>> 463 config MACH_LOONGSON64
>> 464 bool "Loongson 64-bit family of machines"
>> 465 select ARCH_SPARSEMEM_ENABLE
>> 466 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 467 select ARCH_MIGHT_HAVE_PC_SERIO
>> 468 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 469 select BOOT_ELF32
>> 470 select BOARD_SCACHE
>> 471 select CSRC_R4K
>> 472 select CEVT_R4K
>> 473 select CPU_HAS_WB
>> 474 select FORCE_PCI
>> 475 select ISA
>> 476 select I8259
>> 477 select IRQ_MIPS_CPU
>> 478 select NR_CPUS_DEFAULT_4
>> 479 select USE_GENERIC_EARLY_PRINTK_8250
>> 480 select SYS_HAS_CPU_LOONGSON64
>> 481 select SYS_HAS_EARLY_PRINTK
>> 482 select SYS_SUPPORTS_SMP
>> 483 select SYS_SUPPORTS_HOTPLUG_CPU
>> 484 select SYS_SUPPORTS_NUMA
>> 485 select SYS_SUPPORTS_64BIT_KERNEL
>> 486 select SYS_SUPPORTS_HIGHMEM
>> 487 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 488 select SYS_SUPPORTS_ZBOOT
>> 489 select ZONE_DMA32
>> 490 select NUMA
>> 491 select COMMON_CLK
>> 492 select USE_OF
>> 493 select BUILTIN_DTB
>> 494 help
>> 495 This enables the support of Loongson-2/3 family of machines.
>> 496
>> 497 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
>> 498 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
>> 499 and Loongson-2F which will be removed), developed by the Institute
>> 500 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
>> 501
>> 502 config MACH_PISTACHIO
>> 503 bool "IMG Pistachio SoC based boards"
>> 504 select BOOT_ELF32
>> 505 select BOOT_RAW
>> 506 select CEVT_R4K
>> 507 select CLKSRC_MIPS_GIC
>> 508 select COMMON_CLK
>> 509 select CSRC_R4K
>> 510 select DMA_NONCOHERENT
>> 511 select GPIOLIB
>> 512 select IRQ_MIPS_CPU
>> 513 select MFD_SYSCON
>> 514 select MIPS_CPU_SCACHE
>> 515 select MIPS_GIC
>> 516 select PINCTRL
>> 517 select REGULATOR
>> 518 select SYS_HAS_CPU_MIPS32_R2
>> 519 select SYS_SUPPORTS_32BIT_KERNEL
>> 520 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 521 select SYS_SUPPORTS_MIPS_CPS
>> 522 select SYS_SUPPORTS_MULTITHREADING
>> 523 select SYS_SUPPORTS_RELOCATABLE
>> 524 select SYS_SUPPORTS_ZBOOT
>> 525 select SYS_HAS_EARLY_PRINTK
>> 526 select USE_GENERIC_EARLY_PRINTK_8250
>> 527 select USE_OF
>> 528 help
>> 529 This enables support for the IMG Pistachio SoC platform.
>> 530
>> 531 config MIPS_MALTA
>> 532 bool "MIPS Malta board"
>> 533 select ARCH_MAY_HAVE_PC_FDC
>> 534 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 535 select ARCH_MIGHT_HAVE_PC_SERIO
>> 536 select BOOT_ELF32
>> 537 select BOOT_RAW
>> 538 select BUILTIN_DTB
>> 539 select CEVT_R4K
>> 540 select CLKSRC_MIPS_GIC
>> 541 select COMMON_CLK
>> 542 select CSRC_R4K
>> 543 select DMA_MAYBE_COHERENT
>> 544 select GENERIC_ISA_DMA
>> 545 select HAVE_PCSPKR_PLATFORM
>> 546 select HAVE_PCI
>> 547 select I8253
>> 548 select I8259
>> 549 select IRQ_MIPS_CPU
>> 550 select MIPS_BONITO64
>> 551 select MIPS_CPU_SCACHE
>> 552 select MIPS_GIC
>> 553 select MIPS_L1_CACHE_SHIFT_6
>> 554 select MIPS_MSC
>> 555 select PCI_GT64XXX_PCI0
>> 556 select SMP_UP if SMP
>> 557 select SWAP_IO_SPACE
>> 558 select SYS_HAS_CPU_MIPS32_R1
>> 559 select SYS_HAS_CPU_MIPS32_R2
>> 560 select SYS_HAS_CPU_MIPS32_R3_5
>> 561 select SYS_HAS_CPU_MIPS32_R5
>> 562 select SYS_HAS_CPU_MIPS32_R6
>> 563 select SYS_HAS_CPU_MIPS64_R1
>> 564 select SYS_HAS_CPU_MIPS64_R2
>> 565 select SYS_HAS_CPU_MIPS64_R6
>> 566 select SYS_HAS_CPU_NEVADA
>> 567 select SYS_HAS_CPU_RM7000
>> 568 select SYS_SUPPORTS_32BIT_KERNEL
>> 569 select SYS_SUPPORTS_64BIT_KERNEL
>> 570 select SYS_SUPPORTS_BIG_ENDIAN
>> 571 select SYS_SUPPORTS_HIGHMEM
>> 572 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 573 select SYS_SUPPORTS_MICROMIPS
>> 574 select SYS_SUPPORTS_MIPS16
>> 575 select SYS_SUPPORTS_MIPS_CMP
>> 576 select SYS_SUPPORTS_MIPS_CPS
>> 577 select SYS_SUPPORTS_MULTITHREADING
>> 578 select SYS_SUPPORTS_RELOCATABLE
>> 579 select SYS_SUPPORTS_SMARTMIPS
>> 580 select SYS_SUPPORTS_VPE_LOADER
>> 581 select SYS_SUPPORTS_ZBOOT
>> 582 select USE_OF
210 select ZONE_DMA32 if 64BIT 583 select ZONE_DMA32 if 64BIT
>> 584 help
>> 585 This enables support for the MIPS Technologies Malta evaluation
>> 586 board.
211 587
212 config RUSTC_SUPPORTS_RISCV !! 588 config MACH_PIC32
213 def_bool y !! 589 bool "Microchip PIC32 Family"
214 depends on 64BIT !! 590 help
215 # Shadow call stack requires rustc ver !! 591 This enables support for the Microchip PIC32 family of platforms.
216 # -Zsanitizer=shadow-call-stack flag. <<
217 depends on !SHADOW_CALL_STACK || RUSTC <<
218 <<
219 config CLANG_SUPPORTS_DYNAMIC_FTRACE <<
220 def_bool CC_IS_CLANG <<
221 # https://github.com/ClangBuiltLinux/l <<
222 depends on AS_IS_GNU || (AS_IS_LLVM && <<
223 <<
224 config GCC_SUPPORTS_DYNAMIC_FTRACE <<
225 def_bool CC_IS_GCC <<
226 depends on $(cc-option,-fpatchable-fun <<
227 <<
228 config HAVE_SHADOW_CALL_STACK <<
229 def_bool $(cc-option,-fsanitize=shadow <<
230 # https://github.com/riscv-non-isa/ris <<
231 depends on $(ld-option,--no-relax-gp) <<
232 592
233 config RISCV_USE_LINKER_RELAXATION !! 593 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
234 def_bool y !! 594 microcontrollers.
235 # https://github.com/llvm/llvm-project <<
236 depends on !LD_IS_LLD || LLD_VERSION > <<
237 595
238 # https://github.com/llvm/llvm-project/commit/ !! 596 config NEC_MARKEINS
239 config ARCH_HAS_BROKEN_DWARF5 !! 597 bool "NEC EMMA2RH Mark-eins board"
240 def_bool y !! 598 select SOC_EMMA2RH
241 depends on RISCV_USE_LINKER_RELAXATION !! 599 select HAVE_PCI
242 # https://github.com/llvm/llvm-project !! 600 help
243 depends on AS_IS_LLVM && AS_VERSION < !! 601 This enables support for the NEC Electronics Mark-eins boards.
244 # https://github.com/llvm/llvm-project <<
245 depends on LD_IS_LLD && LLD_VERSION < <<
246 602
247 config ARCH_MMAP_RND_BITS_MIN !! 603 config MACH_VR41XX
248 default 18 if 64BIT !! 604 bool "NEC VR4100 series based machines"
249 default 8 !! 605 select CEVT_R4K
>> 606 select CSRC_R4K
>> 607 select SYS_HAS_CPU_VR41XX
>> 608 select SYS_SUPPORTS_MIPS16
>> 609 select GPIOLIB
>> 610
>> 611 config NXP_STB220
>> 612 bool "NXP STB220 board"
>> 613 select SOC_PNX833X
>> 614 help
>> 615 Support for NXP Semiconductors STB220 Development Board.
>> 616
>> 617 config NXP_STB225
>> 618 bool "NXP 225 board"
>> 619 select SOC_PNX833X
>> 620 select SOC_PNX8335
>> 621 help
>> 622 Support for NXP Semiconductors STB225 Development Board.
>> 623
>> 624 config PMC_MSP
>> 625 bool "PMC-Sierra MSP chipsets"
>> 626 select CEVT_R4K
>> 627 select CSRC_R4K
>> 628 select DMA_NONCOHERENT
>> 629 select SWAP_IO_SPACE
>> 630 select NO_EXCEPT_FILL
>> 631 select BOOT_RAW
>> 632 select SYS_HAS_CPU_MIPS32_R1
>> 633 select SYS_HAS_CPU_MIPS32_R2
>> 634 select SYS_SUPPORTS_32BIT_KERNEL
>> 635 select SYS_SUPPORTS_BIG_ENDIAN
>> 636 select SYS_SUPPORTS_MIPS16
>> 637 select IRQ_MIPS_CPU
>> 638 select SERIAL_8250
>> 639 select SERIAL_8250_CONSOLE
>> 640 select USB_EHCI_BIG_ENDIAN_MMIO
>> 641 select USB_EHCI_BIG_ENDIAN_DESC
>> 642 help
>> 643 This adds support for the PMC-Sierra family of Multi-Service
>> 644 Processor System-On-A-Chips. These parts include a number
>> 645 of integrated peripherals, interfaces and DSPs in addition to
>> 646 a variety of MIPS cores.
>> 647
>> 648 config RALINK
>> 649 bool "Ralink based machines"
>> 650 select CEVT_R4K
>> 651 select CSRC_R4K
>> 652 select BOOT_RAW
>> 653 select DMA_NONCOHERENT
>> 654 select IRQ_MIPS_CPU
>> 655 select USE_OF
>> 656 select SYS_HAS_CPU_MIPS32_R1
>> 657 select SYS_HAS_CPU_MIPS32_R2
>> 658 select SYS_SUPPORTS_32BIT_KERNEL
>> 659 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 660 select SYS_SUPPORTS_MIPS16
>> 661 select SYS_HAS_EARLY_PRINTK
>> 662 select CLKDEV_LOOKUP
>> 663 select ARCH_HAS_RESET_CONTROLLER
>> 664 select RESET_CONTROLLER
>> 665
>> 666 config SGI_IP22
>> 667 bool "SGI IP22 (Indy/Indigo2)"
>> 668 select ARC_MEMORY
>> 669 select ARC_PROMLIB
>> 670 select FW_ARC
>> 671 select FW_ARC32
>> 672 select ARCH_MIGHT_HAVE_PC_SERIO
>> 673 select BOOT_ELF32
>> 674 select CEVT_R4K
>> 675 select CSRC_R4K
>> 676 select DEFAULT_SGI_PARTITION
>> 677 select DMA_NONCOHERENT
>> 678 select HAVE_EISA
>> 679 select I8253
>> 680 select I8259
>> 681 select IP22_CPU_SCACHE
>> 682 select IRQ_MIPS_CPU
>> 683 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 684 select SGI_HAS_I8042
>> 685 select SGI_HAS_INDYDOG
>> 686 select SGI_HAS_HAL2
>> 687 select SGI_HAS_SEEQ
>> 688 select SGI_HAS_WD93
>> 689 select SGI_HAS_ZILOG
>> 690 select SWAP_IO_SPACE
>> 691 select SYS_HAS_CPU_R4X00
>> 692 select SYS_HAS_CPU_R5000
>> 693 select SYS_HAS_EARLY_PRINTK
>> 694 select SYS_SUPPORTS_32BIT_KERNEL
>> 695 select SYS_SUPPORTS_64BIT_KERNEL
>> 696 select SYS_SUPPORTS_BIG_ENDIAN
>> 697 select MIPS_L1_CACHE_SHIFT_7
>> 698 help
>> 699 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 700 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 701 that runs on these, say Y here.
>> 702
>> 703 config SGI_IP27
>> 704 bool "SGI IP27 (Origin200/2000)"
>> 705 select ARCH_HAS_PHYS_TO_DMA
>> 706 select ARCH_SPARSEMEM_ENABLE
>> 707 select FW_ARC
>> 708 select FW_ARC64
>> 709 select ARC_CMDLINE_ONLY
>> 710 select BOOT_ELF64
>> 711 select DEFAULT_SGI_PARTITION
>> 712 select SYS_HAS_EARLY_PRINTK
>> 713 select HAVE_PCI
>> 714 select IRQ_MIPS_CPU
>> 715 select IRQ_DOMAIN_HIERARCHY
>> 716 select NR_CPUS_DEFAULT_64
>> 717 select PCI_DRIVERS_GENERIC
>> 718 select PCI_XTALK_BRIDGE
>> 719 select SYS_HAS_CPU_R10000
>> 720 select SYS_SUPPORTS_64BIT_KERNEL
>> 721 select SYS_SUPPORTS_BIG_ENDIAN
>> 722 select SYS_SUPPORTS_NUMA
>> 723 select SYS_SUPPORTS_SMP
>> 724 select MIPS_L1_CACHE_SHIFT_7
>> 725 select NUMA
>> 726 help
>> 727 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 728 workstations. To compile a Linux kernel that runs on these, say Y
>> 729 here.
250 730
251 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 731 config SGI_IP28
252 default 8 !! 732 bool "SGI IP28 (Indigo2 R10k)"
>> 733 select ARC_MEMORY
>> 734 select ARC_PROMLIB
>> 735 select FW_ARC
>> 736 select FW_ARC64
>> 737 select ARCH_MIGHT_HAVE_PC_SERIO
>> 738 select BOOT_ELF64
>> 739 select CEVT_R4K
>> 740 select CSRC_R4K
>> 741 select DEFAULT_SGI_PARTITION
>> 742 select DMA_NONCOHERENT
>> 743 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 744 select IRQ_MIPS_CPU
>> 745 select HAVE_EISA
>> 746 select I8253
>> 747 select I8259
>> 748 select SGI_HAS_I8042
>> 749 select SGI_HAS_INDYDOG
>> 750 select SGI_HAS_HAL2
>> 751 select SGI_HAS_SEEQ
>> 752 select SGI_HAS_WD93
>> 753 select SGI_HAS_ZILOG
>> 754 select SWAP_IO_SPACE
>> 755 select SYS_HAS_CPU_R10000
>> 756 select SYS_HAS_EARLY_PRINTK
>> 757 select SYS_SUPPORTS_64BIT_KERNEL
>> 758 select SYS_SUPPORTS_BIG_ENDIAN
>> 759 select MIPS_L1_CACHE_SHIFT_7
>> 760 help
>> 761 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 762 kernel that runs on these, say Y here.
>> 763
>> 764 config SGI_IP30
>> 765 bool "SGI IP30 (Octane/Octane2)"
>> 766 select ARCH_HAS_PHYS_TO_DMA
>> 767 select FW_ARC
>> 768 select FW_ARC64
>> 769 select BOOT_ELF64
>> 770 select CEVT_R4K
>> 771 select CSRC_R4K
>> 772 select SYNC_R4K if SMP
>> 773 select ZONE_DMA32
>> 774 select HAVE_PCI
>> 775 select IRQ_MIPS_CPU
>> 776 select IRQ_DOMAIN_HIERARCHY
>> 777 select NR_CPUS_DEFAULT_2
>> 778 select PCI_DRIVERS_GENERIC
>> 779 select PCI_XTALK_BRIDGE
>> 780 select SYS_HAS_EARLY_PRINTK
>> 781 select SYS_HAS_CPU_R10000
>> 782 select SYS_SUPPORTS_64BIT_KERNEL
>> 783 select SYS_SUPPORTS_BIG_ENDIAN
>> 784 select SYS_SUPPORTS_SMP
>> 785 select MIPS_L1_CACHE_SHIFT_7
>> 786 select ARC_MEMORY
>> 787 help
>> 788 These are the SGI Octane and Octane2 graphics workstations. To
>> 789 compile a Linux kernel that runs on these, say Y here.
>> 790
>> 791 config SGI_IP32
>> 792 bool "SGI IP32 (O2)"
>> 793 select ARC_MEMORY
>> 794 select ARC_PROMLIB
>> 795 select ARCH_HAS_PHYS_TO_DMA
>> 796 select FW_ARC
>> 797 select FW_ARC32
>> 798 select BOOT_ELF32
>> 799 select CEVT_R4K
>> 800 select CSRC_R4K
>> 801 select DMA_NONCOHERENT
>> 802 select HAVE_PCI
>> 803 select IRQ_MIPS_CPU
>> 804 select R5000_CPU_SCACHE
>> 805 select RM7000_CPU_SCACHE
>> 806 select SYS_HAS_CPU_R5000
>> 807 select SYS_HAS_CPU_R10000 if BROKEN
>> 808 select SYS_HAS_CPU_RM7000
>> 809 select SYS_HAS_CPU_NEVADA
>> 810 select SYS_SUPPORTS_64BIT_KERNEL
>> 811 select SYS_SUPPORTS_BIG_ENDIAN
>> 812 help
>> 813 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 814
>> 815 config SIBYTE_CRHINE
>> 816 bool "Sibyte BCM91120C-CRhine"
>> 817 select BOOT_ELF32
>> 818 select SIBYTE_BCM1120
>> 819 select SWAP_IO_SPACE
>> 820 select SYS_HAS_CPU_SB1
>> 821 select SYS_SUPPORTS_BIG_ENDIAN
>> 822 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 823
>> 824 config SIBYTE_CARMEL
>> 825 bool "Sibyte BCM91120x-Carmel"
>> 826 select BOOT_ELF32
>> 827 select SIBYTE_BCM1120
>> 828 select SWAP_IO_SPACE
>> 829 select SYS_HAS_CPU_SB1
>> 830 select SYS_SUPPORTS_BIG_ENDIAN
>> 831 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 832
>> 833 config SIBYTE_CRHONE
>> 834 bool "Sibyte BCM91125C-CRhone"
>> 835 select BOOT_ELF32
>> 836 select SIBYTE_BCM1125
>> 837 select SWAP_IO_SPACE
>> 838 select SYS_HAS_CPU_SB1
>> 839 select SYS_SUPPORTS_BIG_ENDIAN
>> 840 select SYS_SUPPORTS_HIGHMEM
>> 841 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 842
>> 843 config SIBYTE_RHONE
>> 844 bool "Sibyte BCM91125E-Rhone"
>> 845 select BOOT_ELF32
>> 846 select SIBYTE_BCM1125H
>> 847 select SWAP_IO_SPACE
>> 848 select SYS_HAS_CPU_SB1
>> 849 select SYS_SUPPORTS_BIG_ENDIAN
>> 850 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 851
>> 852 config SIBYTE_SWARM
>> 853 bool "Sibyte BCM91250A-SWARM"
>> 854 select BOOT_ELF32
>> 855 select HAVE_PATA_PLATFORM
>> 856 select SIBYTE_SB1250
>> 857 select SWAP_IO_SPACE
>> 858 select SYS_HAS_CPU_SB1
>> 859 select SYS_SUPPORTS_BIG_ENDIAN
>> 860 select SYS_SUPPORTS_HIGHMEM
>> 861 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 862 select ZONE_DMA32 if 64BIT
>> 863 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
253 864
254 # max bits determined by the following formula !! 865 config SIBYTE_LITTLESUR
255 # VA_BITS - PAGE_SHIFT - 3 !! 866 bool "Sibyte BCM91250C2-LittleSur"
256 config ARCH_MMAP_RND_BITS_MAX !! 867 select BOOT_ELF32
257 default 24 if 64BIT # SV39 based !! 868 select HAVE_PATA_PLATFORM
258 default 17 !! 869 select SIBYTE_SB1250
>> 870 select SWAP_IO_SPACE
>> 871 select SYS_HAS_CPU_SB1
>> 872 select SYS_SUPPORTS_BIG_ENDIAN
>> 873 select SYS_SUPPORTS_HIGHMEM
>> 874 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 875 select ZONE_DMA32 if 64BIT
259 876
260 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 877 config SIBYTE_SENTOSA
261 default 17 !! 878 bool "Sibyte BCM91250E-Sentosa"
>> 879 select BOOT_ELF32
>> 880 select SIBYTE_SB1250
>> 881 select SWAP_IO_SPACE
>> 882 select SYS_HAS_CPU_SB1
>> 883 select SYS_SUPPORTS_BIG_ENDIAN
>> 884 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 885 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 886
>> 887 config SIBYTE_BIGSUR
>> 888 bool "Sibyte BCM91480B-BigSur"
>> 889 select BOOT_ELF32
>> 890 select NR_CPUS_DEFAULT_4
>> 891 select SIBYTE_BCM1x80
>> 892 select SWAP_IO_SPACE
>> 893 select SYS_HAS_CPU_SB1
>> 894 select SYS_SUPPORTS_BIG_ENDIAN
>> 895 select SYS_SUPPORTS_HIGHMEM
>> 896 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 897 select ZONE_DMA32 if 64BIT
>> 898 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
262 899
263 # set if we run in machine mode, cleared if we !! 900 config SNI_RM
264 config RISCV_M_MODE !! 901 bool "SNI RM200/300/400"
265 bool "Build a kernel that runs in mach !! 902 select ARC_MEMORY
266 depends on !MMU !! 903 select ARC_PROMLIB
267 default y !! 904 select FW_ARC if CPU_LITTLE_ENDIAN
>> 905 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 906 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 907 select ARCH_MAY_HAVE_PC_FDC
>> 908 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 909 select ARCH_MIGHT_HAVE_PC_SERIO
>> 910 select BOOT_ELF32
>> 911 select CEVT_R4K
>> 912 select CSRC_R4K
>> 913 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 914 select DMA_NONCOHERENT
>> 915 select GENERIC_ISA_DMA
>> 916 select HAVE_EISA
>> 917 select HAVE_PCSPKR_PLATFORM
>> 918 select HAVE_PCI
>> 919 select IRQ_MIPS_CPU
>> 920 select I8253
>> 921 select I8259
>> 922 select ISA
>> 923 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 924 select SYS_HAS_CPU_R4X00
>> 925 select SYS_HAS_CPU_R5000
>> 926 select SYS_HAS_CPU_R10000
>> 927 select R5000_CPU_SCACHE
>> 928 select SYS_HAS_EARLY_PRINTK
>> 929 select SYS_SUPPORTS_32BIT_KERNEL
>> 930 select SYS_SUPPORTS_64BIT_KERNEL
>> 931 select SYS_SUPPORTS_BIG_ENDIAN
>> 932 select SYS_SUPPORTS_HIGHMEM
>> 933 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 934 help
>> 935 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 936 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 937 Technology and now in turn merged with Fujitsu. Say Y here to
>> 938 support this machine type.
>> 939
>> 940 config MACH_TX39XX
>> 941 bool "Toshiba TX39 series based machines"
>> 942
>> 943 config MACH_TX49XX
>> 944 bool "Toshiba TX49 series based machines"
>> 945
>> 946 config MIKROTIK_RB532
>> 947 bool "Mikrotik RB532 boards"
>> 948 select CEVT_R4K
>> 949 select CSRC_R4K
>> 950 select DMA_NONCOHERENT
>> 951 select HAVE_PCI
>> 952 select IRQ_MIPS_CPU
>> 953 select SYS_HAS_CPU_MIPS32_R1
>> 954 select SYS_SUPPORTS_32BIT_KERNEL
>> 955 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 956 select SWAP_IO_SPACE
>> 957 select BOOT_RAW
>> 958 select GPIOLIB
>> 959 select MIPS_L1_CACHE_SHIFT_4
>> 960 help
>> 961 Support the Mikrotik(tm) RouterBoard 532 series,
>> 962 based on the IDT RC32434 SoC.
>> 963
>> 964 config CAVIUM_OCTEON_SOC
>> 965 bool "Cavium Networks Octeon SoC based boards"
>> 966 select CEVT_R4K
>> 967 select ARCH_HAS_PHYS_TO_DMA
>> 968 select HAVE_RAPIDIO
>> 969 select PHYS_ADDR_T_64BIT
>> 970 select SYS_SUPPORTS_64BIT_KERNEL
>> 971 select SYS_SUPPORTS_BIG_ENDIAN
>> 972 select EDAC_SUPPORT
>> 973 select EDAC_ATOMIC_SCRUB
>> 974 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 975 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 976 select SYS_HAS_EARLY_PRINTK
>> 977 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 978 select HAVE_PCI
>> 979 select HAVE_PLAT_DELAY
>> 980 select HAVE_PLAT_FW_INIT_CMDLINE
>> 981 select HAVE_PLAT_MEMCPY
>> 982 select ZONE_DMA32
>> 983 select HOLES_IN_ZONE
>> 984 select GPIOLIB
>> 985 select USE_OF
>> 986 select ARCH_SPARSEMEM_ENABLE
>> 987 select SYS_SUPPORTS_SMP
>> 988 select NR_CPUS_DEFAULT_64
>> 989 select MIPS_NR_CPU_NR_MAP_1024
>> 990 select BUILTIN_DTB
>> 991 select MTD_COMPLEX_MAPPINGS
>> 992 select SWIOTLB
>> 993 select SYS_SUPPORTS_RELOCATABLE
>> 994 help
>> 995 This option supports all of the Octeon reference boards from Cavium
>> 996 Networks. It builds a kernel that dynamically determines the Octeon
>> 997 CPU type and supports all known board reference implementations.
>> 998 Some of the supported boards are:
>> 999 EBT3000
>> 1000 EBH3000
>> 1001 EBH3100
>> 1002 Thunder
>> 1003 Kodama
>> 1004 Hikari
>> 1005 Say Y here for most Octeon reference boards.
>> 1006
>> 1007 config NLM_XLR_BOARD
>> 1008 bool "Netlogic XLR/XLS based systems"
>> 1009 select BOOT_ELF32
>> 1010 select NLM_COMMON
>> 1011 select SYS_HAS_CPU_XLR
>> 1012 select SYS_SUPPORTS_SMP
>> 1013 select HAVE_PCI
>> 1014 select SWAP_IO_SPACE
>> 1015 select SYS_SUPPORTS_32BIT_KERNEL
>> 1016 select SYS_SUPPORTS_64BIT_KERNEL
>> 1017 select PHYS_ADDR_T_64BIT
>> 1018 select SYS_SUPPORTS_BIG_ENDIAN
>> 1019 select SYS_SUPPORTS_HIGHMEM
>> 1020 select NR_CPUS_DEFAULT_32
>> 1021 select CEVT_R4K
>> 1022 select CSRC_R4K
>> 1023 select IRQ_MIPS_CPU
>> 1024 select ZONE_DMA32 if 64BIT
>> 1025 select SYNC_R4K
>> 1026 select SYS_HAS_EARLY_PRINTK
>> 1027 select SYS_SUPPORTS_ZBOOT
>> 1028 select SYS_SUPPORTS_ZBOOT_UART16550
>> 1029 help
>> 1030 Support for systems based on Netlogic XLR and XLS processors.
>> 1031 Say Y here if you have a XLR or XLS based board.
>> 1032
>> 1033 config NLM_XLP_BOARD
>> 1034 bool "Netlogic XLP based systems"
>> 1035 select BOOT_ELF32
>> 1036 select NLM_COMMON
>> 1037 select SYS_HAS_CPU_XLP
>> 1038 select SYS_SUPPORTS_SMP
>> 1039 select HAVE_PCI
>> 1040 select SYS_SUPPORTS_32BIT_KERNEL
>> 1041 select SYS_SUPPORTS_64BIT_KERNEL
>> 1042 select PHYS_ADDR_T_64BIT
>> 1043 select GPIOLIB
>> 1044 select SYS_SUPPORTS_BIG_ENDIAN
>> 1045 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1046 select SYS_SUPPORTS_HIGHMEM
>> 1047 select NR_CPUS_DEFAULT_32
>> 1048 select CEVT_R4K
>> 1049 select CSRC_R4K
>> 1050 select IRQ_MIPS_CPU
>> 1051 select ZONE_DMA32 if 64BIT
>> 1052 select SYNC_R4K
>> 1053 select SYS_HAS_EARLY_PRINTK
>> 1054 select USE_OF
>> 1055 select SYS_SUPPORTS_ZBOOT
>> 1056 select SYS_SUPPORTS_ZBOOT_UART16550
>> 1057 help
>> 1058 This board is based on Netlogic XLP Processor.
>> 1059 Say Y here if you have a XLP based board.
>> 1060
>> 1061 config MIPS_PARAVIRT
>> 1062 bool "Para-Virtualized guest system"
>> 1063 select CEVT_R4K
>> 1064 select CSRC_R4K
>> 1065 select SYS_SUPPORTS_64BIT_KERNEL
>> 1066 select SYS_SUPPORTS_32BIT_KERNEL
>> 1067 select SYS_SUPPORTS_BIG_ENDIAN
>> 1068 select SYS_SUPPORTS_SMP
>> 1069 select NR_CPUS_DEFAULT_4
>> 1070 select SYS_HAS_EARLY_PRINTK
>> 1071 select SYS_HAS_CPU_MIPS32_R2
>> 1072 select SYS_HAS_CPU_MIPS64_R2
>> 1073 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1074 select HAVE_PCI
>> 1075 select SWAP_IO_SPACE
268 help 1076 help
269 Select this option if you want to ru !! 1077 This option supports guest running under ????
270 without the assistance of any other !! 1078
>> 1079 endchoice
>> 1080
>> 1081 source "arch/mips/alchemy/Kconfig"
>> 1082 source "arch/mips/ath25/Kconfig"
>> 1083 source "arch/mips/ath79/Kconfig"
>> 1084 source "arch/mips/bcm47xx/Kconfig"
>> 1085 source "arch/mips/bcm63xx/Kconfig"
>> 1086 source "arch/mips/bmips/Kconfig"
>> 1087 source "arch/mips/generic/Kconfig"
>> 1088 source "arch/mips/jazz/Kconfig"
>> 1089 source "arch/mips/jz4740/Kconfig"
>> 1090 source "arch/mips/lantiq/Kconfig"
>> 1091 source "arch/mips/lasat/Kconfig"
>> 1092 source "arch/mips/pic32/Kconfig"
>> 1093 source "arch/mips/pistachio/Kconfig"
>> 1094 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1095 source "arch/mips/ralink/Kconfig"
>> 1096 source "arch/mips/sgi-ip27/Kconfig"
>> 1097 source "arch/mips/sibyte/Kconfig"
>> 1098 source "arch/mips/txx9/Kconfig"
>> 1099 source "arch/mips/vr41xx/Kconfig"
>> 1100 source "arch/mips/cavium-octeon/Kconfig"
>> 1101 source "arch/mips/loongson2ef/Kconfig"
>> 1102 source "arch/mips/loongson32/Kconfig"
>> 1103 source "arch/mips/loongson64/Kconfig"
>> 1104 source "arch/mips/netlogic/Kconfig"
>> 1105 source "arch/mips/paravirt/Kconfig"
>> 1106
>> 1107 endmenu
271 1108
272 # set if we are running in S-mode and can use !! 1109 config GENERIC_HWEIGHT
273 config RISCV_SBI <<
274 bool 1110 bool
275 depends on !RISCV_M_MODE <<
276 default y 1111 default y
277 1112
278 config MMU !! 1113 config GENERIC_CALIBRATE_DELAY
279 bool "MMU-based Paged Memory Managemen !! 1114 bool
280 default y 1115 default y
281 help <<
282 Select if you want MMU-based virtual <<
283 support by paged memory management. <<
284 1116
285 config PAGE_OFFSET !! 1117 config SCHED_OMIT_FRAME_POINTER
286 hex !! 1118 bool
287 default 0x80000000 if !MMU && RISCV_M_ !! 1119 default y
288 default 0x80200000 if !MMU <<
289 default 0xc0000000 if 32BIT <<
290 default 0xff60000000000000 if 64BIT <<
291 <<
292 config KASAN_SHADOW_OFFSET <<
293 hex <<
294 depends on KASAN_GENERIC <<
295 default 0xdfffffff00000000 if 64BIT <<
296 default 0xffffffff if 32BIT <<
297 1120
298 config ARCH_FLATMEM_ENABLE !! 1121 #
299 def_bool !NUMA !! 1122 # Select some configuration options automatically based on user selections.
>> 1123 #
>> 1124 config FW_ARC
>> 1125 bool
300 1126
301 config ARCH_SPARSEMEM_ENABLE !! 1127 config ARCH_MAY_HAVE_PC_FDC
302 def_bool y !! 1128 bool
303 depends on MMU <<
304 select SPARSEMEM_STATIC if 32BIT && SP <<
305 select SPARSEMEM_VMEMMAP_ENABLE if 64B <<
306 1129
307 config ARCH_SELECT_MEMORY_MODEL !! 1130 config BOOT_RAW
308 def_bool ARCH_SPARSEMEM_ENABLE !! 1131 bool
309 1132
310 config ARCH_SUPPORTS_UPROBES !! 1133 config CEVT_BCM1480
311 def_bool y !! 1134 bool
312 1135
313 config STACKTRACE_SUPPORT !! 1136 config CEVT_DS1287
314 def_bool y !! 1137 bool
315 1138
316 config GENERIC_BUG !! 1139 config CEVT_GT641XX
317 def_bool y !! 1140 bool
318 depends on BUG <<
319 select GENERIC_BUG_RELATIVE_POINTERS i <<
320 1141
321 config GENERIC_BUG_RELATIVE_POINTERS !! 1142 config CEVT_R4K
322 bool 1143 bool
323 1144
324 config GENERIC_CALIBRATE_DELAY !! 1145 config CEVT_SB1250
325 def_bool y !! 1146 bool
326 1147
327 config GENERIC_CSUM !! 1148 config CEVT_TXX9
328 def_bool y !! 1149 bool
329 1150
330 config GENERIC_HWEIGHT !! 1151 config CSRC_BCM1480
331 def_bool y !! 1152 bool
332 1153
333 config FIX_EARLYCON_MEM !! 1154 config CSRC_IOASIC
334 def_bool MMU !! 1155 bool
335 1156
336 config ILLEGAL_POINTER_VALUE !! 1157 config CSRC_R4K
337 hex !! 1158 bool
338 default 0 if 32BIT <<
339 default 0xdead000000000000 if 64BIT <<
340 1159
341 config PGTABLE_LEVELS !! 1160 config CSRC_SB1250
342 int !! 1161 bool
343 default 5 if 64BIT <<
344 default 2 <<
345 1162
346 config LOCKDEP_SUPPORT !! 1163 config MIPS_CLOCK_VSYSCALL
347 def_bool y !! 1164 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
348 1165
349 config RISCV_DMA_NONCOHERENT !! 1166 config GPIO_TXX9
>> 1167 select GPIOLIB
>> 1168 bool
>> 1169
>> 1170 config FW_CFE
>> 1171 bool
>> 1172
>> 1173 config ARCH_SUPPORTS_UPROBES
>> 1174 bool
>> 1175
>> 1176 config DMA_MAYBE_COHERENT
>> 1177 select ARCH_HAS_DMA_COHERENCE_H
>> 1178 select DMA_NONCOHERENT
>> 1179 bool
>> 1180
>> 1181 config DMA_PERDEV_COHERENT
350 bool 1182 bool
351 select ARCH_HAS_DMA_PREP_COHERENT <<
352 select ARCH_HAS_SETUP_DMA_OPS 1183 select ARCH_HAS_SETUP_DMA_OPS
353 select ARCH_HAS_SYNC_DMA_FOR_CPU !! 1184 select DMA_NONCOHERENT
>> 1185
>> 1186 config DMA_NONCOHERENT
>> 1187 bool
>> 1188 #
>> 1189 # MIPS allows mixing "slightly different" Cacheability and Coherency
>> 1190 # Attribute bits. It is believed that the uncached access through
>> 1191 # KSEG1 and the implementation specific "uncached accelerated" used
>> 1192 # by pgprot_writcombine can be mixed, and the latter sometimes provides
>> 1193 # significant advantages.
>> 1194 #
>> 1195 select ARCH_HAS_DMA_WRITE_COMBINE
>> 1196 select ARCH_HAS_DMA_PREP_COHERENT
354 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 1197 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
355 select DMA_BOUNCE_UNALIGNED_KMALLOC if !! 1198 select ARCH_HAS_DMA_SET_UNCACHED
>> 1199 select DMA_NONCOHERENT_MMAP
>> 1200 select DMA_NONCOHERENT_CACHE_SYNC
>> 1201 select NEED_DMA_MAP_STATE
356 1202
357 config RISCV_NONSTANDARD_CACHE_OPS !! 1203 config SYS_HAS_EARLY_PRINTK
358 bool 1204 bool
359 help <<
360 This enables function pointer suppor <<
361 systems to handle cache management. <<
362 1205
363 config AS_HAS_INSN !! 1206 config SYS_SUPPORTS_HOTPLUG_CPU
364 def_bool $(as-instr,.insn r 51$(comma) !! 1207 bool
365 1208
366 config AS_HAS_OPTION_ARCH !! 1209 config MIPS_BONITO64
367 # https://github.com/llvm/llvm-project !! 1210 bool
368 def_bool y !! 1211
369 depends on $(as-instr, .option arch$(c !! 1212 config MIPS_MSC
>> 1213 bool
370 1214
371 source "arch/riscv/Kconfig.socs" !! 1215 config MIPS_NILE4
372 source "arch/riscv/Kconfig.errata" !! 1216 bool
373 1217
374 menu "Platform type" !! 1218 config SYNC_R4K
>> 1219 bool
375 1220
376 config NONPORTABLE !! 1221 config MIPS_MACHINE
377 bool "Allow configurations that result !! 1222 def_bool n
378 help <<
379 RISC-V kernel binaries are compatibl <<
380 whenever possible, but there are som <<
381 satisfied by configurations that res <<
382 not portable between systems. <<
383 1223
384 Selecting N does not guarantee kerne !! 1224 config NO_IOPORT_MAP
385 systems. Selecting any of the optio !! 1225 def_bool n
386 result in kernel binaries that are u <<
387 systems. <<
388 1226
389 If unsure, say N. !! 1227 config GENERIC_CSUM
>> 1228 def_bool CPU_NO_LOAD_STORE_LR
390 1229
391 choice !! 1230 config GENERIC_ISA_DMA
392 prompt "Base ISA" !! 1231 bool
393 default ARCH_RV64I !! 1232 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1233 select ISA_DMA_API
>> 1234
>> 1235 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1236 bool
>> 1237 select GENERIC_ISA_DMA
>> 1238
>> 1239 config HAVE_PLAT_DELAY
>> 1240 bool
>> 1241
>> 1242 config HAVE_PLAT_FW_INIT_CMDLINE
>> 1243 bool
>> 1244
>> 1245 config HAVE_PLAT_MEMCPY
>> 1246 bool
>> 1247
>> 1248 config ISA_DMA_API
>> 1249 bool
>> 1250
>> 1251 config HOLES_IN_ZONE
>> 1252 bool
>> 1253
>> 1254 config SYS_SUPPORTS_RELOCATABLE
>> 1255 bool
394 help 1256 help
395 This selects the base ISA that this !! 1257 Selected if the platform supports relocating the kernel.
396 the target platform. !! 1258 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1259 to allow access to command line and entropy sources.
397 1260
398 config ARCH_RV32I !! 1261 config MIPS_CBPF_JIT
399 bool "RV32I" !! 1262 def_bool y
400 depends on NONPORTABLE !! 1263 depends on BPF_JIT && HAVE_CBPF_JIT
401 select 32BIT <<
402 select GENERIC_LIB_ASHLDI3 <<
403 select GENERIC_LIB_ASHRDI3 <<
404 select GENERIC_LIB_LSHRDI3 <<
405 select GENERIC_LIB_UCMPDI2 <<
406 1264
407 config ARCH_RV64I !! 1265 config MIPS_EBPF_JIT
408 bool "RV64I" !! 1266 def_bool y
409 select 64BIT !! 1267 depends on BPF_JIT && HAVE_EBPF_JIT
410 select ARCH_SUPPORTS_INT128 if CC_HAS_ <<
411 select SWIOTLB if MMU <<
412 1268
413 endchoice <<
414 1269
415 # We must be able to map all physical memory i !! 1270 #
416 # is still a bit more efficient when generatin !! 1271 # Endianness selection. Sufficiently obscure so many users don't know what to
417 # such that it can only map 2GiB of memory. !! 1272 # answer,so we try hard to limit the available choices. Also the use of a
>> 1273 # choice statement should be more obvious to the user.
>> 1274 #
418 choice 1275 choice
419 prompt "Kernel Code Model" !! 1276 prompt "Endianness selection"
420 default CMODEL_MEDLOW if 32BIT !! 1277 help
421 default CMODEL_MEDANY if 64BIT !! 1278 Some MIPS machines can be configured for either little or big endian
422 !! 1279 byte order. These modes require different kernels and a different
423 config CMODEL_MEDLOW !! 1280 Linux distribution. In general there is one preferred byteorder for a
424 bool "medium low code model" !! 1281 particular system but some systems are just as commonly used in the
425 config CMODEL_MEDANY !! 1282 one or the other endianness.
426 bool "medium any code model" !! 1283
>> 1284 config CPU_BIG_ENDIAN
>> 1285 bool "Big endian"
>> 1286 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1287
>> 1288 config CPU_LITTLE_ENDIAN
>> 1289 bool "Little endian"
>> 1290 depends on SYS_SUPPORTS_LITTLE_ENDIAN
>> 1291
427 endchoice 1292 endchoice
428 1293
429 config MODULE_SECTIONS !! 1294 config EXPORT_UASM
430 bool 1295 bool
431 select HAVE_MOD_ARCH_SPECIFIC <<
432 1296
433 config SMP !! 1297 config SYS_SUPPORTS_APM_EMULATION
434 bool "Symmetric Multi-Processing" !! 1298 bool
435 help <<
436 This enables support for systems wit <<
437 you say N here, the kernel will run <<
438 multiprocessor machines, but will us <<
439 multiprocessor machine. If you say Y <<
440 on many, but not all, single process <<
441 processor machine, the kernel will r <<
442 here. <<
443 1299
444 If you don't know what to do here, s !! 1300 config SYS_SUPPORTS_BIG_ENDIAN
>> 1301 bool
445 1302
446 config SCHED_MC !! 1303 config SYS_SUPPORTS_LITTLE_ENDIAN
447 bool "Multi-core scheduler support" !! 1304 bool
448 depends on SMP <<
449 help <<
450 Multi-core scheduler support improve <<
451 making when dealing with multi-core <<
452 increased overhead in some places. I <<
453 1305
454 config NR_CPUS !! 1306 config SYS_SUPPORTS_HUGETLBFS
455 int "Maximum number of CPUs (2-512)" !! 1307 bool
456 depends on SMP !! 1308 depends on CPU_SUPPORTS_HUGEPAGES
457 range 2 512 if !RISCV_SBI_V01 !! 1309 default y
458 range 2 32 if RISCV_SBI_V01 && 32BIT <<
459 range 2 64 if RISCV_SBI_V01 && 64BIT <<
460 default "32" if 32BIT <<
461 default "64" if 64BIT <<
462 1310
463 config HOTPLUG_CPU !! 1311 config MIPS_HUGE_TLB_SUPPORT
464 bool "Support for hot-pluggable CPUs" !! 1312 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
465 depends on SMP <<
466 select GENERIC_IRQ_MIGRATION <<
467 help <<
468 1313
469 Say Y here to experiment with turnin !! 1314 config IRQ_CPU_RM7K
470 can be controlled through /sys/devic !! 1315 bool
471 1316
472 Say N if you want to disable CPU hot !! 1317 config IRQ_MSP_SLP
>> 1318 bool
>> 1319
>> 1320 config IRQ_MSP_CIC
>> 1321 bool
>> 1322
>> 1323 config IRQ_TXX9
>> 1324 bool
>> 1325
>> 1326 config IRQ_GT641XX
>> 1327 bool
>> 1328
>> 1329 config PCI_GT64XXX_PCI0
>> 1330 bool
>> 1331
>> 1332 config PCI_XTALK_BRIDGE
>> 1333 bool
>> 1334
>> 1335 config NO_EXCEPT_FILL
>> 1336 bool
>> 1337
>> 1338 config SOC_EMMA2RH
>> 1339 bool
>> 1340 select CEVT_R4K
>> 1341 select CSRC_R4K
>> 1342 select DMA_NONCOHERENT
>> 1343 select IRQ_MIPS_CPU
>> 1344 select SWAP_IO_SPACE
>> 1345 select SYS_HAS_CPU_R5500
>> 1346 select SYS_SUPPORTS_32BIT_KERNEL
>> 1347 select SYS_SUPPORTS_64BIT_KERNEL
>> 1348 select SYS_SUPPORTS_BIG_ENDIAN
>> 1349
>> 1350 config SOC_PNX833X
>> 1351 bool
>> 1352 select CEVT_R4K
>> 1353 select CSRC_R4K
>> 1354 select IRQ_MIPS_CPU
>> 1355 select DMA_NONCOHERENT
>> 1356 select SYS_HAS_CPU_MIPS32_R2
>> 1357 select SYS_SUPPORTS_32BIT_KERNEL
>> 1358 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1359 select SYS_SUPPORTS_BIG_ENDIAN
>> 1360 select SYS_SUPPORTS_MIPS16
>> 1361 select CPU_MIPSR2_IRQ_VI
>> 1362
>> 1363 config SOC_PNX8335
>> 1364 bool
>> 1365 select SOC_PNX833X
>> 1366
>> 1367 config MIPS_SPRAM
>> 1368 bool
>> 1369
>> 1370 config SWAP_IO_SPACE
>> 1371 bool
>> 1372
>> 1373 config SGI_HAS_INDYDOG
>> 1374 bool
>> 1375
>> 1376 config SGI_HAS_HAL2
>> 1377 bool
>> 1378
>> 1379 config SGI_HAS_SEEQ
>> 1380 bool
>> 1381
>> 1382 config SGI_HAS_WD93
>> 1383 bool
>> 1384
>> 1385 config SGI_HAS_ZILOG
>> 1386 bool
>> 1387
>> 1388 config SGI_HAS_I8042
>> 1389 bool
>> 1390
>> 1391 config DEFAULT_SGI_PARTITION
>> 1392 bool
>> 1393
>> 1394 config FW_ARC32
>> 1395 bool
>> 1396
>> 1397 config FW_SNIPROM
>> 1398 bool
>> 1399
>> 1400 config BOOT_ELF32
>> 1401 bool
>> 1402
>> 1403 config MIPS_L1_CACHE_SHIFT_4
>> 1404 bool
>> 1405
>> 1406 config MIPS_L1_CACHE_SHIFT_5
>> 1407 bool
>> 1408
>> 1409 config MIPS_L1_CACHE_SHIFT_6
>> 1410 bool
>> 1411
>> 1412 config MIPS_L1_CACHE_SHIFT_7
>> 1413 bool
>> 1414
>> 1415 config MIPS_L1_CACHE_SHIFT
>> 1416 int
>> 1417 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1418 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1419 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1420 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1421 default "5"
>> 1422
>> 1423 config HAVE_STD_PC_SERIAL_PORT
>> 1424 bool
>> 1425
>> 1426 config ARC_CMDLINE_ONLY
>> 1427 bool
>> 1428
>> 1429 config ARC_CONSOLE
>> 1430 bool "ARC console support"
>> 1431 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1432
>> 1433 config ARC_MEMORY
>> 1434 bool
>> 1435
>> 1436 config ARC_PROMLIB
>> 1437 bool
>> 1438
>> 1439 config FW_ARC64
>> 1440 bool
>> 1441
>> 1442 config BOOT_ELF64
>> 1443 bool
>> 1444
>> 1445 menu "CPU selection"
473 1446
474 choice 1447 choice
475 prompt "CPU Tuning" !! 1448 prompt "CPU type"
476 default TUNE_GENERIC !! 1449 default CPU_R4X00
477 1450
478 config TUNE_GENERIC !! 1451 config CPU_LOONGSON64
479 bool "generic" !! 1452 bool "Loongson 64-bit CPU"
>> 1453 depends on SYS_HAS_CPU_LOONGSON64
>> 1454 select ARCH_HAS_PHYS_TO_DMA
>> 1455 select CPU_MIPSR2
>> 1456 select CPU_HAS_PREFETCH
>> 1457 select CPU_SUPPORTS_64BIT_KERNEL
>> 1458 select CPU_SUPPORTS_HIGHMEM
>> 1459 select CPU_SUPPORTS_HUGEPAGES
>> 1460 select CPU_SUPPORTS_MSA
>> 1461 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
>> 1462 select CPU_MIPSR2_IRQ_VI
>> 1463 select WEAK_ORDERING
>> 1464 select WEAK_REORDERING_BEYOND_LLSC
>> 1465 select MIPS_ASID_BITS_VARIABLE
>> 1466 select MIPS_PGD_C0_CONTEXT
>> 1467 select MIPS_L1_CACHE_SHIFT_6
>> 1468 select GPIOLIB
>> 1469 select SWIOTLB
>> 1470 help
>> 1471 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
>> 1472 cores implements the MIPS64R2 instruction set with many extensions,
>> 1473 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
>> 1474 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
>> 1475 Loongson-2E/2F is not covered here and will be removed in future.
480 1476
>> 1477 config LOONGSON3_ENHANCEMENT
>> 1478 bool "New Loongson-3 CPU Enhancements"
>> 1479 default n
>> 1480 depends on CPU_LOONGSON64
>> 1481 help
>> 1482 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
>> 1483 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1484 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
>> 1485 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1486 Fast TLB refill support, etc.
>> 1487
>> 1488 This option enable those enhancements which are not probed at run
>> 1489 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1490 please say 'N' here. If you want a high-performance kernel to run on
>> 1491 new Loongson-3 machines only, please say 'Y' here.
>> 1492
>> 1493 config CPU_LOONGSON3_WORKAROUNDS
>> 1494 bool "Old Loongson-3 LLSC Workarounds"
>> 1495 default y if SMP
>> 1496 depends on CPU_LOONGSON64
>> 1497 help
>> 1498 Loongson-3 processors have the llsc issues which require workarounds.
>> 1499 Without workarounds the system may hang unexpectedly.
>> 1500
>> 1501 Newer Loongson-3 will fix these issues and no workarounds are needed.
>> 1502 The workarounds have no significant side effect on them but may
>> 1503 decrease the performance of the system so this option should be
>> 1504 disabled unless the kernel is intended to be run on old systems.
>> 1505
>> 1506 If unsure, please say Y.
>> 1507
>> 1508 config CPU_LOONGSON2E
>> 1509 bool "Loongson 2E"
>> 1510 depends on SYS_HAS_CPU_LOONGSON2E
>> 1511 select CPU_LOONGSON2EF
>> 1512 help
>> 1513 The Loongson 2E processor implements the MIPS III instruction set
>> 1514 with many extensions.
>> 1515
>> 1516 It has an internal FPGA northbridge, which is compatible to
>> 1517 bonito64.
>> 1518
>> 1519 config CPU_LOONGSON2F
>> 1520 bool "Loongson 2F"
>> 1521 depends on SYS_HAS_CPU_LOONGSON2F
>> 1522 select CPU_LOONGSON2EF
>> 1523 select GPIOLIB
>> 1524 help
>> 1525 The Loongson 2F processor implements the MIPS III instruction set
>> 1526 with many extensions.
>> 1527
>> 1528 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1529 have a similar programming interface with FPGA northbridge used in
>> 1530 Loongson2E.
>> 1531
>> 1532 config CPU_LOONGSON1B
>> 1533 bool "Loongson 1B"
>> 1534 depends on SYS_HAS_CPU_LOONGSON1B
>> 1535 select CPU_LOONGSON32
>> 1536 select LEDS_GPIO_REGISTER
>> 1537 help
>> 1538 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1539 Release 1 instruction set and part of the MIPS32 Release 2
>> 1540 instruction set.
>> 1541
>> 1542 config CPU_LOONGSON1C
>> 1543 bool "Loongson 1C"
>> 1544 depends on SYS_HAS_CPU_LOONGSON1C
>> 1545 select CPU_LOONGSON32
>> 1546 select LEDS_GPIO_REGISTER
>> 1547 help
>> 1548 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1549 Release 1 instruction set and part of the MIPS32 Release 2
>> 1550 instruction set.
>> 1551
>> 1552 config CPU_MIPS32_R1
>> 1553 bool "MIPS32 Release 1"
>> 1554 depends on SYS_HAS_CPU_MIPS32_R1
>> 1555 select CPU_HAS_PREFETCH
>> 1556 select CPU_SUPPORTS_32BIT_KERNEL
>> 1557 select CPU_SUPPORTS_HIGHMEM
>> 1558 help
>> 1559 Choose this option to build a kernel for release 1 or later of the
>> 1560 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1561 MIPS processor are based on a MIPS32 processor. If you know the
>> 1562 specific type of processor in your system, choose those that one
>> 1563 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1564 Release 2 of the MIPS32 architecture is available since several
>> 1565 years so chances are you even have a MIPS32 Release 2 processor
>> 1566 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1567 performance.
>> 1568
>> 1569 config CPU_MIPS32_R2
>> 1570 bool "MIPS32 Release 2"
>> 1571 depends on SYS_HAS_CPU_MIPS32_R2
>> 1572 select CPU_HAS_PREFETCH
>> 1573 select CPU_SUPPORTS_32BIT_KERNEL
>> 1574 select CPU_SUPPORTS_HIGHMEM
>> 1575 select CPU_SUPPORTS_MSA
>> 1576 select HAVE_KVM
>> 1577 help
>> 1578 Choose this option to build a kernel for release 2 or later of the
>> 1579 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1580 MIPS processor are based on a MIPS32 processor. If you know the
>> 1581 specific type of processor in your system, choose those that one
>> 1582 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1583
>> 1584 config CPU_MIPS32_R6
>> 1585 bool "MIPS32 Release 6"
>> 1586 depends on SYS_HAS_CPU_MIPS32_R6
>> 1587 select CPU_HAS_PREFETCH
>> 1588 select CPU_NO_LOAD_STORE_LR
>> 1589 select CPU_SUPPORTS_32BIT_KERNEL
>> 1590 select CPU_SUPPORTS_HIGHMEM
>> 1591 select CPU_SUPPORTS_MSA
>> 1592 select HAVE_KVM
>> 1593 select MIPS_O32_FP64_SUPPORT
>> 1594 help
>> 1595 Choose this option to build a kernel for release 6 or later of the
>> 1596 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1597 family, are based on a MIPS32r6 processor. If you own an older
>> 1598 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1599
>> 1600 config CPU_MIPS64_R1
>> 1601 bool "MIPS64 Release 1"
>> 1602 depends on SYS_HAS_CPU_MIPS64_R1
>> 1603 select CPU_HAS_PREFETCH
>> 1604 select CPU_SUPPORTS_32BIT_KERNEL
>> 1605 select CPU_SUPPORTS_64BIT_KERNEL
>> 1606 select CPU_SUPPORTS_HIGHMEM
>> 1607 select CPU_SUPPORTS_HUGEPAGES
>> 1608 help
>> 1609 Choose this option to build a kernel for release 1 or later of the
>> 1610 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1611 MIPS processor are based on a MIPS64 processor. If you know the
>> 1612 specific type of processor in your system, choose those that one
>> 1613 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1614 Release 2 of the MIPS64 architecture is available since several
>> 1615 years so chances are you even have a MIPS64 Release 2 processor
>> 1616 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1617 performance.
>> 1618
>> 1619 config CPU_MIPS64_R2
>> 1620 bool "MIPS64 Release 2"
>> 1621 depends on SYS_HAS_CPU_MIPS64_R2
>> 1622 select CPU_HAS_PREFETCH
>> 1623 select CPU_SUPPORTS_32BIT_KERNEL
>> 1624 select CPU_SUPPORTS_64BIT_KERNEL
>> 1625 select CPU_SUPPORTS_HIGHMEM
>> 1626 select CPU_SUPPORTS_HUGEPAGES
>> 1627 select CPU_SUPPORTS_MSA
>> 1628 select HAVE_KVM
>> 1629 help
>> 1630 Choose this option to build a kernel for release 2 or later of the
>> 1631 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1632 MIPS processor are based on a MIPS64 processor. If you know the
>> 1633 specific type of processor in your system, choose those that one
>> 1634 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1635
>> 1636 config CPU_MIPS64_R6
>> 1637 bool "MIPS64 Release 6"
>> 1638 depends on SYS_HAS_CPU_MIPS64_R6
>> 1639 select CPU_HAS_PREFETCH
>> 1640 select CPU_NO_LOAD_STORE_LR
>> 1641 select CPU_SUPPORTS_32BIT_KERNEL
>> 1642 select CPU_SUPPORTS_64BIT_KERNEL
>> 1643 select CPU_SUPPORTS_HIGHMEM
>> 1644 select CPU_SUPPORTS_HUGEPAGES
>> 1645 select CPU_SUPPORTS_MSA
>> 1646 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1647 select HAVE_KVM
>> 1648 help
>> 1649 Choose this option to build a kernel for release 6 or later of the
>> 1650 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1651 family, are based on a MIPS64r6 processor. If you own an older
>> 1652 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1653
>> 1654 config CPU_R3000
>> 1655 bool "R3000"
>> 1656 depends on SYS_HAS_CPU_R3000
>> 1657 select CPU_HAS_WB
>> 1658 select CPU_R3K_TLB
>> 1659 select CPU_SUPPORTS_32BIT_KERNEL
>> 1660 select CPU_SUPPORTS_HIGHMEM
>> 1661 help
>> 1662 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1663 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1664 *not* work on R4000 machines and vice versa. However, since most
>> 1665 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1666 might be a safe bet. If the resulting kernel does not work,
>> 1667 try to recompile with R3000.
>> 1668
>> 1669 config CPU_TX39XX
>> 1670 bool "R39XX"
>> 1671 depends on SYS_HAS_CPU_TX39XX
>> 1672 select CPU_SUPPORTS_32BIT_KERNEL
>> 1673 select CPU_R3K_TLB
>> 1674
>> 1675 config CPU_VR41XX
>> 1676 bool "R41xx"
>> 1677 depends on SYS_HAS_CPU_VR41XX
>> 1678 select CPU_SUPPORTS_32BIT_KERNEL
>> 1679 select CPU_SUPPORTS_64BIT_KERNEL
>> 1680 help
>> 1681 The options selects support for the NEC VR4100 series of processors.
>> 1682 Only choose this option if you have one of these processors as a
>> 1683 kernel built with this option will not run on any other type of
>> 1684 processor or vice versa.
>> 1685
>> 1686 config CPU_R4X00
>> 1687 bool "R4x00"
>> 1688 depends on SYS_HAS_CPU_R4X00
>> 1689 select CPU_SUPPORTS_32BIT_KERNEL
>> 1690 select CPU_SUPPORTS_64BIT_KERNEL
>> 1691 select CPU_SUPPORTS_HUGEPAGES
>> 1692 help
>> 1693 MIPS Technologies R4000-series processors other than 4300, including
>> 1694 the R4000, R4400, R4600, and 4700.
>> 1695
>> 1696 config CPU_TX49XX
>> 1697 bool "R49XX"
>> 1698 depends on SYS_HAS_CPU_TX49XX
>> 1699 select CPU_HAS_PREFETCH
>> 1700 select CPU_SUPPORTS_32BIT_KERNEL
>> 1701 select CPU_SUPPORTS_64BIT_KERNEL
>> 1702 select CPU_SUPPORTS_HUGEPAGES
>> 1703
>> 1704 config CPU_R5000
>> 1705 bool "R5000"
>> 1706 depends on SYS_HAS_CPU_R5000
>> 1707 select CPU_SUPPORTS_32BIT_KERNEL
>> 1708 select CPU_SUPPORTS_64BIT_KERNEL
>> 1709 select CPU_SUPPORTS_HUGEPAGES
>> 1710 help
>> 1711 MIPS Technologies R5000-series processors other than the Nevada.
>> 1712
>> 1713 config CPU_R5500
>> 1714 bool "R5500"
>> 1715 depends on SYS_HAS_CPU_R5500
>> 1716 select CPU_SUPPORTS_32BIT_KERNEL
>> 1717 select CPU_SUPPORTS_64BIT_KERNEL
>> 1718 select CPU_SUPPORTS_HUGEPAGES
>> 1719 help
>> 1720 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1721 instruction set.
>> 1722
>> 1723 config CPU_NEVADA
>> 1724 bool "RM52xx"
>> 1725 depends on SYS_HAS_CPU_NEVADA
>> 1726 select CPU_SUPPORTS_32BIT_KERNEL
>> 1727 select CPU_SUPPORTS_64BIT_KERNEL
>> 1728 select CPU_SUPPORTS_HUGEPAGES
>> 1729 help
>> 1730 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1731
>> 1732 config CPU_R10000
>> 1733 bool "R10000"
>> 1734 depends on SYS_HAS_CPU_R10000
>> 1735 select CPU_HAS_PREFETCH
>> 1736 select CPU_SUPPORTS_32BIT_KERNEL
>> 1737 select CPU_SUPPORTS_64BIT_KERNEL
>> 1738 select CPU_SUPPORTS_HIGHMEM
>> 1739 select CPU_SUPPORTS_HUGEPAGES
>> 1740 help
>> 1741 MIPS Technologies R10000-series processors.
>> 1742
>> 1743 config CPU_RM7000
>> 1744 bool "RM7000"
>> 1745 depends on SYS_HAS_CPU_RM7000
>> 1746 select CPU_HAS_PREFETCH
>> 1747 select CPU_SUPPORTS_32BIT_KERNEL
>> 1748 select CPU_SUPPORTS_64BIT_KERNEL
>> 1749 select CPU_SUPPORTS_HIGHMEM
>> 1750 select CPU_SUPPORTS_HUGEPAGES
>> 1751
>> 1752 config CPU_SB1
>> 1753 bool "SB1"
>> 1754 depends on SYS_HAS_CPU_SB1
>> 1755 select CPU_SUPPORTS_32BIT_KERNEL
>> 1756 select CPU_SUPPORTS_64BIT_KERNEL
>> 1757 select CPU_SUPPORTS_HIGHMEM
>> 1758 select CPU_SUPPORTS_HUGEPAGES
>> 1759 select WEAK_ORDERING
>> 1760
>> 1761 config CPU_CAVIUM_OCTEON
>> 1762 bool "Cavium Octeon processor"
>> 1763 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1764 select CPU_HAS_PREFETCH
>> 1765 select CPU_SUPPORTS_64BIT_KERNEL
>> 1766 select WEAK_ORDERING
>> 1767 select CPU_SUPPORTS_HIGHMEM
>> 1768 select CPU_SUPPORTS_HUGEPAGES
>> 1769 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1770 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1771 select MIPS_L1_CACHE_SHIFT_7
>> 1772 select HAVE_KVM
>> 1773 help
>> 1774 The Cavium Octeon processor is a highly integrated chip containing
>> 1775 many ethernet hardware widgets for networking tasks. The processor
>> 1776 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1777 Full details can be found at http://www.caviumnetworks.com.
>> 1778
>> 1779 config CPU_BMIPS
>> 1780 bool "Broadcom BMIPS"
>> 1781 depends on SYS_HAS_CPU_BMIPS
>> 1782 select CPU_MIPS32
>> 1783 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1784 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1785 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1786 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1787 select CPU_SUPPORTS_32BIT_KERNEL
>> 1788 select DMA_NONCOHERENT
>> 1789 select IRQ_MIPS_CPU
>> 1790 select SWAP_IO_SPACE
>> 1791 select WEAK_ORDERING
>> 1792 select CPU_SUPPORTS_HIGHMEM
>> 1793 select CPU_HAS_PREFETCH
>> 1794 select CPU_SUPPORTS_CPUFREQ
>> 1795 select MIPS_EXTERNAL_TIMER
>> 1796 help
>> 1797 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1798
>> 1799 config CPU_XLR
>> 1800 bool "Netlogic XLR SoC"
>> 1801 depends on SYS_HAS_CPU_XLR
>> 1802 select CPU_SUPPORTS_32BIT_KERNEL
>> 1803 select CPU_SUPPORTS_64BIT_KERNEL
>> 1804 select CPU_SUPPORTS_HIGHMEM
>> 1805 select CPU_SUPPORTS_HUGEPAGES
>> 1806 select WEAK_ORDERING
>> 1807 select WEAK_REORDERING_BEYOND_LLSC
>> 1808 help
>> 1809 Netlogic Microsystems XLR/XLS processors.
>> 1810
>> 1811 config CPU_XLP
>> 1812 bool "Netlogic XLP SoC"
>> 1813 depends on SYS_HAS_CPU_XLP
>> 1814 select CPU_SUPPORTS_32BIT_KERNEL
>> 1815 select CPU_SUPPORTS_64BIT_KERNEL
>> 1816 select CPU_SUPPORTS_HIGHMEM
>> 1817 select WEAK_ORDERING
>> 1818 select WEAK_REORDERING_BEYOND_LLSC
>> 1819 select CPU_HAS_PREFETCH
>> 1820 select CPU_MIPSR2
>> 1821 select CPU_SUPPORTS_HUGEPAGES
>> 1822 select MIPS_ASID_BITS_VARIABLE
>> 1823 help
>> 1824 Netlogic Microsystems XLP processors.
481 endchoice 1825 endchoice
482 1826
483 # Common NUMA Features !! 1827 config CPU_MIPS32_3_5_FEATURES
484 config NUMA !! 1828 bool "MIPS32 Release 3.5 Features"
485 bool "NUMA Memory Allocation and Sched !! 1829 depends on SYS_HAS_CPU_MIPS32_R3_5
486 depends on SMP && MMU !! 1830 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
487 select ARCH_SUPPORTS_NUMA_BALANCING !! 1831 help
488 select GENERIC_ARCH_NUMA !! 1832 Choose this option to build a kernel for release 2 or later of the
489 select HAVE_SETUP_PER_CPU_AREA !! 1833 MIPS32 architecture including features from the 3.5 release such as
490 select NEED_PER_CPU_EMBED_FIRST_CHUNK !! 1834 support for Enhanced Virtual Addressing (EVA).
491 select NEED_PER_CPU_PAGE_FIRST_CHUNK !! 1835
492 select OF_NUMA !! 1836 config CPU_MIPS32_3_5_EVA
493 select USE_PERCPU_NUMA_NODE_ID !! 1837 bool "Enhanced Virtual Addressing (EVA)"
>> 1838 depends on CPU_MIPS32_3_5_FEATURES
>> 1839 select EVA
>> 1840 default y
>> 1841 help
>> 1842 Choose this option if you want to enable the Enhanced Virtual
>> 1843 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1844 One of its primary benefits is an increase in the maximum size
>> 1845 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1846
>> 1847 config CPU_MIPS32_R5_FEATURES
>> 1848 bool "MIPS32 Release 5 Features"
>> 1849 depends on SYS_HAS_CPU_MIPS32_R5
>> 1850 depends on CPU_MIPS32_R2
>> 1851 help
>> 1852 Choose this option to build a kernel for release 2 or later of the
>> 1853 MIPS32 architecture including features from release 5 such as
>> 1854 support for Extended Physical Addressing (XPA).
>> 1855
>> 1856 config CPU_MIPS32_R5_XPA
>> 1857 bool "Extended Physical Addressing (XPA)"
>> 1858 depends on CPU_MIPS32_R5_FEATURES
>> 1859 depends on !EVA
>> 1860 depends on !PAGE_SIZE_4KB
>> 1861 depends on SYS_SUPPORTS_HIGHMEM
>> 1862 select XPA
>> 1863 select HIGHMEM
>> 1864 select PHYS_ADDR_T_64BIT
>> 1865 default n
494 help 1866 help
495 Enable NUMA (Non-Uniform Memory Acce !! 1867 Choose this option if you want to enable the Extended Physical
>> 1868 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1869 benefit is to increase physical addressing equal to or greater
>> 1870 than 40 bits. Note that this has the side effect of turning on
>> 1871 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1872 If unsure, say 'N' here.
496 1873
497 The kernel will try to allocate memo !! 1874 if CPU_LOONGSON2F
498 local memory of the CPU and add some !! 1875 config CPU_NOP_WORKAROUNDS
>> 1876 bool
499 1877
500 config NODES_SHIFT !! 1878 config CPU_JUMP_WORKAROUNDS
501 int "Maximum NUMA Nodes (as a power of !! 1879 bool
502 range 1 10 !! 1880
503 default "2" !! 1881 config CPU_LOONGSON2F_WORKAROUNDS
504 depends on NUMA !! 1882 bool "Loongson 2F Workarounds"
>> 1883 default y
>> 1884 select CPU_NOP_WORKAROUNDS
>> 1885 select CPU_JUMP_WORKAROUNDS
505 help 1886 help
506 Specify the maximum number of NUMA N !! 1887 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
507 system. Increases memory reserved t !! 1888 require workarounds. Without workarounds the system may hang
>> 1889 unexpectedly. For more information please refer to the gas
>> 1890 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1891
>> 1892 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1893 are needed. The workarounds have no significant side effect on them
>> 1894 but may decrease the performance of the system so this option should
>> 1895 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1896 systems.
>> 1897
>> 1898 If unsure, please say Y.
>> 1899 endif # CPU_LOONGSON2F
508 1900
509 config RISCV_ALTERNATIVE !! 1901 config SYS_SUPPORTS_ZBOOT
>> 1902 bool
>> 1903 select HAVE_KERNEL_GZIP
>> 1904 select HAVE_KERNEL_BZIP2
>> 1905 select HAVE_KERNEL_LZ4
>> 1906 select HAVE_KERNEL_LZMA
>> 1907 select HAVE_KERNEL_LZO
>> 1908 select HAVE_KERNEL_XZ
>> 1909
>> 1910 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1911 bool
>> 1912 select SYS_SUPPORTS_ZBOOT
>> 1913
>> 1914 config SYS_SUPPORTS_ZBOOT_UART_PROM
>> 1915 bool
>> 1916 select SYS_SUPPORTS_ZBOOT
>> 1917
>> 1918 config CPU_LOONGSON2EF
>> 1919 bool
>> 1920 select CPU_SUPPORTS_32BIT_KERNEL
>> 1921 select CPU_SUPPORTS_64BIT_KERNEL
>> 1922 select CPU_SUPPORTS_HIGHMEM
>> 1923 select CPU_SUPPORTS_HUGEPAGES
>> 1924 select ARCH_HAS_PHYS_TO_DMA
>> 1925
>> 1926 config CPU_LOONGSON32
>> 1927 bool
>> 1928 select CPU_MIPS32
>> 1929 select CPU_MIPSR2
>> 1930 select CPU_HAS_PREFETCH
>> 1931 select CPU_SUPPORTS_32BIT_KERNEL
>> 1932 select CPU_SUPPORTS_HIGHMEM
>> 1933 select CPU_SUPPORTS_CPUFREQ
>> 1934
>> 1935 config CPU_BMIPS32_3300
>> 1936 select SMP_UP if SMP
>> 1937 bool
>> 1938
>> 1939 config CPU_BMIPS4350
>> 1940 bool
>> 1941 select SYS_SUPPORTS_SMP
>> 1942 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1943
>> 1944 config CPU_BMIPS4380
>> 1945 bool
>> 1946 select MIPS_L1_CACHE_SHIFT_6
>> 1947 select SYS_SUPPORTS_SMP
>> 1948 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1949 select CPU_HAS_RIXI
>> 1950
>> 1951 config CPU_BMIPS5000
>> 1952 bool
>> 1953 select MIPS_CPU_SCACHE
>> 1954 select MIPS_L1_CACHE_SHIFT_7
>> 1955 select SYS_SUPPORTS_SMP
>> 1956 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1957 select CPU_HAS_RIXI
>> 1958
>> 1959 config SYS_HAS_CPU_LOONGSON64
>> 1960 bool
>> 1961 select CPU_SUPPORTS_CPUFREQ
>> 1962 select CPU_HAS_RIXI
>> 1963
>> 1964 config SYS_HAS_CPU_LOONGSON2E
>> 1965 bool
>> 1966
>> 1967 config SYS_HAS_CPU_LOONGSON2F
>> 1968 bool
>> 1969 select CPU_SUPPORTS_CPUFREQ
>> 1970 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1971
>> 1972 config SYS_HAS_CPU_LOONGSON1B
>> 1973 bool
>> 1974
>> 1975 config SYS_HAS_CPU_LOONGSON1C
>> 1976 bool
>> 1977
>> 1978 config SYS_HAS_CPU_MIPS32_R1
>> 1979 bool
>> 1980
>> 1981 config SYS_HAS_CPU_MIPS32_R2
510 bool 1982 bool
511 depends on !XIP_KERNEL <<
512 help <<
513 This Kconfig allows the kernel to au <<
514 erratum or cpufeature required by th <<
515 time. The code patching overhead is <<
516 once at boot and once on each module <<
517 1983
518 config RISCV_ALTERNATIVE_EARLY !! 1984 config SYS_HAS_CPU_MIPS32_R3_5
519 bool 1985 bool
520 depends on RISCV_ALTERNATIVE !! 1986
>> 1987 config SYS_HAS_CPU_MIPS32_R5
>> 1988 bool
>> 1989 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1990
>> 1991 config SYS_HAS_CPU_MIPS32_R6
>> 1992 bool
>> 1993 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1994
>> 1995 config SYS_HAS_CPU_MIPS64_R1
>> 1996 bool
>> 1997
>> 1998 config SYS_HAS_CPU_MIPS64_R2
>> 1999 bool
>> 2000
>> 2001 config SYS_HAS_CPU_MIPS64_R6
>> 2002 bool
>> 2003 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 2004
>> 2005 config SYS_HAS_CPU_R3000
>> 2006 bool
>> 2007
>> 2008 config SYS_HAS_CPU_TX39XX
>> 2009 bool
>> 2010
>> 2011 config SYS_HAS_CPU_VR41XX
>> 2012 bool
>> 2013
>> 2014 config SYS_HAS_CPU_R4X00
>> 2015 bool
>> 2016
>> 2017 config SYS_HAS_CPU_TX49XX
>> 2018 bool
>> 2019
>> 2020 config SYS_HAS_CPU_R5000
>> 2021 bool
>> 2022
>> 2023 config SYS_HAS_CPU_R5500
>> 2024 bool
>> 2025
>> 2026 config SYS_HAS_CPU_NEVADA
>> 2027 bool
>> 2028
>> 2029 config SYS_HAS_CPU_R10000
>> 2030 bool
>> 2031 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 2032
>> 2033 config SYS_HAS_CPU_RM7000
>> 2034 bool
>> 2035
>> 2036 config SYS_HAS_CPU_SB1
>> 2037 bool
>> 2038
>> 2039 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 2040 bool
>> 2041
>> 2042 config SYS_HAS_CPU_BMIPS
>> 2043 bool
>> 2044
>> 2045 config SYS_HAS_CPU_BMIPS32_3300
>> 2046 bool
>> 2047 select SYS_HAS_CPU_BMIPS
>> 2048
>> 2049 config SYS_HAS_CPU_BMIPS4350
>> 2050 bool
>> 2051 select SYS_HAS_CPU_BMIPS
>> 2052
>> 2053 config SYS_HAS_CPU_BMIPS4380
>> 2054 bool
>> 2055 select SYS_HAS_CPU_BMIPS
>> 2056
>> 2057 config SYS_HAS_CPU_BMIPS5000
>> 2058 bool
>> 2059 select SYS_HAS_CPU_BMIPS
>> 2060 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 2061
>> 2062 config SYS_HAS_CPU_XLR
>> 2063 bool
>> 2064
>> 2065 config SYS_HAS_CPU_XLP
>> 2066 bool
>> 2067
>> 2068 #
>> 2069 # CPU may reorder R->R, R->W, W->R, W->W
>> 2070 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 2071 #
>> 2072 config WEAK_ORDERING
>> 2073 bool
>> 2074
>> 2075 #
>> 2076 # CPU may reorder reads and writes beyond LL/SC
>> 2077 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 2078 #
>> 2079 config WEAK_REORDERING_BEYOND_LLSC
>> 2080 bool
>> 2081 endmenu
>> 2082
>> 2083 #
>> 2084 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2085 #
>> 2086 config CPU_MIPS32
>> 2087 bool
>> 2088 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 2089
>> 2090 config CPU_MIPS64
>> 2091 bool
>> 2092 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
>> 2093
>> 2094 #
>> 2095 # These indicate the revision of the architecture
>> 2096 #
>> 2097 config CPU_MIPSR1
>> 2098 bool
>> 2099 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2100
>> 2101 config CPU_MIPSR2
>> 2102 bool
>> 2103 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2104 select CPU_HAS_RIXI
>> 2105 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2106 select MIPS_SPRAM
>> 2107
>> 2108 config CPU_MIPSR6
>> 2109 bool
>> 2110 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2111 select CPU_HAS_RIXI
>> 2112 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2113 select HAVE_ARCH_BITREVERSE
>> 2114 select MIPS_ASID_BITS_VARIABLE
>> 2115 select MIPS_CRC_SUPPORT
>> 2116 select MIPS_SPRAM
>> 2117
>> 2118 config TARGET_ISA_REV
>> 2119 int
>> 2120 default 1 if CPU_MIPSR1
>> 2121 default 2 if CPU_MIPSR2
>> 2122 default 6 if CPU_MIPSR6
>> 2123 default 0
521 help 2124 help
522 Allows early patching of the kernel !! 2125 Reflects the ISA revision being targeted by the kernel build. This
>> 2126 is effectively the Kconfig equivalent of MIPS_ISA_REV.
523 2127
524 config RISCV_ISA_C !! 2128 config EVA
525 bool "Emit compressed instructions whe !! 2129 bool
526 default y !! 2130
>> 2131 config XPA
>> 2132 bool
>> 2133
>> 2134 config SYS_SUPPORTS_32BIT_KERNEL
>> 2135 bool
>> 2136 config SYS_SUPPORTS_64BIT_KERNEL
>> 2137 bool
>> 2138 config CPU_SUPPORTS_32BIT_KERNEL
>> 2139 bool
>> 2140 config CPU_SUPPORTS_64BIT_KERNEL
>> 2141 bool
>> 2142 config CPU_SUPPORTS_CPUFREQ
>> 2143 bool
>> 2144 config CPU_SUPPORTS_ADDRWINCFG
>> 2145 bool
>> 2146 config CPU_SUPPORTS_HUGEPAGES
>> 2147 bool
>> 2148 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
>> 2149 config MIPS_PGD_C0_CONTEXT
>> 2150 bool
>> 2151 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
>> 2152
>> 2153 #
>> 2154 # Set to y for ptrace access to watch registers.
>> 2155 #
>> 2156 config HARDWARE_WATCHPOINTS
>> 2157 bool
>> 2158 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2159
>> 2160 menu "Kernel type"
>> 2161
>> 2162 choice
>> 2163 prompt "Kernel code model"
527 help 2164 help
528 Adds "C" to the ISA subsets that the !! 2165 You should only select this option if you have a workload that
529 when building Linux, which results i !! 2166 actually benefits from 64-bit processing or if your machine has
530 Linux binary. !! 2167 large memory. You will only be presented a single option in this
>> 2168 menu if your system does not support both 32-bit and 64-bit kernels.
531 2169
532 If you don't know what to do here, s !! 2170 config 32BIT
>> 2171 bool "32-bit kernel"
>> 2172 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2173 select TRAD_SIGNALS
>> 2174 help
>> 2175 Select this option if you want to build a 32-bit kernel.
533 2176
534 config RISCV_ISA_SVNAPOT !! 2177 config 64BIT
535 bool "Svnapot extension support for su !! 2178 bool "64-bit kernel"
536 depends on 64BIT && MMU !! 2179 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
537 depends on RISCV_ALTERNATIVE <<
538 default y <<
539 help 2180 help
540 Allow kernel to detect the Svnapot I !! 2181 Select this option if you want to build a 64-bit kernel.
541 time and enable its usage. <<
542 2182
543 The Svnapot extension is used to mar !! 2183 endchoice
544 of contiguous virtual-to-physical tr <<
545 aligned power-of-2 (NAPOT) granulari <<
546 size. When HUGETLBFS is also selecte <<
547 allocates some memory for each NAPOT <<
548 When optimizing for low memory consu <<
549 the Svnapot extension, it may be bet <<
550 2184
551 If you don't know what to do here, s !! 2185 config KVM_GUEST
>> 2186 bool "KVM Guest Kernel"
>> 2187 depends on BROKEN_ON_SMP
>> 2188 help
>> 2189 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2190 mode.
>> 2191
>> 2192 config KVM_GUEST_TIMER_FREQ
>> 2193 int "Count/Compare Timer Frequency (MHz)"
>> 2194 depends on KVM_GUEST
>> 2195 default 100
>> 2196 help
>> 2197 Set this to non-zero if building a guest kernel for KVM to skip RTC
>> 2198 emulation when determining guest CPU Frequency. Instead, the guest's
>> 2199 timer frequency is specified directly.
552 2200
553 config RISCV_ISA_SVPBMT !! 2201 config MIPS_VA_BITS_48
554 bool "Svpbmt extension support for sup !! 2202 bool "48 bits virtual memory"
555 depends on 64BIT && MMU !! 2203 depends on 64BIT
556 depends on RISCV_ALTERNATIVE <<
557 default y <<
558 help 2204 help
559 Adds support to dynamically detect !! 2205 Support a maximum at least 48 bits of application virtual
560 ISA-extension (Supervisor-mode: pag !! 2206 memory. Default is 40 bits or less, depending on the CPU.
561 enable its usage. !! 2207 For page sizes 16k and above, this option results in a small
>> 2208 memory overhead for page tables. For 4k page size, a fourth
>> 2209 level of page tables is added which imposes both a memory
>> 2210 overhead as well as slower TLB fault handling.
>> 2211
>> 2212 If unsure, say N.
562 2213
563 The memory type for a page contains !! 2214 choice
564 that indicate the cacheability, ide !! 2215 prompt "Kernel page size"
565 properties for access to that page. !! 2216 default PAGE_SIZE_4KB
566 2217
567 The Svpbmt extension is only availa !! 2218 config PAGE_SIZE_4KB
>> 2219 bool "4kB"
>> 2220 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
>> 2221 help
>> 2222 This option select the standard 4kB Linux page size. On some
>> 2223 R3000-family processors this is the only available page size. Using
>> 2224 4kB page size will minimize memory consumption and is therefore
>> 2225 recommended for low memory systems.
>> 2226
>> 2227 config PAGE_SIZE_8KB
>> 2228 bool "8kB"
>> 2229 depends on CPU_CAVIUM_OCTEON
>> 2230 depends on !MIPS_VA_BITS_48
>> 2231 help
>> 2232 Using 8kB page size will result in higher performance kernel at
>> 2233 the price of higher memory consumption. This option is available
>> 2234 only on cnMIPS processors. Note that you will need a suitable Linux
>> 2235 distribution to support this.
>> 2236
>> 2237 config PAGE_SIZE_16KB
>> 2238 bool "16kB"
>> 2239 depends on !CPU_R3000 && !CPU_TX39XX
>> 2240 help
>> 2241 Using 16kB page size will result in higher performance kernel at
>> 2242 the price of higher memory consumption. This option is available on
>> 2243 all non-R3000 family processors. Note that you will need a suitable
>> 2244 Linux distribution to support this.
>> 2245
>> 2246 config PAGE_SIZE_32KB
>> 2247 bool "32kB"
>> 2248 depends on CPU_CAVIUM_OCTEON
>> 2249 depends on !MIPS_VA_BITS_48
>> 2250 help
>> 2251 Using 32kB page size will result in higher performance kernel at
>> 2252 the price of higher memory consumption. This option is available
>> 2253 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2254 distribution to support this.
>> 2255
>> 2256 config PAGE_SIZE_64KB
>> 2257 bool "64kB"
>> 2258 depends on !CPU_R3000 && !CPU_TX39XX
>> 2259 help
>> 2260 Using 64kB page size will result in higher performance kernel at
>> 2261 the price of higher memory consumption. This option is available on
>> 2262 all non-R3000 family processor. Not that at the time of this
>> 2263 writing this option is still high experimental.
568 2264
569 If you don't know what to do here, !! 2265 endchoice
570 2266
571 config TOOLCHAIN_HAS_V !! 2267 config FORCE_MAX_ZONEORDER
>> 2268 int "Maximum zone order"
>> 2269 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2270 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2271 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2272 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2273 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2274 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2275 range 11 64
>> 2276 default "11"
>> 2277 help
>> 2278 The kernel memory allocator divides physically contiguous memory
>> 2279 blocks into "zones", where each zone is a power of two number of
>> 2280 pages. This option selects the largest power of two that the kernel
>> 2281 keeps in the memory allocator. If you need to allocate very large
>> 2282 blocks of physically contiguous memory, then you may need to
>> 2283 increase this value.
>> 2284
>> 2285 This config option is actually maximum order plus one. For example,
>> 2286 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2287
>> 2288 The page size is not necessarily 4KB. Keep this in mind
>> 2289 when choosing a value for this option.
>> 2290
>> 2291 config BOARD_SCACHE
572 bool 2292 bool
573 default y <<
574 depends on !64BIT || $(cc-option,-mabi <<
575 depends on !32BIT || $(cc-option,-mabi <<
576 depends on LLD_VERSION >= 140000 || LD <<
577 depends on AS_HAS_OPTION_ARCH <<
578 2293
579 config RISCV_ISA_V !! 2294 config IP22_CPU_SCACHE
580 bool "VECTOR extension support" !! 2295 bool
581 depends on TOOLCHAIN_HAS_V !! 2296 select BOARD_SCACHE
582 depends on FPU !! 2297
583 select DYNAMIC_SIGFRAME !! 2298 #
584 default y !! 2299 # Support for a MIPS32 / MIPS64 style S-caches
>> 2300 #
>> 2301 config MIPS_CPU_SCACHE
>> 2302 bool
>> 2303 select BOARD_SCACHE
>> 2304
>> 2305 config R5000_CPU_SCACHE
>> 2306 bool
>> 2307 select BOARD_SCACHE
>> 2308
>> 2309 config RM7000_CPU_SCACHE
>> 2310 bool
>> 2311 select BOARD_SCACHE
>> 2312
>> 2313 config SIBYTE_DMA_PAGEOPS
>> 2314 bool "Use DMA to clear/copy pages"
>> 2315 depends on CPU_SB1
585 help 2316 help
586 Say N here if you want to disable al !! 2317 Instead of using the CPU to zero and copy pages, use a Data Mover
587 in the kernel. !! 2318 channel. These DMA channels are otherwise unused by the standard
>> 2319 SiByte Linux port. Seems to give a small performance benefit.
>> 2320
>> 2321 config CPU_HAS_PREFETCH
>> 2322 bool
588 2323
589 If you don't know what to do here, s !! 2324 config CPU_GENERIC_DUMP_TLB
>> 2325 bool
>> 2326 default y if !(CPU_R3000 || CPU_TX39XX)
590 2327
591 config RISCV_ISA_V_DEFAULT_ENABLE !! 2328 config MIPS_FP_SUPPORT
592 bool "Enable userspace Vector by defau !! 2329 bool "Floating Point support" if EXPERT
593 depends on RISCV_ISA_V <<
594 default y 2330 default y
595 help 2331 help
596 Say Y here if you want to enable Vec !! 2332 Select y to include support for floating point in the kernel
597 Otherwise, userspace has to make exp !! 2333 including initialization of FPU hardware, FP context save & restore
598 Vector, or enable it via the sysctl !! 2334 and emulation of an FPU where necessary. Without this support any
>> 2335 userland program attempting to use floating point instructions will
>> 2336 receive a SIGILL.
599 2337
600 If you don't know what to do here, s !! 2338 If you know that your userland will not attempt to use floating point
>> 2339 instructions then you can say n here to shrink the kernel a little.
601 2340
602 config RISCV_ISA_V_UCOPY_THRESHOLD !! 2341 If unsure, say y.
603 int "Threshold size for vectorized use !! 2342
604 depends on RISCV_ISA_V !! 2343 config CPU_R2300_FPU
605 default 768 !! 2344 bool
606 help !! 2345 depends on MIPS_FP_SUPPORT
607 Prefer using vectorized copy_to_user !! 2346 default y if CPU_R3000 || CPU_TX39XX
608 workload size exceeds this value. !! 2347
>> 2348 config CPU_R3K_TLB
>> 2349 bool
>> 2350
>> 2351 config CPU_R4K_FPU
>> 2352 bool
>> 2353 depends on MIPS_FP_SUPPORT
>> 2354 default y if !CPU_R2300_FPU
>> 2355
>> 2356 config CPU_R4K_CACHE_TLB
>> 2357 bool
>> 2358 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
609 2359
610 config RISCV_ISA_V_PREEMPTIVE !! 2360 config MIPS_MT_SMP
611 bool "Run kernel-mode Vector with kern !! 2361 bool "MIPS MT SMP support (1 TC on each available VPE)"
612 depends on PREEMPTION <<
613 depends on RISCV_ISA_V <<
614 default y 2362 default y
>> 2363 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2364 select CPU_MIPSR2_IRQ_VI
>> 2365 select CPU_MIPSR2_IRQ_EI
>> 2366 select SYNC_R4K
>> 2367 select MIPS_MT
>> 2368 select SMP
>> 2369 select SMP_UP
>> 2370 select SYS_SUPPORTS_SMP
>> 2371 select SYS_SUPPORTS_SCHED_SMT
>> 2372 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2373 help
>> 2374 This is a kernel model which is known as SMVP. This is supported
>> 2375 on cores with the MT ASE and uses the available VPEs to implement
>> 2376 virtual processors which supports SMP. This is equivalent to the
>> 2377 Intel Hyperthreading feature. For further information go to
>> 2378 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2379
>> 2380 config MIPS_MT
>> 2381 bool
>> 2382
>> 2383 config SCHED_SMT
>> 2384 bool "SMT (multithreading) scheduler support"
>> 2385 depends on SYS_SUPPORTS_SCHED_SMT
>> 2386 default n
615 help 2387 help
616 Usually, in-kernel SIMD routines are !! 2388 SMT scheduler support improves the CPU scheduler's decision making
617 Functions which envoke long running !! 2389 when dealing with MIPS MT enabled cores at a cost of slightly
618 vector unit to prevent blocking othe !! 2390 increased overhead in some places. If unsure say N here.
619 2391
620 This config allows kernel to run SIM !! 2392 config SYS_SUPPORTS_SCHED_SMT
621 preemption. Enabling this config wil !! 2393 bool
622 consumption due to the allocation of <<
623 2394
624 config RISCV_ISA_ZAWRS !! 2395 config SYS_SUPPORTS_MULTITHREADING
625 bool "Zawrs extension support for more !! 2396 bool
626 depends on RISCV_ALTERNATIVE !! 2397
>> 2398 config MIPS_MT_FPAFF
>> 2399 bool "Dynamic FPU affinity for FP-intensive threads"
627 default y 2400 default y
>> 2401 depends on MIPS_MT_SMP
>> 2402
>> 2403 config MIPSR2_TO_R6_EMULATOR
>> 2404 bool "MIPS R2-to-R6 emulator"
>> 2405 depends on CPU_MIPSR6
>> 2406 depends on MIPS_FP_SUPPORT
>> 2407 default y
>> 2408 help
>> 2409 Choose this option if you want to run non-R6 MIPS userland code.
>> 2410 Even if you say 'Y' here, the emulator will still be disabled by
>> 2411 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2412 The only reason this is a build-time option is to save ~14K from the
>> 2413 final kernel image.
>> 2414
>> 2415 config SYS_SUPPORTS_VPE_LOADER
>> 2416 bool
>> 2417 depends on SYS_SUPPORTS_MULTITHREADING
628 help 2418 help
629 The Zawrs extension defines instruct !! 2419 Indicates that the platform supports the VPE loader, and provides
630 which allow a hart to enter a low-po !! 2420 physical_memsize.
631 hypervisor while waiting on a store <<
632 use of these instructions in the ker <<
633 detected at boot. <<
634 2421
635 If you don't know what to do here, s !! 2422 config MIPS_VPE_LOADER
>> 2423 bool "VPE loader support."
>> 2424 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2425 select CPU_MIPSR2_IRQ_VI
>> 2426 select CPU_MIPSR2_IRQ_EI
>> 2427 select MIPS_MT
>> 2428 help
>> 2429 Includes a loader for loading an elf relocatable object
>> 2430 onto another VPE and running it.
636 2431
637 config TOOLCHAIN_HAS_ZBB !! 2432 config MIPS_VPE_LOADER_CMP
638 bool 2433 bool
639 default y !! 2434 default "y"
640 depends on !64BIT || $(cc-option,-mabi !! 2435 depends on MIPS_VPE_LOADER && MIPS_CMP
641 depends on !32BIT || $(cc-option,-mabi <<
642 depends on LLD_VERSION >= 150000 || LD <<
643 depends on AS_HAS_OPTION_ARCH <<
644 2436
645 # This symbol indicates that the toolchain sup !! 2437 config MIPS_VPE_LOADER_MT
646 # extensions, including Zvk*, Zvbb, and Zvbc. !! 2438 bool
647 # binutils added all except Zvkb, then added Z !! 2439 default "y"
648 config TOOLCHAIN_HAS_VECTOR_CRYPTO !! 2440 depends on MIPS_VPE_LOADER && !MIPS_CMP
649 def_bool $(as-instr, .option arch$(com <<
650 depends on AS_HAS_OPTION_ARCH <<
651 2441
652 config RISCV_ISA_ZBA !! 2442 config MIPS_VPE_LOADER_TOM
653 bool "Zba extension support for bit ma !! 2443 bool "Load VPE program into memory hidden from linux"
>> 2444 depends on MIPS_VPE_LOADER
654 default y 2445 default y
655 help 2446 help
656 Add support for enabling optimisati !! 2447 The loader can use memory that is present but has been hidden from
657 extension is detected at boot. !! 2448 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2449 you to ensure the amount you put in the option and the space your
>> 2450 program requires is less or equal to the amount physically present.
658 2451
659 The Zba extension provides instruct !! 2452 config MIPS_VPE_APSP_API
660 of addresses that index into arrays !! 2453 bool "Enable support for AP/SP API (RTLX)"
>> 2454 depends on MIPS_VPE_LOADER
661 2455
662 If you don't know what to do here, !! 2456 config MIPS_VPE_APSP_API_CMP
>> 2457 bool
>> 2458 default "y"
>> 2459 depends on MIPS_VPE_APSP_API && MIPS_CMP
663 2460
664 config RISCV_ISA_ZBB !! 2461 config MIPS_VPE_APSP_API_MT
665 bool "Zbb extension support for bit ma !! 2462 bool
666 depends on TOOLCHAIN_HAS_ZBB !! 2463 default "y"
667 depends on RISCV_ALTERNATIVE !! 2464 depends on MIPS_VPE_APSP_API && !MIPS_CMP
668 default y !! 2465
>> 2466 config MIPS_CMP
>> 2467 bool "MIPS CMP framework support (DEPRECATED)"
>> 2468 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2469 select SMP
>> 2470 select SYNC_R4K
>> 2471 select SYS_SUPPORTS_SMP
>> 2472 select WEAK_ORDERING
>> 2473 default n
669 help 2474 help
670 Adds support to dynamically detect !! 2475 Select this if you are using a bootloader which implements the "CMP
671 extension (basic bit manipulation) !! 2476 framework" protocol (ie. YAMON) and want your kernel to make use of
>> 2477 its ability to start secondary CPUs.
>> 2478
>> 2479 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2480 instead of this.
>> 2481
>> 2482 config MIPS_CPS
>> 2483 bool "MIPS Coherent Processing System support"
>> 2484 depends on SYS_SUPPORTS_MIPS_CPS
>> 2485 select MIPS_CM
>> 2486 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2487 select SMP
>> 2488 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2489 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2490 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2491 select SYS_SUPPORTS_SMP
>> 2492 select WEAK_ORDERING
>> 2493 help
>> 2494 Select this if you wish to run an SMP kernel across multiple cores
>> 2495 within a MIPS Coherent Processing System. When this option is
>> 2496 enabled the kernel will probe for other cores and boot them with
>> 2497 no external assistance. It is safe to enable this when hardware
>> 2498 support is unavailable.
>> 2499
>> 2500 config MIPS_CPS_PM
>> 2501 depends on MIPS_CPS
>> 2502 bool
672 2503
673 The Zbb extension provides instruct !! 2504 config MIPS_CM
674 of bit-specific operations (count b !! 2505 bool
675 bitrotation, etc). !! 2506 select MIPS_CPC
676 2507
677 If you don't know what to do here, !! 2508 config MIPS_CPC
>> 2509 bool
678 2510
679 config TOOLCHAIN_HAS_ZBC !! 2511 config SB1_PASS_2_WORKAROUNDS
680 bool 2512 bool
>> 2513 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
681 default y 2514 default y
682 depends on !64BIT || $(cc-option,-mabi <<
683 depends on !32BIT || $(cc-option,-mabi <<
684 depends on LLD_VERSION >= 150000 || LD <<
685 depends on AS_HAS_OPTION_ARCH <<
686 2515
687 config RISCV_ISA_ZBC !! 2516 config SB1_PASS_2_1_WORKAROUNDS
688 bool "Zbc extension support for carry- !! 2517 bool
689 depends on TOOLCHAIN_HAS_ZBC !! 2518 depends on CPU_SB1 && CPU_SB1_PASS_2
690 depends on MMU <<
691 depends on RISCV_ALTERNATIVE <<
692 default y 2519 default y
>> 2520
>> 2521 choice
>> 2522 prompt "SmartMIPS or microMIPS ASE support"
>> 2523
>> 2524 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2525 bool "None"
693 help 2526 help
694 Adds support to dynamically detect !! 2527 Select this if you want neither microMIPS nor SmartMIPS support
695 extension (carry-less multiplicatio <<
696 2528
697 The Zbc extension could accelerate !! 2529 config CPU_HAS_SMARTMIPS
698 calculations. !! 2530 depends on SYS_SUPPORTS_SMARTMIPS
>> 2531 bool "SmartMIPS"
>> 2532 help
>> 2533 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2534 increased security at both hardware and software level for
>> 2535 smartcards. Enabling this option will allow proper use of the
>> 2536 SmartMIPS instructions by Linux applications. However a kernel with
>> 2537 this option will not work on a MIPS core without SmartMIPS core. If
>> 2538 you don't know you probably don't have SmartMIPS and should say N
>> 2539 here.
699 2540
700 If you don't know what to do here, !! 2541 config CPU_MICROMIPS
>> 2542 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2543 bool "microMIPS"
>> 2544 help
>> 2545 When this option is enabled the kernel will be built using the
>> 2546 microMIPS ISA
701 2547
702 config RISCV_ISA_ZICBOM !! 2548 endchoice
703 bool "Zicbom extension support for non !! 2549
704 depends on MMU !! 2550 config CPU_HAS_MSA
705 depends on RISCV_ALTERNATIVE !! 2551 bool "Support for the MIPS SIMD Architecture"
706 default y !! 2552 depends on CPU_SUPPORTS_MSA
707 select RISCV_DMA_NONCOHERENT !! 2553 depends on MIPS_FP_SUPPORT
708 select DMA_DIRECT_REMAP !! 2554 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2555 help
>> 2556 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2557 and a set of SIMD instructions to operate on them. When this option
>> 2558 is enabled the kernel will support allocating & switching MSA
>> 2559 vector register contexts. If you know that your kernel will only be
>> 2560 running on CPUs which do not support MSA or that your userland will
>> 2561 not be making use of it then you may wish to say N here to reduce
>> 2562 the size & complexity of your kernel.
>> 2563
>> 2564 If unsure, say Y.
>> 2565
>> 2566 config CPU_HAS_WB
>> 2567 bool
>> 2568
>> 2569 config XKS01
>> 2570 bool
>> 2571
>> 2572 config CPU_HAS_DIEI
>> 2573 depends on !CPU_DIEI_BROKEN
>> 2574 bool
>> 2575
>> 2576 config CPU_DIEI_BROKEN
>> 2577 bool
>> 2578
>> 2579 config CPU_HAS_RIXI
>> 2580 bool
>> 2581
>> 2582 config CPU_NO_LOAD_STORE_LR
>> 2583 bool
709 help 2584 help
710 Adds support to dynamically detect !! 2585 CPU lacks support for unaligned load and store instructions:
711 extension (Cache Block Management O !! 2586 LWL, LWR, SWL, SWR (Load/store word left/right).
712 usage. !! 2587 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
>> 2588 systems).
713 2589
714 The Zicbom extension can be used to !! 2590 #
715 non-coherent DMA support on devices !! 2591 # Vectored interrupt mode is an R2 feature
>> 2592 #
>> 2593 config CPU_MIPSR2_IRQ_VI
>> 2594 bool
716 2595
717 If you don't know what to do here, !! 2596 #
>> 2597 # Extended interrupt mode is an R2 feature
>> 2598 #
>> 2599 config CPU_MIPSR2_IRQ_EI
>> 2600 bool
718 2601
719 config RISCV_ISA_ZICBOZ !! 2602 config CPU_HAS_SYNC
720 bool "Zicboz extension support for fas !! 2603 bool
721 depends on RISCV_ALTERNATIVE !! 2604 depends on !CPU_R3000
722 default y 2605 default y
>> 2606
>> 2607 #
>> 2608 # CPU non-features
>> 2609 #
>> 2610 config CPU_DADDI_WORKAROUNDS
>> 2611 bool
>> 2612
>> 2613 config CPU_R4000_WORKAROUNDS
>> 2614 bool
>> 2615 select CPU_R4400_WORKAROUNDS
>> 2616
>> 2617 config CPU_R4400_WORKAROUNDS
>> 2618 bool
>> 2619
>> 2620 config CPU_R4X00_BUGS64
>> 2621 bool
>> 2622 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
>> 2623
>> 2624 config MIPS_ASID_SHIFT
>> 2625 int
>> 2626 default 6 if CPU_R3000 || CPU_TX39XX
>> 2627 default 0
>> 2628
>> 2629 config MIPS_ASID_BITS
>> 2630 int
>> 2631 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2632 default 6 if CPU_R3000 || CPU_TX39XX
>> 2633 default 8
>> 2634
>> 2635 config MIPS_ASID_BITS_VARIABLE
>> 2636 bool
>> 2637
>> 2638 config MIPS_CRC_SUPPORT
>> 2639 bool
>> 2640
>> 2641 #
>> 2642 # - Highmem only makes sense for the 32-bit kernel.
>> 2643 # - The current highmem code will only work properly on physically indexed
>> 2644 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2645 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2646 # moment we protect the user and offer the highmem option only on machines
>> 2647 # where it's known to be safe. This will not offer highmem on a few systems
>> 2648 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2649 # indexed CPUs but we're playing safe.
>> 2650 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2651 # know they might have memory configurations that could make use of highmem
>> 2652 # support.
>> 2653 #
>> 2654 config HIGHMEM
>> 2655 bool "High Memory Support"
>> 2656 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2657
>> 2658 config CPU_SUPPORTS_HIGHMEM
>> 2659 bool
>> 2660
>> 2661 config SYS_SUPPORTS_HIGHMEM
>> 2662 bool
>> 2663
>> 2664 config SYS_SUPPORTS_SMARTMIPS
>> 2665 bool
>> 2666
>> 2667 config SYS_SUPPORTS_MICROMIPS
>> 2668 bool
>> 2669
>> 2670 config SYS_SUPPORTS_MIPS16
>> 2671 bool
723 help 2672 help
724 Enable the use of the Zicboz extens !! 2673 This option must be set if a kernel might be executed on a MIPS16-
725 when available. !! 2674 enabled CPU even if MIPS16 is not actually being used. In other
>> 2675 words, it makes the kernel MIPS16-tolerant.
>> 2676
>> 2677 config CPU_SUPPORTS_MSA
>> 2678 bool
726 2679
727 The Zicboz extension is used for fa !! 2680 config ARCH_FLATMEM_ENABLE
>> 2681 def_bool y
>> 2682 depends on !NUMA && !CPU_LOONGSON2EF
728 2683
729 If you don't know what to do here, !! 2684 config ARCH_SPARSEMEM_ENABLE
>> 2685 bool
>> 2686 select SPARSEMEM_STATIC if !SGI_IP27
730 2687
731 config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI !! 2688 config NUMA
>> 2689 bool "NUMA Support"
>> 2690 depends on SYS_SUPPORTS_NUMA
>> 2691 help
>> 2692 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2693 Access). This option improves performance on systems with more
>> 2694 than two nodes; on two node systems it is generally better to
>> 2695 leave it disabled; on single node systems leave this option
>> 2696 disabled.
>> 2697
>> 2698 config SYS_SUPPORTS_NUMA
>> 2699 bool
>> 2700
>> 2701 config HAVE_SETUP_PER_CPU_AREA
732 def_bool y 2702 def_bool y
733 # https://sourceware.org/git/?p=binuti !! 2703 depends on NUMA
734 # https://gcc.gnu.org/git/?p=gcc.git;a <<
735 depends on AS_IS_GNU && AS_VERSION >= <<
736 help <<
737 Binutils-2.38 and GCC-12.1.0 bumped <<
738 20191213 version, which moves some i <<
739 the Zicsr and Zifencei extensions. T <<
740 Zicsr and Zifencei when binutils >= <<
741 and Zifencei are supported in binuti <<
742 To make life easier, and avoid forci <<
743 newer ISA spec to version 2.2, relax <<
744 For clang < 17 or GCC < 11.3.0, for <<
745 special treatment, this is dealt wit <<
746 2704
747 config TOOLCHAIN_NEEDS_OLD_ISA_SPEC !! 2705 config NEED_PER_CPU_EMBED_FIRST_CHUNK
748 def_bool y 2706 def_bool y
749 depends on TOOLCHAIN_NEEDS_EXPLICIT_ZI !! 2707 depends on NUMA
750 # https://github.com/llvm/llvm-project <<
751 # https://gcc.gnu.org/git/?p=gcc.git;a <<
752 depends on (CC_IS_CLANG && CLANG_VERSI <<
753 help <<
754 Certain versions of clang and GCC do <<
755 -march. This option causes an older <<
756 versions of clang and GCC to be pass <<
757 as passing zicsr and zifencei to -ma <<
758 2708
759 config FPU !! 2709 config RELOCATABLE
760 bool "FPU support" !! 2710 bool "Relocatable kernel"
761 default y !! 2711 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
762 help 2712 help
763 Say N here if you want to disable al !! 2713 This builds a kernel image that retains relocation information
764 in the kernel. !! 2714 so it can be loaded someplace besides the default 1MB.
>> 2715 The relocations make the kernel binary about 15% larger,
>> 2716 but are discarded at runtime
>> 2717
>> 2718 config RELOCATION_TABLE_SIZE
>> 2719 hex "Relocation table size"
>> 2720 depends on RELOCATABLE
>> 2721 range 0x0 0x01000000
>> 2722 default "0x00100000"
>> 2723 ---help---
>> 2724 A table of relocation data will be appended to the kernel binary
>> 2725 and parsed at boot to fix up the relocated kernel.
>> 2726
>> 2727 This option allows the amount of space reserved for the table to be
>> 2728 adjusted, although the default of 1Mb should be ok in most cases.
>> 2729
>> 2730 The build will fail and a valid size suggested if this is too small.
>> 2731
>> 2732 If unsure, leave at the default value.
>> 2733
>> 2734 config RANDOMIZE_BASE
>> 2735 bool "Randomize the address of the kernel image"
>> 2736 depends on RELOCATABLE
>> 2737 ---help---
>> 2738 Randomizes the physical and virtual address at which the
>> 2739 kernel image is loaded, as a security feature that
>> 2740 deters exploit attempts relying on knowledge of the location
>> 2741 of kernel internals.
>> 2742
>> 2743 Entropy is generated using any coprocessor 0 registers available.
>> 2744
>> 2745 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
765 2746
766 If you don't know what to do here, s !! 2747 If unsure, say N.
>> 2748
>> 2749 config RANDOMIZE_BASE_MAX_OFFSET
>> 2750 hex "Maximum kASLR offset" if EXPERT
>> 2751 depends on RANDOMIZE_BASE
>> 2752 range 0x0 0x40000000 if EVA || 64BIT
>> 2753 range 0x0 0x08000000
>> 2754 default "0x01000000"
>> 2755 ---help---
>> 2756 When kASLR is active, this provides the maximum offset that will
>> 2757 be applied to the kernel image. It should be set according to the
>> 2758 amount of physical RAM available in the target system minus
>> 2759 PHYSICAL_START and must be a power of 2.
>> 2760
>> 2761 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2762 EVA or 64-bit. The default is 16Mb.
>> 2763
>> 2764 config NODES_SHIFT
>> 2765 int
>> 2766 default "6"
>> 2767 depends on NEED_MULTIPLE_NODES
767 2768
768 config IRQ_STACKS !! 2769 config HW_PERF_EVENTS
769 bool "Independent irq & softirq stacks !! 2770 bool "Enable hardware performance counter support for perf events"
>> 2771 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
770 default y 2772 default y
771 select HAVE_IRQ_EXIT_ON_IRQ_STACK <<
772 select HAVE_SOFTIRQ_ON_OWN_STACK <<
773 help 2773 help
774 Add independent irq & softirq stacks !! 2774 Enable hardware performance counter support for perf events. If
775 overflows. We may save some memory f !! 2775 disabled, perf events will use software events only.
776 2776
777 config THREAD_SIZE_ORDER !! 2777 config DMI
778 int "Kernel stack size (in power-of-tw !! 2778 bool "Enable DMI scanning"
779 range 0 4 !! 2779 depends on MACH_LOONGSON64
780 default 1 if 32BIT !! 2780 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
781 default 2 !! 2781 default y
782 help 2782 help
783 Specify the Pages of thread stack si !! 2783 Enabled scanning of DMI to identify machine quirks. Say Y
784 affects irq stack size, which is equ !! 2784 here unless you have verified that your setup is not
>> 2785 affected by entries in the DMI blacklist. Required by PNP
>> 2786 BIOS code.
785 2787
786 config RISCV_MISALIGNED !! 2788 config SMP
787 bool !! 2789 bool "Multi-Processing support"
788 select SYSCTL_ARCH_UNALIGN_ALLOW !! 2790 depends on SYS_SUPPORTS_SMP
789 help 2791 help
790 Embed support for emulating misalign !! 2792 This enables support for systems with more than one CPU. If you have
>> 2793 a system with only one CPU, say N. If you have a system with more
>> 2794 than one CPU, say Y.
>> 2795
>> 2796 If you say N here, the kernel will run on uni- and multiprocessor
>> 2797 machines, but will use only one CPU of a multiprocessor machine. If
>> 2798 you say Y here, the kernel will run on many, but not all,
>> 2799 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2800 will run faster if you say N here.
791 2801
792 choice !! 2802 People using multiprocessor machines who say Y here should also say
793 prompt "Unaligned Accesses Support" !! 2803 Y to "Enhanced Real Time Clock Support", below.
794 default RISCV_PROBE_UNALIGNED_ACCESS !! 2804
>> 2805 See also the SMP-HOWTO available at
>> 2806 <http://www.tldp.org/docs.html#howto>.
>> 2807
>> 2808 If you don't know what to do here, say N.
>> 2809
>> 2810 config HOTPLUG_CPU
>> 2811 bool "Support for hot-pluggable CPUs"
>> 2812 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
795 help 2813 help
796 This determines the level of support !! 2814 Say Y here to allow turning CPUs off and on. CPUs can be
797 information is used by the kernel to !! 2815 controlled through /sys/devices/system/cpu.
798 exposed to user space via the hwprob !! 2816 (Note: power management support will enable this option
799 probed at boot by default. !! 2817 automatically on SMP systems. )
800 !! 2818 Say N if you want to disable CPU hotplug.
801 config RISCV_PROBE_UNALIGNED_ACCESS <<
802 bool "Probe for hardware unaligned acc <<
803 select RISCV_MISALIGNED <<
804 help <<
805 During boot, the kernel will run a s <<
806 speed of unaligned accesses. This pr <<
807 the speed of unaligned accesses on t <<
808 memory accesses trap into the kernel <<
809 system, the kernel will emulate the <<
810 UABI. <<
811 <<
812 config RISCV_EMULATED_UNALIGNED_ACCESS <<
813 bool "Emulate unaligned access where s <<
814 select RISCV_MISALIGNED <<
815 help <<
816 If unaligned memory accesses trap in <<
817 supported by the system, the kernel <<
818 accesses to preserve the UABI. When <<
819 unaligned accesses, the unaligned ac <<
820 <<
821 config RISCV_SLOW_UNALIGNED_ACCESS <<
822 bool "Assume the system supports slow <<
823 depends on NONPORTABLE <<
824 help <<
825 Assume that the system supports slow <<
826 kernel and userspace programs may no <<
827 that do not support unaligned memory <<
828 <<
829 config RISCV_EFFICIENT_UNALIGNED_ACCESS <<
830 bool "Assume the system supports fast <<
831 depends on NONPORTABLE <<
832 select DCACHE_WORD_ACCESS if MMU <<
833 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
834 help <<
835 Assume that the system supports fast <<
836 enabled, this option improves the pe <<
837 systems. However, the kernel and use <<
838 slowly, or will not be able to run a <<
839 support efficient unaligned memory a <<
840 2819
841 endchoice !! 2820 config SMP_UP
>> 2821 bool
842 2822
843 source "arch/riscv/Kconfig.vendor" !! 2823 config SYS_SUPPORTS_MIPS_CMP
>> 2824 bool
844 2825
845 endmenu # "Platform type" !! 2826 config SYS_SUPPORTS_MIPS_CPS
>> 2827 bool
846 2828
847 menu "Kernel features" !! 2829 config SYS_SUPPORTS_SMP
>> 2830 bool
848 2831
849 source "kernel/Kconfig.hz" !! 2832 config NR_CPUS_DEFAULT_4
>> 2833 bool
850 2834
851 config RISCV_SBI_V01 !! 2835 config NR_CPUS_DEFAULT_8
852 bool "SBI v0.1 support" !! 2836 bool
853 depends on RISCV_SBI !! 2837
854 help !! 2838 config NR_CPUS_DEFAULT_16
855 This config allows kernel to use SBI !! 2839 bool
856 deprecated in future once legacy M-m !! 2840
>> 2841 config NR_CPUS_DEFAULT_32
>> 2842 bool
>> 2843
>> 2844 config NR_CPUS_DEFAULT_64
>> 2845 bool
857 2846
858 config RISCV_BOOT_SPINWAIT !! 2847 config NR_CPUS
859 bool "Spinwait booting method" !! 2848 int "Maximum number of CPUs (2-256)"
>> 2849 range 2 256
860 depends on SMP 2850 depends on SMP
861 default y if RISCV_SBI_V01 || RISCV_M_ !! 2851 default "4" if NR_CPUS_DEFAULT_4
>> 2852 default "8" if NR_CPUS_DEFAULT_8
>> 2853 default "16" if NR_CPUS_DEFAULT_16
>> 2854 default "32" if NR_CPUS_DEFAULT_32
>> 2855 default "64" if NR_CPUS_DEFAULT_64
>> 2856 help
>> 2857 This allows you to specify the maximum number of CPUs which this
>> 2858 kernel will support. The maximum supported value is 32 for 32-bit
>> 2859 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2860 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2861 and 2 for all others.
>> 2862
>> 2863 This is purely to save memory - each supported CPU adds
>> 2864 approximately eight kilobytes to the kernel image. For best
>> 2865 performance should round up your number of processors to the next
>> 2866 power of two.
>> 2867
>> 2868 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2869 bool
>> 2870
>> 2871 config MIPS_NR_CPU_NR_MAP_1024
>> 2872 bool
>> 2873
>> 2874 config MIPS_NR_CPU_NR_MAP
>> 2875 int
>> 2876 depends on SMP
>> 2877 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2878 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2879
>> 2880 #
>> 2881 # Timer Interrupt Frequency Configuration
>> 2882 #
>> 2883
>> 2884 choice
>> 2885 prompt "Timer frequency"
>> 2886 default HZ_250
862 help 2887 help
863 This enables support for booting Lin !! 2888 Allows the configuration of the timer frequency.
864 spinwait method, all cores randomly <<
865 gets chosen via lottery and all othe <<
866 variable. This method cannot support <<
867 scheme. It should be only enabled fo <<
868 on older firmware without SBI HSM ex <<
869 rely on ordered booting via SBI HSM <<
870 dynamically at runtime if the firmwa <<
871 <<
872 Since spinwait is incompatible with <<
873 NR_CPUS be large enough to contain t <<
874 hart to enter Linux. <<
875 2889
876 If unsure what to do here, say N. !! 2890 config HZ_24
>> 2891 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
877 2892
878 config ARCH_SUPPORTS_KEXEC !! 2893 config HZ_48
879 def_bool y !! 2894 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
880 2895
881 config ARCH_SELECTS_KEXEC !! 2896 config HZ_100
882 def_bool y !! 2897 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
883 depends on KEXEC <<
884 select HOTPLUG_CPU if SMP <<
885 2898
886 config ARCH_SUPPORTS_KEXEC_FILE !! 2899 config HZ_128
887 def_bool 64BIT !! 2900 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
888 2901
889 config ARCH_SELECTS_KEXEC_FILE !! 2902 config HZ_250
890 def_bool y !! 2903 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
891 depends on KEXEC_FILE <<
892 select HAVE_IMA_KEXEC if IMA <<
893 select KEXEC_ELF <<
894 2904
895 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2905 config HZ_256
896 def_bool ARCH_SUPPORTS_KEXEC_FILE !! 2906 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
897 2907
898 config ARCH_SUPPORTS_CRASH_DUMP !! 2908 config HZ_1000
899 def_bool y !! 2909 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
900 2910
901 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATIO !! 2911 config HZ_1024
902 def_bool CRASH_RESERVE !! 2912 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
903 2913
904 config COMPAT !! 2914 endchoice
905 bool "Kernel support for 32-bit U-mode <<
906 default 64BIT <<
907 depends on 64BIT && MMU <<
908 help <<
909 This option enables support for a 32 <<
910 kernel at S-mode. riscv32-specific c <<
911 the user helper functions (vdso), si <<
912 ptrace interface are handled appropr <<
913 <<
914 If you want to execute 32-bit usersp <<
915 <<
916 config PARAVIRT <<
917 bool "Enable paravirtualization code" <<
918 depends on RISCV_SBI <<
919 help <<
920 This changes the kernel so it can mo <<
921 under a hypervisor, potentially impr <<
922 over full virtualization. <<
923 <<
924 config PARAVIRT_TIME_ACCOUNTING <<
925 bool "Paravirtual steal time accountin <<
926 depends on PARAVIRT <<
927 help <<
928 Select this option to enable fine gr <<
929 accounting. Time spent executing oth <<
930 the current vCPU is discounted from <<
931 that, there can be a small performan <<
932 2915
933 If in doubt, say N here. !! 2916 config SYS_SUPPORTS_24HZ
>> 2917 bool
934 2918
935 config RELOCATABLE !! 2919 config SYS_SUPPORTS_48HZ
936 bool "Build a relocatable kernel" !! 2920 bool
937 depends on MMU && 64BIT && !XIP_KERNEL <<
938 select MODULE_SECTIONS if MODULES <<
939 help <<
940 This builds a kernel as a Position I <<
941 which retains all relocation metadat <<
942 kernel binary at runtime to a differ <<
943 address it was linked at. <<
944 Since RISCV uses the RELA relocation <<
945 relocation pass at runtime even if t <<
946 same address it was linked at. <<
947 2921
948 If unsure, say N. !! 2922 config SYS_SUPPORTS_100HZ
>> 2923 bool
949 2924
950 config RANDOMIZE_BASE !! 2925 config SYS_SUPPORTS_128HZ
951 bool "Randomize the address of the ker !! 2926 bool
952 select RELOCATABLE !! 2927
953 depends on MMU && 64BIT && !XIP_KERNEL !! 2928 config SYS_SUPPORTS_250HZ
954 help !! 2929 bool
955 Randomizes the virtual address at wh <<
956 loaded, as a security feature that d <<
957 relying on knowledge of the location <<
958 <<
959 It is the bootloader's job to provid <<
960 random u64 value in /chosen/kaslr-se <<
961 <<
962 When booting via the UEFI stub, it w <<
963 EFI_RNG_PROTOCOL implementation (if <<
964 to the kernel proper. In addition, i <<
965 location of the kernel Image as well <<
966 <<
967 If unsure, say N. <<
968 <<
969 endmenu # "Kernel features" <<
970 <<
971 menu "Boot options" <<
972 <<
973 config CMDLINE <<
974 string "Built-in kernel command line" <<
975 help <<
976 For most platforms, the arguments fo <<
977 are provided at run-time, during boo <<
978 where either no arguments are being <<
979 arguments are insufficient or even i <<
980 2930
981 When that occurs, it is possible to !! 2931 config SYS_SUPPORTS_256HZ
982 line here and choose how the kernel !! 2932 bool
>> 2933
>> 2934 config SYS_SUPPORTS_1000HZ
>> 2935 bool
>> 2936
>> 2937 config SYS_SUPPORTS_1024HZ
>> 2938 bool
>> 2939
>> 2940 config SYS_SUPPORTS_ARBIT_HZ
>> 2941 bool
>> 2942 default y if !SYS_SUPPORTS_24HZ && \
>> 2943 !SYS_SUPPORTS_48HZ && \
>> 2944 !SYS_SUPPORTS_100HZ && \
>> 2945 !SYS_SUPPORTS_128HZ && \
>> 2946 !SYS_SUPPORTS_250HZ && \
>> 2947 !SYS_SUPPORTS_256HZ && \
>> 2948 !SYS_SUPPORTS_1000HZ && \
>> 2949 !SYS_SUPPORTS_1024HZ
>> 2950
>> 2951 config HZ
>> 2952 int
>> 2953 default 24 if HZ_24
>> 2954 default 48 if HZ_48
>> 2955 default 100 if HZ_100
>> 2956 default 128 if HZ_128
>> 2957 default 250 if HZ_250
>> 2958 default 256 if HZ_256
>> 2959 default 1000 if HZ_1000
>> 2960 default 1024 if HZ_1024
>> 2961
>> 2962 config SCHED_HRTICK
>> 2963 def_bool HIGH_RES_TIMERS
>> 2964
>> 2965 config KEXEC
>> 2966 bool "Kexec system call"
>> 2967 select KEXEC_CORE
>> 2968 help
>> 2969 kexec is a system call that implements the ability to shutdown your
>> 2970 current kernel, and to start another kernel. It is like a reboot
>> 2971 but it is independent of the system firmware. And like a reboot
>> 2972 you can start any kernel with it, not just Linux.
>> 2973
>> 2974 The name comes from the similarity to the exec system call.
>> 2975
>> 2976 It is an ongoing process to be certain the hardware in a machine
>> 2977 is properly shutdown, so do not be surprised if this code does not
>> 2978 initially work for you. As of this writing the exact hardware
>> 2979 interface is strongly in flux, so no good recommendation can be
>> 2980 made.
>> 2981
>> 2982 config CRASH_DUMP
>> 2983 bool "Kernel crash dumps"
>> 2984 help
>> 2985 Generate crash dump after being started by kexec.
>> 2986 This should be normally only set in special crash dump kernels
>> 2987 which are loaded in the main kernel with kexec-tools into
>> 2988 a specially reserved region and then later executed after
>> 2989 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2990 to a memory address not used by the main kernel or firmware using
>> 2991 PHYSICAL_START.
>> 2992
>> 2993 config PHYSICAL_START
>> 2994 hex "Physical address where the kernel is loaded"
>> 2995 default "0xffffffff84000000"
>> 2996 depends on CRASH_DUMP
>> 2997 help
>> 2998 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2999 If you plan to use kernel for capturing the crash dump change
>> 3000 this value to start of the reserved region (the "X" value as
>> 3001 specified in the "crashkernel=YM@XM" command line boot parameter
>> 3002 passed to the panic-ed kernel).
>> 3003
>> 3004 config SECCOMP
>> 3005 bool "Enable seccomp to safely compute untrusted bytecode"
>> 3006 depends on PROC_FS
>> 3007 default y
>> 3008 help
>> 3009 This kernel feature is useful for number crunching applications
>> 3010 that may need to compute untrusted bytecode during their
>> 3011 execution. By using pipes or other transports made available to
>> 3012 the process as file descriptors supporting the read/write
>> 3013 syscalls, it's possible to isolate those applications in
>> 3014 their own address space using seccomp. Once seccomp is
>> 3015 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 3016 and the task is only allowed to execute a few safe syscalls
>> 3017 defined by each seccomp mode.
>> 3018
>> 3019 If unsure, say Y. Only embedded should say N here.
>> 3020
>> 3021 config MIPS_O32_FP64_SUPPORT
>> 3022 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 3023 depends on 32BIT || MIPS32_O32
>> 3024 help
>> 3025 When this is enabled, the kernel will support use of 64-bit floating
>> 3026 point registers with binaries using the O32 ABI along with the
>> 3027 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 3028 32-bit MIPS systems this support is at the cost of increasing the
>> 3029 size and complexity of the compiled FPU emulator. Thus if you are
>> 3030 running a MIPS32 system and know that none of your userland binaries
>> 3031 will require 64-bit floating point, you may wish to reduce the size
>> 3032 of your kernel & potentially improve FP emulation performance by
>> 3033 saying N here.
>> 3034
>> 3035 Although binutils currently supports use of this flag the details
>> 3036 concerning its effect upon the O32 ABI in userland are still being
>> 3037 worked on. In order to avoid userland becoming dependant upon current
>> 3038 behaviour before the details have been finalised, this option should
>> 3039 be considered experimental and only enabled by those working upon
>> 3040 said details.
>> 3041
>> 3042 If unsure, say N.
>> 3043
>> 3044 config USE_OF
>> 3045 bool
>> 3046 select OF
>> 3047 select OF_EARLY_FLATTREE
>> 3048 select IRQ_DOMAIN
>> 3049
>> 3050 config UHI_BOOT
>> 3051 bool
>> 3052
>> 3053 config BUILTIN_DTB
>> 3054 bool
983 3055
984 choice 3056 choice
985 prompt "Built-in command line usage" !! 3057 prompt "Kernel appended dtb support" if USE_OF
986 depends on CMDLINE != "" !! 3058 default MIPS_NO_APPENDED_DTB
987 default CMDLINE_FALLBACK <<
988 help <<
989 Choose how the kernel will handle th <<
990 line. <<
991 <<
992 config CMDLINE_FALLBACK <<
993 bool "Use bootloader kernel arguments <<
994 help <<
995 Use the built-in command line as fal <<
996 during boot. This is the default beh <<
997 <<
998 config CMDLINE_EXTEND <<
999 bool "Extend bootloader kernel argumen <<
1000 help <<
1001 The command-line arguments provided <<
1002 appended to the built-in command li <<
1003 cases where the provided arguments <<
1004 you don't want to or cannot modify <<
1005 <<
1006 config CMDLINE_FORCE <<
1007 bool "Always use the default kernel c <<
1008 help <<
1009 Always use the built-in command lin <<
1010 boot. This is useful in case you ne <<
1011 command line on systems where you d <<
1012 over it. <<
1013 3059
>> 3060 config MIPS_NO_APPENDED_DTB
>> 3061 bool "None"
>> 3062 help
>> 3063 Do not enable appended dtb support.
>> 3064
>> 3065 config MIPS_ELF_APPENDED_DTB
>> 3066 bool "vmlinux"
>> 3067 help
>> 3068 With this option, the boot code will look for a device tree binary
>> 3069 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 3070 it is empty and the DTB can be appended using binutils command
>> 3071 objcopy:
>> 3072
>> 3073 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 3074
>> 3075 This is meant as a backward compatiblity convenience for those
>> 3076 systems with a bootloader that can't be upgraded to accommodate
>> 3077 the documented boot protocol using a device tree.
>> 3078
>> 3079 config MIPS_RAW_APPENDED_DTB
>> 3080 bool "vmlinux.bin or vmlinuz.bin"
>> 3081 help
>> 3082 With this option, the boot code will look for a device tree binary
>> 3083 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 3084 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 3085
>> 3086 This is meant as a backward compatibility convenience for those
>> 3087 systems with a bootloader that can't be upgraded to accommodate
>> 3088 the documented boot protocol using a device tree.
>> 3089
>> 3090 Beware that there is very little in terms of protection against
>> 3091 this option being confused by leftover garbage in memory that might
>> 3092 look like a DTB header after a reboot if no actual DTB is appended
>> 3093 to vmlinux.bin. Do not leave this option active in a production kernel
>> 3094 if you don't intend to always append a DTB.
1014 endchoice 3095 endchoice
1015 3096
1016 config EFI_STUB !! 3097 choice
>> 3098 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
>> 3099 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 3100 !MACH_LOONGSON64 && !MIPS_MALTA && \
>> 3101 !CAVIUM_OCTEON_SOC
>> 3102 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 3103
>> 3104 config MIPS_CMDLINE_FROM_DTB
>> 3105 depends on USE_OF
>> 3106 bool "Dtb kernel arguments if available"
>> 3107
>> 3108 config MIPS_CMDLINE_DTB_EXTEND
>> 3109 depends on USE_OF
>> 3110 bool "Extend dtb kernel arguments with bootloader arguments"
>> 3111
>> 3112 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 3113 bool "Bootloader kernel arguments if available"
>> 3114
>> 3115 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3116 depends on CMDLINE_BOOL
>> 3117 bool "Extend builtin kernel arguments with bootloader arguments"
>> 3118 endchoice
>> 3119
>> 3120 endmenu
>> 3121
>> 3122 config LOCKDEP_SUPPORT
>> 3123 bool
>> 3124 default y
>> 3125
>> 3126 config STACKTRACE_SUPPORT
1017 bool 3127 bool
>> 3128 default y
1018 3129
1019 config EFI !! 3130 config PGTABLE_LEVELS
1020 bool "UEFI runtime support" !! 3131 int
1021 depends on OF && !XIP_KERNEL !! 3132 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
1022 depends on MMU !! 3133 default 3 if 64BIT && !PAGE_SIZE_64KB
1023 default y !! 3134 default 2
1024 select ARCH_SUPPORTS_ACPI if 64BIT <<
1025 select EFI_GENERIC_STUB <<
1026 select EFI_PARAMS_FROM_FDT <<
1027 select EFI_RUNTIME_WRAPPERS <<
1028 select EFI_STUB <<
1029 select LIBFDT <<
1030 select RISCV_ISA_C <<
1031 select UCS2_STRING <<
1032 help <<
1033 This option provides support for ru <<
1034 by UEFI firmware (such as non-volat <<
1035 clock, and platform reset). A UEFI <<
1036 allow the kernel to be booted as an <<
1037 is only useful on systems that have <<
1038 3135
1039 config DMI !! 3136 config MIPS_AUTO_PFN_OFFSET
1040 bool "Enable support for SMBIOS (DMI) !! 3137 bool
1041 depends on EFI !! 3138
>> 3139 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 3140
>> 3141 config PCI_DRIVERS_GENERIC
>> 3142 select PCI_DOMAINS_GENERIC if PCI
>> 3143 bool
>> 3144
>> 3145 config PCI_DRIVERS_LEGACY
>> 3146 def_bool !PCI_DRIVERS_GENERIC
>> 3147 select NO_GENERIC_PCI_IOPORT_MAP
>> 3148 select PCI_DOMAINS if PCI
>> 3149
>> 3150 #
>> 3151 # ISA support is now enabled via select. Too many systems still have the one
>> 3152 # or other ISA chip on the board that users don't know about so don't expect
>> 3153 # users to choose the right thing ...
>> 3154 #
>> 3155 config ISA
>> 3156 bool
>> 3157
>> 3158 config TC
>> 3159 bool "TURBOchannel support"
>> 3160 depends on MACH_DECSTATION
>> 3161 help
>> 3162 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3163 processors. TURBOchannel programming specifications are available
>> 3164 at:
>> 3165 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3166 and:
>> 3167 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3168 Linux driver support status is documented at:
>> 3169 <http://www.linux-mips.org/wiki/DECstation>
>> 3170
>> 3171 config MMU
>> 3172 bool
1042 default y 3173 default y
1043 help <<
1044 This enables SMBIOS/DMI feature for <<
1045 3174
1046 This option is only useful on syste !! 3175 config ARCH_MMAP_RND_BITS_MIN
1047 However, even with this option, the !! 3176 default 12 if 64BIT
1048 continue to boot on existing non-UE !! 3177 default 8
1049 3178
1050 config CC_HAVE_STACKPROTECTOR_TLS !! 3179 config ARCH_MMAP_RND_BITS_MAX
1051 def_bool $(cc-option,-mstack-protecto !! 3180 default 18 if 64BIT
>> 3181 default 15
1052 3182
1053 config STACKPROTECTOR_PER_TASK !! 3183 config ARCH_MMAP_RND_COMPAT_BITS_MIN
1054 def_bool y !! 3184 default 8
1055 depends on !RANDSTRUCT <<
1056 depends on STACKPROTECTOR && CC_HAVE_ <<
1057 3185
1058 config PHYS_RAM_BASE_FIXED !! 3186 config ARCH_MMAP_RND_COMPAT_BITS_MAX
1059 bool "Explicitly specified physical R !! 3187 default 15
1060 depends on NONPORTABLE <<
1061 default n <<
1062 3188
1063 config PHYS_RAM_BASE !! 3189 config I8253
1064 hex "Platform Physical RAM address" !! 3190 bool
1065 depends on PHYS_RAM_BASE_FIXED !! 3191 select CLKSRC_I8253
1066 default "0x80000000" !! 3192 select CLKEVT_I8253
1067 help !! 3193 select MIPS_EXTERNAL_TIMER
1068 This is the physical address of RAM <<
1069 explicitly specified to run early r <<
1070 from flash to RAM. <<
1071 <<
1072 config XIP_KERNEL <<
1073 bool "Kernel Execute-In-Place from RO <<
1074 depends on MMU && SPARSEMEM && NONPOR <<
1075 # This prevents XIP from being enable <<
1076 # fail to build since XIP doesn't sup <<
1077 depends on !COMPILE_TEST <<
1078 select PHYS_RAM_BASE_FIXED <<
1079 help <<
1080 Execute-In-Place allows the kernel <<
1081 directly addressable by the CPU, su <<
1082 space since the text section of the <<
1083 to RAM. Read-write sections, such <<
1084 are still copied to RAM. The XIP k <<
1085 it has to run directly from flash, <<
1086 store it. The flash address used t <<
1087 and for storing it, is configuratio <<
1088 say Y here, you must know the prope <<
1089 store the kernel image depending on <<
1090 <<
1091 Also note that the make target beco <<
1092 "make zImage" or "make Image". The <<
1093 ROM memory will be arch/riscv/boot/ <<
1094 <<
1095 SPARSEMEM is required because the k <<
1096 flash resident are not backed by me <<
1097 a struct page on those regions will <<
1098 3194
1099 If unsure, say N. !! 3195 config ZONE_DMA
>> 3196 bool
1100 3197
1101 config XIP_PHYS_ADDR !! 3198 config ZONE_DMA32
1102 hex "XIP Kernel Physical Location" !! 3199 bool
1103 depends on XIP_KERNEL <<
1104 default "0x21000000" <<
1105 help <<
1106 This is the physical address in you <<
1107 be linked for and stored to. This <<
1108 own flash usage. <<
1109 <<
1110 config RISCV_ISA_FALLBACK <<
1111 bool "Permit falling back to parsing <<
1112 default y <<
1113 help <<
1114 Parsing the "riscv,isa" devicetree <<
1115 replaced by a list of explicitly de <<
1116 with existing platforms, the kernel <<
1117 "riscv,isa" property if the replace <<
1118 <<
1119 Selecting N here will result in a k <<
1120 fallback, unless the commandline "r <<
1121 present. <<
1122 <<
1123 Please see the dt-binding, located <<
1124 Documentation/devicetree/bindings/r <<
1125 on the replacement properties, "ris <<
1126 "riscv,isa-extensions". <<
1127 3200
1128 config BUILTIN_DTB !! 3201 endmenu
1129 bool "Built-in device tree" <<
1130 depends on OF && NONPORTABLE <<
1131 help <<
1132 Build a device tree into the Linux <<
1133 This option should be selected if n <<
1134 If unsure, say N. <<
1135 3202
>> 3203 config TRAD_SIGNALS
>> 3204 bool
1136 3205
1137 config BUILTIN_DTB_SOURCE !! 3206 config MIPS32_COMPAT
1138 string "Built-in device tree source" !! 3207 bool
1139 depends on BUILTIN_DTB <<
1140 help <<
1141 DTS file path (without suffix, rela <<
1142 for the DTS file that will be used <<
1143 kernel. <<
1144 3208
1145 endmenu # "Boot options" !! 3209 config COMPAT
>> 3210 bool
1146 3211
1147 config PORTABLE !! 3212 config SYSVIPC_COMPAT
1148 bool 3213 bool
1149 default !NONPORTABLE <<
1150 select EFI <<
1151 select MMU <<
1152 select OF <<
1153 3214
1154 config ARCH_PROC_KCORE_TEXT !! 3215 config MIPS32_O32
1155 def_bool y !! 3216 bool "Kernel support for o32 binaries"
>> 3217 depends on 64BIT
>> 3218 select ARCH_WANT_OLD_COMPAT_IPC
>> 3219 select COMPAT
>> 3220 select MIPS32_COMPAT
>> 3221 select SYSVIPC_COMPAT if SYSVIPC
>> 3222 help
>> 3223 Select this option if you want to run o32 binaries. These are pure
>> 3224 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3225 existing binaries are in this format.
1156 3226
1157 menu "Power management options" !! 3227 If unsure, say Y.
1158 3228
1159 source "kernel/power/Kconfig" !! 3229 config MIPS32_N32
>> 3230 bool "Kernel support for n32 binaries"
>> 3231 depends on 64BIT
>> 3232 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
>> 3233 select COMPAT
>> 3234 select MIPS32_COMPAT
>> 3235 select SYSVIPC_COMPAT if SYSVIPC
>> 3236 help
>> 3237 Select this option if you want to run n32 binaries. These are
>> 3238 64-bit binaries using 32-bit quantities for addressing and certain
>> 3239 data that would normally be 64-bit. They are used in special
>> 3240 cases.
>> 3241
>> 3242 If unsure, say N.
>> 3243
>> 3244 config BINFMT_ELF32
>> 3245 bool
>> 3246 default y if MIPS32_O32 || MIPS32_N32
>> 3247 select ELFCORE
>> 3248
>> 3249 menu "Power management options"
1160 3250
1161 config ARCH_HIBERNATION_POSSIBLE 3251 config ARCH_HIBERNATION_POSSIBLE
1162 def_bool y 3252 def_bool y
1163 !! 3253 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
1164 config ARCH_HIBERNATION_HEADER <<
1165 def_bool HIBERNATION <<
1166 3254
1167 config ARCH_SUSPEND_POSSIBLE 3255 config ARCH_SUSPEND_POSSIBLE
1168 def_bool y 3256 def_bool y
>> 3257 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
1169 3258
1170 endmenu # "Power management options" !! 3259 source "kernel/power/Kconfig"
1171 3260
1172 menu "CPU Power Management" !! 3261 endmenu
1173 3262
1174 source "drivers/cpuidle/Kconfig" !! 3263 config MIPS_EXTERNAL_TIMER
>> 3264 bool
>> 3265
>> 3266 menu "CPU Power Management"
1175 3267
>> 3268 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
1176 source "drivers/cpufreq/Kconfig" 3269 source "drivers/cpufreq/Kconfig"
>> 3270 endif
>> 3271
>> 3272 source "drivers/cpuidle/Kconfig"
1177 3273
1178 endmenu # "CPU Power Management" !! 3274 endmenu
1179 3275
1180 source "arch/riscv/kvm/Kconfig" !! 3276 source "drivers/firmware/Kconfig"
1181 3277
1182 source "drivers/acpi/Kconfig" !! 3278 source "arch/mips/kvm/Kconfig"
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