1 # SPDX-License-Identifier: GPL-2.0-only !! 1 # SPDX-License-Identifier: GPL-2.0
2 # !! 2 config MIPS
3 # For a description of the syntax of this conf <<
4 # see Documentation/kbuild/kconfig-language.rs <<
5 # <<
6 <<
7 config 64BIT <<
8 bool 3 bool
9 !! 4 default y
10 config 32BIT !! 5 select ARCH_32BIT_OFF_T if !64BIT
11 bool !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
12 <<
13 config RISCV <<
14 def_bool y <<
15 select ACPI_GENERIC_GSI if ACPI <<
16 select ACPI_MCFG if (ACPI && PCI) <<
17 select ACPI_PPTT if ACPI <<
18 select ACPI_REDUCED_HARDWARE_ONLY if A <<
19 select ACPI_SPCR_TABLE if ACPI <<
20 select ARCH_DMA_DEFAULT_COHERENT <<
21 select ARCH_ENABLE_HUGEPAGE_MIGRATION <<
22 select ARCH_ENABLE_MEMORY_HOTPLUG if S <<
23 select ARCH_ENABLE_MEMORY_HOTREMOVE if <<
24 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if <<
25 select ARCH_ENABLE_THP_MIGRATION if TR <<
26 select ARCH_HAS_BINFMT_FLAT <<
27 select ARCH_HAS_CURRENT_STACK_POINTER <<
28 select ARCH_HAS_DEBUG_VIRTUAL if MMU <<
29 select ARCH_HAS_DEBUG_VM_PGTABLE <<
30 select ARCH_HAS_DEBUG_WX <<
31 select ARCH_HAS_FAST_MULTIPLIER <<
32 select ARCH_HAS_FORTIFY_SOURCE 7 select ARCH_HAS_FORTIFY_SOURCE
33 select ARCH_HAS_GCOV_PROFILE_ALL <<
34 select ARCH_HAS_GIGANTIC_PAGE <<
35 select ARCH_HAS_KCOV 8 select ARCH_HAS_KCOV
36 select ARCH_HAS_KERNEL_FPU_SUPPORT if !! 9 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
37 select ARCH_HAS_MEMBARRIER_CALLBACKS <<
38 select ARCH_HAS_MEMBARRIER_SYNC_CORE <<
39 select ARCH_HAS_MMIOWB <<
40 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
41 select ARCH_HAS_PMEM_API <<
42 select ARCH_HAS_PREPARE_SYNC_CORE_CMD <<
43 select ARCH_HAS_PTE_DEVMAP if 64BIT && <<
44 select ARCH_HAS_PTE_SPECIAL <<
45 select ARCH_HAS_SET_DIRECT_MAP if MMU <<
46 select ARCH_HAS_SET_MEMORY if MMU <<
47 select ARCH_HAS_STRICT_KERNEL_RWX if M <<
48 select ARCH_HAS_STRICT_MODULE_RWX if M <<
49 select ARCH_HAS_SYNC_CORE_BEFORE_USERM <<
50 select ARCH_HAS_SYSCALL_WRAPPER <<
51 select ARCH_HAS_TICK_BROADCAST if GENE 10 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
52 select ARCH_HAS_UBSAN !! 11 select ARCH_HAS_UBSAN_SANITIZE_ALL
53 select ARCH_HAS_VDSO_DATA !! 12 select ARCH_SUPPORTS_UPROBES
54 select ARCH_KEEP_MEMBLOCK if ACPI !! 13 select ARCH_USE_BUILTIN_BSWAP
55 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL <<
56 select ARCH_OPTIONAL_KERNEL_RWX if ARC <<
57 select ARCH_OPTIONAL_KERNEL_RWX_DEFAUL <<
58 select ARCH_STACKWALK <<
59 select ARCH_SUPPORTS_ATOMIC_RMW <<
60 select ARCH_SUPPORTS_CFI_CLANG <<
61 select ARCH_SUPPORTS_DEBUG_PAGEALLOC i <<
62 select ARCH_SUPPORTS_HUGETLBFS if MMU <<
63 # LLD >= 14: https://github.com/llvm/l <<
64 select ARCH_SUPPORTS_LTO_CLANG if LLD_ <<
65 select ARCH_SUPPORTS_LTO_CLANG_THIN if <<
66 select ARCH_SUPPORTS_PAGE_TABLE_CHECK <<
67 select ARCH_SUPPORTS_PER_VMA_LOCK if M <<
68 select ARCH_SUPPORTS_RT <<
69 select ARCH_SUPPORTS_SHADOW_CALL_STACK <<
70 select ARCH_USE_CMPXCHG_LOCKREF if 64B 14 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
71 select ARCH_USE_MEMTEST <<
72 select ARCH_USE_QUEUED_RWLOCKS 15 select ARCH_USE_QUEUED_RWLOCKS
73 select ARCH_USE_SYM_ANNOTATIONS !! 16 select ARCH_USE_QUEUED_SPINLOCKS
74 select ARCH_USES_CFI_TRAPS if CFI_CLAN <<
75 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU <<
76 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ 17 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
77 select ARCH_WANT_FRAME_POINTERS !! 18 select ARCH_WANT_IPC_PARSE_VERSION
78 select ARCH_WANT_GENERAL_HUGETLB if !R !! 19 select BUILDTIME_TABLE_SORT
79 select ARCH_WANT_HUGE_PMD_SHARE if 64B <<
80 select ARCH_WANT_LD_ORPHAN_WARN if !XI <<
81 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
82 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM <<
83 select ARCH_WANTS_NO_INSTR <<
84 select ARCH_WANTS_THP_SWAP if HAVE_ARC <<
85 select BINFMT_FLAT_NO_DATA_START_OFFSE <<
86 select BUILDTIME_TABLE_SORT if MMU <<
87 select CLINT_TIMER if RISCV_M_MODE <<
88 select CLONE_BACKWARDS 20 select CLONE_BACKWARDS
89 select COMMON_CLK !! 21 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
90 select CPU_PM if CPU_IDLE || HIBERNATI !! 22 select CPU_PM if CPU_IDLE
91 select EDAC_SUPPORT <<
92 select FRAME_POINTER if PERF_EVENTS || <<
93 select FTRACE_MCOUNT_USE_PATCHABLE_FUN <<
94 select GENERIC_ARCH_TOPOLOGY <<
95 select GENERIC_ATOMIC64 if !64BIT 23 select GENERIC_ATOMIC64 if !64BIT
96 select GENERIC_CLOCKEVENTS_BROADCAST i !! 24 select GENERIC_CLOCKEVENTS
97 select GENERIC_CPU_DEVICES !! 25 select GENERIC_CMOS_UPDATE
98 select GENERIC_CPU_VULNERABILITIES !! 26 select GENERIC_CPU_AUTOPROBE
99 select GENERIC_EARLY_IOREMAP !! 27 select GENERIC_GETTIMEOFDAY
100 select GENERIC_ENTRY !! 28 select GENERIC_IOMAP
101 select GENERIC_GETTIMEOFDAY if HAVE_GE !! 29 select GENERIC_IRQ_PROBE
102 select GENERIC_IDLE_POLL_SETUP <<
103 select GENERIC_IOREMAP if MMU <<
104 select GENERIC_IRQ_IPI if SMP <<
105 select GENERIC_IRQ_IPI_MUX if SMP <<
106 select GENERIC_IRQ_MULTI_HANDLER <<
107 select GENERIC_IRQ_SHOW 30 select GENERIC_IRQ_SHOW
108 select GENERIC_IRQ_SHOW_LEVEL !! 31 select GENERIC_ISA_DMA if EISA
109 select GENERIC_LIB_DEVMEM_IS_ALLOWED !! 32 select GENERIC_LIB_ASHLDI3
110 select GENERIC_PCI_IOMAP !! 33 select GENERIC_LIB_ASHRDI3
111 select GENERIC_PTDUMP if MMU !! 34 select GENERIC_LIB_CMPDI2
112 select GENERIC_SCHED_CLOCK !! 35 select GENERIC_LIB_LSHRDI3
>> 36 select GENERIC_LIB_UCMPDI2
>> 37 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
113 select GENERIC_SMP_IDLE_THREAD 38 select GENERIC_SMP_IDLE_THREAD
114 select GENERIC_TIME_VSYSCALL if MMU && !! 39 select GENERIC_TIME_VSYSCALL
115 select GENERIC_VDSO_TIME_NS if HAVE_GE !! 40 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
116 select HARDIRQS_SW_RESEND !! 41 select HANDLE_DOMAIN_IRQ
117 select HAS_IOPORT if MMU !! 42 select HAVE_ARCH_COMPILER_H
118 select HAVE_ARCH_AUDITSYSCALL !! 43 select HAVE_ARCH_JUMP_LABEL
119 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ !! 44 select HAVE_ARCH_KGDB
120 select HAVE_ARCH_HUGE_VMAP if MMU && 6 <<
121 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
122 select HAVE_ARCH_JUMP_LABEL_RELATIVE i <<
123 select HAVE_ARCH_KASAN if MMU && 64BIT <<
124 select HAVE_ARCH_KASAN_VMALLOC if MMU <<
125 select HAVE_ARCH_KFENCE if MMU && 64BI <<
126 select HAVE_ARCH_KGDB if !XIP_KERNEL <<
127 select HAVE_ARCH_KGDB_QXFER_PKT <<
128 select HAVE_ARCH_MMAP_RND_BITS if MMU 45 select HAVE_ARCH_MMAP_RND_BITS if MMU
129 select HAVE_ARCH_MMAP_RND_COMPAT_BITS !! 46 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
130 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
131 select HAVE_ARCH_SECCOMP_FILTER 47 select HAVE_ARCH_SECCOMP_FILTER
132 select HAVE_ARCH_STACKLEAK <<
133 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
134 select HAVE_ARCH_TRACEHOOK 48 select HAVE_ARCH_TRACEHOOK
135 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 49 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
136 select HAVE_ARCH_USERFAULTFD_MINOR if <<
137 select HAVE_ARCH_VMAP_STACK if MMU && <<
138 select HAVE_ASM_MODVERSIONS 50 select HAVE_ASM_MODVERSIONS
139 select HAVE_CONTEXT_TRACKING_USER !! 51 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
>> 52 select HAVE_CONTEXT_TRACKING
>> 53 select HAVE_TIF_NOHZ
>> 54 select HAVE_C_RECORDMCOUNT
140 select HAVE_DEBUG_KMEMLEAK 55 select HAVE_DEBUG_KMEMLEAK
141 select HAVE_DMA_CONTIGUOUS if MMU !! 56 select HAVE_DEBUG_STACKOVERFLOW
142 select HAVE_DYNAMIC_FTRACE if !XIP_KER !! 57 select HAVE_DMA_CONTIGUOUS
143 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT !! 58 select HAVE_DYNAMIC_FTRACE
144 select HAVE_DYNAMIC_FTRACE_WITH_ARGS i !! 59 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
145 select HAVE_FTRACE_MCOUNT_RECORD if !X !! 60 select HAVE_EXIT_THREAD
>> 61 select HAVE_FAST_GUP
>> 62 select HAVE_FTRACE_MCOUNT_RECORD
146 select HAVE_FUNCTION_GRAPH_TRACER 63 select HAVE_FUNCTION_GRAPH_TRACER
147 select HAVE_FUNCTION_GRAPH_RETVAL if H !! 64 select HAVE_FUNCTION_TRACER
148 select HAVE_FUNCTION_TRACER if !XIP_KE <<
149 select HAVE_EBPF_JIT if MMU <<
150 select HAVE_GUP_FAST if MMU <<
151 select HAVE_FUNCTION_ARG_ACCESS_API <<
152 select HAVE_FUNCTION_ERROR_INJECTION <<
153 select HAVE_GCC_PLUGINS 65 select HAVE_GCC_PLUGINS
154 select HAVE_GENERIC_VDSO if MMU && 64B !! 66 select HAVE_GENERIC_VDSO
>> 67 select HAVE_IDE
>> 68 select HAVE_IOREMAP_PROT
>> 69 select HAVE_IRQ_EXIT_ON_IRQ_STACK
155 select HAVE_IRQ_TIME_ACCOUNTING 70 select HAVE_IRQ_TIME_ACCOUNTING
156 select HAVE_KERNEL_BZIP2 if !XIP_KERNE !! 71 select HAVE_KPROBES
157 select HAVE_KERNEL_GZIP if !XIP_KERNEL !! 72 select HAVE_KRETPROBES
158 select HAVE_KERNEL_LZ4 if !XIP_KERNEL !! 73 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
159 select HAVE_KERNEL_LZMA if !XIP_KERNEL !! 74 select HAVE_MOD_ARCH_SPECIFIC
160 select HAVE_KERNEL_LZO if !XIP_KERNEL !! 75 select HAVE_NMI
161 select HAVE_KERNEL_UNCOMPRESSED if !XI !! 76 select HAVE_OPROFILE
162 select HAVE_KERNEL_ZSTD if !XIP_KERNEL <<
163 select HAVE_KERNEL_XZ if !XIP_KERNEL & <<
164 select HAVE_KPROBES if !XIP_KERNEL <<
165 select HAVE_KRETPROBES if !XIP_KERNEL <<
166 # https://github.com/ClangBuiltLinux/l <<
167 select HAVE_LD_DEAD_CODE_DATA_ELIMINAT <<
168 select HAVE_MOVE_PMD <<
169 select HAVE_MOVE_PUD <<
170 select HAVE_PAGE_SIZE_4KB <<
171 select HAVE_PCI <<
172 select HAVE_PERF_EVENTS 77 select HAVE_PERF_EVENTS
173 select HAVE_PERF_REGS <<
174 select HAVE_PERF_USER_STACK_DUMP <<
175 select HAVE_POSIX_CPU_TIMERS_TASK_WORK <<
176 select HAVE_PREEMPT_DYNAMIC_KEY if !XI <<
177 select HAVE_REGS_AND_STACK_ACCESS_API 78 select HAVE_REGS_AND_STACK_ACCESS_API
178 select HAVE_RETHOOK if !XIP_KERNEL <<
179 select HAVE_RSEQ 79 select HAVE_RSEQ
180 select HAVE_RUST if RUSTC_SUPPORTS_RIS !! 80 select HAVE_SPARSE_SYSCALL_NR
181 select HAVE_SAMPLE_FTRACE_DIRECT <<
182 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI <<
183 select HAVE_STACKPROTECTOR 81 select HAVE_STACKPROTECTOR
184 select HAVE_SYSCALL_TRACEPOINTS 82 select HAVE_SYSCALL_TRACEPOINTS
185 select HOTPLUG_CORE_SYNC_DEAD if HOTPL !! 83 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
186 select IRQ_DOMAIN <<
187 select IRQ_FORCED_THREADING 84 select IRQ_FORCED_THREADING
188 select KASAN_VMALLOC if KASAN !! 85 select ISA if EISA
189 select LOCK_MM_AND_FIND_VMA !! 86 select MODULES_USE_ELF_REL if MODULES
190 select MMU_GATHER_RCU_TABLE_FREE if SM !! 87 select MODULES_USE_ELF_RELA if MODULES && 64BIT
191 select MODULES_USE_ELF_RELA if MODULES !! 88 select PERF_USE_VMALLOC
192 select OF !! 89 select RTC_LIB
193 select OF_EARLY_FLATTREE <<
194 select OF_IRQ <<
195 select PCI_DOMAINS_GENERIC if PCI <<
196 select PCI_ECAM if (ACPI && PCI) <<
197 select PCI_MSI if PCI <<
198 select RISCV_ALTERNATIVE if !XIP_KERNE <<
199 select RISCV_APLIC <<
200 select RISCV_IMSIC <<
201 select RISCV_INTC <<
202 select RISCV_TIMER if RISCV_SBI <<
203 select SIFIVE_PLIC <<
204 select SPARSE_IRQ <<
205 select SYSCTL_EXCEPTION_TRACE 90 select SYSCTL_EXCEPTION_TRACE
206 select THREAD_INFO_IN_TASK !! 91 select VIRT_TO_BUS
207 select TRACE_IRQFLAGS_SUPPORT !! 92
208 select UACCESS_MEMCPY if !MMU !! 93 config MIPS_FIXUP_BIGPHYS_ADDR
209 select USER_STACKTRACE_SUPPORT !! 94 bool
>> 95
>> 96 menu "Machine selection"
>> 97
>> 98 choice
>> 99 prompt "System type"
>> 100 default MIPS_GENERIC
>> 101
>> 102 config MIPS_GENERIC
>> 103 bool "Generic board-agnostic MIPS kernel"
>> 104 select BOOT_RAW
>> 105 select BUILTIN_DTB
>> 106 select CEVT_R4K
>> 107 select CLKSRC_MIPS_GIC
>> 108 select COMMON_CLK
>> 109 select CPU_MIPSR2_IRQ_EI
>> 110 select CPU_MIPSR2_IRQ_VI
>> 111 select CSRC_R4K
>> 112 select DMA_PERDEV_COHERENT
>> 113 select HAVE_PCI
>> 114 select IRQ_MIPS_CPU
>> 115 select MIPS_AUTO_PFN_OFFSET
>> 116 select MIPS_CPU_SCACHE
>> 117 select MIPS_GIC
>> 118 select MIPS_L1_CACHE_SHIFT_7
>> 119 select NO_EXCEPT_FILL
>> 120 select PCI_DRIVERS_GENERIC
>> 121 select SMP_UP if SMP
>> 122 select SWAP_IO_SPACE
>> 123 select SYS_HAS_CPU_MIPS32_R1
>> 124 select SYS_HAS_CPU_MIPS32_R2
>> 125 select SYS_HAS_CPU_MIPS32_R6
>> 126 select SYS_HAS_CPU_MIPS64_R1
>> 127 select SYS_HAS_CPU_MIPS64_R2
>> 128 select SYS_HAS_CPU_MIPS64_R6
>> 129 select SYS_SUPPORTS_32BIT_KERNEL
>> 130 select SYS_SUPPORTS_64BIT_KERNEL
>> 131 select SYS_SUPPORTS_BIG_ENDIAN
>> 132 select SYS_SUPPORTS_HIGHMEM
>> 133 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 134 select SYS_SUPPORTS_MICROMIPS
>> 135 select SYS_SUPPORTS_MIPS16
>> 136 select SYS_SUPPORTS_MIPS_CPS
>> 137 select SYS_SUPPORTS_MULTITHREADING
>> 138 select SYS_SUPPORTS_RELOCATABLE
>> 139 select SYS_SUPPORTS_SMARTMIPS
>> 140 select UHI_BOOT
>> 141 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 142 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 143 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 144 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 145 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 146 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 147 select USE_OF
>> 148 help
>> 149 Select this to build a kernel which aims to support multiple boards,
>> 150 generally using a flattened device tree passed from the bootloader
>> 151 using the boot protocol defined in the UHI (Unified Hosting
>> 152 Interface) specification.
>> 153
>> 154 config MIPS_ALCHEMY
>> 155 bool "Alchemy processor based machines"
>> 156 select PHYS_ADDR_T_64BIT
>> 157 select CEVT_R4K
>> 158 select CSRC_R4K
>> 159 select IRQ_MIPS_CPU
>> 160 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 161 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
>> 162 select SYS_HAS_CPU_MIPS32_R1
>> 163 select SYS_SUPPORTS_32BIT_KERNEL
>> 164 select SYS_SUPPORTS_APM_EMULATION
>> 165 select GPIOLIB
>> 166 select SYS_SUPPORTS_ZBOOT
>> 167 select COMMON_CLK
>> 168
>> 169 config AR7
>> 170 bool "Texas Instruments AR7"
>> 171 select BOOT_ELF32
>> 172 select DMA_NONCOHERENT
>> 173 select CEVT_R4K
>> 174 select CSRC_R4K
>> 175 select IRQ_MIPS_CPU
>> 176 select NO_EXCEPT_FILL
>> 177 select SWAP_IO_SPACE
>> 178 select SYS_HAS_CPU_MIPS32_R1
>> 179 select SYS_HAS_EARLY_PRINTK
>> 180 select SYS_SUPPORTS_32BIT_KERNEL
>> 181 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 182 select SYS_SUPPORTS_MIPS16
>> 183 select SYS_SUPPORTS_ZBOOT_UART16550
>> 184 select GPIOLIB
>> 185 select VLYNQ
>> 186 select HAVE_LEGACY_CLK
>> 187 help
>> 188 Support for the Texas Instruments AR7 System-on-a-Chip
>> 189 family: TNETD7100, 7200 and 7300.
>> 190
>> 191 config ATH25
>> 192 bool "Atheros AR231x/AR531x SoC support"
>> 193 select CEVT_R4K
>> 194 select CSRC_R4K
>> 195 select DMA_NONCOHERENT
>> 196 select IRQ_MIPS_CPU
>> 197 select IRQ_DOMAIN
>> 198 select SYS_HAS_CPU_MIPS32_R1
>> 199 select SYS_SUPPORTS_BIG_ENDIAN
>> 200 select SYS_SUPPORTS_32BIT_KERNEL
>> 201 select SYS_HAS_EARLY_PRINTK
>> 202 help
>> 203 Support for Atheros AR231x and Atheros AR531x based boards
>> 204
>> 205 config ATH79
>> 206 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 207 select ARCH_HAS_RESET_CONTROLLER
>> 208 select BOOT_RAW
>> 209 select CEVT_R4K
>> 210 select CSRC_R4K
>> 211 select DMA_NONCOHERENT
>> 212 select GPIOLIB
>> 213 select PINCTRL
>> 214 select COMMON_CLK
>> 215 select IRQ_MIPS_CPU
>> 216 select SYS_HAS_CPU_MIPS32_R2
>> 217 select SYS_HAS_EARLY_PRINTK
>> 218 select SYS_SUPPORTS_32BIT_KERNEL
>> 219 select SYS_SUPPORTS_BIG_ENDIAN
>> 220 select SYS_SUPPORTS_MIPS16
>> 221 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 222 select USE_OF
>> 223 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 224 help
>> 225 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 226
>> 227 config BMIPS_GENERIC
>> 228 bool "Broadcom Generic BMIPS kernel"
>> 229 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 230 select ARCH_HAS_PHYS_TO_DMA
>> 231 select BOOT_RAW
>> 232 select NO_EXCEPT_FILL
>> 233 select USE_OF
>> 234 select CEVT_R4K
>> 235 select CSRC_R4K
>> 236 select SYNC_R4K
>> 237 select COMMON_CLK
>> 238 select BCM6345_L1_IRQ
>> 239 select BCM7038_L1_IRQ
>> 240 select BCM7120_L2_IRQ
>> 241 select BRCMSTB_L2_IRQ
>> 242 select IRQ_MIPS_CPU
>> 243 select DMA_NONCOHERENT
>> 244 select SYS_SUPPORTS_32BIT_KERNEL
>> 245 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 246 select SYS_SUPPORTS_BIG_ENDIAN
>> 247 select SYS_SUPPORTS_HIGHMEM
>> 248 select SYS_HAS_CPU_BMIPS32_3300
>> 249 select SYS_HAS_CPU_BMIPS4350
>> 250 select SYS_HAS_CPU_BMIPS4380
>> 251 select SYS_HAS_CPU_BMIPS5000
>> 252 select SWAP_IO_SPACE
>> 253 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 254 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 255 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 256 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 257 select HARDIRQS_SW_RESEND
>> 258 help
>> 259 Build a generic DT-based kernel image that boots on select
>> 260 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 261 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 262 must be set appropriately for your board.
>> 263
>> 264 config BCM47XX
>> 265 bool "Broadcom BCM47XX based boards"
>> 266 select BOOT_RAW
>> 267 select CEVT_R4K
>> 268 select CSRC_R4K
>> 269 select DMA_NONCOHERENT
>> 270 select HAVE_PCI
>> 271 select IRQ_MIPS_CPU
>> 272 select SYS_HAS_CPU_MIPS32_R1
>> 273 select NO_EXCEPT_FILL
>> 274 select SYS_SUPPORTS_32BIT_KERNEL
>> 275 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 276 select SYS_SUPPORTS_MIPS16
>> 277 select SYS_SUPPORTS_ZBOOT
>> 278 select SYS_HAS_EARLY_PRINTK
>> 279 select USE_GENERIC_EARLY_PRINTK_8250
>> 280 select GPIOLIB
>> 281 select LEDS_GPIO_REGISTER
>> 282 select BCM47XX_NVRAM
>> 283 select BCM47XX_SPROM
>> 284 select BCM47XX_SSB if !BCM47XX_BCMA
>> 285 help
>> 286 Support for BCM47XX based boards
>> 287
>> 288 config BCM63XX
>> 289 bool "Broadcom BCM63XX based boards"
>> 290 select BOOT_RAW
>> 291 select CEVT_R4K
>> 292 select CSRC_R4K
>> 293 select SYNC_R4K
>> 294 select DMA_NONCOHERENT
>> 295 select IRQ_MIPS_CPU
>> 296 select SYS_SUPPORTS_32BIT_KERNEL
>> 297 select SYS_SUPPORTS_BIG_ENDIAN
>> 298 select SYS_HAS_EARLY_PRINTK
>> 299 select SWAP_IO_SPACE
>> 300 select GPIOLIB
>> 301 select MIPS_L1_CACHE_SHIFT_4
>> 302 select CLKDEV_LOOKUP
>> 303 select HAVE_LEGACY_CLK
>> 304 help
>> 305 Support for BCM63XX based boards
>> 306
>> 307 config MIPS_COBALT
>> 308 bool "Cobalt Server"
>> 309 select CEVT_R4K
>> 310 select CSRC_R4K
>> 311 select CEVT_GT641XX
>> 312 select DMA_NONCOHERENT
>> 313 select FORCE_PCI
>> 314 select I8253
>> 315 select I8259
>> 316 select IRQ_MIPS_CPU
>> 317 select IRQ_GT641XX
>> 318 select PCI_GT64XXX_PCI0
>> 319 select SYS_HAS_CPU_NEVADA
>> 320 select SYS_HAS_EARLY_PRINTK
>> 321 select SYS_SUPPORTS_32BIT_KERNEL
>> 322 select SYS_SUPPORTS_64BIT_KERNEL
>> 323 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 324 select USE_GENERIC_EARLY_PRINTK_8250
>> 325
>> 326 config MACH_DECSTATION
>> 327 bool "DECstations"
>> 328 select BOOT_ELF32
>> 329 select CEVT_DS1287
>> 330 select CEVT_R4K if CPU_R4X00
>> 331 select CSRC_IOASIC
>> 332 select CSRC_R4K if CPU_R4X00
>> 333 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 334 select CPU_R4000_WORKAROUNDS if 64BIT
>> 335 select CPU_R4400_WORKAROUNDS if 64BIT
>> 336 select DMA_NONCOHERENT
>> 337 select NO_IOPORT_MAP
>> 338 select IRQ_MIPS_CPU
>> 339 select SYS_HAS_CPU_R3000
>> 340 select SYS_HAS_CPU_R4X00
>> 341 select SYS_SUPPORTS_32BIT_KERNEL
>> 342 select SYS_SUPPORTS_64BIT_KERNEL
>> 343 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 344 select SYS_SUPPORTS_128HZ
>> 345 select SYS_SUPPORTS_256HZ
>> 346 select SYS_SUPPORTS_1024HZ
>> 347 select MIPS_L1_CACHE_SHIFT_4
>> 348 help
>> 349 This enables support for DEC's MIPS based workstations. For details
>> 350 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 351 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 352
>> 353 If you have one of the following DECstation Models you definitely
>> 354 want to choose R4xx0 for the CPU Type:
>> 355
>> 356 DECstation 5000/50
>> 357 DECstation 5000/150
>> 358 DECstation 5000/260
>> 359 DECsystem 5900/260
>> 360
>> 361 otherwise choose R3000.
>> 362
>> 363 config MACH_JAZZ
>> 364 bool "Jazz family of machines"
>> 365 select ARC_MEMORY
>> 366 select ARC_PROMLIB
>> 367 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 368 select ARCH_MIGHT_HAVE_PC_SERIO
>> 369 select DMA_OPS
>> 370 select FW_ARC
>> 371 select FW_ARC32
>> 372 select ARCH_MAY_HAVE_PC_FDC
>> 373 select CEVT_R4K
>> 374 select CSRC_R4K
>> 375 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 376 select GENERIC_ISA_DMA
>> 377 select HAVE_PCSPKR_PLATFORM
>> 378 select IRQ_MIPS_CPU
>> 379 select I8253
>> 380 select I8259
>> 381 select ISA
>> 382 select SYS_HAS_CPU_R4X00
>> 383 select SYS_SUPPORTS_32BIT_KERNEL
>> 384 select SYS_SUPPORTS_64BIT_KERNEL
>> 385 select SYS_SUPPORTS_100HZ
>> 386 help
>> 387 This a family of machines based on the MIPS R4030 chipset which was
>> 388 used by several vendors to build RISC/os and Windows NT workstations.
>> 389 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 390 Olivetti M700-10 workstations.
>> 391
>> 392 config MACH_INGENIC
>> 393 bool "Ingenic SoC based machines"
>> 394 select SYS_SUPPORTS_32BIT_KERNEL
>> 395 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 396 select SYS_SUPPORTS_ZBOOT_UART16550
>> 397 select CPU_SUPPORTS_HUGEPAGES
>> 398 select DMA_NONCOHERENT
>> 399 select IRQ_MIPS_CPU
>> 400 select PINCTRL
>> 401 select GPIOLIB
>> 402 select COMMON_CLK
>> 403 select GENERIC_IRQ_CHIP
>> 404 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 405 select USE_OF
>> 406
>> 407 config LANTIQ
>> 408 bool "Lantiq based platforms"
>> 409 select DMA_NONCOHERENT
>> 410 select IRQ_MIPS_CPU
>> 411 select CEVT_R4K
>> 412 select CSRC_R4K
>> 413 select SYS_HAS_CPU_MIPS32_R1
>> 414 select SYS_HAS_CPU_MIPS32_R2
>> 415 select SYS_SUPPORTS_BIG_ENDIAN
>> 416 select SYS_SUPPORTS_32BIT_KERNEL
>> 417 select SYS_SUPPORTS_MIPS16
>> 418 select SYS_SUPPORTS_MULTITHREADING
>> 419 select SYS_SUPPORTS_VPE_LOADER
>> 420 select SYS_HAS_EARLY_PRINTK
>> 421 select GPIOLIB
>> 422 select SWAP_IO_SPACE
>> 423 select BOOT_RAW
>> 424 select CLKDEV_LOOKUP
>> 425 select HAVE_LEGACY_CLK
>> 426 select USE_OF
>> 427 select PINCTRL
>> 428 select PINCTRL_LANTIQ
>> 429 select ARCH_HAS_RESET_CONTROLLER
>> 430 select RESET_CONTROLLER
>> 431
>> 432 config MACH_LOONGSON32
>> 433 bool "Loongson 32-bit family of machines"
>> 434 select SYS_SUPPORTS_ZBOOT
>> 435 help
>> 436 This enables support for the Loongson-1 family of machines.
>> 437
>> 438 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 439 the Institute of Computing Technology (ICT), Chinese Academy of
>> 440 Sciences (CAS).
>> 441
>> 442 config MACH_LOONGSON2EF
>> 443 bool "Loongson-2E/F family of machines"
>> 444 select SYS_SUPPORTS_ZBOOT
>> 445 help
>> 446 This enables the support of early Loongson-2E/F family of machines.
>> 447
>> 448 config MACH_LOONGSON64
>> 449 bool "Loongson 64-bit family of machines"
>> 450 select ARCH_SPARSEMEM_ENABLE
>> 451 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 452 select ARCH_MIGHT_HAVE_PC_SERIO
>> 453 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 454 select BOOT_ELF32
>> 455 select BOARD_SCACHE
>> 456 select CSRC_R4K
>> 457 select CEVT_R4K
>> 458 select CPU_HAS_WB
>> 459 select FORCE_PCI
>> 460 select ISA
>> 461 select I8259
>> 462 select IRQ_MIPS_CPU
>> 463 select NO_EXCEPT_FILL
>> 464 select NR_CPUS_DEFAULT_64
>> 465 select USE_GENERIC_EARLY_PRINTK_8250
>> 466 select PCI_DRIVERS_GENERIC
>> 467 select SYS_HAS_CPU_LOONGSON64
>> 468 select SYS_HAS_EARLY_PRINTK
>> 469 select SYS_SUPPORTS_SMP
>> 470 select SYS_SUPPORTS_HOTPLUG_CPU
>> 471 select SYS_SUPPORTS_NUMA
>> 472 select SYS_SUPPORTS_64BIT_KERNEL
>> 473 select SYS_SUPPORTS_HIGHMEM
>> 474 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 475 select SYS_SUPPORTS_ZBOOT
>> 476 select ZONE_DMA32
>> 477 select NUMA
>> 478 select COMMON_CLK
>> 479 select USE_OF
>> 480 select BUILTIN_DTB
>> 481 select PCI_HOST_GENERIC
>> 482 help
>> 483 This enables the support of Loongson-2/3 family of machines.
>> 484
>> 485 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
>> 486 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
>> 487 and Loongson-2F which will be removed), developed by the Institute
>> 488 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
>> 489
>> 490 config MACH_PISTACHIO
>> 491 bool "IMG Pistachio SoC based boards"
>> 492 select BOOT_ELF32
>> 493 select BOOT_RAW
>> 494 select CEVT_R4K
>> 495 select CLKSRC_MIPS_GIC
>> 496 select COMMON_CLK
>> 497 select CSRC_R4K
>> 498 select DMA_NONCOHERENT
>> 499 select GPIOLIB
>> 500 select IRQ_MIPS_CPU
>> 501 select MFD_SYSCON
>> 502 select MIPS_CPU_SCACHE
>> 503 select MIPS_GIC
>> 504 select PINCTRL
>> 505 select REGULATOR
>> 506 select SYS_HAS_CPU_MIPS32_R2
>> 507 select SYS_SUPPORTS_32BIT_KERNEL
>> 508 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 509 select SYS_SUPPORTS_MIPS_CPS
>> 510 select SYS_SUPPORTS_MULTITHREADING
>> 511 select SYS_SUPPORTS_RELOCATABLE
>> 512 select SYS_SUPPORTS_ZBOOT
>> 513 select SYS_HAS_EARLY_PRINTK
>> 514 select USE_GENERIC_EARLY_PRINTK_8250
>> 515 select USE_OF
>> 516 help
>> 517 This enables support for the IMG Pistachio SoC platform.
>> 518
>> 519 config MIPS_MALTA
>> 520 bool "MIPS Malta board"
>> 521 select ARCH_MAY_HAVE_PC_FDC
>> 522 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 523 select ARCH_MIGHT_HAVE_PC_SERIO
>> 524 select BOOT_ELF32
>> 525 select BOOT_RAW
>> 526 select BUILTIN_DTB
>> 527 select CEVT_R4K
>> 528 select CLKSRC_MIPS_GIC
>> 529 select COMMON_CLK
>> 530 select CSRC_R4K
>> 531 select DMA_MAYBE_COHERENT
>> 532 select GENERIC_ISA_DMA
>> 533 select HAVE_PCSPKR_PLATFORM
>> 534 select HAVE_PCI
>> 535 select I8253
>> 536 select I8259
>> 537 select IRQ_MIPS_CPU
>> 538 select MIPS_BONITO64
>> 539 select MIPS_CPU_SCACHE
>> 540 select MIPS_GIC
>> 541 select MIPS_L1_CACHE_SHIFT_6
>> 542 select MIPS_MSC
>> 543 select PCI_GT64XXX_PCI0
>> 544 select SMP_UP if SMP
>> 545 select SWAP_IO_SPACE
>> 546 select SYS_HAS_CPU_MIPS32_R1
>> 547 select SYS_HAS_CPU_MIPS32_R2
>> 548 select SYS_HAS_CPU_MIPS32_R3_5
>> 549 select SYS_HAS_CPU_MIPS32_R5
>> 550 select SYS_HAS_CPU_MIPS32_R6
>> 551 select SYS_HAS_CPU_MIPS64_R1
>> 552 select SYS_HAS_CPU_MIPS64_R2
>> 553 select SYS_HAS_CPU_MIPS64_R6
>> 554 select SYS_HAS_CPU_NEVADA
>> 555 select SYS_HAS_CPU_RM7000
>> 556 select SYS_SUPPORTS_32BIT_KERNEL
>> 557 select SYS_SUPPORTS_64BIT_KERNEL
>> 558 select SYS_SUPPORTS_BIG_ENDIAN
>> 559 select SYS_SUPPORTS_HIGHMEM
>> 560 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 561 select SYS_SUPPORTS_MICROMIPS
>> 562 select SYS_SUPPORTS_MIPS16
>> 563 select SYS_SUPPORTS_MIPS_CMP
>> 564 select SYS_SUPPORTS_MIPS_CPS
>> 565 select SYS_SUPPORTS_MULTITHREADING
>> 566 select SYS_SUPPORTS_RELOCATABLE
>> 567 select SYS_SUPPORTS_SMARTMIPS
>> 568 select SYS_SUPPORTS_VPE_LOADER
>> 569 select SYS_SUPPORTS_ZBOOT
>> 570 select USE_OF
210 select ZONE_DMA32 if 64BIT 571 select ZONE_DMA32 if 64BIT
>> 572 help
>> 573 This enables support for the MIPS Technologies Malta evaluation
>> 574 board.
211 575
212 config RUSTC_SUPPORTS_RISCV !! 576 config MACH_PIC32
213 def_bool y !! 577 bool "Microchip PIC32 Family"
214 depends on 64BIT !! 578 help
215 # Shadow call stack requires rustc ver !! 579 This enables support for the Microchip PIC32 family of platforms.
216 # -Zsanitizer=shadow-call-stack flag. <<
217 depends on !SHADOW_CALL_STACK || RUSTC <<
218 <<
219 config CLANG_SUPPORTS_DYNAMIC_FTRACE <<
220 def_bool CC_IS_CLANG <<
221 # https://github.com/ClangBuiltLinux/l <<
222 depends on AS_IS_GNU || (AS_IS_LLVM && <<
223 <<
224 config GCC_SUPPORTS_DYNAMIC_FTRACE <<
225 def_bool CC_IS_GCC <<
226 depends on $(cc-option,-fpatchable-fun <<
227 <<
228 config HAVE_SHADOW_CALL_STACK <<
229 def_bool $(cc-option,-fsanitize=shadow <<
230 # https://github.com/riscv-non-isa/ris <<
231 depends on $(ld-option,--no-relax-gp) <<
232 580
233 config RISCV_USE_LINKER_RELAXATION !! 581 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
234 def_bool y !! 582 microcontrollers.
235 # https://github.com/llvm/llvm-project !! 583
236 depends on !LD_IS_LLD || LLD_VERSION > !! 584 config MACH_VR41XX
>> 585 bool "NEC VR4100 series based machines"
>> 586 select CEVT_R4K
>> 587 select CSRC_R4K
>> 588 select SYS_HAS_CPU_VR41XX
>> 589 select SYS_SUPPORTS_MIPS16
>> 590 select GPIOLIB
>> 591
>> 592 config NXP_STB220
>> 593 bool "NXP STB220 board"
>> 594 select SOC_PNX833X
>> 595 help
>> 596 Support for NXP Semiconductors STB220 Development Board.
>> 597
>> 598 config NXP_STB225
>> 599 bool "NXP 225 board"
>> 600 select SOC_PNX833X
>> 601 select SOC_PNX8335
>> 602 help
>> 603 Support for NXP Semiconductors STB225 Development Board.
>> 604
>> 605 config RALINK
>> 606 bool "Ralink based machines"
>> 607 select CEVT_R4K
>> 608 select CSRC_R4K
>> 609 select BOOT_RAW
>> 610 select DMA_NONCOHERENT
>> 611 select IRQ_MIPS_CPU
>> 612 select USE_OF
>> 613 select SYS_HAS_CPU_MIPS32_R1
>> 614 select SYS_HAS_CPU_MIPS32_R2
>> 615 select SYS_SUPPORTS_32BIT_KERNEL
>> 616 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 617 select SYS_SUPPORTS_MIPS16
>> 618 select SYS_HAS_EARLY_PRINTK
>> 619 select CLKDEV_LOOKUP
>> 620 select ARCH_HAS_RESET_CONTROLLER
>> 621 select RESET_CONTROLLER
>> 622
>> 623 config SGI_IP22
>> 624 bool "SGI IP22 (Indy/Indigo2)"
>> 625 select ARC_MEMORY
>> 626 select ARC_PROMLIB
>> 627 select FW_ARC
>> 628 select FW_ARC32
>> 629 select ARCH_MIGHT_HAVE_PC_SERIO
>> 630 select BOOT_ELF32
>> 631 select CEVT_R4K
>> 632 select CSRC_R4K
>> 633 select DEFAULT_SGI_PARTITION
>> 634 select DMA_NONCOHERENT
>> 635 select HAVE_EISA
>> 636 select I8253
>> 637 select I8259
>> 638 select IP22_CPU_SCACHE
>> 639 select IRQ_MIPS_CPU
>> 640 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 641 select SGI_HAS_I8042
>> 642 select SGI_HAS_INDYDOG
>> 643 select SGI_HAS_HAL2
>> 644 select SGI_HAS_SEEQ
>> 645 select SGI_HAS_WD93
>> 646 select SGI_HAS_ZILOG
>> 647 select SWAP_IO_SPACE
>> 648 select SYS_HAS_CPU_R4X00
>> 649 select SYS_HAS_CPU_R5000
>> 650 select SYS_HAS_EARLY_PRINTK
>> 651 select SYS_SUPPORTS_32BIT_KERNEL
>> 652 select SYS_SUPPORTS_64BIT_KERNEL
>> 653 select SYS_SUPPORTS_BIG_ENDIAN
>> 654 select MIPS_L1_CACHE_SHIFT_7
>> 655 help
>> 656 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 657 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 658 that runs on these, say Y here.
>> 659
>> 660 config SGI_IP27
>> 661 bool "SGI IP27 (Origin200/2000)"
>> 662 select ARCH_HAS_PHYS_TO_DMA
>> 663 select ARCH_SPARSEMEM_ENABLE
>> 664 select FW_ARC
>> 665 select FW_ARC64
>> 666 select ARC_CMDLINE_ONLY
>> 667 select BOOT_ELF64
>> 668 select DEFAULT_SGI_PARTITION
>> 669 select SYS_HAS_EARLY_PRINTK
>> 670 select HAVE_PCI
>> 671 select IRQ_MIPS_CPU
>> 672 select IRQ_DOMAIN_HIERARCHY
>> 673 select NR_CPUS_DEFAULT_64
>> 674 select PCI_DRIVERS_GENERIC
>> 675 select PCI_XTALK_BRIDGE
>> 676 select SYS_HAS_CPU_R10000
>> 677 select SYS_SUPPORTS_64BIT_KERNEL
>> 678 select SYS_SUPPORTS_BIG_ENDIAN
>> 679 select SYS_SUPPORTS_NUMA
>> 680 select SYS_SUPPORTS_SMP
>> 681 select MIPS_L1_CACHE_SHIFT_7
>> 682 select NUMA
>> 683 help
>> 684 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 685 workstations. To compile a Linux kernel that runs on these, say Y
>> 686 here.
237 687
238 # https://github.com/llvm/llvm-project/commit/ !! 688 config SGI_IP28
239 config ARCH_HAS_BROKEN_DWARF5 !! 689 bool "SGI IP28 (Indigo2 R10k)"
240 def_bool y !! 690 select ARC_MEMORY
241 depends on RISCV_USE_LINKER_RELAXATION !! 691 select ARC_PROMLIB
242 # https://github.com/llvm/llvm-project !! 692 select FW_ARC
243 depends on AS_IS_LLVM && AS_VERSION < !! 693 select FW_ARC64
244 # https://github.com/llvm/llvm-project !! 694 select ARCH_MIGHT_HAVE_PC_SERIO
245 depends on LD_IS_LLD && LLD_VERSION < !! 695 select BOOT_ELF64
>> 696 select CEVT_R4K
>> 697 select CSRC_R4K
>> 698 select DEFAULT_SGI_PARTITION
>> 699 select DMA_NONCOHERENT
>> 700 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 701 select IRQ_MIPS_CPU
>> 702 select HAVE_EISA
>> 703 select I8253
>> 704 select I8259
>> 705 select SGI_HAS_I8042
>> 706 select SGI_HAS_INDYDOG
>> 707 select SGI_HAS_HAL2
>> 708 select SGI_HAS_SEEQ
>> 709 select SGI_HAS_WD93
>> 710 select SGI_HAS_ZILOG
>> 711 select SWAP_IO_SPACE
>> 712 select SYS_HAS_CPU_R10000
>> 713 select SYS_HAS_EARLY_PRINTK
>> 714 select SYS_SUPPORTS_64BIT_KERNEL
>> 715 select SYS_SUPPORTS_BIG_ENDIAN
>> 716 select MIPS_L1_CACHE_SHIFT_7
>> 717 help
>> 718 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 719 kernel that runs on these, say Y here.
>> 720
>> 721 config SGI_IP30
>> 722 bool "SGI IP30 (Octane/Octane2)"
>> 723 select ARCH_HAS_PHYS_TO_DMA
>> 724 select FW_ARC
>> 725 select FW_ARC64
>> 726 select BOOT_ELF64
>> 727 select CEVT_R4K
>> 728 select CSRC_R4K
>> 729 select SYNC_R4K if SMP
>> 730 select ZONE_DMA32
>> 731 select HAVE_PCI
>> 732 select IRQ_MIPS_CPU
>> 733 select IRQ_DOMAIN_HIERARCHY
>> 734 select NR_CPUS_DEFAULT_2
>> 735 select PCI_DRIVERS_GENERIC
>> 736 select PCI_XTALK_BRIDGE
>> 737 select SYS_HAS_EARLY_PRINTK
>> 738 select SYS_HAS_CPU_R10000
>> 739 select SYS_SUPPORTS_64BIT_KERNEL
>> 740 select SYS_SUPPORTS_BIG_ENDIAN
>> 741 select SYS_SUPPORTS_SMP
>> 742 select MIPS_L1_CACHE_SHIFT_7
>> 743 select ARC_MEMORY
>> 744 help
>> 745 These are the SGI Octane and Octane2 graphics workstations. To
>> 746 compile a Linux kernel that runs on these, say Y here.
>> 747
>> 748 config SGI_IP32
>> 749 bool "SGI IP32 (O2)"
>> 750 select ARC_MEMORY
>> 751 select ARC_PROMLIB
>> 752 select ARCH_HAS_PHYS_TO_DMA
>> 753 select FW_ARC
>> 754 select FW_ARC32
>> 755 select BOOT_ELF32
>> 756 select CEVT_R4K
>> 757 select CSRC_R4K
>> 758 select DMA_NONCOHERENT
>> 759 select HAVE_PCI
>> 760 select IRQ_MIPS_CPU
>> 761 select R5000_CPU_SCACHE
>> 762 select RM7000_CPU_SCACHE
>> 763 select SYS_HAS_CPU_R5000
>> 764 select SYS_HAS_CPU_R10000 if BROKEN
>> 765 select SYS_HAS_CPU_RM7000
>> 766 select SYS_HAS_CPU_NEVADA
>> 767 select SYS_SUPPORTS_64BIT_KERNEL
>> 768 select SYS_SUPPORTS_BIG_ENDIAN
>> 769 help
>> 770 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 771
>> 772 config SIBYTE_CRHINE
>> 773 bool "Sibyte BCM91120C-CRhine"
>> 774 select BOOT_ELF32
>> 775 select SIBYTE_BCM1120
>> 776 select SWAP_IO_SPACE
>> 777 select SYS_HAS_CPU_SB1
>> 778 select SYS_SUPPORTS_BIG_ENDIAN
>> 779 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 780
>> 781 config SIBYTE_CARMEL
>> 782 bool "Sibyte BCM91120x-Carmel"
>> 783 select BOOT_ELF32
>> 784 select SIBYTE_BCM1120
>> 785 select SWAP_IO_SPACE
>> 786 select SYS_HAS_CPU_SB1
>> 787 select SYS_SUPPORTS_BIG_ENDIAN
>> 788 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 789
>> 790 config SIBYTE_CRHONE
>> 791 bool "Sibyte BCM91125C-CRhone"
>> 792 select BOOT_ELF32
>> 793 select SIBYTE_BCM1125
>> 794 select SWAP_IO_SPACE
>> 795 select SYS_HAS_CPU_SB1
>> 796 select SYS_SUPPORTS_BIG_ENDIAN
>> 797 select SYS_SUPPORTS_HIGHMEM
>> 798 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 799
>> 800 config SIBYTE_RHONE
>> 801 bool "Sibyte BCM91125E-Rhone"
>> 802 select BOOT_ELF32
>> 803 select SIBYTE_BCM1125H
>> 804 select SWAP_IO_SPACE
>> 805 select SYS_HAS_CPU_SB1
>> 806 select SYS_SUPPORTS_BIG_ENDIAN
>> 807 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 808
>> 809 config SIBYTE_SWARM
>> 810 bool "Sibyte BCM91250A-SWARM"
>> 811 select BOOT_ELF32
>> 812 select HAVE_PATA_PLATFORM
>> 813 select SIBYTE_SB1250
>> 814 select SWAP_IO_SPACE
>> 815 select SYS_HAS_CPU_SB1
>> 816 select SYS_SUPPORTS_BIG_ENDIAN
>> 817 select SYS_SUPPORTS_HIGHMEM
>> 818 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 819 select ZONE_DMA32 if 64BIT
>> 820 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
246 821
247 config ARCH_MMAP_RND_BITS_MIN !! 822 config SIBYTE_LITTLESUR
248 default 18 if 64BIT !! 823 bool "Sibyte BCM91250C2-LittleSur"
249 default 8 !! 824 select BOOT_ELF32
>> 825 select HAVE_PATA_PLATFORM
>> 826 select SIBYTE_SB1250
>> 827 select SWAP_IO_SPACE
>> 828 select SYS_HAS_CPU_SB1
>> 829 select SYS_SUPPORTS_BIG_ENDIAN
>> 830 select SYS_SUPPORTS_HIGHMEM
>> 831 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 832 select ZONE_DMA32 if 64BIT
250 833
251 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 834 config SIBYTE_SENTOSA
252 default 8 !! 835 bool "Sibyte BCM91250E-Sentosa"
>> 836 select BOOT_ELF32
>> 837 select SIBYTE_SB1250
>> 838 select SWAP_IO_SPACE
>> 839 select SYS_HAS_CPU_SB1
>> 840 select SYS_SUPPORTS_BIG_ENDIAN
>> 841 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 842 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 843
>> 844 config SIBYTE_BIGSUR
>> 845 bool "Sibyte BCM91480B-BigSur"
>> 846 select BOOT_ELF32
>> 847 select NR_CPUS_DEFAULT_4
>> 848 select SIBYTE_BCM1x80
>> 849 select SWAP_IO_SPACE
>> 850 select SYS_HAS_CPU_SB1
>> 851 select SYS_SUPPORTS_BIG_ENDIAN
>> 852 select SYS_SUPPORTS_HIGHMEM
>> 853 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 854 select ZONE_DMA32 if 64BIT
>> 855 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
253 856
254 # max bits determined by the following formula !! 857 config SNI_RM
255 # VA_BITS - PAGE_SHIFT - 3 !! 858 bool "SNI RM200/300/400"
256 config ARCH_MMAP_RND_BITS_MAX !! 859 select ARC_MEMORY
257 default 24 if 64BIT # SV39 based !! 860 select ARC_PROMLIB
258 default 17 !! 861 select FW_ARC if CPU_LITTLE_ENDIAN
>> 862 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 863 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 864 select ARCH_MAY_HAVE_PC_FDC
>> 865 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 866 select ARCH_MIGHT_HAVE_PC_SERIO
>> 867 select BOOT_ELF32
>> 868 select CEVT_R4K
>> 869 select CSRC_R4K
>> 870 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 871 select DMA_NONCOHERENT
>> 872 select GENERIC_ISA_DMA
>> 873 select HAVE_EISA
>> 874 select HAVE_PCSPKR_PLATFORM
>> 875 select HAVE_PCI
>> 876 select IRQ_MIPS_CPU
>> 877 select I8253
>> 878 select I8259
>> 879 select ISA
>> 880 select MIPS_L1_CACHE_SHIFT_6
>> 881 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 882 select SYS_HAS_CPU_R4X00
>> 883 select SYS_HAS_CPU_R5000
>> 884 select SYS_HAS_CPU_R10000
>> 885 select R5000_CPU_SCACHE
>> 886 select SYS_HAS_EARLY_PRINTK
>> 887 select SYS_SUPPORTS_32BIT_KERNEL
>> 888 select SYS_SUPPORTS_64BIT_KERNEL
>> 889 select SYS_SUPPORTS_BIG_ENDIAN
>> 890 select SYS_SUPPORTS_HIGHMEM
>> 891 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 892 help
>> 893 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 894 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 895 Technology and now in turn merged with Fujitsu. Say Y here to
>> 896 support this machine type.
>> 897
>> 898 config MACH_TX39XX
>> 899 bool "Toshiba TX39 series based machines"
>> 900
>> 901 config MACH_TX49XX
>> 902 bool "Toshiba TX49 series based machines"
>> 903
>> 904 config MIKROTIK_RB532
>> 905 bool "Mikrotik RB532 boards"
>> 906 select CEVT_R4K
>> 907 select CSRC_R4K
>> 908 select DMA_NONCOHERENT
>> 909 select HAVE_PCI
>> 910 select IRQ_MIPS_CPU
>> 911 select SYS_HAS_CPU_MIPS32_R1
>> 912 select SYS_SUPPORTS_32BIT_KERNEL
>> 913 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 914 select SWAP_IO_SPACE
>> 915 select BOOT_RAW
>> 916 select GPIOLIB
>> 917 select MIPS_L1_CACHE_SHIFT_4
>> 918 help
>> 919 Support the Mikrotik(tm) RouterBoard 532 series,
>> 920 based on the IDT RC32434 SoC.
>> 921
>> 922 config CAVIUM_OCTEON_SOC
>> 923 bool "Cavium Networks Octeon SoC based boards"
>> 924 select CEVT_R4K
>> 925 select ARCH_HAS_PHYS_TO_DMA
>> 926 select HAVE_RAPIDIO
>> 927 select PHYS_ADDR_T_64BIT
>> 928 select SYS_SUPPORTS_64BIT_KERNEL
>> 929 select SYS_SUPPORTS_BIG_ENDIAN
>> 930 select EDAC_SUPPORT
>> 931 select EDAC_ATOMIC_SCRUB
>> 932 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 933 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 934 select SYS_HAS_EARLY_PRINTK
>> 935 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 936 select HAVE_PCI
>> 937 select HAVE_PLAT_DELAY
>> 938 select HAVE_PLAT_FW_INIT_CMDLINE
>> 939 select HAVE_PLAT_MEMCPY
>> 940 select ZONE_DMA32
>> 941 select HOLES_IN_ZONE
>> 942 select GPIOLIB
>> 943 select USE_OF
>> 944 select ARCH_SPARSEMEM_ENABLE
>> 945 select SYS_SUPPORTS_SMP
>> 946 select NR_CPUS_DEFAULT_64
>> 947 select MIPS_NR_CPU_NR_MAP_1024
>> 948 select BUILTIN_DTB
>> 949 select MTD_COMPLEX_MAPPINGS
>> 950 select SWIOTLB
>> 951 select SYS_SUPPORTS_RELOCATABLE
>> 952 help
>> 953 This option supports all of the Octeon reference boards from Cavium
>> 954 Networks. It builds a kernel that dynamically determines the Octeon
>> 955 CPU type and supports all known board reference implementations.
>> 956 Some of the supported boards are:
>> 957 EBT3000
>> 958 EBH3000
>> 959 EBH3100
>> 960 Thunder
>> 961 Kodama
>> 962 Hikari
>> 963 Say Y here for most Octeon reference boards.
>> 964
>> 965 config NLM_XLR_BOARD
>> 966 bool "Netlogic XLR/XLS based systems"
>> 967 select BOOT_ELF32
>> 968 select NLM_COMMON
>> 969 select SYS_HAS_CPU_XLR
>> 970 select SYS_SUPPORTS_SMP
>> 971 select HAVE_PCI
>> 972 select SWAP_IO_SPACE
>> 973 select SYS_SUPPORTS_32BIT_KERNEL
>> 974 select SYS_SUPPORTS_64BIT_KERNEL
>> 975 select PHYS_ADDR_T_64BIT
>> 976 select SYS_SUPPORTS_BIG_ENDIAN
>> 977 select SYS_SUPPORTS_HIGHMEM
>> 978 select NR_CPUS_DEFAULT_32
>> 979 select CEVT_R4K
>> 980 select CSRC_R4K
>> 981 select IRQ_MIPS_CPU
>> 982 select ZONE_DMA32 if 64BIT
>> 983 select SYNC_R4K
>> 984 select SYS_HAS_EARLY_PRINTK
>> 985 select SYS_SUPPORTS_ZBOOT
>> 986 select SYS_SUPPORTS_ZBOOT_UART16550
>> 987 help
>> 988 Support for systems based on Netlogic XLR and XLS processors.
>> 989 Say Y here if you have a XLR or XLS based board.
>> 990
>> 991 config NLM_XLP_BOARD
>> 992 bool "Netlogic XLP based systems"
>> 993 select BOOT_ELF32
>> 994 select NLM_COMMON
>> 995 select SYS_HAS_CPU_XLP
>> 996 select SYS_SUPPORTS_SMP
>> 997 select HAVE_PCI
>> 998 select SYS_SUPPORTS_32BIT_KERNEL
>> 999 select SYS_SUPPORTS_64BIT_KERNEL
>> 1000 select PHYS_ADDR_T_64BIT
>> 1001 select GPIOLIB
>> 1002 select SYS_SUPPORTS_BIG_ENDIAN
>> 1003 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1004 select SYS_SUPPORTS_HIGHMEM
>> 1005 select NR_CPUS_DEFAULT_32
>> 1006 select CEVT_R4K
>> 1007 select CSRC_R4K
>> 1008 select IRQ_MIPS_CPU
>> 1009 select ZONE_DMA32 if 64BIT
>> 1010 select SYNC_R4K
>> 1011 select SYS_HAS_EARLY_PRINTK
>> 1012 select USE_OF
>> 1013 select SYS_SUPPORTS_ZBOOT
>> 1014 select SYS_SUPPORTS_ZBOOT_UART16550
>> 1015 help
>> 1016 This board is based on Netlogic XLP Processor.
>> 1017 Say Y here if you have a XLP based board.
259 1018
260 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 1019 endchoice
261 default 17 !! 1020
>> 1021 source "arch/mips/alchemy/Kconfig"
>> 1022 source "arch/mips/ath25/Kconfig"
>> 1023 source "arch/mips/ath79/Kconfig"
>> 1024 source "arch/mips/bcm47xx/Kconfig"
>> 1025 source "arch/mips/bcm63xx/Kconfig"
>> 1026 source "arch/mips/bmips/Kconfig"
>> 1027 source "arch/mips/generic/Kconfig"
>> 1028 source "arch/mips/jazz/Kconfig"
>> 1029 source "arch/mips/jz4740/Kconfig"
>> 1030 source "arch/mips/lantiq/Kconfig"
>> 1031 source "arch/mips/pic32/Kconfig"
>> 1032 source "arch/mips/pistachio/Kconfig"
>> 1033 source "arch/mips/ralink/Kconfig"
>> 1034 source "arch/mips/sgi-ip27/Kconfig"
>> 1035 source "arch/mips/sibyte/Kconfig"
>> 1036 source "arch/mips/txx9/Kconfig"
>> 1037 source "arch/mips/vr41xx/Kconfig"
>> 1038 source "arch/mips/cavium-octeon/Kconfig"
>> 1039 source "arch/mips/loongson2ef/Kconfig"
>> 1040 source "arch/mips/loongson32/Kconfig"
>> 1041 source "arch/mips/loongson64/Kconfig"
>> 1042 source "arch/mips/netlogic/Kconfig"
262 1043
263 # set if we run in machine mode, cleared if we !! 1044 endmenu
264 config RISCV_M_MODE !! 1045
265 bool "Build a kernel that runs in mach !! 1046 config GENERIC_HWEIGHT
266 depends on !MMU !! 1047 bool
267 default y 1048 default y
268 help <<
269 Select this option if you want to ru <<
270 without the assistance of any other <<
271 1049
272 # set if we are running in S-mode and can use !! 1050 config GENERIC_CALIBRATE_DELAY
273 config RISCV_SBI <<
274 bool 1051 bool
275 depends on !RISCV_M_MODE <<
276 default y 1052 default y
277 1053
278 config MMU !! 1054 config SCHED_OMIT_FRAME_POINTER
279 bool "MMU-based Paged Memory Managemen !! 1055 bool
280 default y 1056 default y
281 help <<
282 Select if you want MMU-based virtual <<
283 support by paged memory management. <<
284 1057
285 config PAGE_OFFSET !! 1058 #
286 hex !! 1059 # Select some configuration options automatically based on user selections.
287 default 0x80000000 if !MMU && RISCV_M_ !! 1060 #
288 default 0x80200000 if !MMU !! 1061 config FW_ARC
289 default 0xc0000000 if 32BIT !! 1062 bool
290 default 0xff60000000000000 if 64BIT <<
291 <<
292 config KASAN_SHADOW_OFFSET <<
293 hex <<
294 depends on KASAN_GENERIC <<
295 default 0xdfffffff00000000 if 64BIT <<
296 default 0xffffffff if 32BIT <<
297 1063
298 config ARCH_FLATMEM_ENABLE !! 1064 config ARCH_MAY_HAVE_PC_FDC
299 def_bool !NUMA !! 1065 bool
300 1066
301 config ARCH_SPARSEMEM_ENABLE !! 1067 config BOOT_RAW
302 def_bool y !! 1068 bool
303 depends on MMU <<
304 select SPARSEMEM_STATIC if 32BIT && SP <<
305 select SPARSEMEM_VMEMMAP_ENABLE if 64B <<
306 1069
307 config ARCH_SELECT_MEMORY_MODEL !! 1070 config CEVT_BCM1480
308 def_bool ARCH_SPARSEMEM_ENABLE !! 1071 bool
309 1072
310 config ARCH_SUPPORTS_UPROBES !! 1073 config CEVT_DS1287
311 def_bool y !! 1074 bool
312 1075
313 config STACKTRACE_SUPPORT !! 1076 config CEVT_GT641XX
314 def_bool y !! 1077 bool
315 1078
316 config GENERIC_BUG !! 1079 config CEVT_R4K
317 def_bool y !! 1080 bool
318 depends on BUG <<
319 select GENERIC_BUG_RELATIVE_POINTERS i <<
320 1081
321 config GENERIC_BUG_RELATIVE_POINTERS !! 1082 config CEVT_SB1250
322 bool 1083 bool
323 1084
324 config GENERIC_CALIBRATE_DELAY !! 1085 config CEVT_TXX9
325 def_bool y !! 1086 bool
326 1087
327 config GENERIC_CSUM !! 1088 config CSRC_BCM1480
328 def_bool y !! 1089 bool
329 1090
330 config GENERIC_HWEIGHT !! 1091 config CSRC_IOASIC
331 def_bool y !! 1092 bool
332 1093
333 config FIX_EARLYCON_MEM !! 1094 config CSRC_R4K
334 def_bool MMU !! 1095 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
>> 1096 bool
335 1097
336 config ILLEGAL_POINTER_VALUE !! 1098 config CSRC_SB1250
337 hex !! 1099 bool
338 default 0 if 32BIT <<
339 default 0xdead000000000000 if 64BIT <<
340 1100
341 config PGTABLE_LEVELS !! 1101 config MIPS_CLOCK_VSYSCALL
342 int !! 1102 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
343 default 5 if 64BIT <<
344 default 2 <<
345 1103
346 config LOCKDEP_SUPPORT !! 1104 config GPIO_TXX9
347 def_bool y !! 1105 select GPIOLIB
>> 1106 bool
348 1107
349 config RISCV_DMA_NONCOHERENT !! 1108 config FW_CFE
>> 1109 bool
>> 1110
>> 1111 config ARCH_SUPPORTS_UPROBES
>> 1112 bool
>> 1113
>> 1114 config DMA_MAYBE_COHERENT
>> 1115 select ARCH_HAS_DMA_COHERENCE_H
>> 1116 select DMA_NONCOHERENT
>> 1117 bool
>> 1118
>> 1119 config DMA_PERDEV_COHERENT
350 bool 1120 bool
351 select ARCH_HAS_DMA_PREP_COHERENT <<
352 select ARCH_HAS_SETUP_DMA_OPS 1121 select ARCH_HAS_SETUP_DMA_OPS
353 select ARCH_HAS_SYNC_DMA_FOR_CPU !! 1122 select DMA_NONCOHERENT
>> 1123
>> 1124 config DMA_NONCOHERENT
>> 1125 bool
>> 1126 #
>> 1127 # MIPS allows mixing "slightly different" Cacheability and Coherency
>> 1128 # Attribute bits. It is believed that the uncached access through
>> 1129 # KSEG1 and the implementation specific "uncached accelerated" used
>> 1130 # by pgprot_writcombine can be mixed, and the latter sometimes provides
>> 1131 # significant advantages.
>> 1132 #
>> 1133 select ARCH_HAS_DMA_WRITE_COMBINE
>> 1134 select ARCH_HAS_DMA_PREP_COHERENT
354 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 1135 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
355 select DMA_BOUNCE_UNALIGNED_KMALLOC if !! 1136 select ARCH_HAS_DMA_SET_UNCACHED
>> 1137 select DMA_NONCOHERENT_MMAP
>> 1138 select DMA_NONCOHERENT_CACHE_SYNC
>> 1139 select NEED_DMA_MAP_STATE
356 1140
357 config RISCV_NONSTANDARD_CACHE_OPS !! 1141 config SYS_HAS_EARLY_PRINTK
358 bool 1142 bool
359 help <<
360 This enables function pointer suppor <<
361 systems to handle cache management. <<
362 1143
363 config AS_HAS_INSN !! 1144 config SYS_SUPPORTS_HOTPLUG_CPU
364 def_bool $(as-instr,.insn r 51$(comma) !! 1145 bool
365 1146
366 config AS_HAS_OPTION_ARCH !! 1147 config MIPS_BONITO64
367 # https://github.com/llvm/llvm-project !! 1148 bool
368 def_bool y <<
369 depends on $(as-instr, .option arch$(c <<
370 1149
371 source "arch/riscv/Kconfig.socs" !! 1150 config MIPS_MSC
372 source "arch/riscv/Kconfig.errata" !! 1151 bool
373 1152
374 menu "Platform type" !! 1153 config SYNC_R4K
>> 1154 bool
375 1155
376 config NONPORTABLE !! 1156 config NO_IOPORT_MAP
377 bool "Allow configurations that result !! 1157 def_bool n
378 help <<
379 RISC-V kernel binaries are compatibl <<
380 whenever possible, but there are som <<
381 satisfied by configurations that res <<
382 not portable between systems. <<
383 1158
384 Selecting N does not guarantee kerne !! 1159 config GENERIC_CSUM
385 systems. Selecting any of the optio !! 1160 def_bool CPU_NO_LOAD_STORE_LR
386 result in kernel binaries that are u <<
387 systems. <<
388 1161
389 If unsure, say N. !! 1162 config GENERIC_ISA_DMA
>> 1163 bool
>> 1164 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1165 select ISA_DMA_API
390 1166
391 choice !! 1167 config GENERIC_ISA_DMA_SUPPORT_BROKEN
392 prompt "Base ISA" !! 1168 bool
393 default ARCH_RV64I !! 1169 select GENERIC_ISA_DMA
>> 1170
>> 1171 config HAVE_PLAT_DELAY
>> 1172 bool
>> 1173
>> 1174 config HAVE_PLAT_FW_INIT_CMDLINE
>> 1175 bool
>> 1176
>> 1177 config HAVE_PLAT_MEMCPY
>> 1178 bool
>> 1179
>> 1180 config ISA_DMA_API
>> 1181 bool
>> 1182
>> 1183 config HOLES_IN_ZONE
>> 1184 bool
>> 1185
>> 1186 config SYS_SUPPORTS_RELOCATABLE
>> 1187 bool
394 help 1188 help
395 This selects the base ISA that this !! 1189 Selected if the platform supports relocating the kernel.
396 the target platform. !! 1190 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1191 to allow access to command line and entropy sources.
397 1192
398 config ARCH_RV32I !! 1193 config MIPS_CBPF_JIT
399 bool "RV32I" !! 1194 def_bool y
400 depends on NONPORTABLE !! 1195 depends on BPF_JIT && HAVE_CBPF_JIT
401 select 32BIT <<
402 select GENERIC_LIB_ASHLDI3 <<
403 select GENERIC_LIB_ASHRDI3 <<
404 select GENERIC_LIB_LSHRDI3 <<
405 select GENERIC_LIB_UCMPDI2 <<
406 1196
407 config ARCH_RV64I !! 1197 config MIPS_EBPF_JIT
408 bool "RV64I" !! 1198 def_bool y
409 select 64BIT !! 1199 depends on BPF_JIT && HAVE_EBPF_JIT
410 select ARCH_SUPPORTS_INT128 if CC_HAS_ <<
411 select SWIOTLB if MMU <<
412 1200
413 endchoice <<
414 1201
415 # We must be able to map all physical memory i !! 1202 #
416 # is still a bit more efficient when generatin !! 1203 # Endianness selection. Sufficiently obscure so many users don't know what to
417 # such that it can only map 2GiB of memory. !! 1204 # answer,so we try hard to limit the available choices. Also the use of a
>> 1205 # choice statement should be more obvious to the user.
>> 1206 #
418 choice 1207 choice
419 prompt "Kernel Code Model" !! 1208 prompt "Endianness selection"
420 default CMODEL_MEDLOW if 32BIT !! 1209 help
421 default CMODEL_MEDANY if 64BIT !! 1210 Some MIPS machines can be configured for either little or big endian
422 !! 1211 byte order. These modes require different kernels and a different
423 config CMODEL_MEDLOW !! 1212 Linux distribution. In general there is one preferred byteorder for a
424 bool "medium low code model" !! 1213 particular system but some systems are just as commonly used in the
425 config CMODEL_MEDANY !! 1214 one or the other endianness.
426 bool "medium any code model" !! 1215
>> 1216 config CPU_BIG_ENDIAN
>> 1217 bool "Big endian"
>> 1218 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1219
>> 1220 config CPU_LITTLE_ENDIAN
>> 1221 bool "Little endian"
>> 1222 depends on SYS_SUPPORTS_LITTLE_ENDIAN
>> 1223
427 endchoice 1224 endchoice
428 1225
429 config MODULE_SECTIONS !! 1226 config EXPORT_UASM
430 bool 1227 bool
431 select HAVE_MOD_ARCH_SPECIFIC <<
432 1228
433 config SMP !! 1229 config SYS_SUPPORTS_APM_EMULATION
434 bool "Symmetric Multi-Processing" !! 1230 bool
435 help <<
436 This enables support for systems wit <<
437 you say N here, the kernel will run <<
438 multiprocessor machines, but will us <<
439 multiprocessor machine. If you say Y <<
440 on many, but not all, single process <<
441 processor machine, the kernel will r <<
442 here. <<
443 1231
444 If you don't know what to do here, s !! 1232 config SYS_SUPPORTS_BIG_ENDIAN
>> 1233 bool
445 1234
446 config SCHED_MC !! 1235 config SYS_SUPPORTS_LITTLE_ENDIAN
447 bool "Multi-core scheduler support" !! 1236 bool
448 depends on SMP <<
449 help <<
450 Multi-core scheduler support improve <<
451 making when dealing with multi-core <<
452 increased overhead in some places. I <<
453 1237
454 config NR_CPUS !! 1238 config SYS_SUPPORTS_HUGETLBFS
455 int "Maximum number of CPUs (2-512)" !! 1239 bool
456 depends on SMP !! 1240 depends on CPU_SUPPORTS_HUGEPAGES
457 range 2 512 if !RISCV_SBI_V01 !! 1241 default y
458 range 2 32 if RISCV_SBI_V01 && 32BIT <<
459 range 2 64 if RISCV_SBI_V01 && 64BIT <<
460 default "32" if 32BIT <<
461 default "64" if 64BIT <<
462 1242
463 config HOTPLUG_CPU !! 1243 config MIPS_HUGE_TLB_SUPPORT
464 bool "Support for hot-pluggable CPUs" !! 1244 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
465 depends on SMP !! 1245
466 select GENERIC_IRQ_MIGRATION !! 1246 config IRQ_CPU_RM7K
467 help !! 1247 bool
468 1248
469 Say Y here to experiment with turnin !! 1249 config IRQ_MSP_SLP
470 can be controlled through /sys/devic !! 1250 bool
471 1251
472 Say N if you want to disable CPU hot !! 1252 config IRQ_MSP_CIC
>> 1253 bool
>> 1254
>> 1255 config IRQ_TXX9
>> 1256 bool
>> 1257
>> 1258 config IRQ_GT641XX
>> 1259 bool
>> 1260
>> 1261 config PCI_GT64XXX_PCI0
>> 1262 bool
>> 1263
>> 1264 config PCI_XTALK_BRIDGE
>> 1265 bool
>> 1266
>> 1267 config NO_EXCEPT_FILL
>> 1268 bool
>> 1269
>> 1270 config SOC_PNX833X
>> 1271 bool
>> 1272 select CEVT_R4K
>> 1273 select CSRC_R4K
>> 1274 select IRQ_MIPS_CPU
>> 1275 select DMA_NONCOHERENT
>> 1276 select SYS_HAS_CPU_MIPS32_R2
>> 1277 select SYS_SUPPORTS_32BIT_KERNEL
>> 1278 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1279 select SYS_SUPPORTS_BIG_ENDIAN
>> 1280 select SYS_SUPPORTS_MIPS16
>> 1281 select CPU_MIPSR2_IRQ_VI
>> 1282
>> 1283 config SOC_PNX8335
>> 1284 bool
>> 1285 select SOC_PNX833X
>> 1286
>> 1287 config MIPS_SPRAM
>> 1288 bool
>> 1289
>> 1290 config SWAP_IO_SPACE
>> 1291 bool
>> 1292
>> 1293 config SGI_HAS_INDYDOG
>> 1294 bool
>> 1295
>> 1296 config SGI_HAS_HAL2
>> 1297 bool
>> 1298
>> 1299 config SGI_HAS_SEEQ
>> 1300 bool
>> 1301
>> 1302 config SGI_HAS_WD93
>> 1303 bool
>> 1304
>> 1305 config SGI_HAS_ZILOG
>> 1306 bool
>> 1307
>> 1308 config SGI_HAS_I8042
>> 1309 bool
>> 1310
>> 1311 config DEFAULT_SGI_PARTITION
>> 1312 bool
>> 1313
>> 1314 config FW_ARC32
>> 1315 bool
>> 1316
>> 1317 config FW_SNIPROM
>> 1318 bool
>> 1319
>> 1320 config BOOT_ELF32
>> 1321 bool
>> 1322
>> 1323 config MIPS_L1_CACHE_SHIFT_4
>> 1324 bool
>> 1325
>> 1326 config MIPS_L1_CACHE_SHIFT_5
>> 1327 bool
>> 1328
>> 1329 config MIPS_L1_CACHE_SHIFT_6
>> 1330 bool
>> 1331
>> 1332 config MIPS_L1_CACHE_SHIFT_7
>> 1333 bool
>> 1334
>> 1335 config MIPS_L1_CACHE_SHIFT
>> 1336 int
>> 1337 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1338 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1339 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1340 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1341 default "5"
>> 1342
>> 1343 config ARC_CMDLINE_ONLY
>> 1344 bool
>> 1345
>> 1346 config ARC_CONSOLE
>> 1347 bool "ARC console support"
>> 1348 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1349
>> 1350 config ARC_MEMORY
>> 1351 bool
>> 1352
>> 1353 config ARC_PROMLIB
>> 1354 bool
>> 1355
>> 1356 config FW_ARC64
>> 1357 bool
>> 1358
>> 1359 config BOOT_ELF64
>> 1360 bool
>> 1361
>> 1362 menu "CPU selection"
473 1363
474 choice 1364 choice
475 prompt "CPU Tuning" !! 1365 prompt "CPU type"
476 default TUNE_GENERIC !! 1366 default CPU_R4X00
477 1367
478 config TUNE_GENERIC !! 1368 config CPU_LOONGSON64
479 bool "generic" !! 1369 bool "Loongson 64-bit CPU"
>> 1370 depends on SYS_HAS_CPU_LOONGSON64
>> 1371 select ARCH_HAS_PHYS_TO_DMA
>> 1372 select CPU_MIPSR2
>> 1373 select CPU_HAS_PREFETCH
>> 1374 select CPU_SUPPORTS_64BIT_KERNEL
>> 1375 select CPU_SUPPORTS_HIGHMEM
>> 1376 select CPU_SUPPORTS_HUGEPAGES
>> 1377 select CPU_SUPPORTS_MSA
>> 1378 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
>> 1379 select CPU_MIPSR2_IRQ_VI
>> 1380 select WEAK_ORDERING
>> 1381 select WEAK_REORDERING_BEYOND_LLSC
>> 1382 select MIPS_ASID_BITS_VARIABLE
>> 1383 select MIPS_PGD_C0_CONTEXT
>> 1384 select MIPS_L1_CACHE_SHIFT_6
>> 1385 select GPIOLIB
>> 1386 select SWIOTLB
>> 1387 select HAVE_KVM
>> 1388 help
>> 1389 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
>> 1390 cores implements the MIPS64R2 instruction set with many extensions,
>> 1391 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
>> 1392 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
>> 1393 Loongson-2E/2F is not covered here and will be removed in future.
480 1394
>> 1395 config LOONGSON3_ENHANCEMENT
>> 1396 bool "New Loongson-3 CPU Enhancements"
>> 1397 default n
>> 1398 depends on CPU_LOONGSON64
>> 1399 help
>> 1400 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
>> 1401 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1402 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
>> 1403 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1404 Fast TLB refill support, etc.
>> 1405
>> 1406 This option enable those enhancements which are not probed at run
>> 1407 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1408 please say 'N' here. If you want a high-performance kernel to run on
>> 1409 new Loongson-3 machines only, please say 'Y' here.
>> 1410
>> 1411 config CPU_LOONGSON3_WORKAROUNDS
>> 1412 bool "Old Loongson-3 LLSC Workarounds"
>> 1413 default y if SMP
>> 1414 depends on CPU_LOONGSON64
>> 1415 help
>> 1416 Loongson-3 processors have the llsc issues which require workarounds.
>> 1417 Without workarounds the system may hang unexpectedly.
>> 1418
>> 1419 Newer Loongson-3 will fix these issues and no workarounds are needed.
>> 1420 The workarounds have no significant side effect on them but may
>> 1421 decrease the performance of the system so this option should be
>> 1422 disabled unless the kernel is intended to be run on old systems.
>> 1423
>> 1424 If unsure, please say Y.
>> 1425
>> 1426 config CPU_LOONGSON3_CPUCFG_EMULATION
>> 1427 bool "Emulate the CPUCFG instruction on older Loongson cores"
>> 1428 default y
>> 1429 depends on CPU_LOONGSON64
>> 1430 help
>> 1431 Loongson-3A R4 and newer have the CPUCFG instruction available for
>> 1432 userland to query CPU capabilities, much like CPUID on x86. This
>> 1433 option provides emulation of the instruction on older Loongson
>> 1434 cores, back to Loongson-3A1000.
>> 1435
>> 1436 If unsure, please say Y.
>> 1437
>> 1438 config CPU_LOONGSON2E
>> 1439 bool "Loongson 2E"
>> 1440 depends on SYS_HAS_CPU_LOONGSON2E
>> 1441 select CPU_LOONGSON2EF
>> 1442 help
>> 1443 The Loongson 2E processor implements the MIPS III instruction set
>> 1444 with many extensions.
>> 1445
>> 1446 It has an internal FPGA northbridge, which is compatible to
>> 1447 bonito64.
>> 1448
>> 1449 config CPU_LOONGSON2F
>> 1450 bool "Loongson 2F"
>> 1451 depends on SYS_HAS_CPU_LOONGSON2F
>> 1452 select CPU_LOONGSON2EF
>> 1453 select GPIOLIB
>> 1454 help
>> 1455 The Loongson 2F processor implements the MIPS III instruction set
>> 1456 with many extensions.
>> 1457
>> 1458 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1459 have a similar programming interface with FPGA northbridge used in
>> 1460 Loongson2E.
>> 1461
>> 1462 config CPU_LOONGSON1B
>> 1463 bool "Loongson 1B"
>> 1464 depends on SYS_HAS_CPU_LOONGSON1B
>> 1465 select CPU_LOONGSON32
>> 1466 select LEDS_GPIO_REGISTER
>> 1467 help
>> 1468 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1469 Release 1 instruction set and part of the MIPS32 Release 2
>> 1470 instruction set.
>> 1471
>> 1472 config CPU_LOONGSON1C
>> 1473 bool "Loongson 1C"
>> 1474 depends on SYS_HAS_CPU_LOONGSON1C
>> 1475 select CPU_LOONGSON32
>> 1476 select LEDS_GPIO_REGISTER
>> 1477 help
>> 1478 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1479 Release 1 instruction set and part of the MIPS32 Release 2
>> 1480 instruction set.
>> 1481
>> 1482 config CPU_MIPS32_R1
>> 1483 bool "MIPS32 Release 1"
>> 1484 depends on SYS_HAS_CPU_MIPS32_R1
>> 1485 select CPU_HAS_PREFETCH
>> 1486 select CPU_SUPPORTS_32BIT_KERNEL
>> 1487 select CPU_SUPPORTS_HIGHMEM
>> 1488 help
>> 1489 Choose this option to build a kernel for release 1 or later of the
>> 1490 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1491 MIPS processor are based on a MIPS32 processor. If you know the
>> 1492 specific type of processor in your system, choose those that one
>> 1493 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1494 Release 2 of the MIPS32 architecture is available since several
>> 1495 years so chances are you even have a MIPS32 Release 2 processor
>> 1496 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1497 performance.
>> 1498
>> 1499 config CPU_MIPS32_R2
>> 1500 bool "MIPS32 Release 2"
>> 1501 depends on SYS_HAS_CPU_MIPS32_R2
>> 1502 select CPU_HAS_PREFETCH
>> 1503 select CPU_SUPPORTS_32BIT_KERNEL
>> 1504 select CPU_SUPPORTS_HIGHMEM
>> 1505 select CPU_SUPPORTS_MSA
>> 1506 select HAVE_KVM
>> 1507 help
>> 1508 Choose this option to build a kernel for release 2 or later of the
>> 1509 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1510 MIPS processor are based on a MIPS32 processor. If you know the
>> 1511 specific type of processor in your system, choose those that one
>> 1512 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1513
>> 1514 config CPU_MIPS32_R5
>> 1515 bool "MIPS32 Release 5"
>> 1516 depends on SYS_HAS_CPU_MIPS32_R5
>> 1517 select CPU_HAS_PREFETCH
>> 1518 select CPU_SUPPORTS_32BIT_KERNEL
>> 1519 select CPU_SUPPORTS_HIGHMEM
>> 1520 select CPU_SUPPORTS_MSA
>> 1521 select HAVE_KVM
>> 1522 select MIPS_O32_FP64_SUPPORT
>> 1523 help
>> 1524 Choose this option to build a kernel for release 5 or later of the
>> 1525 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1526 family, are based on a MIPS32r5 processor. If you own an older
>> 1527 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1528
>> 1529 config CPU_MIPS32_R6
>> 1530 bool "MIPS32 Release 6"
>> 1531 depends on SYS_HAS_CPU_MIPS32_R6
>> 1532 select CPU_HAS_PREFETCH
>> 1533 select CPU_NO_LOAD_STORE_LR
>> 1534 select CPU_SUPPORTS_32BIT_KERNEL
>> 1535 select CPU_SUPPORTS_HIGHMEM
>> 1536 select CPU_SUPPORTS_MSA
>> 1537 select HAVE_KVM
>> 1538 select MIPS_O32_FP64_SUPPORT
>> 1539 help
>> 1540 Choose this option to build a kernel for release 6 or later of the
>> 1541 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1542 family, are based on a MIPS32r6 processor. If you own an older
>> 1543 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1544
>> 1545 config CPU_MIPS64_R1
>> 1546 bool "MIPS64 Release 1"
>> 1547 depends on SYS_HAS_CPU_MIPS64_R1
>> 1548 select CPU_HAS_PREFETCH
>> 1549 select CPU_SUPPORTS_32BIT_KERNEL
>> 1550 select CPU_SUPPORTS_64BIT_KERNEL
>> 1551 select CPU_SUPPORTS_HIGHMEM
>> 1552 select CPU_SUPPORTS_HUGEPAGES
>> 1553 help
>> 1554 Choose this option to build a kernel for release 1 or later of the
>> 1555 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1556 MIPS processor are based on a MIPS64 processor. If you know the
>> 1557 specific type of processor in your system, choose those that one
>> 1558 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1559 Release 2 of the MIPS64 architecture is available since several
>> 1560 years so chances are you even have a MIPS64 Release 2 processor
>> 1561 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1562 performance.
>> 1563
>> 1564 config CPU_MIPS64_R2
>> 1565 bool "MIPS64 Release 2"
>> 1566 depends on SYS_HAS_CPU_MIPS64_R2
>> 1567 select CPU_HAS_PREFETCH
>> 1568 select CPU_SUPPORTS_32BIT_KERNEL
>> 1569 select CPU_SUPPORTS_64BIT_KERNEL
>> 1570 select CPU_SUPPORTS_HIGHMEM
>> 1571 select CPU_SUPPORTS_HUGEPAGES
>> 1572 select CPU_SUPPORTS_MSA
>> 1573 select HAVE_KVM
>> 1574 help
>> 1575 Choose this option to build a kernel for release 2 or later of the
>> 1576 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1577 MIPS processor are based on a MIPS64 processor. If you know the
>> 1578 specific type of processor in your system, choose those that one
>> 1579 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1580
>> 1581 config CPU_MIPS64_R5
>> 1582 bool "MIPS64 Release 5"
>> 1583 depends on SYS_HAS_CPU_MIPS64_R5
>> 1584 select CPU_HAS_PREFETCH
>> 1585 select CPU_SUPPORTS_32BIT_KERNEL
>> 1586 select CPU_SUPPORTS_64BIT_KERNEL
>> 1587 select CPU_SUPPORTS_HIGHMEM
>> 1588 select CPU_SUPPORTS_HUGEPAGES
>> 1589 select CPU_SUPPORTS_MSA
>> 1590 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1591 select HAVE_KVM
>> 1592 help
>> 1593 Choose this option to build a kernel for release 5 or later of the
>> 1594 MIPS64 architecture. This is a intermediate MIPS architecture
>> 1595 release partly implementing release 6 features. Though there is no
>> 1596 any hardware known to be based on this release.
>> 1597
>> 1598 config CPU_MIPS64_R6
>> 1599 bool "MIPS64 Release 6"
>> 1600 depends on SYS_HAS_CPU_MIPS64_R6
>> 1601 select CPU_HAS_PREFETCH
>> 1602 select CPU_NO_LOAD_STORE_LR
>> 1603 select CPU_SUPPORTS_32BIT_KERNEL
>> 1604 select CPU_SUPPORTS_64BIT_KERNEL
>> 1605 select CPU_SUPPORTS_HIGHMEM
>> 1606 select CPU_SUPPORTS_HUGEPAGES
>> 1607 select CPU_SUPPORTS_MSA
>> 1608 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1609 select HAVE_KVM
>> 1610 help
>> 1611 Choose this option to build a kernel for release 6 or later of the
>> 1612 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1613 family, are based on a MIPS64r6 processor. If you own an older
>> 1614 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1615
>> 1616 config CPU_P5600
>> 1617 bool "MIPS Warrior P5600"
>> 1618 depends on SYS_HAS_CPU_P5600
>> 1619 select CPU_HAS_PREFETCH
>> 1620 select CPU_SUPPORTS_32BIT_KERNEL
>> 1621 select CPU_SUPPORTS_HIGHMEM
>> 1622 select CPU_SUPPORTS_MSA
>> 1623 select CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 1624 select CPU_SUPPORTS_CPUFREQ
>> 1625 select CPU_MIPSR2_IRQ_VI
>> 1626 select CPU_MIPSR2_IRQ_EI
>> 1627 select HAVE_KVM
>> 1628 select MIPS_O32_FP64_SUPPORT
>> 1629 help
>> 1630 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
>> 1631 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
>> 1632 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
>> 1633 level features like up to six P5600 calculation cores, CM2 with L2
>> 1634 cache, IOCU/IOMMU (though might be unused depending on the system-
>> 1635 specific IP core configuration), GIC, CPC, virtualisation module,
>> 1636 eJTAG and PDtrace.
>> 1637
>> 1638 config CPU_R3000
>> 1639 bool "R3000"
>> 1640 depends on SYS_HAS_CPU_R3000
>> 1641 select CPU_HAS_WB
>> 1642 select CPU_R3K_TLB
>> 1643 select CPU_SUPPORTS_32BIT_KERNEL
>> 1644 select CPU_SUPPORTS_HIGHMEM
>> 1645 help
>> 1646 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1647 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1648 *not* work on R4000 machines and vice versa. However, since most
>> 1649 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1650 might be a safe bet. If the resulting kernel does not work,
>> 1651 try to recompile with R3000.
>> 1652
>> 1653 config CPU_TX39XX
>> 1654 bool "R39XX"
>> 1655 depends on SYS_HAS_CPU_TX39XX
>> 1656 select CPU_SUPPORTS_32BIT_KERNEL
>> 1657 select CPU_R3K_TLB
>> 1658
>> 1659 config CPU_VR41XX
>> 1660 bool "R41xx"
>> 1661 depends on SYS_HAS_CPU_VR41XX
>> 1662 select CPU_SUPPORTS_32BIT_KERNEL
>> 1663 select CPU_SUPPORTS_64BIT_KERNEL
>> 1664 help
>> 1665 The options selects support for the NEC VR4100 series of processors.
>> 1666 Only choose this option if you have one of these processors as a
>> 1667 kernel built with this option will not run on any other type of
>> 1668 processor or vice versa.
>> 1669
>> 1670 config CPU_R4X00
>> 1671 bool "R4x00"
>> 1672 depends on SYS_HAS_CPU_R4X00
>> 1673 select CPU_SUPPORTS_32BIT_KERNEL
>> 1674 select CPU_SUPPORTS_64BIT_KERNEL
>> 1675 select CPU_SUPPORTS_HUGEPAGES
>> 1676 help
>> 1677 MIPS Technologies R4000-series processors other than 4300, including
>> 1678 the R4000, R4400, R4600, and 4700.
>> 1679
>> 1680 config CPU_TX49XX
>> 1681 bool "R49XX"
>> 1682 depends on SYS_HAS_CPU_TX49XX
>> 1683 select CPU_HAS_PREFETCH
>> 1684 select CPU_SUPPORTS_32BIT_KERNEL
>> 1685 select CPU_SUPPORTS_64BIT_KERNEL
>> 1686 select CPU_SUPPORTS_HUGEPAGES
>> 1687
>> 1688 config CPU_R5000
>> 1689 bool "R5000"
>> 1690 depends on SYS_HAS_CPU_R5000
>> 1691 select CPU_SUPPORTS_32BIT_KERNEL
>> 1692 select CPU_SUPPORTS_64BIT_KERNEL
>> 1693 select CPU_SUPPORTS_HUGEPAGES
>> 1694 help
>> 1695 MIPS Technologies R5000-series processors other than the Nevada.
>> 1696
>> 1697 config CPU_R5500
>> 1698 bool "R5500"
>> 1699 depends on SYS_HAS_CPU_R5500
>> 1700 select CPU_SUPPORTS_32BIT_KERNEL
>> 1701 select CPU_SUPPORTS_64BIT_KERNEL
>> 1702 select CPU_SUPPORTS_HUGEPAGES
>> 1703 help
>> 1704 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1705 instruction set.
>> 1706
>> 1707 config CPU_NEVADA
>> 1708 bool "RM52xx"
>> 1709 depends on SYS_HAS_CPU_NEVADA
>> 1710 select CPU_SUPPORTS_32BIT_KERNEL
>> 1711 select CPU_SUPPORTS_64BIT_KERNEL
>> 1712 select CPU_SUPPORTS_HUGEPAGES
>> 1713 help
>> 1714 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1715
>> 1716 config CPU_R10000
>> 1717 bool "R10000"
>> 1718 depends on SYS_HAS_CPU_R10000
>> 1719 select CPU_HAS_PREFETCH
>> 1720 select CPU_SUPPORTS_32BIT_KERNEL
>> 1721 select CPU_SUPPORTS_64BIT_KERNEL
>> 1722 select CPU_SUPPORTS_HIGHMEM
>> 1723 select CPU_SUPPORTS_HUGEPAGES
>> 1724 help
>> 1725 MIPS Technologies R10000-series processors.
>> 1726
>> 1727 config CPU_RM7000
>> 1728 bool "RM7000"
>> 1729 depends on SYS_HAS_CPU_RM7000
>> 1730 select CPU_HAS_PREFETCH
>> 1731 select CPU_SUPPORTS_32BIT_KERNEL
>> 1732 select CPU_SUPPORTS_64BIT_KERNEL
>> 1733 select CPU_SUPPORTS_HIGHMEM
>> 1734 select CPU_SUPPORTS_HUGEPAGES
>> 1735
>> 1736 config CPU_SB1
>> 1737 bool "SB1"
>> 1738 depends on SYS_HAS_CPU_SB1
>> 1739 select CPU_SUPPORTS_32BIT_KERNEL
>> 1740 select CPU_SUPPORTS_64BIT_KERNEL
>> 1741 select CPU_SUPPORTS_HIGHMEM
>> 1742 select CPU_SUPPORTS_HUGEPAGES
>> 1743 select WEAK_ORDERING
>> 1744
>> 1745 config CPU_CAVIUM_OCTEON
>> 1746 bool "Cavium Octeon processor"
>> 1747 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1748 select CPU_HAS_PREFETCH
>> 1749 select CPU_SUPPORTS_64BIT_KERNEL
>> 1750 select WEAK_ORDERING
>> 1751 select CPU_SUPPORTS_HIGHMEM
>> 1752 select CPU_SUPPORTS_HUGEPAGES
>> 1753 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1754 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1755 select MIPS_L1_CACHE_SHIFT_7
>> 1756 select HAVE_KVM
>> 1757 help
>> 1758 The Cavium Octeon processor is a highly integrated chip containing
>> 1759 many ethernet hardware widgets for networking tasks. The processor
>> 1760 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1761 Full details can be found at http://www.caviumnetworks.com.
>> 1762
>> 1763 config CPU_BMIPS
>> 1764 bool "Broadcom BMIPS"
>> 1765 depends on SYS_HAS_CPU_BMIPS
>> 1766 select CPU_MIPS32
>> 1767 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1768 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1769 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1770 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1771 select CPU_SUPPORTS_32BIT_KERNEL
>> 1772 select DMA_NONCOHERENT
>> 1773 select IRQ_MIPS_CPU
>> 1774 select SWAP_IO_SPACE
>> 1775 select WEAK_ORDERING
>> 1776 select CPU_SUPPORTS_HIGHMEM
>> 1777 select CPU_HAS_PREFETCH
>> 1778 select CPU_SUPPORTS_CPUFREQ
>> 1779 select MIPS_EXTERNAL_TIMER
>> 1780 help
>> 1781 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1782
>> 1783 config CPU_XLR
>> 1784 bool "Netlogic XLR SoC"
>> 1785 depends on SYS_HAS_CPU_XLR
>> 1786 select CPU_SUPPORTS_32BIT_KERNEL
>> 1787 select CPU_SUPPORTS_64BIT_KERNEL
>> 1788 select CPU_SUPPORTS_HIGHMEM
>> 1789 select CPU_SUPPORTS_HUGEPAGES
>> 1790 select WEAK_ORDERING
>> 1791 select WEAK_REORDERING_BEYOND_LLSC
>> 1792 help
>> 1793 Netlogic Microsystems XLR/XLS processors.
>> 1794
>> 1795 config CPU_XLP
>> 1796 bool "Netlogic XLP SoC"
>> 1797 depends on SYS_HAS_CPU_XLP
>> 1798 select CPU_SUPPORTS_32BIT_KERNEL
>> 1799 select CPU_SUPPORTS_64BIT_KERNEL
>> 1800 select CPU_SUPPORTS_HIGHMEM
>> 1801 select WEAK_ORDERING
>> 1802 select WEAK_REORDERING_BEYOND_LLSC
>> 1803 select CPU_HAS_PREFETCH
>> 1804 select CPU_MIPSR2
>> 1805 select CPU_SUPPORTS_HUGEPAGES
>> 1806 select MIPS_ASID_BITS_VARIABLE
>> 1807 help
>> 1808 Netlogic Microsystems XLP processors.
481 endchoice 1809 endchoice
482 1810
483 # Common NUMA Features !! 1811 config CPU_MIPS32_3_5_FEATURES
484 config NUMA !! 1812 bool "MIPS32 Release 3.5 Features"
485 bool "NUMA Memory Allocation and Sched !! 1813 depends on SYS_HAS_CPU_MIPS32_R3_5
486 depends on SMP && MMU !! 1814 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
487 select ARCH_SUPPORTS_NUMA_BALANCING !! 1815 CPU_P5600
488 select GENERIC_ARCH_NUMA !! 1816 help
489 select HAVE_SETUP_PER_CPU_AREA !! 1817 Choose this option to build a kernel for release 2 or later of the
490 select NEED_PER_CPU_EMBED_FIRST_CHUNK !! 1818 MIPS32 architecture including features from the 3.5 release such as
491 select NEED_PER_CPU_PAGE_FIRST_CHUNK !! 1819 support for Enhanced Virtual Addressing (EVA).
492 select OF_NUMA !! 1820
493 select USE_PERCPU_NUMA_NODE_ID !! 1821 config CPU_MIPS32_3_5_EVA
>> 1822 bool "Enhanced Virtual Addressing (EVA)"
>> 1823 depends on CPU_MIPS32_3_5_FEATURES
>> 1824 select EVA
>> 1825 default y
>> 1826 help
>> 1827 Choose this option if you want to enable the Enhanced Virtual
>> 1828 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1829 One of its primary benefits is an increase in the maximum size
>> 1830 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1831
>> 1832 config CPU_MIPS32_R5_FEATURES
>> 1833 bool "MIPS32 Release 5 Features"
>> 1834 depends on SYS_HAS_CPU_MIPS32_R5
>> 1835 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
>> 1836 help
>> 1837 Choose this option to build a kernel for release 2 or later of the
>> 1838 MIPS32 architecture including features from release 5 such as
>> 1839 support for Extended Physical Addressing (XPA).
>> 1840
>> 1841 config CPU_MIPS32_R5_XPA
>> 1842 bool "Extended Physical Addressing (XPA)"
>> 1843 depends on CPU_MIPS32_R5_FEATURES
>> 1844 depends on !EVA
>> 1845 depends on !PAGE_SIZE_4KB
>> 1846 depends on SYS_SUPPORTS_HIGHMEM
>> 1847 select XPA
>> 1848 select HIGHMEM
>> 1849 select PHYS_ADDR_T_64BIT
>> 1850 default n
494 help 1851 help
495 Enable NUMA (Non-Uniform Memory Acce !! 1852 Choose this option if you want to enable the Extended Physical
>> 1853 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1854 benefit is to increase physical addressing equal to or greater
>> 1855 than 40 bits. Note that this has the side effect of turning on
>> 1856 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1857 If unsure, say 'N' here.
496 1858
497 The kernel will try to allocate memo !! 1859 if CPU_LOONGSON2F
498 local memory of the CPU and add some !! 1860 config CPU_NOP_WORKAROUNDS
>> 1861 bool
499 1862
500 config NODES_SHIFT !! 1863 config CPU_JUMP_WORKAROUNDS
501 int "Maximum NUMA Nodes (as a power of !! 1864 bool
502 range 1 10 !! 1865
503 default "2" !! 1866 config CPU_LOONGSON2F_WORKAROUNDS
504 depends on NUMA !! 1867 bool "Loongson 2F Workarounds"
>> 1868 default y
>> 1869 select CPU_NOP_WORKAROUNDS
>> 1870 select CPU_JUMP_WORKAROUNDS
505 help 1871 help
506 Specify the maximum number of NUMA N !! 1872 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
507 system. Increases memory reserved t !! 1873 require workarounds. Without workarounds the system may hang
>> 1874 unexpectedly. For more information please refer to the gas
>> 1875 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1876
>> 1877 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1878 are needed. The workarounds have no significant side effect on them
>> 1879 but may decrease the performance of the system so this option should
>> 1880 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1881 systems.
508 1882
509 config RISCV_ALTERNATIVE !! 1883 If unsure, please say Y.
>> 1884 endif # CPU_LOONGSON2F
>> 1885
>> 1886 config SYS_SUPPORTS_ZBOOT
>> 1887 bool
>> 1888 select HAVE_KERNEL_GZIP
>> 1889 select HAVE_KERNEL_BZIP2
>> 1890 select HAVE_KERNEL_LZ4
>> 1891 select HAVE_KERNEL_LZMA
>> 1892 select HAVE_KERNEL_LZO
>> 1893 select HAVE_KERNEL_XZ
>> 1894
>> 1895 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1896 bool
>> 1897 select SYS_SUPPORTS_ZBOOT
>> 1898
>> 1899 config SYS_SUPPORTS_ZBOOT_UART_PROM
>> 1900 bool
>> 1901 select SYS_SUPPORTS_ZBOOT
>> 1902
>> 1903 config CPU_LOONGSON2EF
>> 1904 bool
>> 1905 select CPU_SUPPORTS_32BIT_KERNEL
>> 1906 select CPU_SUPPORTS_64BIT_KERNEL
>> 1907 select CPU_SUPPORTS_HIGHMEM
>> 1908 select CPU_SUPPORTS_HUGEPAGES
>> 1909 select ARCH_HAS_PHYS_TO_DMA
>> 1910
>> 1911 config CPU_LOONGSON32
>> 1912 bool
>> 1913 select CPU_MIPS32
>> 1914 select CPU_MIPSR2
>> 1915 select CPU_HAS_PREFETCH
>> 1916 select CPU_SUPPORTS_32BIT_KERNEL
>> 1917 select CPU_SUPPORTS_HIGHMEM
>> 1918 select CPU_SUPPORTS_CPUFREQ
>> 1919
>> 1920 config CPU_BMIPS32_3300
>> 1921 select SMP_UP if SMP
>> 1922 bool
>> 1923
>> 1924 config CPU_BMIPS4350
>> 1925 bool
>> 1926 select SYS_SUPPORTS_SMP
>> 1927 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1928
>> 1929 config CPU_BMIPS4380
>> 1930 bool
>> 1931 select MIPS_L1_CACHE_SHIFT_6
>> 1932 select SYS_SUPPORTS_SMP
>> 1933 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1934 select CPU_HAS_RIXI
>> 1935
>> 1936 config CPU_BMIPS5000
>> 1937 bool
>> 1938 select MIPS_CPU_SCACHE
>> 1939 select MIPS_L1_CACHE_SHIFT_7
>> 1940 select SYS_SUPPORTS_SMP
>> 1941 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1942 select CPU_HAS_RIXI
>> 1943
>> 1944 config SYS_HAS_CPU_LOONGSON64
>> 1945 bool
>> 1946 select CPU_SUPPORTS_CPUFREQ
>> 1947 select CPU_HAS_RIXI
>> 1948
>> 1949 config SYS_HAS_CPU_LOONGSON2E
>> 1950 bool
>> 1951
>> 1952 config SYS_HAS_CPU_LOONGSON2F
>> 1953 bool
>> 1954 select CPU_SUPPORTS_CPUFREQ
>> 1955 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1956
>> 1957 config SYS_HAS_CPU_LOONGSON1B
>> 1958 bool
>> 1959
>> 1960 config SYS_HAS_CPU_LOONGSON1C
>> 1961 bool
>> 1962
>> 1963 config SYS_HAS_CPU_MIPS32_R1
>> 1964 bool
>> 1965
>> 1966 config SYS_HAS_CPU_MIPS32_R2
>> 1967 bool
>> 1968
>> 1969 config SYS_HAS_CPU_MIPS32_R3_5
>> 1970 bool
>> 1971
>> 1972 config SYS_HAS_CPU_MIPS32_R5
>> 1973 bool
>> 1974 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1975
>> 1976 config SYS_HAS_CPU_MIPS32_R6
>> 1977 bool
>> 1978 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1979
>> 1980 config SYS_HAS_CPU_MIPS64_R1
>> 1981 bool
>> 1982
>> 1983 config SYS_HAS_CPU_MIPS64_R2
>> 1984 bool
>> 1985
>> 1986 config SYS_HAS_CPU_MIPS64_R6
>> 1987 bool
>> 1988 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1989
>> 1990 config SYS_HAS_CPU_P5600
>> 1991 bool
>> 1992 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1993
>> 1994 config SYS_HAS_CPU_R3000
>> 1995 bool
>> 1996
>> 1997 config SYS_HAS_CPU_TX39XX
>> 1998 bool
>> 1999
>> 2000 config SYS_HAS_CPU_VR41XX
>> 2001 bool
>> 2002
>> 2003 config SYS_HAS_CPU_R4X00
>> 2004 bool
>> 2005
>> 2006 config SYS_HAS_CPU_TX49XX
>> 2007 bool
>> 2008
>> 2009 config SYS_HAS_CPU_R5000
>> 2010 bool
>> 2011
>> 2012 config SYS_HAS_CPU_R5500
>> 2013 bool
>> 2014
>> 2015 config SYS_HAS_CPU_NEVADA
>> 2016 bool
>> 2017
>> 2018 config SYS_HAS_CPU_R10000
>> 2019 bool
>> 2020 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 2021
>> 2022 config SYS_HAS_CPU_RM7000
>> 2023 bool
>> 2024
>> 2025 config SYS_HAS_CPU_SB1
>> 2026 bool
>> 2027
>> 2028 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 2029 bool
>> 2030
>> 2031 config SYS_HAS_CPU_BMIPS
>> 2032 bool
>> 2033
>> 2034 config SYS_HAS_CPU_BMIPS32_3300
>> 2035 bool
>> 2036 select SYS_HAS_CPU_BMIPS
>> 2037
>> 2038 config SYS_HAS_CPU_BMIPS4350
>> 2039 bool
>> 2040 select SYS_HAS_CPU_BMIPS
>> 2041
>> 2042 config SYS_HAS_CPU_BMIPS4380
>> 2043 bool
>> 2044 select SYS_HAS_CPU_BMIPS
>> 2045
>> 2046 config SYS_HAS_CPU_BMIPS5000
>> 2047 bool
>> 2048 select SYS_HAS_CPU_BMIPS
>> 2049 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 2050
>> 2051 config SYS_HAS_CPU_XLR
510 bool 2052 bool
511 depends on !XIP_KERNEL <<
512 help <<
513 This Kconfig allows the kernel to au <<
514 erratum or cpufeature required by th <<
515 time. The code patching overhead is <<
516 once at boot and once on each module <<
517 2053
518 config RISCV_ALTERNATIVE_EARLY !! 2054 config SYS_HAS_CPU_XLP
519 bool 2055 bool
520 depends on RISCV_ALTERNATIVE !! 2056
>> 2057 #
>> 2058 # CPU may reorder R->R, R->W, W->R, W->W
>> 2059 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 2060 #
>> 2061 config WEAK_ORDERING
>> 2062 bool
>> 2063
>> 2064 #
>> 2065 # CPU may reorder reads and writes beyond LL/SC
>> 2066 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 2067 #
>> 2068 config WEAK_REORDERING_BEYOND_LLSC
>> 2069 bool
>> 2070 endmenu
>> 2071
>> 2072 #
>> 2073 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2074 #
>> 2075 config CPU_MIPS32
>> 2076 bool
>> 2077 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
>> 2078 CPU_MIPS32_R6 || CPU_P5600
>> 2079
>> 2080 config CPU_MIPS64
>> 2081 bool
>> 2082 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
>> 2083 CPU_MIPS64_R6
>> 2084
>> 2085 #
>> 2086 # These indicate the revision of the architecture
>> 2087 #
>> 2088 config CPU_MIPSR1
>> 2089 bool
>> 2090 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2091
>> 2092 config CPU_MIPSR2
>> 2093 bool
>> 2094 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2095 select CPU_HAS_RIXI
>> 2096 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2097 select MIPS_SPRAM
>> 2098
>> 2099 config CPU_MIPSR5
>> 2100 bool
>> 2101 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
>> 2102 select CPU_HAS_RIXI
>> 2103 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2104 select MIPS_SPRAM
>> 2105
>> 2106 config CPU_MIPSR6
>> 2107 bool
>> 2108 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2109 select CPU_HAS_RIXI
>> 2110 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2111 select HAVE_ARCH_BITREVERSE
>> 2112 select MIPS_ASID_BITS_VARIABLE
>> 2113 select MIPS_CRC_SUPPORT
>> 2114 select MIPS_SPRAM
>> 2115
>> 2116 config TARGET_ISA_REV
>> 2117 int
>> 2118 default 1 if CPU_MIPSR1
>> 2119 default 2 if CPU_MIPSR2
>> 2120 default 5 if CPU_MIPSR5
>> 2121 default 6 if CPU_MIPSR6
>> 2122 default 0
521 help 2123 help
522 Allows early patching of the kernel !! 2124 Reflects the ISA revision being targeted by the kernel build. This
>> 2125 is effectively the Kconfig equivalent of MIPS_ISA_REV.
523 2126
524 config RISCV_ISA_C !! 2127 config EVA
525 bool "Emit compressed instructions whe !! 2128 bool
526 default y !! 2129
>> 2130 config XPA
>> 2131 bool
>> 2132
>> 2133 config SYS_SUPPORTS_32BIT_KERNEL
>> 2134 bool
>> 2135 config SYS_SUPPORTS_64BIT_KERNEL
>> 2136 bool
>> 2137 config CPU_SUPPORTS_32BIT_KERNEL
>> 2138 bool
>> 2139 config CPU_SUPPORTS_64BIT_KERNEL
>> 2140 bool
>> 2141 config CPU_SUPPORTS_CPUFREQ
>> 2142 bool
>> 2143 config CPU_SUPPORTS_ADDRWINCFG
>> 2144 bool
>> 2145 config CPU_SUPPORTS_HUGEPAGES
>> 2146 bool
>> 2147 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
>> 2148 config MIPS_PGD_C0_CONTEXT
>> 2149 bool
>> 2150 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
>> 2151
>> 2152 #
>> 2153 # Set to y for ptrace access to watch registers.
>> 2154 #
>> 2155 config HARDWARE_WATCHPOINTS
>> 2156 bool
>> 2157 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2158
>> 2159 menu "Kernel type"
>> 2160
>> 2161 choice
>> 2162 prompt "Kernel code model"
527 help 2163 help
528 Adds "C" to the ISA subsets that the !! 2164 You should only select this option if you have a workload that
529 when building Linux, which results i !! 2165 actually benefits from 64-bit processing or if your machine has
530 Linux binary. !! 2166 large memory. You will only be presented a single option in this
>> 2167 menu if your system does not support both 32-bit and 64-bit kernels.
531 2168
532 If you don't know what to do here, s !! 2169 config 32BIT
>> 2170 bool "32-bit kernel"
>> 2171 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2172 select TRAD_SIGNALS
>> 2173 help
>> 2174 Select this option if you want to build a 32-bit kernel.
533 2175
534 config RISCV_ISA_SVNAPOT !! 2176 config 64BIT
535 bool "Svnapot extension support for su !! 2177 bool "64-bit kernel"
536 depends on 64BIT && MMU !! 2178 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
537 depends on RISCV_ALTERNATIVE <<
538 default y <<
539 help 2179 help
540 Allow kernel to detect the Svnapot I !! 2180 Select this option if you want to build a 64-bit kernel.
541 time and enable its usage. <<
542 2181
543 The Svnapot extension is used to mar !! 2182 endchoice
544 of contiguous virtual-to-physical tr <<
545 aligned power-of-2 (NAPOT) granulari <<
546 size. When HUGETLBFS is also selecte <<
547 allocates some memory for each NAPOT <<
548 When optimizing for low memory consu <<
549 the Svnapot extension, it may be bet <<
550 2183
551 If you don't know what to do here, s !! 2184 config KVM_GUEST
>> 2185 bool "KVM Guest Kernel"
>> 2186 depends on CPU_MIPS32_R2
>> 2187 depends on BROKEN_ON_SMP
>> 2188 help
>> 2189 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2190 mode.
>> 2191
>> 2192 config KVM_GUEST_TIMER_FREQ
>> 2193 int "Count/Compare Timer Frequency (MHz)"
>> 2194 depends on KVM_GUEST
>> 2195 default 100
>> 2196 help
>> 2197 Set this to non-zero if building a guest kernel for KVM to skip RTC
>> 2198 emulation when determining guest CPU Frequency. Instead, the guest's
>> 2199 timer frequency is specified directly.
552 2200
553 config RISCV_ISA_SVPBMT !! 2201 config MIPS_VA_BITS_48
554 bool "Svpbmt extension support for sup !! 2202 bool "48 bits virtual memory"
555 depends on 64BIT && MMU !! 2203 depends on 64BIT
556 depends on RISCV_ALTERNATIVE <<
557 default y <<
558 help 2204 help
559 Adds support to dynamically detect !! 2205 Support a maximum at least 48 bits of application virtual
560 ISA-extension (Supervisor-mode: pag !! 2206 memory. Default is 40 bits or less, depending on the CPU.
561 enable its usage. !! 2207 For page sizes 16k and above, this option results in a small
>> 2208 memory overhead for page tables. For 4k page size, a fourth
>> 2209 level of page tables is added which imposes both a memory
>> 2210 overhead as well as slower TLB fault handling.
>> 2211
>> 2212 If unsure, say N.
562 2213
563 The memory type for a page contains !! 2214 choice
564 that indicate the cacheability, ide !! 2215 prompt "Kernel page size"
565 properties for access to that page. !! 2216 default PAGE_SIZE_4KB
>> 2217
>> 2218 config PAGE_SIZE_4KB
>> 2219 bool "4kB"
>> 2220 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
>> 2221 help
>> 2222 This option select the standard 4kB Linux page size. On some
>> 2223 R3000-family processors this is the only available page size. Using
>> 2224 4kB page size will minimize memory consumption and is therefore
>> 2225 recommended for low memory systems.
>> 2226
>> 2227 config PAGE_SIZE_8KB
>> 2228 bool "8kB"
>> 2229 depends on CPU_CAVIUM_OCTEON
>> 2230 depends on !MIPS_VA_BITS_48
>> 2231 help
>> 2232 Using 8kB page size will result in higher performance kernel at
>> 2233 the price of higher memory consumption. This option is available
>> 2234 only on cnMIPS processors. Note that you will need a suitable Linux
>> 2235 distribution to support this.
>> 2236
>> 2237 config PAGE_SIZE_16KB
>> 2238 bool "16kB"
>> 2239 depends on !CPU_R3000 && !CPU_TX39XX
>> 2240 help
>> 2241 Using 16kB page size will result in higher performance kernel at
>> 2242 the price of higher memory consumption. This option is available on
>> 2243 all non-R3000 family processors. Note that you will need a suitable
>> 2244 Linux distribution to support this.
>> 2245
>> 2246 config PAGE_SIZE_32KB
>> 2247 bool "32kB"
>> 2248 depends on CPU_CAVIUM_OCTEON
>> 2249 depends on !MIPS_VA_BITS_48
>> 2250 help
>> 2251 Using 32kB page size will result in higher performance kernel at
>> 2252 the price of higher memory consumption. This option is available
>> 2253 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2254 distribution to support this.
>> 2255
>> 2256 config PAGE_SIZE_64KB
>> 2257 bool "64kB"
>> 2258 depends on !CPU_R3000 && !CPU_TX39XX
>> 2259 help
>> 2260 Using 64kB page size will result in higher performance kernel at
>> 2261 the price of higher memory consumption. This option is available on
>> 2262 all non-R3000 family processor. Not that at the time of this
>> 2263 writing this option is still high experimental.
>> 2264
>> 2265 endchoice
>> 2266
>> 2267 config FORCE_MAX_ZONEORDER
>> 2268 int "Maximum zone order"
>> 2269 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2270 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2271 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2272 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2273 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2274 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2275 range 11 64
>> 2276 default "11"
>> 2277 help
>> 2278 The kernel memory allocator divides physically contiguous memory
>> 2279 blocks into "zones", where each zone is a power of two number of
>> 2280 pages. This option selects the largest power of two that the kernel
>> 2281 keeps in the memory allocator. If you need to allocate very large
>> 2282 blocks of physically contiguous memory, then you may need to
>> 2283 increase this value.
566 2284
567 The Svpbmt extension is only availa !! 2285 This config option is actually maximum order plus one. For example,
>> 2286 a value of 11 means that the largest free memory block is 2^10 pages.
568 2287
569 If you don't know what to do here, !! 2288 The page size is not necessarily 4KB. Keep this in mind
>> 2289 when choosing a value for this option.
570 2290
571 config TOOLCHAIN_HAS_V !! 2291 config BOARD_SCACHE
572 bool 2292 bool
573 default y <<
574 depends on !64BIT || $(cc-option,-mabi <<
575 depends on !32BIT || $(cc-option,-mabi <<
576 depends on LLD_VERSION >= 140000 || LD <<
577 depends on AS_HAS_OPTION_ARCH <<
578 2293
579 config RISCV_ISA_V !! 2294 config IP22_CPU_SCACHE
580 bool "VECTOR extension support" !! 2295 bool
581 depends on TOOLCHAIN_HAS_V !! 2296 select BOARD_SCACHE
582 depends on FPU !! 2297
583 select DYNAMIC_SIGFRAME !! 2298 #
584 default y !! 2299 # Support for a MIPS32 / MIPS64 style S-caches
>> 2300 #
>> 2301 config MIPS_CPU_SCACHE
>> 2302 bool
>> 2303 select BOARD_SCACHE
>> 2304
>> 2305 config R5000_CPU_SCACHE
>> 2306 bool
>> 2307 select BOARD_SCACHE
>> 2308
>> 2309 config RM7000_CPU_SCACHE
>> 2310 bool
>> 2311 select BOARD_SCACHE
>> 2312
>> 2313 config SIBYTE_DMA_PAGEOPS
>> 2314 bool "Use DMA to clear/copy pages"
>> 2315 depends on CPU_SB1
585 help 2316 help
586 Say N here if you want to disable al !! 2317 Instead of using the CPU to zero and copy pages, use a Data Mover
587 in the kernel. !! 2318 channel. These DMA channels are otherwise unused by the standard
>> 2319 SiByte Linux port. Seems to give a small performance benefit.
588 2320
589 If you don't know what to do here, s !! 2321 config CPU_HAS_PREFETCH
>> 2322 bool
>> 2323
>> 2324 config CPU_GENERIC_DUMP_TLB
>> 2325 bool
>> 2326 default y if !(CPU_R3000 || CPU_TX39XX)
590 2327
591 config RISCV_ISA_V_DEFAULT_ENABLE !! 2328 config MIPS_FP_SUPPORT
592 bool "Enable userspace Vector by defau !! 2329 bool "Floating Point support" if EXPERT
593 depends on RISCV_ISA_V <<
594 default y 2330 default y
595 help 2331 help
596 Say Y here if you want to enable Vec !! 2332 Select y to include support for floating point in the kernel
597 Otherwise, userspace has to make exp !! 2333 including initialization of FPU hardware, FP context save & restore
598 Vector, or enable it via the sysctl !! 2334 and emulation of an FPU where necessary. Without this support any
>> 2335 userland program attempting to use floating point instructions will
>> 2336 receive a SIGILL.
599 2337
600 If you don't know what to do here, s !! 2338 If you know that your userland will not attempt to use floating point
>> 2339 instructions then you can say n here to shrink the kernel a little.
601 2340
602 config RISCV_ISA_V_UCOPY_THRESHOLD !! 2341 If unsure, say y.
603 int "Threshold size for vectorized use <<
604 depends on RISCV_ISA_V <<
605 default 768 <<
606 help <<
607 Prefer using vectorized copy_to_user <<
608 workload size exceeds this value. <<
609 2342
610 config RISCV_ISA_V_PREEMPTIVE !! 2343 config CPU_R2300_FPU
611 bool "Run kernel-mode Vector with kern !! 2344 bool
612 depends on PREEMPTION !! 2345 depends on MIPS_FP_SUPPORT
613 depends on RISCV_ISA_V !! 2346 default y if CPU_R3000 || CPU_TX39XX
>> 2347
>> 2348 config CPU_R3K_TLB
>> 2349 bool
>> 2350
>> 2351 config CPU_R4K_FPU
>> 2352 bool
>> 2353 depends on MIPS_FP_SUPPORT
>> 2354 default y if !CPU_R2300_FPU
>> 2355
>> 2356 config CPU_R4K_CACHE_TLB
>> 2357 bool
>> 2358 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
>> 2359
>> 2360 config MIPS_MT_SMP
>> 2361 bool "MIPS MT SMP support (1 TC on each available VPE)"
614 default y 2362 default y
>> 2363 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2364 select CPU_MIPSR2_IRQ_VI
>> 2365 select CPU_MIPSR2_IRQ_EI
>> 2366 select SYNC_R4K
>> 2367 select MIPS_MT
>> 2368 select SMP
>> 2369 select SMP_UP
>> 2370 select SYS_SUPPORTS_SMP
>> 2371 select SYS_SUPPORTS_SCHED_SMT
>> 2372 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2373 help
>> 2374 This is a kernel model which is known as SMVP. This is supported
>> 2375 on cores with the MT ASE and uses the available VPEs to implement
>> 2376 virtual processors which supports SMP. This is equivalent to the
>> 2377 Intel Hyperthreading feature. For further information go to
>> 2378 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2379
>> 2380 config MIPS_MT
>> 2381 bool
>> 2382
>> 2383 config SCHED_SMT
>> 2384 bool "SMT (multithreading) scheduler support"
>> 2385 depends on SYS_SUPPORTS_SCHED_SMT
>> 2386 default n
615 help 2387 help
616 Usually, in-kernel SIMD routines are !! 2388 SMT scheduler support improves the CPU scheduler's decision making
617 Functions which envoke long running !! 2389 when dealing with MIPS MT enabled cores at a cost of slightly
618 vector unit to prevent blocking othe !! 2390 increased overhead in some places. If unsure say N here.
>> 2391
>> 2392 config SYS_SUPPORTS_SCHED_SMT
>> 2393 bool
619 2394
620 This config allows kernel to run SIM !! 2395 config SYS_SUPPORTS_MULTITHREADING
621 preemption. Enabling this config wil !! 2396 bool
622 consumption due to the allocation of <<
623 2397
624 config RISCV_ISA_ZAWRS !! 2398 config MIPS_MT_FPAFF
625 bool "Zawrs extension support for more !! 2399 bool "Dynamic FPU affinity for FP-intensive threads"
626 depends on RISCV_ALTERNATIVE !! 2400 default y
>> 2401 depends on MIPS_MT_SMP
>> 2402
>> 2403 config MIPSR2_TO_R6_EMULATOR
>> 2404 bool "MIPS R2-to-R6 emulator"
>> 2405 depends on CPU_MIPSR6
>> 2406 depends on MIPS_FP_SUPPORT
627 default y 2407 default y
628 help 2408 help
629 The Zawrs extension defines instruct !! 2409 Choose this option if you want to run non-R6 MIPS userland code.
630 which allow a hart to enter a low-po !! 2410 Even if you say 'Y' here, the emulator will still be disabled by
631 hypervisor while waiting on a store !! 2411 default. You can enable it using the 'mipsr2emu' kernel option.
632 use of these instructions in the ker !! 2412 The only reason this is a build-time option is to save ~14K from the
633 detected at boot. !! 2413 final kernel image.
634 2414
635 If you don't know what to do here, s !! 2415 config SYS_SUPPORTS_VPE_LOADER
>> 2416 bool
>> 2417 depends on SYS_SUPPORTS_MULTITHREADING
>> 2418 help
>> 2419 Indicates that the platform supports the VPE loader, and provides
>> 2420 physical_memsize.
>> 2421
>> 2422 config MIPS_VPE_LOADER
>> 2423 bool "VPE loader support."
>> 2424 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2425 select CPU_MIPSR2_IRQ_VI
>> 2426 select CPU_MIPSR2_IRQ_EI
>> 2427 select MIPS_MT
>> 2428 help
>> 2429 Includes a loader for loading an elf relocatable object
>> 2430 onto another VPE and running it.
636 2431
637 config TOOLCHAIN_HAS_ZBB !! 2432 config MIPS_VPE_LOADER_CMP
638 bool 2433 bool
639 default y !! 2434 default "y"
640 depends on !64BIT || $(cc-option,-mabi !! 2435 depends on MIPS_VPE_LOADER && MIPS_CMP
641 depends on !32BIT || $(cc-option,-mabi <<
642 depends on LLD_VERSION >= 150000 || LD <<
643 depends on AS_HAS_OPTION_ARCH <<
644 2436
645 # This symbol indicates that the toolchain sup !! 2437 config MIPS_VPE_LOADER_MT
646 # extensions, including Zvk*, Zvbb, and Zvbc. !! 2438 bool
647 # binutils added all except Zvkb, then added Z !! 2439 default "y"
648 config TOOLCHAIN_HAS_VECTOR_CRYPTO !! 2440 depends on MIPS_VPE_LOADER && !MIPS_CMP
649 def_bool $(as-instr, .option arch$(com <<
650 depends on AS_HAS_OPTION_ARCH <<
651 2441
652 config RISCV_ISA_ZBA !! 2442 config MIPS_VPE_LOADER_TOM
653 bool "Zba extension support for bit ma !! 2443 bool "Load VPE program into memory hidden from linux"
>> 2444 depends on MIPS_VPE_LOADER
654 default y 2445 default y
655 help 2446 help
656 Add support for enabling optimisati !! 2447 The loader can use memory that is present but has been hidden from
657 extension is detected at boot. !! 2448 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2449 you to ensure the amount you put in the option and the space your
>> 2450 program requires is less or equal to the amount physically present.
>> 2451
>> 2452 config MIPS_VPE_APSP_API
>> 2453 bool "Enable support for AP/SP API (RTLX)"
>> 2454 depends on MIPS_VPE_LOADER
658 2455
659 The Zba extension provides instruct !! 2456 config MIPS_VPE_APSP_API_CMP
660 of addresses that index into arrays !! 2457 bool
>> 2458 default "y"
>> 2459 depends on MIPS_VPE_APSP_API && MIPS_CMP
661 2460
662 If you don't know what to do here, !! 2461 config MIPS_VPE_APSP_API_MT
>> 2462 bool
>> 2463 default "y"
>> 2464 depends on MIPS_VPE_APSP_API && !MIPS_CMP
663 2465
664 config RISCV_ISA_ZBB !! 2466 config MIPS_CMP
665 bool "Zbb extension support for bit ma !! 2467 bool "MIPS CMP framework support (DEPRECATED)"
666 depends on TOOLCHAIN_HAS_ZBB !! 2468 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
667 depends on RISCV_ALTERNATIVE !! 2469 select SMP
668 default y !! 2470 select SYNC_R4K
>> 2471 select SYS_SUPPORTS_SMP
>> 2472 select WEAK_ORDERING
>> 2473 default n
669 help 2474 help
670 Adds support to dynamically detect !! 2475 Select this if you are using a bootloader which implements the "CMP
671 extension (basic bit manipulation) !! 2476 framework" protocol (ie. YAMON) and want your kernel to make use of
>> 2477 its ability to start secondary CPUs.
>> 2478
>> 2479 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2480 instead of this.
>> 2481
>> 2482 config MIPS_CPS
>> 2483 bool "MIPS Coherent Processing System support"
>> 2484 depends on SYS_SUPPORTS_MIPS_CPS
>> 2485 select MIPS_CM
>> 2486 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2487 select SMP
>> 2488 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2489 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2490 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2491 select SYS_SUPPORTS_SMP
>> 2492 select WEAK_ORDERING
>> 2493 help
>> 2494 Select this if you wish to run an SMP kernel across multiple cores
>> 2495 within a MIPS Coherent Processing System. When this option is
>> 2496 enabled the kernel will probe for other cores and boot them with
>> 2497 no external assistance. It is safe to enable this when hardware
>> 2498 support is unavailable.
672 2499
673 The Zbb extension provides instruct !! 2500 config MIPS_CPS_PM
674 of bit-specific operations (count b !! 2501 depends on MIPS_CPS
675 bitrotation, etc). !! 2502 bool
676 2503
677 If you don't know what to do here, !! 2504 config MIPS_CM
>> 2505 bool
>> 2506 select MIPS_CPC
>> 2507
>> 2508 config MIPS_CPC
>> 2509 bool
678 2510
679 config TOOLCHAIN_HAS_ZBC !! 2511 config SB1_PASS_2_WORKAROUNDS
680 bool 2512 bool
>> 2513 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
681 default y 2514 default y
682 depends on !64BIT || $(cc-option,-mabi <<
683 depends on !32BIT || $(cc-option,-mabi <<
684 depends on LLD_VERSION >= 150000 || LD <<
685 depends on AS_HAS_OPTION_ARCH <<
686 2515
687 config RISCV_ISA_ZBC !! 2516 config SB1_PASS_2_1_WORKAROUNDS
688 bool "Zbc extension support for carry- !! 2517 bool
689 depends on TOOLCHAIN_HAS_ZBC !! 2518 depends on CPU_SB1 && CPU_SB1_PASS_2
690 depends on MMU <<
691 depends on RISCV_ALTERNATIVE <<
692 default y 2519 default y
>> 2520
>> 2521 choice
>> 2522 prompt "SmartMIPS or microMIPS ASE support"
>> 2523
>> 2524 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2525 bool "None"
693 help 2526 help
694 Adds support to dynamically detect !! 2527 Select this if you want neither microMIPS nor SmartMIPS support
695 extension (carry-less multiplicatio <<
696 2528
697 The Zbc extension could accelerate !! 2529 config CPU_HAS_SMARTMIPS
698 calculations. !! 2530 depends on SYS_SUPPORTS_SMARTMIPS
>> 2531 bool "SmartMIPS"
>> 2532 help
>> 2533 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2534 increased security at both hardware and software level for
>> 2535 smartcards. Enabling this option will allow proper use of the
>> 2536 SmartMIPS instructions by Linux applications. However a kernel with
>> 2537 this option will not work on a MIPS core without SmartMIPS core. If
>> 2538 you don't know you probably don't have SmartMIPS and should say N
>> 2539 here.
699 2540
700 If you don't know what to do here, !! 2541 config CPU_MICROMIPS
>> 2542 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2543 bool "microMIPS"
>> 2544 help
>> 2545 When this option is enabled the kernel will be built using the
>> 2546 microMIPS ISA
701 2547
702 config RISCV_ISA_ZICBOM !! 2548 endchoice
703 bool "Zicbom extension support for non !! 2549
704 depends on MMU !! 2550 config CPU_HAS_MSA
705 depends on RISCV_ALTERNATIVE !! 2551 bool "Support for the MIPS SIMD Architecture"
706 default y !! 2552 depends on CPU_SUPPORTS_MSA
707 select RISCV_DMA_NONCOHERENT !! 2553 depends on MIPS_FP_SUPPORT
708 select DMA_DIRECT_REMAP !! 2554 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2555 help
>> 2556 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2557 and a set of SIMD instructions to operate on them. When this option
>> 2558 is enabled the kernel will support allocating & switching MSA
>> 2559 vector register contexts. If you know that your kernel will only be
>> 2560 running on CPUs which do not support MSA or that your userland will
>> 2561 not be making use of it then you may wish to say N here to reduce
>> 2562 the size & complexity of your kernel.
>> 2563
>> 2564 If unsure, say Y.
>> 2565
>> 2566 config CPU_HAS_WB
>> 2567 bool
>> 2568
>> 2569 config XKS01
>> 2570 bool
>> 2571
>> 2572 config CPU_HAS_DIEI
>> 2573 depends on !CPU_DIEI_BROKEN
>> 2574 bool
>> 2575
>> 2576 config CPU_DIEI_BROKEN
>> 2577 bool
>> 2578
>> 2579 config CPU_HAS_RIXI
>> 2580 bool
>> 2581
>> 2582 config CPU_NO_LOAD_STORE_LR
>> 2583 bool
709 help 2584 help
710 Adds support to dynamically detect !! 2585 CPU lacks support for unaligned load and store instructions:
711 extension (Cache Block Management O !! 2586 LWL, LWR, SWL, SWR (Load/store word left/right).
712 usage. !! 2587 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
>> 2588 systems).
713 2589
714 The Zicbom extension can be used to !! 2590 #
715 non-coherent DMA support on devices !! 2591 # Vectored interrupt mode is an R2 feature
>> 2592 #
>> 2593 config CPU_MIPSR2_IRQ_VI
>> 2594 bool
716 2595
717 If you don't know what to do here, !! 2596 #
>> 2597 # Extended interrupt mode is an R2 feature
>> 2598 #
>> 2599 config CPU_MIPSR2_IRQ_EI
>> 2600 bool
718 2601
719 config RISCV_ISA_ZICBOZ !! 2602 config CPU_HAS_SYNC
720 bool "Zicboz extension support for fas !! 2603 bool
721 depends on RISCV_ALTERNATIVE !! 2604 depends on !CPU_R3000
722 default y 2605 default y
>> 2606
>> 2607 #
>> 2608 # CPU non-features
>> 2609 #
>> 2610 config CPU_DADDI_WORKAROUNDS
>> 2611 bool
>> 2612
>> 2613 config CPU_R4000_WORKAROUNDS
>> 2614 bool
>> 2615 select CPU_R4400_WORKAROUNDS
>> 2616
>> 2617 config CPU_R4400_WORKAROUNDS
>> 2618 bool
>> 2619
>> 2620 config CPU_R4X00_BUGS64
>> 2621 bool
>> 2622 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
>> 2623
>> 2624 config MIPS_ASID_SHIFT
>> 2625 int
>> 2626 default 6 if CPU_R3000 || CPU_TX39XX
>> 2627 default 0
>> 2628
>> 2629 config MIPS_ASID_BITS
>> 2630 int
>> 2631 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2632 default 6 if CPU_R3000 || CPU_TX39XX
>> 2633 default 8
>> 2634
>> 2635 config MIPS_ASID_BITS_VARIABLE
>> 2636 bool
>> 2637
>> 2638 config MIPS_CRC_SUPPORT
>> 2639 bool
>> 2640
>> 2641 #
>> 2642 # - Highmem only makes sense for the 32-bit kernel.
>> 2643 # - The current highmem code will only work properly on physically indexed
>> 2644 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2645 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2646 # moment we protect the user and offer the highmem option only on machines
>> 2647 # where it's known to be safe. This will not offer highmem on a few systems
>> 2648 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2649 # indexed CPUs but we're playing safe.
>> 2650 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2651 # know they might have memory configurations that could make use of highmem
>> 2652 # support.
>> 2653 #
>> 2654 config HIGHMEM
>> 2655 bool "High Memory Support"
>> 2656 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2657
>> 2658 config CPU_SUPPORTS_HIGHMEM
>> 2659 bool
>> 2660
>> 2661 config SYS_SUPPORTS_HIGHMEM
>> 2662 bool
>> 2663
>> 2664 config SYS_SUPPORTS_SMARTMIPS
>> 2665 bool
>> 2666
>> 2667 config SYS_SUPPORTS_MICROMIPS
>> 2668 bool
>> 2669
>> 2670 config SYS_SUPPORTS_MIPS16
>> 2671 bool
723 help 2672 help
724 Enable the use of the Zicboz extens !! 2673 This option must be set if a kernel might be executed on a MIPS16-
725 when available. !! 2674 enabled CPU even if MIPS16 is not actually being used. In other
>> 2675 words, it makes the kernel MIPS16-tolerant.
726 2676
727 The Zicboz extension is used for fa !! 2677 config CPU_SUPPORTS_MSA
>> 2678 bool
728 2679
729 If you don't know what to do here, !! 2680 config ARCH_FLATMEM_ENABLE
>> 2681 def_bool y
>> 2682 depends on !NUMA && !CPU_LOONGSON2EF
730 2683
731 config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI !! 2684 config ARCH_SPARSEMEM_ENABLE
>> 2685 bool
>> 2686 select SPARSEMEM_STATIC if !SGI_IP27
>> 2687
>> 2688 config NUMA
>> 2689 bool "NUMA Support"
>> 2690 depends on SYS_SUPPORTS_NUMA
>> 2691 help
>> 2692 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2693 Access). This option improves performance on systems with more
>> 2694 than two nodes; on two node systems it is generally better to
>> 2695 leave it disabled; on single node systems leave this option
>> 2696 disabled.
>> 2697
>> 2698 config SYS_SUPPORTS_NUMA
>> 2699 bool
>> 2700
>> 2701 config HAVE_SETUP_PER_CPU_AREA
732 def_bool y 2702 def_bool y
733 # https://sourceware.org/git/?p=binuti !! 2703 depends on NUMA
734 # https://gcc.gnu.org/git/?p=gcc.git;a <<
735 depends on AS_IS_GNU && AS_VERSION >= <<
736 help <<
737 Binutils-2.38 and GCC-12.1.0 bumped <<
738 20191213 version, which moves some i <<
739 the Zicsr and Zifencei extensions. T <<
740 Zicsr and Zifencei when binutils >= <<
741 and Zifencei are supported in binuti <<
742 To make life easier, and avoid forci <<
743 newer ISA spec to version 2.2, relax <<
744 For clang < 17 or GCC < 11.3.0, for <<
745 special treatment, this is dealt wit <<
746 2704
747 config TOOLCHAIN_NEEDS_OLD_ISA_SPEC !! 2705 config NEED_PER_CPU_EMBED_FIRST_CHUNK
748 def_bool y 2706 def_bool y
749 depends on TOOLCHAIN_NEEDS_EXPLICIT_ZI !! 2707 depends on NUMA
750 # https://github.com/llvm/llvm-project <<
751 # https://gcc.gnu.org/git/?p=gcc.git;a <<
752 depends on (CC_IS_CLANG && CLANG_VERSI <<
753 help <<
754 Certain versions of clang and GCC do <<
755 -march. This option causes an older <<
756 versions of clang and GCC to be pass <<
757 as passing zicsr and zifencei to -ma <<
758 2708
759 config FPU !! 2709 config RELOCATABLE
760 bool "FPU support" !! 2710 bool "Relocatable kernel"
761 default y !! 2711 depends on SYS_SUPPORTS_RELOCATABLE
>> 2712 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
>> 2713 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
>> 2714 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
>> 2715 CPU_P5600 || CAVIUM_OCTEON_SOC
>> 2716 help
>> 2717 This builds a kernel image that retains relocation information
>> 2718 so it can be loaded someplace besides the default 1MB.
>> 2719 The relocations make the kernel binary about 15% larger,
>> 2720 but are discarded at runtime
>> 2721
>> 2722 config RELOCATION_TABLE_SIZE
>> 2723 hex "Relocation table size"
>> 2724 depends on RELOCATABLE
>> 2725 range 0x0 0x01000000
>> 2726 default "0x00100000"
>> 2727 help
>> 2728 A table of relocation data will be appended to the kernel binary
>> 2729 and parsed at boot to fix up the relocated kernel.
>> 2730
>> 2731 This option allows the amount of space reserved for the table to be
>> 2732 adjusted, although the default of 1Mb should be ok in most cases.
>> 2733
>> 2734 The build will fail and a valid size suggested if this is too small.
>> 2735
>> 2736 If unsure, leave at the default value.
>> 2737
>> 2738 config RANDOMIZE_BASE
>> 2739 bool "Randomize the address of the kernel image"
>> 2740 depends on RELOCATABLE
762 help 2741 help
763 Say N here if you want to disable al !! 2742 Randomizes the physical and virtual address at which the
764 in the kernel. !! 2743 kernel image is loaded, as a security feature that
>> 2744 deters exploit attempts relying on knowledge of the location
>> 2745 of kernel internals.
>> 2746
>> 2747 Entropy is generated using any coprocessor 0 registers available.
>> 2748
>> 2749 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2750
>> 2751 If unsure, say N.
765 2752
766 If you don't know what to do here, s !! 2753 config RANDOMIZE_BASE_MAX_OFFSET
>> 2754 hex "Maximum kASLR offset" if EXPERT
>> 2755 depends on RANDOMIZE_BASE
>> 2756 range 0x0 0x40000000 if EVA || 64BIT
>> 2757 range 0x0 0x08000000
>> 2758 default "0x01000000"
>> 2759 help
>> 2760 When kASLR is active, this provides the maximum offset that will
>> 2761 be applied to the kernel image. It should be set according to the
>> 2762 amount of physical RAM available in the target system minus
>> 2763 PHYSICAL_START and must be a power of 2.
767 2764
768 config IRQ_STACKS !! 2765 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
769 bool "Independent irq & softirq stacks !! 2766 EVA or 64-bit. The default is 16Mb.
>> 2767
>> 2768 config NODES_SHIFT
>> 2769 int
>> 2770 default "6"
>> 2771 depends on NEED_MULTIPLE_NODES
>> 2772
>> 2773 config HW_PERF_EVENTS
>> 2774 bool "Enable hardware performance counter support for perf events"
>> 2775 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
770 default y 2776 default y
771 select HAVE_IRQ_EXIT_ON_IRQ_STACK <<
772 select HAVE_SOFTIRQ_ON_OWN_STACK <<
773 help 2777 help
774 Add independent irq & softirq stacks !! 2778 Enable hardware performance counter support for perf events. If
775 overflows. We may save some memory f !! 2779 disabled, perf events will use software events only.
776 2780
777 config THREAD_SIZE_ORDER !! 2781 config DMI
778 int "Kernel stack size (in power-of-tw !! 2782 bool "Enable DMI scanning"
779 range 0 4 !! 2783 depends on MACH_LOONGSON64
780 default 1 if 32BIT !! 2784 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
781 default 2 !! 2785 default y
782 help 2786 help
783 Specify the Pages of thread stack si !! 2787 Enabled scanning of DMI to identify machine quirks. Say Y
784 affects irq stack size, which is equ !! 2788 here unless you have verified that your setup is not
>> 2789 affected by entries in the DMI blacklist. Required by PNP
>> 2790 BIOS code.
785 2791
786 config RISCV_MISALIGNED !! 2792 config SMP
787 bool !! 2793 bool "Multi-Processing support"
788 select SYSCTL_ARCH_UNALIGN_ALLOW !! 2794 depends on SYS_SUPPORTS_SMP
789 help 2795 help
790 Embed support for emulating misalign !! 2796 This enables support for systems with more than one CPU. If you have
>> 2797 a system with only one CPU, say N. If you have a system with more
>> 2798 than one CPU, say Y.
>> 2799
>> 2800 If you say N here, the kernel will run on uni- and multiprocessor
>> 2801 machines, but will use only one CPU of a multiprocessor machine. If
>> 2802 you say Y here, the kernel will run on many, but not all,
>> 2803 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2804 will run faster if you say N here.
791 2805
792 choice !! 2806 People using multiprocessor machines who say Y here should also say
793 prompt "Unaligned Accesses Support" !! 2807 Y to "Enhanced Real Time Clock Support", below.
794 default RISCV_PROBE_UNALIGNED_ACCESS !! 2808
>> 2809 See also the SMP-HOWTO available at
>> 2810 <https://www.tldp.org/docs.html#howto>.
>> 2811
>> 2812 If you don't know what to do here, say N.
>> 2813
>> 2814 config HOTPLUG_CPU
>> 2815 bool "Support for hot-pluggable CPUs"
>> 2816 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
795 help 2817 help
796 This determines the level of support !! 2818 Say Y here to allow turning CPUs off and on. CPUs can be
797 information is used by the kernel to !! 2819 controlled through /sys/devices/system/cpu.
798 exposed to user space via the hwprob !! 2820 (Note: power management support will enable this option
799 probed at boot by default. !! 2821 automatically on SMP systems. )
800 !! 2822 Say N if you want to disable CPU hotplug.
801 config RISCV_PROBE_UNALIGNED_ACCESS <<
802 bool "Probe for hardware unaligned acc <<
803 select RISCV_MISALIGNED <<
804 help <<
805 During boot, the kernel will run a s <<
806 speed of unaligned accesses. This pr <<
807 the speed of unaligned accesses on t <<
808 memory accesses trap into the kernel <<
809 system, the kernel will emulate the <<
810 UABI. <<
811 <<
812 config RISCV_EMULATED_UNALIGNED_ACCESS <<
813 bool "Emulate unaligned access where s <<
814 select RISCV_MISALIGNED <<
815 help <<
816 If unaligned memory accesses trap in <<
817 supported by the system, the kernel <<
818 accesses to preserve the UABI. When <<
819 unaligned accesses, the unaligned ac <<
820 <<
821 config RISCV_SLOW_UNALIGNED_ACCESS <<
822 bool "Assume the system supports slow <<
823 depends on NONPORTABLE <<
824 help <<
825 Assume that the system supports slow <<
826 kernel and userspace programs may no <<
827 that do not support unaligned memory <<
828 <<
829 config RISCV_EFFICIENT_UNALIGNED_ACCESS <<
830 bool "Assume the system supports fast <<
831 depends on NONPORTABLE <<
832 select DCACHE_WORD_ACCESS if MMU <<
833 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
834 help <<
835 Assume that the system supports fast <<
836 enabled, this option improves the pe <<
837 systems. However, the kernel and use <<
838 slowly, or will not be able to run a <<
839 support efficient unaligned memory a <<
840 2823
841 endchoice !! 2824 config SMP_UP
>> 2825 bool
>> 2826
>> 2827 config SYS_SUPPORTS_MIPS_CMP
>> 2828 bool
842 2829
843 source "arch/riscv/Kconfig.vendor" !! 2830 config SYS_SUPPORTS_MIPS_CPS
>> 2831 bool
844 2832
845 endmenu # "Platform type" !! 2833 config SYS_SUPPORTS_SMP
>> 2834 bool
846 2835
847 menu "Kernel features" !! 2836 config NR_CPUS_DEFAULT_4
>> 2837 bool
848 2838
849 source "kernel/Kconfig.hz" !! 2839 config NR_CPUS_DEFAULT_8
>> 2840 bool
850 2841
851 config RISCV_SBI_V01 !! 2842 config NR_CPUS_DEFAULT_16
852 bool "SBI v0.1 support" !! 2843 bool
853 depends on RISCV_SBI !! 2844
854 help !! 2845 config NR_CPUS_DEFAULT_32
855 This config allows kernel to use SBI !! 2846 bool
856 deprecated in future once legacy M-m !! 2847
>> 2848 config NR_CPUS_DEFAULT_64
>> 2849 bool
857 2850
858 config RISCV_BOOT_SPINWAIT !! 2851 config NR_CPUS
859 bool "Spinwait booting method" !! 2852 int "Maximum number of CPUs (2-256)"
>> 2853 range 2 256
860 depends on SMP 2854 depends on SMP
861 default y if RISCV_SBI_V01 || RISCV_M_ !! 2855 default "4" if NR_CPUS_DEFAULT_4
>> 2856 default "8" if NR_CPUS_DEFAULT_8
>> 2857 default "16" if NR_CPUS_DEFAULT_16
>> 2858 default "32" if NR_CPUS_DEFAULT_32
>> 2859 default "64" if NR_CPUS_DEFAULT_64
>> 2860 help
>> 2861 This allows you to specify the maximum number of CPUs which this
>> 2862 kernel will support. The maximum supported value is 32 for 32-bit
>> 2863 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2864 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2865 and 2 for all others.
>> 2866
>> 2867 This is purely to save memory - each supported CPU adds
>> 2868 approximately eight kilobytes to the kernel image. For best
>> 2869 performance should round up your number of processors to the next
>> 2870 power of two.
>> 2871
>> 2872 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2873 bool
>> 2874
>> 2875 config MIPS_NR_CPU_NR_MAP_1024
>> 2876 bool
>> 2877
>> 2878 config MIPS_NR_CPU_NR_MAP
>> 2879 int
>> 2880 depends on SMP
>> 2881 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2882 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2883
>> 2884 #
>> 2885 # Timer Interrupt Frequency Configuration
>> 2886 #
>> 2887
>> 2888 choice
>> 2889 prompt "Timer frequency"
>> 2890 default HZ_250
862 help 2891 help
863 This enables support for booting Lin !! 2892 Allows the configuration of the timer frequency.
864 spinwait method, all cores randomly <<
865 gets chosen via lottery and all othe <<
866 variable. This method cannot support <<
867 scheme. It should be only enabled fo <<
868 on older firmware without SBI HSM ex <<
869 rely on ordered booting via SBI HSM <<
870 dynamically at runtime if the firmwa <<
871 <<
872 Since spinwait is incompatible with <<
873 NR_CPUS be large enough to contain t <<
874 hart to enter Linux. <<
875 2893
876 If unsure what to do here, say N. !! 2894 config HZ_24
>> 2895 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
877 2896
878 config ARCH_SUPPORTS_KEXEC !! 2897 config HZ_48
879 def_bool y !! 2898 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
880 2899
881 config ARCH_SELECTS_KEXEC !! 2900 config HZ_100
882 def_bool y !! 2901 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
883 depends on KEXEC <<
884 select HOTPLUG_CPU if SMP <<
885 2902
886 config ARCH_SUPPORTS_KEXEC_FILE !! 2903 config HZ_128
887 def_bool 64BIT !! 2904 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
888 2905
889 config ARCH_SELECTS_KEXEC_FILE !! 2906 config HZ_250
890 def_bool y !! 2907 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
891 depends on KEXEC_FILE <<
892 select HAVE_IMA_KEXEC if IMA <<
893 select KEXEC_ELF <<
894 2908
895 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2909 config HZ_256
896 def_bool ARCH_SUPPORTS_KEXEC_FILE !! 2910 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
897 2911
898 config ARCH_SUPPORTS_CRASH_DUMP !! 2912 config HZ_1000
899 def_bool y !! 2913 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
900 2914
901 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATIO !! 2915 config HZ_1024
902 def_bool CRASH_RESERVE !! 2916 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
903 2917
904 config COMPAT !! 2918 endchoice
905 bool "Kernel support for 32-bit U-mode <<
906 default 64BIT <<
907 depends on 64BIT && MMU <<
908 help <<
909 This option enables support for a 32 <<
910 kernel at S-mode. riscv32-specific c <<
911 the user helper functions (vdso), si <<
912 ptrace interface are handled appropr <<
913 <<
914 If you want to execute 32-bit usersp <<
915 <<
916 config PARAVIRT <<
917 bool "Enable paravirtualization code" <<
918 depends on RISCV_SBI <<
919 help <<
920 This changes the kernel so it can mo <<
921 under a hypervisor, potentially impr <<
922 over full virtualization. <<
923 <<
924 config PARAVIRT_TIME_ACCOUNTING <<
925 bool "Paravirtual steal time accountin <<
926 depends on PARAVIRT <<
927 help <<
928 Select this option to enable fine gr <<
929 accounting. Time spent executing oth <<
930 the current vCPU is discounted from <<
931 that, there can be a small performan <<
932 2919
933 If in doubt, say N here. !! 2920 config SYS_SUPPORTS_24HZ
>> 2921 bool
934 2922
935 config RELOCATABLE !! 2923 config SYS_SUPPORTS_48HZ
936 bool "Build a relocatable kernel" !! 2924 bool
937 depends on MMU && 64BIT && !XIP_KERNEL <<
938 select MODULE_SECTIONS if MODULES <<
939 help <<
940 This builds a kernel as a Position I <<
941 which retains all relocation metadat <<
942 kernel binary at runtime to a differ <<
943 address it was linked at. <<
944 Since RISCV uses the RELA relocation <<
945 relocation pass at runtime even if t <<
946 same address it was linked at. <<
947 2925
948 If unsure, say N. !! 2926 config SYS_SUPPORTS_100HZ
>> 2927 bool
949 2928
950 config RANDOMIZE_BASE !! 2929 config SYS_SUPPORTS_128HZ
951 bool "Randomize the address of the ker !! 2930 bool
952 select RELOCATABLE !! 2931
953 depends on MMU && 64BIT && !XIP_KERNEL !! 2932 config SYS_SUPPORTS_250HZ
954 help !! 2933 bool
955 Randomizes the virtual address at wh !! 2934
956 loaded, as a security feature that d !! 2935 config SYS_SUPPORTS_256HZ
957 relying on knowledge of the location !! 2936 bool
958 !! 2937
959 It is the bootloader's job to provid !! 2938 config SYS_SUPPORTS_1000HZ
960 random u64 value in /chosen/kaslr-se !! 2939 bool
961 !! 2940
962 When booting via the UEFI stub, it w !! 2941 config SYS_SUPPORTS_1024HZ
963 EFI_RNG_PROTOCOL implementation (if !! 2942 bool
964 to the kernel proper. In addition, i !! 2943
965 location of the kernel Image as well !! 2944 config SYS_SUPPORTS_ARBIT_HZ
966 !! 2945 bool
967 If unsure, say N. !! 2946 default y if !SYS_SUPPORTS_24HZ && \
968 !! 2947 !SYS_SUPPORTS_48HZ && \
969 endmenu # "Kernel features" !! 2948 !SYS_SUPPORTS_100HZ && \
970 !! 2949 !SYS_SUPPORTS_128HZ && \
971 menu "Boot options" !! 2950 !SYS_SUPPORTS_250HZ && \
972 !! 2951 !SYS_SUPPORTS_256HZ && \
973 config CMDLINE !! 2952 !SYS_SUPPORTS_1000HZ && \
974 string "Built-in kernel command line" !! 2953 !SYS_SUPPORTS_1024HZ
975 help !! 2954
976 For most platforms, the arguments fo !! 2955 config HZ
977 are provided at run-time, during boo !! 2956 int
978 where either no arguments are being !! 2957 default 24 if HZ_24
979 arguments are insufficient or even i !! 2958 default 48 if HZ_48
>> 2959 default 100 if HZ_100
>> 2960 default 128 if HZ_128
>> 2961 default 250 if HZ_250
>> 2962 default 256 if HZ_256
>> 2963 default 1000 if HZ_1000
>> 2964 default 1024 if HZ_1024
>> 2965
>> 2966 config SCHED_HRTICK
>> 2967 def_bool HIGH_RES_TIMERS
>> 2968
>> 2969 config KEXEC
>> 2970 bool "Kexec system call"
>> 2971 select KEXEC_CORE
>> 2972 help
>> 2973 kexec is a system call that implements the ability to shutdown your
>> 2974 current kernel, and to start another kernel. It is like a reboot
>> 2975 but it is independent of the system firmware. And like a reboot
>> 2976 you can start any kernel with it, not just Linux.
>> 2977
>> 2978 The name comes from the similarity to the exec system call.
>> 2979
>> 2980 It is an ongoing process to be certain the hardware in a machine
>> 2981 is properly shutdown, so do not be surprised if this code does not
>> 2982 initially work for you. As of this writing the exact hardware
>> 2983 interface is strongly in flux, so no good recommendation can be
>> 2984 made.
>> 2985
>> 2986 config CRASH_DUMP
>> 2987 bool "Kernel crash dumps"
>> 2988 help
>> 2989 Generate crash dump after being started by kexec.
>> 2990 This should be normally only set in special crash dump kernels
>> 2991 which are loaded in the main kernel with kexec-tools into
>> 2992 a specially reserved region and then later executed after
>> 2993 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2994 to a memory address not used by the main kernel or firmware using
>> 2995 PHYSICAL_START.
>> 2996
>> 2997 config PHYSICAL_START
>> 2998 hex "Physical address where the kernel is loaded"
>> 2999 default "0xffffffff84000000"
>> 3000 depends on CRASH_DUMP
>> 3001 help
>> 3002 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 3003 If you plan to use kernel for capturing the crash dump change
>> 3004 this value to start of the reserved region (the "X" value as
>> 3005 specified in the "crashkernel=YM@XM" command line boot parameter
>> 3006 passed to the panic-ed kernel).
>> 3007
>> 3008 config SECCOMP
>> 3009 bool "Enable seccomp to safely compute untrusted bytecode"
>> 3010 depends on PROC_FS
>> 3011 default y
>> 3012 help
>> 3013 This kernel feature is useful for number crunching applications
>> 3014 that may need to compute untrusted bytecode during their
>> 3015 execution. By using pipes or other transports made available to
>> 3016 the process as file descriptors supporting the read/write
>> 3017 syscalls, it's possible to isolate those applications in
>> 3018 their own address space using seccomp. Once seccomp is
>> 3019 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 3020 and the task is only allowed to execute a few safe syscalls
>> 3021 defined by each seccomp mode.
>> 3022
>> 3023 If unsure, say Y. Only embedded should say N here.
>> 3024
>> 3025 config MIPS_O32_FP64_SUPPORT
>> 3026 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 3027 depends on 32BIT || MIPS32_O32
>> 3028 help
>> 3029 When this is enabled, the kernel will support use of 64-bit floating
>> 3030 point registers with binaries using the O32 ABI along with the
>> 3031 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 3032 32-bit MIPS systems this support is at the cost of increasing the
>> 3033 size and complexity of the compiled FPU emulator. Thus if you are
>> 3034 running a MIPS32 system and know that none of your userland binaries
>> 3035 will require 64-bit floating point, you may wish to reduce the size
>> 3036 of your kernel & potentially improve FP emulation performance by
>> 3037 saying N here.
>> 3038
>> 3039 Although binutils currently supports use of this flag the details
>> 3040 concerning its effect upon the O32 ABI in userland are still being
>> 3041 worked on. In order to avoid userland becoming dependant upon current
>> 3042 behaviour before the details have been finalised, this option should
>> 3043 be considered experimental and only enabled by those working upon
>> 3044 said details.
>> 3045
>> 3046 If unsure, say N.
>> 3047
>> 3048 config USE_OF
>> 3049 bool
>> 3050 select OF
>> 3051 select OF_EARLY_FLATTREE
>> 3052 select IRQ_DOMAIN
>> 3053
>> 3054 config UHI_BOOT
>> 3055 bool
980 3056
981 When that occurs, it is possible to !! 3057 config BUILTIN_DTB
982 line here and choose how the kernel !! 3058 bool
983 3059
984 choice 3060 choice
985 prompt "Built-in command line usage" !! 3061 prompt "Kernel appended dtb support" if USE_OF
986 depends on CMDLINE != "" !! 3062 default MIPS_NO_APPENDED_DTB
987 default CMDLINE_FALLBACK <<
988 help <<
989 Choose how the kernel will handle th <<
990 line. <<
991 <<
992 config CMDLINE_FALLBACK <<
993 bool "Use bootloader kernel arguments <<
994 help <<
995 Use the built-in command line as fal <<
996 during boot. This is the default beh <<
997 <<
998 config CMDLINE_EXTEND <<
999 bool "Extend bootloader kernel argumen <<
1000 help <<
1001 The command-line arguments provided <<
1002 appended to the built-in command li <<
1003 cases where the provided arguments <<
1004 you don't want to or cannot modify <<
1005 <<
1006 config CMDLINE_FORCE <<
1007 bool "Always use the default kernel c <<
1008 help <<
1009 Always use the built-in command lin <<
1010 boot. This is useful in case you ne <<
1011 command line on systems where you d <<
1012 over it. <<
1013 3063
>> 3064 config MIPS_NO_APPENDED_DTB
>> 3065 bool "None"
>> 3066 help
>> 3067 Do not enable appended dtb support.
>> 3068
>> 3069 config MIPS_ELF_APPENDED_DTB
>> 3070 bool "vmlinux"
>> 3071 help
>> 3072 With this option, the boot code will look for a device tree binary
>> 3073 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 3074 it is empty and the DTB can be appended using binutils command
>> 3075 objcopy:
>> 3076
>> 3077 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 3078
>> 3079 This is meant as a backward compatiblity convenience for those
>> 3080 systems with a bootloader that can't be upgraded to accommodate
>> 3081 the documented boot protocol using a device tree.
>> 3082
>> 3083 config MIPS_RAW_APPENDED_DTB
>> 3084 bool "vmlinux.bin or vmlinuz.bin"
>> 3085 help
>> 3086 With this option, the boot code will look for a device tree binary
>> 3087 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 3088 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 3089
>> 3090 This is meant as a backward compatibility convenience for those
>> 3091 systems with a bootloader that can't be upgraded to accommodate
>> 3092 the documented boot protocol using a device tree.
>> 3093
>> 3094 Beware that there is very little in terms of protection against
>> 3095 this option being confused by leftover garbage in memory that might
>> 3096 look like a DTB header after a reboot if no actual DTB is appended
>> 3097 to vmlinux.bin. Do not leave this option active in a production kernel
>> 3098 if you don't intend to always append a DTB.
1014 endchoice 3099 endchoice
1015 3100
1016 config EFI_STUB !! 3101 choice
>> 3102 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
>> 3103 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 3104 !MACH_LOONGSON64 && !MIPS_MALTA && \
>> 3105 !CAVIUM_OCTEON_SOC
>> 3106 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 3107
>> 3108 config MIPS_CMDLINE_FROM_DTB
>> 3109 depends on USE_OF
>> 3110 bool "Dtb kernel arguments if available"
>> 3111
>> 3112 config MIPS_CMDLINE_DTB_EXTEND
>> 3113 depends on USE_OF
>> 3114 bool "Extend dtb kernel arguments with bootloader arguments"
>> 3115
>> 3116 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 3117 bool "Bootloader kernel arguments if available"
>> 3118
>> 3119 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3120 depends on CMDLINE_BOOL
>> 3121 bool "Extend builtin kernel arguments with bootloader arguments"
>> 3122 endchoice
>> 3123
>> 3124 endmenu
>> 3125
>> 3126 config LOCKDEP_SUPPORT
1017 bool 3127 bool
>> 3128 default y
1018 3129
1019 config EFI !! 3130 config STACKTRACE_SUPPORT
1020 bool "UEFI runtime support" !! 3131 bool
1021 depends on OF && !XIP_KERNEL !! 3132 default y
1022 depends on MMU <<
1023 default y <<
1024 select ARCH_SUPPORTS_ACPI if 64BIT <<
1025 select EFI_GENERIC_STUB <<
1026 select EFI_PARAMS_FROM_FDT <<
1027 select EFI_RUNTIME_WRAPPERS <<
1028 select EFI_STUB <<
1029 select LIBFDT <<
1030 select RISCV_ISA_C <<
1031 select UCS2_STRING <<
1032 help <<
1033 This option provides support for ru <<
1034 by UEFI firmware (such as non-volat <<
1035 clock, and platform reset). A UEFI <<
1036 allow the kernel to be booted as an <<
1037 is only useful on systems that have <<
1038 3133
1039 config DMI !! 3134 config PGTABLE_LEVELS
1040 bool "Enable support for SMBIOS (DMI) !! 3135 int
1041 depends on EFI !! 3136 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3137 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 3138 default 2
>> 3139
>> 3140 config MIPS_AUTO_PFN_OFFSET
>> 3141 bool
>> 3142
>> 3143 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 3144
>> 3145 config PCI_DRIVERS_GENERIC
>> 3146 select PCI_DOMAINS_GENERIC if PCI
>> 3147 bool
>> 3148
>> 3149 config PCI_DRIVERS_LEGACY
>> 3150 def_bool !PCI_DRIVERS_GENERIC
>> 3151 select NO_GENERIC_PCI_IOPORT_MAP
>> 3152 select PCI_DOMAINS if PCI
>> 3153
>> 3154 #
>> 3155 # ISA support is now enabled via select. Too many systems still have the one
>> 3156 # or other ISA chip on the board that users don't know about so don't expect
>> 3157 # users to choose the right thing ...
>> 3158 #
>> 3159 config ISA
>> 3160 bool
>> 3161
>> 3162 config TC
>> 3163 bool "TURBOchannel support"
>> 3164 depends on MACH_DECSTATION
>> 3165 help
>> 3166 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3167 processors. TURBOchannel programming specifications are available
>> 3168 at:
>> 3169 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3170 and:
>> 3171 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3172 Linux driver support status is documented at:
>> 3173 <http://www.linux-mips.org/wiki/DECstation>
>> 3174
>> 3175 config MMU
>> 3176 bool
1042 default y 3177 default y
1043 help <<
1044 This enables SMBIOS/DMI feature for <<
1045 3178
1046 This option is only useful on syste !! 3179 config ARCH_MMAP_RND_BITS_MIN
1047 However, even with this option, the !! 3180 default 12 if 64BIT
1048 continue to boot on existing non-UE !! 3181 default 8
1049 3182
1050 config CC_HAVE_STACKPROTECTOR_TLS !! 3183 config ARCH_MMAP_RND_BITS_MAX
1051 def_bool $(cc-option,-mstack-protecto !! 3184 default 18 if 64BIT
>> 3185 default 15
1052 3186
1053 config STACKPROTECTOR_PER_TASK !! 3187 config ARCH_MMAP_RND_COMPAT_BITS_MIN
1054 def_bool y !! 3188 default 8
1055 depends on !RANDSTRUCT <<
1056 depends on STACKPROTECTOR && CC_HAVE_ <<
1057 3189
1058 config PHYS_RAM_BASE_FIXED !! 3190 config ARCH_MMAP_RND_COMPAT_BITS_MAX
1059 bool "Explicitly specified physical R !! 3191 default 15
1060 depends on NONPORTABLE <<
1061 default n <<
1062 3192
1063 config PHYS_RAM_BASE !! 3193 config I8253
1064 hex "Platform Physical RAM address" !! 3194 bool
1065 depends on PHYS_RAM_BASE_FIXED !! 3195 select CLKSRC_I8253
1066 default "0x80000000" !! 3196 select CLKEVT_I8253
1067 help !! 3197 select MIPS_EXTERNAL_TIMER
1068 This is the physical address of RAM <<
1069 explicitly specified to run early r <<
1070 from flash to RAM. <<
1071 <<
1072 config XIP_KERNEL <<
1073 bool "Kernel Execute-In-Place from RO <<
1074 depends on MMU && SPARSEMEM && NONPOR <<
1075 # This prevents XIP from being enable <<
1076 # fail to build since XIP doesn't sup <<
1077 depends on !COMPILE_TEST <<
1078 select PHYS_RAM_BASE_FIXED <<
1079 help <<
1080 Execute-In-Place allows the kernel <<
1081 directly addressable by the CPU, su <<
1082 space since the text section of the <<
1083 to RAM. Read-write sections, such <<
1084 are still copied to RAM. The XIP k <<
1085 it has to run directly from flash, <<
1086 store it. The flash address used t <<
1087 and for storing it, is configuratio <<
1088 say Y here, you must know the prope <<
1089 store the kernel image depending on <<
1090 <<
1091 Also note that the make target beco <<
1092 "make zImage" or "make Image". The <<
1093 ROM memory will be arch/riscv/boot/ <<
1094 <<
1095 SPARSEMEM is required because the k <<
1096 flash resident are not backed by me <<
1097 a struct page on those regions will <<
1098 3198
1099 If unsure, say N. !! 3199 config ZONE_DMA
>> 3200 bool
1100 3201
1101 config XIP_PHYS_ADDR !! 3202 config ZONE_DMA32
1102 hex "XIP Kernel Physical Location" !! 3203 bool
1103 depends on XIP_KERNEL <<
1104 default "0x21000000" <<
1105 help <<
1106 This is the physical address in you <<
1107 be linked for and stored to. This <<
1108 own flash usage. <<
1109 <<
1110 config RISCV_ISA_FALLBACK <<
1111 bool "Permit falling back to parsing <<
1112 default y <<
1113 help <<
1114 Parsing the "riscv,isa" devicetree <<
1115 replaced by a list of explicitly de <<
1116 with existing platforms, the kernel <<
1117 "riscv,isa" property if the replace <<
1118 <<
1119 Selecting N here will result in a k <<
1120 fallback, unless the commandline "r <<
1121 present. <<
1122 <<
1123 Please see the dt-binding, located <<
1124 Documentation/devicetree/bindings/r <<
1125 on the replacement properties, "ris <<
1126 "riscv,isa-extensions". <<
1127 3204
1128 config BUILTIN_DTB !! 3205 endmenu
1129 bool "Built-in device tree" <<
1130 depends on OF && NONPORTABLE <<
1131 help <<
1132 Build a device tree into the Linux <<
1133 This option should be selected if n <<
1134 If unsure, say N. <<
1135 3206
>> 3207 config TRAD_SIGNALS
>> 3208 bool
1136 3209
1137 config BUILTIN_DTB_SOURCE !! 3210 config MIPS32_COMPAT
1138 string "Built-in device tree source" !! 3211 bool
1139 depends on BUILTIN_DTB <<
1140 help <<
1141 DTS file path (without suffix, rela <<
1142 for the DTS file that will be used <<
1143 kernel. <<
1144 3212
1145 endmenu # "Boot options" !! 3213 config COMPAT
>> 3214 bool
1146 3215
1147 config PORTABLE !! 3216 config SYSVIPC_COMPAT
1148 bool 3217 bool
1149 default !NONPORTABLE <<
1150 select EFI <<
1151 select MMU <<
1152 select OF <<
1153 3218
1154 config ARCH_PROC_KCORE_TEXT !! 3219 config MIPS32_O32
1155 def_bool y !! 3220 bool "Kernel support for o32 binaries"
>> 3221 depends on 64BIT
>> 3222 select ARCH_WANT_OLD_COMPAT_IPC
>> 3223 select COMPAT
>> 3224 select MIPS32_COMPAT
>> 3225 select SYSVIPC_COMPAT if SYSVIPC
>> 3226 help
>> 3227 Select this option if you want to run o32 binaries. These are pure
>> 3228 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3229 existing binaries are in this format.
1156 3230
1157 menu "Power management options" !! 3231 If unsure, say Y.
1158 3232
1159 source "kernel/power/Kconfig" !! 3233 config MIPS32_N32
>> 3234 bool "Kernel support for n32 binaries"
>> 3235 depends on 64BIT
>> 3236 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
>> 3237 select COMPAT
>> 3238 select MIPS32_COMPAT
>> 3239 select SYSVIPC_COMPAT if SYSVIPC
>> 3240 help
>> 3241 Select this option if you want to run n32 binaries. These are
>> 3242 64-bit binaries using 32-bit quantities for addressing and certain
>> 3243 data that would normally be 64-bit. They are used in special
>> 3244 cases.
>> 3245
>> 3246 If unsure, say N.
>> 3247
>> 3248 config BINFMT_ELF32
>> 3249 bool
>> 3250 default y if MIPS32_O32 || MIPS32_N32
>> 3251 select ELFCORE
>> 3252
>> 3253 menu "Power management options"
1160 3254
1161 config ARCH_HIBERNATION_POSSIBLE 3255 config ARCH_HIBERNATION_POSSIBLE
1162 def_bool y 3256 def_bool y
1163 !! 3257 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
1164 config ARCH_HIBERNATION_HEADER <<
1165 def_bool HIBERNATION <<
1166 3258
1167 config ARCH_SUSPEND_POSSIBLE 3259 config ARCH_SUSPEND_POSSIBLE
1168 def_bool y 3260 def_bool y
>> 3261 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3262
>> 3263 source "kernel/power/Kconfig"
1169 3264
1170 endmenu # "Power management options" !! 3265 endmenu
>> 3266
>> 3267 config MIPS_EXTERNAL_TIMER
>> 3268 bool
1171 3269
1172 menu "CPU Power Management" 3270 menu "CPU Power Management"
1173 3271
>> 3272 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3273 source "drivers/cpufreq/Kconfig"
>> 3274 endif
>> 3275
1174 source "drivers/cpuidle/Kconfig" 3276 source "drivers/cpuidle/Kconfig"
1175 3277
1176 source "drivers/cpufreq/Kconfig" !! 3278 endmenu
1177 3279
1178 endmenu # "CPU Power Management" !! 3280 source "drivers/firmware/Kconfig"
1179 3281
1180 source "arch/riscv/kvm/Kconfig" !! 3282 source "arch/mips/kvm/Kconfig"
1181 3283
1182 source "drivers/acpi/Kconfig" !! 3284 source "arch/mips/vdso/Kconfig"
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