1 # SPDX-License-Identifier: GPL-2.0-only !! 1 # SPDX-License-Identifier: GPL-2.0
2 # !! 2 config MIPS
3 # For a description of the syntax of this conf <<
4 # see Documentation/kbuild/kconfig-language.rs <<
5 # <<
6 <<
7 config 64BIT <<
8 bool <<
9 <<
10 config 32BIT <<
11 bool 3 bool
12 !! 4 default y
13 config RISCV !! 5 select ARCH_32BIT_OFF_T if !64BIT
14 def_bool y !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
15 select ACPI_GENERIC_GSI if ACPI !! 7 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
16 select ACPI_MCFG if (ACPI && PCI) !! 8 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
17 select ACPI_PPTT if ACPI <<
18 select ACPI_REDUCED_HARDWARE_ONLY if A <<
19 select ACPI_SPCR_TABLE if ACPI <<
20 select ARCH_DMA_DEFAULT_COHERENT <<
21 select ARCH_ENABLE_HUGEPAGE_MIGRATION <<
22 select ARCH_ENABLE_MEMORY_HOTPLUG if S <<
23 select ARCH_ENABLE_MEMORY_HOTREMOVE if <<
24 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if <<
25 select ARCH_ENABLE_THP_MIGRATION if TR <<
26 select ARCH_HAS_BINFMT_FLAT <<
27 select ARCH_HAS_CURRENT_STACK_POINTER <<
28 select ARCH_HAS_DEBUG_VIRTUAL if MMU <<
29 select ARCH_HAS_DEBUG_VM_PGTABLE <<
30 select ARCH_HAS_DEBUG_WX <<
31 select ARCH_HAS_FAST_MULTIPLIER <<
32 select ARCH_HAS_FORTIFY_SOURCE 9 select ARCH_HAS_FORTIFY_SOURCE
33 select ARCH_HAS_GCOV_PROFILE_ALL <<
34 select ARCH_HAS_GIGANTIC_PAGE <<
35 select ARCH_HAS_KCOV 10 select ARCH_HAS_KCOV
36 select ARCH_HAS_KERNEL_FPU_SUPPORT if !! 11 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
37 select ARCH_HAS_MEMBARRIER_CALLBACKS !! 12 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
38 select ARCH_HAS_MEMBARRIER_SYNC_CORE !! 13 select ARCH_HAS_STRNCPY_FROM_USER
39 select ARCH_HAS_MMIOWB !! 14 select ARCH_HAS_STRNLEN_USER
40 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
41 select ARCH_HAS_PMEM_API <<
42 select ARCH_HAS_PREPARE_SYNC_CORE_CMD <<
43 select ARCH_HAS_PTE_DEVMAP if 64BIT && <<
44 select ARCH_HAS_PTE_SPECIAL <<
45 select ARCH_HAS_SET_DIRECT_MAP if MMU <<
46 select ARCH_HAS_SET_MEMORY if MMU <<
47 select ARCH_HAS_STRICT_KERNEL_RWX if M <<
48 select ARCH_HAS_STRICT_MODULE_RWX if M <<
49 select ARCH_HAS_SYNC_CORE_BEFORE_USERM <<
50 select ARCH_HAS_SYSCALL_WRAPPER <<
51 select ARCH_HAS_TICK_BROADCAST if GENE 15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
52 select ARCH_HAS_UBSAN !! 16 select ARCH_HAS_UBSAN_SANITIZE_ALL
53 select ARCH_HAS_VDSO_DATA !! 17 select ARCH_HAS_GCOV_PROFILE_ALL
54 select ARCH_KEEP_MEMBLOCK if ACPI !! 18 select ARCH_KEEP_MEMBLOCK
55 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL !! 19 select ARCH_SUPPORTS_UPROBES
56 select ARCH_OPTIONAL_KERNEL_RWX if ARC !! 20 select ARCH_USE_BUILTIN_BSWAP
57 select ARCH_OPTIONAL_KERNEL_RWX_DEFAUL <<
58 select ARCH_STACKWALK <<
59 select ARCH_SUPPORTS_ATOMIC_RMW <<
60 select ARCH_SUPPORTS_CFI_CLANG <<
61 select ARCH_SUPPORTS_DEBUG_PAGEALLOC i <<
62 select ARCH_SUPPORTS_HUGETLBFS if MMU <<
63 # LLD >= 14: https://github.com/llvm/l <<
64 select ARCH_SUPPORTS_LTO_CLANG if LLD_ <<
65 select ARCH_SUPPORTS_LTO_CLANG_THIN if <<
66 select ARCH_SUPPORTS_PAGE_TABLE_CHECK <<
67 select ARCH_SUPPORTS_PER_VMA_LOCK if M <<
68 select ARCH_SUPPORTS_RT <<
69 select ARCH_SUPPORTS_SHADOW_CALL_STACK <<
70 select ARCH_USE_CMPXCHG_LOCKREF if 64B 21 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
71 select ARCH_USE_MEMTEST 22 select ARCH_USE_MEMTEST
72 select ARCH_USE_QUEUED_RWLOCKS 23 select ARCH_USE_QUEUED_RWLOCKS
73 select ARCH_USE_SYM_ANNOTATIONS !! 24 select ARCH_USE_QUEUED_SPINLOCKS
74 select ARCH_USES_CFI_TRAPS if CFI_CLAN !! 25 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
75 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU <<
76 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ 26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
77 select ARCH_WANT_FRAME_POINTERS !! 27 select ARCH_WANT_IPC_PARSE_VERSION
78 select ARCH_WANT_GENERAL_HUGETLB if !R !! 28 select ARCH_WANT_LD_ORPHAN_WARN
79 select ARCH_WANT_HUGE_PMD_SHARE if 64B !! 29 select BUILDTIME_TABLE_SORT
80 select ARCH_WANT_LD_ORPHAN_WARN if !XI <<
81 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
82 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM <<
83 select ARCH_WANTS_NO_INSTR <<
84 select ARCH_WANTS_THP_SWAP if HAVE_ARC <<
85 select BINFMT_FLAT_NO_DATA_START_OFFSE <<
86 select BUILDTIME_TABLE_SORT if MMU <<
87 select CLINT_TIMER if RISCV_M_MODE <<
88 select CLONE_BACKWARDS 30 select CLONE_BACKWARDS
89 select COMMON_CLK !! 31 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
90 select CPU_PM if CPU_IDLE || HIBERNATI !! 32 select CPU_PM if CPU_IDLE
91 select EDAC_SUPPORT <<
92 select FRAME_POINTER if PERF_EVENTS || <<
93 select FTRACE_MCOUNT_USE_PATCHABLE_FUN <<
94 select GENERIC_ARCH_TOPOLOGY <<
95 select GENERIC_ATOMIC64 if !64BIT 33 select GENERIC_ATOMIC64 if !64BIT
96 select GENERIC_CLOCKEVENTS_BROADCAST i !! 34 select GENERIC_CMOS_UPDATE
97 select GENERIC_CPU_DEVICES !! 35 select GENERIC_CPU_AUTOPROBE
98 select GENERIC_CPU_VULNERABILITIES !! 36 select GENERIC_GETTIMEOFDAY
99 select GENERIC_EARLY_IOREMAP !! 37 select GENERIC_IOMAP
100 select GENERIC_ENTRY !! 38 select GENERIC_IRQ_PROBE
101 select GENERIC_GETTIMEOFDAY if HAVE_GE <<
102 select GENERIC_IDLE_POLL_SETUP <<
103 select GENERIC_IOREMAP if MMU <<
104 select GENERIC_IRQ_IPI if SMP <<
105 select GENERIC_IRQ_IPI_MUX if SMP <<
106 select GENERIC_IRQ_MULTI_HANDLER <<
107 select GENERIC_IRQ_SHOW 39 select GENERIC_IRQ_SHOW
108 select GENERIC_IRQ_SHOW_LEVEL !! 40 select GENERIC_ISA_DMA if EISA
109 select GENERIC_LIB_DEVMEM_IS_ALLOWED !! 41 select GENERIC_LIB_ASHLDI3
110 select GENERIC_PCI_IOMAP !! 42 select GENERIC_LIB_ASHRDI3
111 select GENERIC_PTDUMP if MMU !! 43 select GENERIC_LIB_CMPDI2
112 select GENERIC_SCHED_CLOCK !! 44 select GENERIC_LIB_LSHRDI3
>> 45 select GENERIC_LIB_UCMPDI2
>> 46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
113 select GENERIC_SMP_IDLE_THREAD 47 select GENERIC_SMP_IDLE_THREAD
114 select GENERIC_TIME_VSYSCALL if MMU && !! 48 select GENERIC_TIME_VSYSCALL
115 select GENERIC_VDSO_TIME_NS if HAVE_GE !! 49 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
116 select HARDIRQS_SW_RESEND !! 50 select HAVE_ARCH_COMPILER_H
117 select HAS_IOPORT if MMU !! 51 select HAVE_ARCH_JUMP_LABEL
118 select HAVE_ARCH_AUDITSYSCALL !! 52 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
119 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ <<
120 select HAVE_ARCH_HUGE_VMAP if MMU && 6 <<
121 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
122 select HAVE_ARCH_JUMP_LABEL_RELATIVE i <<
123 select HAVE_ARCH_KASAN if MMU && 64BIT <<
124 select HAVE_ARCH_KASAN_VMALLOC if MMU <<
125 select HAVE_ARCH_KFENCE if MMU && 64BI <<
126 select HAVE_ARCH_KGDB if !XIP_KERNEL <<
127 select HAVE_ARCH_KGDB_QXFER_PKT <<
128 select HAVE_ARCH_MMAP_RND_BITS if MMU 53 select HAVE_ARCH_MMAP_RND_BITS if MMU
129 select HAVE_ARCH_MMAP_RND_COMPAT_BITS !! 54 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
130 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
131 select HAVE_ARCH_SECCOMP_FILTER 55 select HAVE_ARCH_SECCOMP_FILTER
132 select HAVE_ARCH_STACKLEAK <<
133 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
134 select HAVE_ARCH_TRACEHOOK 56 select HAVE_ARCH_TRACEHOOK
135 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 57 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
136 select HAVE_ARCH_USERFAULTFD_MINOR if <<
137 select HAVE_ARCH_VMAP_STACK if MMU && <<
138 select HAVE_ASM_MODVERSIONS 58 select HAVE_ASM_MODVERSIONS
139 select HAVE_CONTEXT_TRACKING_USER 59 select HAVE_CONTEXT_TRACKING_USER
>> 60 select HAVE_TIF_NOHZ
>> 61 select HAVE_C_RECORDMCOUNT
140 select HAVE_DEBUG_KMEMLEAK 62 select HAVE_DEBUG_KMEMLEAK
141 select HAVE_DMA_CONTIGUOUS if MMU !! 63 select HAVE_DEBUG_STACKOVERFLOW
142 select HAVE_DYNAMIC_FTRACE if !XIP_KER !! 64 select HAVE_DMA_CONTIGUOUS
143 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT !! 65 select HAVE_DYNAMIC_FTRACE
144 select HAVE_DYNAMIC_FTRACE_WITH_ARGS i !! 66 select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
145 select HAVE_FTRACE_MCOUNT_RECORD if !X !! 67 !CPU_DADDI_WORKAROUNDS && \
>> 68 !CPU_R4000_WORKAROUNDS && \
>> 69 !CPU_R4400_WORKAROUNDS
>> 70 select HAVE_EXIT_THREAD
>> 71 select HAVE_FAST_GUP
>> 72 select HAVE_FTRACE_MCOUNT_RECORD
146 select HAVE_FUNCTION_GRAPH_TRACER 73 select HAVE_FUNCTION_GRAPH_TRACER
147 select HAVE_FUNCTION_GRAPH_RETVAL if H !! 74 select HAVE_FUNCTION_TRACER
148 select HAVE_FUNCTION_TRACER if !XIP_KE <<
149 select HAVE_EBPF_JIT if MMU <<
150 select HAVE_GUP_FAST if MMU <<
151 select HAVE_FUNCTION_ARG_ACCESS_API <<
152 select HAVE_FUNCTION_ERROR_INJECTION <<
153 select HAVE_GCC_PLUGINS 75 select HAVE_GCC_PLUGINS
154 select HAVE_GENERIC_VDSO if MMU && 64B !! 76 select HAVE_GENERIC_VDSO
>> 77 select HAVE_IOREMAP_PROT
>> 78 select HAVE_IRQ_EXIT_ON_IRQ_STACK
155 select HAVE_IRQ_TIME_ACCOUNTING 79 select HAVE_IRQ_TIME_ACCOUNTING
156 select HAVE_KERNEL_BZIP2 if !XIP_KERNE !! 80 select HAVE_KPROBES
157 select HAVE_KERNEL_GZIP if !XIP_KERNEL !! 81 select HAVE_KRETPROBES
158 select HAVE_KERNEL_LZ4 if !XIP_KERNEL !! 82 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
159 select HAVE_KERNEL_LZMA if !XIP_KERNEL !! 83 select HAVE_MOD_ARCH_SPECIFIC
160 select HAVE_KERNEL_LZO if !XIP_KERNEL !! 84 select HAVE_NMI
161 select HAVE_KERNEL_UNCOMPRESSED if !XI !! 85 select HAVE_PATA_PLATFORM
162 select HAVE_KERNEL_ZSTD if !XIP_KERNEL <<
163 select HAVE_KERNEL_XZ if !XIP_KERNEL & <<
164 select HAVE_KPROBES if !XIP_KERNEL <<
165 select HAVE_KRETPROBES if !XIP_KERNEL <<
166 # https://github.com/ClangBuiltLinux/l <<
167 select HAVE_LD_DEAD_CODE_DATA_ELIMINAT <<
168 select HAVE_MOVE_PMD <<
169 select HAVE_MOVE_PUD <<
170 select HAVE_PAGE_SIZE_4KB <<
171 select HAVE_PCI <<
172 select HAVE_PERF_EVENTS 86 select HAVE_PERF_EVENTS
173 select HAVE_PERF_REGS 87 select HAVE_PERF_REGS
174 select HAVE_PERF_USER_STACK_DUMP 88 select HAVE_PERF_USER_STACK_DUMP
175 select HAVE_POSIX_CPU_TIMERS_TASK_WORK <<
176 select HAVE_PREEMPT_DYNAMIC_KEY if !XI <<
177 select HAVE_REGS_AND_STACK_ACCESS_API 89 select HAVE_REGS_AND_STACK_ACCESS_API
178 select HAVE_RETHOOK if !XIP_KERNEL <<
179 select HAVE_RSEQ 90 select HAVE_RSEQ
180 select HAVE_RUST if RUSTC_SUPPORTS_RIS !! 91 select HAVE_SPARSE_SYSCALL_NR
181 select HAVE_SAMPLE_FTRACE_DIRECT <<
182 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI <<
183 select HAVE_STACKPROTECTOR 92 select HAVE_STACKPROTECTOR
184 select HAVE_SYSCALL_TRACEPOINTS 93 select HAVE_SYSCALL_TRACEPOINTS
185 select HOTPLUG_CORE_SYNC_DEAD if HOTPL !! 94 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
186 select IRQ_DOMAIN <<
187 select IRQ_FORCED_THREADING 95 select IRQ_FORCED_THREADING
188 select KASAN_VMALLOC if KASAN !! 96 select ISA if EISA
189 select LOCK_MM_AND_FIND_VMA 97 select LOCK_MM_AND_FIND_VMA
190 select MMU_GATHER_RCU_TABLE_FREE if SM !! 98 select MODULES_USE_ELF_REL if MODULES
191 select MODULES_USE_ELF_RELA if MODULES !! 99 select MODULES_USE_ELF_RELA if MODULES && 64BIT
192 select OF !! 100 select PERF_USE_VMALLOC
193 select OF_EARLY_FLATTREE !! 101 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
194 select OF_IRQ !! 102 select RTC_LIB
195 select PCI_DOMAINS_GENERIC if PCI <<
196 select PCI_ECAM if (ACPI && PCI) <<
197 select PCI_MSI if PCI <<
198 select RISCV_ALTERNATIVE if !XIP_KERNE <<
199 select RISCV_APLIC <<
200 select RISCV_IMSIC <<
201 select RISCV_INTC <<
202 select RISCV_TIMER if RISCV_SBI <<
203 select SIFIVE_PLIC <<
204 select SPARSE_IRQ <<
205 select SYSCTL_EXCEPTION_TRACE 103 select SYSCTL_EXCEPTION_TRACE
206 select THREAD_INFO_IN_TASK <<
207 select TRACE_IRQFLAGS_SUPPORT 104 select TRACE_IRQFLAGS_SUPPORT
208 select UACCESS_MEMCPY if !MMU !! 105 select ARCH_HAS_ELFCORE_COMPAT
209 select USER_STACKTRACE_SUPPORT !! 106 select HAVE_ARCH_KCSAN if 64BIT
>> 107
>> 108 config MIPS_FIXUP_BIGPHYS_ADDR
>> 109 bool
>> 110
>> 111 config MIPS_GENERIC
>> 112 bool
>> 113
>> 114 config MACH_INGENIC
>> 115 bool
>> 116 select SYS_SUPPORTS_32BIT_KERNEL
>> 117 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 118 select SYS_SUPPORTS_ZBOOT
>> 119 select DMA_NONCOHERENT
>> 120 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 121 select IRQ_MIPS_CPU
>> 122 select PINCTRL
>> 123 select GPIOLIB
>> 124 select COMMON_CLK
>> 125 select GENERIC_IRQ_CHIP
>> 126 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 127 select USE_OF
>> 128 select CPU_SUPPORTS_CPUFREQ
>> 129 select MIPS_EXTERNAL_TIMER
>> 130
>> 131 menu "Machine selection"
>> 132
>> 133 choice
>> 134 prompt "System type"
>> 135 default MIPS_GENERIC_KERNEL
>> 136
>> 137 config MIPS_GENERIC_KERNEL
>> 138 bool "Generic board-agnostic MIPS kernel"
>> 139 select ARCH_HAS_SETUP_DMA_OPS
>> 140 select MIPS_GENERIC
>> 141 select BOOT_RAW
>> 142 select BUILTIN_DTB
>> 143 select CEVT_R4K
>> 144 select CLKSRC_MIPS_GIC
>> 145 select COMMON_CLK
>> 146 select CPU_MIPSR2_IRQ_EI
>> 147 select CPU_MIPSR2_IRQ_VI
>> 148 select CSRC_R4K
>> 149 select DMA_NONCOHERENT
>> 150 select HAVE_PCI
>> 151 select IRQ_MIPS_CPU
>> 152 select MIPS_AUTO_PFN_OFFSET
>> 153 select MIPS_CPU_SCACHE
>> 154 select MIPS_GIC
>> 155 select MIPS_L1_CACHE_SHIFT_7
>> 156 select NO_EXCEPT_FILL
>> 157 select PCI_DRIVERS_GENERIC
>> 158 select SMP_UP if SMP
>> 159 select SWAP_IO_SPACE
>> 160 select SYS_HAS_CPU_MIPS32_R1
>> 161 select SYS_HAS_CPU_MIPS32_R2
>> 162 select SYS_HAS_CPU_MIPS32_R6
>> 163 select SYS_HAS_CPU_MIPS64_R1
>> 164 select SYS_HAS_CPU_MIPS64_R2
>> 165 select SYS_HAS_CPU_MIPS64_R6
>> 166 select SYS_SUPPORTS_32BIT_KERNEL
>> 167 select SYS_SUPPORTS_64BIT_KERNEL
>> 168 select SYS_SUPPORTS_BIG_ENDIAN
>> 169 select SYS_SUPPORTS_HIGHMEM
>> 170 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 171 select SYS_SUPPORTS_MICROMIPS
>> 172 select SYS_SUPPORTS_MIPS16
>> 173 select SYS_SUPPORTS_MIPS_CPS
>> 174 select SYS_SUPPORTS_MULTITHREADING
>> 175 select SYS_SUPPORTS_RELOCATABLE
>> 176 select SYS_SUPPORTS_SMARTMIPS
>> 177 select SYS_SUPPORTS_ZBOOT
>> 178 select UHI_BOOT
>> 179 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 180 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 181 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 182 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 183 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 184 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 185 select USE_OF
>> 186 help
>> 187 Select this to build a kernel which aims to support multiple boards,
>> 188 generally using a flattened device tree passed from the bootloader
>> 189 using the boot protocol defined in the UHI (Unified Hosting
>> 190 Interface) specification.
>> 191
>> 192 config MIPS_ALCHEMY
>> 193 bool "Alchemy processor based machines"
>> 194 select PHYS_ADDR_T_64BIT
>> 195 select CEVT_R4K
>> 196 select CSRC_R4K
>> 197 select IRQ_MIPS_CPU
>> 198 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
>> 199 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
>> 200 select SYS_HAS_CPU_MIPS32_R1
>> 201 select SYS_SUPPORTS_32BIT_KERNEL
>> 202 select SYS_SUPPORTS_APM_EMULATION
>> 203 select GPIOLIB
>> 204 select SYS_SUPPORTS_ZBOOT
>> 205 select COMMON_CLK
>> 206
>> 207 config AR7
>> 208 bool "Texas Instruments AR7"
>> 209 select BOOT_ELF32
>> 210 select COMMON_CLK
>> 211 select DMA_NONCOHERENT
>> 212 select CEVT_R4K
>> 213 select CSRC_R4K
>> 214 select IRQ_MIPS_CPU
>> 215 select NO_EXCEPT_FILL
>> 216 select SWAP_IO_SPACE
>> 217 select SYS_HAS_CPU_MIPS32_R1
>> 218 select SYS_HAS_EARLY_PRINTK
>> 219 select SYS_SUPPORTS_32BIT_KERNEL
>> 220 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 221 select SYS_SUPPORTS_MIPS16
>> 222 select SYS_SUPPORTS_ZBOOT_UART16550
>> 223 select GPIOLIB
>> 224 select VLYNQ
>> 225 help
>> 226 Support for the Texas Instruments AR7 System-on-a-Chip
>> 227 family: TNETD7100, 7200 and 7300.
>> 228
>> 229 config ATH25
>> 230 bool "Atheros AR231x/AR531x SoC support"
>> 231 select CEVT_R4K
>> 232 select CSRC_R4K
>> 233 select DMA_NONCOHERENT
>> 234 select IRQ_MIPS_CPU
>> 235 select IRQ_DOMAIN
>> 236 select SYS_HAS_CPU_MIPS32_R1
>> 237 select SYS_SUPPORTS_BIG_ENDIAN
>> 238 select SYS_SUPPORTS_32BIT_KERNEL
>> 239 select SYS_HAS_EARLY_PRINTK
>> 240 help
>> 241 Support for Atheros AR231x and Atheros AR531x based boards
>> 242
>> 243 config ATH79
>> 244 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 245 select ARCH_HAS_RESET_CONTROLLER
>> 246 select BOOT_RAW
>> 247 select CEVT_R4K
>> 248 select CSRC_R4K
>> 249 select DMA_NONCOHERENT
>> 250 select GPIOLIB
>> 251 select PINCTRL
>> 252 select COMMON_CLK
>> 253 select IRQ_MIPS_CPU
>> 254 select SYS_HAS_CPU_MIPS32_R2
>> 255 select SYS_HAS_EARLY_PRINTK
>> 256 select SYS_SUPPORTS_32BIT_KERNEL
>> 257 select SYS_SUPPORTS_BIG_ENDIAN
>> 258 select SYS_SUPPORTS_MIPS16
>> 259 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 260 select USE_OF
>> 261 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 262 help
>> 263 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 264
>> 265 config BMIPS_GENERIC
>> 266 bool "Broadcom Generic BMIPS kernel"
>> 267 select ARCH_HAS_RESET_CONTROLLER
>> 268 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 269 select BOOT_RAW
>> 270 select NO_EXCEPT_FILL
>> 271 select USE_OF
>> 272 select CEVT_R4K
>> 273 select CSRC_R4K
>> 274 select SYNC_R4K
>> 275 select COMMON_CLK
>> 276 select BCM6345_L1_IRQ
>> 277 select BCM7038_L1_IRQ
>> 278 select BCM7120_L2_IRQ
>> 279 select BRCMSTB_L2_IRQ
>> 280 select IRQ_MIPS_CPU
>> 281 select DMA_NONCOHERENT
>> 282 select SYS_SUPPORTS_32BIT_KERNEL
>> 283 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 284 select SYS_SUPPORTS_BIG_ENDIAN
>> 285 select SYS_SUPPORTS_HIGHMEM
>> 286 select SYS_HAS_CPU_BMIPS32_3300
>> 287 select SYS_HAS_CPU_BMIPS4350
>> 288 select SYS_HAS_CPU_BMIPS4380
>> 289 select SYS_HAS_CPU_BMIPS5000
>> 290 select SWAP_IO_SPACE
>> 291 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 292 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 293 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 294 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 295 select HARDIRQS_SW_RESEND
>> 296 select HAVE_PCI
>> 297 select PCI_DRIVERS_GENERIC
>> 298 select FW_CFE
>> 299 help
>> 300 Build a generic DT-based kernel image that boots on select
>> 301 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 302 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 303 must be set appropriately for your board.
>> 304
>> 305 config BCM47XX
>> 306 bool "Broadcom BCM47XX based boards"
>> 307 select BOOT_RAW
>> 308 select CEVT_R4K
>> 309 select CSRC_R4K
>> 310 select DMA_NONCOHERENT
>> 311 select HAVE_PCI
>> 312 select IRQ_MIPS_CPU
>> 313 select SYS_HAS_CPU_MIPS32_R1
>> 314 select NO_EXCEPT_FILL
>> 315 select SYS_SUPPORTS_32BIT_KERNEL
>> 316 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 317 select SYS_SUPPORTS_MIPS16
>> 318 select SYS_SUPPORTS_ZBOOT
>> 319 select SYS_HAS_EARLY_PRINTK
>> 320 select USE_GENERIC_EARLY_PRINTK_8250
>> 321 select GPIOLIB
>> 322 select LEDS_GPIO_REGISTER
>> 323 select BCM47XX_NVRAM
>> 324 select BCM47XX_SPROM
>> 325 select BCM47XX_SSB if !BCM47XX_BCMA
>> 326 help
>> 327 Support for BCM47XX based boards
>> 328
>> 329 config BCM63XX
>> 330 bool "Broadcom BCM63XX based boards"
>> 331 select BOOT_RAW
>> 332 select CEVT_R4K
>> 333 select CSRC_R4K
>> 334 select SYNC_R4K
>> 335 select DMA_NONCOHERENT
>> 336 select IRQ_MIPS_CPU
>> 337 select SYS_SUPPORTS_32BIT_KERNEL
>> 338 select SYS_SUPPORTS_BIG_ENDIAN
>> 339 select SYS_HAS_EARLY_PRINTK
>> 340 select SYS_HAS_CPU_BMIPS32_3300
>> 341 select SYS_HAS_CPU_BMIPS4350
>> 342 select SYS_HAS_CPU_BMIPS4380
>> 343 select SWAP_IO_SPACE
>> 344 select GPIOLIB
>> 345 select MIPS_L1_CACHE_SHIFT_4
>> 346 select HAVE_LEGACY_CLK
>> 347 help
>> 348 Support for BCM63XX based boards
>> 349
>> 350 config MIPS_COBALT
>> 351 bool "Cobalt Server"
>> 352 select CEVT_R4K
>> 353 select CSRC_R4K
>> 354 select CEVT_GT641XX
>> 355 select DMA_NONCOHERENT
>> 356 select FORCE_PCI
>> 357 select I8253
>> 358 select I8259
>> 359 select IRQ_MIPS_CPU
>> 360 select IRQ_GT641XX
>> 361 select PCI_GT64XXX_PCI0
>> 362 select SYS_HAS_CPU_NEVADA
>> 363 select SYS_HAS_EARLY_PRINTK
>> 364 select SYS_SUPPORTS_32BIT_KERNEL
>> 365 select SYS_SUPPORTS_64BIT_KERNEL
>> 366 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 367 select USE_GENERIC_EARLY_PRINTK_8250
>> 368
>> 369 config MACH_DECSTATION
>> 370 bool "DECstations"
>> 371 select BOOT_ELF32
>> 372 select CEVT_DS1287
>> 373 select CEVT_R4K if CPU_R4X00
>> 374 select CSRC_IOASIC
>> 375 select CSRC_R4K if CPU_R4X00
>> 376 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 377 select CPU_R4000_WORKAROUNDS if 64BIT
>> 378 select CPU_R4400_WORKAROUNDS if 64BIT
>> 379 select DMA_NONCOHERENT
>> 380 select NO_IOPORT_MAP
>> 381 select IRQ_MIPS_CPU
>> 382 select SYS_HAS_CPU_R3000
>> 383 select SYS_HAS_CPU_R4X00
>> 384 select SYS_SUPPORTS_32BIT_KERNEL
>> 385 select SYS_SUPPORTS_64BIT_KERNEL
>> 386 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 387 select SYS_SUPPORTS_128HZ
>> 388 select SYS_SUPPORTS_256HZ
>> 389 select SYS_SUPPORTS_1024HZ
>> 390 select MIPS_L1_CACHE_SHIFT_4
>> 391 help
>> 392 This enables support for DEC's MIPS based workstations. For details
>> 393 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 394 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 395
>> 396 If you have one of the following DECstation Models you definitely
>> 397 want to choose R4xx0 for the CPU Type:
>> 398
>> 399 DECstation 5000/50
>> 400 DECstation 5000/150
>> 401 DECstation 5000/260
>> 402 DECsystem 5900/260
>> 403
>> 404 otherwise choose R3000.
>> 405
>> 406 config MACH_JAZZ
>> 407 bool "Jazz family of machines"
>> 408 select ARC_MEMORY
>> 409 select ARC_PROMLIB
>> 410 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 411 select ARCH_MIGHT_HAVE_PC_SERIO
>> 412 select DMA_OPS
>> 413 select FW_ARC
>> 414 select FW_ARC32
>> 415 select ARCH_MAY_HAVE_PC_FDC
>> 416 select CEVT_R4K
>> 417 select CSRC_R4K
>> 418 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 419 select GENERIC_ISA_DMA
>> 420 select HAVE_PCSPKR_PLATFORM
>> 421 select IRQ_MIPS_CPU
>> 422 select I8253
>> 423 select I8259
>> 424 select ISA
>> 425 select SYS_HAS_CPU_R4X00
>> 426 select SYS_SUPPORTS_32BIT_KERNEL
>> 427 select SYS_SUPPORTS_64BIT_KERNEL
>> 428 select SYS_SUPPORTS_100HZ
>> 429 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 430 help
>> 431 This a family of machines based on the MIPS R4030 chipset which was
>> 432 used by several vendors to build RISC/os and Windows NT workstations.
>> 433 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 434 Olivetti M700-10 workstations.
>> 435
>> 436 config MACH_INGENIC_SOC
>> 437 bool "Ingenic SoC based machines"
>> 438 select MIPS_GENERIC
>> 439 select MACH_INGENIC
>> 440 select SYS_SUPPORTS_ZBOOT_UART16550
>> 441 select CPU_SUPPORTS_CPUFREQ
>> 442 select MIPS_EXTERNAL_TIMER
>> 443
>> 444 config LANTIQ
>> 445 bool "Lantiq based platforms"
>> 446 select DMA_NONCOHERENT
>> 447 select IRQ_MIPS_CPU
>> 448 select CEVT_R4K
>> 449 select CSRC_R4K
>> 450 select NO_EXCEPT_FILL
>> 451 select SYS_HAS_CPU_MIPS32_R1
>> 452 select SYS_HAS_CPU_MIPS32_R2
>> 453 select SYS_SUPPORTS_BIG_ENDIAN
>> 454 select SYS_SUPPORTS_32BIT_KERNEL
>> 455 select SYS_SUPPORTS_MIPS16
>> 456 select SYS_SUPPORTS_MULTITHREADING
>> 457 select SYS_SUPPORTS_VPE_LOADER
>> 458 select SYS_HAS_EARLY_PRINTK
>> 459 select GPIOLIB
>> 460 select SWAP_IO_SPACE
>> 461 select BOOT_RAW
>> 462 select HAVE_LEGACY_CLK
>> 463 select USE_OF
>> 464 select PINCTRL
>> 465 select PINCTRL_LANTIQ
>> 466 select ARCH_HAS_RESET_CONTROLLER
>> 467 select RESET_CONTROLLER
>> 468
>> 469 config MACH_LOONGSON32
>> 470 bool "Loongson 32-bit family of machines"
>> 471 select SYS_SUPPORTS_ZBOOT
>> 472 help
>> 473 This enables support for the Loongson-1 family of machines.
>> 474
>> 475 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 476 the Institute of Computing Technology (ICT), Chinese Academy of
>> 477 Sciences (CAS).
>> 478
>> 479 config MACH_LOONGSON2EF
>> 480 bool "Loongson-2E/F family of machines"
>> 481 select SYS_SUPPORTS_ZBOOT
>> 482 help
>> 483 This enables the support of early Loongson-2E/F family of machines.
>> 484
>> 485 config MACH_LOONGSON64
>> 486 bool "Loongson 64-bit family of machines"
>> 487 select ARCH_SPARSEMEM_ENABLE
>> 488 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 489 select ARCH_MIGHT_HAVE_PC_SERIO
>> 490 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 491 select BOOT_ELF32
>> 492 select BOARD_SCACHE
>> 493 select CSRC_R4K
>> 494 select CEVT_R4K
>> 495 select CPU_HAS_WB
>> 496 select FORCE_PCI
>> 497 select ISA
>> 498 select I8259
>> 499 select IRQ_MIPS_CPU
>> 500 select NO_EXCEPT_FILL
>> 501 select NR_CPUS_DEFAULT_64
>> 502 select USE_GENERIC_EARLY_PRINTK_8250
>> 503 select PCI_DRIVERS_GENERIC
>> 504 select SYS_HAS_CPU_LOONGSON64
>> 505 select SYS_HAS_EARLY_PRINTK
>> 506 select SYS_SUPPORTS_SMP
>> 507 select SYS_SUPPORTS_HOTPLUG_CPU
>> 508 select SYS_SUPPORTS_NUMA
>> 509 select SYS_SUPPORTS_64BIT_KERNEL
>> 510 select SYS_SUPPORTS_HIGHMEM
>> 511 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 512 select SYS_SUPPORTS_ZBOOT
>> 513 select SYS_SUPPORTS_RELOCATABLE
>> 514 select ZONE_DMA32
>> 515 select COMMON_CLK
>> 516 select USE_OF
>> 517 select BUILTIN_DTB
>> 518 select PCI_HOST_GENERIC
>> 519 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
>> 520 help
>> 521 This enables the support of Loongson-2/3 family of machines.
>> 522
>> 523 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
>> 524 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
>> 525 and Loongson-2F which will be removed), developed by the Institute
>> 526 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
>> 527
>> 528 config MIPS_MALTA
>> 529 bool "MIPS Malta board"
>> 530 select ARCH_MAY_HAVE_PC_FDC
>> 531 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 532 select ARCH_MIGHT_HAVE_PC_SERIO
>> 533 select BOOT_ELF32
>> 534 select BOOT_RAW
>> 535 select BUILTIN_DTB
>> 536 select CEVT_R4K
>> 537 select CLKSRC_MIPS_GIC
>> 538 select COMMON_CLK
>> 539 select CSRC_R4K
>> 540 select DMA_NONCOHERENT
>> 541 select GENERIC_ISA_DMA
>> 542 select HAVE_PCSPKR_PLATFORM
>> 543 select HAVE_PCI
>> 544 select I8253
>> 545 select I8259
>> 546 select IRQ_MIPS_CPU
>> 547 select MIPS_BONITO64
>> 548 select MIPS_CPU_SCACHE
>> 549 select MIPS_GIC
>> 550 select MIPS_L1_CACHE_SHIFT_6
>> 551 select MIPS_MSC
>> 552 select PCI_GT64XXX_PCI0
>> 553 select SMP_UP if SMP
>> 554 select SWAP_IO_SPACE
>> 555 select SYS_HAS_CPU_MIPS32_R1
>> 556 select SYS_HAS_CPU_MIPS32_R2
>> 557 select SYS_HAS_CPU_MIPS32_R3_5
>> 558 select SYS_HAS_CPU_MIPS32_R5
>> 559 select SYS_HAS_CPU_MIPS32_R6
>> 560 select SYS_HAS_CPU_MIPS64_R1
>> 561 select SYS_HAS_CPU_MIPS64_R2
>> 562 select SYS_HAS_CPU_MIPS64_R6
>> 563 select SYS_HAS_CPU_NEVADA
>> 564 select SYS_HAS_CPU_RM7000
>> 565 select SYS_SUPPORTS_32BIT_KERNEL
>> 566 select SYS_SUPPORTS_64BIT_KERNEL
>> 567 select SYS_SUPPORTS_BIG_ENDIAN
>> 568 select SYS_SUPPORTS_HIGHMEM
>> 569 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 570 select SYS_SUPPORTS_MICROMIPS
>> 571 select SYS_SUPPORTS_MIPS16
>> 572 select SYS_SUPPORTS_MIPS_CMP
>> 573 select SYS_SUPPORTS_MIPS_CPS
>> 574 select SYS_SUPPORTS_MULTITHREADING
>> 575 select SYS_SUPPORTS_RELOCATABLE
>> 576 select SYS_SUPPORTS_SMARTMIPS
>> 577 select SYS_SUPPORTS_VPE_LOADER
>> 578 select SYS_SUPPORTS_ZBOOT
>> 579 select USE_OF
>> 580 select WAR_ICACHE_REFILLS
210 select ZONE_DMA32 if 64BIT 581 select ZONE_DMA32 if 64BIT
>> 582 help
>> 583 This enables support for the MIPS Technologies Malta evaluation
>> 584 board.
211 585
212 config RUSTC_SUPPORTS_RISCV !! 586 config MACH_PIC32
213 def_bool y !! 587 bool "Microchip PIC32 Family"
214 depends on 64BIT !! 588 help
215 # Shadow call stack requires rustc ver !! 589 This enables support for the Microchip PIC32 family of platforms.
216 # -Zsanitizer=shadow-call-stack flag. <<
217 depends on !SHADOW_CALL_STACK || RUSTC <<
218 <<
219 config CLANG_SUPPORTS_DYNAMIC_FTRACE <<
220 def_bool CC_IS_CLANG <<
221 # https://github.com/ClangBuiltLinux/l <<
222 depends on AS_IS_GNU || (AS_IS_LLVM && <<
223 <<
224 config GCC_SUPPORTS_DYNAMIC_FTRACE <<
225 def_bool CC_IS_GCC <<
226 depends on $(cc-option,-fpatchable-fun <<
227 <<
228 config HAVE_SHADOW_CALL_STACK <<
229 def_bool $(cc-option,-fsanitize=shadow <<
230 # https://github.com/riscv-non-isa/ris <<
231 depends on $(ld-option,--no-relax-gp) <<
232 590
233 config RISCV_USE_LINKER_RELAXATION !! 591 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
234 def_bool y !! 592 microcontrollers.
235 # https://github.com/llvm/llvm-project !! 593
236 depends on !LD_IS_LLD || LLD_VERSION > !! 594 config MACH_NINTENDO64
>> 595 bool "Nintendo 64 console"
>> 596 select CEVT_R4K
>> 597 select CSRC_R4K
>> 598 select SYS_HAS_CPU_R4300
>> 599 select SYS_SUPPORTS_BIG_ENDIAN
>> 600 select SYS_SUPPORTS_ZBOOT
>> 601 select SYS_SUPPORTS_32BIT_KERNEL
>> 602 select SYS_SUPPORTS_64BIT_KERNEL
>> 603 select DMA_NONCOHERENT
>> 604 select IRQ_MIPS_CPU
>> 605
>> 606 config RALINK
>> 607 bool "Ralink based machines"
>> 608 select CEVT_R4K
>> 609 select COMMON_CLK
>> 610 select CSRC_R4K
>> 611 select BOOT_RAW
>> 612 select DMA_NONCOHERENT
>> 613 select IRQ_MIPS_CPU
>> 614 select USE_OF
>> 615 select SYS_HAS_CPU_MIPS32_R2
>> 616 select SYS_SUPPORTS_32BIT_KERNEL
>> 617 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 618 select SYS_SUPPORTS_MIPS16
>> 619 select SYS_SUPPORTS_ZBOOT
>> 620 select SYS_HAS_EARLY_PRINTK
>> 621 select ARCH_HAS_RESET_CONTROLLER
>> 622 select RESET_CONTROLLER
>> 623
>> 624 config MACH_REALTEK_RTL
>> 625 bool "Realtek RTL838x/RTL839x based machines"
>> 626 select MIPS_GENERIC
>> 627 select DMA_NONCOHERENT
>> 628 select IRQ_MIPS_CPU
>> 629 select CSRC_R4K
>> 630 select CEVT_R4K
>> 631 select SYS_HAS_CPU_MIPS32_R1
>> 632 select SYS_HAS_CPU_MIPS32_R2
>> 633 select SYS_SUPPORTS_BIG_ENDIAN
>> 634 select SYS_SUPPORTS_32BIT_KERNEL
>> 635 select SYS_SUPPORTS_MIPS16
>> 636 select SYS_SUPPORTS_MULTITHREADING
>> 637 select SYS_SUPPORTS_VPE_LOADER
>> 638 select BOOT_RAW
>> 639 select PINCTRL
>> 640 select USE_OF
>> 641
>> 642 config SGI_IP22
>> 643 bool "SGI IP22 (Indy/Indigo2)"
>> 644 select ARC_MEMORY
>> 645 select ARC_PROMLIB
>> 646 select FW_ARC
>> 647 select FW_ARC32
>> 648 select ARCH_MIGHT_HAVE_PC_SERIO
>> 649 select BOOT_ELF32
>> 650 select CEVT_R4K
>> 651 select CSRC_R4K
>> 652 select DEFAULT_SGI_PARTITION
>> 653 select DMA_NONCOHERENT
>> 654 select HAVE_EISA
>> 655 select I8253
>> 656 select I8259
>> 657 select IP22_CPU_SCACHE
>> 658 select IRQ_MIPS_CPU
>> 659 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 660 select SGI_HAS_I8042
>> 661 select SGI_HAS_INDYDOG
>> 662 select SGI_HAS_HAL2
>> 663 select SGI_HAS_SEEQ
>> 664 select SGI_HAS_WD93
>> 665 select SGI_HAS_ZILOG
>> 666 select SWAP_IO_SPACE
>> 667 select SYS_HAS_CPU_R4X00
>> 668 select SYS_HAS_CPU_R5000
>> 669 select SYS_HAS_EARLY_PRINTK
>> 670 select SYS_SUPPORTS_32BIT_KERNEL
>> 671 select SYS_SUPPORTS_64BIT_KERNEL
>> 672 select SYS_SUPPORTS_BIG_ENDIAN
>> 673 select WAR_R4600_V1_INDEX_ICACHEOP
>> 674 select WAR_R4600_V1_HIT_CACHEOP
>> 675 select WAR_R4600_V2_HIT_CACHEOP
>> 676 select MIPS_L1_CACHE_SHIFT_7
>> 677 help
>> 678 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 679 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 680 that runs on these, say Y here.
>> 681
>> 682 config SGI_IP27
>> 683 bool "SGI IP27 (Origin200/2000)"
>> 684 select ARCH_HAS_PHYS_TO_DMA
>> 685 select ARCH_SPARSEMEM_ENABLE
>> 686 select FW_ARC
>> 687 select FW_ARC64
>> 688 select ARC_CMDLINE_ONLY
>> 689 select BOOT_ELF64
>> 690 select DEFAULT_SGI_PARTITION
>> 691 select FORCE_PCI
>> 692 select SYS_HAS_EARLY_PRINTK
>> 693 select HAVE_PCI
>> 694 select IRQ_MIPS_CPU
>> 695 select IRQ_DOMAIN_HIERARCHY
>> 696 select NR_CPUS_DEFAULT_64
>> 697 select PCI_DRIVERS_GENERIC
>> 698 select PCI_XTALK_BRIDGE
>> 699 select SYS_HAS_CPU_R10000
>> 700 select SYS_SUPPORTS_64BIT_KERNEL
>> 701 select SYS_SUPPORTS_BIG_ENDIAN
>> 702 select SYS_SUPPORTS_NUMA
>> 703 select SYS_SUPPORTS_SMP
>> 704 select WAR_R10000_LLSC
>> 705 select MIPS_L1_CACHE_SHIFT_7
>> 706 select NUMA
>> 707 select HAVE_ARCH_NODEDATA_EXTENSION
>> 708 help
>> 709 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 710 workstations. To compile a Linux kernel that runs on these, say Y
>> 711 here.
237 712
238 # https://github.com/llvm/llvm-project/commit/ !! 713 config SGI_IP28
239 config ARCH_HAS_BROKEN_DWARF5 !! 714 bool "SGI IP28 (Indigo2 R10k)"
240 def_bool y !! 715 select ARC_MEMORY
241 depends on RISCV_USE_LINKER_RELAXATION !! 716 select ARC_PROMLIB
242 # https://github.com/llvm/llvm-project !! 717 select FW_ARC
243 depends on AS_IS_LLVM && AS_VERSION < !! 718 select FW_ARC64
244 # https://github.com/llvm/llvm-project !! 719 select ARCH_MIGHT_HAVE_PC_SERIO
245 depends on LD_IS_LLD && LLD_VERSION < !! 720 select BOOT_ELF64
>> 721 select CEVT_R4K
>> 722 select CSRC_R4K
>> 723 select DEFAULT_SGI_PARTITION
>> 724 select DMA_NONCOHERENT
>> 725 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 726 select IRQ_MIPS_CPU
>> 727 select HAVE_EISA
>> 728 select I8253
>> 729 select I8259
>> 730 select SGI_HAS_I8042
>> 731 select SGI_HAS_INDYDOG
>> 732 select SGI_HAS_HAL2
>> 733 select SGI_HAS_SEEQ
>> 734 select SGI_HAS_WD93
>> 735 select SGI_HAS_ZILOG
>> 736 select SWAP_IO_SPACE
>> 737 select SYS_HAS_CPU_R10000
>> 738 select SYS_HAS_EARLY_PRINTK
>> 739 select SYS_SUPPORTS_64BIT_KERNEL
>> 740 select SYS_SUPPORTS_BIG_ENDIAN
>> 741 select WAR_R10000_LLSC
>> 742 select MIPS_L1_CACHE_SHIFT_7
>> 743 help
>> 744 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 745 kernel that runs on these, say Y here.
>> 746
>> 747 config SGI_IP30
>> 748 bool "SGI IP30 (Octane/Octane2)"
>> 749 select ARCH_HAS_PHYS_TO_DMA
>> 750 select FW_ARC
>> 751 select FW_ARC64
>> 752 select BOOT_ELF64
>> 753 select CEVT_R4K
>> 754 select CSRC_R4K
>> 755 select FORCE_PCI
>> 756 select SYNC_R4K if SMP
>> 757 select ZONE_DMA32
>> 758 select HAVE_PCI
>> 759 select IRQ_MIPS_CPU
>> 760 select IRQ_DOMAIN_HIERARCHY
>> 761 select PCI_DRIVERS_GENERIC
>> 762 select PCI_XTALK_BRIDGE
>> 763 select SYS_HAS_EARLY_PRINTK
>> 764 select SYS_HAS_CPU_R10000
>> 765 select SYS_SUPPORTS_64BIT_KERNEL
>> 766 select SYS_SUPPORTS_BIG_ENDIAN
>> 767 select SYS_SUPPORTS_SMP
>> 768 select WAR_R10000_LLSC
>> 769 select MIPS_L1_CACHE_SHIFT_7
>> 770 select ARC_MEMORY
>> 771 help
>> 772 These are the SGI Octane and Octane2 graphics workstations. To
>> 773 compile a Linux kernel that runs on these, say Y here.
>> 774
>> 775 config SGI_IP32
>> 776 bool "SGI IP32 (O2)"
>> 777 select ARC_MEMORY
>> 778 select ARC_PROMLIB
>> 779 select ARCH_HAS_PHYS_TO_DMA
>> 780 select FW_ARC
>> 781 select FW_ARC32
>> 782 select BOOT_ELF32
>> 783 select CEVT_R4K
>> 784 select CSRC_R4K
>> 785 select DMA_NONCOHERENT
>> 786 select HAVE_PCI
>> 787 select IRQ_MIPS_CPU
>> 788 select R5000_CPU_SCACHE
>> 789 select RM7000_CPU_SCACHE
>> 790 select SYS_HAS_CPU_R5000
>> 791 select SYS_HAS_CPU_R10000 if BROKEN
>> 792 select SYS_HAS_CPU_RM7000
>> 793 select SYS_HAS_CPU_NEVADA
>> 794 select SYS_SUPPORTS_64BIT_KERNEL
>> 795 select SYS_SUPPORTS_BIG_ENDIAN
>> 796 select WAR_ICACHE_REFILLS
>> 797 help
>> 798 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 799
>> 800 config SIBYTE_CRHINE
>> 801 bool "Sibyte BCM91120C-CRhine"
>> 802 select BOOT_ELF32
>> 803 select SIBYTE_BCM1120
>> 804 select SWAP_IO_SPACE
>> 805 select SYS_HAS_CPU_SB1
>> 806 select SYS_SUPPORTS_BIG_ENDIAN
>> 807 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 808
>> 809 config SIBYTE_CARMEL
>> 810 bool "Sibyte BCM91120x-Carmel"
>> 811 select BOOT_ELF32
>> 812 select SIBYTE_BCM1120
>> 813 select SWAP_IO_SPACE
>> 814 select SYS_HAS_CPU_SB1
>> 815 select SYS_SUPPORTS_BIG_ENDIAN
>> 816 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 817
>> 818 config SIBYTE_CRHONE
>> 819 bool "Sibyte BCM91125C-CRhone"
>> 820 select BOOT_ELF32
>> 821 select SIBYTE_BCM1125
>> 822 select SWAP_IO_SPACE
>> 823 select SYS_HAS_CPU_SB1
>> 824 select SYS_SUPPORTS_BIG_ENDIAN
>> 825 select SYS_SUPPORTS_HIGHMEM
>> 826 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 827
>> 828 config SIBYTE_RHONE
>> 829 bool "Sibyte BCM91125E-Rhone"
>> 830 select BOOT_ELF32
>> 831 select SIBYTE_BCM1125H
>> 832 select SWAP_IO_SPACE
>> 833 select SYS_HAS_CPU_SB1
>> 834 select SYS_SUPPORTS_BIG_ENDIAN
>> 835 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 836
>> 837 config SIBYTE_SWARM
>> 838 bool "Sibyte BCM91250A-SWARM"
>> 839 select BOOT_ELF32
>> 840 select HAVE_PATA_PLATFORM
>> 841 select SIBYTE_SB1250
>> 842 select SWAP_IO_SPACE
>> 843 select SYS_HAS_CPU_SB1
>> 844 select SYS_SUPPORTS_BIG_ENDIAN
>> 845 select SYS_SUPPORTS_HIGHMEM
>> 846 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 847 select ZONE_DMA32 if 64BIT
>> 848 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
246 849
247 config ARCH_MMAP_RND_BITS_MIN !! 850 config SIBYTE_LITTLESUR
248 default 18 if 64BIT !! 851 bool "Sibyte BCM91250C2-LittleSur"
249 default 8 !! 852 select BOOT_ELF32
>> 853 select HAVE_PATA_PLATFORM
>> 854 select SIBYTE_SB1250
>> 855 select SWAP_IO_SPACE
>> 856 select SYS_HAS_CPU_SB1
>> 857 select SYS_SUPPORTS_BIG_ENDIAN
>> 858 select SYS_SUPPORTS_HIGHMEM
>> 859 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 860 select ZONE_DMA32 if 64BIT
250 861
251 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 862 config SIBYTE_SENTOSA
252 default 8 !! 863 bool "Sibyte BCM91250E-Sentosa"
>> 864 select BOOT_ELF32
>> 865 select SIBYTE_SB1250
>> 866 select SWAP_IO_SPACE
>> 867 select SYS_HAS_CPU_SB1
>> 868 select SYS_SUPPORTS_BIG_ENDIAN
>> 869 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 870 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 871
>> 872 config SIBYTE_BIGSUR
>> 873 bool "Sibyte BCM91480B-BigSur"
>> 874 select BOOT_ELF32
>> 875 select NR_CPUS_DEFAULT_4
>> 876 select SIBYTE_BCM1x80
>> 877 select SWAP_IO_SPACE
>> 878 select SYS_HAS_CPU_SB1
>> 879 select SYS_SUPPORTS_BIG_ENDIAN
>> 880 select SYS_SUPPORTS_HIGHMEM
>> 881 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 882 select ZONE_DMA32 if 64BIT
>> 883 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
253 884
254 # max bits determined by the following formula !! 885 config SNI_RM
255 # VA_BITS - PAGE_SHIFT - 3 !! 886 bool "SNI RM200/300/400"
256 config ARCH_MMAP_RND_BITS_MAX !! 887 select ARC_MEMORY
257 default 24 if 64BIT # SV39 based !! 888 select ARC_PROMLIB
258 default 17 !! 889 select FW_ARC if CPU_LITTLE_ENDIAN
>> 890 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 891 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 892 select ARCH_MAY_HAVE_PC_FDC
>> 893 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 894 select ARCH_MIGHT_HAVE_PC_SERIO
>> 895 select BOOT_ELF32
>> 896 select CEVT_R4K
>> 897 select CSRC_R4K
>> 898 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 899 select DMA_NONCOHERENT
>> 900 select GENERIC_ISA_DMA
>> 901 select HAVE_EISA
>> 902 select HAVE_PCSPKR_PLATFORM
>> 903 select HAVE_PCI
>> 904 select IRQ_MIPS_CPU
>> 905 select I8253
>> 906 select I8259
>> 907 select ISA
>> 908 select MIPS_L1_CACHE_SHIFT_6
>> 909 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 910 select SYS_HAS_CPU_R4X00
>> 911 select SYS_HAS_CPU_R5000
>> 912 select SYS_HAS_CPU_R10000
>> 913 select R5000_CPU_SCACHE
>> 914 select SYS_HAS_EARLY_PRINTK
>> 915 select SYS_SUPPORTS_32BIT_KERNEL
>> 916 select SYS_SUPPORTS_64BIT_KERNEL
>> 917 select SYS_SUPPORTS_BIG_ENDIAN
>> 918 select SYS_SUPPORTS_HIGHMEM
>> 919 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 920 select WAR_R4600_V2_HIT_CACHEOP
>> 921 help
>> 922 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 923 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 924 Technology and now in turn merged with Fujitsu. Say Y here to
>> 925 support this machine type.
>> 926
>> 927 config MACH_TX49XX
>> 928 bool "Toshiba TX49 series based machines"
>> 929 select WAR_TX49XX_ICACHE_INDEX_INV
>> 930
>> 931 config MIKROTIK_RB532
>> 932 bool "Mikrotik RB532 boards"
>> 933 select CEVT_R4K
>> 934 select CSRC_R4K
>> 935 select DMA_NONCOHERENT
>> 936 select HAVE_PCI
>> 937 select IRQ_MIPS_CPU
>> 938 select SYS_HAS_CPU_MIPS32_R1
>> 939 select SYS_SUPPORTS_32BIT_KERNEL
>> 940 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 941 select SWAP_IO_SPACE
>> 942 select BOOT_RAW
>> 943 select GPIOLIB
>> 944 select MIPS_L1_CACHE_SHIFT_4
>> 945 help
>> 946 Support the Mikrotik(tm) RouterBoard 532 series,
>> 947 based on the IDT RC32434 SoC.
>> 948
>> 949 config CAVIUM_OCTEON_SOC
>> 950 bool "Cavium Networks Octeon SoC based boards"
>> 951 select CEVT_R4K
>> 952 select ARCH_HAS_PHYS_TO_DMA
>> 953 select HAVE_RAPIDIO
>> 954 select PHYS_ADDR_T_64BIT
>> 955 select SYS_SUPPORTS_64BIT_KERNEL
>> 956 select SYS_SUPPORTS_BIG_ENDIAN
>> 957 select EDAC_SUPPORT
>> 958 select EDAC_ATOMIC_SCRUB
>> 959 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 960 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 961 select SYS_HAS_EARLY_PRINTK
>> 962 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 963 select HAVE_PCI
>> 964 select HAVE_PLAT_DELAY
>> 965 select HAVE_PLAT_FW_INIT_CMDLINE
>> 966 select HAVE_PLAT_MEMCPY
>> 967 select ZONE_DMA32
>> 968 select GPIOLIB
>> 969 select USE_OF
>> 970 select ARCH_SPARSEMEM_ENABLE
>> 971 select SYS_SUPPORTS_SMP
>> 972 select NR_CPUS_DEFAULT_64
>> 973 select MIPS_NR_CPU_NR_MAP_1024
>> 974 select BUILTIN_DTB
>> 975 select MTD
>> 976 select MTD_COMPLEX_MAPPINGS
>> 977 select SWIOTLB
>> 978 select SYS_SUPPORTS_RELOCATABLE
>> 979 help
>> 980 This option supports all of the Octeon reference boards from Cavium
>> 981 Networks. It builds a kernel that dynamically determines the Octeon
>> 982 CPU type and supports all known board reference implementations.
>> 983 Some of the supported boards are:
>> 984 EBT3000
>> 985 EBH3000
>> 986 EBH3100
>> 987 Thunder
>> 988 Kodama
>> 989 Hikari
>> 990 Say Y here for most Octeon reference boards.
259 991
260 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 992 endchoice
261 default 17 <<
262 993
263 # set if we run in machine mode, cleared if we !! 994 source "arch/mips/alchemy/Kconfig"
264 config RISCV_M_MODE !! 995 source "arch/mips/ath25/Kconfig"
265 bool "Build a kernel that runs in mach !! 996 source "arch/mips/ath79/Kconfig"
266 depends on !MMU !! 997 source "arch/mips/bcm47xx/Kconfig"
>> 998 source "arch/mips/bcm63xx/Kconfig"
>> 999 source "arch/mips/bmips/Kconfig"
>> 1000 source "arch/mips/generic/Kconfig"
>> 1001 source "arch/mips/ingenic/Kconfig"
>> 1002 source "arch/mips/jazz/Kconfig"
>> 1003 source "arch/mips/lantiq/Kconfig"
>> 1004 source "arch/mips/pic32/Kconfig"
>> 1005 source "arch/mips/ralink/Kconfig"
>> 1006 source "arch/mips/sgi-ip27/Kconfig"
>> 1007 source "arch/mips/sibyte/Kconfig"
>> 1008 source "arch/mips/txx9/Kconfig"
>> 1009 source "arch/mips/cavium-octeon/Kconfig"
>> 1010 source "arch/mips/loongson2ef/Kconfig"
>> 1011 source "arch/mips/loongson32/Kconfig"
>> 1012 source "arch/mips/loongson64/Kconfig"
>> 1013
>> 1014 endmenu
>> 1015
>> 1016 config GENERIC_HWEIGHT
>> 1017 bool
267 default y 1018 default y
268 help <<
269 Select this option if you want to ru <<
270 without the assistance of any other <<
271 1019
272 # set if we are running in S-mode and can use !! 1020 config GENERIC_CALIBRATE_DELAY
273 config RISCV_SBI <<
274 bool 1021 bool
275 depends on !RISCV_M_MODE <<
276 default y 1022 default y
277 1023
278 config MMU !! 1024 config SCHED_OMIT_FRAME_POINTER
279 bool "MMU-based Paged Memory Managemen !! 1025 bool
280 default y 1026 default y
281 help <<
282 Select if you want MMU-based virtual <<
283 support by paged memory management. <<
284 1027
285 config PAGE_OFFSET !! 1028 #
286 hex !! 1029 # Select some configuration options automatically based on user selections.
287 default 0x80000000 if !MMU && RISCV_M_ !! 1030 #
288 default 0x80200000 if !MMU !! 1031 config FW_ARC
289 default 0xc0000000 if 32BIT !! 1032 bool
290 default 0xff60000000000000 if 64BIT <<
291 <<
292 config KASAN_SHADOW_OFFSET <<
293 hex <<
294 depends on KASAN_GENERIC <<
295 default 0xdfffffff00000000 if 64BIT <<
296 default 0xffffffff if 32BIT <<
297 1033
298 config ARCH_FLATMEM_ENABLE !! 1034 config ARCH_MAY_HAVE_PC_FDC
299 def_bool !NUMA !! 1035 bool
300 1036
301 config ARCH_SPARSEMEM_ENABLE !! 1037 config BOOT_RAW
302 def_bool y !! 1038 bool
303 depends on MMU <<
304 select SPARSEMEM_STATIC if 32BIT && SP <<
305 select SPARSEMEM_VMEMMAP_ENABLE if 64B <<
306 1039
307 config ARCH_SELECT_MEMORY_MODEL !! 1040 config CEVT_BCM1480
308 def_bool ARCH_SPARSEMEM_ENABLE !! 1041 bool
309 1042
310 config ARCH_SUPPORTS_UPROBES !! 1043 config CEVT_DS1287
311 def_bool y !! 1044 bool
312 1045
313 config STACKTRACE_SUPPORT !! 1046 config CEVT_GT641XX
314 def_bool y !! 1047 bool
315 1048
316 config GENERIC_BUG !! 1049 config CEVT_R4K
317 def_bool y !! 1050 bool
318 depends on BUG <<
319 select GENERIC_BUG_RELATIVE_POINTERS i <<
320 1051
321 config GENERIC_BUG_RELATIVE_POINTERS !! 1052 config CEVT_SB1250
322 bool 1053 bool
323 1054
324 config GENERIC_CALIBRATE_DELAY !! 1055 config CEVT_TXX9
325 def_bool y !! 1056 bool
326 1057
327 config GENERIC_CSUM !! 1058 config CSRC_BCM1480
328 def_bool y !! 1059 bool
329 1060
330 config GENERIC_HWEIGHT !! 1061 config CSRC_IOASIC
331 def_bool y !! 1062 bool
332 1063
333 config FIX_EARLYCON_MEM !! 1064 config CSRC_R4K
334 def_bool MMU !! 1065 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
>> 1066 bool
335 1067
336 config ILLEGAL_POINTER_VALUE !! 1068 config CSRC_SB1250
337 hex !! 1069 bool
338 default 0 if 32BIT <<
339 default 0xdead000000000000 if 64BIT <<
340 1070
341 config PGTABLE_LEVELS !! 1071 config MIPS_CLOCK_VSYSCALL
342 int !! 1072 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
343 default 5 if 64BIT <<
344 default 2 <<
345 1073
346 config LOCKDEP_SUPPORT !! 1074 config GPIO_TXX9
347 def_bool y !! 1075 select GPIOLIB
>> 1076 bool
>> 1077
>> 1078 config FW_CFE
>> 1079 bool
348 1080
349 config RISCV_DMA_NONCOHERENT !! 1081 config ARCH_SUPPORTS_UPROBES
350 bool 1082 bool
>> 1083
>> 1084 config DMA_NONCOHERENT
>> 1085 bool
>> 1086 #
>> 1087 # MIPS allows mixing "slightly different" Cacheability and Coherency
>> 1088 # Attribute bits. It is believed that the uncached access through
>> 1089 # KSEG1 and the implementation specific "uncached accelerated" used
>> 1090 # by pgprot_writcombine can be mixed, and the latter sometimes provides
>> 1091 # significant advantages.
>> 1092 #
>> 1093 select ARCH_HAS_DMA_WRITE_COMBINE
351 select ARCH_HAS_DMA_PREP_COHERENT 1094 select ARCH_HAS_DMA_PREP_COHERENT
352 select ARCH_HAS_SETUP_DMA_OPS <<
353 select ARCH_HAS_SYNC_DMA_FOR_CPU <<
354 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 1095 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
355 select DMA_BOUNCE_UNALIGNED_KMALLOC if !! 1096 select ARCH_HAS_DMA_SET_UNCACHED
>> 1097 select DMA_NONCOHERENT_MMAP
>> 1098 select NEED_DMA_MAP_STATE
356 1099
357 config RISCV_NONSTANDARD_CACHE_OPS !! 1100 config SYS_HAS_EARLY_PRINTK
>> 1101 bool
>> 1102
>> 1103 config SYS_SUPPORTS_HOTPLUG_CPU
358 bool 1104 bool
359 help <<
360 This enables function pointer suppor <<
361 systems to handle cache management. <<
362 1105
363 config AS_HAS_INSN !! 1106 config MIPS_BONITO64
364 def_bool $(as-instr,.insn r 51$(comma) !! 1107 bool
365 1108
366 config AS_HAS_OPTION_ARCH !! 1109 config MIPS_MSC
367 # https://github.com/llvm/llvm-project !! 1110 bool
368 def_bool y <<
369 depends on $(as-instr, .option arch$(c <<
370 1111
371 source "arch/riscv/Kconfig.socs" !! 1112 config SYNC_R4K
372 source "arch/riscv/Kconfig.errata" !! 1113 bool
373 1114
374 menu "Platform type" !! 1115 config NO_IOPORT_MAP
>> 1116 def_bool n
375 1117
376 config NONPORTABLE !! 1118 config GENERIC_CSUM
377 bool "Allow configurations that result !! 1119 def_bool CPU_NO_LOAD_STORE_LR
378 help <<
379 RISC-V kernel binaries are compatibl <<
380 whenever possible, but there are som <<
381 satisfied by configurations that res <<
382 not portable between systems. <<
383 1120
384 Selecting N does not guarantee kerne !! 1121 config GENERIC_ISA_DMA
385 systems. Selecting any of the optio !! 1122 bool
386 result in kernel binaries that are u !! 1123 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
387 systems. !! 1124 select ISA_DMA_API
388 1125
389 If unsure, say N. !! 1126 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1127 bool
>> 1128 select GENERIC_ISA_DMA
>> 1129
>> 1130 config HAVE_PLAT_DELAY
>> 1131 bool
>> 1132
>> 1133 config HAVE_PLAT_FW_INIT_CMDLINE
>> 1134 bool
>> 1135
>> 1136 config HAVE_PLAT_MEMCPY
>> 1137 bool
>> 1138
>> 1139 config ISA_DMA_API
>> 1140 bool
>> 1141
>> 1142 config SYS_SUPPORTS_RELOCATABLE
>> 1143 bool
>> 1144 help
>> 1145 Selected if the platform supports relocating the kernel.
>> 1146 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1147 to allow access to command line and entropy sources.
390 1148
>> 1149 #
>> 1150 # Endianness selection. Sufficiently obscure so many users don't know what to
>> 1151 # answer,so we try hard to limit the available choices. Also the use of a
>> 1152 # choice statement should be more obvious to the user.
>> 1153 #
391 choice 1154 choice
392 prompt "Base ISA" !! 1155 prompt "Endianness selection"
393 default ARCH_RV64I <<
394 help 1156 help
395 This selects the base ISA that this !! 1157 Some MIPS machines can be configured for either little or big endian
396 the target platform. !! 1158 byte order. These modes require different kernels and a different
>> 1159 Linux distribution. In general there is one preferred byteorder for a
>> 1160 particular system but some systems are just as commonly used in the
>> 1161 one or the other endianness.
>> 1162
>> 1163 config CPU_BIG_ENDIAN
>> 1164 bool "Big endian"
>> 1165 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1166
>> 1167 config CPU_LITTLE_ENDIAN
>> 1168 bool "Little endian"
>> 1169 depends on SYS_SUPPORTS_LITTLE_ENDIAN
397 1170
398 config ARCH_RV32I !! 1171 endchoice
399 bool "RV32I" <<
400 depends on NONPORTABLE <<
401 select 32BIT <<
402 select GENERIC_LIB_ASHLDI3 <<
403 select GENERIC_LIB_ASHRDI3 <<
404 select GENERIC_LIB_LSHRDI3 <<
405 select GENERIC_LIB_UCMPDI2 <<
406 1172
407 config ARCH_RV64I !! 1173 config EXPORT_UASM
408 bool "RV64I" !! 1174 bool
409 select 64BIT <<
410 select ARCH_SUPPORTS_INT128 if CC_HAS_ <<
411 select SWIOTLB if MMU <<
412 1175
413 endchoice !! 1176 config SYS_SUPPORTS_APM_EMULATION
>> 1177 bool
>> 1178
>> 1179 config SYS_SUPPORTS_BIG_ENDIAN
>> 1180 bool
>> 1181
>> 1182 config SYS_SUPPORTS_LITTLE_ENDIAN
>> 1183 bool
>> 1184
>> 1185 config MIPS_HUGE_TLB_SUPPORT
>> 1186 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
>> 1187
>> 1188 config IRQ_MSP_SLP
>> 1189 bool
>> 1190
>> 1191 config IRQ_MSP_CIC
>> 1192 bool
>> 1193
>> 1194 config IRQ_TXX9
>> 1195 bool
>> 1196
>> 1197 config IRQ_GT641XX
>> 1198 bool
>> 1199
>> 1200 config PCI_GT64XXX_PCI0
>> 1201 bool
>> 1202
>> 1203 config PCI_XTALK_BRIDGE
>> 1204 bool
>> 1205
>> 1206 config NO_EXCEPT_FILL
>> 1207 bool
>> 1208
>> 1209 config MIPS_SPRAM
>> 1210 bool
>> 1211
>> 1212 config SWAP_IO_SPACE
>> 1213 bool
>> 1214
>> 1215 config SGI_HAS_INDYDOG
>> 1216 bool
>> 1217
>> 1218 config SGI_HAS_HAL2
>> 1219 bool
>> 1220
>> 1221 config SGI_HAS_SEEQ
>> 1222 bool
>> 1223
>> 1224 config SGI_HAS_WD93
>> 1225 bool
>> 1226
>> 1227 config SGI_HAS_ZILOG
>> 1228 bool
>> 1229
>> 1230 config SGI_HAS_I8042
>> 1231 bool
>> 1232
>> 1233 config DEFAULT_SGI_PARTITION
>> 1234 bool
>> 1235
>> 1236 config FW_ARC32
>> 1237 bool
>> 1238
>> 1239 config FW_SNIPROM
>> 1240 bool
>> 1241
>> 1242 config BOOT_ELF32
>> 1243 bool
>> 1244
>> 1245 config MIPS_L1_CACHE_SHIFT_4
>> 1246 bool
>> 1247
>> 1248 config MIPS_L1_CACHE_SHIFT_5
>> 1249 bool
>> 1250
>> 1251 config MIPS_L1_CACHE_SHIFT_6
>> 1252 bool
>> 1253
>> 1254 config MIPS_L1_CACHE_SHIFT_7
>> 1255 bool
>> 1256
>> 1257 config MIPS_L1_CACHE_SHIFT
>> 1258 int
>> 1259 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1260 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1261 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1262 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1263 default "5"
>> 1264
>> 1265 config ARC_CMDLINE_ONLY
>> 1266 bool
>> 1267
>> 1268 config ARC_CONSOLE
>> 1269 bool "ARC console support"
>> 1270 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1271
>> 1272 config ARC_MEMORY
>> 1273 bool
>> 1274
>> 1275 config ARC_PROMLIB
>> 1276 bool
>> 1277
>> 1278 config FW_ARC64
>> 1279 bool
>> 1280
>> 1281 config BOOT_ELF64
>> 1282 bool
>> 1283
>> 1284 menu "CPU selection"
414 1285
415 # We must be able to map all physical memory i <<
416 # is still a bit more efficient when generatin <<
417 # such that it can only map 2GiB of memory. <<
418 choice 1286 choice
419 prompt "Kernel Code Model" !! 1287 prompt "CPU type"
420 default CMODEL_MEDLOW if 32BIT !! 1288 default CPU_R4X00
421 default CMODEL_MEDANY if 64BIT !! 1289
422 !! 1290 config CPU_LOONGSON64
423 config CMODEL_MEDLOW !! 1291 bool "Loongson 64-bit CPU"
424 bool "medium low code model" !! 1292 depends on SYS_HAS_CPU_LOONGSON64
425 config CMODEL_MEDANY !! 1293 select ARCH_HAS_PHYS_TO_DMA
426 bool "medium any code model" !! 1294 select CPU_MIPSR2
>> 1295 select CPU_HAS_PREFETCH
>> 1296 select CPU_SUPPORTS_64BIT_KERNEL
>> 1297 select CPU_SUPPORTS_HIGHMEM
>> 1298 select CPU_SUPPORTS_HUGEPAGES
>> 1299 select CPU_SUPPORTS_MSA
>> 1300 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
>> 1301 select CPU_MIPSR2_IRQ_VI
>> 1302 select WEAK_ORDERING
>> 1303 select WEAK_REORDERING_BEYOND_LLSC
>> 1304 select MIPS_ASID_BITS_VARIABLE
>> 1305 select MIPS_PGD_C0_CONTEXT
>> 1306 select MIPS_L1_CACHE_SHIFT_6
>> 1307 select MIPS_FP_SUPPORT
>> 1308 select GPIOLIB
>> 1309 select SWIOTLB
>> 1310 select HAVE_KVM
>> 1311 help
>> 1312 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
>> 1313 cores implements the MIPS64R2 instruction set with many extensions,
>> 1314 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
>> 1315 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
>> 1316 Loongson-2E/2F is not covered here and will be removed in future.
>> 1317
>> 1318 config LOONGSON3_ENHANCEMENT
>> 1319 bool "New Loongson-3 CPU Enhancements"
>> 1320 default n
>> 1321 depends on CPU_LOONGSON64
>> 1322 help
>> 1323 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
>> 1324 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1325 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
>> 1326 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1327 Fast TLB refill support, etc.
>> 1328
>> 1329 This option enable those enhancements which are not probed at run
>> 1330 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1331 please say 'N' here. If you want a high-performance kernel to run on
>> 1332 new Loongson-3 machines only, please say 'Y' here.
>> 1333
>> 1334 config CPU_LOONGSON3_WORKAROUNDS
>> 1335 bool "Loongson-3 LLSC Workarounds"
>> 1336 default y if SMP
>> 1337 depends on CPU_LOONGSON64
>> 1338 help
>> 1339 Loongson-3 processors have the llsc issues which require workarounds.
>> 1340 Without workarounds the system may hang unexpectedly.
>> 1341
>> 1342 Say Y, unless you know what you are doing.
>> 1343
>> 1344 config CPU_LOONGSON3_CPUCFG_EMULATION
>> 1345 bool "Emulate the CPUCFG instruction on older Loongson cores"
>> 1346 default y
>> 1347 depends on CPU_LOONGSON64
>> 1348 help
>> 1349 Loongson-3A R4 and newer have the CPUCFG instruction available for
>> 1350 userland to query CPU capabilities, much like CPUID on x86. This
>> 1351 option provides emulation of the instruction on older Loongson
>> 1352 cores, back to Loongson-3A1000.
>> 1353
>> 1354 If unsure, please say Y.
>> 1355
>> 1356 config CPU_LOONGSON2E
>> 1357 bool "Loongson 2E"
>> 1358 depends on SYS_HAS_CPU_LOONGSON2E
>> 1359 select CPU_LOONGSON2EF
>> 1360 help
>> 1361 The Loongson 2E processor implements the MIPS III instruction set
>> 1362 with many extensions.
>> 1363
>> 1364 It has an internal FPGA northbridge, which is compatible to
>> 1365 bonito64.
>> 1366
>> 1367 config CPU_LOONGSON2F
>> 1368 bool "Loongson 2F"
>> 1369 depends on SYS_HAS_CPU_LOONGSON2F
>> 1370 select CPU_LOONGSON2EF
>> 1371 select GPIOLIB
>> 1372 help
>> 1373 The Loongson 2F processor implements the MIPS III instruction set
>> 1374 with many extensions.
>> 1375
>> 1376 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1377 have a similar programming interface with FPGA northbridge used in
>> 1378 Loongson2E.
>> 1379
>> 1380 config CPU_LOONGSON1B
>> 1381 bool "Loongson 1B"
>> 1382 depends on SYS_HAS_CPU_LOONGSON1B
>> 1383 select CPU_LOONGSON32
>> 1384 select LEDS_GPIO_REGISTER
>> 1385 help
>> 1386 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1387 Release 1 instruction set and part of the MIPS32 Release 2
>> 1388 instruction set.
>> 1389
>> 1390 config CPU_LOONGSON1C
>> 1391 bool "Loongson 1C"
>> 1392 depends on SYS_HAS_CPU_LOONGSON1C
>> 1393 select CPU_LOONGSON32
>> 1394 select LEDS_GPIO_REGISTER
>> 1395 help
>> 1396 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1397 Release 1 instruction set and part of the MIPS32 Release 2
>> 1398 instruction set.
>> 1399
>> 1400 config CPU_MIPS32_R1
>> 1401 bool "MIPS32 Release 1"
>> 1402 depends on SYS_HAS_CPU_MIPS32_R1
>> 1403 select CPU_HAS_PREFETCH
>> 1404 select CPU_SUPPORTS_32BIT_KERNEL
>> 1405 select CPU_SUPPORTS_HIGHMEM
>> 1406 help
>> 1407 Choose this option to build a kernel for release 1 or later of the
>> 1408 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1409 MIPS processor are based on a MIPS32 processor. If you know the
>> 1410 specific type of processor in your system, choose those that one
>> 1411 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1412 Release 2 of the MIPS32 architecture is available since several
>> 1413 years so chances are you even have a MIPS32 Release 2 processor
>> 1414 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1415 performance.
>> 1416
>> 1417 config CPU_MIPS32_R2
>> 1418 bool "MIPS32 Release 2"
>> 1419 depends on SYS_HAS_CPU_MIPS32_R2
>> 1420 select CPU_HAS_PREFETCH
>> 1421 select CPU_SUPPORTS_32BIT_KERNEL
>> 1422 select CPU_SUPPORTS_HIGHMEM
>> 1423 select CPU_SUPPORTS_MSA
>> 1424 select HAVE_KVM
>> 1425 help
>> 1426 Choose this option to build a kernel for release 2 or later of the
>> 1427 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1428 MIPS processor are based on a MIPS32 processor. If you know the
>> 1429 specific type of processor in your system, choose those that one
>> 1430 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1431
>> 1432 config CPU_MIPS32_R5
>> 1433 bool "MIPS32 Release 5"
>> 1434 depends on SYS_HAS_CPU_MIPS32_R5
>> 1435 select CPU_HAS_PREFETCH
>> 1436 select CPU_SUPPORTS_32BIT_KERNEL
>> 1437 select CPU_SUPPORTS_HIGHMEM
>> 1438 select CPU_SUPPORTS_MSA
>> 1439 select HAVE_KVM
>> 1440 select MIPS_O32_FP64_SUPPORT
>> 1441 help
>> 1442 Choose this option to build a kernel for release 5 or later of the
>> 1443 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1444 family, are based on a MIPS32r5 processor. If you own an older
>> 1445 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1446
>> 1447 config CPU_MIPS32_R6
>> 1448 bool "MIPS32 Release 6"
>> 1449 depends on SYS_HAS_CPU_MIPS32_R6
>> 1450 select CPU_HAS_PREFETCH
>> 1451 select CPU_NO_LOAD_STORE_LR
>> 1452 select CPU_SUPPORTS_32BIT_KERNEL
>> 1453 select CPU_SUPPORTS_HIGHMEM
>> 1454 select CPU_SUPPORTS_MSA
>> 1455 select HAVE_KVM
>> 1456 select MIPS_O32_FP64_SUPPORT
>> 1457 help
>> 1458 Choose this option to build a kernel for release 6 or later of the
>> 1459 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1460 family, are based on a MIPS32r6 processor. If you own an older
>> 1461 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1462
>> 1463 config CPU_MIPS64_R1
>> 1464 bool "MIPS64 Release 1"
>> 1465 depends on SYS_HAS_CPU_MIPS64_R1
>> 1466 select CPU_HAS_PREFETCH
>> 1467 select CPU_SUPPORTS_32BIT_KERNEL
>> 1468 select CPU_SUPPORTS_64BIT_KERNEL
>> 1469 select CPU_SUPPORTS_HIGHMEM
>> 1470 select CPU_SUPPORTS_HUGEPAGES
>> 1471 help
>> 1472 Choose this option to build a kernel for release 1 or later of the
>> 1473 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1474 MIPS processor are based on a MIPS64 processor. If you know the
>> 1475 specific type of processor in your system, choose those that one
>> 1476 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1477 Release 2 of the MIPS64 architecture is available since several
>> 1478 years so chances are you even have a MIPS64 Release 2 processor
>> 1479 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1480 performance.
>> 1481
>> 1482 config CPU_MIPS64_R2
>> 1483 bool "MIPS64 Release 2"
>> 1484 depends on SYS_HAS_CPU_MIPS64_R2
>> 1485 select CPU_HAS_PREFETCH
>> 1486 select CPU_SUPPORTS_32BIT_KERNEL
>> 1487 select CPU_SUPPORTS_64BIT_KERNEL
>> 1488 select CPU_SUPPORTS_HIGHMEM
>> 1489 select CPU_SUPPORTS_HUGEPAGES
>> 1490 select CPU_SUPPORTS_MSA
>> 1491 select HAVE_KVM
>> 1492 help
>> 1493 Choose this option to build a kernel for release 2 or later of the
>> 1494 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1495 MIPS processor are based on a MIPS64 processor. If you know the
>> 1496 specific type of processor in your system, choose those that one
>> 1497 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1498
>> 1499 config CPU_MIPS64_R5
>> 1500 bool "MIPS64 Release 5"
>> 1501 depends on SYS_HAS_CPU_MIPS64_R5
>> 1502 select CPU_HAS_PREFETCH
>> 1503 select CPU_SUPPORTS_32BIT_KERNEL
>> 1504 select CPU_SUPPORTS_64BIT_KERNEL
>> 1505 select CPU_SUPPORTS_HIGHMEM
>> 1506 select CPU_SUPPORTS_HUGEPAGES
>> 1507 select CPU_SUPPORTS_MSA
>> 1508 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1509 select HAVE_KVM
>> 1510 help
>> 1511 Choose this option to build a kernel for release 5 or later of the
>> 1512 MIPS64 architecture. This is a intermediate MIPS architecture
>> 1513 release partly implementing release 6 features. Though there is no
>> 1514 any hardware known to be based on this release.
>> 1515
>> 1516 config CPU_MIPS64_R6
>> 1517 bool "MIPS64 Release 6"
>> 1518 depends on SYS_HAS_CPU_MIPS64_R6
>> 1519 select CPU_HAS_PREFETCH
>> 1520 select CPU_NO_LOAD_STORE_LR
>> 1521 select CPU_SUPPORTS_32BIT_KERNEL
>> 1522 select CPU_SUPPORTS_64BIT_KERNEL
>> 1523 select CPU_SUPPORTS_HIGHMEM
>> 1524 select CPU_SUPPORTS_HUGEPAGES
>> 1525 select CPU_SUPPORTS_MSA
>> 1526 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1527 select HAVE_KVM
>> 1528 help
>> 1529 Choose this option to build a kernel for release 6 or later of the
>> 1530 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1531 family, are based on a MIPS64r6 processor. If you own an older
>> 1532 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1533
>> 1534 config CPU_P5600
>> 1535 bool "MIPS Warrior P5600"
>> 1536 depends on SYS_HAS_CPU_P5600
>> 1537 select CPU_HAS_PREFETCH
>> 1538 select CPU_SUPPORTS_32BIT_KERNEL
>> 1539 select CPU_SUPPORTS_HIGHMEM
>> 1540 select CPU_SUPPORTS_MSA
>> 1541 select CPU_SUPPORTS_CPUFREQ
>> 1542 select CPU_MIPSR2_IRQ_VI
>> 1543 select CPU_MIPSR2_IRQ_EI
>> 1544 select HAVE_KVM
>> 1545 select MIPS_O32_FP64_SUPPORT
>> 1546 help
>> 1547 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
>> 1548 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
>> 1549 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
>> 1550 level features like up to six P5600 calculation cores, CM2 with L2
>> 1551 cache, IOCU/IOMMU (though might be unused depending on the system-
>> 1552 specific IP core configuration), GIC, CPC, virtualisation module,
>> 1553 eJTAG and PDtrace.
>> 1554
>> 1555 config CPU_R3000
>> 1556 bool "R3000"
>> 1557 depends on SYS_HAS_CPU_R3000
>> 1558 select CPU_HAS_WB
>> 1559 select CPU_R3K_TLB
>> 1560 select CPU_SUPPORTS_32BIT_KERNEL
>> 1561 select CPU_SUPPORTS_HIGHMEM
>> 1562 help
>> 1563 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1564 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1565 *not* work on R4000 machines and vice versa. However, since most
>> 1566 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1567 might be a safe bet. If the resulting kernel does not work,
>> 1568 try to recompile with R3000.
>> 1569
>> 1570 config CPU_R4300
>> 1571 bool "R4300"
>> 1572 depends on SYS_HAS_CPU_R4300
>> 1573 select CPU_SUPPORTS_32BIT_KERNEL
>> 1574 select CPU_SUPPORTS_64BIT_KERNEL
>> 1575 help
>> 1576 MIPS Technologies R4300-series processors.
>> 1577
>> 1578 config CPU_R4X00
>> 1579 bool "R4x00"
>> 1580 depends on SYS_HAS_CPU_R4X00
>> 1581 select CPU_SUPPORTS_32BIT_KERNEL
>> 1582 select CPU_SUPPORTS_64BIT_KERNEL
>> 1583 select CPU_SUPPORTS_HUGEPAGES
>> 1584 help
>> 1585 MIPS Technologies R4000-series processors other than 4300, including
>> 1586 the R4000, R4400, R4600, and 4700.
>> 1587
>> 1588 config CPU_TX49XX
>> 1589 bool "R49XX"
>> 1590 depends on SYS_HAS_CPU_TX49XX
>> 1591 select CPU_HAS_PREFETCH
>> 1592 select CPU_SUPPORTS_32BIT_KERNEL
>> 1593 select CPU_SUPPORTS_64BIT_KERNEL
>> 1594 select CPU_SUPPORTS_HUGEPAGES
>> 1595
>> 1596 config CPU_R5000
>> 1597 bool "R5000"
>> 1598 depends on SYS_HAS_CPU_R5000
>> 1599 select CPU_SUPPORTS_32BIT_KERNEL
>> 1600 select CPU_SUPPORTS_64BIT_KERNEL
>> 1601 select CPU_SUPPORTS_HUGEPAGES
>> 1602 help
>> 1603 MIPS Technologies R5000-series processors other than the Nevada.
>> 1604
>> 1605 config CPU_R5500
>> 1606 bool "R5500"
>> 1607 depends on SYS_HAS_CPU_R5500
>> 1608 select CPU_SUPPORTS_32BIT_KERNEL
>> 1609 select CPU_SUPPORTS_64BIT_KERNEL
>> 1610 select CPU_SUPPORTS_HUGEPAGES
>> 1611 help
>> 1612 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1613 instruction set.
>> 1614
>> 1615 config CPU_NEVADA
>> 1616 bool "RM52xx"
>> 1617 depends on SYS_HAS_CPU_NEVADA
>> 1618 select CPU_SUPPORTS_32BIT_KERNEL
>> 1619 select CPU_SUPPORTS_64BIT_KERNEL
>> 1620 select CPU_SUPPORTS_HUGEPAGES
>> 1621 help
>> 1622 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1623
>> 1624 config CPU_R10000
>> 1625 bool "R10000"
>> 1626 depends on SYS_HAS_CPU_R10000
>> 1627 select CPU_HAS_PREFETCH
>> 1628 select CPU_SUPPORTS_32BIT_KERNEL
>> 1629 select CPU_SUPPORTS_64BIT_KERNEL
>> 1630 select CPU_SUPPORTS_HIGHMEM
>> 1631 select CPU_SUPPORTS_HUGEPAGES
>> 1632 help
>> 1633 MIPS Technologies R10000-series processors.
>> 1634
>> 1635 config CPU_RM7000
>> 1636 bool "RM7000"
>> 1637 depends on SYS_HAS_CPU_RM7000
>> 1638 select CPU_HAS_PREFETCH
>> 1639 select CPU_SUPPORTS_32BIT_KERNEL
>> 1640 select CPU_SUPPORTS_64BIT_KERNEL
>> 1641 select CPU_SUPPORTS_HIGHMEM
>> 1642 select CPU_SUPPORTS_HUGEPAGES
>> 1643
>> 1644 config CPU_SB1
>> 1645 bool "SB1"
>> 1646 depends on SYS_HAS_CPU_SB1
>> 1647 select CPU_SUPPORTS_32BIT_KERNEL
>> 1648 select CPU_SUPPORTS_64BIT_KERNEL
>> 1649 select CPU_SUPPORTS_HIGHMEM
>> 1650 select CPU_SUPPORTS_HUGEPAGES
>> 1651 select WEAK_ORDERING
>> 1652
>> 1653 config CPU_CAVIUM_OCTEON
>> 1654 bool "Cavium Octeon processor"
>> 1655 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1656 select CPU_HAS_PREFETCH
>> 1657 select CPU_SUPPORTS_64BIT_KERNEL
>> 1658 select WEAK_ORDERING
>> 1659 select CPU_SUPPORTS_HIGHMEM
>> 1660 select CPU_SUPPORTS_HUGEPAGES
>> 1661 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1662 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1663 select MIPS_L1_CACHE_SHIFT_7
>> 1664 select HAVE_KVM
>> 1665 help
>> 1666 The Cavium Octeon processor is a highly integrated chip containing
>> 1667 many ethernet hardware widgets for networking tasks. The processor
>> 1668 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1669 Full details can be found at http://www.caviumnetworks.com.
>> 1670
>> 1671 config CPU_BMIPS
>> 1672 bool "Broadcom BMIPS"
>> 1673 depends on SYS_HAS_CPU_BMIPS
>> 1674 select CPU_MIPS32
>> 1675 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1676 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1677 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1678 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1679 select CPU_SUPPORTS_32BIT_KERNEL
>> 1680 select DMA_NONCOHERENT
>> 1681 select IRQ_MIPS_CPU
>> 1682 select SWAP_IO_SPACE
>> 1683 select WEAK_ORDERING
>> 1684 select CPU_SUPPORTS_HIGHMEM
>> 1685 select CPU_HAS_PREFETCH
>> 1686 select CPU_SUPPORTS_CPUFREQ
>> 1687 select MIPS_EXTERNAL_TIMER
>> 1688 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
>> 1689 help
>> 1690 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1691
427 endchoice 1692 endchoice
428 1693
429 config MODULE_SECTIONS !! 1694 config CPU_MIPS32_3_5_FEATURES
>> 1695 bool "MIPS32 Release 3.5 Features"
>> 1696 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1697 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
>> 1698 CPU_P5600
>> 1699 help
>> 1700 Choose this option to build a kernel for release 2 or later of the
>> 1701 MIPS32 architecture including features from the 3.5 release such as
>> 1702 support for Enhanced Virtual Addressing (EVA).
>> 1703
>> 1704 config CPU_MIPS32_3_5_EVA
>> 1705 bool "Enhanced Virtual Addressing (EVA)"
>> 1706 depends on CPU_MIPS32_3_5_FEATURES
>> 1707 select EVA
>> 1708 default y
>> 1709 help
>> 1710 Choose this option if you want to enable the Enhanced Virtual
>> 1711 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1712 One of its primary benefits is an increase in the maximum size
>> 1713 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1714
>> 1715 config CPU_MIPS32_R5_FEATURES
>> 1716 bool "MIPS32 Release 5 Features"
>> 1717 depends on SYS_HAS_CPU_MIPS32_R5
>> 1718 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
>> 1719 help
>> 1720 Choose this option to build a kernel for release 2 or later of the
>> 1721 MIPS32 architecture including features from release 5 such as
>> 1722 support for Extended Physical Addressing (XPA).
>> 1723
>> 1724 config CPU_MIPS32_R5_XPA
>> 1725 bool "Extended Physical Addressing (XPA)"
>> 1726 depends on CPU_MIPS32_R5_FEATURES
>> 1727 depends on !EVA
>> 1728 depends on !PAGE_SIZE_4KB
>> 1729 depends on SYS_SUPPORTS_HIGHMEM
>> 1730 select XPA
>> 1731 select HIGHMEM
>> 1732 select PHYS_ADDR_T_64BIT
>> 1733 default n
>> 1734 help
>> 1735 Choose this option if you want to enable the Extended Physical
>> 1736 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1737 benefit is to increase physical addressing equal to or greater
>> 1738 than 40 bits. Note that this has the side effect of turning on
>> 1739 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1740 If unsure, say 'N' here.
>> 1741
>> 1742 if CPU_LOONGSON2F
>> 1743 config CPU_NOP_WORKAROUNDS
430 bool 1744 bool
431 select HAVE_MOD_ARCH_SPECIFIC <<
432 1745
433 config SMP !! 1746 config CPU_JUMP_WORKAROUNDS
434 bool "Symmetric Multi-Processing" !! 1747 bool
>> 1748
>> 1749 config CPU_LOONGSON2F_WORKAROUNDS
>> 1750 bool "Loongson 2F Workarounds"
>> 1751 default y
>> 1752 select CPU_NOP_WORKAROUNDS
>> 1753 select CPU_JUMP_WORKAROUNDS
435 help 1754 help
436 This enables support for systems wit !! 1755 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
437 you say N here, the kernel will run !! 1756 require workarounds. Without workarounds the system may hang
438 multiprocessor machines, but will us !! 1757 unexpectedly. For more information please refer to the gas
439 multiprocessor machine. If you say Y !! 1758 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
440 on many, but not all, single process !! 1759
441 processor machine, the kernel will r !! 1760 Loongson 2F03 and later have fixed these issues and no workarounds
442 here. !! 1761 are needed. The workarounds have no significant side effect on them
>> 1762 but may decrease the performance of the system so this option should
>> 1763 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1764 systems.
443 1765
444 If you don't know what to do here, s !! 1766 If unsure, please say Y.
>> 1767 endif # CPU_LOONGSON2F
445 1768
446 config SCHED_MC !! 1769 config SYS_SUPPORTS_ZBOOT
447 bool "Multi-core scheduler support" !! 1770 bool
448 depends on SMP !! 1771 select HAVE_KERNEL_GZIP
449 help !! 1772 select HAVE_KERNEL_BZIP2
450 Multi-core scheduler support improve !! 1773 select HAVE_KERNEL_LZ4
451 making when dealing with multi-core !! 1774 select HAVE_KERNEL_LZMA
452 increased overhead in some places. I !! 1775 select HAVE_KERNEL_LZO
>> 1776 select HAVE_KERNEL_XZ
>> 1777 select HAVE_KERNEL_ZSTD
453 1778
454 config NR_CPUS !! 1779 config SYS_SUPPORTS_ZBOOT_UART16550
455 int "Maximum number of CPUs (2-512)" !! 1780 bool
456 depends on SMP !! 1781 select SYS_SUPPORTS_ZBOOT
457 range 2 512 if !RISCV_SBI_V01 <<
458 range 2 32 if RISCV_SBI_V01 && 32BIT <<
459 range 2 64 if RISCV_SBI_V01 && 64BIT <<
460 default "32" if 32BIT <<
461 default "64" if 64BIT <<
462 1782
463 config HOTPLUG_CPU !! 1783 config SYS_SUPPORTS_ZBOOT_UART_PROM
464 bool "Support for hot-pluggable CPUs" !! 1784 bool
465 depends on SMP !! 1785 select SYS_SUPPORTS_ZBOOT
466 select GENERIC_IRQ_MIGRATION !! 1786
>> 1787 config CPU_LOONGSON2EF
>> 1788 bool
>> 1789 select CPU_SUPPORTS_32BIT_KERNEL
>> 1790 select CPU_SUPPORTS_64BIT_KERNEL
>> 1791 select CPU_SUPPORTS_HIGHMEM
>> 1792 select CPU_SUPPORTS_HUGEPAGES
>> 1793 select ARCH_HAS_PHYS_TO_DMA
>> 1794
>> 1795 config CPU_LOONGSON32
>> 1796 bool
>> 1797 select CPU_MIPS32
>> 1798 select CPU_MIPSR2
>> 1799 select CPU_HAS_PREFETCH
>> 1800 select CPU_SUPPORTS_32BIT_KERNEL
>> 1801 select CPU_SUPPORTS_HIGHMEM
>> 1802 select CPU_SUPPORTS_CPUFREQ
>> 1803
>> 1804 config CPU_BMIPS32_3300
>> 1805 select SMP_UP if SMP
>> 1806 bool
>> 1807
>> 1808 config CPU_BMIPS4350
>> 1809 bool
>> 1810 select SYS_SUPPORTS_SMP
>> 1811 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1812
>> 1813 config CPU_BMIPS4380
>> 1814 bool
>> 1815 select MIPS_L1_CACHE_SHIFT_6
>> 1816 select SYS_SUPPORTS_SMP
>> 1817 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1818 select CPU_HAS_RIXI
>> 1819
>> 1820 config CPU_BMIPS5000
>> 1821 bool
>> 1822 select MIPS_CPU_SCACHE
>> 1823 select MIPS_L1_CACHE_SHIFT_7
>> 1824 select SYS_SUPPORTS_SMP
>> 1825 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1826 select CPU_HAS_RIXI
>> 1827
>> 1828 config SYS_HAS_CPU_LOONGSON64
>> 1829 bool
>> 1830 select CPU_SUPPORTS_CPUFREQ
>> 1831 select CPU_HAS_RIXI
>> 1832
>> 1833 config SYS_HAS_CPU_LOONGSON2E
>> 1834 bool
>> 1835
>> 1836 config SYS_HAS_CPU_LOONGSON2F
>> 1837 bool
>> 1838 select CPU_SUPPORTS_CPUFREQ
>> 1839 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1840
>> 1841 config SYS_HAS_CPU_LOONGSON1B
>> 1842 bool
>> 1843
>> 1844 config SYS_HAS_CPU_LOONGSON1C
>> 1845 bool
>> 1846
>> 1847 config SYS_HAS_CPU_MIPS32_R1
>> 1848 bool
>> 1849
>> 1850 config SYS_HAS_CPU_MIPS32_R2
>> 1851 bool
>> 1852
>> 1853 config SYS_HAS_CPU_MIPS32_R3_5
>> 1854 bool
>> 1855
>> 1856 config SYS_HAS_CPU_MIPS32_R5
>> 1857 bool
>> 1858 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1859
>> 1860 config SYS_HAS_CPU_MIPS32_R6
>> 1861 bool
>> 1862 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1863
>> 1864 config SYS_HAS_CPU_MIPS64_R1
>> 1865 bool
>> 1866
>> 1867 config SYS_HAS_CPU_MIPS64_R2
>> 1868 bool
>> 1869
>> 1870 config SYS_HAS_CPU_MIPS64_R5
>> 1871 bool
>> 1872 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1873
>> 1874 config SYS_HAS_CPU_MIPS64_R6
>> 1875 bool
>> 1876 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1877
>> 1878 config SYS_HAS_CPU_P5600
>> 1879 bool
>> 1880 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1881
>> 1882 config SYS_HAS_CPU_R3000
>> 1883 bool
>> 1884
>> 1885 config SYS_HAS_CPU_R4300
>> 1886 bool
>> 1887
>> 1888 config SYS_HAS_CPU_R4X00
>> 1889 bool
>> 1890
>> 1891 config SYS_HAS_CPU_TX49XX
>> 1892 bool
>> 1893
>> 1894 config SYS_HAS_CPU_R5000
>> 1895 bool
>> 1896
>> 1897 config SYS_HAS_CPU_R5500
>> 1898 bool
>> 1899
>> 1900 config SYS_HAS_CPU_NEVADA
>> 1901 bool
>> 1902
>> 1903 config SYS_HAS_CPU_R10000
>> 1904 bool
>> 1905 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1906
>> 1907 config SYS_HAS_CPU_RM7000
>> 1908 bool
>> 1909
>> 1910 config SYS_HAS_CPU_SB1
>> 1911 bool
>> 1912
>> 1913 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1914 bool
>> 1915
>> 1916 config SYS_HAS_CPU_BMIPS
>> 1917 bool
>> 1918
>> 1919 config SYS_HAS_CPU_BMIPS32_3300
>> 1920 bool
>> 1921 select SYS_HAS_CPU_BMIPS
>> 1922
>> 1923 config SYS_HAS_CPU_BMIPS4350
>> 1924 bool
>> 1925 select SYS_HAS_CPU_BMIPS
>> 1926
>> 1927 config SYS_HAS_CPU_BMIPS4380
>> 1928 bool
>> 1929 select SYS_HAS_CPU_BMIPS
>> 1930
>> 1931 config SYS_HAS_CPU_BMIPS5000
>> 1932 bool
>> 1933 select SYS_HAS_CPU_BMIPS
>> 1934 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 1935
>> 1936 #
>> 1937 # CPU may reorder R->R, R->W, W->R, W->W
>> 1938 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 1939 #
>> 1940 config WEAK_ORDERING
>> 1941 bool
>> 1942
>> 1943 #
>> 1944 # CPU may reorder reads and writes beyond LL/SC
>> 1945 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 1946 #
>> 1947 config WEAK_REORDERING_BEYOND_LLSC
>> 1948 bool
>> 1949 endmenu
>> 1950
>> 1951 #
>> 1952 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 1953 #
>> 1954 config CPU_MIPS32
>> 1955 bool
>> 1956 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
>> 1957 CPU_MIPS32_R6 || CPU_P5600
>> 1958
>> 1959 config CPU_MIPS64
>> 1960 bool
>> 1961 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
>> 1962 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
>> 1963
>> 1964 #
>> 1965 # These indicate the revision of the architecture
>> 1966 #
>> 1967 config CPU_MIPSR1
>> 1968 bool
>> 1969 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 1970
>> 1971 config CPU_MIPSR2
>> 1972 bool
>> 1973 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 1974 select CPU_HAS_RIXI
>> 1975 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1976 select MIPS_SPRAM
>> 1977
>> 1978 config CPU_MIPSR5
>> 1979 bool
>> 1980 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
>> 1981 select CPU_HAS_RIXI
>> 1982 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1983 select MIPS_SPRAM
>> 1984
>> 1985 config CPU_MIPSR6
>> 1986 bool
>> 1987 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 1988 select CPU_HAS_RIXI
>> 1989 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1990 select HAVE_ARCH_BITREVERSE
>> 1991 select MIPS_ASID_BITS_VARIABLE
>> 1992 select MIPS_CRC_SUPPORT
>> 1993 select MIPS_SPRAM
>> 1994
>> 1995 config TARGET_ISA_REV
>> 1996 int
>> 1997 default 1 if CPU_MIPSR1
>> 1998 default 2 if CPU_MIPSR2
>> 1999 default 5 if CPU_MIPSR5
>> 2000 default 6 if CPU_MIPSR6
>> 2001 default 0
467 help 2002 help
>> 2003 Reflects the ISA revision being targeted by the kernel build. This
>> 2004 is effectively the Kconfig equivalent of MIPS_ISA_REV.
>> 2005
>> 2006 config EVA
>> 2007 bool
468 2008
469 Say Y here to experiment with turnin !! 2009 config XPA
470 can be controlled through /sys/devic !! 2010 bool
471 2011
472 Say N if you want to disable CPU hot !! 2012 config SYS_SUPPORTS_32BIT_KERNEL
>> 2013 bool
>> 2014 config SYS_SUPPORTS_64BIT_KERNEL
>> 2015 bool
>> 2016 config CPU_SUPPORTS_32BIT_KERNEL
>> 2017 bool
>> 2018 config CPU_SUPPORTS_64BIT_KERNEL
>> 2019 bool
>> 2020 config CPU_SUPPORTS_CPUFREQ
>> 2021 bool
>> 2022 config CPU_SUPPORTS_ADDRWINCFG
>> 2023 bool
>> 2024 config CPU_SUPPORTS_HUGEPAGES
>> 2025 bool
>> 2026 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
>> 2027 config MIPS_PGD_C0_CONTEXT
>> 2028 bool
>> 2029 depends on 64BIT
>> 2030 default y if (CPU_MIPSR2 || CPU_MIPSR6)
>> 2031
>> 2032 #
>> 2033 # Set to y for ptrace access to watch registers.
>> 2034 #
>> 2035 config HARDWARE_WATCHPOINTS
>> 2036 bool
>> 2037 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2038
>> 2039 menu "Kernel type"
473 2040
474 choice 2041 choice
475 prompt "CPU Tuning" !! 2042 prompt "Kernel code model"
476 default TUNE_GENERIC !! 2043 help
>> 2044 You should only select this option if you have a workload that
>> 2045 actually benefits from 64-bit processing or if your machine has
>> 2046 large memory. You will only be presented a single option in this
>> 2047 menu if your system does not support both 32-bit and 64-bit kernels.
>> 2048
>> 2049 config 32BIT
>> 2050 bool "32-bit kernel"
>> 2051 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2052 select TRAD_SIGNALS
>> 2053 help
>> 2054 Select this option if you want to build a 32-bit kernel.
477 2055
478 config TUNE_GENERIC !! 2056 config 64BIT
479 bool "generic" !! 2057 bool "64-bit kernel"
>> 2058 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
>> 2059 help
>> 2060 Select this option if you want to build a 64-bit kernel.
480 2061
481 endchoice 2062 endchoice
482 2063
483 # Common NUMA Features !! 2064 config MIPS_VA_BITS_48
484 config NUMA !! 2065 bool "48 bits virtual memory"
485 bool "NUMA Memory Allocation and Sched !! 2066 depends on 64BIT
486 depends on SMP && MMU <<
487 select ARCH_SUPPORTS_NUMA_BALANCING <<
488 select GENERIC_ARCH_NUMA <<
489 select HAVE_SETUP_PER_CPU_AREA <<
490 select NEED_PER_CPU_EMBED_FIRST_CHUNK <<
491 select NEED_PER_CPU_PAGE_FIRST_CHUNK <<
492 select OF_NUMA <<
493 select USE_PERCPU_NUMA_NODE_ID <<
494 help 2067 help
495 Enable NUMA (Non-Uniform Memory Acce !! 2068 Support a maximum at least 48 bits of application virtual
>> 2069 memory. Default is 40 bits or less, depending on the CPU.
>> 2070 For page sizes 16k and above, this option results in a small
>> 2071 memory overhead for page tables. For 4k page size, a fourth
>> 2072 level of page tables is added which imposes both a memory
>> 2073 overhead as well as slower TLB fault handling.
496 2074
497 The kernel will try to allocate memo !! 2075 If unsure, say N.
498 local memory of the CPU and add some <<
499 2076
500 config NODES_SHIFT !! 2077 config ZBOOT_LOAD_ADDRESS
501 int "Maximum NUMA Nodes (as a power of !! 2078 hex "Compressed kernel load address"
502 range 1 10 !! 2079 default 0xffffffff80400000 if BCM47XX
503 default "2" !! 2080 default 0x0
504 depends on NUMA !! 2081 depends on SYS_SUPPORTS_ZBOOT
505 help 2082 help
506 Specify the maximum number of NUMA N !! 2083 The address to load compressed kernel, aka vmlinuz.
507 system. Increases memory reserved t !! 2084
>> 2085 This is only used if non-zero.
>> 2086
>> 2087 choice
>> 2088 prompt "Kernel page size"
>> 2089 default PAGE_SIZE_4KB
>> 2090
>> 2091 config PAGE_SIZE_4KB
>> 2092 bool "4kB"
>> 2093 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
>> 2094 help
>> 2095 This option select the standard 4kB Linux page size. On some
>> 2096 R3000-family processors this is the only available page size. Using
>> 2097 4kB page size will minimize memory consumption and is therefore
>> 2098 recommended for low memory systems.
>> 2099
>> 2100 config PAGE_SIZE_8KB
>> 2101 bool "8kB"
>> 2102 depends on CPU_CAVIUM_OCTEON
>> 2103 depends on !MIPS_VA_BITS_48
>> 2104 help
>> 2105 Using 8kB page size will result in higher performance kernel at
>> 2106 the price of higher memory consumption. This option is available
>> 2107 only on cnMIPS processors. Note that you will need a suitable Linux
>> 2108 distribution to support this.
>> 2109
>> 2110 config PAGE_SIZE_16KB
>> 2111 bool "16kB"
>> 2112 depends on !CPU_R3000
>> 2113 help
>> 2114 Using 16kB page size will result in higher performance kernel at
>> 2115 the price of higher memory consumption. This option is available on
>> 2116 all non-R3000 family processors. Note that you will need a suitable
>> 2117 Linux distribution to support this.
>> 2118
>> 2119 config PAGE_SIZE_32KB
>> 2120 bool "32kB"
>> 2121 depends on CPU_CAVIUM_OCTEON
>> 2122 depends on !MIPS_VA_BITS_48
>> 2123 help
>> 2124 Using 32kB page size will result in higher performance kernel at
>> 2125 the price of higher memory consumption. This option is available
>> 2126 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2127 distribution to support this.
>> 2128
>> 2129 config PAGE_SIZE_64KB
>> 2130 bool "64kB"
>> 2131 depends on !CPU_R3000
>> 2132 help
>> 2133 Using 64kB page size will result in higher performance kernel at
>> 2134 the price of higher memory consumption. This option is available on
>> 2135 all non-R3000 family processor. Not that at the time of this
>> 2136 writing this option is still high experimental.
>> 2137
>> 2138 endchoice
>> 2139
>> 2140 config ARCH_FORCE_MAX_ORDER
>> 2141 int "Maximum zone order"
>> 2142 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2143 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2144 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2145 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2146 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2147 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2148 range 0 64
>> 2149 default "11"
>> 2150 help
>> 2151 The kernel memory allocator divides physically contiguous memory
>> 2152 blocks into "zones", where each zone is a power of two number of
>> 2153 pages. This option selects the largest power of two that the kernel
>> 2154 keeps in the memory allocator. If you need to allocate very large
>> 2155 blocks of physically contiguous memory, then you may need to
>> 2156 increase this value.
>> 2157
>> 2158 This config option is actually maximum order plus one. For example,
>> 2159 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2160
>> 2161 The page size is not necessarily 4KB. Keep this in mind
>> 2162 when choosing a value for this option.
508 2163
509 config RISCV_ALTERNATIVE !! 2164 config BOARD_SCACHE
510 bool 2165 bool
511 depends on !XIP_KERNEL <<
512 help <<
513 This Kconfig allows the kernel to au <<
514 erratum or cpufeature required by th <<
515 time. The code patching overhead is <<
516 once at boot and once on each module <<
517 2166
518 config RISCV_ALTERNATIVE_EARLY !! 2167 config IP22_CPU_SCACHE
519 bool 2168 bool
520 depends on RISCV_ALTERNATIVE !! 2169 select BOARD_SCACHE
521 help <<
522 Allows early patching of the kernel <<
523 2170
524 config RISCV_ISA_C !! 2171 #
525 bool "Emit compressed instructions whe !! 2172 # Support for a MIPS32 / MIPS64 style S-caches
526 default y !! 2173 #
527 help !! 2174 config MIPS_CPU_SCACHE
528 Adds "C" to the ISA subsets that the !! 2175 bool
529 when building Linux, which results i !! 2176 select BOARD_SCACHE
530 Linux binary. !! 2177
531 !! 2178 config R5000_CPU_SCACHE
532 If you don't know what to do here, s !! 2179 bool
533 !! 2180 select BOARD_SCACHE
534 config RISCV_ISA_SVNAPOT !! 2181
535 bool "Svnapot extension support for su !! 2182 config RM7000_CPU_SCACHE
536 depends on 64BIT && MMU !! 2183 bool
537 depends on RISCV_ALTERNATIVE !! 2184 select BOARD_SCACHE
538 default y !! 2185
>> 2186 config SIBYTE_DMA_PAGEOPS
>> 2187 bool "Use DMA to clear/copy pages"
>> 2188 depends on CPU_SB1
539 help 2189 help
540 Allow kernel to detect the Svnapot I !! 2190 Instead of using the CPU to zero and copy pages, use a Data Mover
541 time and enable its usage. !! 2191 channel. These DMA channels are otherwise unused by the standard
>> 2192 SiByte Linux port. Seems to give a small performance benefit.
>> 2193
>> 2194 config CPU_HAS_PREFETCH
>> 2195 bool
>> 2196
>> 2197 config CPU_GENERIC_DUMP_TLB
>> 2198 bool
>> 2199 default y if !CPU_R3000
542 2200
543 The Svnapot extension is used to mar !! 2201 config MIPS_FP_SUPPORT
544 of contiguous virtual-to-physical tr !! 2202 bool "Floating Point support" if EXPERT
545 aligned power-of-2 (NAPOT) granulari <<
546 size. When HUGETLBFS is also selecte <<
547 allocates some memory for each NAPOT <<
548 When optimizing for low memory consu <<
549 the Svnapot extension, it may be bet <<
550 <<
551 If you don't know what to do here, s <<
552 <<
553 config RISCV_ISA_SVPBMT <<
554 bool "Svpbmt extension support for sup <<
555 depends on 64BIT && MMU <<
556 depends on RISCV_ALTERNATIVE <<
557 default y 2203 default y
558 help 2204 help
559 Adds support to dynamically detect !! 2205 Select y to include support for floating point in the kernel
560 ISA-extension (Supervisor-mode: pag !! 2206 including initialization of FPU hardware, FP context save & restore
561 enable its usage. !! 2207 and emulation of an FPU where necessary. Without this support any
>> 2208 userland program attempting to use floating point instructions will
>> 2209 receive a SIGILL.
562 2210
563 The memory type for a page contains !! 2211 If you know that your userland will not attempt to use floating point
564 that indicate the cacheability, ide !! 2212 instructions then you can say n here to shrink the kernel a little.
565 properties for access to that page. <<
566 2213
567 The Svpbmt extension is only availa !! 2214 If unsure, say y.
568 2215
569 If you don't know what to do here, !! 2216 config CPU_R2300_FPU
>> 2217 bool
>> 2218 depends on MIPS_FP_SUPPORT
>> 2219 default y if CPU_R3000
570 2220
571 config TOOLCHAIN_HAS_V !! 2221 config CPU_R3K_TLB
572 bool 2222 bool
>> 2223
>> 2224 config CPU_R4K_FPU
>> 2225 bool
>> 2226 depends on MIPS_FP_SUPPORT
>> 2227 default y if !CPU_R2300_FPU
>> 2228
>> 2229 config CPU_R4K_CACHE_TLB
>> 2230 bool
>> 2231 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
>> 2232
>> 2233 config MIPS_MT_SMP
>> 2234 bool "MIPS MT SMP support (1 TC on each available VPE)"
573 default y 2235 default y
574 depends on !64BIT || $(cc-option,-mabi !! 2236 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
575 depends on !32BIT || $(cc-option,-mabi !! 2237 select CPU_MIPSR2_IRQ_VI
576 depends on LLD_VERSION >= 140000 || LD !! 2238 select CPU_MIPSR2_IRQ_EI
577 depends on AS_HAS_OPTION_ARCH !! 2239 select SYNC_R4K
578 !! 2240 select MIPS_MT
579 config RISCV_ISA_V !! 2241 select SMP
580 bool "VECTOR extension support" !! 2242 select SMP_UP
581 depends on TOOLCHAIN_HAS_V !! 2243 select SYS_SUPPORTS_SMP
582 depends on FPU !! 2244 select SYS_SUPPORTS_SCHED_SMT
583 select DYNAMIC_SIGFRAME !! 2245 select MIPS_PERF_SHARED_TC_COUNTERS
584 default y !! 2246 help
>> 2247 This is a kernel model which is known as SMVP. This is supported
>> 2248 on cores with the MT ASE and uses the available VPEs to implement
>> 2249 virtual processors which supports SMP. This is equivalent to the
>> 2250 Intel Hyperthreading feature. For further information go to
>> 2251 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2252
>> 2253 config MIPS_MT
>> 2254 bool
>> 2255
>> 2256 config SCHED_SMT
>> 2257 bool "SMT (multithreading) scheduler support"
>> 2258 depends on SYS_SUPPORTS_SCHED_SMT
>> 2259 default n
585 help 2260 help
586 Say N here if you want to disable al !! 2261 SMT scheduler support improves the CPU scheduler's decision making
587 in the kernel. !! 2262 when dealing with MIPS MT enabled cores at a cost of slightly
>> 2263 increased overhead in some places. If unsure say N here.
588 2264
589 If you don't know what to do here, s !! 2265 config SYS_SUPPORTS_SCHED_SMT
>> 2266 bool
590 2267
591 config RISCV_ISA_V_DEFAULT_ENABLE !! 2268 config SYS_SUPPORTS_MULTITHREADING
592 bool "Enable userspace Vector by defau !! 2269 bool
593 depends on RISCV_ISA_V !! 2270
>> 2271 config MIPS_MT_FPAFF
>> 2272 bool "Dynamic FPU affinity for FP-intensive threads"
594 default y 2273 default y
595 help !! 2274 depends on MIPS_MT_SMP
596 Say Y here if you want to enable Vec !! 2275
597 Otherwise, userspace has to make exp !! 2276 config MIPSR2_TO_R6_EMULATOR
598 Vector, or enable it via the sysctl !! 2277 bool "MIPS R2-to-R6 emulator"
599 !! 2278 depends on CPU_MIPSR6
600 If you don't know what to do here, s !! 2279 depends on MIPS_FP_SUPPORT
601 <<
602 config RISCV_ISA_V_UCOPY_THRESHOLD <<
603 int "Threshold size for vectorized use <<
604 depends on RISCV_ISA_V <<
605 default 768 <<
606 help <<
607 Prefer using vectorized copy_to_user <<
608 workload size exceeds this value. <<
609 <<
610 config RISCV_ISA_V_PREEMPTIVE <<
611 bool "Run kernel-mode Vector with kern <<
612 depends on PREEMPTION <<
613 depends on RISCV_ISA_V <<
614 default y 2280 default y
615 help 2281 help
616 Usually, in-kernel SIMD routines are !! 2282 Choose this option if you want to run non-R6 MIPS userland code.
617 Functions which envoke long running !! 2283 Even if you say 'Y' here, the emulator will still be disabled by
618 vector unit to prevent blocking othe !! 2284 default. You can enable it using the 'mipsr2emu' kernel option.
619 !! 2285 The only reason this is a build-time option is to save ~14K from the
620 This config allows kernel to run SIM !! 2286 final kernel image.
621 preemption. Enabling this config wil !! 2287
622 consumption due to the allocation of !! 2288 config SYS_SUPPORTS_VPE_LOADER
623 !! 2289 bool
624 config RISCV_ISA_ZAWRS !! 2290 depends on SYS_SUPPORTS_MULTITHREADING
625 bool "Zawrs extension support for more <<
626 depends on RISCV_ALTERNATIVE <<
627 default y <<
628 help 2291 help
629 The Zawrs extension defines instruct !! 2292 Indicates that the platform supports the VPE loader, and provides
630 which allow a hart to enter a low-po !! 2293 physical_memsize.
631 hypervisor while waiting on a store <<
632 use of these instructions in the ker <<
633 detected at boot. <<
634 2294
635 If you don't know what to do here, s !! 2295 config MIPS_VPE_LOADER
>> 2296 bool "VPE loader support."
>> 2297 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2298 select CPU_MIPSR2_IRQ_VI
>> 2299 select CPU_MIPSR2_IRQ_EI
>> 2300 select MIPS_MT
>> 2301 help
>> 2302 Includes a loader for loading an elf relocatable object
>> 2303 onto another VPE and running it.
636 2304
637 config TOOLCHAIN_HAS_ZBB !! 2305 config MIPS_VPE_LOADER_CMP
638 bool 2306 bool
639 default y !! 2307 default "y"
640 depends on !64BIT || $(cc-option,-mabi !! 2308 depends on MIPS_VPE_LOADER && MIPS_CMP
641 depends on !32BIT || $(cc-option,-mabi <<
642 depends on LLD_VERSION >= 150000 || LD <<
643 depends on AS_HAS_OPTION_ARCH <<
644 <<
645 # This symbol indicates that the toolchain sup <<
646 # extensions, including Zvk*, Zvbb, and Zvbc. <<
647 # binutils added all except Zvkb, then added Z <<
648 config TOOLCHAIN_HAS_VECTOR_CRYPTO <<
649 def_bool $(as-instr, .option arch$(com <<
650 depends on AS_HAS_OPTION_ARCH <<
651 2309
652 config RISCV_ISA_ZBA !! 2310 config MIPS_VPE_LOADER_MT
653 bool "Zba extension support for bit ma !! 2311 bool
>> 2312 default "y"
>> 2313 depends on MIPS_VPE_LOADER && !MIPS_CMP
>> 2314
>> 2315 config MIPS_VPE_LOADER_TOM
>> 2316 bool "Load VPE program into memory hidden from linux"
>> 2317 depends on MIPS_VPE_LOADER
654 default y 2318 default y
655 help 2319 help
656 Add support for enabling optimisati !! 2320 The loader can use memory that is present but has been hidden from
657 extension is detected at boot. !! 2321 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2322 you to ensure the amount you put in the option and the space your
>> 2323 program requires is less or equal to the amount physically present.
658 2324
659 The Zba extension provides instruct !! 2325 config MIPS_VPE_APSP_API
660 of addresses that index into arrays !! 2326 bool "Enable support for AP/SP API (RTLX)"
>> 2327 depends on MIPS_VPE_LOADER
661 2328
662 If you don't know what to do here, !! 2329 config MIPS_VPE_APSP_API_CMP
>> 2330 bool
>> 2331 default "y"
>> 2332 depends on MIPS_VPE_APSP_API && MIPS_CMP
663 2333
664 config RISCV_ISA_ZBB !! 2334 config MIPS_VPE_APSP_API_MT
665 bool "Zbb extension support for bit ma !! 2335 bool
666 depends on TOOLCHAIN_HAS_ZBB !! 2336 default "y"
667 depends on RISCV_ALTERNATIVE !! 2337 depends on MIPS_VPE_APSP_API && !MIPS_CMP
668 default y !! 2338
>> 2339 config MIPS_CMP
>> 2340 bool "MIPS CMP framework support (DEPRECATED)"
>> 2341 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2342 select SMP
>> 2343 select SYNC_R4K
>> 2344 select SYS_SUPPORTS_SMP
>> 2345 select WEAK_ORDERING
>> 2346 default n
669 help 2347 help
670 Adds support to dynamically detect !! 2348 Select this if you are using a bootloader which implements the "CMP
671 extension (basic bit manipulation) !! 2349 framework" protocol (ie. YAMON) and want your kernel to make use of
>> 2350 its ability to start secondary CPUs.
>> 2351
>> 2352 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2353 instead of this.
>> 2354
>> 2355 config MIPS_CPS
>> 2356 bool "MIPS Coherent Processing System support"
>> 2357 depends on SYS_SUPPORTS_MIPS_CPS
>> 2358 select MIPS_CM
>> 2359 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2360 select SMP
>> 2361 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2362 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2363 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2364 select SYS_SUPPORTS_SMP
>> 2365 select WEAK_ORDERING
>> 2366 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
>> 2367 help
>> 2368 Select this if you wish to run an SMP kernel across multiple cores
>> 2369 within a MIPS Coherent Processing System. When this option is
>> 2370 enabled the kernel will probe for other cores and boot them with
>> 2371 no external assistance. It is safe to enable this when hardware
>> 2372 support is unavailable.
>> 2373
>> 2374 config MIPS_CPS_PM
>> 2375 depends on MIPS_CPS
>> 2376 bool
672 2377
673 The Zbb extension provides instruct !! 2378 config MIPS_CM
674 of bit-specific operations (count b !! 2379 bool
675 bitrotation, etc). !! 2380 select MIPS_CPC
676 2381
677 If you don't know what to do here, !! 2382 config MIPS_CPC
>> 2383 bool
678 2384
679 config TOOLCHAIN_HAS_ZBC !! 2385 config SB1_PASS_2_WORKAROUNDS
680 bool 2386 bool
>> 2387 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
681 default y 2388 default y
682 depends on !64BIT || $(cc-option,-mabi !! 2389
683 depends on !32BIT || $(cc-option,-mabi !! 2390 config SB1_PASS_2_1_WORKAROUNDS
684 depends on LLD_VERSION >= 150000 || LD !! 2391 bool
685 depends on AS_HAS_OPTION_ARCH !! 2392 depends on CPU_SB1 && CPU_SB1_PASS_2
686 <<
687 config RISCV_ISA_ZBC <<
688 bool "Zbc extension support for carry- <<
689 depends on TOOLCHAIN_HAS_ZBC <<
690 depends on MMU <<
691 depends on RISCV_ALTERNATIVE <<
692 default y 2393 default y
>> 2394
>> 2395 choice
>> 2396 prompt "SmartMIPS or microMIPS ASE support"
>> 2397
>> 2398 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2399 bool "None"
693 help 2400 help
694 Adds support to dynamically detect !! 2401 Select this if you want neither microMIPS nor SmartMIPS support
695 extension (carry-less multiplicatio <<
696 2402
697 The Zbc extension could accelerate !! 2403 config CPU_HAS_SMARTMIPS
698 calculations. !! 2404 depends on SYS_SUPPORTS_SMARTMIPS
>> 2405 bool "SmartMIPS"
>> 2406 help
>> 2407 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2408 increased security at both hardware and software level for
>> 2409 smartcards. Enabling this option will allow proper use of the
>> 2410 SmartMIPS instructions by Linux applications. However a kernel with
>> 2411 this option will not work on a MIPS core without SmartMIPS core. If
>> 2412 you don't know you probably don't have SmartMIPS and should say N
>> 2413 here.
699 2414
700 If you don't know what to do here, !! 2415 config CPU_MICROMIPS
>> 2416 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2417 bool "microMIPS"
>> 2418 help
>> 2419 When this option is enabled the kernel will be built using the
>> 2420 microMIPS ISA
701 2421
702 config RISCV_ISA_ZICBOM !! 2422 endchoice
703 bool "Zicbom extension support for non !! 2423
704 depends on MMU !! 2424 config CPU_HAS_MSA
705 depends on RISCV_ALTERNATIVE !! 2425 bool "Support for the MIPS SIMD Architecture"
706 default y !! 2426 depends on CPU_SUPPORTS_MSA
707 select RISCV_DMA_NONCOHERENT !! 2427 depends on MIPS_FP_SUPPORT
708 select DMA_DIRECT_REMAP !! 2428 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2429 help
>> 2430 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2431 and a set of SIMD instructions to operate on them. When this option
>> 2432 is enabled the kernel will support allocating & switching MSA
>> 2433 vector register contexts. If you know that your kernel will only be
>> 2434 running on CPUs which do not support MSA or that your userland will
>> 2435 not be making use of it then you may wish to say N here to reduce
>> 2436 the size & complexity of your kernel.
>> 2437
>> 2438 If unsure, say Y.
>> 2439
>> 2440 config CPU_HAS_WB
>> 2441 bool
>> 2442
>> 2443 config XKS01
>> 2444 bool
>> 2445
>> 2446 config CPU_HAS_DIEI
>> 2447 depends on !CPU_DIEI_BROKEN
>> 2448 bool
>> 2449
>> 2450 config CPU_DIEI_BROKEN
>> 2451 bool
>> 2452
>> 2453 config CPU_HAS_RIXI
>> 2454 bool
>> 2455
>> 2456 config CPU_NO_LOAD_STORE_LR
>> 2457 bool
709 help 2458 help
710 Adds support to dynamically detect !! 2459 CPU lacks support for unaligned load and store instructions:
711 extension (Cache Block Management O !! 2460 LWL, LWR, SWL, SWR (Load/store word left/right).
712 usage. !! 2461 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
>> 2462 systems).
713 2463
714 The Zicbom extension can be used to !! 2464 #
715 non-coherent DMA support on devices !! 2465 # Vectored interrupt mode is an R2 feature
>> 2466 #
>> 2467 config CPU_MIPSR2_IRQ_VI
>> 2468 bool
716 2469
717 If you don't know what to do here, !! 2470 #
>> 2471 # Extended interrupt mode is an R2 feature
>> 2472 #
>> 2473 config CPU_MIPSR2_IRQ_EI
>> 2474 bool
718 2475
719 config RISCV_ISA_ZICBOZ !! 2476 config CPU_HAS_SYNC
720 bool "Zicboz extension support for fas !! 2477 bool
721 depends on RISCV_ALTERNATIVE !! 2478 depends on !CPU_R3000
722 default y 2479 default y
723 help <<
724 Enable the use of the Zicboz extens <<
725 when available. <<
726 2480
727 The Zicboz extension is used for fa !! 2481 #
>> 2482 # CPU non-features
>> 2483 #
728 2484
729 If you don't know what to do here, !! 2485 # Work around the "daddi" and "daddiu" CPU errata:
>> 2486 #
>> 2487 # - The `daddi' instruction fails to trap on overflow.
>> 2488 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2489 # erratum #23
>> 2490 #
>> 2491 # - The `daddiu' instruction can produce an incorrect result.
>> 2492 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2493 # erratum #41
>> 2494 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
>> 2495 # #15
>> 2496 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
>> 2497 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
>> 2498 config CPU_DADDI_WORKAROUNDS
>> 2499 bool
730 2500
731 config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI !! 2501 # Work around certain R4000 CPU errata (as implemented by GCC):
732 def_bool y !! 2502 #
733 # https://sourceware.org/git/?p=binuti !! 2503 # - A double-word or a variable shift may give an incorrect result
734 # https://gcc.gnu.org/git/?p=gcc.git;a !! 2504 # if executed immediately after starting an integer division:
735 depends on AS_IS_GNU && AS_VERSION >= !! 2505 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
736 help !! 2506 # erratum #28
737 Binutils-2.38 and GCC-12.1.0 bumped !! 2507 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
738 20191213 version, which moves some i !! 2508 # #19
739 the Zicsr and Zifencei extensions. T !! 2509 #
740 Zicsr and Zifencei when binutils >= !! 2510 # - A double-word or a variable shift may give an incorrect result
741 and Zifencei are supported in binuti !! 2511 # if executed while an integer multiplication is in progress:
742 To make life easier, and avoid forci !! 2512 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
743 newer ISA spec to version 2.2, relax !! 2513 # errata #16 & #28
744 For clang < 17 or GCC < 11.3.0, for !! 2514 #
745 special treatment, this is dealt wit !! 2515 # - An integer division may give an incorrect result if started in
>> 2516 # a delay slot of a taken branch or a jump:
>> 2517 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2518 # erratum #52
>> 2519 config CPU_R4000_WORKAROUNDS
>> 2520 bool
>> 2521 select CPU_R4400_WORKAROUNDS
>> 2522
>> 2523 # Work around certain R4400 CPU errata (as implemented by GCC):
>> 2524 #
>> 2525 # - A double-word or a variable shift may give an incorrect result
>> 2526 # if executed immediately after starting an integer division:
>> 2527 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
>> 2528 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
>> 2529 config CPU_R4400_WORKAROUNDS
>> 2530 bool
>> 2531
>> 2532 config CPU_R4X00_BUGS64
>> 2533 bool
>> 2534 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
>> 2535
>> 2536 config MIPS_ASID_SHIFT
>> 2537 int
>> 2538 default 6 if CPU_R3000
>> 2539 default 0
>> 2540
>> 2541 config MIPS_ASID_BITS
>> 2542 int
>> 2543 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2544 default 6 if CPU_R3000
>> 2545 default 8
>> 2546
>> 2547 config MIPS_ASID_BITS_VARIABLE
>> 2548 bool
>> 2549
>> 2550 config MIPS_CRC_SUPPORT
>> 2551 bool
>> 2552
>> 2553 # R4600 erratum. Due to the lack of errata information the exact
>> 2554 # technical details aren't known. I've experimentally found that disabling
>> 2555 # interrupts during indexed I-cache flushes seems to be sufficient to deal
>> 2556 # with the issue.
>> 2557 config WAR_R4600_V1_INDEX_ICACHEOP
>> 2558 bool
>> 2559
>> 2560 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
>> 2561 #
>> 2562 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
>> 2563 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
>> 2564 # executed if there is no other dcache activity. If the dcache is
>> 2565 # accessed for another instruction immediately preceding when these
>> 2566 # cache instructions are executing, it is possible that the dcache
>> 2567 # tag match outputs used by these cache instructions will be
>> 2568 # incorrect. These cache instructions should be preceded by at least
>> 2569 # four instructions that are not any kind of load or store
>> 2570 # instruction.
>> 2571 #
>> 2572 # This is not allowed: lw
>> 2573 # nop
>> 2574 # nop
>> 2575 # nop
>> 2576 # cache Hit_Writeback_Invalidate_D
>> 2577 #
>> 2578 # This is allowed: lw
>> 2579 # nop
>> 2580 # nop
>> 2581 # nop
>> 2582 # nop
>> 2583 # cache Hit_Writeback_Invalidate_D
>> 2584 config WAR_R4600_V1_HIT_CACHEOP
>> 2585 bool
>> 2586
>> 2587 # Writeback and invalidate the primary cache dcache before DMA.
>> 2588 #
>> 2589 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
>> 2590 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
>> 2591 # operate correctly if the internal data cache refill buffer is empty. These
>> 2592 # CACHE instructions should be separated from any potential data cache miss
>> 2593 # by a load instruction to an uncached address to empty the response buffer."
>> 2594 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
>> 2595 # in .pdf format.)
>> 2596 config WAR_R4600_V2_HIT_CACHEOP
>> 2597 bool
>> 2598
>> 2599 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
>> 2600 # the line which this instruction itself exists, the following
>> 2601 # operation is not guaranteed."
>> 2602 #
>> 2603 # Workaround: do two phase flushing for Index_Invalidate_I
>> 2604 config WAR_TX49XX_ICACHE_INDEX_INV
>> 2605 bool
>> 2606
>> 2607 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
>> 2608 # opposes it being called that) where invalid instructions in the same
>> 2609 # I-cache line worth of instructions being fetched may case spurious
>> 2610 # exceptions.
>> 2611 config WAR_ICACHE_REFILLS
>> 2612 bool
>> 2613
>> 2614 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
>> 2615 # may cause ll / sc and lld / scd sequences to execute non-atomically.
>> 2616 config WAR_R10000_LLSC
>> 2617 bool
>> 2618
>> 2619 # 34K core erratum: "Problems Executing the TLBR Instruction"
>> 2620 config WAR_MIPS34K_MISSED_ITLB
>> 2621 bool
>> 2622
>> 2623 #
>> 2624 # - Highmem only makes sense for the 32-bit kernel.
>> 2625 # - The current highmem code will only work properly on physically indexed
>> 2626 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2627 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2628 # moment we protect the user and offer the highmem option only on machines
>> 2629 # where it's known to be safe. This will not offer highmem on a few systems
>> 2630 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2631 # indexed CPUs but we're playing safe.
>> 2632 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2633 # know they might have memory configurations that could make use of highmem
>> 2634 # support.
>> 2635 #
>> 2636 config HIGHMEM
>> 2637 bool "High Memory Support"
>> 2638 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2639 select KMAP_LOCAL
746 2640
747 config TOOLCHAIN_NEEDS_OLD_ISA_SPEC !! 2641 config CPU_SUPPORTS_HIGHMEM
>> 2642 bool
>> 2643
>> 2644 config SYS_SUPPORTS_HIGHMEM
>> 2645 bool
>> 2646
>> 2647 config SYS_SUPPORTS_SMARTMIPS
>> 2648 bool
>> 2649
>> 2650 config SYS_SUPPORTS_MICROMIPS
>> 2651 bool
>> 2652
>> 2653 config SYS_SUPPORTS_MIPS16
>> 2654 bool
>> 2655 help
>> 2656 This option must be set if a kernel might be executed on a MIPS16-
>> 2657 enabled CPU even if MIPS16 is not actually being used. In other
>> 2658 words, it makes the kernel MIPS16-tolerant.
>> 2659
>> 2660 config CPU_SUPPORTS_MSA
>> 2661 bool
>> 2662
>> 2663 config ARCH_FLATMEM_ENABLE
748 def_bool y 2664 def_bool y
749 depends on TOOLCHAIN_NEEDS_EXPLICIT_ZI !! 2665 depends on !NUMA && !CPU_LOONGSON2EF
750 # https://github.com/llvm/llvm-project <<
751 # https://gcc.gnu.org/git/?p=gcc.git;a <<
752 depends on (CC_IS_CLANG && CLANG_VERSI <<
753 help <<
754 Certain versions of clang and GCC do <<
755 -march. This option causes an older <<
756 versions of clang and GCC to be pass <<
757 as passing zicsr and zifencei to -ma <<
758 2666
759 config FPU !! 2667 config ARCH_SPARSEMEM_ENABLE
760 bool "FPU support" !! 2668 bool
761 default y !! 2669
>> 2670 config NUMA
>> 2671 bool "NUMA Support"
>> 2672 depends on SYS_SUPPORTS_NUMA
>> 2673 select SMP
>> 2674 select HAVE_SETUP_PER_CPU_AREA
>> 2675 select NEED_PER_CPU_EMBED_FIRST_CHUNK
>> 2676 help
>> 2677 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2678 Access). This option improves performance on systems with more
>> 2679 than two nodes; on two node systems it is generally better to
>> 2680 leave it disabled; on single node systems leave this option
>> 2681 disabled.
>> 2682
>> 2683 config SYS_SUPPORTS_NUMA
>> 2684 bool
>> 2685
>> 2686 config HAVE_ARCH_NODEDATA_EXTENSION
>> 2687 bool
>> 2688
>> 2689 config RELOCATABLE
>> 2690 bool "Relocatable kernel"
>> 2691 depends on SYS_SUPPORTS_RELOCATABLE
>> 2692 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
>> 2693 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
>> 2694 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
>> 2695 CPU_P5600 || CAVIUM_OCTEON_SOC || \
>> 2696 CPU_LOONGSON64
>> 2697 help
>> 2698 This builds a kernel image that retains relocation information
>> 2699 so it can be loaded someplace besides the default 1MB.
>> 2700 The relocations make the kernel binary about 15% larger,
>> 2701 but are discarded at runtime
>> 2702
>> 2703 config RELOCATION_TABLE_SIZE
>> 2704 hex "Relocation table size"
>> 2705 depends on RELOCATABLE
>> 2706 range 0x0 0x01000000
>> 2707 default "0x00200000" if CPU_LOONGSON64
>> 2708 default "0x00100000"
>> 2709 help
>> 2710 A table of relocation data will be appended to the kernel binary
>> 2711 and parsed at boot to fix up the relocated kernel.
>> 2712
>> 2713 This option allows the amount of space reserved for the table to be
>> 2714 adjusted, although the default of 1Mb should be ok in most cases.
>> 2715
>> 2716 The build will fail and a valid size suggested if this is too small.
>> 2717
>> 2718 If unsure, leave at the default value.
>> 2719
>> 2720 config RANDOMIZE_BASE
>> 2721 bool "Randomize the address of the kernel image"
>> 2722 depends on RELOCATABLE
762 help 2723 help
763 Say N here if you want to disable al !! 2724 Randomizes the physical and virtual address at which the
764 in the kernel. !! 2725 kernel image is loaded, as a security feature that
>> 2726 deters exploit attempts relying on knowledge of the location
>> 2727 of kernel internals.
>> 2728
>> 2729 Entropy is generated using any coprocessor 0 registers available.
>> 2730
>> 2731 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2732
>> 2733 If unsure, say N.
>> 2734
>> 2735 config RANDOMIZE_BASE_MAX_OFFSET
>> 2736 hex "Maximum kASLR offset" if EXPERT
>> 2737 depends on RANDOMIZE_BASE
>> 2738 range 0x0 0x40000000 if EVA || 64BIT
>> 2739 range 0x0 0x08000000
>> 2740 default "0x01000000"
>> 2741 help
>> 2742 When kASLR is active, this provides the maximum offset that will
>> 2743 be applied to the kernel image. It should be set according to the
>> 2744 amount of physical RAM available in the target system minus
>> 2745 PHYSICAL_START and must be a power of 2.
765 2746
766 If you don't know what to do here, s !! 2747 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2748 EVA or 64-bit. The default is 16Mb.
767 2749
768 config IRQ_STACKS !! 2750 config NODES_SHIFT
769 bool "Independent irq & softirq stacks !! 2751 int
>> 2752 default "6"
>> 2753 depends on NUMA
>> 2754
>> 2755 config HW_PERF_EVENTS
>> 2756 bool "Enable hardware performance counter support for perf events"
>> 2757 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
770 default y 2758 default y
771 select HAVE_IRQ_EXIT_ON_IRQ_STACK <<
772 select HAVE_SOFTIRQ_ON_OWN_STACK <<
773 help 2759 help
774 Add independent irq & softirq stacks !! 2760 Enable hardware performance counter support for perf events. If
775 overflows. We may save some memory f !! 2761 disabled, perf events will use software events only.
776 2762
777 config THREAD_SIZE_ORDER !! 2763 config DMI
778 int "Kernel stack size (in power-of-tw !! 2764 bool "Enable DMI scanning"
779 range 0 4 !! 2765 depends on MACH_LOONGSON64
780 default 1 if 32BIT !! 2766 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
781 default 2 !! 2767 default y
782 help 2768 help
783 Specify the Pages of thread stack si !! 2769 Enabled scanning of DMI to identify machine quirks. Say Y
784 affects irq stack size, which is equ !! 2770 here unless you have verified that your setup is not
>> 2771 affected by entries in the DMI blacklist. Required by PNP
>> 2772 BIOS code.
785 2773
786 config RISCV_MISALIGNED !! 2774 config SMP
787 bool !! 2775 bool "Multi-Processing support"
788 select SYSCTL_ARCH_UNALIGN_ALLOW !! 2776 depends on SYS_SUPPORTS_SMP
789 help 2777 help
790 Embed support for emulating misalign !! 2778 This enables support for systems with more than one CPU. If you have
>> 2779 a system with only one CPU, say N. If you have a system with more
>> 2780 than one CPU, say Y.
>> 2781
>> 2782 If you say N here, the kernel will run on uni- and multiprocessor
>> 2783 machines, but will use only one CPU of a multiprocessor machine. If
>> 2784 you say Y here, the kernel will run on many, but not all,
>> 2785 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2786 will run faster if you say N here.
791 2787
792 choice !! 2788 People using multiprocessor machines who say Y here should also say
793 prompt "Unaligned Accesses Support" !! 2789 Y to "Enhanced Real Time Clock Support", below.
794 default RISCV_PROBE_UNALIGNED_ACCESS !! 2790
>> 2791 See also the SMP-HOWTO available at
>> 2792 <https://www.tldp.org/docs.html#howto>.
>> 2793
>> 2794 If you don't know what to do here, say N.
>> 2795
>> 2796 config HOTPLUG_CPU
>> 2797 bool "Support for hot-pluggable CPUs"
>> 2798 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
795 help 2799 help
796 This determines the level of support !! 2800 Say Y here to allow turning CPUs off and on. CPUs can be
797 information is used by the kernel to !! 2801 controlled through /sys/devices/system/cpu.
798 exposed to user space via the hwprob !! 2802 (Note: power management support will enable this option
799 probed at boot by default. !! 2803 automatically on SMP systems. )
800 !! 2804 Say N if you want to disable CPU hotplug.
801 config RISCV_PROBE_UNALIGNED_ACCESS <<
802 bool "Probe for hardware unaligned acc <<
803 select RISCV_MISALIGNED <<
804 help <<
805 During boot, the kernel will run a s <<
806 speed of unaligned accesses. This pr <<
807 the speed of unaligned accesses on t <<
808 memory accesses trap into the kernel <<
809 system, the kernel will emulate the <<
810 UABI. <<
811 <<
812 config RISCV_EMULATED_UNALIGNED_ACCESS <<
813 bool "Emulate unaligned access where s <<
814 select RISCV_MISALIGNED <<
815 help <<
816 If unaligned memory accesses trap in <<
817 supported by the system, the kernel <<
818 accesses to preserve the UABI. When <<
819 unaligned accesses, the unaligned ac <<
820 <<
821 config RISCV_SLOW_UNALIGNED_ACCESS <<
822 bool "Assume the system supports slow <<
823 depends on NONPORTABLE <<
824 help <<
825 Assume that the system supports slow <<
826 kernel and userspace programs may no <<
827 that do not support unaligned memory <<
828 <<
829 config RISCV_EFFICIENT_UNALIGNED_ACCESS <<
830 bool "Assume the system supports fast <<
831 depends on NONPORTABLE <<
832 select DCACHE_WORD_ACCESS if MMU <<
833 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
834 help <<
835 Assume that the system supports fast <<
836 enabled, this option improves the pe <<
837 systems. However, the kernel and use <<
838 slowly, or will not be able to run a <<
839 support efficient unaligned memory a <<
840 2805
841 endchoice !! 2806 config SMP_UP
>> 2807 bool
>> 2808
>> 2809 config SYS_SUPPORTS_MIPS_CMP
>> 2810 bool
842 2811
843 source "arch/riscv/Kconfig.vendor" !! 2812 config SYS_SUPPORTS_MIPS_CPS
>> 2813 bool
844 2814
845 endmenu # "Platform type" !! 2815 config SYS_SUPPORTS_SMP
>> 2816 bool
846 2817
847 menu "Kernel features" !! 2818 config NR_CPUS_DEFAULT_4
>> 2819 bool
848 2820
849 source "kernel/Kconfig.hz" !! 2821 config NR_CPUS_DEFAULT_8
>> 2822 bool
850 2823
851 config RISCV_SBI_V01 !! 2824 config NR_CPUS_DEFAULT_16
852 bool "SBI v0.1 support" !! 2825 bool
853 depends on RISCV_SBI !! 2826
854 help !! 2827 config NR_CPUS_DEFAULT_32
855 This config allows kernel to use SBI !! 2828 bool
856 deprecated in future once legacy M-m !! 2829
>> 2830 config NR_CPUS_DEFAULT_64
>> 2831 bool
>> 2832
>> 2833 config NR_CPUS
>> 2834 int "Maximum number of CPUs (2-256)"
>> 2835 range 2 256
>> 2836 depends on SMP
>> 2837 default "4" if NR_CPUS_DEFAULT_4
>> 2838 default "8" if NR_CPUS_DEFAULT_8
>> 2839 default "16" if NR_CPUS_DEFAULT_16
>> 2840 default "32" if NR_CPUS_DEFAULT_32
>> 2841 default "64" if NR_CPUS_DEFAULT_64
>> 2842 help
>> 2843 This allows you to specify the maximum number of CPUs which this
>> 2844 kernel will support. The maximum supported value is 32 for 32-bit
>> 2845 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2846 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2847 and 2 for all others.
>> 2848
>> 2849 This is purely to save memory - each supported CPU adds
>> 2850 approximately eight kilobytes to the kernel image. For best
>> 2851 performance should round up your number of processors to the next
>> 2852 power of two.
>> 2853
>> 2854 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2855 bool
>> 2856
>> 2857 config MIPS_NR_CPU_NR_MAP_1024
>> 2858 bool
857 2859
858 config RISCV_BOOT_SPINWAIT !! 2860 config MIPS_NR_CPU_NR_MAP
859 bool "Spinwait booting method" !! 2861 int
860 depends on SMP 2862 depends on SMP
861 default y if RISCV_SBI_V01 || RISCV_M_ !! 2863 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2864 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2865
>> 2866 #
>> 2867 # Timer Interrupt Frequency Configuration
>> 2868 #
>> 2869
>> 2870 choice
>> 2871 prompt "Timer frequency"
>> 2872 default HZ_250
862 help 2873 help
863 This enables support for booting Lin !! 2874 Allows the configuration of the timer frequency.
864 spinwait method, all cores randomly <<
865 gets chosen via lottery and all othe <<
866 variable. This method cannot support <<
867 scheme. It should be only enabled fo <<
868 on older firmware without SBI HSM ex <<
869 rely on ordered booting via SBI HSM <<
870 dynamically at runtime if the firmwa <<
871 <<
872 Since spinwait is incompatible with <<
873 NR_CPUS be large enough to contain t <<
874 hart to enter Linux. <<
875 2875
876 If unsure what to do here, say N. !! 2876 config HZ_24
>> 2877 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
877 2878
878 config ARCH_SUPPORTS_KEXEC !! 2879 config HZ_48
879 def_bool y !! 2880 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
880 2881
881 config ARCH_SELECTS_KEXEC !! 2882 config HZ_100
882 def_bool y !! 2883 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
883 depends on KEXEC <<
884 select HOTPLUG_CPU if SMP <<
885 2884
886 config ARCH_SUPPORTS_KEXEC_FILE !! 2885 config HZ_128
887 def_bool 64BIT !! 2886 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
888 2887
889 config ARCH_SELECTS_KEXEC_FILE !! 2888 config HZ_250
890 def_bool y !! 2889 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
891 depends on KEXEC_FILE <<
892 select HAVE_IMA_KEXEC if IMA <<
893 select KEXEC_ELF <<
894 2890
895 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2891 config HZ_256
896 def_bool ARCH_SUPPORTS_KEXEC_FILE !! 2892 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
897 2893
898 config ARCH_SUPPORTS_CRASH_DUMP !! 2894 config HZ_1000
899 def_bool y !! 2895 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
900 2896
901 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATIO !! 2897 config HZ_1024
902 def_bool CRASH_RESERVE !! 2898 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
903 2899
904 config COMPAT !! 2900 endchoice
905 bool "Kernel support for 32-bit U-mode <<
906 default 64BIT <<
907 depends on 64BIT && MMU <<
908 help <<
909 This option enables support for a 32 <<
910 kernel at S-mode. riscv32-specific c <<
911 the user helper functions (vdso), si <<
912 ptrace interface are handled appropr <<
913 <<
914 If you want to execute 32-bit usersp <<
915 <<
916 config PARAVIRT <<
917 bool "Enable paravirtualization code" <<
918 depends on RISCV_SBI <<
919 help <<
920 This changes the kernel so it can mo <<
921 under a hypervisor, potentially impr <<
922 over full virtualization. <<
923 <<
924 config PARAVIRT_TIME_ACCOUNTING <<
925 bool "Paravirtual steal time accountin <<
926 depends on PARAVIRT <<
927 help <<
928 Select this option to enable fine gr <<
929 accounting. Time spent executing oth <<
930 the current vCPU is discounted from <<
931 that, there can be a small performan <<
932 2901
933 If in doubt, say N here. !! 2902 config SYS_SUPPORTS_24HZ
>> 2903 bool
934 2904
935 config RELOCATABLE !! 2905 config SYS_SUPPORTS_48HZ
936 bool "Build a relocatable kernel" !! 2906 bool
937 depends on MMU && 64BIT && !XIP_KERNEL !! 2907
938 select MODULE_SECTIONS if MODULES !! 2908 config SYS_SUPPORTS_100HZ
939 help !! 2909 bool
940 This builds a kernel as a Position I <<
941 which retains all relocation metadat <<
942 kernel binary at runtime to a differ <<
943 address it was linked at. <<
944 Since RISCV uses the RELA relocation <<
945 relocation pass at runtime even if t <<
946 same address it was linked at. <<
947 2910
948 If unsure, say N. !! 2911 config SYS_SUPPORTS_128HZ
>> 2912 bool
949 2913
950 config RANDOMIZE_BASE !! 2914 config SYS_SUPPORTS_250HZ
951 bool "Randomize the address of the ker !! 2915 bool
952 select RELOCATABLE !! 2916
953 depends on MMU && 64BIT && !XIP_KERNEL !! 2917 config SYS_SUPPORTS_256HZ
954 help !! 2918 bool
955 Randomizes the virtual address at wh !! 2919
956 loaded, as a security feature that d !! 2920 config SYS_SUPPORTS_1000HZ
957 relying on knowledge of the location !! 2921 bool
958 !! 2922
959 It is the bootloader's job to provid !! 2923 config SYS_SUPPORTS_1024HZ
960 random u64 value in /chosen/kaslr-se !! 2924 bool
961 !! 2925
962 When booting via the UEFI stub, it w !! 2926 config SYS_SUPPORTS_ARBIT_HZ
963 EFI_RNG_PROTOCOL implementation (if !! 2927 bool
964 to the kernel proper. In addition, i !! 2928 default y if !SYS_SUPPORTS_24HZ && \
965 location of the kernel Image as well !! 2929 !SYS_SUPPORTS_48HZ && \
966 !! 2930 !SYS_SUPPORTS_100HZ && \
967 If unsure, say N. !! 2931 !SYS_SUPPORTS_128HZ && \
968 !! 2932 !SYS_SUPPORTS_250HZ && \
969 endmenu # "Kernel features" !! 2933 !SYS_SUPPORTS_256HZ && \
970 !! 2934 !SYS_SUPPORTS_1000HZ && \
971 menu "Boot options" !! 2935 !SYS_SUPPORTS_1024HZ
972 !! 2936
973 config CMDLINE !! 2937 config HZ
974 string "Built-in kernel command line" !! 2938 int
975 help !! 2939 default 24 if HZ_24
976 For most platforms, the arguments fo !! 2940 default 48 if HZ_48
977 are provided at run-time, during boo !! 2941 default 100 if HZ_100
978 where either no arguments are being !! 2942 default 128 if HZ_128
979 arguments are insufficient or even i !! 2943 default 250 if HZ_250
>> 2944 default 256 if HZ_256
>> 2945 default 1000 if HZ_1000
>> 2946 default 1024 if HZ_1024
>> 2947
>> 2948 config SCHED_HRTICK
>> 2949 def_bool HIGH_RES_TIMERS
>> 2950
>> 2951 config KEXEC
>> 2952 bool "Kexec system call"
>> 2953 select KEXEC_CORE
>> 2954 help
>> 2955 kexec is a system call that implements the ability to shutdown your
>> 2956 current kernel, and to start another kernel. It is like a reboot
>> 2957 but it is independent of the system firmware. And like a reboot
>> 2958 you can start any kernel with it, not just Linux.
>> 2959
>> 2960 The name comes from the similarity to the exec system call.
>> 2961
>> 2962 It is an ongoing process to be certain the hardware in a machine
>> 2963 is properly shutdown, so do not be surprised if this code does not
>> 2964 initially work for you. As of this writing the exact hardware
>> 2965 interface is strongly in flux, so no good recommendation can be
>> 2966 made.
>> 2967
>> 2968 config CRASH_DUMP
>> 2969 bool "Kernel crash dumps"
>> 2970 help
>> 2971 Generate crash dump after being started by kexec.
>> 2972 This should be normally only set in special crash dump kernels
>> 2973 which are loaded in the main kernel with kexec-tools into
>> 2974 a specially reserved region and then later executed after
>> 2975 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2976 to a memory address not used by the main kernel or firmware using
>> 2977 PHYSICAL_START.
>> 2978
>> 2979 config PHYSICAL_START
>> 2980 hex "Physical address where the kernel is loaded"
>> 2981 default "0xffffffff84000000"
>> 2982 depends on CRASH_DUMP
>> 2983 help
>> 2984 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2985 If you plan to use kernel for capturing the crash dump change
>> 2986 this value to start of the reserved region (the "X" value as
>> 2987 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2988 passed to the panic-ed kernel).
>> 2989
>> 2990 config MIPS_O32_FP64_SUPPORT
>> 2991 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 2992 depends on 32BIT || MIPS32_O32
>> 2993 help
>> 2994 When this is enabled, the kernel will support use of 64-bit floating
>> 2995 point registers with binaries using the O32 ABI along with the
>> 2996 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2997 32-bit MIPS systems this support is at the cost of increasing the
>> 2998 size and complexity of the compiled FPU emulator. Thus if you are
>> 2999 running a MIPS32 system and know that none of your userland binaries
>> 3000 will require 64-bit floating point, you may wish to reduce the size
>> 3001 of your kernel & potentially improve FP emulation performance by
>> 3002 saying N here.
>> 3003
>> 3004 Although binutils currently supports use of this flag the details
>> 3005 concerning its effect upon the O32 ABI in userland are still being
>> 3006 worked on. In order to avoid userland becoming dependent upon current
>> 3007 behaviour before the details have been finalised, this option should
>> 3008 be considered experimental and only enabled by those working upon
>> 3009 said details.
>> 3010
>> 3011 If unsure, say N.
>> 3012
>> 3013 config USE_OF
>> 3014 bool
>> 3015 select OF
>> 3016 select OF_EARLY_FLATTREE
>> 3017 select IRQ_DOMAIN
>> 3018
>> 3019 config UHI_BOOT
>> 3020 bool
980 3021
981 When that occurs, it is possible to !! 3022 config BUILTIN_DTB
982 line here and choose how the kernel !! 3023 bool
983 3024
984 choice 3025 choice
985 prompt "Built-in command line usage" !! 3026 prompt "Kernel appended dtb support" if USE_OF
986 depends on CMDLINE != "" !! 3027 default MIPS_NO_APPENDED_DTB
987 default CMDLINE_FALLBACK <<
988 help <<
989 Choose how the kernel will handle th <<
990 line. <<
991 <<
992 config CMDLINE_FALLBACK <<
993 bool "Use bootloader kernel arguments <<
994 help <<
995 Use the built-in command line as fal <<
996 during boot. This is the default beh <<
997 <<
998 config CMDLINE_EXTEND <<
999 bool "Extend bootloader kernel argumen <<
1000 help <<
1001 The command-line arguments provided <<
1002 appended to the built-in command li <<
1003 cases where the provided arguments <<
1004 you don't want to or cannot modify <<
1005 <<
1006 config CMDLINE_FORCE <<
1007 bool "Always use the default kernel c <<
1008 help <<
1009 Always use the built-in command lin <<
1010 boot. This is useful in case you ne <<
1011 command line on systems where you d <<
1012 over it. <<
1013 3028
>> 3029 config MIPS_NO_APPENDED_DTB
>> 3030 bool "None"
>> 3031 help
>> 3032 Do not enable appended dtb support.
>> 3033
>> 3034 config MIPS_ELF_APPENDED_DTB
>> 3035 bool "vmlinux"
>> 3036 help
>> 3037 With this option, the boot code will look for a device tree binary
>> 3038 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 3039 it is empty and the DTB can be appended using binutils command
>> 3040 objcopy:
>> 3041
>> 3042 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 3043
>> 3044 This is meant as a backward compatibility convenience for those
>> 3045 systems with a bootloader that can't be upgraded to accommodate
>> 3046 the documented boot protocol using a device tree.
>> 3047
>> 3048 config MIPS_RAW_APPENDED_DTB
>> 3049 bool "vmlinux.bin or vmlinuz.bin"
>> 3050 help
>> 3051 With this option, the boot code will look for a device tree binary
>> 3052 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 3053 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 3054
>> 3055 This is meant as a backward compatibility convenience for those
>> 3056 systems with a bootloader that can't be upgraded to accommodate
>> 3057 the documented boot protocol using a device tree.
>> 3058
>> 3059 Beware that there is very little in terms of protection against
>> 3060 this option being confused by leftover garbage in memory that might
>> 3061 look like a DTB header after a reboot if no actual DTB is appended
>> 3062 to vmlinux.bin. Do not leave this option active in a production kernel
>> 3063 if you don't intend to always append a DTB.
1014 endchoice 3064 endchoice
1015 3065
1016 config EFI_STUB !! 3066 choice
1017 bool !! 3067 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
>> 3068 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 3069 !MACH_LOONGSON64 && !MIPS_MALTA && \
>> 3070 !CAVIUM_OCTEON_SOC
>> 3071 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 3072
>> 3073 config MIPS_CMDLINE_FROM_DTB
>> 3074 depends on USE_OF
>> 3075 bool "Dtb kernel arguments if available"
>> 3076
>> 3077 config MIPS_CMDLINE_DTB_EXTEND
>> 3078 depends on USE_OF
>> 3079 bool "Extend dtb kernel arguments with bootloader arguments"
>> 3080
>> 3081 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 3082 bool "Bootloader kernel arguments if available"
>> 3083
>> 3084 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3085 depends on CMDLINE_BOOL
>> 3086 bool "Extend builtin kernel arguments with bootloader arguments"
>> 3087 endchoice
1018 3088
1019 config EFI !! 3089 endmenu
1020 bool "UEFI runtime support" !! 3090
1021 depends on OF && !XIP_KERNEL !! 3091 config LOCKDEP_SUPPORT
1022 depends on MMU !! 3092 bool
1023 default y 3093 default y
1024 select ARCH_SUPPORTS_ACPI if 64BIT <<
1025 select EFI_GENERIC_STUB <<
1026 select EFI_PARAMS_FROM_FDT <<
1027 select EFI_RUNTIME_WRAPPERS <<
1028 select EFI_STUB <<
1029 select LIBFDT <<
1030 select RISCV_ISA_C <<
1031 select UCS2_STRING <<
1032 help <<
1033 This option provides support for ru <<
1034 by UEFI firmware (such as non-volat <<
1035 clock, and platform reset). A UEFI <<
1036 allow the kernel to be booted as an <<
1037 is only useful on systems that have <<
1038 3094
1039 config DMI !! 3095 config STACKTRACE_SUPPORT
1040 bool "Enable support for SMBIOS (DMI) !! 3096 bool
1041 depends on EFI <<
1042 default y 3097 default y
1043 help <<
1044 This enables SMBIOS/DMI feature for <<
1045 3098
1046 This option is only useful on syste !! 3099 config PGTABLE_LEVELS
1047 However, even with this option, the !! 3100 int
1048 continue to boot on existing non-UE !! 3101 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3102 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
>> 3103 default 2
1049 3104
1050 config CC_HAVE_STACKPROTECTOR_TLS !! 3105 config MIPS_AUTO_PFN_OFFSET
1051 def_bool $(cc-option,-mstack-protecto !! 3106 bool
1052 3107
1053 config STACKPROTECTOR_PER_TASK !! 3108 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
1054 def_bool y <<
1055 depends on !RANDSTRUCT <<
1056 depends on STACKPROTECTOR && CC_HAVE_ <<
1057 3109
1058 config PHYS_RAM_BASE_FIXED !! 3110 config PCI_DRIVERS_GENERIC
1059 bool "Explicitly specified physical R !! 3111 select PCI_DOMAINS_GENERIC if PCI
1060 depends on NONPORTABLE !! 3112 bool
1061 default n <<
1062 3113
1063 config PHYS_RAM_BASE !! 3114 config PCI_DRIVERS_LEGACY
1064 hex "Platform Physical RAM address" !! 3115 def_bool !PCI_DRIVERS_GENERIC
1065 depends on PHYS_RAM_BASE_FIXED !! 3116 select NO_GENERIC_PCI_IOPORT_MAP
1066 default "0x80000000" !! 3117 select PCI_DOMAINS if PCI
1067 help <<
1068 This is the physical address of RAM <<
1069 explicitly specified to run early r <<
1070 from flash to RAM. <<
1071 <<
1072 config XIP_KERNEL <<
1073 bool "Kernel Execute-In-Place from RO <<
1074 depends on MMU && SPARSEMEM && NONPOR <<
1075 # This prevents XIP from being enable <<
1076 # fail to build since XIP doesn't sup <<
1077 depends on !COMPILE_TEST <<
1078 select PHYS_RAM_BASE_FIXED <<
1079 help <<
1080 Execute-In-Place allows the kernel <<
1081 directly addressable by the CPU, su <<
1082 space since the text section of the <<
1083 to RAM. Read-write sections, such <<
1084 are still copied to RAM. The XIP k <<
1085 it has to run directly from flash, <<
1086 store it. The flash address used t <<
1087 and for storing it, is configuratio <<
1088 say Y here, you must know the prope <<
1089 store the kernel image depending on <<
1090 <<
1091 Also note that the make target beco <<
1092 "make zImage" or "make Image". The <<
1093 ROM memory will be arch/riscv/boot/ <<
1094 <<
1095 SPARSEMEM is required because the k <<
1096 flash resident are not backed by me <<
1097 a struct page on those regions will <<
1098 3118
1099 If unsure, say N. !! 3119 #
>> 3120 # ISA support is now enabled via select. Too many systems still have the one
>> 3121 # or other ISA chip on the board that users don't know about so don't expect
>> 3122 # users to choose the right thing ...
>> 3123 #
>> 3124 config ISA
>> 3125 bool
1100 3126
1101 config XIP_PHYS_ADDR !! 3127 config TC
1102 hex "XIP Kernel Physical Location" !! 3128 bool "TURBOchannel support"
1103 depends on XIP_KERNEL !! 3129 depends on MACH_DECSTATION
1104 default "0x21000000" !! 3130 help
1105 help !! 3131 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
1106 This is the physical address in you !! 3132 processors. TURBOchannel programming specifications are available
1107 be linked for and stored to. This !! 3133 at:
1108 own flash usage. !! 3134 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3135 and:
>> 3136 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3137 Linux driver support status is documented at:
>> 3138 <http://www.linux-mips.org/wiki/DECstation>
1109 3139
1110 config RISCV_ISA_FALLBACK !! 3140 config MMU
1111 bool "Permit falling back to parsing !! 3141 bool
1112 default y 3142 default y
1113 help <<
1114 Parsing the "riscv,isa" devicetree <<
1115 replaced by a list of explicitly de <<
1116 with existing platforms, the kernel <<
1117 "riscv,isa" property if the replace <<
1118 <<
1119 Selecting N here will result in a k <<
1120 fallback, unless the commandline "r <<
1121 present. <<
1122 <<
1123 Please see the dt-binding, located <<
1124 Documentation/devicetree/bindings/r <<
1125 on the replacement properties, "ris <<
1126 "riscv,isa-extensions". <<
1127 3143
1128 config BUILTIN_DTB !! 3144 config ARCH_MMAP_RND_BITS_MIN
1129 bool "Built-in device tree" !! 3145 default 12 if 64BIT
1130 depends on OF && NONPORTABLE !! 3146 default 8
1131 help <<
1132 Build a device tree into the Linux <<
1133 This option should be selected if n <<
1134 If unsure, say N. <<
1135 3147
>> 3148 config ARCH_MMAP_RND_BITS_MAX
>> 3149 default 18 if 64BIT
>> 3150 default 15
1136 3151
1137 config BUILTIN_DTB_SOURCE !! 3152 config ARCH_MMAP_RND_COMPAT_BITS_MIN
1138 string "Built-in device tree source" !! 3153 default 8
1139 depends on BUILTIN_DTB <<
1140 help <<
1141 DTS file path (without suffix, rela <<
1142 for the DTS file that will be used <<
1143 kernel. <<
1144 3154
1145 endmenu # "Boot options" !! 3155 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3156 default 15
1146 3157
1147 config PORTABLE !! 3158 config I8253
>> 3159 bool
>> 3160 select CLKSRC_I8253
>> 3161 select CLKEVT_I8253
>> 3162 select MIPS_EXTERNAL_TIMER
>> 3163 endmenu
>> 3164
>> 3165 config TRAD_SIGNALS
>> 3166 bool
>> 3167
>> 3168 config MIPS32_COMPAT
1148 bool 3169 bool
1149 default !NONPORTABLE <<
1150 select EFI <<
1151 select MMU <<
1152 select OF <<
1153 3170
1154 config ARCH_PROC_KCORE_TEXT !! 3171 config COMPAT
>> 3172 bool
>> 3173
>> 3174 config MIPS32_O32
>> 3175 bool "Kernel support for o32 binaries"
>> 3176 depends on 64BIT
>> 3177 select ARCH_WANT_OLD_COMPAT_IPC
>> 3178 select COMPAT
>> 3179 select MIPS32_COMPAT
>> 3180 help
>> 3181 Select this option if you want to run o32 binaries. These are pure
>> 3182 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3183 existing binaries are in this format.
>> 3184
>> 3185 If unsure, say Y.
>> 3186
>> 3187 config MIPS32_N32
>> 3188 bool "Kernel support for n32 binaries"
>> 3189 depends on 64BIT
>> 3190 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
>> 3191 select COMPAT
>> 3192 select MIPS32_COMPAT
>> 3193 help
>> 3194 Select this option if you want to run n32 binaries. These are
>> 3195 64-bit binaries using 32-bit quantities for addressing and certain
>> 3196 data that would normally be 64-bit. They are used in special
>> 3197 cases.
>> 3198
>> 3199 If unsure, say N.
>> 3200
>> 3201 config CC_HAS_MNO_BRANCH_LIKELY
1155 def_bool y 3202 def_bool y
>> 3203 depends on $(cc-option,-mno-branch-likely)
1156 3204
1157 menu "Power management options" !! 3205 # https://github.com/llvm/llvm-project/issues/61045
>> 3206 config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
>> 3207 def_bool y if CC_IS_CLANG
1158 3208
1159 source "kernel/power/Kconfig" !! 3209 menu "Power management options"
1160 3210
1161 config ARCH_HIBERNATION_POSSIBLE 3211 config ARCH_HIBERNATION_POSSIBLE
1162 def_bool y 3212 def_bool y
1163 !! 3213 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
1164 config ARCH_HIBERNATION_HEADER <<
1165 def_bool HIBERNATION <<
1166 3214
1167 config ARCH_SUSPEND_POSSIBLE 3215 config ARCH_SUSPEND_POSSIBLE
1168 def_bool y 3216 def_bool y
>> 3217 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
1169 3218
1170 endmenu # "Power management options" !! 3219 source "kernel/power/Kconfig"
1171 3220
1172 menu "CPU Power Management" !! 3221 endmenu
1173 3222
1174 source "drivers/cpuidle/Kconfig" !! 3223 config MIPS_EXTERNAL_TIMER
>> 3224 bool
>> 3225
>> 3226 menu "CPU Power Management"
1175 3227
>> 3228 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
1176 source "drivers/cpufreq/Kconfig" 3229 source "drivers/cpufreq/Kconfig"
>> 3230 endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3231
>> 3232 source "drivers/cpuidle/Kconfig"
1177 3233
1178 endmenu # "CPU Power Management" !! 3234 endmenu
1179 3235
1180 source "arch/riscv/kvm/Kconfig" !! 3236 source "arch/mips/kvm/Kconfig"
1181 3237
1182 source "drivers/acpi/Kconfig" !! 3238 source "arch/mips/vdso/Kconfig"
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