1 # SPDX-License-Identifier: GPL-2.0-only !! 1 # SPDX-License-Identifier: GPL-2.0
2 # !! 2 config MIPS
3 # For a description of the syntax of this conf <<
4 # see Documentation/kbuild/kconfig-language.rs <<
5 # <<
6 <<
7 config 64BIT <<
8 bool <<
9 <<
10 config 32BIT <<
11 bool 3 bool
12 !! 4 default y
13 config RISCV !! 5 select ARCH_32BIT_OFF_T if !64BIT
14 def_bool y !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
15 select ACPI_GENERIC_GSI if ACPI !! 7 select ARCH_HAS_CPU_CACHE_ALIASING
16 select ACPI_MCFG if (ACPI && PCI) !! 8 select ARCH_HAS_CPU_FINALIZE_INIT
17 select ACPI_PPTT if ACPI !! 9 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
18 select ACPI_REDUCED_HARDWARE_ONLY if A !! 10 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
19 select ACPI_SPCR_TABLE if ACPI !! 11 select ARCH_HAS_DMA_OPS if MACH_JAZZ
20 select ARCH_DMA_DEFAULT_COHERENT <<
21 select ARCH_ENABLE_HUGEPAGE_MIGRATION <<
22 select ARCH_ENABLE_MEMORY_HOTPLUG if S <<
23 select ARCH_ENABLE_MEMORY_HOTREMOVE if <<
24 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if <<
25 select ARCH_ENABLE_THP_MIGRATION if TR <<
26 select ARCH_HAS_BINFMT_FLAT <<
27 select ARCH_HAS_CURRENT_STACK_POINTER <<
28 select ARCH_HAS_DEBUG_VIRTUAL if MMU <<
29 select ARCH_HAS_DEBUG_VM_PGTABLE <<
30 select ARCH_HAS_DEBUG_WX <<
31 select ARCH_HAS_FAST_MULTIPLIER <<
32 select ARCH_HAS_FORTIFY_SOURCE 12 select ARCH_HAS_FORTIFY_SOURCE
33 select ARCH_HAS_GCOV_PROFILE_ALL <<
34 select ARCH_HAS_GIGANTIC_PAGE <<
35 select ARCH_HAS_KCOV 13 select ARCH_HAS_KCOV
36 select ARCH_HAS_KERNEL_FPU_SUPPORT if !! 14 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
37 select ARCH_HAS_MEMBARRIER_CALLBACKS !! 15 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
38 select ARCH_HAS_MEMBARRIER_SYNC_CORE !! 16 select ARCH_HAS_STRNCPY_FROM_USER
39 select ARCH_HAS_MMIOWB !! 17 select ARCH_HAS_STRNLEN_USER
40 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
41 select ARCH_HAS_PMEM_API <<
42 select ARCH_HAS_PREPARE_SYNC_CORE_CMD <<
43 select ARCH_HAS_PTE_DEVMAP if 64BIT && <<
44 select ARCH_HAS_PTE_SPECIAL <<
45 select ARCH_HAS_SET_DIRECT_MAP if MMU <<
46 select ARCH_HAS_SET_MEMORY if MMU <<
47 select ARCH_HAS_STRICT_KERNEL_RWX if M <<
48 select ARCH_HAS_STRICT_MODULE_RWX if M <<
49 select ARCH_HAS_SYNC_CORE_BEFORE_USERM <<
50 select ARCH_HAS_SYSCALL_WRAPPER <<
51 select ARCH_HAS_TICK_BROADCAST if GENE 18 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
52 select ARCH_HAS_UBSAN 19 select ARCH_HAS_UBSAN
53 select ARCH_HAS_VDSO_DATA !! 20 select ARCH_HAS_GCOV_PROFILE_ALL
54 select ARCH_KEEP_MEMBLOCK if ACPI !! 21 select ARCH_KEEP_MEMBLOCK
55 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL !! 22 select ARCH_USE_BUILTIN_BSWAP
56 select ARCH_OPTIONAL_KERNEL_RWX if ARC <<
57 select ARCH_OPTIONAL_KERNEL_RWX_DEFAUL <<
58 select ARCH_STACKWALK <<
59 select ARCH_SUPPORTS_ATOMIC_RMW <<
60 select ARCH_SUPPORTS_CFI_CLANG <<
61 select ARCH_SUPPORTS_DEBUG_PAGEALLOC i <<
62 select ARCH_SUPPORTS_HUGETLBFS if MMU <<
63 # LLD >= 14: https://github.com/llvm/l <<
64 select ARCH_SUPPORTS_LTO_CLANG if LLD_ <<
65 select ARCH_SUPPORTS_LTO_CLANG_THIN if <<
66 select ARCH_SUPPORTS_PAGE_TABLE_CHECK <<
67 select ARCH_SUPPORTS_PER_VMA_LOCK if M <<
68 select ARCH_SUPPORTS_RT <<
69 select ARCH_SUPPORTS_SHADOW_CALL_STACK <<
70 select ARCH_USE_CMPXCHG_LOCKREF if 64B 23 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
71 select ARCH_USE_MEMTEST 24 select ARCH_USE_MEMTEST
72 select ARCH_USE_QUEUED_RWLOCKS 25 select ARCH_USE_QUEUED_RWLOCKS
73 select ARCH_USE_SYM_ANNOTATIONS !! 26 select ARCH_USE_QUEUED_SPINLOCKS
74 select ARCH_USES_CFI_TRAPS if CFI_CLAN !! 27 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
75 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU <<
76 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_ 28 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
77 select ARCH_WANT_FRAME_POINTERS !! 29 select ARCH_WANT_IPC_PARSE_VERSION
78 select ARCH_WANT_GENERAL_HUGETLB if !R !! 30 select ARCH_WANT_LD_ORPHAN_WARN
79 select ARCH_WANT_HUGE_PMD_SHARE if 64B !! 31 select BUILDTIME_TABLE_SORT
80 select ARCH_WANT_LD_ORPHAN_WARN if !XI <<
81 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
82 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM <<
83 select ARCH_WANTS_NO_INSTR <<
84 select ARCH_WANTS_THP_SWAP if HAVE_ARC <<
85 select BINFMT_FLAT_NO_DATA_START_OFFSE <<
86 select BUILDTIME_TABLE_SORT if MMU <<
87 select CLINT_TIMER if RISCV_M_MODE <<
88 select CLONE_BACKWARDS 32 select CLONE_BACKWARDS
89 select COMMON_CLK !! 33 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
90 select CPU_PM if CPU_IDLE || HIBERNATI !! 34 select CPU_PM if CPU_IDLE || SUSPEND
91 select EDAC_SUPPORT <<
92 select FRAME_POINTER if PERF_EVENTS || <<
93 select FTRACE_MCOUNT_USE_PATCHABLE_FUN <<
94 select GENERIC_ARCH_TOPOLOGY <<
95 select GENERIC_ATOMIC64 if !64BIT 35 select GENERIC_ATOMIC64 if !64BIT
96 select GENERIC_CLOCKEVENTS_BROADCAST i !! 36 select GENERIC_CMOS_UPDATE
97 select GENERIC_CPU_DEVICES !! 37 select GENERIC_CPU_AUTOPROBE
98 select GENERIC_CPU_VULNERABILITIES !! 38 select GENERIC_GETTIMEOFDAY
99 select GENERIC_EARLY_IOREMAP !! 39 select GENERIC_IOMAP
100 select GENERIC_ENTRY !! 40 select GENERIC_IRQ_PROBE
101 select GENERIC_GETTIMEOFDAY if HAVE_GE <<
102 select GENERIC_IDLE_POLL_SETUP <<
103 select GENERIC_IOREMAP if MMU <<
104 select GENERIC_IRQ_IPI if SMP <<
105 select GENERIC_IRQ_IPI_MUX if SMP <<
106 select GENERIC_IRQ_MULTI_HANDLER <<
107 select GENERIC_IRQ_SHOW 41 select GENERIC_IRQ_SHOW
108 select GENERIC_IRQ_SHOW_LEVEL !! 42 select GENERIC_ISA_DMA if EISA
109 select GENERIC_LIB_DEVMEM_IS_ALLOWED !! 43 select GENERIC_LIB_ASHLDI3
110 select GENERIC_PCI_IOMAP !! 44 select GENERIC_LIB_ASHRDI3
111 select GENERIC_PTDUMP if MMU !! 45 select GENERIC_LIB_CMPDI2
112 select GENERIC_SCHED_CLOCK !! 46 select GENERIC_LIB_LSHRDI3
>> 47 select GENERIC_LIB_UCMPDI2
>> 48 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
113 select GENERIC_SMP_IDLE_THREAD 49 select GENERIC_SMP_IDLE_THREAD
114 select GENERIC_TIME_VSYSCALL if MMU && !! 50 select GENERIC_IDLE_POLL_SETUP
115 select GENERIC_VDSO_TIME_NS if HAVE_GE !! 51 select GENERIC_TIME_VSYSCALL
116 select HARDIRQS_SW_RESEND !! 52 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
117 select HAS_IOPORT if MMU !! 53 select HAS_IOPORT if !NO_IOPORT_MAP || ISA
118 select HAVE_ARCH_AUDITSYSCALL !! 54 select HAVE_ARCH_COMPILER_H
119 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ !! 55 select HAVE_ARCH_JUMP_LABEL
120 select HAVE_ARCH_HUGE_VMAP if MMU && 6 !! 56 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
121 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
122 select HAVE_ARCH_JUMP_LABEL_RELATIVE i <<
123 select HAVE_ARCH_KASAN if MMU && 64BIT <<
124 select HAVE_ARCH_KASAN_VMALLOC if MMU <<
125 select HAVE_ARCH_KFENCE if MMU && 64BI <<
126 select HAVE_ARCH_KGDB if !XIP_KERNEL <<
127 select HAVE_ARCH_KGDB_QXFER_PKT <<
128 select HAVE_ARCH_MMAP_RND_BITS if MMU 57 select HAVE_ARCH_MMAP_RND_BITS if MMU
129 select HAVE_ARCH_MMAP_RND_COMPAT_BITS !! 58 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
130 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
131 select HAVE_ARCH_SECCOMP_FILTER 59 select HAVE_ARCH_SECCOMP_FILTER
132 select HAVE_ARCH_STACKLEAK <<
133 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
134 select HAVE_ARCH_TRACEHOOK 60 select HAVE_ARCH_TRACEHOOK
135 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 61 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
136 select HAVE_ARCH_USERFAULTFD_MINOR if <<
137 select HAVE_ARCH_VMAP_STACK if MMU && <<
138 select HAVE_ASM_MODVERSIONS 62 select HAVE_ASM_MODVERSIONS
139 select HAVE_CONTEXT_TRACKING_USER 63 select HAVE_CONTEXT_TRACKING_USER
>> 64 select HAVE_TIF_NOHZ
>> 65 select HAVE_C_RECORDMCOUNT
140 select HAVE_DEBUG_KMEMLEAK 66 select HAVE_DEBUG_KMEMLEAK
141 select HAVE_DMA_CONTIGUOUS if MMU !! 67 select HAVE_DEBUG_STACKOVERFLOW
142 select HAVE_DYNAMIC_FTRACE if !XIP_KER !! 68 select HAVE_DMA_CONTIGUOUS
143 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT !! 69 select HAVE_DYNAMIC_FTRACE
144 select HAVE_DYNAMIC_FTRACE_WITH_ARGS i !! 70 select HAVE_EBPF_JIT if !CPU_MICROMIPS
145 select HAVE_FTRACE_MCOUNT_RECORD if !X !! 71 select HAVE_EXIT_THREAD
>> 72 select HAVE_GUP_FAST
>> 73 select HAVE_FTRACE_MCOUNT_RECORD
146 select HAVE_FUNCTION_GRAPH_TRACER 74 select HAVE_FUNCTION_GRAPH_TRACER
147 select HAVE_FUNCTION_GRAPH_RETVAL if H !! 75 select HAVE_FUNCTION_TRACER
148 select HAVE_FUNCTION_TRACER if !XIP_KE <<
149 select HAVE_EBPF_JIT if MMU <<
150 select HAVE_GUP_FAST if MMU <<
151 select HAVE_FUNCTION_ARG_ACCESS_API <<
152 select HAVE_FUNCTION_ERROR_INJECTION <<
153 select HAVE_GCC_PLUGINS 76 select HAVE_GCC_PLUGINS
154 select HAVE_GENERIC_VDSO if MMU && 64B !! 77 select HAVE_GENERIC_VDSO
>> 78 select HAVE_IOREMAP_PROT
>> 79 select HAVE_IRQ_EXIT_ON_IRQ_STACK
155 select HAVE_IRQ_TIME_ACCOUNTING 80 select HAVE_IRQ_TIME_ACCOUNTING
156 select HAVE_KERNEL_BZIP2 if !XIP_KERNE !! 81 select HAVE_KPROBES
157 select HAVE_KERNEL_GZIP if !XIP_KERNEL !! 82 select HAVE_KRETPROBES
158 select HAVE_KERNEL_LZ4 if !XIP_KERNEL !! 83 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
159 select HAVE_KERNEL_LZMA if !XIP_KERNEL !! 84 select HAVE_MOD_ARCH_SPECIFIC
160 select HAVE_KERNEL_LZO if !XIP_KERNEL !! 85 select HAVE_NMI
161 select HAVE_KERNEL_UNCOMPRESSED if !XI !! 86 select HAVE_PAGE_SIZE_4KB if !CPU_LOONGSON2EF && !CPU_LOONGSON64
162 select HAVE_KERNEL_ZSTD if !XIP_KERNEL !! 87 select HAVE_PAGE_SIZE_16KB if !CPU_R3000
163 select HAVE_KERNEL_XZ if !XIP_KERNEL & !! 88 select HAVE_PAGE_SIZE_64KB if !CPU_R3000
164 select HAVE_KPROBES if !XIP_KERNEL <<
165 select HAVE_KRETPROBES if !XIP_KERNEL <<
166 # https://github.com/ClangBuiltLinux/l <<
167 select HAVE_LD_DEAD_CODE_DATA_ELIMINAT <<
168 select HAVE_MOVE_PMD <<
169 select HAVE_MOVE_PUD <<
170 select HAVE_PAGE_SIZE_4KB <<
171 select HAVE_PCI <<
172 select HAVE_PERF_EVENTS 89 select HAVE_PERF_EVENTS
173 select HAVE_PERF_REGS 90 select HAVE_PERF_REGS
174 select HAVE_PERF_USER_STACK_DUMP 91 select HAVE_PERF_USER_STACK_DUMP
175 select HAVE_POSIX_CPU_TIMERS_TASK_WORK <<
176 select HAVE_PREEMPT_DYNAMIC_KEY if !XI <<
177 select HAVE_REGS_AND_STACK_ACCESS_API 92 select HAVE_REGS_AND_STACK_ACCESS_API
178 select HAVE_RETHOOK if !XIP_KERNEL <<
179 select HAVE_RSEQ 93 select HAVE_RSEQ
180 select HAVE_RUST if RUSTC_SUPPORTS_RIS !! 94 select HAVE_SPARSE_SYSCALL_NR
181 select HAVE_SAMPLE_FTRACE_DIRECT <<
182 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI <<
183 select HAVE_STACKPROTECTOR 95 select HAVE_STACKPROTECTOR
184 select HAVE_SYSCALL_TRACEPOINTS 96 select HAVE_SYSCALL_TRACEPOINTS
185 select HOTPLUG_CORE_SYNC_DEAD if HOTPL !! 97 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
186 select IRQ_DOMAIN <<
187 select IRQ_FORCED_THREADING 98 select IRQ_FORCED_THREADING
188 select KASAN_VMALLOC if KASAN !! 99 select ISA if EISA
189 select LOCK_MM_AND_FIND_VMA 100 select LOCK_MM_AND_FIND_VMA
190 select MMU_GATHER_RCU_TABLE_FREE if SM !! 101 select MODULES_USE_ELF_REL if MODULES
191 select MODULES_USE_ELF_RELA if MODULES !! 102 select MODULES_USE_ELF_RELA if MODULES && 64BIT
192 select OF !! 103 select PERF_USE_VMALLOC
193 select OF_EARLY_FLATTREE !! 104 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
194 select OF_IRQ !! 105 select RTC_LIB
195 select PCI_DOMAINS_GENERIC if PCI <<
196 select PCI_ECAM if (ACPI && PCI) <<
197 select PCI_MSI if PCI <<
198 select RISCV_ALTERNATIVE if !XIP_KERNE <<
199 select RISCV_APLIC <<
200 select RISCV_IMSIC <<
201 select RISCV_INTC <<
202 select RISCV_TIMER if RISCV_SBI <<
203 select SIFIVE_PLIC <<
204 select SPARSE_IRQ <<
205 select SYSCTL_EXCEPTION_TRACE 106 select SYSCTL_EXCEPTION_TRACE
206 select THREAD_INFO_IN_TASK <<
207 select TRACE_IRQFLAGS_SUPPORT 107 select TRACE_IRQFLAGS_SUPPORT
208 select UACCESS_MEMCPY if !MMU !! 108 select ARCH_HAS_ELFCORE_COMPAT
209 select USER_STACKTRACE_SUPPORT !! 109 select HAVE_ARCH_KCSAN if 64BIT
>> 110
>> 111 config MIPS_FIXUP_BIGPHYS_ADDR
>> 112 bool
>> 113
>> 114 config MIPS_GENERIC
>> 115 bool
>> 116
>> 117 config MACH_GENERIC_CORE
>> 118 bool
>> 119
>> 120 config MACH_INGENIC
>> 121 bool
>> 122 select SYS_SUPPORTS_32BIT_KERNEL
>> 123 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 124 select SYS_SUPPORTS_ZBOOT
>> 125 select DMA_NONCOHERENT
>> 126 select IRQ_MIPS_CPU
>> 127 select PINCTRL
>> 128 select GPIOLIB
>> 129 select COMMON_CLK
>> 130 select GENERIC_IRQ_CHIP
>> 131 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 132 select USE_OF
>> 133 select CPU_SUPPORTS_CPUFREQ
>> 134 select MIPS_EXTERNAL_TIMER
>> 135
>> 136 menu "Machine selection"
>> 137
>> 138 choice
>> 139 prompt "System type"
>> 140 default MIPS_GENERIC_KERNEL
>> 141
>> 142 config MIPS_GENERIC_KERNEL
>> 143 bool "Generic board-agnostic MIPS kernel"
>> 144 select MIPS_GENERIC
>> 145 select BOOT_RAW
>> 146 select BUILTIN_DTB
>> 147 select CEVT_R4K
>> 148 select CLKSRC_MIPS_GIC
>> 149 select COMMON_CLK
>> 150 select CPU_MIPSR2_IRQ_EI
>> 151 select CPU_MIPSR2_IRQ_VI
>> 152 select CSRC_R4K
>> 153 select DMA_NONCOHERENT
>> 154 select HAVE_PCI
>> 155 select IRQ_MIPS_CPU
>> 156 select MACH_GENERIC_CORE
>> 157 select MIPS_AUTO_PFN_OFFSET
>> 158 select MIPS_CPU_SCACHE
>> 159 select MIPS_GIC
>> 160 select MIPS_L1_CACHE_SHIFT_7
>> 161 select NO_EXCEPT_FILL
>> 162 select PCI_DRIVERS_GENERIC
>> 163 select SMP_UP if SMP
>> 164 select SWAP_IO_SPACE
>> 165 select SYS_HAS_CPU_MIPS32_R1
>> 166 select SYS_HAS_CPU_MIPS32_R2
>> 167 select SYS_HAS_CPU_MIPS32_R5
>> 168 select SYS_HAS_CPU_MIPS32_R6
>> 169 select SYS_HAS_CPU_MIPS64_R1
>> 170 select SYS_HAS_CPU_MIPS64_R2
>> 171 select SYS_HAS_CPU_MIPS64_R5
>> 172 select SYS_HAS_CPU_MIPS64_R6
>> 173 select SYS_SUPPORTS_32BIT_KERNEL
>> 174 select SYS_SUPPORTS_64BIT_KERNEL
>> 175 select SYS_SUPPORTS_BIG_ENDIAN
>> 176 select SYS_SUPPORTS_HIGHMEM
>> 177 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 178 select SYS_SUPPORTS_MICROMIPS
>> 179 select SYS_SUPPORTS_MIPS16
>> 180 select SYS_SUPPORTS_MIPS_CPS
>> 181 select SYS_SUPPORTS_MULTITHREADING
>> 182 select SYS_SUPPORTS_RELOCATABLE
>> 183 select SYS_SUPPORTS_SMARTMIPS
>> 184 select SYS_SUPPORTS_ZBOOT
>> 185 select UHI_BOOT
>> 186 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 187 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 188 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 189 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 190 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 191 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 192 select USE_OF
>> 193 help
>> 194 Select this to build a kernel which aims to support multiple boards,
>> 195 generally using a flattened device tree passed from the bootloader
>> 196 using the boot protocol defined in the UHI (Unified Hosting
>> 197 Interface) specification.
>> 198
>> 199 config MIPS_ALCHEMY
>> 200 bool "Alchemy processor based machines"
>> 201 select PHYS_ADDR_T_64BIT
>> 202 select CEVT_R4K
>> 203 select CSRC_R4K
>> 204 select IRQ_MIPS_CPU
>> 205 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
>> 206 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
>> 207 select SYS_HAS_CPU_MIPS32_R1
>> 208 select SYS_SUPPORTS_32BIT_KERNEL
>> 209 select SYS_SUPPORTS_APM_EMULATION
>> 210 select GPIOLIB
>> 211 select SYS_SUPPORTS_ZBOOT
>> 212 select COMMON_CLK
>> 213
>> 214 config ATH25
>> 215 bool "Atheros AR231x/AR531x SoC support"
>> 216 select CEVT_R4K
>> 217 select CSRC_R4K
>> 218 select DMA_NONCOHERENT
>> 219 select IRQ_MIPS_CPU
>> 220 select IRQ_DOMAIN
>> 221 select SYS_HAS_CPU_MIPS32_R1
>> 222 select SYS_SUPPORTS_BIG_ENDIAN
>> 223 select SYS_SUPPORTS_32BIT_KERNEL
>> 224 select SYS_HAS_EARLY_PRINTK
>> 225 help
>> 226 Support for Atheros AR231x and Atheros AR531x based boards
>> 227
>> 228 config ATH79
>> 229 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 230 select ARCH_HAS_RESET_CONTROLLER
>> 231 select BOOT_RAW
>> 232 select CEVT_R4K
>> 233 select CSRC_R4K
>> 234 select DMA_NONCOHERENT
>> 235 select GPIOLIB
>> 236 select PINCTRL
>> 237 select COMMON_CLK
>> 238 select IRQ_MIPS_CPU
>> 239 select SYS_HAS_CPU_MIPS32_R2
>> 240 select SYS_HAS_EARLY_PRINTK
>> 241 select SYS_SUPPORTS_32BIT_KERNEL
>> 242 select SYS_SUPPORTS_BIG_ENDIAN
>> 243 select SYS_SUPPORTS_MIPS16
>> 244 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 245 select USE_OF
>> 246 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 247 help
>> 248 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 249
>> 250 config BMIPS_GENERIC
>> 251 bool "Broadcom Generic BMIPS kernel"
>> 252 select ARCH_HAS_RESET_CONTROLLER
>> 253 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 254 select BOOT_RAW
>> 255 select NO_EXCEPT_FILL
>> 256 select USE_OF
>> 257 select CEVT_R4K
>> 258 select CSRC_R4K
>> 259 select SYNC_R4K
>> 260 select COMMON_CLK
>> 261 select BCM6345_L1_IRQ
>> 262 select BCM7038_L1_IRQ
>> 263 select BCM7120_L2_IRQ
>> 264 select BRCMSTB_L2_IRQ
>> 265 select IRQ_MIPS_CPU
>> 266 select DMA_NONCOHERENT
>> 267 select SYS_SUPPORTS_32BIT_KERNEL
>> 268 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 269 select SYS_SUPPORTS_BIG_ENDIAN
>> 270 select SYS_SUPPORTS_HIGHMEM
>> 271 select SYS_HAS_CPU_BMIPS32_3300
>> 272 select SYS_HAS_CPU_BMIPS4350
>> 273 select SYS_HAS_CPU_BMIPS4380
>> 274 select SYS_HAS_CPU_BMIPS5000
>> 275 select SWAP_IO_SPACE
>> 276 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 277 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 278 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 279 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 280 select HARDIRQS_SW_RESEND
>> 281 select HAVE_PCI
>> 282 select PCI_DRIVERS_GENERIC
>> 283 select FW_CFE
>> 284 help
>> 285 Build a generic DT-based kernel image that boots on select
>> 286 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 287 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 288 must be set appropriately for your board.
>> 289
>> 290 config BCM47XX
>> 291 bool "Broadcom BCM47XX based boards"
>> 292 select BOOT_RAW
>> 293 select CEVT_R4K
>> 294 select CSRC_R4K
>> 295 select DMA_NONCOHERENT
>> 296 select HAVE_PCI
>> 297 select IRQ_MIPS_CPU
>> 298 select SYS_HAS_CPU_MIPS32_R1
>> 299 select NO_EXCEPT_FILL
>> 300 select SYS_SUPPORTS_32BIT_KERNEL
>> 301 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 302 select SYS_SUPPORTS_MIPS16
>> 303 select SYS_SUPPORTS_ZBOOT
>> 304 select SYS_HAS_EARLY_PRINTK
>> 305 select USE_GENERIC_EARLY_PRINTK_8250
>> 306 select GPIOLIB
>> 307 select LEDS_GPIO_REGISTER
>> 308 select BCM47XX_NVRAM
>> 309 select BCM47XX_SPROM
>> 310 select BCM47XX_SSB if !BCM47XX_BCMA
>> 311 help
>> 312 Support for BCM47XX based boards
>> 313
>> 314 config BCM63XX
>> 315 bool "Broadcom BCM63XX based boards"
>> 316 select BOOT_RAW
>> 317 select CEVT_R4K
>> 318 select CSRC_R4K
>> 319 select SYNC_R4K
>> 320 select DMA_NONCOHERENT
>> 321 select IRQ_MIPS_CPU
>> 322 select SYS_SUPPORTS_32BIT_KERNEL
>> 323 select SYS_SUPPORTS_BIG_ENDIAN
>> 324 select SYS_HAS_EARLY_PRINTK
>> 325 select SYS_HAS_CPU_BMIPS32_3300
>> 326 select SYS_HAS_CPU_BMIPS4350
>> 327 select SYS_HAS_CPU_BMIPS4380
>> 328 select SWAP_IO_SPACE
>> 329 select GPIOLIB
>> 330 select MIPS_L1_CACHE_SHIFT_4
>> 331 select HAVE_LEGACY_CLK
>> 332 help
>> 333 Support for BCM63XX based boards
>> 334
>> 335 config MIPS_COBALT
>> 336 bool "Cobalt Server"
>> 337 select CEVT_R4K
>> 338 select CSRC_R4K
>> 339 select CEVT_GT641XX
>> 340 select DMA_NONCOHERENT
>> 341 select FORCE_PCI
>> 342 select I8253
>> 343 select I8259
>> 344 select IRQ_MIPS_CPU
>> 345 select IRQ_GT641XX
>> 346 select PCI_GT64XXX_PCI0
>> 347 select SYS_HAS_CPU_NEVADA
>> 348 select SYS_HAS_EARLY_PRINTK
>> 349 select SYS_SUPPORTS_32BIT_KERNEL
>> 350 select SYS_SUPPORTS_64BIT_KERNEL
>> 351 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 352 select USE_GENERIC_EARLY_PRINTK_8250
>> 353
>> 354 config MACH_DECSTATION
>> 355 bool "DECstations"
>> 356 select BOOT_ELF32
>> 357 select CEVT_DS1287
>> 358 select CEVT_R4K if CPU_R4X00
>> 359 select CSRC_IOASIC
>> 360 select CSRC_R4K if CPU_R4X00
>> 361 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 362 select CPU_R4000_WORKAROUNDS if 64BIT
>> 363 select CPU_R4400_WORKAROUNDS if 64BIT
>> 364 select DMA_NONCOHERENT
>> 365 select NO_IOPORT_MAP
>> 366 select IRQ_MIPS_CPU
>> 367 select SYS_HAS_CPU_R3000
>> 368 select SYS_HAS_CPU_R4X00
>> 369 select SYS_SUPPORTS_32BIT_KERNEL
>> 370 select SYS_SUPPORTS_64BIT_KERNEL
>> 371 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 372 select SYS_SUPPORTS_128HZ
>> 373 select SYS_SUPPORTS_256HZ
>> 374 select SYS_SUPPORTS_1024HZ
>> 375 select MIPS_L1_CACHE_SHIFT_4
>> 376 help
>> 377 This enables support for DEC's MIPS based workstations. For details
>> 378 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 379 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 380
>> 381 If you have one of the following DECstation Models you definitely
>> 382 want to choose R4xx0 for the CPU Type:
>> 383
>> 384 DECstation 5000/50
>> 385 DECstation 5000/150
>> 386 DECstation 5000/260
>> 387 DECsystem 5900/260
>> 388
>> 389 otherwise choose R3000.
>> 390
>> 391 config MACH_JAZZ
>> 392 bool "Jazz family of machines"
>> 393 select ARC_MEMORY
>> 394 select ARC_PROMLIB
>> 395 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 396 select ARCH_MIGHT_HAVE_PC_SERIO
>> 397 select FW_ARC
>> 398 select FW_ARC32
>> 399 select ARCH_MAY_HAVE_PC_FDC
>> 400 select CEVT_R4K
>> 401 select CSRC_R4K
>> 402 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 403 select GENERIC_ISA_DMA
>> 404 select HAVE_PCSPKR_PLATFORM
>> 405 select IRQ_MIPS_CPU
>> 406 select I8253
>> 407 select I8259
>> 408 select ISA
>> 409 select SYS_HAS_CPU_R4X00
>> 410 select SYS_SUPPORTS_32BIT_KERNEL
>> 411 select SYS_SUPPORTS_64BIT_KERNEL
>> 412 select SYS_SUPPORTS_100HZ
>> 413 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 414 help
>> 415 This a family of machines based on the MIPS R4030 chipset which was
>> 416 used by several vendors to build RISC/os and Windows NT workstations.
>> 417 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 418 Olivetti M700-10 workstations.
>> 419
>> 420 config MACH_INGENIC_SOC
>> 421 bool "Ingenic SoC based machines"
>> 422 select MIPS_GENERIC
>> 423 select MACH_INGENIC
>> 424 select MACH_GENERIC_CORE
>> 425 select SYS_SUPPORTS_ZBOOT_UART16550
>> 426 select CPU_SUPPORTS_CPUFREQ
>> 427 select MIPS_EXTERNAL_TIMER
>> 428
>> 429 config LANTIQ
>> 430 bool "Lantiq based platforms"
>> 431 select DMA_NONCOHERENT
>> 432 select IRQ_MIPS_CPU
>> 433 select CEVT_R4K
>> 434 select CSRC_R4K
>> 435 select NO_EXCEPT_FILL
>> 436 select SYS_HAS_CPU_MIPS32_R1
>> 437 select SYS_HAS_CPU_MIPS32_R2
>> 438 select SYS_SUPPORTS_BIG_ENDIAN
>> 439 select SYS_SUPPORTS_32BIT_KERNEL
>> 440 select SYS_SUPPORTS_MIPS16
>> 441 select SYS_SUPPORTS_MULTITHREADING
>> 442 select SYS_SUPPORTS_VPE_LOADER
>> 443 select SYS_HAS_EARLY_PRINTK
>> 444 select GPIOLIB
>> 445 select SWAP_IO_SPACE
>> 446 select BOOT_RAW
>> 447 select HAVE_LEGACY_CLK
>> 448 select USE_OF
>> 449 select PINCTRL
>> 450 select PINCTRL_LANTIQ
>> 451 select ARCH_HAS_RESET_CONTROLLER
>> 452 select RESET_CONTROLLER
>> 453
>> 454 config MACH_LOONGSON32
>> 455 bool "Loongson 32-bit family of machines"
>> 456 select SYS_SUPPORTS_ZBOOT
>> 457 help
>> 458 This enables support for the Loongson-1 family of machines.
>> 459
>> 460 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 461 the Institute of Computing Technology (ICT), Chinese Academy of
>> 462 Sciences (CAS).
>> 463
>> 464 config MACH_LOONGSON2EF
>> 465 bool "Loongson-2E/F family of machines"
>> 466 select SYS_SUPPORTS_ZBOOT
>> 467 help
>> 468 This enables the support of early Loongson-2E/F family of machines.
>> 469
>> 470 config MACH_LOONGSON64
>> 471 bool "Loongson 64-bit family of machines"
>> 472 select ARCH_DMA_DEFAULT_COHERENT
>> 473 select ARCH_SPARSEMEM_ENABLE
>> 474 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 475 select ARCH_MIGHT_HAVE_PC_SERIO
>> 476 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 477 select BOOT_ELF32
>> 478 select BOARD_SCACHE
>> 479 select CSRC_R4K
>> 480 select CEVT_R4K
>> 481 select SYNC_R4K
>> 482 select FORCE_PCI
>> 483 select ISA
>> 484 select I8259
>> 485 select IRQ_MIPS_CPU
>> 486 select NO_EXCEPT_FILL
>> 487 select NR_CPUS_DEFAULT_64
>> 488 select USE_GENERIC_EARLY_PRINTK_8250
>> 489 select PCI_DRIVERS_GENERIC
>> 490 select SYS_HAS_CPU_LOONGSON64
>> 491 select SYS_HAS_EARLY_PRINTK
>> 492 select SYS_SUPPORTS_SMP
>> 493 select SYS_SUPPORTS_HOTPLUG_CPU
>> 494 select SYS_SUPPORTS_NUMA
>> 495 select SYS_SUPPORTS_64BIT_KERNEL
>> 496 select SYS_SUPPORTS_HIGHMEM
>> 497 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 498 select SYS_SUPPORTS_ZBOOT
>> 499 select SYS_SUPPORTS_RELOCATABLE
>> 500 select ZONE_DMA32
>> 501 select COMMON_CLK
>> 502 select USE_OF
>> 503 select BUILTIN_DTB
>> 504 select PCI_HOST_GENERIC
>> 505 help
>> 506 This enables the support of Loongson-2/3 family of machines.
>> 507
>> 508 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
>> 509 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
>> 510 and Loongson-2F which will be removed), developed by the Institute
>> 511 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
>> 512
>> 513 config MIPS_MALTA
>> 514 bool "MIPS Malta board"
>> 515 select ARCH_MAY_HAVE_PC_FDC
>> 516 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 517 select ARCH_MIGHT_HAVE_PC_SERIO
>> 518 select BOOT_ELF32
>> 519 select BOOT_RAW
>> 520 select BUILTIN_DTB
>> 521 select CEVT_R4K
>> 522 select CLKSRC_MIPS_GIC
>> 523 select COMMON_CLK
>> 524 select CSRC_R4K
>> 525 select DMA_NONCOHERENT
>> 526 select GENERIC_ISA_DMA
>> 527 select HAVE_PCSPKR_PLATFORM
>> 528 select HAVE_PCI
>> 529 select I8253
>> 530 select I8259
>> 531 select IRQ_MIPS_CPU
>> 532 select MIPS_BONITO64
>> 533 select MIPS_CPU_SCACHE
>> 534 select MIPS_GIC
>> 535 select MIPS_L1_CACHE_SHIFT_6
>> 536 select MIPS_MSC
>> 537 select PCI_GT64XXX_PCI0
>> 538 select SMP_UP if SMP
>> 539 select SWAP_IO_SPACE
>> 540 select SYS_HAS_CPU_MIPS32_R1
>> 541 select SYS_HAS_CPU_MIPS32_R2
>> 542 select SYS_HAS_CPU_MIPS32_R3_5
>> 543 select SYS_HAS_CPU_MIPS32_R5
>> 544 select SYS_HAS_CPU_MIPS32_R6
>> 545 select SYS_HAS_CPU_MIPS64_R1
>> 546 select SYS_HAS_CPU_MIPS64_R2
>> 547 select SYS_HAS_CPU_MIPS64_R6
>> 548 select SYS_HAS_CPU_NEVADA
>> 549 select SYS_HAS_CPU_RM7000
>> 550 select SYS_SUPPORTS_32BIT_KERNEL
>> 551 select SYS_SUPPORTS_64BIT_KERNEL
>> 552 select SYS_SUPPORTS_BIG_ENDIAN
>> 553 select SYS_SUPPORTS_HIGHMEM
>> 554 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 555 select SYS_SUPPORTS_MICROMIPS
>> 556 select SYS_SUPPORTS_MIPS16
>> 557 select SYS_SUPPORTS_MIPS_CPS
>> 558 select SYS_SUPPORTS_MULTITHREADING
>> 559 select SYS_SUPPORTS_RELOCATABLE
>> 560 select SYS_SUPPORTS_SMARTMIPS
>> 561 select SYS_SUPPORTS_VPE_LOADER
>> 562 select SYS_SUPPORTS_ZBOOT
>> 563 select USE_OF
>> 564 select WAR_ICACHE_REFILLS
210 select ZONE_DMA32 if 64BIT 565 select ZONE_DMA32 if 64BIT
>> 566 help
>> 567 This enables support for the MIPS Technologies Malta evaluation
>> 568 board.
211 569
212 config RUSTC_SUPPORTS_RISCV !! 570 config MACH_PIC32
213 def_bool y !! 571 bool "Microchip PIC32 Family"
214 depends on 64BIT !! 572 help
215 # Shadow call stack requires rustc ver !! 573 This enables support for the Microchip PIC32 family of platforms.
216 # -Zsanitizer=shadow-call-stack flag. <<
217 depends on !SHADOW_CALL_STACK || RUSTC <<
218 <<
219 config CLANG_SUPPORTS_DYNAMIC_FTRACE <<
220 def_bool CC_IS_CLANG <<
221 # https://github.com/ClangBuiltLinux/l <<
222 depends on AS_IS_GNU || (AS_IS_LLVM && <<
223 <<
224 config GCC_SUPPORTS_DYNAMIC_FTRACE <<
225 def_bool CC_IS_GCC <<
226 depends on $(cc-option,-fpatchable-fun <<
227 <<
228 config HAVE_SHADOW_CALL_STACK <<
229 def_bool $(cc-option,-fsanitize=shadow <<
230 # https://github.com/riscv-non-isa/ris <<
231 depends on $(ld-option,--no-relax-gp) <<
232 574
233 config RISCV_USE_LINKER_RELAXATION !! 575 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
234 def_bool y !! 576 microcontrollers.
235 # https://github.com/llvm/llvm-project !! 577
236 depends on !LD_IS_LLD || LLD_VERSION > !! 578 config EYEQ
>> 579 bool "Mobileye EyeQ SoC"
>> 580 select MACH_GENERIC_CORE
>> 581 select ARM_AMBA
>> 582 select PHYSICAL_START_BOOL
>> 583 select ARCH_SPARSEMEM_DEFAULT if 64BIT
>> 584 select BOOT_RAW
>> 585 select BUILTIN_DTB
>> 586 select CEVT_R4K
>> 587 select CLKSRC_MIPS_GIC
>> 588 select COMMON_CLK
>> 589 select CPU_MIPSR2_IRQ_EI
>> 590 select CPU_MIPSR2_IRQ_VI
>> 591 select CSRC_R4K
>> 592 select DMA_NONCOHERENT
>> 593 select HAVE_PCI
>> 594 select IRQ_MIPS_CPU
>> 595 select MIPS_AUTO_PFN_OFFSET
>> 596 select MIPS_CPU_SCACHE
>> 597 select MIPS_GIC
>> 598 select MIPS_L1_CACHE_SHIFT_7
>> 599 select PCI_DRIVERS_GENERIC
>> 600 select SMP_UP if SMP
>> 601 select SWAP_IO_SPACE
>> 602 select SYS_HAS_CPU_MIPS64_R6
>> 603 select SYS_SUPPORTS_64BIT_KERNEL
>> 604 select SYS_SUPPORTS_HIGHMEM
>> 605 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 606 select SYS_SUPPORTS_MIPS_CPS
>> 607 select SYS_SUPPORTS_RELOCATABLE
>> 608 select SYS_SUPPORTS_ZBOOT
>> 609 select UHI_BOOT
>> 610 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 611 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 612 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 613 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 614 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 615 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 616 select USE_OF
>> 617 help
>> 618 Select this to build a kernel supporting EyeQ SoC from Mobileye.
237 619
238 # https://github.com/llvm/llvm-project/commit/ !! 620 bool
239 config ARCH_HAS_BROKEN_DWARF5 <<
240 def_bool y <<
241 depends on RISCV_USE_LINKER_RELAXATION <<
242 # https://github.com/llvm/llvm-project <<
243 depends on AS_IS_LLVM && AS_VERSION < <<
244 # https://github.com/llvm/llvm-project <<
245 depends on LD_IS_LLD && LLD_VERSION < <<
246 621
247 config ARCH_MMAP_RND_BITS_MIN !! 622 config MACH_NINTENDO64
248 default 18 if 64BIT !! 623 bool "Nintendo 64 console"
249 default 8 !! 624 select CEVT_R4K
>> 625 select CSRC_R4K
>> 626 select SYS_HAS_CPU_R4300
>> 627 select SYS_SUPPORTS_BIG_ENDIAN
>> 628 select SYS_SUPPORTS_ZBOOT
>> 629 select SYS_SUPPORTS_32BIT_KERNEL
>> 630 select SYS_SUPPORTS_64BIT_KERNEL
>> 631 select DMA_NONCOHERENT
>> 632 select IRQ_MIPS_CPU
>> 633
>> 634 config RALINK
>> 635 bool "Ralink based machines"
>> 636 select CEVT_R4K
>> 637 select COMMON_CLK
>> 638 select CSRC_R4K
>> 639 select BOOT_RAW
>> 640 select DMA_NONCOHERENT
>> 641 select IRQ_MIPS_CPU
>> 642 select USE_OF
>> 643 select SYS_HAS_CPU_MIPS32_R2
>> 644 select SYS_SUPPORTS_32BIT_KERNEL
>> 645 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 646 select SYS_SUPPORTS_MIPS16
>> 647 select SYS_SUPPORTS_ZBOOT
>> 648 select SYS_HAS_EARLY_PRINTK
>> 649 select ARCH_HAS_RESET_CONTROLLER
>> 650 select RESET_CONTROLLER
>> 651
>> 652 config MACH_REALTEK_RTL
>> 653 bool "Realtek RTL838x/RTL839x based machines"
>> 654 select MIPS_GENERIC
>> 655 select MACH_GENERIC_CORE
>> 656 select DMA_NONCOHERENT
>> 657 select IRQ_MIPS_CPU
>> 658 select CSRC_R4K
>> 659 select CEVT_R4K
>> 660 select SYS_HAS_CPU_MIPS32_R1
>> 661 select SYS_HAS_CPU_MIPS32_R2
>> 662 select SYS_SUPPORTS_BIG_ENDIAN
>> 663 select SYS_SUPPORTS_32BIT_KERNEL
>> 664 select SYS_SUPPORTS_MIPS16
>> 665 select SYS_SUPPORTS_MULTITHREADING
>> 666 select SYS_SUPPORTS_VPE_LOADER
>> 667 select BOOT_RAW
>> 668 select PINCTRL
>> 669 select USE_OF
>> 670 select REALTEK_OTTO_TIMER
>> 671
>> 672 config SGI_IP22
>> 673 bool "SGI IP22 (Indy/Indigo2)"
>> 674 select ARC_MEMORY
>> 675 select ARC_PROMLIB
>> 676 select FW_ARC
>> 677 select FW_ARC32
>> 678 select ARCH_MIGHT_HAVE_PC_SERIO
>> 679 select BOOT_ELF32
>> 680 select CEVT_R4K
>> 681 select CSRC_R4K
>> 682 select DEFAULT_SGI_PARTITION
>> 683 select DMA_NONCOHERENT
>> 684 select HAVE_EISA
>> 685 select I8253
>> 686 select I8259
>> 687 select IP22_CPU_SCACHE
>> 688 select IRQ_MIPS_CPU
>> 689 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 690 select SGI_HAS_I8042
>> 691 select SGI_HAS_INDYDOG
>> 692 select SGI_HAS_HAL2
>> 693 select SGI_HAS_SEEQ
>> 694 select SGI_HAS_WD93
>> 695 select SGI_HAS_ZILOG
>> 696 select SWAP_IO_SPACE
>> 697 select SYS_HAS_CPU_R4X00
>> 698 select SYS_HAS_CPU_R5000
>> 699 select SYS_HAS_EARLY_PRINTK
>> 700 select SYS_SUPPORTS_32BIT_KERNEL
>> 701 select SYS_SUPPORTS_64BIT_KERNEL
>> 702 select SYS_SUPPORTS_BIG_ENDIAN
>> 703 select WAR_R4600_V1_INDEX_ICACHEOP
>> 704 select WAR_R4600_V1_HIT_CACHEOP
>> 705 select WAR_R4600_V2_HIT_CACHEOP
>> 706 select MIPS_L1_CACHE_SHIFT_7
>> 707 help
>> 708 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 709 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 710 that runs on these, say Y here.
>> 711
>> 712 config SGI_IP27
>> 713 bool "SGI IP27 (Origin200/2000)"
>> 714 select ARCH_HAS_PHYS_TO_DMA
>> 715 select ARCH_SPARSEMEM_ENABLE
>> 716 select FW_ARC
>> 717 select FW_ARC64
>> 718 select ARC_CMDLINE_ONLY
>> 719 select BOOT_ELF64
>> 720 select DEFAULT_SGI_PARTITION
>> 721 select FORCE_PCI
>> 722 select SYS_HAS_EARLY_PRINTK
>> 723 select HAVE_PCI
>> 724 select IRQ_MIPS_CPU
>> 725 select IRQ_DOMAIN_HIERARCHY
>> 726 select NR_CPUS_DEFAULT_64
>> 727 select PCI_DRIVERS_GENERIC
>> 728 select PCI_XTALK_BRIDGE
>> 729 select SYS_HAS_CPU_R10000
>> 730 select SYS_SUPPORTS_64BIT_KERNEL
>> 731 select SYS_SUPPORTS_BIG_ENDIAN
>> 732 select SYS_SUPPORTS_NUMA
>> 733 select SYS_SUPPORTS_SMP
>> 734 select WAR_R10000_LLSC
>> 735 select MIPS_L1_CACHE_SHIFT_7
>> 736 select NUMA
>> 737 help
>> 738 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 739 workstations. To compile a Linux kernel that runs on these, say Y
>> 740 here.
250 741
251 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 742 config SGI_IP28
252 default 8 !! 743 bool "SGI IP28 (Indigo2 R10k)"
>> 744 select ARC_MEMORY
>> 745 select ARC_PROMLIB
>> 746 select FW_ARC
>> 747 select FW_ARC64
>> 748 select ARCH_MIGHT_HAVE_PC_SERIO
>> 749 select BOOT_ELF64
>> 750 select CEVT_R4K
>> 751 select CSRC_R4K
>> 752 select DEFAULT_SGI_PARTITION
>> 753 select DMA_NONCOHERENT
>> 754 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 755 select IRQ_MIPS_CPU
>> 756 select HAVE_EISA
>> 757 select I8253
>> 758 select I8259
>> 759 select SGI_HAS_I8042
>> 760 select SGI_HAS_INDYDOG
>> 761 select SGI_HAS_HAL2
>> 762 select SGI_HAS_SEEQ
>> 763 select SGI_HAS_WD93
>> 764 select SGI_HAS_ZILOG
>> 765 select SWAP_IO_SPACE
>> 766 select SYS_HAS_CPU_R10000
>> 767 select SYS_HAS_EARLY_PRINTK
>> 768 select SYS_SUPPORTS_64BIT_KERNEL
>> 769 select SYS_SUPPORTS_BIG_ENDIAN
>> 770 select WAR_R10000_LLSC
>> 771 select MIPS_L1_CACHE_SHIFT_7
>> 772 help
>> 773 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 774 kernel that runs on these, say Y here.
>> 775
>> 776 config SGI_IP30
>> 777 bool "SGI IP30 (Octane/Octane2)"
>> 778 select ARCH_HAS_PHYS_TO_DMA
>> 779 select FW_ARC
>> 780 select FW_ARC64
>> 781 select BOOT_ELF64
>> 782 select CEVT_R4K
>> 783 select CSRC_R4K
>> 784 select FORCE_PCI
>> 785 select SYNC_R4K if SMP
>> 786 select ZONE_DMA32
>> 787 select HAVE_PCI
>> 788 select IRQ_MIPS_CPU
>> 789 select IRQ_DOMAIN_HIERARCHY
>> 790 select PCI_DRIVERS_GENERIC
>> 791 select PCI_XTALK_BRIDGE
>> 792 select SYS_HAS_EARLY_PRINTK
>> 793 select SYS_HAS_CPU_R10000
>> 794 select SYS_SUPPORTS_64BIT_KERNEL
>> 795 select SYS_SUPPORTS_BIG_ENDIAN
>> 796 select SYS_SUPPORTS_SMP
>> 797 select WAR_R10000_LLSC
>> 798 select MIPS_L1_CACHE_SHIFT_7
>> 799 select ARC_MEMORY
>> 800 help
>> 801 These are the SGI Octane and Octane2 graphics workstations. To
>> 802 compile a Linux kernel that runs on these, say Y here.
>> 803
>> 804 config SGI_IP32
>> 805 bool "SGI IP32 (O2)"
>> 806 select ARC_MEMORY
>> 807 select ARC_PROMLIB
>> 808 select ARCH_HAS_PHYS_TO_DMA
>> 809 select FW_ARC
>> 810 select FW_ARC32
>> 811 select BOOT_ELF32
>> 812 select CEVT_R4K
>> 813 select CSRC_R4K
>> 814 select DMA_NONCOHERENT
>> 815 select HAVE_PCI
>> 816 select IRQ_MIPS_CPU
>> 817 select R5000_CPU_SCACHE
>> 818 select RM7000_CPU_SCACHE
>> 819 select SYS_HAS_CPU_R5000
>> 820 select SYS_HAS_CPU_R10000 if BROKEN
>> 821 select SYS_HAS_CPU_RM7000
>> 822 select SYS_HAS_CPU_NEVADA
>> 823 select SYS_SUPPORTS_64BIT_KERNEL
>> 824 select SYS_SUPPORTS_BIG_ENDIAN
>> 825 select WAR_ICACHE_REFILLS
>> 826 help
>> 827 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 828
>> 829 config SIBYTE_CRHONE
>> 830 bool "Sibyte BCM91125C-CRhone"
>> 831 select BOOT_ELF32
>> 832 select SIBYTE_BCM1125
>> 833 select SWAP_IO_SPACE
>> 834 select SYS_HAS_CPU_SB1
>> 835 select SYS_SUPPORTS_BIG_ENDIAN
>> 836 select SYS_SUPPORTS_HIGHMEM
>> 837 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 838
>> 839 config SIBYTE_RHONE
>> 840 bool "Sibyte BCM91125E-Rhone"
>> 841 select BOOT_ELF32
>> 842 select SIBYTE_SB1250
>> 843 select SWAP_IO_SPACE
>> 844 select SYS_HAS_CPU_SB1
>> 845 select SYS_SUPPORTS_BIG_ENDIAN
>> 846 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 847
>> 848 config SIBYTE_SWARM
>> 849 bool "Sibyte BCM91250A-SWARM"
>> 850 select BOOT_ELF32
>> 851 select HAVE_PATA_PLATFORM
>> 852 select SIBYTE_SB1250
>> 853 select SWAP_IO_SPACE
>> 854 select SYS_HAS_CPU_SB1
>> 855 select SYS_SUPPORTS_BIG_ENDIAN
>> 856 select SYS_SUPPORTS_HIGHMEM
>> 857 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 858 select ZONE_DMA32 if 64BIT
>> 859 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
253 860
254 # max bits determined by the following formula !! 861 config SIBYTE_LITTLESUR
255 # VA_BITS - PAGE_SHIFT - 3 !! 862 bool "Sibyte BCM91250C2-LittleSur"
256 config ARCH_MMAP_RND_BITS_MAX !! 863 select BOOT_ELF32
257 default 24 if 64BIT # SV39 based !! 864 select HAVE_PATA_PLATFORM
258 default 17 !! 865 select SIBYTE_SB1250
>> 866 select SWAP_IO_SPACE
>> 867 select SYS_HAS_CPU_SB1
>> 868 select SYS_SUPPORTS_BIG_ENDIAN
>> 869 select SYS_SUPPORTS_HIGHMEM
>> 870 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 871 select ZONE_DMA32 if 64BIT
259 872
260 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 873 config SIBYTE_SENTOSA
261 default 17 !! 874 bool "Sibyte BCM91250E-Sentosa"
>> 875 select BOOT_ELF32
>> 876 select SIBYTE_SB1250
>> 877 select SWAP_IO_SPACE
>> 878 select SYS_HAS_CPU_SB1
>> 879 select SYS_SUPPORTS_BIG_ENDIAN
>> 880 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 881 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 882
>> 883 config SIBYTE_BIGSUR
>> 884 bool "Sibyte BCM91480B-BigSur"
>> 885 select BOOT_ELF32
>> 886 select NR_CPUS_DEFAULT_4
>> 887 select SIBYTE_BCM1x80
>> 888 select SWAP_IO_SPACE
>> 889 select SYS_HAS_CPU_SB1
>> 890 select SYS_SUPPORTS_BIG_ENDIAN
>> 891 select SYS_SUPPORTS_HIGHMEM
>> 892 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 893 select ZONE_DMA32 if 64BIT
>> 894 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
262 895
263 # set if we run in machine mode, cleared if we !! 896 config SNI_RM
264 config RISCV_M_MODE !! 897 bool "SNI RM200/300/400"
265 bool "Build a kernel that runs in mach !! 898 select ARC_MEMORY
266 depends on !MMU !! 899 select ARC_PROMLIB
267 default y !! 900 select FW_ARC if CPU_LITTLE_ENDIAN
>> 901 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 902 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 903 select ARCH_MAY_HAVE_PC_FDC
>> 904 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 905 select ARCH_MIGHT_HAVE_PC_SERIO
>> 906 select BOOT_ELF32
>> 907 select CEVT_R4K
>> 908 select CSRC_R4K
>> 909 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 910 select DMA_NONCOHERENT
>> 911 select GENERIC_ISA_DMA
>> 912 select HAVE_EISA
>> 913 select HAVE_PCSPKR_PLATFORM
>> 914 select HAVE_PCI
>> 915 select IRQ_MIPS_CPU
>> 916 select I8253
>> 917 select I8259
>> 918 select ISA
>> 919 select MIPS_L1_CACHE_SHIFT_6
>> 920 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 921 select SYS_HAS_CPU_R4X00
>> 922 select SYS_HAS_CPU_R5000
>> 923 select SYS_HAS_CPU_R10000
>> 924 select R5000_CPU_SCACHE
>> 925 select SYS_HAS_EARLY_PRINTK
>> 926 select SYS_SUPPORTS_32BIT_KERNEL
>> 927 select SYS_SUPPORTS_64BIT_KERNEL
>> 928 select SYS_SUPPORTS_BIG_ENDIAN
>> 929 select SYS_SUPPORTS_HIGHMEM
>> 930 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 931 select WAR_R4600_V2_HIT_CACHEOP
>> 932 help
>> 933 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 934 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 935 Technology and now in turn merged with Fujitsu. Say Y here to
>> 936 support this machine type.
>> 937
>> 938 config MACH_TX49XX
>> 939 bool "Toshiba TX49 series based machines"
>> 940 select WAR_TX49XX_ICACHE_INDEX_INV
>> 941
>> 942 config MIKROTIK_RB532
>> 943 bool "Mikrotik RB532 boards"
>> 944 select CEVT_R4K
>> 945 select CSRC_R4K
>> 946 select DMA_NONCOHERENT
>> 947 select HAVE_PCI
>> 948 select IRQ_MIPS_CPU
>> 949 select SYS_HAS_CPU_MIPS32_R1
>> 950 select SYS_SUPPORTS_32BIT_KERNEL
>> 951 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 952 select SWAP_IO_SPACE
>> 953 select BOOT_RAW
>> 954 select GPIOLIB
>> 955 select MIPS_L1_CACHE_SHIFT_4
>> 956 help
>> 957 Support the Mikrotik(tm) RouterBoard 532 series,
>> 958 based on the IDT RC32434 SoC.
>> 959
>> 960 config CAVIUM_OCTEON_SOC
>> 961 bool "Cavium Networks Octeon SoC based boards"
>> 962 select CEVT_R4K
>> 963 select ARCH_HAS_PHYS_TO_DMA
>> 964 select HAVE_RAPIDIO
>> 965 select PHYS_ADDR_T_64BIT
>> 966 select SYS_SUPPORTS_64BIT_KERNEL
>> 967 select SYS_SUPPORTS_BIG_ENDIAN
>> 968 select EDAC_SUPPORT
>> 969 select EDAC_ATOMIC_SCRUB
>> 970 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 971 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 972 select SYS_HAS_EARLY_PRINTK
>> 973 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 974 select HAVE_PCI
>> 975 select HAVE_PLAT_DELAY
>> 976 select HAVE_PLAT_FW_INIT_CMDLINE
>> 977 select HAVE_PLAT_MEMCPY
>> 978 select ZONE_DMA32
>> 979 select GPIOLIB
>> 980 select USE_OF
>> 981 select ARCH_SPARSEMEM_ENABLE
>> 982 select SYS_SUPPORTS_SMP
>> 983 select NR_CPUS_DEFAULT_64
>> 984 select MIPS_NR_CPU_NR_MAP_1024
>> 985 select BUILTIN_DTB
>> 986 select MTD
>> 987 select MTD_COMPLEX_MAPPINGS
>> 988 select SWIOTLB
>> 989 select SYS_SUPPORTS_RELOCATABLE
>> 990 help
>> 991 This option supports all of the Octeon reference boards from Cavium
>> 992 Networks. It builds a kernel that dynamically determines the Octeon
>> 993 CPU type and supports all known board reference implementations.
>> 994 Some of the supported boards are:
>> 995 EBT3000
>> 996 EBH3000
>> 997 EBH3100
>> 998 Thunder
>> 999 Kodama
>> 1000 Hikari
>> 1001 Say Y here for most Octeon reference boards.
>> 1002
>> 1003 endchoice
>> 1004
>> 1005 config FIT_IMAGE_FDT_EPM5
>> 1006 bool "Include FDT for Mobileye EyeQ5 development platforms"
>> 1007 depends on MACH_EYEQ5
>> 1008 default n
268 help 1009 help
269 Select this option if you want to ru !! 1010 Enable this to include the FDT for the EyeQ5 development platforms
270 without the assistance of any other !! 1011 from Mobileye in the FIT kernel image.
>> 1012 This requires u-boot on the platform.
>> 1013
>> 1014 source "arch/mips/alchemy/Kconfig"
>> 1015 source "arch/mips/ath25/Kconfig"
>> 1016 source "arch/mips/ath79/Kconfig"
>> 1017 source "arch/mips/bcm47xx/Kconfig"
>> 1018 source "arch/mips/bcm63xx/Kconfig"
>> 1019 source "arch/mips/bmips/Kconfig"
>> 1020 source "arch/mips/generic/Kconfig"
>> 1021 source "arch/mips/ingenic/Kconfig"
>> 1022 source "arch/mips/jazz/Kconfig"
>> 1023 source "arch/mips/lantiq/Kconfig"
>> 1024 source "arch/mips/mobileye/Kconfig"
>> 1025 source "arch/mips/pic32/Kconfig"
>> 1026 source "arch/mips/ralink/Kconfig"
>> 1027 source "arch/mips/sgi-ip27/Kconfig"
>> 1028 source "arch/mips/sibyte/Kconfig"
>> 1029 source "arch/mips/txx9/Kconfig"
>> 1030 source "arch/mips/cavium-octeon/Kconfig"
>> 1031 source "arch/mips/loongson2ef/Kconfig"
>> 1032 source "arch/mips/loongson32/Kconfig"
>> 1033 source "arch/mips/loongson64/Kconfig"
271 1034
272 # set if we are running in S-mode and can use !! 1035 endmenu
273 config RISCV_SBI !! 1036
>> 1037 config GENERIC_HWEIGHT
274 bool 1038 bool
275 depends on !RISCV_M_MODE <<
276 default y 1039 default y
277 1040
278 config MMU !! 1041 config GENERIC_CALIBRATE_DELAY
279 bool "MMU-based Paged Memory Managemen !! 1042 bool
280 default y 1043 default y
281 help <<
282 Select if you want MMU-based virtual <<
283 support by paged memory management. <<
284 1044
285 config PAGE_OFFSET !! 1045 config SCHED_OMIT_FRAME_POINTER
286 hex !! 1046 bool
287 default 0x80000000 if !MMU && RISCV_M_ !! 1047 default y
288 default 0x80200000 if !MMU <<
289 default 0xc0000000 if 32BIT <<
290 default 0xff60000000000000 if 64BIT <<
291 <<
292 config KASAN_SHADOW_OFFSET <<
293 hex <<
294 depends on KASAN_GENERIC <<
295 default 0xdfffffff00000000 if 64BIT <<
296 default 0xffffffff if 32BIT <<
297 1048
298 config ARCH_FLATMEM_ENABLE !! 1049 #
299 def_bool !NUMA !! 1050 # Select some configuration options automatically based on user selections.
>> 1051 #
>> 1052 config FW_ARC
>> 1053 bool
300 1054
301 config ARCH_SPARSEMEM_ENABLE !! 1055 config ARCH_MAY_HAVE_PC_FDC
302 def_bool y !! 1056 bool
303 depends on MMU <<
304 select SPARSEMEM_STATIC if 32BIT && SP <<
305 select SPARSEMEM_VMEMMAP_ENABLE if 64B <<
306 1057
307 config ARCH_SELECT_MEMORY_MODEL !! 1058 config BOOT_RAW
308 def_bool ARCH_SPARSEMEM_ENABLE !! 1059 bool
309 1060
310 config ARCH_SUPPORTS_UPROBES !! 1061 config CEVT_BCM1480
311 def_bool y !! 1062 bool
312 1063
313 config STACKTRACE_SUPPORT !! 1064 config CEVT_DS1287
314 def_bool y !! 1065 bool
315 1066
316 config GENERIC_BUG !! 1067 config CEVT_GT641XX
317 def_bool y !! 1068 bool
318 depends on BUG <<
319 select GENERIC_BUG_RELATIVE_POINTERS i <<
320 1069
321 config GENERIC_BUG_RELATIVE_POINTERS !! 1070 config CEVT_R4K
322 bool 1071 bool
323 1072
324 config GENERIC_CALIBRATE_DELAY !! 1073 config CEVT_SB1250
325 def_bool y !! 1074 bool
326 1075
327 config GENERIC_CSUM !! 1076 config CEVT_TXX9
328 def_bool y !! 1077 bool
329 1078
330 config GENERIC_HWEIGHT !! 1079 config CSRC_BCM1480
331 def_bool y !! 1080 bool
332 1081
333 config FIX_EARLYCON_MEM !! 1082 config CSRC_IOASIC
334 def_bool MMU !! 1083 bool
335 1084
336 config ILLEGAL_POINTER_VALUE !! 1085 config CSRC_R4K
337 hex !! 1086 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
338 default 0 if 32BIT !! 1087 select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT
339 default 0xdead000000000000 if 64BIT !! 1088 bool
340 1089
341 config PGTABLE_LEVELS !! 1090 config CSRC_SB1250
342 int !! 1091 bool
343 default 5 if 64BIT <<
344 default 2 <<
345 1092
346 config LOCKDEP_SUPPORT !! 1093 config MIPS_CLOCK_VSYSCALL
>> 1094 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1095
>> 1096 config GPIO_TXX9
>> 1097 select GPIOLIB
>> 1098 bool
>> 1099
>> 1100 config FW_CFE
>> 1101 bool
>> 1102
>> 1103 config ARCH_SUPPORTS_UPROBES
347 def_bool y 1104 def_bool y
348 1105
349 config RISCV_DMA_NONCOHERENT !! 1106 config DMA_NONCOHERENT
350 bool 1107 bool
351 select ARCH_HAS_DMA_PREP_COHERENT !! 1108 #
>> 1109 # MIPS allows mixing "slightly different" Cacheability and Coherency
>> 1110 # Attribute bits. It is believed that the uncached access through
>> 1111 # KSEG1 and the implementation specific "uncached accelerated" used
>> 1112 # by pgprot_writcombine can be mixed, and the latter sometimes provides
>> 1113 # significant advantages.
>> 1114 #
352 select ARCH_HAS_SETUP_DMA_OPS 1115 select ARCH_HAS_SETUP_DMA_OPS
>> 1116 select ARCH_HAS_DMA_WRITE_COMBINE
>> 1117 select ARCH_HAS_DMA_PREP_COHERENT
353 select ARCH_HAS_SYNC_DMA_FOR_CPU 1118 select ARCH_HAS_SYNC_DMA_FOR_CPU
354 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 1119 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
355 select DMA_BOUNCE_UNALIGNED_KMALLOC if !! 1120 select ARCH_HAS_DMA_SET_UNCACHED
>> 1121 select DMA_NONCOHERENT_MMAP
>> 1122 select NEED_DMA_MAP_STATE
356 1123
357 config RISCV_NONSTANDARD_CACHE_OPS !! 1124 config SYS_HAS_EARLY_PRINTK
358 bool 1125 bool
359 help <<
360 This enables function pointer suppor <<
361 systems to handle cache management. <<
362 1126
363 config AS_HAS_INSN !! 1127 config SYS_SUPPORTS_HOTPLUG_CPU
364 def_bool $(as-instr,.insn r 51$(comma) !! 1128 bool
365 1129
366 config AS_HAS_OPTION_ARCH !! 1130 config MIPS_BONITO64
367 # https://github.com/llvm/llvm-project !! 1131 bool
368 def_bool y <<
369 depends on $(as-instr, .option arch$(c <<
370 1132
371 source "arch/riscv/Kconfig.socs" !! 1133 config MIPS_MSC
372 source "arch/riscv/Kconfig.errata" !! 1134 bool
373 1135
374 menu "Platform type" !! 1136 config SYNC_R4K
>> 1137 bool
375 1138
376 config NONPORTABLE !! 1139 config NO_IOPORT_MAP
377 bool "Allow configurations that result !! 1140 def_bool n
378 help <<
379 RISC-V kernel binaries are compatibl <<
380 whenever possible, but there are som <<
381 satisfied by configurations that res <<
382 not portable between systems. <<
383 1141
384 Selecting N does not guarantee kerne !! 1142 config GENERIC_CSUM
385 systems. Selecting any of the optio !! 1143 def_bool CPU_NO_LOAD_STORE_LR
386 result in kernel binaries that are u <<
387 systems. <<
388 1144
389 If unsure, say N. !! 1145 config GENERIC_ISA_DMA
>> 1146 bool
>> 1147 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1148 select ISA_DMA_API
390 1149
391 choice !! 1150 config GENERIC_ISA_DMA_SUPPORT_BROKEN
392 prompt "Base ISA" !! 1151 bool
393 default ARCH_RV64I !! 1152 select GENERIC_ISA_DMA
394 help <<
395 This selects the base ISA that this <<
396 the target platform. <<
397 1153
398 config ARCH_RV32I !! 1154 config HAVE_PLAT_DELAY
399 bool "RV32I" !! 1155 bool
400 depends on NONPORTABLE <<
401 select 32BIT <<
402 select GENERIC_LIB_ASHLDI3 <<
403 select GENERIC_LIB_ASHRDI3 <<
404 select GENERIC_LIB_LSHRDI3 <<
405 select GENERIC_LIB_UCMPDI2 <<
406 1156
407 config ARCH_RV64I !! 1157 config HAVE_PLAT_FW_INIT_CMDLINE
408 bool "RV64I" !! 1158 bool
409 select 64BIT <<
410 select ARCH_SUPPORTS_INT128 if CC_HAS_ <<
411 select SWIOTLB if MMU <<
412 1159
413 endchoice !! 1160 config HAVE_PLAT_MEMCPY
>> 1161 bool
>> 1162
>> 1163 config ISA_DMA_API
>> 1164 bool
>> 1165
>> 1166 config SYS_SUPPORTS_RELOCATABLE
>> 1167 bool
>> 1168 help
>> 1169 Selected if the platform supports relocating the kernel.
>> 1170 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1171 to allow access to command line and entropy sources.
414 1172
415 # We must be able to map all physical memory i !! 1173 #
416 # is still a bit more efficient when generatin !! 1174 # Endianness selection. Sufficiently obscure so many users don't know what to
417 # such that it can only map 2GiB of memory. !! 1175 # answer,so we try hard to limit the available choices. Also the use of a
>> 1176 # choice statement should be more obvious to the user.
>> 1177 #
418 choice 1178 choice
419 prompt "Kernel Code Model" !! 1179 prompt "Endianness selection"
420 default CMODEL_MEDLOW if 32BIT !! 1180 help
421 default CMODEL_MEDANY if 64BIT !! 1181 Some MIPS machines can be configured for either little or big endian
422 !! 1182 byte order. These modes require different kernels and a different
423 config CMODEL_MEDLOW !! 1183 Linux distribution. In general there is one preferred byteorder for a
424 bool "medium low code model" !! 1184 particular system but some systems are just as commonly used in the
425 config CMODEL_MEDANY !! 1185 one or the other endianness.
426 bool "medium any code model" !! 1186
>> 1187 config CPU_BIG_ENDIAN
>> 1188 bool "Big endian"
>> 1189 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1190
>> 1191 config CPU_LITTLE_ENDIAN
>> 1192 bool "Little endian"
>> 1193 depends on SYS_SUPPORTS_LITTLE_ENDIAN
>> 1194
427 endchoice 1195 endchoice
428 1196
429 config MODULE_SECTIONS !! 1197 config EXPORT_UASM
430 bool 1198 bool
431 select HAVE_MOD_ARCH_SPECIFIC <<
432 1199
433 config SMP !! 1200 config SYS_SUPPORTS_APM_EMULATION
434 bool "Symmetric Multi-Processing" !! 1201 bool
435 help <<
436 This enables support for systems wit <<
437 you say N here, the kernel will run <<
438 multiprocessor machines, but will us <<
439 multiprocessor machine. If you say Y <<
440 on many, but not all, single process <<
441 processor machine, the kernel will r <<
442 here. <<
443 1202
444 If you don't know what to do here, s !! 1203 config SYS_SUPPORTS_BIG_ENDIAN
>> 1204 bool
445 1205
446 config SCHED_MC !! 1206 config SYS_SUPPORTS_LITTLE_ENDIAN
447 bool "Multi-core scheduler support" !! 1207 bool
448 depends on SMP <<
449 help <<
450 Multi-core scheduler support improve <<
451 making when dealing with multi-core <<
452 increased overhead in some places. I <<
453 1208
454 config NR_CPUS !! 1209 config MIPS_HUGE_TLB_SUPPORT
455 int "Maximum number of CPUs (2-512)" !! 1210 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
456 depends on SMP <<
457 range 2 512 if !RISCV_SBI_V01 <<
458 range 2 32 if RISCV_SBI_V01 && 32BIT <<
459 range 2 64 if RISCV_SBI_V01 && 64BIT <<
460 default "32" if 32BIT <<
461 default "64" if 64BIT <<
462 1211
463 config HOTPLUG_CPU !! 1212 config IRQ_TXX9
464 bool "Support for hot-pluggable CPUs" !! 1213 bool
465 depends on SMP <<
466 select GENERIC_IRQ_MIGRATION <<
467 help <<
468 1214
469 Say Y here to experiment with turnin !! 1215 config IRQ_GT641XX
470 can be controlled through /sys/devic !! 1216 bool
471 1217
472 Say N if you want to disable CPU hot !! 1218 config PCI_GT64XXX_PCI0
>> 1219 bool
>> 1220
>> 1221 config PCI_XTALK_BRIDGE
>> 1222 bool
>> 1223
>> 1224 config NO_EXCEPT_FILL
>> 1225 bool
>> 1226
>> 1227 config MIPS_SPRAM
>> 1228 bool
>> 1229
>> 1230 config SWAP_IO_SPACE
>> 1231 bool
>> 1232
>> 1233 config SGI_HAS_INDYDOG
>> 1234 bool
>> 1235
>> 1236 config SGI_HAS_HAL2
>> 1237 bool
>> 1238
>> 1239 config SGI_HAS_SEEQ
>> 1240 bool
>> 1241
>> 1242 config SGI_HAS_WD93
>> 1243 bool
>> 1244
>> 1245 config SGI_HAS_ZILOG
>> 1246 bool
>> 1247
>> 1248 config SGI_HAS_I8042
>> 1249 bool
>> 1250
>> 1251 config DEFAULT_SGI_PARTITION
>> 1252 bool
>> 1253
>> 1254 config FW_ARC32
>> 1255 bool
>> 1256
>> 1257 config FW_SNIPROM
>> 1258 bool
>> 1259
>> 1260 config BOOT_ELF32
>> 1261 bool
>> 1262
>> 1263 config MIPS_L1_CACHE_SHIFT_4
>> 1264 bool
>> 1265
>> 1266 config MIPS_L1_CACHE_SHIFT_5
>> 1267 bool
>> 1268
>> 1269 config MIPS_L1_CACHE_SHIFT_6
>> 1270 bool
>> 1271
>> 1272 config MIPS_L1_CACHE_SHIFT_7
>> 1273 bool
>> 1274
>> 1275 config MIPS_L1_CACHE_SHIFT
>> 1276 int
>> 1277 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1278 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1279 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1280 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1281 default "5"
>> 1282
>> 1283 config ARC_CMDLINE_ONLY
>> 1284 bool
>> 1285
>> 1286 config ARC_CONSOLE
>> 1287 bool "ARC console support"
>> 1288 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1289
>> 1290 config ARC_MEMORY
>> 1291 bool
>> 1292
>> 1293 config ARC_PROMLIB
>> 1294 bool
>> 1295
>> 1296 config FW_ARC64
>> 1297 bool
>> 1298
>> 1299 config BOOT_ELF64
>> 1300 bool
>> 1301
>> 1302 menu "CPU selection"
473 1303
474 choice 1304 choice
475 prompt "CPU Tuning" !! 1305 prompt "CPU type"
476 default TUNE_GENERIC !! 1306 default CPU_R4X00
477 1307
478 config TUNE_GENERIC !! 1308 config CPU_LOONGSON64
479 bool "generic" !! 1309 bool "Loongson 64-bit CPU"
>> 1310 depends on SYS_HAS_CPU_LOONGSON64
>> 1311 select ARCH_HAS_PHYS_TO_DMA
>> 1312 select CPU_MIPSR2
>> 1313 select CPU_HAS_PREFETCH
>> 1314 select CPU_SUPPORTS_64BIT_KERNEL
>> 1315 select CPU_SUPPORTS_HIGHMEM
>> 1316 select CPU_SUPPORTS_HUGEPAGES
>> 1317 select CPU_SUPPORTS_MSA
>> 1318 select CPU_SUPPORTS_VZ
>> 1319 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
>> 1320 select CPU_MIPSR2_IRQ_VI
>> 1321 select DMA_NONCOHERENT
>> 1322 select WEAK_ORDERING
>> 1323 select WEAK_REORDERING_BEYOND_LLSC
>> 1324 select MIPS_ASID_BITS_VARIABLE
>> 1325 select MIPS_PGD_C0_CONTEXT
>> 1326 select MIPS_L1_CACHE_SHIFT_6
>> 1327 select MIPS_FP_SUPPORT
>> 1328 select GPIOLIB
>> 1329 select SWIOTLB
>> 1330 help
>> 1331 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
>> 1332 cores implements the MIPS64R2 instruction set with many extensions,
>> 1333 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
>> 1334 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
>> 1335 Loongson-2E/2F is not covered here and will be removed in future.
>> 1336
>> 1337 config CPU_LOONGSON2E
>> 1338 bool "Loongson 2E"
>> 1339 depends on SYS_HAS_CPU_LOONGSON2E
>> 1340 select CPU_LOONGSON2EF
>> 1341 help
>> 1342 The Loongson 2E processor implements the MIPS III instruction set
>> 1343 with many extensions.
>> 1344
>> 1345 It has an internal FPGA northbridge, which is compatible to
>> 1346 bonito64.
>> 1347
>> 1348 config CPU_LOONGSON2F
>> 1349 bool "Loongson 2F"
>> 1350 depends on SYS_HAS_CPU_LOONGSON2F
>> 1351 select CPU_LOONGSON2EF
>> 1352 help
>> 1353 The Loongson 2F processor implements the MIPS III instruction set
>> 1354 with many extensions.
>> 1355
>> 1356 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1357 have a similar programming interface with FPGA northbridge used in
>> 1358 Loongson2E.
>> 1359
>> 1360 config CPU_LOONGSON1B
>> 1361 bool "Loongson 1B"
>> 1362 depends on SYS_HAS_CPU_LOONGSON1B
>> 1363 select CPU_LOONGSON32
>> 1364 select LEDS_GPIO_REGISTER
>> 1365 help
>> 1366 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1367 Release 1 instruction set and part of the MIPS32 Release 2
>> 1368 instruction set.
>> 1369
>> 1370 config CPU_LOONGSON1C
>> 1371 bool "Loongson 1C"
>> 1372 depends on SYS_HAS_CPU_LOONGSON1C
>> 1373 select CPU_LOONGSON32
>> 1374 select LEDS_GPIO_REGISTER
>> 1375 help
>> 1376 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1377 Release 1 instruction set and part of the MIPS32 Release 2
>> 1378 instruction set.
>> 1379
>> 1380 config CPU_MIPS32_R1
>> 1381 bool "MIPS32 Release 1"
>> 1382 depends on SYS_HAS_CPU_MIPS32_R1
>> 1383 select CPU_HAS_PREFETCH
>> 1384 select CPU_SUPPORTS_32BIT_KERNEL
>> 1385 select CPU_SUPPORTS_HIGHMEM
>> 1386 help
>> 1387 Choose this option to build a kernel for release 1 or later of the
>> 1388 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1389 MIPS processor are based on a MIPS32 processor. If you know the
>> 1390 specific type of processor in your system, choose those that one
>> 1391 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1392 Release 2 of the MIPS32 architecture is available since several
>> 1393 years so chances are you even have a MIPS32 Release 2 processor
>> 1394 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1395 performance.
>> 1396
>> 1397 config CPU_MIPS32_R2
>> 1398 bool "MIPS32 Release 2"
>> 1399 depends on SYS_HAS_CPU_MIPS32_R2
>> 1400 select CPU_HAS_PREFETCH
>> 1401 select CPU_SUPPORTS_32BIT_KERNEL
>> 1402 select CPU_SUPPORTS_HIGHMEM
>> 1403 select CPU_SUPPORTS_MSA
>> 1404 help
>> 1405 Choose this option to build a kernel for release 2 or later of the
>> 1406 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1407 MIPS processor are based on a MIPS32 processor. If you know the
>> 1408 specific type of processor in your system, choose those that one
>> 1409 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1410
>> 1411 config CPU_MIPS32_R5
>> 1412 bool "MIPS32 Release 5"
>> 1413 depends on SYS_HAS_CPU_MIPS32_R5
>> 1414 select CPU_HAS_PREFETCH
>> 1415 select CPU_SUPPORTS_32BIT_KERNEL
>> 1416 select CPU_SUPPORTS_HIGHMEM
>> 1417 select CPU_SUPPORTS_MSA
>> 1418 select CPU_SUPPORTS_VZ
>> 1419 select MIPS_O32_FP64_SUPPORT
>> 1420 help
>> 1421 Choose this option to build a kernel for release 5 or later of the
>> 1422 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1423 family, are based on a MIPS32r5 processor. If you own an older
>> 1424 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1425
>> 1426 config CPU_MIPS32_R6
>> 1427 bool "MIPS32 Release 6"
>> 1428 depends on SYS_HAS_CPU_MIPS32_R6
>> 1429 select CPU_HAS_PREFETCH
>> 1430 select CPU_NO_LOAD_STORE_LR
>> 1431 select CPU_SUPPORTS_32BIT_KERNEL
>> 1432 select CPU_SUPPORTS_HIGHMEM
>> 1433 select CPU_SUPPORTS_MSA
>> 1434 select CPU_SUPPORTS_VZ
>> 1435 select MIPS_O32_FP64_SUPPORT
>> 1436 help
>> 1437 Choose this option to build a kernel for release 6 or later of the
>> 1438 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1439 family, are based on a MIPS32r6 processor. If you own an older
>> 1440 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1441
>> 1442 config CPU_MIPS64_R1
>> 1443 bool "MIPS64 Release 1"
>> 1444 depends on SYS_HAS_CPU_MIPS64_R1
>> 1445 select CPU_HAS_PREFETCH
>> 1446 select CPU_SUPPORTS_32BIT_KERNEL
>> 1447 select CPU_SUPPORTS_64BIT_KERNEL
>> 1448 select CPU_SUPPORTS_HIGHMEM
>> 1449 select CPU_SUPPORTS_HUGEPAGES
>> 1450 help
>> 1451 Choose this option to build a kernel for release 1 or later of the
>> 1452 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1453 MIPS processor are based on a MIPS64 processor. If you know the
>> 1454 specific type of processor in your system, choose those that one
>> 1455 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1456 Release 2 of the MIPS64 architecture is available since several
>> 1457 years so chances are you even have a MIPS64 Release 2 processor
>> 1458 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1459 performance.
>> 1460
>> 1461 config CPU_MIPS64_R2
>> 1462 bool "MIPS64 Release 2"
>> 1463 depends on SYS_HAS_CPU_MIPS64_R2
>> 1464 select CPU_HAS_PREFETCH
>> 1465 select CPU_SUPPORTS_32BIT_KERNEL
>> 1466 select CPU_SUPPORTS_64BIT_KERNEL
>> 1467 select CPU_SUPPORTS_HIGHMEM
>> 1468 select CPU_SUPPORTS_HUGEPAGES
>> 1469 select CPU_SUPPORTS_MSA
>> 1470 help
>> 1471 Choose this option to build a kernel for release 2 or later of the
>> 1472 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1473 MIPS processor are based on a MIPS64 processor. If you know the
>> 1474 specific type of processor in your system, choose those that one
>> 1475 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1476
>> 1477 config CPU_MIPS64_R5
>> 1478 bool "MIPS64 Release 5"
>> 1479 depends on SYS_HAS_CPU_MIPS64_R5
>> 1480 select CPU_HAS_PREFETCH
>> 1481 select CPU_SUPPORTS_32BIT_KERNEL
>> 1482 select CPU_SUPPORTS_64BIT_KERNEL
>> 1483 select CPU_SUPPORTS_HIGHMEM
>> 1484 select CPU_SUPPORTS_HUGEPAGES
>> 1485 select CPU_SUPPORTS_MSA
>> 1486 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1487 select CPU_SUPPORTS_VZ
>> 1488 help
>> 1489 Choose this option to build a kernel for release 5 or later of the
>> 1490 MIPS64 architecture. This is a intermediate MIPS architecture
>> 1491 release partly implementing release 6 features. Though there is no
>> 1492 any hardware known to be based on this release.
>> 1493
>> 1494 config CPU_MIPS64_R6
>> 1495 bool "MIPS64 Release 6"
>> 1496 depends on SYS_HAS_CPU_MIPS64_R6
>> 1497 select CPU_HAS_PREFETCH
>> 1498 select CPU_NO_LOAD_STORE_LR
>> 1499 select CPU_SUPPORTS_32BIT_KERNEL
>> 1500 select CPU_SUPPORTS_64BIT_KERNEL
>> 1501 select CPU_SUPPORTS_HIGHMEM
>> 1502 select CPU_SUPPORTS_HUGEPAGES
>> 1503 select CPU_SUPPORTS_MSA
>> 1504 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1505 select CPU_SUPPORTS_VZ
>> 1506 help
>> 1507 Choose this option to build a kernel for release 6 or later of the
>> 1508 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1509 family, are based on a MIPS64r6 processor. If you own an older
>> 1510 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1511
>> 1512 config CPU_P5600
>> 1513 bool "MIPS Warrior P5600"
>> 1514 depends on SYS_HAS_CPU_P5600
>> 1515 select CPU_HAS_PREFETCH
>> 1516 select CPU_SUPPORTS_32BIT_KERNEL
>> 1517 select CPU_SUPPORTS_HIGHMEM
>> 1518 select CPU_SUPPORTS_MSA
>> 1519 select CPU_SUPPORTS_CPUFREQ
>> 1520 select CPU_SUPPORTS_VZ
>> 1521 select CPU_MIPSR2_IRQ_VI
>> 1522 select CPU_MIPSR2_IRQ_EI
>> 1523 select MIPS_O32_FP64_SUPPORT
>> 1524 help
>> 1525 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
>> 1526 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
>> 1527 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
>> 1528 level features like up to six P5600 calculation cores, CM2 with L2
>> 1529 cache, IOCU/IOMMU (though might be unused depending on the system-
>> 1530 specific IP core configuration), GIC, CPC, virtualisation module,
>> 1531 eJTAG and PDtrace.
>> 1532
>> 1533 config CPU_R3000
>> 1534 bool "R3000"
>> 1535 depends on SYS_HAS_CPU_R3000
>> 1536 select CPU_HAS_WB
>> 1537 select CPU_R3K_TLB
>> 1538 select CPU_SUPPORTS_32BIT_KERNEL
>> 1539 select CPU_SUPPORTS_HIGHMEM
>> 1540 help
>> 1541 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1542 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1543 *not* work on R4000 machines and vice versa. However, since most
>> 1544 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1545 might be a safe bet. If the resulting kernel does not work,
>> 1546 try to recompile with R3000.
>> 1547
>> 1548 config CPU_R4300
>> 1549 bool "R4300"
>> 1550 depends on SYS_HAS_CPU_R4300
>> 1551 select CPU_SUPPORTS_32BIT_KERNEL
>> 1552 select CPU_SUPPORTS_64BIT_KERNEL
>> 1553 help
>> 1554 MIPS Technologies R4300-series processors.
>> 1555
>> 1556 config CPU_R4X00
>> 1557 bool "R4x00"
>> 1558 depends on SYS_HAS_CPU_R4X00
>> 1559 select CPU_SUPPORTS_32BIT_KERNEL
>> 1560 select CPU_SUPPORTS_64BIT_KERNEL
>> 1561 select CPU_SUPPORTS_HUGEPAGES
>> 1562 help
>> 1563 MIPS Technologies R4000-series processors other than 4300, including
>> 1564 the R4000, R4400, R4600, and 4700.
>> 1565
>> 1566 config CPU_TX49XX
>> 1567 bool "R49XX"
>> 1568 depends on SYS_HAS_CPU_TX49XX
>> 1569 select CPU_HAS_PREFETCH
>> 1570 select CPU_SUPPORTS_32BIT_KERNEL
>> 1571 select CPU_SUPPORTS_64BIT_KERNEL
>> 1572 select CPU_SUPPORTS_HUGEPAGES
>> 1573
>> 1574 config CPU_R5000
>> 1575 bool "R5000"
>> 1576 depends on SYS_HAS_CPU_R5000
>> 1577 select CPU_SUPPORTS_32BIT_KERNEL
>> 1578 select CPU_SUPPORTS_64BIT_KERNEL
>> 1579 select CPU_SUPPORTS_HUGEPAGES
>> 1580 help
>> 1581 MIPS Technologies R5000-series processors other than the Nevada.
>> 1582
>> 1583 config CPU_R5500
>> 1584 bool "R5500"
>> 1585 depends on SYS_HAS_CPU_R5500
>> 1586 select CPU_SUPPORTS_32BIT_KERNEL
>> 1587 select CPU_SUPPORTS_64BIT_KERNEL
>> 1588 select CPU_SUPPORTS_HUGEPAGES
>> 1589 help
>> 1590 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1591 instruction set.
>> 1592
>> 1593 config CPU_NEVADA
>> 1594 bool "RM52xx"
>> 1595 depends on SYS_HAS_CPU_NEVADA
>> 1596 select CPU_SUPPORTS_32BIT_KERNEL
>> 1597 select CPU_SUPPORTS_64BIT_KERNEL
>> 1598 select CPU_SUPPORTS_HUGEPAGES
>> 1599 help
>> 1600 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1601
>> 1602 config CPU_R10000
>> 1603 bool "R10000"
>> 1604 depends on SYS_HAS_CPU_R10000
>> 1605 select CPU_HAS_PREFETCH
>> 1606 select CPU_SUPPORTS_32BIT_KERNEL
>> 1607 select CPU_SUPPORTS_64BIT_KERNEL
>> 1608 select CPU_SUPPORTS_HIGHMEM
>> 1609 select CPU_SUPPORTS_HUGEPAGES
>> 1610 help
>> 1611 MIPS Technologies R10000-series processors.
>> 1612
>> 1613 config CPU_RM7000
>> 1614 bool "RM7000"
>> 1615 depends on SYS_HAS_CPU_RM7000
>> 1616 select CPU_HAS_PREFETCH
>> 1617 select CPU_SUPPORTS_32BIT_KERNEL
>> 1618 select CPU_SUPPORTS_64BIT_KERNEL
>> 1619 select CPU_SUPPORTS_HIGHMEM
>> 1620 select CPU_SUPPORTS_HUGEPAGES
>> 1621
>> 1622 config CPU_SB1
>> 1623 bool "SB1"
>> 1624 depends on SYS_HAS_CPU_SB1
>> 1625 select CPU_SUPPORTS_32BIT_KERNEL
>> 1626 select CPU_SUPPORTS_64BIT_KERNEL
>> 1627 select CPU_SUPPORTS_HIGHMEM
>> 1628 select CPU_SUPPORTS_HUGEPAGES
>> 1629 select WEAK_ORDERING
>> 1630
>> 1631 config CPU_CAVIUM_OCTEON
>> 1632 bool "Cavium Octeon processor"
>> 1633 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1634 select CPU_HAS_PREFETCH
>> 1635 select CPU_SUPPORTS_64BIT_KERNEL
>> 1636 select HAVE_PAGE_SIZE_8KB if !MIPS_VA_BITS_48
>> 1637 select HAVE_PAGE_SIZE_32KB if !MIPS_VA_BITS_48
>> 1638 select WEAK_ORDERING
>> 1639 select CPU_SUPPORTS_HIGHMEM
>> 1640 select CPU_SUPPORTS_HUGEPAGES
>> 1641 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1642 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1643 select MIPS_L1_CACHE_SHIFT_7
>> 1644 select CPU_SUPPORTS_VZ
>> 1645 help
>> 1646 The Cavium Octeon processor is a highly integrated chip containing
>> 1647 many ethernet hardware widgets for networking tasks. The processor
>> 1648 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1649 Full details can be found at http://www.caviumnetworks.com.
>> 1650
>> 1651 config CPU_BMIPS
>> 1652 bool "Broadcom BMIPS"
>> 1653 depends on SYS_HAS_CPU_BMIPS
>> 1654 select CPU_MIPS32
>> 1655 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1656 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1657 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1658 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1659 select CPU_SUPPORTS_32BIT_KERNEL
>> 1660 select DMA_NONCOHERENT
>> 1661 select IRQ_MIPS_CPU
>> 1662 select SWAP_IO_SPACE
>> 1663 select WEAK_ORDERING
>> 1664 select CPU_SUPPORTS_HIGHMEM
>> 1665 select CPU_HAS_PREFETCH
>> 1666 select CPU_SUPPORTS_CPUFREQ
>> 1667 select MIPS_EXTERNAL_TIMER
>> 1668 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
>> 1669 help
>> 1670 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
480 1671
481 endchoice 1672 endchoice
482 1673
483 # Common NUMA Features !! 1674 config LOONGSON3_ENHANCEMENT
484 config NUMA !! 1675 bool "New Loongson-3 CPU Enhancements"
485 bool "NUMA Memory Allocation and Sched !! 1676 default n
486 depends on SMP && MMU !! 1677 depends on CPU_LOONGSON64
487 select ARCH_SUPPORTS_NUMA_BALANCING <<
488 select GENERIC_ARCH_NUMA <<
489 select HAVE_SETUP_PER_CPU_AREA <<
490 select NEED_PER_CPU_EMBED_FIRST_CHUNK <<
491 select NEED_PER_CPU_PAGE_FIRST_CHUNK <<
492 select OF_NUMA <<
493 select USE_PERCPU_NUMA_NODE_ID <<
494 help 1678 help
495 Enable NUMA (Non-Uniform Memory Acce !! 1679 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
>> 1680 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1681 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
>> 1682 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1683 Fast TLB refill support, etc.
>> 1684
>> 1685 This option enable those enhancements which are not probed at run
>> 1686 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1687 please say 'N' here. If you want a high-performance kernel to run on
>> 1688 new Loongson-3 machines only, please say 'Y' here.
>> 1689
>> 1690 config CPU_LOONGSON3_WORKAROUNDS
>> 1691 bool "Loongson-3 LLSC Workarounds"
>> 1692 default y if SMP
>> 1693 depends on CPU_LOONGSON64
>> 1694 help
>> 1695 Loongson-3 processors have the llsc issues which require workarounds.
>> 1696 Without workarounds the system may hang unexpectedly.
>> 1697
>> 1698 Say Y, unless you know what you are doing.
>> 1699
>> 1700 config CPU_LOONGSON3_CPUCFG_EMULATION
>> 1701 bool "Emulate the CPUCFG instruction on older Loongson cores"
>> 1702 default y
>> 1703 depends on CPU_LOONGSON64
>> 1704 help
>> 1705 Loongson-3A R4 and newer have the CPUCFG instruction available for
>> 1706 userland to query CPU capabilities, much like CPUID on x86. This
>> 1707 option provides emulation of the instruction on older Loongson
>> 1708 cores, back to Loongson-3A1000.
>> 1709
>> 1710 If unsure, please say Y.
>> 1711
>> 1712 config CPU_MIPS32_3_5_FEATURES
>> 1713 bool "MIPS32 Release 3.5 Features"
>> 1714 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1715 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
>> 1716 CPU_P5600
>> 1717 help
>> 1718 Choose this option to build a kernel for release 2 or later of the
>> 1719 MIPS32 architecture including features from the 3.5 release such as
>> 1720 support for Enhanced Virtual Addressing (EVA).
>> 1721
>> 1722 config CPU_MIPS32_3_5_EVA
>> 1723 bool "Enhanced Virtual Addressing (EVA)"
>> 1724 depends on CPU_MIPS32_3_5_FEATURES
>> 1725 select EVA
>> 1726 default y
>> 1727 help
>> 1728 Choose this option if you want to enable the Enhanced Virtual
>> 1729 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1730 One of its primary benefits is an increase in the maximum size
>> 1731 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1732
>> 1733 config CPU_MIPS32_R5_FEATURES
>> 1734 bool "MIPS32 Release 5 Features"
>> 1735 depends on SYS_HAS_CPU_MIPS32_R5
>> 1736 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
>> 1737 help
>> 1738 Choose this option to build a kernel for release 2 or later of the
>> 1739 MIPS32 architecture including features from release 5 such as
>> 1740 support for Extended Physical Addressing (XPA).
>> 1741
>> 1742 config CPU_MIPS32_R5_XPA
>> 1743 bool "Extended Physical Addressing (XPA)"
>> 1744 depends on CPU_MIPS32_R5_FEATURES
>> 1745 depends on !EVA
>> 1746 depends on !PAGE_SIZE_4KB
>> 1747 depends on SYS_SUPPORTS_HIGHMEM
>> 1748 select XPA
>> 1749 select HIGHMEM
>> 1750 select PHYS_ADDR_T_64BIT
>> 1751 default n
>> 1752 help
>> 1753 Choose this option if you want to enable the Extended Physical
>> 1754 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1755 benefit is to increase physical addressing equal to or greater
>> 1756 than 40 bits. Note that this has the side effect of turning on
>> 1757 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1758 If unsure, say 'N' here.
496 1759
497 The kernel will try to allocate memo !! 1760 if CPU_LOONGSON2F
498 local memory of the CPU and add some !! 1761 config CPU_NOP_WORKAROUNDS
>> 1762 bool
499 1763
500 config NODES_SHIFT !! 1764 config CPU_JUMP_WORKAROUNDS
501 int "Maximum NUMA Nodes (as a power of !! 1765 bool
502 range 1 10 !! 1766
503 default "2" !! 1767 config CPU_LOONGSON2F_WORKAROUNDS
504 depends on NUMA !! 1768 bool "Loongson 2F Workarounds"
>> 1769 default y
>> 1770 select CPU_NOP_WORKAROUNDS
>> 1771 select CPU_JUMP_WORKAROUNDS
505 help 1772 help
506 Specify the maximum number of NUMA N !! 1773 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
507 system. Increases memory reserved t !! 1774 require workarounds. Without workarounds the system may hang
>> 1775 unexpectedly. For more information please refer to the gas
>> 1776 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1777
>> 1778 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1779 are needed. The workarounds have no significant side effect on them
>> 1780 but may decrease the performance of the system so this option should
>> 1781 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1782 systems.
>> 1783
>> 1784 If unsure, please say Y.
>> 1785 endif # CPU_LOONGSON2F
>> 1786
>> 1787 config SYS_SUPPORTS_ZBOOT
>> 1788 bool
>> 1789 select HAVE_KERNEL_GZIP
>> 1790 select HAVE_KERNEL_BZIP2
>> 1791 select HAVE_KERNEL_LZ4
>> 1792 select HAVE_KERNEL_LZMA
>> 1793 select HAVE_KERNEL_LZO
>> 1794 select HAVE_KERNEL_XZ
>> 1795 select HAVE_KERNEL_ZSTD
>> 1796
>> 1797 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1798 bool
>> 1799 select SYS_SUPPORTS_ZBOOT
>> 1800
>> 1801 config SYS_SUPPORTS_ZBOOT_UART_PROM
>> 1802 bool
>> 1803 select SYS_SUPPORTS_ZBOOT
508 1804
509 config RISCV_ALTERNATIVE !! 1805 config CPU_LOONGSON2EF
510 bool 1806 bool
511 depends on !XIP_KERNEL !! 1807 select CPU_SUPPORTS_32BIT_KERNEL
>> 1808 select CPU_SUPPORTS_64BIT_KERNEL
>> 1809 select CPU_SUPPORTS_HIGHMEM
>> 1810 select CPU_SUPPORTS_HUGEPAGES
>> 1811
>> 1812 config CPU_LOONGSON32
>> 1813 bool
>> 1814 select CPU_MIPS32
>> 1815 select CPU_MIPSR2
>> 1816 select CPU_HAS_PREFETCH
>> 1817 select CPU_SUPPORTS_32BIT_KERNEL
>> 1818 select CPU_SUPPORTS_HIGHMEM
>> 1819 select CPU_SUPPORTS_CPUFREQ
>> 1820
>> 1821 config CPU_BMIPS32_3300
>> 1822 select SMP_UP if SMP
>> 1823 bool
>> 1824
>> 1825 config CPU_BMIPS4350
>> 1826 bool
>> 1827 select SYS_SUPPORTS_SMP
>> 1828 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1829
>> 1830 config CPU_BMIPS4380
>> 1831 bool
>> 1832 select MIPS_L1_CACHE_SHIFT_6
>> 1833 select SYS_SUPPORTS_SMP
>> 1834 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1835 select CPU_HAS_RIXI
>> 1836
>> 1837 config CPU_BMIPS5000
>> 1838 bool
>> 1839 select MIPS_CPU_SCACHE
>> 1840 select MIPS_L1_CACHE_SHIFT_7
>> 1841 select SYS_SUPPORTS_SMP
>> 1842 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1843 select CPU_HAS_RIXI
>> 1844
>> 1845 config SYS_HAS_CPU_LOONGSON64
>> 1846 bool
>> 1847 select CPU_SUPPORTS_CPUFREQ
>> 1848 select CPU_HAS_RIXI
>> 1849
>> 1850 config SYS_HAS_CPU_LOONGSON2E
>> 1851 bool
>> 1852
>> 1853 config SYS_HAS_CPU_LOONGSON2F
>> 1854 bool
>> 1855 select CPU_SUPPORTS_CPUFREQ
>> 1856 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1857
>> 1858 config SYS_HAS_CPU_LOONGSON1B
>> 1859 bool
>> 1860
>> 1861 config SYS_HAS_CPU_LOONGSON1C
>> 1862 bool
>> 1863
>> 1864 config SYS_HAS_CPU_MIPS32_R1
>> 1865 bool
>> 1866
>> 1867 config SYS_HAS_CPU_MIPS32_R2
>> 1868 bool
>> 1869
>> 1870 config SYS_HAS_CPU_MIPS32_R3_5
>> 1871 bool
>> 1872
>> 1873 config SYS_HAS_CPU_MIPS32_R5
>> 1874 bool
>> 1875
>> 1876 config SYS_HAS_CPU_MIPS32_R6
>> 1877 bool
>> 1878
>> 1879 config SYS_HAS_CPU_MIPS64_R1
>> 1880 bool
>> 1881
>> 1882 config SYS_HAS_CPU_MIPS64_R2
>> 1883 bool
>> 1884
>> 1885 config SYS_HAS_CPU_MIPS64_R5
>> 1886 bool
>> 1887
>> 1888 config SYS_HAS_CPU_MIPS64_R6
>> 1889 bool
>> 1890
>> 1891 config SYS_HAS_CPU_P5600
>> 1892 bool
>> 1893
>> 1894 config SYS_HAS_CPU_R3000
>> 1895 bool
>> 1896
>> 1897 config SYS_HAS_CPU_R4300
>> 1898 bool
>> 1899
>> 1900 config SYS_HAS_CPU_R4X00
>> 1901 bool
>> 1902
>> 1903 config SYS_HAS_CPU_TX49XX
>> 1904 bool
>> 1905
>> 1906 config SYS_HAS_CPU_R5000
>> 1907 bool
>> 1908
>> 1909 config SYS_HAS_CPU_R5500
>> 1910 bool
>> 1911
>> 1912 config SYS_HAS_CPU_NEVADA
>> 1913 bool
>> 1914
>> 1915 config SYS_HAS_CPU_R10000
>> 1916 bool
>> 1917
>> 1918 config SYS_HAS_CPU_RM7000
>> 1919 bool
>> 1920
>> 1921 config SYS_HAS_CPU_SB1
>> 1922 bool
>> 1923
>> 1924 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1925 bool
>> 1926
>> 1927 config SYS_HAS_CPU_BMIPS
>> 1928 bool
>> 1929
>> 1930 config SYS_HAS_CPU_BMIPS32_3300
>> 1931 bool
>> 1932 select SYS_HAS_CPU_BMIPS
>> 1933
>> 1934 config SYS_HAS_CPU_BMIPS4350
>> 1935 bool
>> 1936 select SYS_HAS_CPU_BMIPS
>> 1937
>> 1938 config SYS_HAS_CPU_BMIPS4380
>> 1939 bool
>> 1940 select SYS_HAS_CPU_BMIPS
>> 1941
>> 1942 config SYS_HAS_CPU_BMIPS5000
>> 1943 bool
>> 1944 select SYS_HAS_CPU_BMIPS
>> 1945
>> 1946 #
>> 1947 # CPU may reorder R->R, R->W, W->R, W->W
>> 1948 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 1949 #
>> 1950 config WEAK_ORDERING
>> 1951 bool
>> 1952
>> 1953 #
>> 1954 # CPU may reorder reads and writes beyond LL/SC
>> 1955 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 1956 #
>> 1957 config WEAK_REORDERING_BEYOND_LLSC
>> 1958 bool
>> 1959 endmenu
>> 1960
>> 1961 #
>> 1962 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 1963 #
>> 1964 config CPU_MIPS32
>> 1965 bool
>> 1966 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
>> 1967 CPU_MIPS32_R6 || CPU_P5600
>> 1968
>> 1969 config CPU_MIPS64
>> 1970 bool
>> 1971 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
>> 1972 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
>> 1973
>> 1974 #
>> 1975 # These indicate the revision of the architecture
>> 1976 #
>> 1977 config CPU_MIPSR1
>> 1978 bool
>> 1979 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 1980
>> 1981 config CPU_MIPSR2
>> 1982 bool
>> 1983 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 1984 select CPU_HAS_RIXI
>> 1985 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1986 select MIPS_SPRAM
>> 1987
>> 1988 config CPU_MIPSR5
>> 1989 bool
>> 1990 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
>> 1991 select CPU_HAS_RIXI
>> 1992 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1993 select MIPS_SPRAM
>> 1994
>> 1995 config CPU_MIPSR6
>> 1996 bool
>> 1997 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 1998 select CPU_HAS_RIXI
>> 1999 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2000 select HAVE_ARCH_BITREVERSE
>> 2001 select MIPS_ASID_BITS_VARIABLE
>> 2002 select MIPS_CRC_SUPPORT
>> 2003 select MIPS_SPRAM
>> 2004
>> 2005 config TARGET_ISA_REV
>> 2006 int
>> 2007 default 1 if CPU_MIPSR1
>> 2008 default 2 if CPU_MIPSR2
>> 2009 default 5 if CPU_MIPSR5
>> 2010 default 6 if CPU_MIPSR6
>> 2011 default 0
512 help 2012 help
513 This Kconfig allows the kernel to au !! 2013 Reflects the ISA revision being targeted by the kernel build. This
514 erratum or cpufeature required by th !! 2014 is effectively the Kconfig equivalent of MIPS_ISA_REV.
515 time. The code patching overhead is !! 2015
516 once at boot and once on each module !! 2016 config EVA
>> 2017 bool
517 2018
518 config RISCV_ALTERNATIVE_EARLY !! 2019 config XPA
519 bool 2020 bool
520 depends on RISCV_ALTERNATIVE !! 2021
>> 2022 config SYS_SUPPORTS_32BIT_KERNEL
>> 2023 bool
>> 2024 config SYS_SUPPORTS_64BIT_KERNEL
>> 2025 bool
>> 2026 config CPU_SUPPORTS_32BIT_KERNEL
>> 2027 bool
>> 2028 config CPU_SUPPORTS_64BIT_KERNEL
>> 2029 bool
>> 2030 config CPU_SUPPORTS_CPUFREQ
>> 2031 bool
>> 2032 config CPU_SUPPORTS_ADDRWINCFG
>> 2033 bool
>> 2034 config CPU_SUPPORTS_HUGEPAGES
>> 2035 bool
>> 2036 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
>> 2037 config CPU_SUPPORTS_VZ
>> 2038 bool
>> 2039 config MIPS_PGD_C0_CONTEXT
>> 2040 bool
>> 2041 depends on 64BIT
>> 2042 default y if (CPU_MIPSR2 || CPU_MIPSR6)
>> 2043
>> 2044 #
>> 2045 # Set to y for ptrace access to watch registers.
>> 2046 #
>> 2047 config HARDWARE_WATCHPOINTS
>> 2048 bool
>> 2049 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2050
>> 2051 menu "Kernel type"
>> 2052
>> 2053 choice
>> 2054 prompt "Kernel code model"
521 help 2055 help
522 Allows early patching of the kernel !! 2056 You should only select this option if you have a workload that
>> 2057 actually benefits from 64-bit processing or if your machine has
>> 2058 large memory. You will only be presented a single option in this
>> 2059 menu if your system does not support both 32-bit and 64-bit kernels.
523 2060
524 config RISCV_ISA_C !! 2061 config 32BIT
525 bool "Emit compressed instructions whe !! 2062 bool "32-bit kernel"
526 default y !! 2063 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2064 select TRAD_SIGNALS
527 help 2065 help
528 Adds "C" to the ISA subsets that the !! 2066 Select this option if you want to build a 32-bit kernel.
529 when building Linux, which results i !! 2067
530 Linux binary. !! 2068 config 64BIT
531 !! 2069 bool "64-bit kernel"
532 If you don't know what to do here, s !! 2070 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
533 <<
534 config RISCV_ISA_SVNAPOT <<
535 bool "Svnapot extension support for su <<
536 depends on 64BIT && MMU <<
537 depends on RISCV_ALTERNATIVE <<
538 default y <<
539 help 2071 help
540 Allow kernel to detect the Svnapot I !! 2072 Select this option if you want to build a 64-bit kernel.
541 time and enable its usage. <<
542 2073
543 The Svnapot extension is used to mar !! 2074 endchoice
544 of contiguous virtual-to-physical tr !! 2075
545 aligned power-of-2 (NAPOT) granulari !! 2076 config MIPS_VA_BITS_48
546 size. When HUGETLBFS is also selecte !! 2077 bool "48 bits virtual memory"
547 allocates some memory for each NAPOT !! 2078 depends on 64BIT
548 When optimizing for low memory consu <<
549 the Svnapot extension, it may be bet <<
550 <<
551 If you don't know what to do here, s <<
552 <<
553 config RISCV_ISA_SVPBMT <<
554 bool "Svpbmt extension support for sup <<
555 depends on 64BIT && MMU <<
556 depends on RISCV_ALTERNATIVE <<
557 default y <<
558 help 2079 help
559 Adds support to dynamically detect !! 2080 Support a maximum at least 48 bits of application virtual
560 ISA-extension (Supervisor-mode: pag !! 2081 memory. Default is 40 bits or less, depending on the CPU.
561 enable its usage. !! 2082 For page sizes 16k and above, this option results in a small
>> 2083 memory overhead for page tables. For 4k page size, a fourth
>> 2084 level of page tables is added which imposes both a memory
>> 2085 overhead as well as slower TLB fault handling.
562 2086
563 The memory type for a page contains !! 2087 If unsure, say N.
564 that indicate the cacheability, ide <<
565 properties for access to that page. <<
566 2088
567 The Svpbmt extension is only availa !! 2089 config ZBOOT_LOAD_ADDRESS
>> 2090 hex "Compressed kernel load address"
>> 2091 default 0xffffffff80400000 if BCM47XX
>> 2092 default 0x0
>> 2093 depends on SYS_SUPPORTS_ZBOOT
>> 2094 help
>> 2095 The address to load compressed kernel, aka vmlinuz.
>> 2096
>> 2097 This is only used if non-zero.
>> 2098
>> 2099 config ARCH_FORCE_MAX_ORDER
>> 2100 int "Maximum zone order"
>> 2101 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2102 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2103 default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2104 default "10"
>> 2105 help
>> 2106 The kernel memory allocator divides physically contiguous memory
>> 2107 blocks into "zones", where each zone is a power of two number of
>> 2108 pages. This option selects the largest power of two that the kernel
>> 2109 keeps in the memory allocator. If you need to allocate very large
>> 2110 blocks of physically contiguous memory, then you may need to
>> 2111 increase this value.
568 2112
569 If you don't know what to do here, !! 2113 The page size is not necessarily 4KB. Keep this in mind
>> 2114 when choosing a value for this option.
570 2115
571 config TOOLCHAIN_HAS_V !! 2116 config BOARD_SCACHE
572 bool 2117 bool
573 default y <<
574 depends on !64BIT || $(cc-option,-mabi <<
575 depends on !32BIT || $(cc-option,-mabi <<
576 depends on LLD_VERSION >= 140000 || LD <<
577 depends on AS_HAS_OPTION_ARCH <<
578 <<
579 config RISCV_ISA_V <<
580 bool "VECTOR extension support" <<
581 depends on TOOLCHAIN_HAS_V <<
582 depends on FPU <<
583 select DYNAMIC_SIGFRAME <<
584 default y <<
585 help <<
586 Say N here if you want to disable al <<
587 in the kernel. <<
588 2118
589 If you don't know what to do here, s !! 2119 config IP22_CPU_SCACHE
>> 2120 bool
>> 2121 select BOARD_SCACHE
590 2122
591 config RISCV_ISA_V_DEFAULT_ENABLE !! 2123 #
592 bool "Enable userspace Vector by defau !! 2124 # Support for a MIPS32 / MIPS64 style S-caches
593 depends on RISCV_ISA_V !! 2125 #
594 default y !! 2126 config MIPS_CPU_SCACHE
>> 2127 bool
>> 2128 select BOARD_SCACHE
>> 2129
>> 2130 config R5000_CPU_SCACHE
>> 2131 bool
>> 2132 select BOARD_SCACHE
>> 2133
>> 2134 config RM7000_CPU_SCACHE
>> 2135 bool
>> 2136 select BOARD_SCACHE
>> 2137
>> 2138 config SIBYTE_DMA_PAGEOPS
>> 2139 bool "Use DMA to clear/copy pages"
>> 2140 depends on CPU_SB1
595 help 2141 help
596 Say Y here if you want to enable Vec !! 2142 Instead of using the CPU to zero and copy pages, use a Data Mover
597 Otherwise, userspace has to make exp !! 2143 channel. These DMA channels are otherwise unused by the standard
598 Vector, or enable it via the sysctl !! 2144 SiByte Linux port. Seems to give a small performance benefit.
599 !! 2145
600 If you don't know what to do here, s !! 2146 config CPU_HAS_PREFETCH
601 !! 2147 bool
602 config RISCV_ISA_V_UCOPY_THRESHOLD !! 2148
603 int "Threshold size for vectorized use !! 2149 config CPU_GENERIC_DUMP_TLB
604 depends on RISCV_ISA_V !! 2150 bool
605 default 768 !! 2151 default y if !CPU_R3000
606 help !! 2152
607 Prefer using vectorized copy_to_user !! 2153 config MIPS_FP_SUPPORT
608 workload size exceeds this value. !! 2154 bool "Floating Point support" if EXPERT
609 <<
610 config RISCV_ISA_V_PREEMPTIVE <<
611 bool "Run kernel-mode Vector with kern <<
612 depends on PREEMPTION <<
613 depends on RISCV_ISA_V <<
614 default y 2155 default y
615 help 2156 help
616 Usually, in-kernel SIMD routines are !! 2157 Select y to include support for floating point in the kernel
617 Functions which envoke long running !! 2158 including initialization of FPU hardware, FP context save & restore
618 vector unit to prevent blocking othe !! 2159 and emulation of an FPU where necessary. Without this support any
619 !! 2160 userland program attempting to use floating point instructions will
620 This config allows kernel to run SIM !! 2161 receive a SIGILL.
621 preemption. Enabling this config wil !! 2162
622 consumption due to the allocation of !! 2163 If you know that your userland will not attempt to use floating point
623 !! 2164 instructions then you can say n here to shrink the kernel a little.
624 config RISCV_ISA_ZAWRS !! 2165
625 bool "Zawrs extension support for more !! 2166 If unsure, say y.
626 depends on RISCV_ALTERNATIVE !! 2167
>> 2168 config CPU_R2300_FPU
>> 2169 bool
>> 2170 depends on MIPS_FP_SUPPORT
>> 2171 default y if CPU_R3000
>> 2172
>> 2173 config CPU_R3K_TLB
>> 2174 bool
>> 2175
>> 2176 config CPU_R4K_FPU
>> 2177 bool
>> 2178 depends on MIPS_FP_SUPPORT
>> 2179 default y if !CPU_R2300_FPU
>> 2180
>> 2181 config CPU_R4K_CACHE_TLB
>> 2182 bool
>> 2183 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
>> 2184
>> 2185 config MIPS_MT_SMP
>> 2186 bool "MIPS MT SMP support (1 TC on each available VPE)"
627 default y 2187 default y
>> 2188 depends on TARGET_ISA_REV > 0 && TARGET_ISA_REV < 6
>> 2189 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MICROMIPS
>> 2190 select CPU_MIPSR2_IRQ_VI
>> 2191 select CPU_MIPSR2_IRQ_EI
>> 2192 select SYNC_R4K
>> 2193 select MIPS_MT
>> 2194 select SMP
>> 2195 select SMP_UP
>> 2196 select SYS_SUPPORTS_SMP
>> 2197 select SYS_SUPPORTS_SCHED_SMT
>> 2198 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2199 help
>> 2200 This is a kernel model which is known as SMVP. This is supported
>> 2201 on cores with the MT ASE and uses the available VPEs to implement
>> 2202 virtual processors which supports SMP. This is equivalent to the
>> 2203 Intel Hyperthreading feature. For further information go to
>> 2204 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2205
>> 2206 config MIPS_MT
>> 2207 bool
>> 2208
>> 2209 config SCHED_SMT
>> 2210 bool "SMT (multithreading) scheduler support"
>> 2211 depends on SYS_SUPPORTS_SCHED_SMT
>> 2212 default n
628 help 2213 help
629 The Zawrs extension defines instruct !! 2214 SMT scheduler support improves the CPU scheduler's decision making
630 which allow a hart to enter a low-po !! 2215 when dealing with MIPS MT enabled cores at a cost of slightly
631 hypervisor while waiting on a store !! 2216 increased overhead in some places. If unsure say N here.
632 use of these instructions in the ker <<
633 detected at boot. <<
634 2217
635 If you don't know what to do here, s !! 2218 config SYS_SUPPORTS_SCHED_SMT
>> 2219 bool
636 2220
637 config TOOLCHAIN_HAS_ZBB !! 2221 config SYS_SUPPORTS_MULTITHREADING
638 bool 2222 bool
>> 2223
>> 2224 config MIPS_MT_FPAFF
>> 2225 bool "Dynamic FPU affinity for FP-intensive threads"
639 default y 2226 default y
640 depends on !64BIT || $(cc-option,-mabi !! 2227 depends on MIPS_MT_SMP
641 depends on !32BIT || $(cc-option,-mabi <<
642 depends on LLD_VERSION >= 150000 || LD <<
643 depends on AS_HAS_OPTION_ARCH <<
644 <<
645 # This symbol indicates that the toolchain sup <<
646 # extensions, including Zvk*, Zvbb, and Zvbc. <<
647 # binutils added all except Zvkb, then added Z <<
648 config TOOLCHAIN_HAS_VECTOR_CRYPTO <<
649 def_bool $(as-instr, .option arch$(com <<
650 depends on AS_HAS_OPTION_ARCH <<
651 2228
652 config RISCV_ISA_ZBA !! 2229 config MIPSR2_TO_R6_EMULATOR
653 bool "Zba extension support for bit ma !! 2230 bool "MIPS R2-to-R6 emulator"
>> 2231 depends on CPU_MIPSR6
>> 2232 depends on MIPS_FP_SUPPORT
654 default y 2233 default y
655 help 2234 help
656 Add support for enabling optimisati !! 2235 Choose this option if you want to run non-R6 MIPS userland code.
657 extension is detected at boot. !! 2236 Even if you say 'Y' here, the emulator will still be disabled by
>> 2237 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2238 The only reason this is a build-time option is to save ~14K from the
>> 2239 final kernel image.
>> 2240
>> 2241 config SYS_SUPPORTS_VPE_LOADER
>> 2242 bool
>> 2243 depends on SYS_SUPPORTS_MULTITHREADING
>> 2244 help
>> 2245 Indicates that the platform supports the VPE loader, and provides
>> 2246 physical_memsize.
658 2247
659 The Zba extension provides instruct !! 2248 config MIPS_VPE_LOADER
660 of addresses that index into arrays !! 2249 bool "VPE loader support."
>> 2250 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2251 select CPU_MIPSR2_IRQ_VI
>> 2252 select CPU_MIPSR2_IRQ_EI
>> 2253 select MIPS_MT
>> 2254 help
>> 2255 Includes a loader for loading an elf relocatable object
>> 2256 onto another VPE and running it.
661 2257
662 If you don't know what to do here, !! 2258 config MIPS_VPE_LOADER_MT
>> 2259 bool
>> 2260 default "y"
>> 2261 depends on MIPS_VPE_LOADER
663 2262
664 config RISCV_ISA_ZBB !! 2263 config MIPS_VPE_LOADER_TOM
665 bool "Zbb extension support for bit ma !! 2264 bool "Load VPE program into memory hidden from linux"
666 depends on TOOLCHAIN_HAS_ZBB !! 2265 depends on MIPS_VPE_LOADER
667 depends on RISCV_ALTERNATIVE <<
668 default y 2266 default y
669 help 2267 help
670 Adds support to dynamically detect !! 2268 The loader can use memory that is present but has been hidden from
671 extension (basic bit manipulation) !! 2269 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2270 you to ensure the amount you put in the option and the space your
>> 2271 program requires is less or equal to the amount physically present.
672 2272
673 The Zbb extension provides instruct !! 2273 config MIPS_VPE_APSP_API
674 of bit-specific operations (count b !! 2274 bool "Enable support for AP/SP API (RTLX)"
675 bitrotation, etc). !! 2275 depends on MIPS_VPE_LOADER
676 2276
677 If you don't know what to do here, !! 2277 config MIPS_VPE_APSP_API_MT
>> 2278 bool
>> 2279 default "y"
>> 2280 depends on MIPS_VPE_APSP_API
>> 2281
>> 2282 config MIPS_CPS
>> 2283 bool "MIPS Coherent Processing System support"
>> 2284 depends on SYS_SUPPORTS_MIPS_CPS
>> 2285 select MIPS_CM
>> 2286 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2287 select SMP
>> 2288 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
>> 2289 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2290 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2291 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2292 select SYS_SUPPORTS_SMP
>> 2293 select WEAK_ORDERING
>> 2294 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
>> 2295 help
>> 2296 Select this if you wish to run an SMP kernel across multiple cores
>> 2297 within a MIPS Coherent Processing System. When this option is
>> 2298 enabled the kernel will probe for other cores and boot them with
>> 2299 no external assistance. It is safe to enable this when hardware
>> 2300 support is unavailable.
678 2301
679 config TOOLCHAIN_HAS_ZBC !! 2302 config MIPS_CPS_PM
>> 2303 depends on MIPS_CPS
680 bool 2304 bool
>> 2305
>> 2306 config MIPS_CM
>> 2307 bool
>> 2308 select MIPS_CPC
>> 2309
>> 2310 config MIPS_CPC
>> 2311 bool
>> 2312
>> 2313 config SB1_PASS_2_WORKAROUNDS
>> 2314 bool
>> 2315 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
681 default y 2316 default y
682 depends on !64BIT || $(cc-option,-mabi !! 2317
683 depends on !32BIT || $(cc-option,-mabi !! 2318 config SB1_PASS_2_1_WORKAROUNDS
684 depends on LLD_VERSION >= 150000 || LD !! 2319 bool
685 depends on AS_HAS_OPTION_ARCH !! 2320 depends on CPU_SB1 && CPU_SB1_PASS_2
686 <<
687 config RISCV_ISA_ZBC <<
688 bool "Zbc extension support for carry- <<
689 depends on TOOLCHAIN_HAS_ZBC <<
690 depends on MMU <<
691 depends on RISCV_ALTERNATIVE <<
692 default y 2321 default y
>> 2322
>> 2323 choice
>> 2324 prompt "SmartMIPS or microMIPS ASE support"
>> 2325
>> 2326 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2327 bool "None"
693 help 2328 help
694 Adds support to dynamically detect !! 2329 Select this if you want neither microMIPS nor SmartMIPS support
695 extension (carry-less multiplicatio <<
696 2330
697 The Zbc extension could accelerate !! 2331 config CPU_HAS_SMARTMIPS
698 calculations. !! 2332 depends on SYS_SUPPORTS_SMARTMIPS
>> 2333 bool "SmartMIPS"
>> 2334 help
>> 2335 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2336 increased security at both hardware and software level for
>> 2337 smartcards. Enabling this option will allow proper use of the
>> 2338 SmartMIPS instructions by Linux applications. However a kernel with
>> 2339 this option will not work on a MIPS core without SmartMIPS core. If
>> 2340 you don't know you probably don't have SmartMIPS and should say N
>> 2341 here.
699 2342
700 If you don't know what to do here, !! 2343 config CPU_MICROMIPS
>> 2344 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2345 bool "microMIPS"
>> 2346 help
>> 2347 When this option is enabled the kernel will be built using the
>> 2348 microMIPS ISA
701 2349
702 config RISCV_ISA_ZICBOM !! 2350 endchoice
703 bool "Zicbom extension support for non !! 2351
704 depends on MMU !! 2352 config CPU_HAS_MSA
705 depends on RISCV_ALTERNATIVE !! 2353 bool "Support for the MIPS SIMD Architecture"
706 default y !! 2354 depends on CPU_SUPPORTS_MSA
707 select RISCV_DMA_NONCOHERENT !! 2355 depends on MIPS_FP_SUPPORT
708 select DMA_DIRECT_REMAP !! 2356 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2357 help
>> 2358 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2359 and a set of SIMD instructions to operate on them. When this option
>> 2360 is enabled the kernel will support allocating & switching MSA
>> 2361 vector register contexts. If you know that your kernel will only be
>> 2362 running on CPUs which do not support MSA or that your userland will
>> 2363 not be making use of it then you may wish to say N here to reduce
>> 2364 the size & complexity of your kernel.
>> 2365
>> 2366 If unsure, say Y.
>> 2367
>> 2368 config CPU_HAS_WB
>> 2369 bool
>> 2370
>> 2371 config XKS01
>> 2372 bool
>> 2373
>> 2374 config CPU_HAS_DIEI
>> 2375 depends on !CPU_DIEI_BROKEN
>> 2376 bool
>> 2377
>> 2378 config CPU_DIEI_BROKEN
>> 2379 bool
>> 2380
>> 2381 config CPU_HAS_RIXI
>> 2382 bool
>> 2383
>> 2384 config CPU_NO_LOAD_STORE_LR
>> 2385 bool
709 help 2386 help
710 Adds support to dynamically detect !! 2387 CPU lacks support for unaligned load and store instructions:
711 extension (Cache Block Management O !! 2388 LWL, LWR, SWL, SWR (Load/store word left/right).
712 usage. !! 2389 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
>> 2390 systems).
713 2391
714 The Zicbom extension can be used to !! 2392 #
715 non-coherent DMA support on devices !! 2393 # Vectored interrupt mode is an R2 feature
>> 2394 #
>> 2395 config CPU_MIPSR2_IRQ_VI
>> 2396 bool
716 2397
717 If you don't know what to do here, !! 2398 #
>> 2399 # Extended interrupt mode is an R2 feature
>> 2400 #
>> 2401 config CPU_MIPSR2_IRQ_EI
>> 2402 bool
718 2403
719 config RISCV_ISA_ZICBOZ !! 2404 config CPU_HAS_SYNC
720 bool "Zicboz extension support for fas !! 2405 bool
721 depends on RISCV_ALTERNATIVE !! 2406 depends on !CPU_R3000
722 default y 2407 default y
723 help <<
724 Enable the use of the Zicboz extens <<
725 when available. <<
726 2408
727 The Zicboz extension is used for fa !! 2409 #
>> 2410 # CPU non-features
>> 2411 #
>> 2412
>> 2413 # Work around the "daddi" and "daddiu" CPU errata:
>> 2414 #
>> 2415 # - The `daddi' instruction fails to trap on overflow.
>> 2416 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2417 # erratum #23
>> 2418 #
>> 2419 # - The `daddiu' instruction can produce an incorrect result.
>> 2420 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2421 # erratum #41
>> 2422 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
>> 2423 # #15
>> 2424 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
>> 2425 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
>> 2426 config CPU_DADDI_WORKAROUNDS
>> 2427 bool
728 2428
729 If you don't know what to do here, !! 2429 # Work around certain R4000 CPU errata (as implemented by GCC):
>> 2430 #
>> 2431 # - A double-word or a variable shift may give an incorrect result
>> 2432 # if executed immediately after starting an integer division:
>> 2433 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2434 # erratum #28
>> 2435 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
>> 2436 # #19
>> 2437 #
>> 2438 # - A double-word or a variable shift may give an incorrect result
>> 2439 # if executed while an integer multiplication is in progress:
>> 2440 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2441 # errata #16 & #28
>> 2442 #
>> 2443 # - An integer division may give an incorrect result if started in
>> 2444 # a delay slot of a taken branch or a jump:
>> 2445 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2446 # erratum #52
>> 2447 config CPU_R4000_WORKAROUNDS
>> 2448 bool
>> 2449 select CPU_R4400_WORKAROUNDS
730 2450
731 config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI !! 2451 # Work around certain R4400 CPU errata (as implemented by GCC):
732 def_bool y !! 2452 #
733 # https://sourceware.org/git/?p=binuti !! 2453 # - A double-word or a variable shift may give an incorrect result
734 # https://gcc.gnu.org/git/?p=gcc.git;a !! 2454 # if executed immediately after starting an integer division:
735 depends on AS_IS_GNU && AS_VERSION >= !! 2455 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
736 help !! 2456 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
737 Binutils-2.38 and GCC-12.1.0 bumped !! 2457 config CPU_R4400_WORKAROUNDS
738 20191213 version, which moves some i !! 2458 bool
739 the Zicsr and Zifencei extensions. T !! 2459
740 Zicsr and Zifencei when binutils >= !! 2460 config CPU_R4X00_BUGS64
741 and Zifencei are supported in binuti !! 2461 bool
742 To make life easier, and avoid forci !! 2462 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
743 newer ISA spec to version 2.2, relax !! 2463
744 For clang < 17 or GCC < 11.3.0, for !! 2464 config MIPS_ASID_SHIFT
745 special treatment, this is dealt wit !! 2465 int
>> 2466 default 6 if CPU_R3000
>> 2467 default 0
>> 2468
>> 2469 config MIPS_ASID_BITS
>> 2470 int
>> 2471 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2472 default 6 if CPU_R3000
>> 2473 default 8
>> 2474
>> 2475 config MIPS_ASID_BITS_VARIABLE
>> 2476 bool
>> 2477
>> 2478 config MIPS_CRC_SUPPORT
>> 2479 bool
>> 2480
>> 2481 # R4600 erratum. Due to the lack of errata information the exact
>> 2482 # technical details aren't known. I've experimentally found that disabling
>> 2483 # interrupts during indexed I-cache flushes seems to be sufficient to deal
>> 2484 # with the issue.
>> 2485 config WAR_R4600_V1_INDEX_ICACHEOP
>> 2486 bool
>> 2487
>> 2488 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
>> 2489 #
>> 2490 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
>> 2491 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
>> 2492 # executed if there is no other dcache activity. If the dcache is
>> 2493 # accessed for another instruction immediately preceding when these
>> 2494 # cache instructions are executing, it is possible that the dcache
>> 2495 # tag match outputs used by these cache instructions will be
>> 2496 # incorrect. These cache instructions should be preceded by at least
>> 2497 # four instructions that are not any kind of load or store
>> 2498 # instruction.
>> 2499 #
>> 2500 # This is not allowed: lw
>> 2501 # nop
>> 2502 # nop
>> 2503 # nop
>> 2504 # cache Hit_Writeback_Invalidate_D
>> 2505 #
>> 2506 # This is allowed: lw
>> 2507 # nop
>> 2508 # nop
>> 2509 # nop
>> 2510 # nop
>> 2511 # cache Hit_Writeback_Invalidate_D
>> 2512 config WAR_R4600_V1_HIT_CACHEOP
>> 2513 bool
>> 2514
>> 2515 # Writeback and invalidate the primary cache dcache before DMA.
>> 2516 #
>> 2517 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
>> 2518 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
>> 2519 # operate correctly if the internal data cache refill buffer is empty. These
>> 2520 # CACHE instructions should be separated from any potential data cache miss
>> 2521 # by a load instruction to an uncached address to empty the response buffer."
>> 2522 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
>> 2523 # in .pdf format.)
>> 2524 config WAR_R4600_V2_HIT_CACHEOP
>> 2525 bool
746 2526
747 config TOOLCHAIN_NEEDS_OLD_ISA_SPEC !! 2527 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
>> 2528 # the line which this instruction itself exists, the following
>> 2529 # operation is not guaranteed."
>> 2530 #
>> 2531 # Workaround: do two phase flushing for Index_Invalidate_I
>> 2532 config WAR_TX49XX_ICACHE_INDEX_INV
>> 2533 bool
>> 2534
>> 2535 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
>> 2536 # opposes it being called that) where invalid instructions in the same
>> 2537 # I-cache line worth of instructions being fetched may case spurious
>> 2538 # exceptions.
>> 2539 config WAR_ICACHE_REFILLS
>> 2540 bool
>> 2541
>> 2542 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
>> 2543 # may cause ll / sc and lld / scd sequences to execute non-atomically.
>> 2544 config WAR_R10000_LLSC
>> 2545 bool
>> 2546
>> 2547 # 34K core erratum: "Problems Executing the TLBR Instruction"
>> 2548 config WAR_MIPS34K_MISSED_ITLB
>> 2549 bool
>> 2550
>> 2551 #
>> 2552 # - Highmem only makes sense for the 32-bit kernel.
>> 2553 # - The current highmem code will only work properly on physically indexed
>> 2554 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2555 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2556 # moment we protect the user and offer the highmem option only on machines
>> 2557 # where it's known to be safe. This will not offer highmem on a few systems
>> 2558 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2559 # indexed CPUs but we're playing safe.
>> 2560 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2561 # know they might have memory configurations that could make use of highmem
>> 2562 # support.
>> 2563 #
>> 2564 config HIGHMEM
>> 2565 bool "High Memory Support"
>> 2566 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2567 select KMAP_LOCAL
>> 2568
>> 2569 config CPU_SUPPORTS_HIGHMEM
>> 2570 bool
>> 2571
>> 2572 config SYS_SUPPORTS_HIGHMEM
>> 2573 bool
>> 2574
>> 2575 config SYS_SUPPORTS_SMARTMIPS
>> 2576 bool
>> 2577
>> 2578 config SYS_SUPPORTS_MICROMIPS
>> 2579 bool
>> 2580
>> 2581 config SYS_SUPPORTS_MIPS16
>> 2582 bool
>> 2583 help
>> 2584 This option must be set if a kernel might be executed on a MIPS16-
>> 2585 enabled CPU even if MIPS16 is not actually being used. In other
>> 2586 words, it makes the kernel MIPS16-tolerant.
>> 2587
>> 2588 config CPU_SUPPORTS_MSA
>> 2589 bool
>> 2590
>> 2591 config ARCH_FLATMEM_ENABLE
748 def_bool y 2592 def_bool y
749 depends on TOOLCHAIN_NEEDS_EXPLICIT_ZI !! 2593 depends on !NUMA && !CPU_LOONGSON2EF
750 # https://github.com/llvm/llvm-project <<
751 # https://gcc.gnu.org/git/?p=gcc.git;a <<
752 depends on (CC_IS_CLANG && CLANG_VERSI <<
753 help <<
754 Certain versions of clang and GCC do <<
755 -march. This option causes an older <<
756 versions of clang and GCC to be pass <<
757 as passing zicsr and zifencei to -ma <<
758 2594
759 config FPU !! 2595 config ARCH_SPARSEMEM_ENABLE
760 bool "FPU support" !! 2596 bool
761 default y !! 2597
>> 2598 config NUMA
>> 2599 bool "NUMA Support"
>> 2600 depends on SYS_SUPPORTS_NUMA
>> 2601 select SMP
>> 2602 select HAVE_SETUP_PER_CPU_AREA
>> 2603 select NEED_PER_CPU_EMBED_FIRST_CHUNK
762 help 2604 help
763 Say N here if you want to disable al !! 2605 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
764 in the kernel. !! 2606 Access). This option improves performance on systems with more
>> 2607 than two nodes; on two node systems it is generally better to
>> 2608 leave it disabled; on single node systems leave this option
>> 2609 disabled.
>> 2610
>> 2611 config SYS_SUPPORTS_NUMA
>> 2612 bool
>> 2613
>> 2614 config RELOCATABLE
>> 2615 bool "Relocatable kernel"
>> 2616 depends on SYS_SUPPORTS_RELOCATABLE
>> 2617 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
>> 2618 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
>> 2619 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
>> 2620 CPU_P5600 || CAVIUM_OCTEON_SOC || \
>> 2621 CPU_LOONGSON64
>> 2622 help
>> 2623 This builds a kernel image that retains relocation information
>> 2624 so it can be loaded someplace besides the default 1MB.
>> 2625 The relocations make the kernel binary about 15% larger,
>> 2626 but are discarded at runtime
>> 2627
>> 2628 config RELOCATION_TABLE_SIZE
>> 2629 hex "Relocation table size"
>> 2630 depends on RELOCATABLE
>> 2631 range 0x0 0x01000000
>> 2632 default "0x00200000" if CPU_LOONGSON64
>> 2633 default "0x00100000"
>> 2634 help
>> 2635 A table of relocation data will be appended to the kernel binary
>> 2636 and parsed at boot to fix up the relocated kernel.
>> 2637
>> 2638 This option allows the amount of space reserved for the table to be
>> 2639 adjusted, although the default of 1Mb should be ok in most cases.
>> 2640
>> 2641 The build will fail and a valid size suggested if this is too small.
>> 2642
>> 2643 If unsure, leave at the default value.
>> 2644
>> 2645 config RANDOMIZE_BASE
>> 2646 bool "Randomize the address of the kernel image"
>> 2647 depends on RELOCATABLE
>> 2648 help
>> 2649 Randomizes the physical and virtual address at which the
>> 2650 kernel image is loaded, as a security feature that
>> 2651 deters exploit attempts relying on knowledge of the location
>> 2652 of kernel internals.
>> 2653
>> 2654 Entropy is generated using any coprocessor 0 registers available.
765 2655
766 If you don't know what to do here, s !! 2656 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
767 2657
768 config IRQ_STACKS !! 2658 If unsure, say N.
769 bool "Independent irq & softirq stacks !! 2659
>> 2660 config RANDOMIZE_BASE_MAX_OFFSET
>> 2661 hex "Maximum kASLR offset" if EXPERT
>> 2662 depends on RANDOMIZE_BASE
>> 2663 range 0x0 0x40000000 if EVA || 64BIT
>> 2664 range 0x0 0x08000000
>> 2665 default "0x01000000"
>> 2666 help
>> 2667 When kASLR is active, this provides the maximum offset that will
>> 2668 be applied to the kernel image. It should be set according to the
>> 2669 amount of physical RAM available in the target system minus
>> 2670 PHYSICAL_START and must be a power of 2.
>> 2671
>> 2672 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2673 EVA or 64-bit. The default is 16Mb.
>> 2674
>> 2675 config NODES_SHIFT
>> 2676 int
>> 2677 default "6"
>> 2678 depends on NUMA
>> 2679
>> 2680 config HW_PERF_EVENTS
>> 2681 bool "Enable hardware performance counter support for perf events"
>> 2682 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
770 default y 2683 default y
771 select HAVE_IRQ_EXIT_ON_IRQ_STACK <<
772 select HAVE_SOFTIRQ_ON_OWN_STACK <<
773 help 2684 help
774 Add independent irq & softirq stacks !! 2685 Enable hardware performance counter support for perf events. If
775 overflows. We may save some memory f !! 2686 disabled, perf events will use software events only.
776 2687
777 config THREAD_SIZE_ORDER !! 2688 config DMI
778 int "Kernel stack size (in power-of-tw !! 2689 bool "Enable DMI scanning"
779 range 0 4 !! 2690 depends on MACH_LOONGSON64
780 default 1 if 32BIT !! 2691 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
781 default 2 !! 2692 default y
782 help 2693 help
783 Specify the Pages of thread stack si !! 2694 Enabled scanning of DMI to identify machine quirks. Say Y
784 affects irq stack size, which is equ !! 2695 here unless you have verified that your setup is not
>> 2696 affected by entries in the DMI blacklist. Required by PNP
>> 2697 BIOS code.
785 2698
786 config RISCV_MISALIGNED !! 2699 config SMP
787 bool !! 2700 bool "Multi-Processing support"
788 select SYSCTL_ARCH_UNALIGN_ALLOW !! 2701 depends on SYS_SUPPORTS_SMP
789 help 2702 help
790 Embed support for emulating misalign !! 2703 This enables support for systems with more than one CPU. If you have
>> 2704 a system with only one CPU, say N. If you have a system with more
>> 2705 than one CPU, say Y.
>> 2706
>> 2707 If you say N here, the kernel will run on uni- and multiprocessor
>> 2708 machines, but will use only one CPU of a multiprocessor machine. If
>> 2709 you say Y here, the kernel will run on many, but not all,
>> 2710 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2711 will run faster if you say N here.
791 2712
792 choice !! 2713 People using multiprocessor machines who say Y here should also say
793 prompt "Unaligned Accesses Support" !! 2714 Y to "Enhanced Real Time Clock Support", below.
794 default RISCV_PROBE_UNALIGNED_ACCESS !! 2715
>> 2716 See also the SMP-HOWTO available at
>> 2717 <https://www.tldp.org/docs.html#howto>.
>> 2718
>> 2719 If you don't know what to do here, say N.
>> 2720
>> 2721 config HOTPLUG_CPU
>> 2722 bool "Support for hot-pluggable CPUs"
>> 2723 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
795 help 2724 help
796 This determines the level of support !! 2725 Say Y here to allow turning CPUs off and on. CPUs can be
797 information is used by the kernel to !! 2726 controlled through /sys/devices/system/cpu.
798 exposed to user space via the hwprob !! 2727 (Note: power management support will enable this option
799 probed at boot by default. !! 2728 automatically on SMP systems. )
800 !! 2729 Say N if you want to disable CPU hotplug.
801 config RISCV_PROBE_UNALIGNED_ACCESS <<
802 bool "Probe for hardware unaligned acc <<
803 select RISCV_MISALIGNED <<
804 help <<
805 During boot, the kernel will run a s <<
806 speed of unaligned accesses. This pr <<
807 the speed of unaligned accesses on t <<
808 memory accesses trap into the kernel <<
809 system, the kernel will emulate the <<
810 UABI. <<
811 <<
812 config RISCV_EMULATED_UNALIGNED_ACCESS <<
813 bool "Emulate unaligned access where s <<
814 select RISCV_MISALIGNED <<
815 help <<
816 If unaligned memory accesses trap in <<
817 supported by the system, the kernel <<
818 accesses to preserve the UABI. When <<
819 unaligned accesses, the unaligned ac <<
820 <<
821 config RISCV_SLOW_UNALIGNED_ACCESS <<
822 bool "Assume the system supports slow <<
823 depends on NONPORTABLE <<
824 help <<
825 Assume that the system supports slow <<
826 kernel and userspace programs may no <<
827 that do not support unaligned memory <<
828 <<
829 config RISCV_EFFICIENT_UNALIGNED_ACCESS <<
830 bool "Assume the system supports fast <<
831 depends on NONPORTABLE <<
832 select DCACHE_WORD_ACCESS if MMU <<
833 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
834 help <<
835 Assume that the system supports fast <<
836 enabled, this option improves the pe <<
837 systems. However, the kernel and use <<
838 slowly, or will not be able to run a <<
839 support efficient unaligned memory a <<
840 2730
841 endchoice !! 2731 config SMP_UP
>> 2732 bool
842 2733
843 source "arch/riscv/Kconfig.vendor" !! 2734 config SYS_SUPPORTS_MIPS_CPS
>> 2735 bool
844 2736
845 endmenu # "Platform type" !! 2737 config SYS_SUPPORTS_SMP
>> 2738 bool
846 2739
847 menu "Kernel features" !! 2740 config NR_CPUS_DEFAULT_4
>> 2741 bool
848 2742
849 source "kernel/Kconfig.hz" !! 2743 config NR_CPUS_DEFAULT_8
>> 2744 bool
850 2745
851 config RISCV_SBI_V01 !! 2746 config NR_CPUS_DEFAULT_16
852 bool "SBI v0.1 support" !! 2747 bool
853 depends on RISCV_SBI !! 2748
854 help !! 2749 config NR_CPUS_DEFAULT_32
855 This config allows kernel to use SBI !! 2750 bool
856 deprecated in future once legacy M-m !! 2751
>> 2752 config NR_CPUS_DEFAULT_64
>> 2753 bool
857 2754
858 config RISCV_BOOT_SPINWAIT !! 2755 config NR_CPUS
859 bool "Spinwait booting method" !! 2756 int "Maximum number of CPUs (2-256)"
>> 2757 range 2 256
860 depends on SMP 2758 depends on SMP
861 default y if RISCV_SBI_V01 || RISCV_M_ !! 2759 default "4" if NR_CPUS_DEFAULT_4
>> 2760 default "8" if NR_CPUS_DEFAULT_8
>> 2761 default "16" if NR_CPUS_DEFAULT_16
>> 2762 default "32" if NR_CPUS_DEFAULT_32
>> 2763 default "64" if NR_CPUS_DEFAULT_64
>> 2764 help
>> 2765 This allows you to specify the maximum number of CPUs which this
>> 2766 kernel will support. The maximum supported value is 32 for 32-bit
>> 2767 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2768 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2769 and 2 for all others.
>> 2770
>> 2771 This is purely to save memory - each supported CPU adds
>> 2772 approximately eight kilobytes to the kernel image. For best
>> 2773 performance should round up your number of processors to the next
>> 2774 power of two.
>> 2775
>> 2776 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2777 bool
>> 2778
>> 2779 config MIPS_NR_CPU_NR_MAP_1024
>> 2780 bool
>> 2781
>> 2782 config MIPS_NR_CPU_NR_MAP
>> 2783 int
>> 2784 depends on SMP
>> 2785 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2786 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2787
>> 2788 #
>> 2789 # Timer Interrupt Frequency Configuration
>> 2790 #
>> 2791
>> 2792 choice
>> 2793 prompt "Timer frequency"
>> 2794 default HZ_250
862 help 2795 help
863 This enables support for booting Lin !! 2796 Allows the configuration of the timer frequency.
864 spinwait method, all cores randomly <<
865 gets chosen via lottery and all othe <<
866 variable. This method cannot support <<
867 scheme. It should be only enabled fo <<
868 on older firmware without SBI HSM ex <<
869 rely on ordered booting via SBI HSM <<
870 dynamically at runtime if the firmwa <<
871 <<
872 Since spinwait is incompatible with <<
873 NR_CPUS be large enough to contain t <<
874 hart to enter Linux. <<
875 2797
876 If unsure what to do here, say N. !! 2798 config HZ_24
>> 2799 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
877 2800
878 config ARCH_SUPPORTS_KEXEC !! 2801 config HZ_48
879 def_bool y !! 2802 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
880 2803
881 config ARCH_SELECTS_KEXEC !! 2804 config HZ_100
882 def_bool y !! 2805 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
883 depends on KEXEC <<
884 select HOTPLUG_CPU if SMP <<
885 2806
886 config ARCH_SUPPORTS_KEXEC_FILE !! 2807 config HZ_128
887 def_bool 64BIT !! 2808 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
888 2809
889 config ARCH_SELECTS_KEXEC_FILE !! 2810 config HZ_250
890 def_bool y !! 2811 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
891 depends on KEXEC_FILE <<
892 select HAVE_IMA_KEXEC if IMA <<
893 select KEXEC_ELF <<
894 2812
895 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2813 config HZ_256
896 def_bool ARCH_SUPPORTS_KEXEC_FILE !! 2814 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
897 2815
898 config ARCH_SUPPORTS_CRASH_DUMP !! 2816 config HZ_1000
899 def_bool y !! 2817 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
900 2818
901 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATIO !! 2819 config HZ_1024
902 def_bool CRASH_RESERVE !! 2820 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
903 2821
904 config COMPAT !! 2822 endchoice
905 bool "Kernel support for 32-bit U-mode <<
906 default 64BIT <<
907 depends on 64BIT && MMU <<
908 help <<
909 This option enables support for a 32 <<
910 kernel at S-mode. riscv32-specific c <<
911 the user helper functions (vdso), si <<
912 ptrace interface are handled appropr <<
913 <<
914 If you want to execute 32-bit usersp <<
915 <<
916 config PARAVIRT <<
917 bool "Enable paravirtualization code" <<
918 depends on RISCV_SBI <<
919 help <<
920 This changes the kernel so it can mo <<
921 under a hypervisor, potentially impr <<
922 over full virtualization. <<
923 <<
924 config PARAVIRT_TIME_ACCOUNTING <<
925 bool "Paravirtual steal time accountin <<
926 depends on PARAVIRT <<
927 help <<
928 Select this option to enable fine gr <<
929 accounting. Time spent executing oth <<
930 the current vCPU is discounted from <<
931 that, there can be a small performan <<
932 2823
933 If in doubt, say N here. !! 2824 config SYS_SUPPORTS_24HZ
>> 2825 bool
934 2826
935 config RELOCATABLE !! 2827 config SYS_SUPPORTS_48HZ
936 bool "Build a relocatable kernel" !! 2828 bool
937 depends on MMU && 64BIT && !XIP_KERNEL <<
938 select MODULE_SECTIONS if MODULES <<
939 help <<
940 This builds a kernel as a Position I <<
941 which retains all relocation metadat <<
942 kernel binary at runtime to a differ <<
943 address it was linked at. <<
944 Since RISCV uses the RELA relocation <<
945 relocation pass at runtime even if t <<
946 same address it was linked at. <<
947 2829
948 If unsure, say N. !! 2830 config SYS_SUPPORTS_100HZ
>> 2831 bool
949 2832
950 config RANDOMIZE_BASE !! 2833 config SYS_SUPPORTS_128HZ
951 bool "Randomize the address of the ker !! 2834 bool
952 select RELOCATABLE !! 2835
953 depends on MMU && 64BIT && !XIP_KERNEL !! 2836 config SYS_SUPPORTS_250HZ
954 help !! 2837 bool
955 Randomizes the virtual address at wh !! 2838
956 loaded, as a security feature that d !! 2839 config SYS_SUPPORTS_256HZ
957 relying on knowledge of the location !! 2840 bool
958 !! 2841
959 It is the bootloader's job to provid !! 2842 config SYS_SUPPORTS_1000HZ
960 random u64 value in /chosen/kaslr-se !! 2843 bool
961 !! 2844
962 When booting via the UEFI stub, it w !! 2845 config SYS_SUPPORTS_1024HZ
963 EFI_RNG_PROTOCOL implementation (if !! 2846 bool
964 to the kernel proper. In addition, i !! 2847
965 location of the kernel Image as well !! 2848 config SYS_SUPPORTS_ARBIT_HZ
966 !! 2849 bool
967 If unsure, say N. !! 2850 default y if !SYS_SUPPORTS_24HZ && \
968 !! 2851 !SYS_SUPPORTS_48HZ && \
969 endmenu # "Kernel features" !! 2852 !SYS_SUPPORTS_100HZ && \
970 !! 2853 !SYS_SUPPORTS_128HZ && \
971 menu "Boot options" !! 2854 !SYS_SUPPORTS_250HZ && \
972 !! 2855 !SYS_SUPPORTS_256HZ && \
973 config CMDLINE !! 2856 !SYS_SUPPORTS_1000HZ && \
974 string "Built-in kernel command line" !! 2857 !SYS_SUPPORTS_1024HZ
975 help !! 2858
976 For most platforms, the arguments fo !! 2859 config HZ
977 are provided at run-time, during boo !! 2860 int
978 where either no arguments are being !! 2861 default 24 if HZ_24
979 arguments are insufficient or even i !! 2862 default 48 if HZ_48
>> 2863 default 100 if HZ_100
>> 2864 default 128 if HZ_128
>> 2865 default 250 if HZ_250
>> 2866 default 256 if HZ_256
>> 2867 default 1000 if HZ_1000
>> 2868 default 1024 if HZ_1024
>> 2869
>> 2870 config SCHED_HRTICK
>> 2871 def_bool HIGH_RES_TIMERS
>> 2872
>> 2873 config ARCH_SUPPORTS_KEXEC
>> 2874 def_bool y
>> 2875
>> 2876 config ARCH_SUPPORTS_CRASH_DUMP
>> 2877 def_bool y
>> 2878
>> 2879 config PHYSICAL_START
>> 2880 hex "Physical address where the kernel is loaded"
>> 2881 default "0xffffffff84000000"
>> 2882 depends on CRASH_DUMP
>> 2883 help
>> 2884 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2885 If you plan to use kernel for capturing the crash dump change
>> 2886 this value to start of the reserved region (the "X" value as
>> 2887 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2888 passed to the panic-ed kernel).
>> 2889
>> 2890 config MIPS_O32_FP64_SUPPORT
>> 2891 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 2892 depends on 32BIT || MIPS32_O32
>> 2893 help
>> 2894 When this is enabled, the kernel will support use of 64-bit floating
>> 2895 point registers with binaries using the O32 ABI along with the
>> 2896 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2897 32-bit MIPS systems this support is at the cost of increasing the
>> 2898 size and complexity of the compiled FPU emulator. Thus if you are
>> 2899 running a MIPS32 system and know that none of your userland binaries
>> 2900 will require 64-bit floating point, you may wish to reduce the size
>> 2901 of your kernel & potentially improve FP emulation performance by
>> 2902 saying N here.
>> 2903
>> 2904 Although binutils currently supports use of this flag the details
>> 2905 concerning its effect upon the O32 ABI in userland are still being
>> 2906 worked on. In order to avoid userland becoming dependent upon current
>> 2907 behaviour before the details have been finalised, this option should
>> 2908 be considered experimental and only enabled by those working upon
>> 2909 said details.
>> 2910
>> 2911 If unsure, say N.
>> 2912
>> 2913 config USE_OF
>> 2914 bool
>> 2915 select OF
>> 2916 select OF_EARLY_FLATTREE
>> 2917 select IRQ_DOMAIN
980 2918
981 When that occurs, it is possible to !! 2919 config UHI_BOOT
982 line here and choose how the kernel !! 2920 bool
>> 2921
>> 2922 config BUILTIN_DTB
>> 2923 bool
983 2924
984 choice 2925 choice
985 prompt "Built-in command line usage" !! 2926 prompt "Kernel appended dtb support"
986 depends on CMDLINE != "" !! 2927 depends on USE_OF
987 default CMDLINE_FALLBACK !! 2928 default MIPS_NO_APPENDED_DTB
988 help !! 2929
989 Choose how the kernel will handle th !! 2930 config MIPS_NO_APPENDED_DTB
990 line. !! 2931 bool "None"
991 !! 2932 help
992 config CMDLINE_FALLBACK !! 2933 Do not enable appended dtb support.
993 bool "Use bootloader kernel arguments !! 2934
994 help !! 2935 config MIPS_ELF_APPENDED_DTB
995 Use the built-in command line as fal !! 2936 bool "vmlinux"
996 during boot. This is the default beh !! 2937 help
997 !! 2938 With this option, the boot code will look for a device tree binary
998 config CMDLINE_EXTEND !! 2939 DTB) included in the vmlinux ELF section .appended_dtb. By default
999 bool "Extend bootloader kernel argumen !! 2940 it is empty and the DTB can be appended using binutils command
1000 help !! 2941 objcopy:
1001 The command-line arguments provided !! 2942
1002 appended to the built-in command li !! 2943 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
1003 cases where the provided arguments !! 2944
1004 you don't want to or cannot modify !! 2945 This is meant as a backward compatibility convenience for those
1005 !! 2946 systems with a bootloader that can't be upgraded to accommodate
1006 config CMDLINE_FORCE !! 2947 the documented boot protocol using a device tree.
1007 bool "Always use the default kernel c !! 2948
1008 help !! 2949 config MIPS_RAW_APPENDED_DTB
1009 Always use the built-in command lin !! 2950 bool "vmlinux.bin or vmlinuz.bin"
1010 boot. This is useful in case you ne !! 2951 help
1011 command line on systems where you d !! 2952 With this option, the boot code will look for a device tree binary
1012 over it. !! 2953 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2954 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2955
>> 2956 This is meant as a backward compatibility convenience for those
>> 2957 systems with a bootloader that can't be upgraded to accommodate
>> 2958 the documented boot protocol using a device tree.
>> 2959
>> 2960 Beware that there is very little in terms of protection against
>> 2961 this option being confused by leftover garbage in memory that might
>> 2962 look like a DTB header after a reboot if no actual DTB is appended
>> 2963 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2964 if you don't intend to always append a DTB.
>> 2965 endchoice
1013 2966
>> 2967 choice
>> 2968 prompt "Kernel command line type"
>> 2969 depends on !CMDLINE_OVERRIDE
>> 2970 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 2971 !MACH_LOONGSON64 && !MIPS_MALTA && \
>> 2972 !CAVIUM_OCTEON_SOC
>> 2973 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2974
>> 2975 config MIPS_CMDLINE_FROM_DTB
>> 2976 depends on USE_OF
>> 2977 bool "Dtb kernel arguments if available"
>> 2978
>> 2979 config MIPS_CMDLINE_DTB_EXTEND
>> 2980 depends on USE_OF
>> 2981 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2982
>> 2983 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2984 bool "Bootloader kernel arguments if available"
>> 2985
>> 2986 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 2987 depends on CMDLINE_BOOL
>> 2988 bool "Extend builtin kernel arguments with bootloader arguments"
1014 endchoice 2989 endchoice
1015 2990
1016 config EFI_STUB !! 2991 endmenu
1017 bool <<
1018 2992
1019 config EFI !! 2993 config LOCKDEP_SUPPORT
1020 bool "UEFI runtime support" !! 2994 bool
1021 depends on OF && !XIP_KERNEL <<
1022 depends on MMU <<
1023 default y 2995 default y
1024 select ARCH_SUPPORTS_ACPI if 64BIT <<
1025 select EFI_GENERIC_STUB <<
1026 select EFI_PARAMS_FROM_FDT <<
1027 select EFI_RUNTIME_WRAPPERS <<
1028 select EFI_STUB <<
1029 select LIBFDT <<
1030 select RISCV_ISA_C <<
1031 select UCS2_STRING <<
1032 help <<
1033 This option provides support for ru <<
1034 by UEFI firmware (such as non-volat <<
1035 clock, and platform reset). A UEFI <<
1036 allow the kernel to be booted as an <<
1037 is only useful on systems that have <<
1038 2996
1039 config DMI !! 2997 config STACKTRACE_SUPPORT
1040 bool "Enable support for SMBIOS (DMI) !! 2998 bool
1041 depends on EFI <<
1042 default y 2999 default y
1043 help <<
1044 This enables SMBIOS/DMI feature for <<
1045 3000
1046 This option is only useful on syste !! 3001 config PGTABLE_LEVELS
1047 However, even with this option, the !! 3002 int
1048 continue to boot on existing non-UE !! 3003 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3004 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
>> 3005 default 2
1049 3006
1050 config CC_HAVE_STACKPROTECTOR_TLS !! 3007 config MIPS_AUTO_PFN_OFFSET
1051 def_bool $(cc-option,-mstack-protecto !! 3008 bool
1052 3009
1053 config STACKPROTECTOR_PER_TASK !! 3010 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
1054 def_bool y <<
1055 depends on !RANDSTRUCT <<
1056 depends on STACKPROTECTOR && CC_HAVE_ <<
1057 3011
1058 config PHYS_RAM_BASE_FIXED !! 3012 config PCI_DRIVERS_GENERIC
1059 bool "Explicitly specified physical R !! 3013 select PCI_DOMAINS_GENERIC if PCI
1060 depends on NONPORTABLE !! 3014 bool
1061 default n <<
1062 3015
1063 config PHYS_RAM_BASE !! 3016 config PCI_DRIVERS_LEGACY
1064 hex "Platform Physical RAM address" !! 3017 def_bool !PCI_DRIVERS_GENERIC
1065 depends on PHYS_RAM_BASE_FIXED !! 3018 select NO_GENERIC_PCI_IOPORT_MAP
1066 default "0x80000000" !! 3019 select PCI_DOMAINS if PCI
1067 help <<
1068 This is the physical address of RAM <<
1069 explicitly specified to run early r <<
1070 from flash to RAM. <<
1071 <<
1072 config XIP_KERNEL <<
1073 bool "Kernel Execute-In-Place from RO <<
1074 depends on MMU && SPARSEMEM && NONPOR <<
1075 # This prevents XIP from being enable <<
1076 # fail to build since XIP doesn't sup <<
1077 depends on !COMPILE_TEST <<
1078 select PHYS_RAM_BASE_FIXED <<
1079 help <<
1080 Execute-In-Place allows the kernel <<
1081 directly addressable by the CPU, su <<
1082 space since the text section of the <<
1083 to RAM. Read-write sections, such <<
1084 are still copied to RAM. The XIP k <<
1085 it has to run directly from flash, <<
1086 store it. The flash address used t <<
1087 and for storing it, is configuratio <<
1088 say Y here, you must know the prope <<
1089 store the kernel image depending on <<
1090 <<
1091 Also note that the make target beco <<
1092 "make zImage" or "make Image". The <<
1093 ROM memory will be arch/riscv/boot/ <<
1094 <<
1095 SPARSEMEM is required because the k <<
1096 flash resident are not backed by me <<
1097 a struct page on those regions will <<
1098 3020
1099 If unsure, say N. !! 3021 #
>> 3022 # ISA support is now enabled via select. Too many systems still have the one
>> 3023 # or other ISA chip on the board that users don't know about so don't expect
>> 3024 # users to choose the right thing ...
>> 3025 #
>> 3026 config ISA
>> 3027 bool
1100 3028
1101 config XIP_PHYS_ADDR !! 3029 config TC
1102 hex "XIP Kernel Physical Location" !! 3030 bool "TURBOchannel support"
1103 depends on XIP_KERNEL !! 3031 depends on MACH_DECSTATION
1104 default "0x21000000" !! 3032 help
1105 help !! 3033 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
1106 This is the physical address in you !! 3034 processors. TURBOchannel programming specifications are available
1107 be linked for and stored to. This !! 3035 at:
1108 own flash usage. !! 3036 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3037 and:
>> 3038 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3039 Linux driver support status is documented at:
>> 3040 <http://www.linux-mips.org/wiki/DECstation>
1109 3041
1110 config RISCV_ISA_FALLBACK !! 3042 config MMU
1111 bool "Permit falling back to parsing !! 3043 bool
1112 default y 3044 default y
1113 help <<
1114 Parsing the "riscv,isa" devicetree <<
1115 replaced by a list of explicitly de <<
1116 with existing platforms, the kernel <<
1117 "riscv,isa" property if the replace <<
1118 <<
1119 Selecting N here will result in a k <<
1120 fallback, unless the commandline "r <<
1121 present. <<
1122 <<
1123 Please see the dt-binding, located <<
1124 Documentation/devicetree/bindings/r <<
1125 on the replacement properties, "ris <<
1126 "riscv,isa-extensions". <<
1127 3045
1128 config BUILTIN_DTB !! 3046 config ARCH_MMAP_RND_BITS_MIN
1129 bool "Built-in device tree" !! 3047 default 12 if 64BIT
1130 depends on OF && NONPORTABLE !! 3048 default 8
1131 help <<
1132 Build a device tree into the Linux <<
1133 This option should be selected if n <<
1134 If unsure, say N. <<
1135 3049
>> 3050 config ARCH_MMAP_RND_BITS_MAX
>> 3051 default 18 if 64BIT
>> 3052 default 15
1136 3053
1137 config BUILTIN_DTB_SOURCE !! 3054 config ARCH_MMAP_RND_COMPAT_BITS_MIN
1138 string "Built-in device tree source" !! 3055 default 8
1139 depends on BUILTIN_DTB <<
1140 help <<
1141 DTS file path (without suffix, rela <<
1142 for the DTS file that will be used <<
1143 kernel. <<
1144 3056
1145 endmenu # "Boot options" !! 3057 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3058 default 15
1146 3059
1147 config PORTABLE !! 3060 config I8253
>> 3061 bool
>> 3062 select CLKSRC_I8253
>> 3063 select CLKEVT_I8253
>> 3064 select MIPS_EXTERNAL_TIMER
>> 3065 endmenu
>> 3066
>> 3067 config TRAD_SIGNALS
>> 3068 bool
>> 3069
>> 3070 config MIPS32_COMPAT
1148 bool 3071 bool
1149 default !NONPORTABLE <<
1150 select EFI <<
1151 select MMU <<
1152 select OF <<
1153 3072
1154 config ARCH_PROC_KCORE_TEXT !! 3073 config COMPAT
>> 3074 bool
>> 3075
>> 3076 config MIPS32_O32
>> 3077 bool "Kernel support for o32 binaries"
>> 3078 depends on 64BIT
>> 3079 select ARCH_WANT_OLD_COMPAT_IPC
>> 3080 select COMPAT
>> 3081 select MIPS32_COMPAT
>> 3082 help
>> 3083 Select this option if you want to run o32 binaries. These are pure
>> 3084 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3085 existing binaries are in this format.
>> 3086
>> 3087 If unsure, say Y.
>> 3088
>> 3089 config MIPS32_N32
>> 3090 bool "Kernel support for n32 binaries"
>> 3091 depends on 64BIT
>> 3092 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
>> 3093 select COMPAT
>> 3094 select MIPS32_COMPAT
>> 3095 help
>> 3096 Select this option if you want to run n32 binaries. These are
>> 3097 64-bit binaries using 32-bit quantities for addressing and certain
>> 3098 data that would normally be 64-bit. They are used in special
>> 3099 cases.
>> 3100
>> 3101 If unsure, say N.
>> 3102
>> 3103 config CC_HAS_MNO_BRANCH_LIKELY
1155 def_bool y 3104 def_bool y
>> 3105 depends on $(cc-option,-mno-branch-likely)
1156 3106
1157 menu "Power management options" !! 3107 # https://github.com/llvm/llvm-project/issues/61045
>> 3108 config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
>> 3109 def_bool y if CC_IS_CLANG
1158 3110
1159 source "kernel/power/Kconfig" !! 3111 menu "Power management options"
1160 3112
1161 config ARCH_HIBERNATION_POSSIBLE 3113 config ARCH_HIBERNATION_POSSIBLE
1162 def_bool y 3114 def_bool y
1163 !! 3115 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
1164 config ARCH_HIBERNATION_HEADER <<
1165 def_bool HIBERNATION <<
1166 3116
1167 config ARCH_SUSPEND_POSSIBLE 3117 config ARCH_SUSPEND_POSSIBLE
1168 def_bool y 3118 def_bool y
>> 3119 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
1169 3120
1170 endmenu # "Power management options" !! 3121 source "kernel/power/Kconfig"
1171 3122
1172 menu "CPU Power Management" !! 3123 endmenu
1173 3124
1174 source "drivers/cpuidle/Kconfig" !! 3125 config MIPS_EXTERNAL_TIMER
>> 3126 bool
>> 3127
>> 3128 menu "CPU Power Management"
1175 3129
>> 3130 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
1176 source "drivers/cpufreq/Kconfig" 3131 source "drivers/cpufreq/Kconfig"
>> 3132 endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3133
>> 3134 source "drivers/cpuidle/Kconfig"
1177 3135
1178 endmenu # "CPU Power Management" !! 3136 endmenu
1179 3137
1180 source "arch/riscv/kvm/Kconfig" !! 3138 source "arch/mips/kvm/Kconfig"
1181 3139
1182 source "drivers/acpi/Kconfig" !! 3140 source "arch/mips/vdso/Kconfig"
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