1 /* SPDX-License-Identifier: GPL-2.0-only */ 1
2 /*
3 * Copyright (C) 2021 Sifive.
4 */
5
6 #ifndef __ASM_ALTERNATIVE_H
7 #define __ASM_ALTERNATIVE_H
8
9 #include <asm/alternative-macros.h>
10
11 #ifndef __ASSEMBLY__
12
13 #ifdef CONFIG_RISCV_ALTERNATIVE
14
15 #include <linux/init.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/stddef.h>
19 #include <asm/hwcap.h>
20
21 #define PATCH_ID_CPUFEATURE_ID(p)
22 #define PATCH_ID_CPUFEATURE_VALUE(p)
23
24 #define RISCV_ALTERNATIVES_BOOT 0 /* a
25 #define RISCV_ALTERNATIVES_MODULE 1 /* a
26 #define RISCV_ALTERNATIVES_EARLY_BOOT 2 /* a
27
28 /* add the relative offset to the address of t
29 #define __ALT_PTR(a, f) ((void
30 #define ALT_OLD_PTR(a) __ALT_
31 #define ALT_ALT_PTR(a) __ALT_
32
33 void __init apply_boot_alternatives(void);
34 void __init apply_early_boot_alternatives(void
35 void apply_module_alternatives(void *start, si
36
37 void riscv_alternative_fix_offsets(void *alt_p
38 int patch_o
39
40 struct alt_entry {
41 s32 old_offset; /* offset rela
42 s32 alt_offset; /* offset rela
43 u16 vendor_id; /* CPU vendor
44 u16 alt_len; /* The replace
45 u32 patch_id; /* The patch I
46 };
47
48 void andes_errata_patch_func(struct alt_entry
49 unsigned long arc
50 unsigned int stag
51 void sifive_errata_patch_func(struct alt_entry
52 unsigned long ar
53 unsigned int sta
54 void thead_errata_patch_func(struct alt_entry
55 unsigned long arc
56 unsigned int stag
57
58 void riscv_cpufeature_patch_func(struct alt_en
59 unsigned int
60
61 #else /* CONFIG_RISCV_ALTERNATIVE */
62
63 static inline void apply_boot_alternatives(voi
64 static inline void apply_early_boot_alternativ
65 static inline void apply_module_alternatives(v
66
67 #endif /* CONFIG_RISCV_ALTERNATIVE */
68
69 #endif
70 #endif
71
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