1 // SPDX-License-Identifier: GPL-2.0-or-later <<
2 /* 1 /*
3 * Copyright (C) 2009 Sunplus Core Technology !! 2 * This file is subject to the terms and conditions of the GNU General Public
4 * Chen Liqin <liqin.chen@sunplusct.com> !! 3 * License. See the file "COPYING" in the main directory of this archive
5 * Lennox Wu <lennox.wu@sunplusct.com> !! 4 * for more details.
6 * Copyright (C) 2012 Regents of the Universit !! 5 *
7 * Copyright (C) 2017 SiFive !! 6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
>> 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
>> 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
>> 9 * Copyright (C) 2004 Thiemo Seufer
>> 10 * Copyright (C) 2013 Imagination Technologies Ltd.
8 */ 11 */
9 !! 12 #include <linux/errno.h>
10 #include <linux/cpu.h> <<
11 #include <linux/kernel.h> <<
12 #include <linux/sched.h> 13 #include <linux/sched.h>
13 #include <linux/sched/debug.h> <<
14 #include <linux/sched/task_stack.h> <<
15 #include <linux/tick.h> 14 #include <linux/tick.h>
>> 15 #include <linux/kernel.h>
>> 16 #include <linux/mm.h>
>> 17 #include <linux/stddef.h>
>> 18 #include <linux/unistd.h>
>> 19 #include <linux/export.h>
16 #include <linux/ptrace.h> 20 #include <linux/ptrace.h>
17 #include <linux/uaccess.h> !! 21 #include <linux/mman.h>
18 #include <linux/personality.h> 22 #include <linux/personality.h>
19 !! 23 #include <linux/sys.h>
20 #include <asm/unistd.h> !! 24 #include <linux/user.h>
>> 25 #include <linux/init.h>
>> 26 #include <linux/completion.h>
>> 27 #include <linux/kallsyms.h>
>> 28 #include <linux/random.h>
>> 29
>> 30 #include <asm/asm.h>
>> 31 #include <asm/bootinfo.h>
>> 32 #include <asm/cpu.h>
>> 33 #include <asm/dsp.h>
>> 34 #include <asm/fpu.h>
>> 35 #include <asm/pgtable.h>
>> 36 #include <asm/mipsregs.h>
21 #include <asm/processor.h> 37 #include <asm/processor.h>
22 #include <asm/csr.h> !! 38 #include <asm/uaccess.h>
>> 39 #include <asm/io.h>
>> 40 #include <asm/elf.h>
>> 41 #include <asm/isadep.h>
>> 42 #include <asm/inst.h>
23 #include <asm/stacktrace.h> 43 #include <asm/stacktrace.h>
24 #include <asm/string.h> <<
25 #include <asm/switch_to.h> <<
26 #include <asm/thread_info.h> <<
27 #include <asm/cpuidle.h> <<
28 #include <asm/vector.h> <<
29 #include <asm/cpufeature.h> <<
30 #include <asm/exec.h> <<
31 44
32 #if defined(CONFIG_STACKPROTECTOR) && !defined !! 45 #ifdef CONFIG_HOTPLUG_CPU
33 #include <linux/stackprotector.h> !! 46 void arch_cpu_idle_dead(void)
34 unsigned long __stack_chk_guard __read_mostly; !! 47 {
35 EXPORT_SYMBOL(__stack_chk_guard); !! 48 /* What the heck is this check doing ? */
>> 49 if (!cpu_isset(smp_processor_id(), cpu_callin_map))
>> 50 play_dead();
>> 51 }
36 #endif 52 #endif
37 53
38 extern asmlinkage void ret_from_fork(void); !! 54 asmlinkage void ret_from_fork(void);
>> 55 asmlinkage void ret_from_kernel_thread(void);
39 56
40 void noinstr arch_cpu_idle(void) !! 57 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
41 { 58 {
42 cpu_do_idle(); !! 59 unsigned long status;
>> 60
>> 61 /* New thread loses kernel privileges. */
>> 62 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
>> 63 #ifdef CONFIG_64BIT
>> 64 status |= test_thread_flag(TIF_32BIT_REGS) ? 0 : ST0_FR;
>> 65 #endif
>> 66 status |= KU_USER;
>> 67 regs->cp0_status = status;
>> 68 clear_used_math();
>> 69 clear_fpu_owner();
>> 70 if (cpu_has_dsp)
>> 71 __init_dsp();
>> 72 regs->cp0_epc = pc;
>> 73 regs->regs[29] = sp;
43 } 74 }
44 75
45 int set_unalign_ctl(struct task_struct *tsk, u !! 76 void exit_thread(void)
46 { 77 {
47 if (!unaligned_ctl_available()) !! 78 }
48 return -EINVAL; <<
49 79
50 tsk->thread.align_ctl = val; !! 80 void flush_thread(void)
51 return 0; !! 81 {
52 } 82 }
53 83
54 int get_unalign_ctl(struct task_struct *tsk, u !! 84 int copy_thread(unsigned long clone_flags, unsigned long usp,
>> 85 unsigned long arg, struct task_struct *p)
55 { 86 {
56 if (!unaligned_ctl_available()) !! 87 struct thread_info *ti = task_thread_info(p);
57 return -EINVAL; !! 88 struct pt_regs *childregs, *regs = current_pt_regs();
>> 89 unsigned long childksp;
>> 90 p->set_child_tid = p->clear_child_tid = NULL;
58 91
59 return put_user(tsk->thread.align_ctl, !! 92 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
60 } !! 93
>> 94 preempt_disable();
>> 95
>> 96 if (is_fpu_owner())
>> 97 save_fp(p);
>> 98
>> 99 if (cpu_has_dsp)
>> 100 save_dsp(p);
>> 101
>> 102 preempt_enable();
>> 103
>> 104 /* set up new TSS. */
>> 105 childregs = (struct pt_regs *) childksp - 1;
>> 106 /* Put the stack after the struct pt_regs. */
>> 107 childksp = (unsigned long) childregs;
>> 108 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
>> 109 if (unlikely(p->flags & PF_KTHREAD)) {
>> 110 unsigned long status = p->thread.cp0_status;
>> 111 memset(childregs, 0, sizeof(struct pt_regs));
>> 112 ti->addr_limit = KERNEL_DS;
>> 113 p->thread.reg16 = usp; /* fn */
>> 114 p->thread.reg17 = arg;
>> 115 p->thread.reg29 = childksp;
>> 116 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
>> 117 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
>> 118 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
>> 119 ((status & (ST0_KUC | ST0_IEC)) << 2);
>> 120 #else
>> 121 status |= ST0_EXL;
>> 122 #endif
>> 123 childregs->cp0_status = status;
>> 124 return 0;
>> 125 }
>> 126 *childregs = *regs;
>> 127 childregs->regs[7] = 0; /* Clear error flag */
>> 128 childregs->regs[2] = 0; /* Child gets zero as return value */
>> 129 if (usp)
>> 130 childregs->regs[29] = usp;
>> 131 ti->addr_limit = USER_DS;
>> 132
>> 133 p->thread.reg29 = (unsigned long) childregs;
>> 134 p->thread.reg31 = (unsigned long) ret_from_fork;
>> 135
>> 136 /*
>> 137 * New tasks lose permission to use the fpu. This accelerates context
>> 138 * switching for most programs since they don't use the fpu.
>> 139 */
>> 140 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
>> 141
>> 142 #ifdef CONFIG_MIPS_MT_SMTC
>> 143 /*
>> 144 * SMTC restores TCStatus after Status, and the CU bits
>> 145 * are aliased there.
>> 146 */
>> 147 childregs->cp0_tcstatus &= ~(ST0_CU2|ST0_CU1);
>> 148 #endif
>> 149 clear_tsk_thread_flag(p, TIF_USEDFPU);
>> 150
>> 151 #ifdef CONFIG_MIPS_MT_FPAFF
>> 152 clear_tsk_thread_flag(p, TIF_FPUBOUND);
>> 153 #endif /* CONFIG_MIPS_MT_FPAFF */
>> 154
>> 155 if (clone_flags & CLONE_SETTLS)
>> 156 ti->tp_value = regs->regs[7];
61 157
62 void __show_regs(struct pt_regs *regs) !! 158 return 0;
63 { <<
64 show_regs_print_info(KERN_DEFAULT); <<
65 <<
66 if (!user_mode(regs)) { <<
67 pr_cont("epc : %pS\n", (void * <<
68 pr_cont(" ra : %pS\n", (void * <<
69 } <<
70 <<
71 pr_cont("epc : " REG_FMT " ra : " REG_ <<
72 regs->epc, regs->ra, regs->sp) <<
73 pr_cont(" gp : " REG_FMT " tp : " REG_ <<
74 regs->gp, regs->tp, regs->t0); <<
75 pr_cont(" t1 : " REG_FMT " t2 : " REG_ <<
76 regs->t1, regs->t2, regs->s0); <<
77 pr_cont(" s1 : " REG_FMT " a0 : " REG_ <<
78 regs->s1, regs->a0, regs->a1); <<
79 pr_cont(" a2 : " REG_FMT " a3 : " REG_ <<
80 regs->a2, regs->a3, regs->a4); <<
81 pr_cont(" a5 : " REG_FMT " a6 : " REG_ <<
82 regs->a5, regs->a6, regs->a7); <<
83 pr_cont(" s2 : " REG_FMT " s3 : " REG_ <<
84 regs->s2, regs->s3, regs->s4); <<
85 pr_cont(" s5 : " REG_FMT " s6 : " REG_ <<
86 regs->s5, regs->s6, regs->s7); <<
87 pr_cont(" s8 : " REG_FMT " s9 : " REG_ <<
88 regs->s8, regs->s9, regs->s10) <<
89 pr_cont(" s11: " REG_FMT " t3 : " REG_ <<
90 regs->s11, regs->t3, regs->t4) <<
91 pr_cont(" t5 : " REG_FMT " t6 : " REG_ <<
92 regs->t5, regs->t6); <<
93 <<
94 pr_cont("status: " REG_FMT " badaddr: <<
95 regs->status, regs->badaddr, r <<
96 } <<
97 void show_regs(struct pt_regs *regs) <<
98 { <<
99 __show_regs(regs); <<
100 if (!user_mode(regs)) <<
101 dump_backtrace(regs, NULL, KER <<
102 } 159 }
103 160
104 unsigned long arch_align_stack(unsigned long s !! 161 /* Fill in the fpu structure for a core dump.. */
>> 162 int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
105 { 163 {
106 if (!(current->personality & ADDR_NO_R !! 164 memcpy(r, ¤t->thread.fpu, sizeof(current->thread.fpu));
107 sp -= get_random_u32_below(PAG !! 165
108 return sp & ~0xf; !! 166 return 1;
109 } 167 }
110 168
111 #ifdef CONFIG_COMPAT !! 169 void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs)
112 static bool compat_mode_supported __read_mostl !! 170 {
>> 171 int i;
>> 172
>> 173 for (i = 0; i < EF_R0; i++)
>> 174 gp[i] = 0;
>> 175 gp[EF_R0] = 0;
>> 176 for (i = 1; i <= 31; i++)
>> 177 gp[EF_R0 + i] = regs->regs[i];
>> 178 gp[EF_R26] = 0;
>> 179 gp[EF_R27] = 0;
>> 180 gp[EF_LO] = regs->lo;
>> 181 gp[EF_HI] = regs->hi;
>> 182 gp[EF_CP0_EPC] = regs->cp0_epc;
>> 183 gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
>> 184 gp[EF_CP0_STATUS] = regs->cp0_status;
>> 185 gp[EF_CP0_CAUSE] = regs->cp0_cause;
>> 186 #ifdef EF_UNUSED0
>> 187 gp[EF_UNUSED0] = 0;
>> 188 #endif
>> 189 }
113 190
114 bool compat_elf_check_arch(Elf32_Ehdr *hdr) !! 191 int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
115 { 192 {
116 return compat_mode_supported && !! 193 elf_dump_regs(*regs, task_pt_regs(tsk));
117 hdr->e_machine == EM_RISCV && !! 194 return 1;
118 hdr->e_ident[EI_CLASS] == ELFCL <<
119 } 195 }
120 196
121 static int __init compat_mode_detect(void) !! 197 int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)
122 { 198 {
123 unsigned long tmp = csr_read(CSR_STATU !! 199 memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu));
>> 200
>> 201 return 1;
>> 202 }
124 203
125 csr_write(CSR_STATUS, (tmp & ~SR_UXL) !! 204 /*
126 compat_mode_supported = !! 205 *
127 (csr_read(CSR_STATUS) !! 206 */
>> 207 struct mips_frame_info {
>> 208 void *func;
>> 209 unsigned long func_size;
>> 210 int frame_size;
>> 211 int pc_offset;
>> 212 };
128 213
129 csr_write(CSR_STATUS, tmp); !! 214 #define J_TARGET(pc,target) \
>> 215 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
>> 216
>> 217 static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
>> 218 {
>> 219 #ifdef CONFIG_CPU_MICROMIPS
>> 220 /*
>> 221 * swsp ra,offset
>> 222 * swm16 reglist,offset(sp)
>> 223 * swm32 reglist,offset(sp)
>> 224 * sw32 ra,offset(sp)
>> 225 * jradiussp - NOT SUPPORTED
>> 226 *
>> 227 * microMIPS is way more fun...
>> 228 */
>> 229 if (mm_insn_16bit(ip->halfword[1])) {
>> 230 switch (ip->mm16_r5_format.opcode) {
>> 231 case mm_swsp16_op:
>> 232 if (ip->mm16_r5_format.rt != 31)
>> 233 return 0;
>> 234
>> 235 *poff = ip->mm16_r5_format.simmediate;
>> 236 *poff = (*poff << 2) / sizeof(ulong);
>> 237 return 1;
>> 238
>> 239 case mm_pool16c_op:
>> 240 switch (ip->mm16_m_format.func) {
>> 241 case mm_swm16_op:
>> 242 *poff = ip->mm16_m_format.imm;
>> 243 *poff += 1 + ip->mm16_m_format.rlist;
>> 244 *poff = (*poff << 2) / sizeof(ulong);
>> 245 return 1;
>> 246
>> 247 default:
>> 248 return 0;
>> 249 }
>> 250
>> 251 default:
>> 252 return 0;
>> 253 }
>> 254 }
130 255
131 pr_info("riscv: ELF compat mode %s", !! 256 switch (ip->i_format.opcode) {
132 compat_mode_supported !! 257 case mm_sw32_op:
>> 258 if (ip->i_format.rs != 29)
>> 259 return 0;
>> 260 if (ip->i_format.rt != 31)
>> 261 return 0;
>> 262
>> 263 *poff = ip->i_format.simmediate / sizeof(ulong);
>> 264 return 1;
>> 265
>> 266 case mm_pool32b_op:
>> 267 switch (ip->mm_m_format.func) {
>> 268 case mm_swm32_func:
>> 269 if (ip->mm_m_format.rd < 0x10)
>> 270 return 0;
>> 271 if (ip->mm_m_format.base != 29)
>> 272 return 0;
>> 273
>> 274 *poff = ip->mm_m_format.simmediate;
>> 275 *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
>> 276 *poff /= sizeof(ulong);
>> 277 return 1;
>> 278 default:
>> 279 return 0;
>> 280 }
>> 281
>> 282 default:
>> 283 return 0;
>> 284 }
>> 285 #else
>> 286 /* sw / sd $ra, offset($sp) */
>> 287 if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
>> 288 ip->i_format.rs == 29 && ip->i_format.rt == 31) {
>> 289 *poff = ip->i_format.simmediate / sizeof(ulong);
>> 290 return 1;
>> 291 }
133 292
134 return 0; 293 return 0;
135 } <<
136 early_initcall(compat_mode_detect); <<
137 #endif 294 #endif
>> 295 }
138 296
139 void start_thread(struct pt_regs *regs, unsign !! 297 static inline int is_jump_ins(union mips_instruction *ip)
140 unsigned long sp) <<
141 { 298 {
142 regs->status = SR_PIE; !! 299 #ifdef CONFIG_CPU_MICROMIPS
143 if (has_fpu()) { !! 300 /*
144 regs->status |= SR_FS_INITIAL; !! 301 * jr16,jrc,jalr16,jalr16
145 /* !! 302 * jal
146 * Restore the initial value t !! 303 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
147 * before starting the user pr !! 304 * jraddiusp - NOT SUPPORTED
148 */ !! 305 *
149 fstate_restore(current, regs); !! 306 * microMIPS is kind of more fun...
>> 307 */
>> 308 if (mm_insn_16bit(ip->halfword[1])) {
>> 309 if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
>> 310 (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
>> 311 return 1;
>> 312 return 0;
150 } 313 }
151 regs->epc = pc; <<
152 regs->sp = sp; <<
153 314
154 #ifdef CONFIG_64BIT !! 315 if (ip->j_format.opcode == mm_j32_op)
155 regs->status &= ~SR_UXL; !! 316 return 1;
156 !! 317 if (ip->j_format.opcode == mm_jal32_op)
157 if (is_compat_task()) !! 318 return 1;
158 regs->status |= SR_UXL_32; !! 319 if (ip->r_format.opcode != mm_pool32a_op ||
159 else !! 320 ip->r_format.func != mm_pool32axf_op)
160 regs->status |= SR_UXL_64; !! 321 return 0;
>> 322 return (((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op);
>> 323 #else
>> 324 if (ip->j_format.opcode == j_op)
>> 325 return 1;
>> 326 if (ip->j_format.opcode == jal_op)
>> 327 return 1;
>> 328 if (ip->r_format.opcode != spec_op)
>> 329 return 0;
>> 330 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
161 #endif 331 #endif
162 } 332 }
163 333
164 void flush_thread(void) !! 334 static inline int is_sp_move_ins(union mips_instruction *ip)
165 { 335 {
166 #ifdef CONFIG_FPU !! 336 #ifdef CONFIG_CPU_MICROMIPS
167 /* 337 /*
168 * Reset FPU state and context !! 338 * addiusp -imm
169 * frm: round to nearest, ties to !! 339 * addius5 sp,-imm
170 * fflags: accrued exceptions cle !! 340 * addiu32 sp,sp,-imm
>> 341 * jradiussp - NOT SUPPORTED
>> 342 *
>> 343 * microMIPS is not more fun...
171 */ 344 */
172 fstate_off(current, task_pt_regs(curre !! 345 if (mm_insn_16bit(ip->halfword[1])) {
173 memset(¤t->thread.fstate, 0, siz !! 346 return (ip->mm16_r3_format.opcode == mm_pool16d_op &&
174 #endif !! 347 ip->mm16_r3_format.simmediate && mm_addiusp_func) ||
175 #ifdef CONFIG_RISCV_ISA_V !! 348 (ip->mm16_r5_format.opcode == mm_pool16d_op &&
176 /* Reset vector state */ !! 349 ip->mm16_r5_format.rt == 29);
177 riscv_v_vstate_ctrl_init(current); !! 350 }
178 riscv_v_vstate_off(task_pt_regs(curren !! 351
179 kfree(current->thread.vstate.datap); !! 352 return (ip->mm_i_format.opcode == mm_addiu32_op &&
180 memset(¤t->thread.vstate, 0, siz !! 353 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29);
181 clear_tsk_thread_flag(current, TIF_RIS !! 354 #else
>> 355 /* addiu/daddiu sp,sp,-imm */
>> 356 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
>> 357 return 0;
>> 358 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
>> 359 return 1;
182 #endif 360 #endif
>> 361 return 0;
183 } 362 }
184 363
185 void arch_release_task_struct(struct task_stru !! 364 static int get_frame_info(struct mips_frame_info *info)
186 { 365 {
187 /* Free the vector context of datap. * !! 366 bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
188 if (has_vector()) !! 367 union mips_instruction insn, *ip, *ip_end;
189 riscv_v_thread_free(tsk); !! 368 const unsigned int max_insns = 128;
>> 369 unsigned int i;
>> 370
>> 371 info->pc_offset = -1;
>> 372 info->frame_size = 0;
>> 373
>> 374 ip = (void *)msk_isa16_mode((ulong)info->func);
>> 375 if (!ip)
>> 376 goto err;
>> 377
>> 378 ip_end = (void *)ip + info->func_size;
>> 379
>> 380 for (i = 0; i < max_insns && ip < ip_end; i++, ip++) {
>> 381 if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
>> 382 insn.halfword[0] = 0;
>> 383 insn.halfword[1] = ip->halfword[0];
>> 384 } else if (is_mmips) {
>> 385 insn.halfword[0] = ip->halfword[1];
>> 386 insn.halfword[1] = ip->halfword[0];
>> 387 } else {
>> 388 insn.word = ip->word;
>> 389 }
>> 390
>> 391 if (is_jump_ins(&insn))
>> 392 break;
>> 393
>> 394 if (!info->frame_size) {
>> 395 if (is_sp_move_ins(&insn))
>> 396 {
>> 397 #ifdef CONFIG_CPU_MICROMIPS
>> 398 if (mm_insn_16bit(ip->halfword[0]))
>> 399 {
>> 400 unsigned short tmp;
>> 401
>> 402 if (ip->halfword[0] & mm_addiusp_func)
>> 403 {
>> 404 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
>> 405 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
>> 406 } else {
>> 407 tmp = (ip->halfword[0] >> 1);
>> 408 info->frame_size = -(signed short)(tmp & 0xf);
>> 409 }
>> 410 ip = (void *) &ip->halfword[1];
>> 411 ip--;
>> 412 } else
>> 413 #endif
>> 414 info->frame_size = - ip->i_format.simmediate;
>> 415 }
>> 416 continue;
>> 417 }
>> 418 if (info->pc_offset == -1 &&
>> 419 is_ra_save_ins(&insn, &info->pc_offset))
>> 420 break;
>> 421 }
>> 422 if (info->frame_size && info->pc_offset >= 0) /* nested */
>> 423 return 0;
>> 424 if (info->pc_offset < 0) /* leaf */
>> 425 return 1;
>> 426 /* prologue seems boggus... */
>> 427 err:
>> 428 return -1;
190 } 429 }
191 430
192 int arch_dup_task_struct(struct task_struct *d !! 431 static struct mips_frame_info schedule_mfi __read_mostly;
>> 432
>> 433 #ifdef CONFIG_KALLSYMS
>> 434 static unsigned long get___schedule_addr(void)
193 { 435 {
194 fstate_save(src, task_pt_regs(src)); !! 436 return kallsyms_lookup_name("__schedule");
195 *dst = *src; !! 437 }
196 /* clear entire V context, including d !! 438 #else
197 memset(&dst->thread.vstate, 0, sizeof( !! 439 static unsigned long get___schedule_addr(void)
198 memset(&dst->thread.kernel_vstate, 0, !! 440 {
199 clear_tsk_thread_flag(dst, TIF_RISCV_V !! 441 union mips_instruction *ip = (void *)schedule;
>> 442 int max_insns = 8;
>> 443 int i;
200 444
>> 445 for (i = 0; i < max_insns; i++, ip++) {
>> 446 if (ip->j_format.opcode == j_op)
>> 447 return J_TARGET(ip, ip->j_format.target);
>> 448 }
201 return 0; 449 return 0;
202 } 450 }
>> 451 #endif
203 452
204 int copy_thread(struct task_struct *p, const s !! 453 static int __init frame_info_init(void)
205 { 454 {
206 unsigned long clone_flags = args->flag !! 455 unsigned long size = 0;
207 unsigned long usp = args->stack; !! 456 #ifdef CONFIG_KALLSYMS
208 unsigned long tls = args->tls; !! 457 unsigned long ofs;
209 struct pt_regs *childregs = task_pt_re !! 458 #endif
210 !! 459 unsigned long addr;
211 memset(&p->thread.s, 0, sizeof(p->thre !! 460
212 !! 461 addr = get___schedule_addr();
213 /* p->thread holds context to be resto !! 462 if (!addr)
214 if (unlikely(args->fn)) { !! 463 addr = (unsigned long)schedule;
215 /* Kernel thread */ !! 464
216 memset(childregs, 0, sizeof(st !! 465 #ifdef CONFIG_KALLSYMS
217 /* Supervisor/Machine, irqs on !! 466 kallsyms_lookup_size_offset(addr, &size, &ofs);
218 childregs->status = SR_PP | SR !! 467 #endif
>> 468 schedule_mfi.func = (void *)addr;
>> 469 schedule_mfi.func_size = size;
>> 470
>> 471 get_frame_info(&schedule_mfi);
>> 472
>> 473 /*
>> 474 * Without schedule() frame info, result given by
>> 475 * thread_saved_pc() and get_wchan() are not reliable.
>> 476 */
>> 477 if (schedule_mfi.pc_offset < 0)
>> 478 printk("Can't analyze schedule() prologue at %p\n", schedule);
219 479
220 p->thread.s[0] = (unsigned lon <<
221 p->thread.s[1] = (unsigned lon <<
222 } else { <<
223 *childregs = *(current_pt_regs <<
224 /* Turn off status.VS */ <<
225 riscv_v_vstate_off(childregs); <<
226 if (usp) /* User fork */ <<
227 childregs->sp = usp; <<
228 if (clone_flags & CLONE_SETTLS <<
229 childregs->tp = tls; <<
230 childregs->a0 = 0; /* Return v <<
231 p->thread.s[0] = 0; <<
232 } <<
233 p->thread.riscv_v_flags = 0; <<
234 if (has_vector()) <<
235 riscv_v_thread_alloc(p); <<
236 p->thread.ra = (unsigned long)ret_from <<
237 p->thread.sp = (unsigned long)childreg <<
238 return 0; 480 return 0;
239 } 481 }
240 482
241 void __init arch_task_cache_init(void) !! 483 arch_initcall(frame_info_init);
>> 484
>> 485 /*
>> 486 * Return saved PC of a blocked thread.
>> 487 */
>> 488 unsigned long thread_saved_pc(struct task_struct *tsk)
>> 489 {
>> 490 struct thread_struct *t = &tsk->thread;
>> 491
>> 492 /* New born processes are a special case */
>> 493 if (t->reg31 == (unsigned long) ret_from_fork)
>> 494 return t->reg31;
>> 495 if (schedule_mfi.pc_offset < 0)
>> 496 return 0;
>> 497 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
>> 498 }
>> 499
>> 500
>> 501 #ifdef CONFIG_KALLSYMS
>> 502 /* generic stack unwinding function */
>> 503 unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
>> 504 unsigned long *sp,
>> 505 unsigned long pc,
>> 506 unsigned long *ra)
>> 507 {
>> 508 struct mips_frame_info info;
>> 509 unsigned long size, ofs;
>> 510 int leaf;
>> 511 extern void ret_from_irq(void);
>> 512 extern void ret_from_exception(void);
>> 513
>> 514 if (!stack_page)
>> 515 return 0;
>> 516
>> 517 /*
>> 518 * If we reached the bottom of interrupt context,
>> 519 * return saved pc in pt_regs.
>> 520 */
>> 521 if (pc == (unsigned long)ret_from_irq ||
>> 522 pc == (unsigned long)ret_from_exception) {
>> 523 struct pt_regs *regs;
>> 524 if (*sp >= stack_page &&
>> 525 *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
>> 526 regs = (struct pt_regs *)*sp;
>> 527 pc = regs->cp0_epc;
>> 528 if (__kernel_text_address(pc)) {
>> 529 *sp = regs->regs[29];
>> 530 *ra = regs->regs[31];
>> 531 return pc;
>> 532 }
>> 533 }
>> 534 return 0;
>> 535 }
>> 536 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
>> 537 return 0;
>> 538 /*
>> 539 * Return ra if an exception occurred at the first instruction
>> 540 */
>> 541 if (unlikely(ofs == 0)) {
>> 542 pc = *ra;
>> 543 *ra = 0;
>> 544 return pc;
>> 545 }
>> 546
>> 547 info.func = (void *)(pc - ofs);
>> 548 info.func_size = ofs; /* analyze from start to ofs */
>> 549 leaf = get_frame_info(&info);
>> 550 if (leaf < 0)
>> 551 return 0;
>> 552
>> 553 if (*sp < stack_page ||
>> 554 *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
>> 555 return 0;
>> 556
>> 557 if (leaf)
>> 558 /*
>> 559 * For some extreme cases, get_frame_info() can
>> 560 * consider wrongly a nested function as a leaf
>> 561 * one. In that cases avoid to return always the
>> 562 * same value.
>> 563 */
>> 564 pc = pc != *ra ? *ra : 0;
>> 565 else
>> 566 pc = ((unsigned long *)(*sp))[info.pc_offset];
>> 567
>> 568 *sp += info.frame_size;
>> 569 *ra = 0;
>> 570 return __kernel_text_address(pc) ? pc : 0;
>> 571 }
>> 572 EXPORT_SYMBOL(unwind_stack_by_address);
>> 573
>> 574 /* used by show_backtrace() */
>> 575 unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
>> 576 unsigned long pc, unsigned long *ra)
>> 577 {
>> 578 unsigned long stack_page = (unsigned long)task_stack_page(task);
>> 579 return unwind_stack_by_address(stack_page, sp, pc, ra);
>> 580 }
>> 581 #endif
>> 582
>> 583 /*
>> 584 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
>> 585 */
>> 586 unsigned long get_wchan(struct task_struct *task)
242 { 587 {
243 riscv_v_setup_ctx_cache(); !! 588 unsigned long pc = 0;
>> 589 #ifdef CONFIG_KALLSYMS
>> 590 unsigned long sp;
>> 591 unsigned long ra = 0;
>> 592 #endif
>> 593
>> 594 if (!task || task == current || task->state == TASK_RUNNING)
>> 595 goto out;
>> 596 if (!task_stack_page(task))
>> 597 goto out;
>> 598
>> 599 pc = thread_saved_pc(task);
>> 600
>> 601 #ifdef CONFIG_KALLSYMS
>> 602 sp = task->thread.reg29 + schedule_mfi.frame_size;
>> 603
>> 604 while (in_sched_functions(pc))
>> 605 pc = unwind_stack(task, &sp, pc, &ra);
>> 606 #endif
>> 607
>> 608 out:
>> 609 return pc;
>> 610 }
>> 611
>> 612 /*
>> 613 * Don't forget that the stack pointer must be aligned on a 8 bytes
>> 614 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
>> 615 */
>> 616 unsigned long arch_align_stack(unsigned long sp)
>> 617 {
>> 618 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
>> 619 sp -= get_random_int() & ~PAGE_MASK;
>> 620
>> 621 return sp & ALMASK;
244 } 622 }
245 623
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