1 // SPDX-License-Identifier: GPL-2.0-or-later <<
2 /* 1 /*
3 * Copyright (C) 2009 Sunplus Core Technology !! 2 * This file is subject to the terms and conditions of the GNU General Public
4 * Chen Liqin <liqin.chen@sunplusct.com> !! 3 * License. See the file "COPYING" in the main directory of this archive
5 * Lennox Wu <lennox.wu@sunplusct.com> !! 4 * for more details.
6 * Copyright (C) 2012 Regents of the Universit !! 5 *
7 * Copyright (C) 2017 SiFive !! 6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
>> 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
>> 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
>> 9 * Copyright (C) 2004 Thiemo Seufer
>> 10 * Copyright (C) 2013 Imagination Technologies Ltd.
8 */ 11 */
9 !! 12 #include <linux/errno.h>
10 #include <linux/cpu.h> <<
11 #include <linux/kernel.h> <<
12 #include <linux/sched.h> 13 #include <linux/sched.h>
13 #include <linux/sched/debug.h> 14 #include <linux/sched/debug.h>
>> 15 #include <linux/sched/task.h>
14 #include <linux/sched/task_stack.h> 16 #include <linux/sched/task_stack.h>
15 #include <linux/tick.h> 17 #include <linux/tick.h>
>> 18 #include <linux/kernel.h>
>> 19 #include <linux/mm.h>
>> 20 #include <linux/stddef.h>
>> 21 #include <linux/unistd.h>
>> 22 #include <linux/export.h>
16 #include <linux/ptrace.h> 23 #include <linux/ptrace.h>
17 #include <linux/uaccess.h> !! 24 #include <linux/mman.h>
18 #include <linux/personality.h> 25 #include <linux/personality.h>
19 !! 26 #include <linux/sys.h>
20 #include <asm/unistd.h> !! 27 #include <linux/init.h>
>> 28 #include <linux/completion.h>
>> 29 #include <linux/kallsyms.h>
>> 30 #include <linux/random.h>
>> 31 #include <linux/prctl.h>
>> 32
>> 33 #include <asm/asm.h>
>> 34 #include <asm/bootinfo.h>
>> 35 #include <asm/cpu.h>
>> 36 #include <asm/dsemul.h>
>> 37 #include <asm/dsp.h>
>> 38 #include <asm/fpu.h>
>> 39 #include <asm/irq.h>
>> 40 #include <asm/msa.h>
>> 41 #include <asm/pgtable.h>
>> 42 #include <asm/mipsregs.h>
21 #include <asm/processor.h> 43 #include <asm/processor.h>
22 #include <asm/csr.h> !! 44 #include <asm/reg.h>
>> 45 #include <linux/uaccess.h>
>> 46 #include <asm/io.h>
>> 47 #include <asm/elf.h>
>> 48 #include <asm/isadep.h>
>> 49 #include <asm/inst.h>
23 #include <asm/stacktrace.h> 50 #include <asm/stacktrace.h>
24 #include <asm/string.h> !! 51 #include <asm/irq_regs.h>
25 #include <asm/switch_to.h> <<
26 #include <asm/thread_info.h> <<
27 #include <asm/cpuidle.h> <<
28 #include <asm/vector.h> <<
29 #include <asm/cpufeature.h> <<
30 #include <asm/exec.h> <<
31 52
32 #if defined(CONFIG_STACKPROTECTOR) && !defined !! 53 #ifdef CONFIG_HOTPLUG_CPU
33 #include <linux/stackprotector.h> !! 54 void arch_cpu_idle_dead(void)
34 unsigned long __stack_chk_guard __read_mostly; !! 55 {
35 EXPORT_SYMBOL(__stack_chk_guard); !! 56 play_dead();
>> 57 }
36 #endif 58 #endif
37 59
38 extern asmlinkage void ret_from_fork(void); !! 60 asmlinkage void ret_from_fork(void);
>> 61 asmlinkage void ret_from_kernel_thread(void);
39 62
40 void noinstr arch_cpu_idle(void) !! 63 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
41 { 64 {
42 cpu_do_idle(); !! 65 unsigned long status;
>> 66
>> 67 /* New thread loses kernel privileges. */
>> 68 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
>> 69 status |= KU_USER;
>> 70 regs->cp0_status = status;
>> 71 lose_fpu(0);
>> 72 clear_thread_flag(TIF_MSA_CTX_LIVE);
>> 73 clear_used_math();
>> 74 atomic_set(¤t->thread.bd_emu_frame, BD_EMUFRAME_NONE);
>> 75 init_dsp();
>> 76 regs->cp0_epc = pc;
>> 77 regs->regs[29] = sp;
43 } 78 }
44 79
45 int set_unalign_ctl(struct task_struct *tsk, u !! 80 void exit_thread(struct task_struct *tsk)
46 { 81 {
47 if (!unaligned_ctl_available()) !! 82 /*
48 return -EINVAL; !! 83 * User threads may have allocated a delay slot emulation frame.
>> 84 * If so, clean up that allocation.
>> 85 */
>> 86 if (!(current->flags & PF_KTHREAD))
>> 87 dsemul_thread_cleanup(tsk);
>> 88 }
>> 89
>> 90 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
>> 91 {
>> 92 /*
>> 93 * Save any process state which is live in hardware registers to the
>> 94 * parent context prior to duplication. This prevents the new child
>> 95 * state becoming stale if the parent is preempted before copy_thread()
>> 96 * gets a chance to save the parent's live hardware registers to the
>> 97 * child context.
>> 98 */
>> 99 preempt_disable();
>> 100
>> 101 if (is_msa_enabled())
>> 102 save_msa(current);
>> 103 else if (is_fpu_owner())
>> 104 _save_fp(current);
>> 105
>> 106 save_dsp(current);
>> 107
>> 108 preempt_enable();
49 109
50 tsk->thread.align_ctl = val; !! 110 *dst = *src;
51 return 0; 111 return 0;
52 } 112 }
53 113
54 int get_unalign_ctl(struct task_struct *tsk, u !! 114 /*
>> 115 * Copy architecture-specific thread state
>> 116 */
>> 117 int copy_thread_tls(unsigned long clone_flags, unsigned long usp,
>> 118 unsigned long kthread_arg, struct task_struct *p, unsigned long tls)
55 { 119 {
56 if (!unaligned_ctl_available()) !! 120 struct thread_info *ti = task_thread_info(p);
57 return -EINVAL; !! 121 struct pt_regs *childregs, *regs = current_pt_regs();
>> 122 unsigned long childksp;
>> 123
>> 124 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
>> 125
>> 126 /* set up new TSS. */
>> 127 childregs = (struct pt_regs *) childksp - 1;
>> 128 /* Put the stack after the struct pt_regs. */
>> 129 childksp = (unsigned long) childregs;
>> 130 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
>> 131 if (unlikely(p->flags & PF_KTHREAD)) {
>> 132 /* kernel thread */
>> 133 unsigned long status = p->thread.cp0_status;
>> 134 memset(childregs, 0, sizeof(struct pt_regs));
>> 135 ti->addr_limit = KERNEL_DS;
>> 136 p->thread.reg16 = usp; /* fn */
>> 137 p->thread.reg17 = kthread_arg;
>> 138 p->thread.reg29 = childksp;
>> 139 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
>> 140 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
>> 141 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
>> 142 ((status & (ST0_KUC | ST0_IEC)) << 2);
>> 143 #else
>> 144 status |= ST0_EXL;
>> 145 #endif
>> 146 childregs->cp0_status = status;
>> 147 return 0;
>> 148 }
>> 149
>> 150 /* user thread */
>> 151 *childregs = *regs;
>> 152 childregs->regs[7] = 0; /* Clear error flag */
>> 153 childregs->regs[2] = 0; /* Child gets zero as return value */
>> 154 if (usp)
>> 155 childregs->regs[29] = usp;
>> 156 ti->addr_limit = USER_DS;
>> 157
>> 158 p->thread.reg29 = (unsigned long) childregs;
>> 159 p->thread.reg31 = (unsigned long) ret_from_fork;
>> 160
>> 161 /*
>> 162 * New tasks lose permission to use the fpu. This accelerates context
>> 163 * switching for most programs since they don't use the fpu.
>> 164 */
>> 165 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
>> 166
>> 167 clear_tsk_thread_flag(p, TIF_USEDFPU);
>> 168 clear_tsk_thread_flag(p, TIF_USEDMSA);
>> 169 clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
58 170
59 return put_user(tsk->thread.align_ctl, !! 171 #ifdef CONFIG_MIPS_MT_FPAFF
>> 172 clear_tsk_thread_flag(p, TIF_FPUBOUND);
>> 173 #endif /* CONFIG_MIPS_MT_FPAFF */
>> 174
>> 175 atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
>> 176
>> 177 if (clone_flags & CLONE_SETTLS)
>> 178 ti->tp_value = tls;
>> 179
>> 180 return 0;
60 } 181 }
61 182
62 void __show_regs(struct pt_regs *regs) !! 183 #ifdef CONFIG_CC_STACKPROTECTOR
>> 184 #include <linux/stackprotector.h>
>> 185 unsigned long __stack_chk_guard __read_mostly;
>> 186 EXPORT_SYMBOL(__stack_chk_guard);
>> 187 #endif
>> 188
>> 189 struct mips_frame_info {
>> 190 void *func;
>> 191 unsigned long func_size;
>> 192 int frame_size;
>> 193 int pc_offset;
>> 194 };
>> 195
>> 196 #define J_TARGET(pc,target) \
>> 197 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
>> 198
>> 199 static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
63 { 200 {
64 show_regs_print_info(KERN_DEFAULT); !! 201 #ifdef CONFIG_CPU_MICROMIPS
>> 202 /*
>> 203 * swsp ra,offset
>> 204 * swm16 reglist,offset(sp)
>> 205 * swm32 reglist,offset(sp)
>> 206 * sw32 ra,offset(sp)
>> 207 * jradiussp - NOT SUPPORTED
>> 208 *
>> 209 * microMIPS is way more fun...
>> 210 */
>> 211 if (mm_insn_16bit(ip->word >> 16)) {
>> 212 switch (ip->mm16_r5_format.opcode) {
>> 213 case mm_swsp16_op:
>> 214 if (ip->mm16_r5_format.rt != 31)
>> 215 return 0;
>> 216
>> 217 *poff = ip->mm16_r5_format.imm;
>> 218 *poff = (*poff << 2) / sizeof(ulong);
>> 219 return 1;
>> 220
>> 221 case mm_pool16c_op:
>> 222 switch (ip->mm16_m_format.func) {
>> 223 case mm_swm16_op:
>> 224 *poff = ip->mm16_m_format.imm;
>> 225 *poff += 1 + ip->mm16_m_format.rlist;
>> 226 *poff = (*poff << 2) / sizeof(ulong);
>> 227 return 1;
>> 228
>> 229 default:
>> 230 return 0;
>> 231 }
>> 232
>> 233 default:
>> 234 return 0;
>> 235 }
>> 236 }
65 237
66 if (!user_mode(regs)) { !! 238 switch (ip->i_format.opcode) {
67 pr_cont("epc : %pS\n", (void * !! 239 case mm_sw32_op:
68 pr_cont(" ra : %pS\n", (void * !! 240 if (ip->i_format.rs != 29)
>> 241 return 0;
>> 242 if (ip->i_format.rt != 31)
>> 243 return 0;
>> 244
>> 245 *poff = ip->i_format.simmediate / sizeof(ulong);
>> 246 return 1;
>> 247
>> 248 case mm_pool32b_op:
>> 249 switch (ip->mm_m_format.func) {
>> 250 case mm_swm32_func:
>> 251 if (ip->mm_m_format.rd < 0x10)
>> 252 return 0;
>> 253 if (ip->mm_m_format.base != 29)
>> 254 return 0;
>> 255
>> 256 *poff = ip->mm_m_format.simmediate;
>> 257 *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
>> 258 *poff /= sizeof(ulong);
>> 259 return 1;
>> 260 default:
>> 261 return 0;
>> 262 }
>> 263
>> 264 default:
>> 265 return 0;
>> 266 }
>> 267 #else
>> 268 /* sw / sd $ra, offset($sp) */
>> 269 if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
>> 270 ip->i_format.rs == 29 && ip->i_format.rt == 31) {
>> 271 *poff = ip->i_format.simmediate / sizeof(ulong);
>> 272 return 1;
69 } 273 }
70 274
71 pr_cont("epc : " REG_FMT " ra : " REG_ !! 275 return 0;
72 regs->epc, regs->ra, regs->sp) !! 276 #endif
73 pr_cont(" gp : " REG_FMT " tp : " REG_ !! 277 }
74 regs->gp, regs->tp, regs->t0); <<
75 pr_cont(" t1 : " REG_FMT " t2 : " REG_ <<
76 regs->t1, regs->t2, regs->s0); <<
77 pr_cont(" s1 : " REG_FMT " a0 : " REG_ <<
78 regs->s1, regs->a0, regs->a1); <<
79 pr_cont(" a2 : " REG_FMT " a3 : " REG_ <<
80 regs->a2, regs->a3, regs->a4); <<
81 pr_cont(" a5 : " REG_FMT " a6 : " REG_ <<
82 regs->a5, regs->a6, regs->a7); <<
83 pr_cont(" s2 : " REG_FMT " s3 : " REG_ <<
84 regs->s2, regs->s3, regs->s4); <<
85 pr_cont(" s5 : " REG_FMT " s6 : " REG_ <<
86 regs->s5, regs->s6, regs->s7); <<
87 pr_cont(" s8 : " REG_FMT " s9 : " REG_ <<
88 regs->s8, regs->s9, regs->s10) <<
89 pr_cont(" s11: " REG_FMT " t3 : " REG_ <<
90 regs->s11, regs->t3, regs->t4) <<
91 pr_cont(" t5 : " REG_FMT " t6 : " REG_ <<
92 regs->t5, regs->t6); <<
93 278
94 pr_cont("status: " REG_FMT " badaddr: !! 279 static inline int is_jump_ins(union mips_instruction *ip)
95 regs->status, regs->badaddr, r !! 280 {
>> 281 #ifdef CONFIG_CPU_MICROMIPS
>> 282 /*
>> 283 * jr16,jrc,jalr16,jalr16
>> 284 * jal
>> 285 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
>> 286 * jraddiusp - NOT SUPPORTED
>> 287 *
>> 288 * microMIPS is kind of more fun...
>> 289 */
>> 290 if (mm_insn_16bit(ip->word >> 16)) {
>> 291 if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
>> 292 (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
>> 293 return 1;
>> 294 return 0;
>> 295 }
>> 296
>> 297 if (ip->j_format.opcode == mm_j32_op)
>> 298 return 1;
>> 299 if (ip->j_format.opcode == mm_jal32_op)
>> 300 return 1;
>> 301 if (ip->r_format.opcode != mm_pool32a_op ||
>> 302 ip->r_format.func != mm_pool32axf_op)
>> 303 return 0;
>> 304 return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
>> 305 #else
>> 306 if (ip->j_format.opcode == j_op)
>> 307 return 1;
>> 308 if (ip->j_format.opcode == jal_op)
>> 309 return 1;
>> 310 if (ip->r_format.opcode != spec_op)
>> 311 return 0;
>> 312 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
>> 313 #endif
96 } 314 }
97 void show_regs(struct pt_regs *regs) !! 315
>> 316 static inline int is_sp_move_ins(union mips_instruction *ip, int *frame_size)
98 { 317 {
99 __show_regs(regs); !! 318 #ifdef CONFIG_CPU_MICROMIPS
100 if (!user_mode(regs)) !! 319 unsigned short tmp;
101 dump_backtrace(regs, NULL, KER !! 320
>> 321 /*
>> 322 * addiusp -imm
>> 323 * addius5 sp,-imm
>> 324 * addiu32 sp,sp,-imm
>> 325 * jradiussp - NOT SUPPORTED
>> 326 *
>> 327 * microMIPS is not more fun...
>> 328 */
>> 329 if (mm_insn_16bit(ip->word >> 16)) {
>> 330 if (ip->mm16_r3_format.opcode == mm_pool16d_op &&
>> 331 ip->mm16_r3_format.simmediate & mm_addiusp_func) {
>> 332 tmp = ip->mm_b0_format.simmediate >> 1;
>> 333 tmp = ((tmp & 0x1ff) ^ 0x100) - 0x100;
>> 334 if ((tmp + 2) < 4) /* 0x0,0x1,0x1fe,0x1ff are special */
>> 335 tmp ^= 0x100;
>> 336 *frame_size = -(signed short)(tmp << 2);
>> 337 return 1;
>> 338 }
>> 339 if (ip->mm16_r5_format.opcode == mm_pool16d_op &&
>> 340 ip->mm16_r5_format.rt == 29) {
>> 341 tmp = ip->mm16_r5_format.imm >> 1;
>> 342 *frame_size = -(signed short)(tmp & 0xf);
>> 343 return 1;
>> 344 }
>> 345 return 0;
>> 346 }
>> 347
>> 348 if (ip->mm_i_format.opcode == mm_addiu32_op &&
>> 349 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29) {
>> 350 *frame_size = -ip->i_format.simmediate;
>> 351 return 1;
>> 352 }
>> 353 #else
>> 354 /* addiu/daddiu sp,sp,-imm */
>> 355 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
>> 356 return 0;
>> 357
>> 358 if (ip->i_format.opcode == addiu_op ||
>> 359 ip->i_format.opcode == daddiu_op) {
>> 360 *frame_size = -ip->i_format.simmediate;
>> 361 return 1;
>> 362 }
>> 363 #endif
>> 364 return 0;
102 } 365 }
103 366
104 unsigned long arch_align_stack(unsigned long s !! 367 static int get_frame_info(struct mips_frame_info *info)
105 { 368 {
106 if (!(current->personality & ADDR_NO_R !! 369 bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
107 sp -= get_random_u32_below(PAG !! 370 union mips_instruction insn, *ip, *ip_end;
108 return sp & ~0xf; !! 371 const unsigned int max_insns = 128;
>> 372 unsigned int last_insn_size = 0;
>> 373 unsigned int i;
>> 374 bool saw_jump = false;
>> 375
>> 376 info->pc_offset = -1;
>> 377 info->frame_size = 0;
>> 378
>> 379 ip = (void *)msk_isa16_mode((ulong)info->func);
>> 380 if (!ip)
>> 381 goto err;
>> 382
>> 383 ip_end = (void *)ip + info->func_size;
>> 384
>> 385 for (i = 0; i < max_insns && ip < ip_end; i++) {
>> 386 ip = (void *)ip + last_insn_size;
>> 387 if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
>> 388 insn.word = ip->halfword[0] << 16;
>> 389 last_insn_size = 2;
>> 390 } else if (is_mmips) {
>> 391 insn.word = ip->halfword[0] << 16 | ip->halfword[1];
>> 392 last_insn_size = 4;
>> 393 } else {
>> 394 insn.word = ip->word;
>> 395 last_insn_size = 4;
>> 396 }
>> 397
>> 398 if (!info->frame_size) {
>> 399 is_sp_move_ins(&insn, &info->frame_size);
>> 400 continue;
>> 401 } else if (!saw_jump && is_jump_ins(ip)) {
>> 402 /*
>> 403 * If we see a jump instruction, we are finished
>> 404 * with the frame save.
>> 405 *
>> 406 * Some functions can have a shortcut return at
>> 407 * the beginning of the function, so don't start
>> 408 * looking for jump instruction until we see the
>> 409 * frame setup.
>> 410 *
>> 411 * The RA save instruction can get put into the
>> 412 * delay slot of the jump instruction, so look
>> 413 * at the next instruction, too.
>> 414 */
>> 415 saw_jump = true;
>> 416 continue;
>> 417 }
>> 418 if (info->pc_offset == -1 &&
>> 419 is_ra_save_ins(&insn, &info->pc_offset))
>> 420 break;
>> 421 if (saw_jump)
>> 422 break;
>> 423 }
>> 424 if (info->frame_size && info->pc_offset >= 0) /* nested */
>> 425 return 0;
>> 426 if (info->pc_offset < 0) /* leaf */
>> 427 return 1;
>> 428 /* prologue seems bogus... */
>> 429 err:
>> 430 return -1;
109 } 431 }
110 432
111 #ifdef CONFIG_COMPAT !! 433 static struct mips_frame_info schedule_mfi __read_mostly;
112 static bool compat_mode_supported __read_mostl <<
113 434
114 bool compat_elf_check_arch(Elf32_Ehdr *hdr) !! 435 #ifdef CONFIG_KALLSYMS
>> 436 static unsigned long get___schedule_addr(void)
115 { 437 {
116 return compat_mode_supported && !! 438 return kallsyms_lookup_name("__schedule");
117 hdr->e_machine == EM_RISCV && <<
118 hdr->e_ident[EI_CLASS] == ELFCL <<
119 } 439 }
>> 440 #else
>> 441 static unsigned long get___schedule_addr(void)
>> 442 {
>> 443 union mips_instruction *ip = (void *)schedule;
>> 444 int max_insns = 8;
>> 445 int i;
120 446
121 static int __init compat_mode_detect(void) !! 447 for (i = 0; i < max_insns; i++, ip++) {
>> 448 if (ip->j_format.opcode == j_op)
>> 449 return J_TARGET(ip, ip->j_format.target);
>> 450 }
>> 451 return 0;
>> 452 }
>> 453 #endif
>> 454
>> 455 static int __init frame_info_init(void)
122 { 456 {
123 unsigned long tmp = csr_read(CSR_STATU !! 457 unsigned long size = 0;
>> 458 #ifdef CONFIG_KALLSYMS
>> 459 unsigned long ofs;
>> 460 #endif
>> 461 unsigned long addr;
124 462
125 csr_write(CSR_STATUS, (tmp & ~SR_UXL) !! 463 addr = get___schedule_addr();
126 compat_mode_supported = !! 464 if (!addr)
127 (csr_read(CSR_STATUS) !! 465 addr = (unsigned long)schedule;
128 466
129 csr_write(CSR_STATUS, tmp); !! 467 #ifdef CONFIG_KALLSYMS
>> 468 kallsyms_lookup_size_offset(addr, &size, &ofs);
>> 469 #endif
>> 470 schedule_mfi.func = (void *)addr;
>> 471 schedule_mfi.func_size = size;
>> 472
>> 473 get_frame_info(&schedule_mfi);
130 474
131 pr_info("riscv: ELF compat mode %s", !! 475 /*
132 compat_mode_supported !! 476 * Without schedule() frame info, result given by
>> 477 * thread_saved_pc() and get_wchan() are not reliable.
>> 478 */
>> 479 if (schedule_mfi.pc_offset < 0)
>> 480 printk("Can't analyze schedule() prologue at %p\n", schedule);
133 481
134 return 0; 482 return 0;
135 } 483 }
136 early_initcall(compat_mode_detect); <<
137 #endif <<
138 484
139 void start_thread(struct pt_regs *regs, unsign !! 485 arch_initcall(frame_info_init);
140 unsigned long sp) !! 486
>> 487 /*
>> 488 * Return saved PC of a blocked thread.
>> 489 */
>> 490 static unsigned long thread_saved_pc(struct task_struct *tsk)
141 { 491 {
142 regs->status = SR_PIE; !! 492 struct thread_struct *t = &tsk->thread;
143 if (has_fpu()) { !! 493
144 regs->status |= SR_FS_INITIAL; !! 494 /* New born processes are a special case */
>> 495 if (t->reg31 == (unsigned long) ret_from_fork)
>> 496 return t->reg31;
>> 497 if (schedule_mfi.pc_offset < 0)
>> 498 return 0;
>> 499 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
>> 500 }
>> 501
>> 502
>> 503 #ifdef CONFIG_KALLSYMS
>> 504 /* generic stack unwinding function */
>> 505 unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
>> 506 unsigned long *sp,
>> 507 unsigned long pc,
>> 508 unsigned long *ra)
>> 509 {
>> 510 unsigned long low, high, irq_stack_high;
>> 511 struct mips_frame_info info;
>> 512 unsigned long size, ofs;
>> 513 struct pt_regs *regs;
>> 514 int leaf;
>> 515
>> 516 if (!stack_page)
>> 517 return 0;
>> 518
>> 519 /*
>> 520 * IRQ stacks start at IRQ_STACK_START
>> 521 * task stacks at THREAD_SIZE - 32
>> 522 */
>> 523 low = stack_page;
>> 524 if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp)) {
>> 525 high = stack_page + IRQ_STACK_START;
>> 526 irq_stack_high = high;
>> 527 } else {
>> 528 high = stack_page + THREAD_SIZE - 32;
>> 529 irq_stack_high = 0;
>> 530 }
>> 531
>> 532 /*
>> 533 * If we reached the top of the interrupt stack, start unwinding
>> 534 * the interrupted task stack.
>> 535 */
>> 536 if (unlikely(*sp == irq_stack_high)) {
>> 537 unsigned long task_sp = *(unsigned long *)*sp;
>> 538
145 /* 539 /*
146 * Restore the initial value t !! 540 * Check that the pointer saved in the IRQ stack head points to
147 * before starting the user pr !! 541 * something within the stack of the current task
148 */ 542 */
149 fstate_restore(current, regs); !! 543 if (!object_is_on_stack((void *)task_sp))
>> 544 return 0;
>> 545
>> 546 /*
>> 547 * Follow pointer to tasks kernel stack frame where interrupted
>> 548 * state was saved.
>> 549 */
>> 550 regs = (struct pt_regs *)task_sp;
>> 551 pc = regs->cp0_epc;
>> 552 if (!user_mode(regs) && __kernel_text_address(pc)) {
>> 553 *sp = regs->regs[29];
>> 554 *ra = regs->regs[31];
>> 555 return pc;
>> 556 }
>> 557 return 0;
>> 558 }
>> 559 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
>> 560 return 0;
>> 561 /*
>> 562 * Return ra if an exception occurred at the first instruction
>> 563 */
>> 564 if (unlikely(ofs == 0)) {
>> 565 pc = *ra;
>> 566 *ra = 0;
>> 567 return pc;
150 } 568 }
151 regs->epc = pc; <<
152 regs->sp = sp; <<
153 569
154 #ifdef CONFIG_64BIT !! 570 info.func = (void *)(pc - ofs);
155 regs->status &= ~SR_UXL; !! 571 info.func_size = ofs; /* analyze from start to ofs */
>> 572 leaf = get_frame_info(&info);
>> 573 if (leaf < 0)
>> 574 return 0;
156 575
157 if (is_compat_task()) !! 576 if (*sp < low || *sp + info.frame_size > high)
158 regs->status |= SR_UXL_32; !! 577 return 0;
>> 578
>> 579 if (leaf)
>> 580 /*
>> 581 * For some extreme cases, get_frame_info() can
>> 582 * consider wrongly a nested function as a leaf
>> 583 * one. In that cases avoid to return always the
>> 584 * same value.
>> 585 */
>> 586 pc = pc != *ra ? *ra : 0;
159 else 587 else
160 regs->status |= SR_UXL_64; !! 588 pc = ((unsigned long *)(*sp))[info.pc_offset];
161 #endif !! 589
>> 590 *sp += info.frame_size;
>> 591 *ra = 0;
>> 592 return __kernel_text_address(pc) ? pc : 0;
>> 593 }
>> 594 EXPORT_SYMBOL(unwind_stack_by_address);
>> 595
>> 596 /* used by show_backtrace() */
>> 597 unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
>> 598 unsigned long pc, unsigned long *ra)
>> 599 {
>> 600 unsigned long stack_page = 0;
>> 601 int cpu;
>> 602
>> 603 for_each_possible_cpu(cpu) {
>> 604 if (on_irq_stack(cpu, *sp)) {
>> 605 stack_page = (unsigned long)irq_stack[cpu];
>> 606 break;
>> 607 }
>> 608 }
>> 609
>> 610 if (!stack_page)
>> 611 stack_page = (unsigned long)task_stack_page(task);
>> 612
>> 613 return unwind_stack_by_address(stack_page, sp, pc, ra);
162 } 614 }
>> 615 #endif
163 616
164 void flush_thread(void) !! 617 /*
>> 618 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
>> 619 */
>> 620 unsigned long get_wchan(struct task_struct *task)
165 { 621 {
166 #ifdef CONFIG_FPU !! 622 unsigned long pc = 0;
167 /* !! 623 #ifdef CONFIG_KALLSYMS
168 * Reset FPU state and context !! 624 unsigned long sp;
169 * frm: round to nearest, ties to !! 625 unsigned long ra = 0;
170 * fflags: accrued exceptions cle <<
171 */ <<
172 fstate_off(current, task_pt_regs(curre <<
173 memset(¤t->thread.fstate, 0, siz <<
174 #endif 626 #endif
175 #ifdef CONFIG_RISCV_ISA_V !! 627
176 /* Reset vector state */ !! 628 if (!task || task == current || task->state == TASK_RUNNING)
177 riscv_v_vstate_ctrl_init(current); !! 629 goto out;
178 riscv_v_vstate_off(task_pt_regs(curren !! 630 if (!task_stack_page(task))
179 kfree(current->thread.vstate.datap); !! 631 goto out;
180 memset(¤t->thread.vstate, 0, siz !! 632
181 clear_tsk_thread_flag(current, TIF_RIS !! 633 pc = thread_saved_pc(task);
>> 634
>> 635 #ifdef CONFIG_KALLSYMS
>> 636 sp = task->thread.reg29 + schedule_mfi.frame_size;
>> 637
>> 638 while (in_sched_functions(pc))
>> 639 pc = unwind_stack(task, &sp, pc, &ra);
182 #endif 640 #endif
>> 641
>> 642 out:
>> 643 return pc;
183 } 644 }
184 645
185 void arch_release_task_struct(struct task_stru !! 646 /*
>> 647 * Don't forget that the stack pointer must be aligned on a 8 bytes
>> 648 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
>> 649 */
>> 650 unsigned long arch_align_stack(unsigned long sp)
186 { 651 {
187 /* Free the vector context of datap. * !! 652 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
188 if (has_vector()) !! 653 sp -= get_random_int() & ~PAGE_MASK;
189 riscv_v_thread_free(tsk); !! 654
>> 655 return sp & ALMASK;
190 } 656 }
191 657
192 int arch_dup_task_struct(struct task_struct *d !! 658 static void arch_dump_stack(void *info)
193 { 659 {
194 fstate_save(src, task_pt_regs(src)); !! 660 struct pt_regs *regs;
195 *dst = *src; <<
196 /* clear entire V context, including d <<
197 memset(&dst->thread.vstate, 0, sizeof( <<
198 memset(&dst->thread.kernel_vstate, 0, <<
199 clear_tsk_thread_flag(dst, TIF_RISCV_V <<
200 661
201 return 0; !! 662 regs = get_irq_regs();
>> 663
>> 664 if (regs)
>> 665 show_regs(regs);
>> 666
>> 667 dump_stack();
202 } 668 }
203 669
204 int copy_thread(struct task_struct *p, const s !! 670 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
205 { 671 {
206 unsigned long clone_flags = args->flag !! 672 long this_cpu = get_cpu();
207 unsigned long usp = args->stack; <<
208 unsigned long tls = args->tls; <<
209 struct pt_regs *childregs = task_pt_re <<
210 673
211 memset(&p->thread.s, 0, sizeof(p->thre !! 674 if (cpumask_test_cpu(this_cpu, mask) && !exclude_self)
>> 675 dump_stack();
212 676
213 /* p->thread holds context to be resto !! 677 smp_call_function_many(mask, arch_dump_stack, NULL, 1);
214 if (unlikely(args->fn)) { !! 678
215 /* Kernel thread */ !! 679 put_cpu();
216 memset(childregs, 0, sizeof(st !! 680 }
217 /* Supervisor/Machine, irqs on !! 681
218 childregs->status = SR_PP | SR !! 682 int mips_get_process_fp_mode(struct task_struct *task)
>> 683 {
>> 684 int value = 0;
>> 685
>> 686 if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
>> 687 value |= PR_FP_MODE_FR;
>> 688 if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
>> 689 value |= PR_FP_MODE_FRE;
>> 690
>> 691 return value;
>> 692 }
>> 693
>> 694 static void prepare_for_fp_mode_switch(void *info)
>> 695 {
>> 696 struct mm_struct *mm = info;
>> 697
>> 698 if (current->mm == mm)
>> 699 lose_fpu(1);
>> 700 }
>> 701
>> 702 int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
>> 703 {
>> 704 const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
>> 705 struct task_struct *t;
>> 706 int max_users;
>> 707
>> 708 /* If nothing to change, return right away, successfully. */
>> 709 if (value == mips_get_process_fp_mode(task))
>> 710 return 0;
>> 711
>> 712 /* Only accept a mode change if 64-bit FP enabled for o32. */
>> 713 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
>> 714 return -EOPNOTSUPP;
>> 715
>> 716 /* And only for o32 tasks. */
>> 717 if (IS_ENABLED(CONFIG_64BIT) && !test_thread_flag(TIF_32BIT_REGS))
>> 718 return -EOPNOTSUPP;
>> 719
>> 720 /* Check the value is valid */
>> 721 if (value & ~known_bits)
>> 722 return -EOPNOTSUPP;
>> 723
>> 724 /* Setting FRE without FR is not supported. */
>> 725 if ((value & (PR_FP_MODE_FR | PR_FP_MODE_FRE)) == PR_FP_MODE_FRE)
>> 726 return -EOPNOTSUPP;
>> 727
>> 728 /* Avoid inadvertently triggering emulation */
>> 729 if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
>> 730 !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))
>> 731 return -EOPNOTSUPP;
>> 732 if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre)
>> 733 return -EOPNOTSUPP;
>> 734
>> 735 /* FR = 0 not supported in MIPS R6 */
>> 736 if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6)
>> 737 return -EOPNOTSUPP;
>> 738
>> 739 /* Proceed with the mode switch */
>> 740 preempt_disable();
>> 741
>> 742 /* Save FP & vector context, then disable FPU & MSA */
>> 743 if (task->signal == current->signal)
>> 744 lose_fpu(1);
>> 745
>> 746 /* Prevent any threads from obtaining live FP context */
>> 747 atomic_set(&task->mm->context.fp_mode_switching, 1);
>> 748 smp_mb__after_atomic();
>> 749
>> 750 /*
>> 751 * If there are multiple online CPUs then force any which are running
>> 752 * threads in this process to lose their FPU context, which they can't
>> 753 * regain until fp_mode_switching is cleared later.
>> 754 */
>> 755 if (num_online_cpus() > 1) {
>> 756 /* No need to send an IPI for the local CPU */
>> 757 max_users = (task->mm == current->mm) ? 1 : 0;
>> 758
>> 759 if (atomic_read(¤t->mm->mm_users) > max_users)
>> 760 smp_call_function(prepare_for_fp_mode_switch,
>> 761 (void *)current->mm, 1);
>> 762 }
>> 763
>> 764 /*
>> 765 * There are now no threads of the process with live FP context, so it
>> 766 * is safe to proceed with the FP mode switch.
>> 767 */
>> 768 for_each_thread(task, t) {
>> 769 /* Update desired FP register width */
>> 770 if (value & PR_FP_MODE_FR) {
>> 771 clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
>> 772 } else {
>> 773 set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
>> 774 clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
>> 775 }
>> 776
>> 777 /* Update desired FP single layout */
>> 778 if (value & PR_FP_MODE_FRE)
>> 779 set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
>> 780 else
>> 781 clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
>> 782 }
>> 783
>> 784 /* Allow threads to use FP again */
>> 785 atomic_set(&task->mm->context.fp_mode_switching, 0);
>> 786 preempt_enable();
219 787
220 p->thread.s[0] = (unsigned lon <<
221 p->thread.s[1] = (unsigned lon <<
222 } else { <<
223 *childregs = *(current_pt_regs <<
224 /* Turn off status.VS */ <<
225 riscv_v_vstate_off(childregs); <<
226 if (usp) /* User fork */ <<
227 childregs->sp = usp; <<
228 if (clone_flags & CLONE_SETTLS <<
229 childregs->tp = tls; <<
230 childregs->a0 = 0; /* Return v <<
231 p->thread.s[0] = 0; <<
232 } <<
233 p->thread.riscv_v_flags = 0; <<
234 if (has_vector()) <<
235 riscv_v_thread_alloc(p); <<
236 p->thread.ra = (unsigned long)ret_from <<
237 p->thread.sp = (unsigned long)childreg <<
238 return 0; 788 return 0;
239 } 789 }
240 790
241 void __init arch_task_cache_init(void) !! 791 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
>> 792 void mips_dump_regs32(u32 *uregs, const struct pt_regs *regs)
242 { 793 {
243 riscv_v_setup_ctx_cache(); !! 794 unsigned int i;
>> 795
>> 796 for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
>> 797 /* k0/k1 are copied as zero. */
>> 798 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
>> 799 uregs[i] = 0;
>> 800 else
>> 801 uregs[i] = regs->regs[i - MIPS32_EF_R0];
>> 802 }
>> 803
>> 804 uregs[MIPS32_EF_LO] = regs->lo;
>> 805 uregs[MIPS32_EF_HI] = regs->hi;
>> 806 uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
>> 807 uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
>> 808 uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
>> 809 uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
>> 810 }
>> 811 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
>> 812
>> 813 #ifdef CONFIG_64BIT
>> 814 void mips_dump_regs64(u64 *uregs, const struct pt_regs *regs)
>> 815 {
>> 816 unsigned int i;
>> 817
>> 818 for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
>> 819 /* k0/k1 are copied as zero. */
>> 820 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
>> 821 uregs[i] = 0;
>> 822 else
>> 823 uregs[i] = regs->regs[i - MIPS64_EF_R0];
>> 824 }
>> 825
>> 826 uregs[MIPS64_EF_LO] = regs->lo;
>> 827 uregs[MIPS64_EF_HI] = regs->hi;
>> 828 uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
>> 829 uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
>> 830 uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
>> 831 uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
244 } 832 }
>> 833 #endif /* CONFIG_64BIT */
245 834
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