1 // SPDX-License-Identifier: GPL-2.0-or-later <<
2 /* 1 /*
3 * Copyright (C) 2009 Sunplus Core Technology !! 2 * This file is subject to the terms and conditions of the GNU General Public
4 * Chen Liqin <liqin.chen@sunplusct.com> !! 3 * License. See the file "COPYING" in the main directory of this archive
5 * Lennox Wu <lennox.wu@sunplusct.com> !! 4 * for more details.
6 * Copyright (C) 2012 Regents of the Universit !! 5 *
7 * Copyright (C) 2017 SiFive !! 6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
>> 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
>> 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
>> 9 * Copyright (C) 2004 Thiemo Seufer
>> 10 * Copyright (C) 2013 Imagination Technologies Ltd.
8 */ 11 */
9 !! 12 #include <linux/errno.h>
10 #include <linux/cpu.h> <<
11 #include <linux/kernel.h> <<
12 #include <linux/sched.h> 13 #include <linux/sched.h>
13 #include <linux/sched/debug.h> 14 #include <linux/sched/debug.h>
>> 15 #include <linux/sched/task.h>
14 #include <linux/sched/task_stack.h> 16 #include <linux/sched/task_stack.h>
15 #include <linux/tick.h> 17 #include <linux/tick.h>
>> 18 #include <linux/kernel.h>
>> 19 #include <linux/mm.h>
>> 20 #include <linux/stddef.h>
>> 21 #include <linux/unistd.h>
>> 22 #include <linux/export.h>
16 #include <linux/ptrace.h> 23 #include <linux/ptrace.h>
17 #include <linux/uaccess.h> !! 24 #include <linux/mman.h>
18 #include <linux/personality.h> 25 #include <linux/personality.h>
>> 26 #include <linux/sys.h>
>> 27 #include <linux/init.h>
>> 28 #include <linux/completion.h>
>> 29 #include <linux/kallsyms.h>
>> 30 #include <linux/random.h>
>> 31 #include <linux/prctl.h>
>> 32 #include <linux/nmi.h>
>> 33 #include <linux/cpu.h>
19 34
20 #include <asm/unistd.h> !! 35 #include <asm/abi.h>
>> 36 #include <asm/asm.h>
>> 37 #include <asm/bootinfo.h>
>> 38 #include <asm/cpu.h>
>> 39 #include <asm/dsemul.h>
>> 40 #include <asm/dsp.h>
>> 41 #include <asm/fpu.h>
>> 42 #include <asm/irq.h>
>> 43 #include <asm/mips-cps.h>
>> 44 #include <asm/msa.h>
>> 45 #include <asm/mipsregs.h>
21 #include <asm/processor.h> 46 #include <asm/processor.h>
22 #include <asm/csr.h> !! 47 #include <asm/reg.h>
>> 48 #include <linux/uaccess.h>
>> 49 #include <asm/io.h>
>> 50 #include <asm/elf.h>
>> 51 #include <asm/isadep.h>
>> 52 #include <asm/inst.h>
23 #include <asm/stacktrace.h> 53 #include <asm/stacktrace.h>
24 #include <asm/string.h> !! 54 #include <asm/irq_regs.h>
25 #include <asm/switch_to.h> <<
26 #include <asm/thread_info.h> <<
27 #include <asm/cpuidle.h> <<
28 #include <asm/vector.h> <<
29 #include <asm/cpufeature.h> <<
30 #include <asm/exec.h> <<
31 55
32 #if defined(CONFIG_STACKPROTECTOR) && !defined !! 56 #ifdef CONFIG_HOTPLUG_CPU
33 #include <linux/stackprotector.h> !! 57 void arch_cpu_idle_dead(void)
34 unsigned long __stack_chk_guard __read_mostly; !! 58 {
35 EXPORT_SYMBOL(__stack_chk_guard); !! 59 play_dead();
>> 60 }
36 #endif 61 #endif
37 62
38 extern asmlinkage void ret_from_fork(void); !! 63 asmlinkage void ret_from_fork(void);
>> 64 asmlinkage void ret_from_kernel_thread(void);
39 65
40 void noinstr arch_cpu_idle(void) !! 66 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
41 { 67 {
42 cpu_do_idle(); !! 68 unsigned long status;
>> 69
>> 70 /* New thread loses kernel privileges. */
>> 71 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
>> 72 status |= KU_USER;
>> 73 regs->cp0_status = status;
>> 74 lose_fpu(0);
>> 75 clear_thread_flag(TIF_MSA_CTX_LIVE);
>> 76 clear_used_math();
>> 77 #ifdef CONFIG_MIPS_FP_SUPPORT
>> 78 atomic_set(¤t->thread.bd_emu_frame, BD_EMUFRAME_NONE);
>> 79 #endif
>> 80 init_dsp();
>> 81 regs->cp0_epc = pc;
>> 82 regs->regs[29] = sp;
43 } 83 }
44 84
45 int set_unalign_ctl(struct task_struct *tsk, u !! 85 void exit_thread(struct task_struct *tsk)
46 { 86 {
47 if (!unaligned_ctl_available()) !! 87 /*
48 return -EINVAL; !! 88 * User threads may have allocated a delay slot emulation frame.
>> 89 * If so, clean up that allocation.
>> 90 */
>> 91 if (!(current->flags & PF_KTHREAD))
>> 92 dsemul_thread_cleanup(tsk);
>> 93 }
>> 94
>> 95 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
>> 96 {
>> 97 /*
>> 98 * Save any process state which is live in hardware registers to the
>> 99 * parent context prior to duplication. This prevents the new child
>> 100 * state becoming stale if the parent is preempted before copy_thread()
>> 101 * gets a chance to save the parent's live hardware registers to the
>> 102 * child context.
>> 103 */
>> 104 preempt_disable();
>> 105
>> 106 if (is_msa_enabled())
>> 107 save_msa(current);
>> 108 else if (is_fpu_owner())
>> 109 _save_fp(current);
49 110
50 tsk->thread.align_ctl = val; !! 111 save_dsp(current);
>> 112
>> 113 preempt_enable();
>> 114
>> 115 *dst = *src;
51 return 0; 116 return 0;
52 } 117 }
53 118
54 int get_unalign_ctl(struct task_struct *tsk, u !! 119 /*
55 { !! 120 * Copy architecture-specific thread state
56 if (!unaligned_ctl_available()) !! 121 */
57 return -EINVAL; !! 122 int copy_thread(unsigned long clone_flags, unsigned long usp,
>> 123 unsigned long kthread_arg, struct task_struct *p,
>> 124 unsigned long tls)
>> 125 {
>> 126 struct thread_info *ti = task_thread_info(p);
>> 127 struct pt_regs *childregs, *regs = current_pt_regs();
>> 128 unsigned long childksp;
>> 129
>> 130 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
>> 131
>> 132 /* set up new TSS. */
>> 133 childregs = (struct pt_regs *) childksp - 1;
>> 134 /* Put the stack after the struct pt_regs. */
>> 135 childksp = (unsigned long) childregs;
>> 136 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
>> 137 if (unlikely(p->flags & PF_KTHREAD)) {
>> 138 /* kernel thread */
>> 139 unsigned long status = p->thread.cp0_status;
>> 140 memset(childregs, 0, sizeof(struct pt_regs));
>> 141 ti->addr_limit = KERNEL_DS;
>> 142 p->thread.reg16 = usp; /* fn */
>> 143 p->thread.reg17 = kthread_arg;
>> 144 p->thread.reg29 = childksp;
>> 145 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
>> 146 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
>> 147 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
>> 148 ((status & (ST0_KUC | ST0_IEC)) << 2);
>> 149 #else
>> 150 status |= ST0_EXL;
>> 151 #endif
>> 152 childregs->cp0_status = status;
>> 153 return 0;
>> 154 }
58 155
59 return put_user(tsk->thread.align_ctl, !! 156 /* user thread */
>> 157 *childregs = *regs;
>> 158 childregs->regs[7] = 0; /* Clear error flag */
>> 159 childregs->regs[2] = 0; /* Child gets zero as return value */
>> 160 if (usp)
>> 161 childregs->regs[29] = usp;
>> 162 ti->addr_limit = USER_DS;
>> 163
>> 164 p->thread.reg29 = (unsigned long) childregs;
>> 165 p->thread.reg31 = (unsigned long) ret_from_fork;
>> 166
>> 167 /*
>> 168 * New tasks lose permission to use the fpu. This accelerates context
>> 169 * switching for most programs since they don't use the fpu.
>> 170 */
>> 171 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
>> 172
>> 173 clear_tsk_thread_flag(p, TIF_USEDFPU);
>> 174 clear_tsk_thread_flag(p, TIF_USEDMSA);
>> 175 clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
>> 176
>> 177 #ifdef CONFIG_MIPS_MT_FPAFF
>> 178 clear_tsk_thread_flag(p, TIF_FPUBOUND);
>> 179 #endif /* CONFIG_MIPS_MT_FPAFF */
>> 180
>> 181 #ifdef CONFIG_MIPS_FP_SUPPORT
>> 182 atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
>> 183 #endif
>> 184
>> 185 if (clone_flags & CLONE_SETTLS)
>> 186 ti->tp_value = tls;
>> 187
>> 188 return 0;
60 } 189 }
61 190
62 void __show_regs(struct pt_regs *regs) !! 191 #ifdef CONFIG_STACKPROTECTOR
>> 192 #include <linux/stackprotector.h>
>> 193 unsigned long __stack_chk_guard __read_mostly;
>> 194 EXPORT_SYMBOL(__stack_chk_guard);
>> 195 #endif
>> 196
>> 197 struct mips_frame_info {
>> 198 void *func;
>> 199 unsigned long func_size;
>> 200 int frame_size;
>> 201 int pc_offset;
>> 202 };
>> 203
>> 204 #define J_TARGET(pc,target) \
>> 205 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
>> 206
>> 207 static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
63 { 208 {
64 show_regs_print_info(KERN_DEFAULT); !! 209 #ifdef CONFIG_CPU_MICROMIPS
>> 210 /*
>> 211 * swsp ra,offset
>> 212 * swm16 reglist,offset(sp)
>> 213 * swm32 reglist,offset(sp)
>> 214 * sw32 ra,offset(sp)
>> 215 * jradiussp - NOT SUPPORTED
>> 216 *
>> 217 * microMIPS is way more fun...
>> 218 */
>> 219 if (mm_insn_16bit(ip->word >> 16)) {
>> 220 switch (ip->mm16_r5_format.opcode) {
>> 221 case mm_swsp16_op:
>> 222 if (ip->mm16_r5_format.rt != 31)
>> 223 return 0;
>> 224
>> 225 *poff = ip->mm16_r5_format.imm;
>> 226 *poff = (*poff << 2) / sizeof(ulong);
>> 227 return 1;
>> 228
>> 229 case mm_pool16c_op:
>> 230 switch (ip->mm16_m_format.func) {
>> 231 case mm_swm16_op:
>> 232 *poff = ip->mm16_m_format.imm;
>> 233 *poff += 1 + ip->mm16_m_format.rlist;
>> 234 *poff = (*poff << 2) / sizeof(ulong);
>> 235 return 1;
>> 236
>> 237 default:
>> 238 return 0;
>> 239 }
>> 240
>> 241 default:
>> 242 return 0;
>> 243 }
>> 244 }
65 245
66 if (!user_mode(regs)) { !! 246 switch (ip->i_format.opcode) {
67 pr_cont("epc : %pS\n", (void * !! 247 case mm_sw32_op:
68 pr_cont(" ra : %pS\n", (void * !! 248 if (ip->i_format.rs != 29)
>> 249 return 0;
>> 250 if (ip->i_format.rt != 31)
>> 251 return 0;
>> 252
>> 253 *poff = ip->i_format.simmediate / sizeof(ulong);
>> 254 return 1;
>> 255
>> 256 case mm_pool32b_op:
>> 257 switch (ip->mm_m_format.func) {
>> 258 case mm_swm32_func:
>> 259 if (ip->mm_m_format.rd < 0x10)
>> 260 return 0;
>> 261 if (ip->mm_m_format.base != 29)
>> 262 return 0;
>> 263
>> 264 *poff = ip->mm_m_format.simmediate;
>> 265 *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
>> 266 *poff /= sizeof(ulong);
>> 267 return 1;
>> 268 default:
>> 269 return 0;
>> 270 }
>> 271
>> 272 default:
>> 273 return 0;
>> 274 }
>> 275 #else
>> 276 /* sw / sd $ra, offset($sp) */
>> 277 if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
>> 278 ip->i_format.rs == 29 && ip->i_format.rt == 31) {
>> 279 *poff = ip->i_format.simmediate / sizeof(ulong);
>> 280 return 1;
69 } 281 }
70 282
71 pr_cont("epc : " REG_FMT " ra : " REG_ !! 283 return 0;
72 regs->epc, regs->ra, regs->sp) !! 284 #endif
73 pr_cont(" gp : " REG_FMT " tp : " REG_ !! 285 }
74 regs->gp, regs->tp, regs->t0); <<
75 pr_cont(" t1 : " REG_FMT " t2 : " REG_ <<
76 regs->t1, regs->t2, regs->s0); <<
77 pr_cont(" s1 : " REG_FMT " a0 : " REG_ <<
78 regs->s1, regs->a0, regs->a1); <<
79 pr_cont(" a2 : " REG_FMT " a3 : " REG_ <<
80 regs->a2, regs->a3, regs->a4); <<
81 pr_cont(" a5 : " REG_FMT " a6 : " REG_ <<
82 regs->a5, regs->a6, regs->a7); <<
83 pr_cont(" s2 : " REG_FMT " s3 : " REG_ <<
84 regs->s2, regs->s3, regs->s4); <<
85 pr_cont(" s5 : " REG_FMT " s6 : " REG_ <<
86 regs->s5, regs->s6, regs->s7); <<
87 pr_cont(" s8 : " REG_FMT " s9 : " REG_ <<
88 regs->s8, regs->s9, regs->s10) <<
89 pr_cont(" s11: " REG_FMT " t3 : " REG_ <<
90 regs->s11, regs->t3, regs->t4) <<
91 pr_cont(" t5 : " REG_FMT " t6 : " REG_ <<
92 regs->t5, regs->t6); <<
93 286
94 pr_cont("status: " REG_FMT " badaddr: !! 287 static inline int is_jump_ins(union mips_instruction *ip)
95 regs->status, regs->badaddr, r !! 288 {
>> 289 #ifdef CONFIG_CPU_MICROMIPS
>> 290 /*
>> 291 * jr16,jrc,jalr16,jalr16
>> 292 * jal
>> 293 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
>> 294 * jraddiusp - NOT SUPPORTED
>> 295 *
>> 296 * microMIPS is kind of more fun...
>> 297 */
>> 298 if (mm_insn_16bit(ip->word >> 16)) {
>> 299 if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
>> 300 (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
>> 301 return 1;
>> 302 return 0;
>> 303 }
>> 304
>> 305 if (ip->j_format.opcode == mm_j32_op)
>> 306 return 1;
>> 307 if (ip->j_format.opcode == mm_jal32_op)
>> 308 return 1;
>> 309 if (ip->r_format.opcode != mm_pool32a_op ||
>> 310 ip->r_format.func != mm_pool32axf_op)
>> 311 return 0;
>> 312 return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
>> 313 #else
>> 314 if (ip->j_format.opcode == j_op)
>> 315 return 1;
>> 316 if (ip->j_format.opcode == jal_op)
>> 317 return 1;
>> 318 if (ip->r_format.opcode != spec_op)
>> 319 return 0;
>> 320 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
>> 321 #endif
96 } 322 }
97 void show_regs(struct pt_regs *regs) !! 323
>> 324 static inline int is_sp_move_ins(union mips_instruction *ip, int *frame_size)
98 { 325 {
99 __show_regs(regs); !! 326 #ifdef CONFIG_CPU_MICROMIPS
100 if (!user_mode(regs)) !! 327 unsigned short tmp;
101 dump_backtrace(regs, NULL, KER !! 328
>> 329 /*
>> 330 * addiusp -imm
>> 331 * addius5 sp,-imm
>> 332 * addiu32 sp,sp,-imm
>> 333 * jradiussp - NOT SUPPORTED
>> 334 *
>> 335 * microMIPS is not more fun...
>> 336 */
>> 337 if (mm_insn_16bit(ip->word >> 16)) {
>> 338 if (ip->mm16_r3_format.opcode == mm_pool16d_op &&
>> 339 ip->mm16_r3_format.simmediate & mm_addiusp_func) {
>> 340 tmp = ip->mm_b0_format.simmediate >> 1;
>> 341 tmp = ((tmp & 0x1ff) ^ 0x100) - 0x100;
>> 342 if ((tmp + 2) < 4) /* 0x0,0x1,0x1fe,0x1ff are special */
>> 343 tmp ^= 0x100;
>> 344 *frame_size = -(signed short)(tmp << 2);
>> 345 return 1;
>> 346 }
>> 347 if (ip->mm16_r5_format.opcode == mm_pool16d_op &&
>> 348 ip->mm16_r5_format.rt == 29) {
>> 349 tmp = ip->mm16_r5_format.imm >> 1;
>> 350 *frame_size = -(signed short)(tmp & 0xf);
>> 351 return 1;
>> 352 }
>> 353 return 0;
>> 354 }
>> 355
>> 356 if (ip->mm_i_format.opcode == mm_addiu32_op &&
>> 357 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29) {
>> 358 *frame_size = -ip->i_format.simmediate;
>> 359 return 1;
>> 360 }
>> 361 #else
>> 362 /* addiu/daddiu sp,sp,-imm */
>> 363 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
>> 364 return 0;
>> 365
>> 366 if (ip->i_format.opcode == addiu_op ||
>> 367 ip->i_format.opcode == daddiu_op) {
>> 368 *frame_size = -ip->i_format.simmediate;
>> 369 return 1;
>> 370 }
>> 371 #endif
>> 372 return 0;
102 } 373 }
103 374
104 unsigned long arch_align_stack(unsigned long s !! 375 static int get_frame_info(struct mips_frame_info *info)
105 { 376 {
106 if (!(current->personality & ADDR_NO_R !! 377 bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
107 sp -= get_random_u32_below(PAG !! 378 union mips_instruction insn, *ip;
108 return sp & ~0xf; !! 379 const unsigned int max_insns = 128;
>> 380 unsigned int last_insn_size = 0;
>> 381 unsigned int i;
>> 382 bool saw_jump = false;
>> 383
>> 384 info->pc_offset = -1;
>> 385 info->frame_size = 0;
>> 386
>> 387 ip = (void *)msk_isa16_mode((ulong)info->func);
>> 388 if (!ip)
>> 389 goto err;
>> 390
>> 391 for (i = 0; i < max_insns; i++) {
>> 392 ip = (void *)ip + last_insn_size;
>> 393
>> 394 if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
>> 395 insn.word = ip->halfword[0] << 16;
>> 396 last_insn_size = 2;
>> 397 } else if (is_mmips) {
>> 398 insn.word = ip->halfword[0] << 16 | ip->halfword[1];
>> 399 last_insn_size = 4;
>> 400 } else {
>> 401 insn.word = ip->word;
>> 402 last_insn_size = 4;
>> 403 }
>> 404
>> 405 if (!info->frame_size) {
>> 406 is_sp_move_ins(&insn, &info->frame_size);
>> 407 continue;
>> 408 } else if (!saw_jump && is_jump_ins(ip)) {
>> 409 /*
>> 410 * If we see a jump instruction, we are finished
>> 411 * with the frame save.
>> 412 *
>> 413 * Some functions can have a shortcut return at
>> 414 * the beginning of the function, so don't start
>> 415 * looking for jump instruction until we see the
>> 416 * frame setup.
>> 417 *
>> 418 * The RA save instruction can get put into the
>> 419 * delay slot of the jump instruction, so look
>> 420 * at the next instruction, too.
>> 421 */
>> 422 saw_jump = true;
>> 423 continue;
>> 424 }
>> 425 if (info->pc_offset == -1 &&
>> 426 is_ra_save_ins(&insn, &info->pc_offset))
>> 427 break;
>> 428 if (saw_jump)
>> 429 break;
>> 430 }
>> 431 if (info->frame_size && info->pc_offset >= 0) /* nested */
>> 432 return 0;
>> 433 if (info->pc_offset < 0) /* leaf */
>> 434 return 1;
>> 435 /* prologue seems bogus... */
>> 436 err:
>> 437 return -1;
109 } 438 }
110 439
111 #ifdef CONFIG_COMPAT !! 440 static struct mips_frame_info schedule_mfi __read_mostly;
112 static bool compat_mode_supported __read_mostl <<
113 441
114 bool compat_elf_check_arch(Elf32_Ehdr *hdr) !! 442 #ifdef CONFIG_KALLSYMS
>> 443 static unsigned long get___schedule_addr(void)
>> 444 {
>> 445 return kallsyms_lookup_name("__schedule");
>> 446 }
>> 447 #else
>> 448 static unsigned long get___schedule_addr(void)
115 { 449 {
116 return compat_mode_supported && !! 450 union mips_instruction *ip = (void *)schedule;
117 hdr->e_machine == EM_RISCV && !! 451 int max_insns = 8;
118 hdr->e_ident[EI_CLASS] == ELFCL !! 452 int i;
>> 453
>> 454 for (i = 0; i < max_insns; i++, ip++) {
>> 455 if (ip->j_format.opcode == j_op)
>> 456 return J_TARGET(ip, ip->j_format.target);
>> 457 }
>> 458 return 0;
119 } 459 }
>> 460 #endif
120 461
121 static int __init compat_mode_detect(void) !! 462 static int __init frame_info_init(void)
122 { 463 {
123 unsigned long tmp = csr_read(CSR_STATU !! 464 unsigned long size = 0;
>> 465 #ifdef CONFIG_KALLSYMS
>> 466 unsigned long ofs;
>> 467 #endif
>> 468 unsigned long addr;
124 469
125 csr_write(CSR_STATUS, (tmp & ~SR_UXL) !! 470 addr = get___schedule_addr();
126 compat_mode_supported = !! 471 if (!addr)
127 (csr_read(CSR_STATUS) !! 472 addr = (unsigned long)schedule;
128 473
129 csr_write(CSR_STATUS, tmp); !! 474 #ifdef CONFIG_KALLSYMS
>> 475 kallsyms_lookup_size_offset(addr, &size, &ofs);
>> 476 #endif
>> 477 schedule_mfi.func = (void *)addr;
>> 478 schedule_mfi.func_size = size;
130 479
131 pr_info("riscv: ELF compat mode %s", !! 480 get_frame_info(&schedule_mfi);
132 compat_mode_supported !! 481
>> 482 /*
>> 483 * Without schedule() frame info, result given by
>> 484 * thread_saved_pc() and get_wchan() are not reliable.
>> 485 */
>> 486 if (schedule_mfi.pc_offset < 0)
>> 487 printk("Can't analyze schedule() prologue at %p\n", schedule);
133 488
134 return 0; 489 return 0;
135 } 490 }
136 early_initcall(compat_mode_detect); <<
137 #endif <<
138 491
139 void start_thread(struct pt_regs *regs, unsign !! 492 arch_initcall(frame_info_init);
140 unsigned long sp) !! 493
>> 494 /*
>> 495 * Return saved PC of a blocked thread.
>> 496 */
>> 497 static unsigned long thread_saved_pc(struct task_struct *tsk)
141 { 498 {
142 regs->status = SR_PIE; !! 499 struct thread_struct *t = &tsk->thread;
143 if (has_fpu()) { !! 500
144 regs->status |= SR_FS_INITIAL; !! 501 /* New born processes are a special case */
>> 502 if (t->reg31 == (unsigned long) ret_from_fork)
>> 503 return t->reg31;
>> 504 if (schedule_mfi.pc_offset < 0)
>> 505 return 0;
>> 506 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
>> 507 }
>> 508
>> 509
>> 510 #ifdef CONFIG_KALLSYMS
>> 511 /* generic stack unwinding function */
>> 512 unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
>> 513 unsigned long *sp,
>> 514 unsigned long pc,
>> 515 unsigned long *ra)
>> 516 {
>> 517 unsigned long low, high, irq_stack_high;
>> 518 struct mips_frame_info info;
>> 519 unsigned long size, ofs;
>> 520 struct pt_regs *regs;
>> 521 int leaf;
>> 522
>> 523 if (!stack_page)
>> 524 return 0;
>> 525
>> 526 /*
>> 527 * IRQ stacks start at IRQ_STACK_START
>> 528 * task stacks at THREAD_SIZE - 32
>> 529 */
>> 530 low = stack_page;
>> 531 if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp)) {
>> 532 high = stack_page + IRQ_STACK_START;
>> 533 irq_stack_high = high;
>> 534 } else {
>> 535 high = stack_page + THREAD_SIZE - 32;
>> 536 irq_stack_high = 0;
>> 537 }
>> 538
>> 539 /*
>> 540 * If we reached the top of the interrupt stack, start unwinding
>> 541 * the interrupted task stack.
>> 542 */
>> 543 if (unlikely(*sp == irq_stack_high)) {
>> 544 unsigned long task_sp = *(unsigned long *)*sp;
>> 545
>> 546 /*
>> 547 * Check that the pointer saved in the IRQ stack head points to
>> 548 * something within the stack of the current task
>> 549 */
>> 550 if (!object_is_on_stack((void *)task_sp))
>> 551 return 0;
>> 552
145 /* 553 /*
146 * Restore the initial value t !! 554 * Follow pointer to tasks kernel stack frame where interrupted
147 * before starting the user pr !! 555 * state was saved.
148 */ 556 */
149 fstate_restore(current, regs); !! 557 regs = (struct pt_regs *)task_sp;
>> 558 pc = regs->cp0_epc;
>> 559 if (!user_mode(regs) && __kernel_text_address(pc)) {
>> 560 *sp = regs->regs[29];
>> 561 *ra = regs->regs[31];
>> 562 return pc;
>> 563 }
>> 564 return 0;
>> 565 }
>> 566 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
>> 567 return 0;
>> 568 /*
>> 569 * Return ra if an exception occurred at the first instruction
>> 570 */
>> 571 if (unlikely(ofs == 0)) {
>> 572 pc = *ra;
>> 573 *ra = 0;
>> 574 return pc;
150 } 575 }
151 regs->epc = pc; <<
152 regs->sp = sp; <<
153 576
154 #ifdef CONFIG_64BIT !! 577 info.func = (void *)(pc - ofs);
155 regs->status &= ~SR_UXL; !! 578 info.func_size = ofs; /* analyze from start to ofs */
>> 579 leaf = get_frame_info(&info);
>> 580 if (leaf < 0)
>> 581 return 0;
156 582
157 if (is_compat_task()) !! 583 if (*sp < low || *sp + info.frame_size > high)
158 regs->status |= SR_UXL_32; !! 584 return 0;
>> 585
>> 586 if (leaf)
>> 587 /*
>> 588 * For some extreme cases, get_frame_info() can
>> 589 * consider wrongly a nested function as a leaf
>> 590 * one. In that cases avoid to return always the
>> 591 * same value.
>> 592 */
>> 593 pc = pc != *ra ? *ra : 0;
159 else 594 else
160 regs->status |= SR_UXL_64; !! 595 pc = ((unsigned long *)(*sp))[info.pc_offset];
161 #endif !! 596
>> 597 *sp += info.frame_size;
>> 598 *ra = 0;
>> 599 return __kernel_text_address(pc) ? pc : 0;
>> 600 }
>> 601 EXPORT_SYMBOL(unwind_stack_by_address);
>> 602
>> 603 /* used by show_backtrace() */
>> 604 unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
>> 605 unsigned long pc, unsigned long *ra)
>> 606 {
>> 607 unsigned long stack_page = 0;
>> 608 int cpu;
>> 609
>> 610 for_each_possible_cpu(cpu) {
>> 611 if (on_irq_stack(cpu, *sp)) {
>> 612 stack_page = (unsigned long)irq_stack[cpu];
>> 613 break;
>> 614 }
>> 615 }
>> 616
>> 617 if (!stack_page)
>> 618 stack_page = (unsigned long)task_stack_page(task);
>> 619
>> 620 return unwind_stack_by_address(stack_page, sp, pc, ra);
162 } 621 }
>> 622 #endif
163 623
164 void flush_thread(void) !! 624 /*
>> 625 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
>> 626 */
>> 627 unsigned long get_wchan(struct task_struct *task)
165 { 628 {
166 #ifdef CONFIG_FPU !! 629 unsigned long pc = 0;
167 /* !! 630 #ifdef CONFIG_KALLSYMS
168 * Reset FPU state and context !! 631 unsigned long sp;
169 * frm: round to nearest, ties to !! 632 unsigned long ra = 0;
170 * fflags: accrued exceptions cle <<
171 */ <<
172 fstate_off(current, task_pt_regs(curre <<
173 memset(¤t->thread.fstate, 0, siz <<
174 #endif 633 #endif
175 #ifdef CONFIG_RISCV_ISA_V !! 634
176 /* Reset vector state */ !! 635 if (!task || task == current || task->state == TASK_RUNNING)
177 riscv_v_vstate_ctrl_init(current); !! 636 goto out;
178 riscv_v_vstate_off(task_pt_regs(curren !! 637 if (!task_stack_page(task))
179 kfree(current->thread.vstate.datap); !! 638 goto out;
180 memset(¤t->thread.vstate, 0, siz !! 639
181 clear_tsk_thread_flag(current, TIF_RIS !! 640 pc = thread_saved_pc(task);
>> 641
>> 642 #ifdef CONFIG_KALLSYMS
>> 643 sp = task->thread.reg29 + schedule_mfi.frame_size;
>> 644
>> 645 while (in_sched_functions(pc))
>> 646 pc = unwind_stack(task, &sp, pc, &ra);
182 #endif 647 #endif
>> 648
>> 649 out:
>> 650 return pc;
183 } 651 }
184 652
185 void arch_release_task_struct(struct task_stru !! 653 unsigned long mips_stack_top(void)
186 { 654 {
187 /* Free the vector context of datap. * !! 655 unsigned long top = TASK_SIZE & PAGE_MASK;
188 if (has_vector()) !! 656
189 riscv_v_thread_free(tsk); !! 657 if (IS_ENABLED(CONFIG_MIPS_FP_SUPPORT)) {
>> 658 /* One page for branch delay slot "emulation" */
>> 659 top -= PAGE_SIZE;
>> 660 }
>> 661
>> 662 /* Space for the VDSO, data page & GIC user page */
>> 663 top -= PAGE_ALIGN(current->thread.abi->vdso->size);
>> 664 top -= PAGE_SIZE;
>> 665 top -= mips_gic_present() ? PAGE_SIZE : 0;
>> 666
>> 667 /* Space for cache colour alignment */
>> 668 if (cpu_has_dc_aliases)
>> 669 top -= shm_align_mask + 1;
>> 670
>> 671 /* Space to randomize the VDSO base */
>> 672 if (current->flags & PF_RANDOMIZE)
>> 673 top -= VDSO_RANDOMIZE_SIZE;
>> 674
>> 675 return top;
190 } 676 }
191 677
192 int arch_dup_task_struct(struct task_struct *d !! 678 /*
>> 679 * Don't forget that the stack pointer must be aligned on a 8 bytes
>> 680 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
>> 681 */
>> 682 unsigned long arch_align_stack(unsigned long sp)
193 { 683 {
194 fstate_save(src, task_pt_regs(src)); !! 684 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
195 *dst = *src; !! 685 sp -= get_random_int() & ~PAGE_MASK;
196 /* clear entire V context, including d !! 686
197 memset(&dst->thread.vstate, 0, sizeof( !! 687 return sp & ALMASK;
198 memset(&dst->thread.kernel_vstate, 0, !! 688 }
199 clear_tsk_thread_flag(dst, TIF_RISCV_V !! 689
>> 690 static DEFINE_PER_CPU(call_single_data_t, backtrace_csd);
>> 691 static struct cpumask backtrace_csd_busy;
>> 692
>> 693 static void handle_backtrace(void *info)
>> 694 {
>> 695 nmi_cpu_backtrace(get_irq_regs());
>> 696 cpumask_clear_cpu(smp_processor_id(), &backtrace_csd_busy);
>> 697 }
>> 698
>> 699 static void raise_backtrace(cpumask_t *mask)
>> 700 {
>> 701 call_single_data_t *csd;
>> 702 int cpu;
>> 703
>> 704 for_each_cpu(cpu, mask) {
>> 705 /*
>> 706 * If we previously sent an IPI to the target CPU & it hasn't
>> 707 * cleared its bit in the busy cpumask then it didn't handle
>> 708 * our previous IPI & it's not safe for us to reuse the
>> 709 * call_single_data_t.
>> 710 */
>> 711 if (cpumask_test_and_set_cpu(cpu, &backtrace_csd_busy)) {
>> 712 pr_warn("Unable to send backtrace IPI to CPU%u - perhaps it hung?\n",
>> 713 cpu);
>> 714 continue;
>> 715 }
>> 716
>> 717 csd = &per_cpu(backtrace_csd, cpu);
>> 718 csd->func = handle_backtrace;
>> 719 smp_call_function_single_async(cpu, csd);
>> 720 }
>> 721 }
>> 722
>> 723 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
>> 724 {
>> 725 nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_backtrace);
>> 726 }
>> 727
>> 728 int mips_get_process_fp_mode(struct task_struct *task)
>> 729 {
>> 730 int value = 0;
>> 731
>> 732 if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
>> 733 value |= PR_FP_MODE_FR;
>> 734 if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
>> 735 value |= PR_FP_MODE_FRE;
200 736
>> 737 return value;
>> 738 }
>> 739
>> 740 static long prepare_for_fp_mode_switch(void *unused)
>> 741 {
>> 742 /*
>> 743 * This is icky, but we use this to simply ensure that all CPUs have
>> 744 * context switched, regardless of whether they were previously running
>> 745 * kernel or user code. This ensures that no CPU that a mode-switching
>> 746 * program may execute on keeps its FPU enabled (& in the old mode)
>> 747 * throughout the mode switch.
>> 748 */
201 return 0; 749 return 0;
202 } 750 }
203 751
204 int copy_thread(struct task_struct *p, const s !! 752 int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
205 { 753 {
206 unsigned long clone_flags = args->flag !! 754 const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
207 unsigned long usp = args->stack; !! 755 struct task_struct *t;
208 unsigned long tls = args->tls; !! 756 struct cpumask process_cpus;
209 struct pt_regs *childregs = task_pt_re !! 757 int cpu;
>> 758
>> 759 /* If nothing to change, return right away, successfully. */
>> 760 if (value == mips_get_process_fp_mode(task))
>> 761 return 0;
>> 762
>> 763 /* Only accept a mode change if 64-bit FP enabled for o32. */
>> 764 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
>> 765 return -EOPNOTSUPP;
>> 766
>> 767 /* And only for o32 tasks. */
>> 768 if (IS_ENABLED(CONFIG_64BIT) && !test_thread_flag(TIF_32BIT_REGS))
>> 769 return -EOPNOTSUPP;
>> 770
>> 771 /* Check the value is valid */
>> 772 if (value & ~known_bits)
>> 773 return -EOPNOTSUPP;
>> 774
>> 775 /* Setting FRE without FR is not supported. */
>> 776 if ((value & (PR_FP_MODE_FR | PR_FP_MODE_FRE)) == PR_FP_MODE_FRE)
>> 777 return -EOPNOTSUPP;
>> 778
>> 779 /* Avoid inadvertently triggering emulation */
>> 780 if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
>> 781 !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))
>> 782 return -EOPNOTSUPP;
>> 783 if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre)
>> 784 return -EOPNOTSUPP;
>> 785
>> 786 /* FR = 0 not supported in MIPS R6 */
>> 787 if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6)
>> 788 return -EOPNOTSUPP;
>> 789
>> 790 /* Indicate the new FP mode in each thread */
>> 791 for_each_thread(task, t) {
>> 792 /* Update desired FP register width */
>> 793 if (value & PR_FP_MODE_FR) {
>> 794 clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
>> 795 } else {
>> 796 set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
>> 797 clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
>> 798 }
>> 799
>> 800 /* Update desired FP single layout */
>> 801 if (value & PR_FP_MODE_FRE)
>> 802 set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
>> 803 else
>> 804 clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
>> 805 }
210 806
211 memset(&p->thread.s, 0, sizeof(p->thre !! 807 /*
>> 808 * We need to ensure that all threads in the process have switched mode
>> 809 * before returning, in order to allow userland to not worry about
>> 810 * races. We can do this by forcing all CPUs that any thread in the
>> 811 * process may be running on to schedule something else - in this case
>> 812 * prepare_for_fp_mode_switch().
>> 813 *
>> 814 * We begin by generating a mask of all CPUs that any thread in the
>> 815 * process may be running on.
>> 816 */
>> 817 cpumask_clear(&process_cpus);
>> 818 for_each_thread(task, t)
>> 819 cpumask_set_cpu(task_cpu(t), &process_cpus);
212 820
213 /* p->thread holds context to be resto !! 821 /*
214 if (unlikely(args->fn)) { !! 822 * Now we schedule prepare_for_fp_mode_switch() on each of those CPUs.
215 /* Kernel thread */ !! 823 *
216 memset(childregs, 0, sizeof(st !! 824 * The CPUs may have rescheduled already since we switched mode or
217 /* Supervisor/Machine, irqs on !! 825 * generated the cpumask, but that doesn't matter. If the task in this
218 childregs->status = SR_PP | SR !! 826 * process is scheduled out then our scheduling
>> 827 * prepare_for_fp_mode_switch() will simply be redundant. If it's
>> 828 * scheduled in then it will already have picked up the new FP mode
>> 829 * whilst doing so.
>> 830 */
>> 831 get_online_cpus();
>> 832 for_each_cpu_and(cpu, &process_cpus, cpu_online_mask)
>> 833 work_on_cpu(cpu, prepare_for_fp_mode_switch, NULL);
>> 834 put_online_cpus();
219 835
220 p->thread.s[0] = (unsigned lon <<
221 p->thread.s[1] = (unsigned lon <<
222 } else { <<
223 *childregs = *(current_pt_regs <<
224 /* Turn off status.VS */ <<
225 riscv_v_vstate_off(childregs); <<
226 if (usp) /* User fork */ <<
227 childregs->sp = usp; <<
228 if (clone_flags & CLONE_SETTLS <<
229 childregs->tp = tls; <<
230 childregs->a0 = 0; /* Return v <<
231 p->thread.s[0] = 0; <<
232 } <<
233 p->thread.riscv_v_flags = 0; <<
234 if (has_vector()) <<
235 riscv_v_thread_alloc(p); <<
236 p->thread.ra = (unsigned long)ret_from <<
237 p->thread.sp = (unsigned long)childreg <<
238 return 0; 836 return 0;
239 } 837 }
240 838
241 void __init arch_task_cache_init(void) !! 839 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
>> 840 void mips_dump_regs32(u32 *uregs, const struct pt_regs *regs)
242 { 841 {
243 riscv_v_setup_ctx_cache(); !! 842 unsigned int i;
>> 843
>> 844 for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
>> 845 /* k0/k1 are copied as zero. */
>> 846 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
>> 847 uregs[i] = 0;
>> 848 else
>> 849 uregs[i] = regs->regs[i - MIPS32_EF_R0];
>> 850 }
>> 851
>> 852 uregs[MIPS32_EF_LO] = regs->lo;
>> 853 uregs[MIPS32_EF_HI] = regs->hi;
>> 854 uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
>> 855 uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
>> 856 uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
>> 857 uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
>> 858 }
>> 859 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
>> 860
>> 861 #ifdef CONFIG_64BIT
>> 862 void mips_dump_regs64(u64 *uregs, const struct pt_regs *regs)
>> 863 {
>> 864 unsigned int i;
>> 865
>> 866 for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
>> 867 /* k0/k1 are copied as zero. */
>> 868 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
>> 869 uregs[i] = 0;
>> 870 else
>> 871 uregs[i] = regs->regs[i - MIPS64_EF_R0];
>> 872 }
>> 873
>> 874 uregs[MIPS64_EF_LO] = regs->lo;
>> 875 uregs[MIPS64_EF_HI] = regs->hi;
>> 876 uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
>> 877 uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
>> 878 uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
>> 879 uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
244 } 880 }
>> 881 #endif /* CONFIG_64BIT */
245 882
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