1 /* SPDX-License-Identifier: GPL-2.0-only */ !! 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* 2 /*
3 * Copyright (C) 2013 Regents of the Universit !! 3 * linux/arch/alpha/lib/memset.S
>> 4 *
>> 5 * This is an efficient (and small) implementation of the C library "memset()"
>> 6 * function for the alpha.
>> 7 *
>> 8 * (C) Copyright 1996 Linus Torvalds
>> 9 *
>> 10 * This routine is "moral-ware": you are free to use it any way you wish, and
>> 11 * the only obligation I put on you is a moral one: if you make any improvements
>> 12 * to the routine, please send me your improvements for me to use similarly.
>> 13 *
>> 14 * The scheduling comments are according to the EV5 documentation (and done by
>> 15 * hand, so they might well be incorrect, please do tell me about it..)
4 */ 16 */
5 !! 17 #include <asm/export.h>
6 !! 18 .set noat
7 #include <linux/linkage.h> !! 19 .set noreorder
8 #include <asm/asm.h> !! 20 .text
9 !! 21 .globl memset
10 /* void *memset(void *, int, size_t) */ !! 22 .globl __memset
11 SYM_FUNC_START(__memset) !! 23 .globl ___memset
12 move t0, a0 /* Preserve return value !! 24 .globl __memset16
13 !! 25 .globl __constant_c_memset
14 /* Defer to byte-oriented fill for sma !! 26
15 sltiu a3, a2, 16 !! 27 .ent ___memset
16 bnez a3, 4f !! 28 .align 5
17 !! 29 ___memset:
18 /* !! 30 .frame $30,0,$26,0
19 * Round to nearest XLEN-aligned addre !! 31 .prologue 0
20 * greater than or equal to start addr !! 32
21 */ !! 33 and $17,255,$1 /* E1 */
22 addi a3, t0, SZREG-1 !! 34 insbl $17,1,$17 /* .. E0 */
23 andi a3, a3, ~(SZREG-1) !! 35 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
24 beq a3, t0, 2f /* Skip if already ali !! 36 sll $17,16,$1 /* E1 (p-c latency, next cycle) */
25 /* Handle initial misalignment */ !! 37
26 sub a4, a3, t0 !! 38 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
27 1: !! 39 sll $17,32,$1 /* E1 (p-c latency, next cycle) */
28 sb a1, 0(t0) !! 40 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
29 addi t0, t0, 1 !! 41 ldq_u $31,0($30) /* .. E1 */
30 bltu t0, a3, 1b !! 42
31 sub a2, a2, a4 /* Update count */ !! 43 .align 5
32 !! 44 __constant_c_memset:
33 2: /* Duff's device with 32 XLEN stores per it !! 45 addq $18,$16,$6 /* E0 */
34 /* Broadcast value into all bytes */ !! 46 bis $16,$16,$0 /* .. E1 */
35 andi a1, a1, 0xff !! 47 xor $16,$6,$1 /* E0 */
36 slli a3, a1, 8 !! 48 ble $18,end /* .. E1 */
37 or a1, a3, a1 !! 49
38 slli a3, a1, 16 !! 50 bic $1,7,$1 /* E0 */
39 or a1, a3, a1 !! 51 beq $1,within_one_quad /* .. E1 (note EV5 zero-latency forwarding) */
40 #ifdef CONFIG_64BIT !! 52 and $16,7,$3 /* E0 */
41 slli a3, a1, 32 !! 53 beq $3,aligned /* .. E1 (note EV5 zero-latency forwarding) */
42 or a1, a3, a1 !! 54
43 #endif !! 55 ldq_u $4,0($16) /* E0 */
44 !! 56 bis $16,$16,$5 /* .. E1 */
45 /* Calculate end address */ !! 57 insql $17,$16,$2 /* E0 */
46 andi a4, a2, ~(SZREG-1) !! 58 subq $3,8,$3 /* .. E1 */
47 add a3, t0, a4 !! 59
48 !! 60 addq $18,$3,$18 /* E0 $18 is new count ($3 is negative) */
49 andi a4, a4, 31*SZREG /* Calculate re !! 61 mskql $4,$16,$4 /* .. E1 (and possible load stall) */
50 beqz a4, 3f /* Shortcut if !! 62 subq $16,$3,$16 /* E0 $16 is new aligned destination */
51 neg a4, a4 !! 63 bis $2,$4,$1 /* .. E1 */
52 addi a4, a4, 32*SZREG /* Calculate in !! 64
53 !! 65 bis $31,$31,$31 /* E0 */
54 /* Adjust start address with offset */ !! 66 ldq_u $31,0($30) /* .. E1 */
55 sub t0, t0, a4 !! 67 stq_u $1,0($5) /* E0 */
56 !! 68 bis $31,$31,$31 /* .. E1 */
57 /* Jump into loop body */ !! 69
58 /* Assumes 32-bit instruction lengths !! 70 .align 4
59 la a5, 3f !! 71 aligned:
60 #ifdef CONFIG_64BIT !! 72 sra $18,3,$3 /* E0 */
61 srli a4, a4, 1 !! 73 and $18,7,$18 /* .. E1 */
62 #endif !! 74 bis $16,$16,$5 /* E0 */
63 add a5, a5, a4 !! 75 beq $3,no_quad /* .. E1 */
64 jr a5 !! 76
65 3: !! 77 .align 3
66 REG_S a1, 0(t0) !! 78 loop:
67 REG_S a1, SZREG(t0) !! 79 stq $17,0($5) /* E0 */
68 REG_S a1, 2*SZREG(t0) !! 80 subq $3,1,$3 /* .. E1 */
69 REG_S a1, 3*SZREG(t0) !! 81 addq $5,8,$5 /* E0 */
70 REG_S a1, 4*SZREG(t0) !! 82 bne $3,loop /* .. E1 */
71 REG_S a1, 5*SZREG(t0) !! 83
72 REG_S a1, 6*SZREG(t0) !! 84 no_quad:
73 REG_S a1, 7*SZREG(t0) !! 85 bis $31,$31,$31 /* E0 */
74 REG_S a1, 8*SZREG(t0) !! 86 beq $18,end /* .. E1 */
75 REG_S a1, 9*SZREG(t0) !! 87 ldq $7,0($5) /* E0 */
76 REG_S a1, 10*SZREG(t0) !! 88 mskqh $7,$6,$2 /* .. E1 (and load stall) */
77 REG_S a1, 11*SZREG(t0) !! 89
78 REG_S a1, 12*SZREG(t0) !! 90 insqh $17,$6,$4 /* E0 */
79 REG_S a1, 13*SZREG(t0) !! 91 bis $2,$4,$1 /* .. E1 */
80 REG_S a1, 14*SZREG(t0) !! 92 stq $1,0($5) /* E0 */
81 REG_S a1, 15*SZREG(t0) !! 93 ret $31,($26),1 /* .. E1 */
82 REG_S a1, 16*SZREG(t0) !! 94
83 REG_S a1, 17*SZREG(t0) !! 95 .align 3
84 REG_S a1, 18*SZREG(t0) !! 96 within_one_quad:
85 REG_S a1, 19*SZREG(t0) !! 97 ldq_u $1,0($16) /* E0 */
86 REG_S a1, 20*SZREG(t0) !! 98 insql $17,$16,$2 /* E1 */
87 REG_S a1, 21*SZREG(t0) !! 99 mskql $1,$16,$4 /* E0 (after load stall) */
88 REG_S a1, 22*SZREG(t0) !! 100 bis $2,$4,$2 /* E0 */
89 REG_S a1, 23*SZREG(t0) !! 101
90 REG_S a1, 24*SZREG(t0) !! 102 mskql $2,$6,$4 /* E0 */
91 REG_S a1, 25*SZREG(t0) !! 103 mskqh $1,$6,$2 /* .. E1 */
92 REG_S a1, 26*SZREG(t0) !! 104 bis $2,$4,$1 /* E0 */
93 REG_S a1, 27*SZREG(t0) !! 105 stq_u $1,0($16) /* E0 */
94 REG_S a1, 28*SZREG(t0) !! 106
95 REG_S a1, 29*SZREG(t0) !! 107 end:
96 REG_S a1, 30*SZREG(t0) !! 108 ret $31,($26),1 /* E1 */
97 REG_S a1, 31*SZREG(t0) !! 109 .end ___memset
98 addi t0, t0, 32*SZREG !! 110 EXPORT_SYMBOL(___memset)
99 bltu t0, a3, 3b !! 111 EXPORT_SYMBOL(__constant_c_memset)
100 andi a2, a2, SZREG-1 /* Update count !! 112
101 !! 113 .align 5
102 4: !! 114 .ent __memset16
103 /* Handle trailing misalignment */ !! 115 __memset16:
104 beqz a2, 6f !! 116 .prologue 0
105 add a3, t0, a2 !! 117
106 5: !! 118 inswl $17,0,$1 /* E0 */
107 sb a1, 0(t0) !! 119 inswl $17,2,$2 /* E0 */
108 addi t0, t0, 1 !! 120 inswl $17,4,$3 /* E0 */
109 bltu t0, a3, 5b !! 121 or $1,$2,$1 /* .. E1 */
110 6: !! 122 inswl $17,6,$4 /* E0 */
111 ret !! 123 or $1,$3,$1 /* .. E1 */
112 SYM_FUNC_END(__memset) !! 124 or $1,$4,$17 /* E0 */
113 SYM_FUNC_ALIAS_WEAK(memset, __memset) !! 125 br __constant_c_memset /* .. E1 */
114 SYM_FUNC_ALIAS(__pi_memset, __memset) !! 126
115 SYM_FUNC_ALIAS(__pi___memset, __memset) !! 127 .end __memset16
>> 128 EXPORT_SYMBOL(__memset16)
>> 129
>> 130 memset = ___memset
>> 131 __memset = ___memset
>> 132 EXPORT_SYMBOL(memset)
>> 133 EXPORT_SYMBOL(__memset)
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