1 # SPDX-License-Identifier: GPL-2.0
2 menu "Processor features"
3
4 choice
5 prompt "Endianness selection"
6 default CPU_LITTLE_ENDIAN
7 help
8 Some SuperH machines can be configur
9 endian byte order. These modes requi
10
11 config CPU_LITTLE_ENDIAN
12 bool "Little Endian"
13
14 config CPU_BIG_ENDIAN
15 bool "Big Endian"
16
17 endchoice
18
19 config SH_FPU
20 def_bool y
21 prompt "FPU support"
22 depends on CPU_HAS_FPU
23 help
24 Selecting this option will enable su
25 have FPU units (ie, SH77xx).
26
27 This option must be set in order to
28
29 config SH_FPU_EMU
30 def_bool n
31 prompt "FPU emulation support"
32 depends on !SH_FPU
33 help
34 Selecting this option will enable su
35 Most SH-3 users will want to say Y h
36 want to say N.
37
38 config SH_DSP
39 def_bool y
40 prompt "DSP support"
41 depends on CPU_HAS_DSP
42 help
43 Selecting this option will enable su
44 have DSP units (ie, SH2-DSP, SH3-DSP
45
46 This option must be set in order to
47
48 config SH_ADC
49 def_bool y
50 prompt "ADC support"
51 depends on CPU_SH3
52 help
53 Selecting this option will allow the
54 ADC module.
55
56 If unsure, say N.
57
58 config SH_STORE_QUEUES
59 bool "Support for Store Queues"
60 depends on CPU_SH4
61 help
62 Selecting this option will enable an
63 the store queues integrated in the S
64
65 config SPECULATIVE_EXECUTION
66 bool "Speculative subroutine return"
67 depends on CPU_SUBTYPE_SH7780 || CPU_S
68 help
69 This enables support for a speculati
70 subroutine return. There are various
71 this, as outlined in the SH7780 hard
72
73 If unsure, say N.
74
75 config CPU_HAS_INTEVT
76 bool
77
78 config CPU_HAS_IPR_IRQ
79 bool
80
81 config CPU_HAS_SR_RB
82 bool
83 help
84 This will enable the use of SR.RB re
85 that are lacking this bit must have
86 accomplishing what is taken care of
87
88 See <file:Documentation/arch/sh/regi
89 information on SR.RB and register ba
90
91 config CPU_HAS_PTEAEX
92 bool
93
94 config CPU_HAS_DSP
95 bool
96
97 config CPU_HAS_FPU
98 bool
99
100 endmenu
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