1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 config SUPERH !! 2 config MIPS
3 def_bool y !! 3 bool
4 select ARCH_32BIT_OFF_T !! 4 default y
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_HAVE_NMI_SAFE_CMPXCHG if ( !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_BINFMT_FLAT if !MMU <<
8 select ARCH_HAS_CPU_FINALIZE_INIT 7 select ARCH_HAS_CPU_FINALIZE_INIT
9 select ARCH_HAS_CURRENT_STACK_POINTER !! 8 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
10 select ARCH_HAS_GIGANTIC_PAGE !! 9 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
11 select ARCH_HAS_GCOV_PROFILE_ALL !! 10 select ARCH_HAS_FORTIFY_SOURCE
12 select ARCH_HAS_PTE_SPECIAL !! 11 select ARCH_HAS_KCOV
>> 12 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
>> 13 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
>> 14 select ARCH_HAS_STRNCPY_FROM_USER
>> 15 select ARCH_HAS_STRNLEN_USER
13 select ARCH_HAS_TICK_BROADCAST if GENE 16 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
14 select ARCH_HIBERNATION_POSSIBLE if MM !! 17 select ARCH_HAS_UBSAN_SANITIZE_ALL
15 select ARCH_MIGHT_HAVE_PC_PARPORT !! 18 select ARCH_HAS_GCOV_PROFILE_ALL
>> 19 select ARCH_KEEP_MEMBLOCK
>> 20 select ARCH_USE_BUILTIN_BSWAP
>> 21 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
>> 22 select ARCH_USE_MEMTEST
>> 23 select ARCH_USE_QUEUED_RWLOCKS
>> 24 select ARCH_USE_QUEUED_SPINLOCKS
>> 25 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
>> 26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
16 select ARCH_WANT_IPC_PARSE_VERSION 27 select ARCH_WANT_IPC_PARSE_VERSION
17 select ARCH_NEED_CMPXCHG_1_EMU !! 28 select ARCH_WANT_LD_ORPHAN_WARN
18 select CPU_NO_EFFICIENT_FFS !! 29 select BUILDTIME_TABLE_SORT
19 select DMA_DECLARE_COHERENT !! 30 select CLONE_BACKWARDS
20 select GENERIC_ATOMIC64 !! 31 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
21 select GENERIC_CMOS_UPDATE if SH_SH03 !! 32 select CPU_PM if CPU_IDLE
22 select GENERIC_IDLE_POLL_SETUP !! 33 select GENERIC_ATOMIC64 if !64BIT
>> 34 select GENERIC_CMOS_UPDATE
>> 35 select GENERIC_CPU_AUTOPROBE
>> 36 select GENERIC_GETTIMEOFDAY
>> 37 select GENERIC_IOMAP
>> 38 select GENERIC_IRQ_PROBE
23 select GENERIC_IRQ_SHOW 39 select GENERIC_IRQ_SHOW
>> 40 select GENERIC_ISA_DMA if EISA
24 select GENERIC_LIB_ASHLDI3 41 select GENERIC_LIB_ASHLDI3
25 select GENERIC_LIB_ASHRDI3 42 select GENERIC_LIB_ASHRDI3
>> 43 select GENERIC_LIB_CMPDI2
26 select GENERIC_LIB_LSHRDI3 44 select GENERIC_LIB_LSHRDI3
27 select GENERIC_PCI_IOMAP if PCI !! 45 select GENERIC_LIB_UCMPDI2
28 select GENERIC_SCHED_CLOCK !! 46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
29 select GENERIC_SMP_IDLE_THREAD 47 select GENERIC_SMP_IDLE_THREAD
30 select GUP_GET_PXX_LOW_HIGH if X2TLB !! 48 select GENERIC_TIME_VSYSCALL
31 select HAS_IOPORT if HAS_IOPORT_MAP !! 49 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
32 select GENERIC_IOREMAP if MMU !! 50 select HAS_IOPORT if !NO_IOPORT_MAP || ISA
33 select HAVE_ARCH_AUDITSYSCALL !! 51 select HAVE_ARCH_COMPILER_H
34 select HAVE_ARCH_KGDB !! 52 select HAVE_ARCH_JUMP_LABEL
>> 53 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
>> 54 select HAVE_ARCH_MMAP_RND_BITS if MMU
>> 55 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
35 select HAVE_ARCH_SECCOMP_FILTER 56 select HAVE_ARCH_SECCOMP_FILTER
36 select HAVE_ARCH_TRACEHOOK 57 select HAVE_ARCH_TRACEHOOK
37 select HAVE_DEBUG_BUGVERBOSE !! 58 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
>> 59 select HAVE_ASM_MODVERSIONS
>> 60 select HAVE_CONTEXT_TRACKING_USER
>> 61 select HAVE_TIF_NOHZ
>> 62 select HAVE_C_RECORDMCOUNT
38 select HAVE_DEBUG_KMEMLEAK 63 select HAVE_DEBUG_KMEMLEAK
>> 64 select HAVE_DEBUG_STACKOVERFLOW
>> 65 select HAVE_DMA_CONTIGUOUS
39 select HAVE_DYNAMIC_FTRACE 66 select HAVE_DYNAMIC_FTRACE
40 select HAVE_GUP_FAST if MMU !! 67 select HAVE_EBPF_JIT if !CPU_MICROMIPS
>> 68 select HAVE_EXIT_THREAD
>> 69 select HAVE_FAST_GUP
>> 70 select HAVE_FTRACE_MCOUNT_RECORD
41 select HAVE_FUNCTION_GRAPH_TRACER 71 select HAVE_FUNCTION_GRAPH_TRACER
42 select HAVE_FUNCTION_TRACER 72 select HAVE_FUNCTION_TRACER
43 select HAVE_FTRACE_MCOUNT_RECORD !! 73 select HAVE_GCC_PLUGINS
44 select HAVE_HW_BREAKPOINT !! 74 select HAVE_GENERIC_VDSO
45 select HAVE_IOREMAP_PROT if MMU && !X2 !! 75 select HAVE_IOREMAP_PROT
46 select HAVE_KERNEL_BZIP2 !! 76 select HAVE_IRQ_EXIT_ON_IRQ_STACK
47 select HAVE_KERNEL_GZIP !! 77 select HAVE_IRQ_TIME_ACCOUNTING
48 select HAVE_KERNEL_LZMA <<
49 select HAVE_KERNEL_LZO <<
50 select HAVE_KERNEL_XZ <<
51 select HAVE_KPROBES 78 select HAVE_KPROBES
52 select HAVE_KRETPROBES 79 select HAVE_KRETPROBES
53 select HAVE_MIXED_BREAKPOINTS_REGS !! 80 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
54 select HAVE_MOD_ARCH_SPECIFIC if DWARF !! 81 select HAVE_MOD_ARCH_SPECIFIC
55 select HAVE_NMI 82 select HAVE_NMI
56 select HAVE_PATA_PLATFORM 83 select HAVE_PATA_PLATFORM
57 select HAVE_PERF_EVENTS 84 select HAVE_PERF_EVENTS
>> 85 select HAVE_PERF_REGS
>> 86 select HAVE_PERF_USER_STACK_DUMP
58 select HAVE_REGS_AND_STACK_ACCESS_API 87 select HAVE_REGS_AND_STACK_ACCESS_API
59 select HAVE_UID16 !! 88 select HAVE_RSEQ
60 select HAVE_SOFTIRQ_ON_OWN_STACK if IR !! 89 select HAVE_SPARSE_SYSCALL_NR
61 select HAVE_STACKPROTECTOR 90 select HAVE_STACKPROTECTOR
62 select HAVE_SYSCALL_TRACEPOINTS 91 select HAVE_SYSCALL_TRACEPOINTS
>> 92 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
63 select IRQ_FORCED_THREADING 93 select IRQ_FORCED_THREADING
>> 94 select ISA if EISA
64 select LOCK_MM_AND_FIND_VMA 95 select LOCK_MM_AND_FIND_VMA
65 select MODULES_USE_ELF_RELA !! 96 select MODULES_USE_ELF_REL if MODULES
66 select NEED_SG_DMA_LENGTH !! 97 select MODULES_USE_ELF_RELA if MODULES && 64BIT
67 select NO_DMA if !MMU && !DMA_COHERENT <<
68 select NO_GENERIC_PCI_IOPORT_MAP if PC <<
69 select OLD_SIGACTION <<
70 select OLD_SIGSUSPEND <<
71 select PCI_DOMAINS if PCI <<
72 select PERF_EVENTS <<
73 select PERF_USE_VMALLOC 98 select PERF_USE_VMALLOC
>> 99 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
74 select RTC_LIB 100 select RTC_LIB
75 select SPARSE_IRQ !! 101 select SYSCTL_EXCEPTION_TRACE
76 select TRACE_IRQFLAGS_SUPPORT 102 select TRACE_IRQFLAGS_SUPPORT
>> 103 select ARCH_HAS_ELFCORE_COMPAT
>> 104 select HAVE_ARCH_KCSAN if 64BIT
>> 105
>> 106 config MIPS_FIXUP_BIGPHYS_ADDR
>> 107 bool
>> 108
>> 109 config MIPS_GENERIC
>> 110 bool
>> 111
>> 112 config MACH_INGENIC
>> 113 bool
>> 114 select SYS_SUPPORTS_32BIT_KERNEL
>> 115 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 116 select SYS_SUPPORTS_ZBOOT
>> 117 select DMA_NONCOHERENT
>> 118 select IRQ_MIPS_CPU
>> 119 select PINCTRL
>> 120 select GPIOLIB
>> 121 select COMMON_CLK
>> 122 select GENERIC_IRQ_CHIP
>> 123 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 124 select USE_OF
>> 125 select CPU_SUPPORTS_CPUFREQ
>> 126 select MIPS_EXTERNAL_TIMER
>> 127
>> 128 menu "Machine selection"
>> 129
>> 130 choice
>> 131 prompt "System type"
>> 132 default MIPS_GENERIC_KERNEL
>> 133
>> 134 config MIPS_GENERIC_KERNEL
>> 135 bool "Generic board-agnostic MIPS kernel"
>> 136 select MIPS_GENERIC
>> 137 select BOOT_RAW
>> 138 select BUILTIN_DTB
>> 139 select CEVT_R4K
>> 140 select CLKSRC_MIPS_GIC
>> 141 select COMMON_CLK
>> 142 select CPU_MIPSR2_IRQ_EI
>> 143 select CPU_MIPSR2_IRQ_VI
>> 144 select CSRC_R4K
>> 145 select DMA_NONCOHERENT
>> 146 select HAVE_PCI
>> 147 select IRQ_MIPS_CPU
>> 148 select MIPS_AUTO_PFN_OFFSET
>> 149 select MIPS_CPU_SCACHE
>> 150 select MIPS_GIC
>> 151 select MIPS_L1_CACHE_SHIFT_7
>> 152 select NO_EXCEPT_FILL
>> 153 select PCI_DRIVERS_GENERIC
>> 154 select SMP_UP if SMP
>> 155 select SWAP_IO_SPACE
>> 156 select SYS_HAS_CPU_MIPS32_R1
>> 157 select SYS_HAS_CPU_MIPS32_R2
>> 158 select SYS_HAS_CPU_MIPS32_R6
>> 159 select SYS_HAS_CPU_MIPS64_R1
>> 160 select SYS_HAS_CPU_MIPS64_R2
>> 161 select SYS_HAS_CPU_MIPS64_R6
>> 162 select SYS_SUPPORTS_32BIT_KERNEL
>> 163 select SYS_SUPPORTS_64BIT_KERNEL
>> 164 select SYS_SUPPORTS_BIG_ENDIAN
>> 165 select SYS_SUPPORTS_HIGHMEM
>> 166 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 167 select SYS_SUPPORTS_MICROMIPS
>> 168 select SYS_SUPPORTS_MIPS16
>> 169 select SYS_SUPPORTS_MIPS_CPS
>> 170 select SYS_SUPPORTS_MULTITHREADING
>> 171 select SYS_SUPPORTS_RELOCATABLE
>> 172 select SYS_SUPPORTS_SMARTMIPS
>> 173 select SYS_SUPPORTS_ZBOOT
>> 174 select UHI_BOOT
>> 175 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 176 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 177 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 178 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 179 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 180 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 181 select USE_OF
>> 182 help
>> 183 Select this to build a kernel which aims to support multiple boards,
>> 184 generally using a flattened device tree passed from the bootloader
>> 185 using the boot protocol defined in the UHI (Unified Hosting
>> 186 Interface) specification.
>> 187
>> 188 config MIPS_ALCHEMY
>> 189 bool "Alchemy processor based machines"
>> 190 select PHYS_ADDR_T_64BIT
>> 191 select CEVT_R4K
>> 192 select CSRC_R4K
>> 193 select IRQ_MIPS_CPU
>> 194 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
>> 195 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
>> 196 select SYS_HAS_CPU_MIPS32_R1
>> 197 select SYS_SUPPORTS_32BIT_KERNEL
>> 198 select SYS_SUPPORTS_APM_EMULATION
>> 199 select GPIOLIB
>> 200 select SYS_SUPPORTS_ZBOOT
>> 201 select COMMON_CLK
>> 202
>> 203 config AR7
>> 204 bool "Texas Instruments AR7"
>> 205 select BOOT_ELF32
>> 206 select COMMON_CLK
>> 207 select DMA_NONCOHERENT
>> 208 select CEVT_R4K
>> 209 select CSRC_R4K
>> 210 select IRQ_MIPS_CPU
>> 211 select NO_EXCEPT_FILL
>> 212 select SWAP_IO_SPACE
>> 213 select SYS_HAS_CPU_MIPS32_R1
>> 214 select SYS_HAS_EARLY_PRINTK
>> 215 select SYS_SUPPORTS_32BIT_KERNEL
>> 216 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 217 select SYS_SUPPORTS_MIPS16
>> 218 select SYS_SUPPORTS_ZBOOT_UART16550
>> 219 select GPIOLIB
>> 220 select VLYNQ
77 help 221 help
78 The SuperH is a RISC processor targe !! 222 Support for the Texas Instruments AR7 System-on-a-Chip
79 and consumer electronics; it was als !! 223 family: TNETD7100, 7200 and 7300.
80 gaming console. The SuperH port has <<
81 <http://www.linux-sh.org/>. <<
82 224
83 config GENERIC_BUG !! 225 config ATH25
84 def_bool y !! 226 bool "Atheros AR231x/AR531x SoC support"
85 depends on BUG !! 227 select CEVT_R4K
>> 228 select CSRC_R4K
>> 229 select DMA_NONCOHERENT
>> 230 select IRQ_MIPS_CPU
>> 231 select IRQ_DOMAIN
>> 232 select SYS_HAS_CPU_MIPS32_R1
>> 233 select SYS_SUPPORTS_BIG_ENDIAN
>> 234 select SYS_SUPPORTS_32BIT_KERNEL
>> 235 select SYS_HAS_EARLY_PRINTK
>> 236 help
>> 237 Support for Atheros AR231x and Atheros AR531x based boards
>> 238
>> 239 config ATH79
>> 240 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 241 select ARCH_HAS_RESET_CONTROLLER
>> 242 select BOOT_RAW
>> 243 select CEVT_R4K
>> 244 select CSRC_R4K
>> 245 select DMA_NONCOHERENT
>> 246 select GPIOLIB
>> 247 select PINCTRL
>> 248 select COMMON_CLK
>> 249 select IRQ_MIPS_CPU
>> 250 select SYS_HAS_CPU_MIPS32_R2
>> 251 select SYS_HAS_EARLY_PRINTK
>> 252 select SYS_SUPPORTS_32BIT_KERNEL
>> 253 select SYS_SUPPORTS_BIG_ENDIAN
>> 254 select SYS_SUPPORTS_MIPS16
>> 255 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 256 select USE_OF
>> 257 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 258 help
>> 259 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 260
>> 261 config BMIPS_GENERIC
>> 262 bool "Broadcom Generic BMIPS kernel"
>> 263 select ARCH_HAS_RESET_CONTROLLER
>> 264 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 265 select BOOT_RAW
>> 266 select NO_EXCEPT_FILL
>> 267 select USE_OF
>> 268 select CEVT_R4K
>> 269 select CSRC_R4K
>> 270 select SYNC_R4K
>> 271 select COMMON_CLK
>> 272 select BCM6345_L1_IRQ
>> 273 select BCM7038_L1_IRQ
>> 274 select BCM7120_L2_IRQ
>> 275 select BRCMSTB_L2_IRQ
>> 276 select IRQ_MIPS_CPU
>> 277 select DMA_NONCOHERENT
>> 278 select SYS_SUPPORTS_32BIT_KERNEL
>> 279 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 280 select SYS_SUPPORTS_BIG_ENDIAN
>> 281 select SYS_SUPPORTS_HIGHMEM
>> 282 select SYS_HAS_CPU_BMIPS32_3300
>> 283 select SYS_HAS_CPU_BMIPS4350
>> 284 select SYS_HAS_CPU_BMIPS4380
>> 285 select SYS_HAS_CPU_BMIPS5000
>> 286 select SWAP_IO_SPACE
>> 287 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 288 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 289 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 290 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 291 select HARDIRQS_SW_RESEND
>> 292 select HAVE_PCI
>> 293 select PCI_DRIVERS_GENERIC
>> 294 select FW_CFE
>> 295 help
>> 296 Build a generic DT-based kernel image that boots on select
>> 297 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 298 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 299 must be set appropriately for your board.
>> 300
>> 301 config BCM47XX
>> 302 bool "Broadcom BCM47XX based boards"
>> 303 select BOOT_RAW
>> 304 select CEVT_R4K
>> 305 select CSRC_R4K
>> 306 select DMA_NONCOHERENT
>> 307 select HAVE_PCI
>> 308 select IRQ_MIPS_CPU
>> 309 select SYS_HAS_CPU_MIPS32_R1
>> 310 select NO_EXCEPT_FILL
>> 311 select SYS_SUPPORTS_32BIT_KERNEL
>> 312 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 313 select SYS_SUPPORTS_MIPS16
>> 314 select SYS_SUPPORTS_ZBOOT
>> 315 select SYS_HAS_EARLY_PRINTK
>> 316 select USE_GENERIC_EARLY_PRINTK_8250
>> 317 select GPIOLIB
>> 318 select LEDS_GPIO_REGISTER
>> 319 select BCM47XX_NVRAM
>> 320 select BCM47XX_SPROM
>> 321 select BCM47XX_SSB if !BCM47XX_BCMA
>> 322 help
>> 323 Support for BCM47XX based boards
>> 324
>> 325 config BCM63XX
>> 326 bool "Broadcom BCM63XX based boards"
>> 327 select BOOT_RAW
>> 328 select CEVT_R4K
>> 329 select CSRC_R4K
>> 330 select SYNC_R4K
>> 331 select DMA_NONCOHERENT
>> 332 select IRQ_MIPS_CPU
>> 333 select SYS_SUPPORTS_32BIT_KERNEL
>> 334 select SYS_SUPPORTS_BIG_ENDIAN
>> 335 select SYS_HAS_EARLY_PRINTK
>> 336 select SYS_HAS_CPU_BMIPS32_3300
>> 337 select SYS_HAS_CPU_BMIPS4350
>> 338 select SYS_HAS_CPU_BMIPS4380
>> 339 select SWAP_IO_SPACE
>> 340 select GPIOLIB
>> 341 select MIPS_L1_CACHE_SHIFT_4
>> 342 select HAVE_LEGACY_CLK
>> 343 help
>> 344 Support for BCM63XX based boards
>> 345
>> 346 config MIPS_COBALT
>> 347 bool "Cobalt Server"
>> 348 select CEVT_R4K
>> 349 select CSRC_R4K
>> 350 select CEVT_GT641XX
>> 351 select DMA_NONCOHERENT
>> 352 select FORCE_PCI
>> 353 select I8253
>> 354 select I8259
>> 355 select IRQ_MIPS_CPU
>> 356 select IRQ_GT641XX
>> 357 select PCI_GT64XXX_PCI0
>> 358 select SYS_HAS_CPU_NEVADA
>> 359 select SYS_HAS_EARLY_PRINTK
>> 360 select SYS_SUPPORTS_32BIT_KERNEL
>> 361 select SYS_SUPPORTS_64BIT_KERNEL
>> 362 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 363 select USE_GENERIC_EARLY_PRINTK_8250
>> 364
>> 365 config MACH_DECSTATION
>> 366 bool "DECstations"
>> 367 select BOOT_ELF32
>> 368 select CEVT_DS1287
>> 369 select CEVT_R4K if CPU_R4X00
>> 370 select CSRC_IOASIC
>> 371 select CSRC_R4K if CPU_R4X00
>> 372 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 373 select CPU_R4000_WORKAROUNDS if 64BIT
>> 374 select CPU_R4400_WORKAROUNDS if 64BIT
>> 375 select DMA_NONCOHERENT
>> 376 select NO_IOPORT_MAP
>> 377 select IRQ_MIPS_CPU
>> 378 select SYS_HAS_CPU_R3000
>> 379 select SYS_HAS_CPU_R4X00
>> 380 select SYS_SUPPORTS_32BIT_KERNEL
>> 381 select SYS_SUPPORTS_64BIT_KERNEL
>> 382 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 383 select SYS_SUPPORTS_128HZ
>> 384 select SYS_SUPPORTS_256HZ
>> 385 select SYS_SUPPORTS_1024HZ
>> 386 select MIPS_L1_CACHE_SHIFT_4
>> 387 help
>> 388 This enables support for DEC's MIPS based workstations. For details
>> 389 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 390 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 391
>> 392 If you have one of the following DECstation Models you definitely
>> 393 want to choose R4xx0 for the CPU Type:
>> 394
>> 395 DECstation 5000/50
>> 396 DECstation 5000/150
>> 397 DECstation 5000/260
>> 398 DECsystem 5900/260
>> 399
>> 400 otherwise choose R3000.
>> 401
>> 402 config MACH_JAZZ
>> 403 bool "Jazz family of machines"
>> 404 select ARC_MEMORY
>> 405 select ARC_PROMLIB
>> 406 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 407 select ARCH_MIGHT_HAVE_PC_SERIO
>> 408 select DMA_OPS
>> 409 select FW_ARC
>> 410 select FW_ARC32
>> 411 select ARCH_MAY_HAVE_PC_FDC
>> 412 select CEVT_R4K
>> 413 select CSRC_R4K
>> 414 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 415 select GENERIC_ISA_DMA
>> 416 select HAVE_PCSPKR_PLATFORM
>> 417 select IRQ_MIPS_CPU
>> 418 select I8253
>> 419 select I8259
>> 420 select ISA
>> 421 select SYS_HAS_CPU_R4X00
>> 422 select SYS_SUPPORTS_32BIT_KERNEL
>> 423 select SYS_SUPPORTS_64BIT_KERNEL
>> 424 select SYS_SUPPORTS_100HZ
>> 425 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 426 help
>> 427 This a family of machines based on the MIPS R4030 chipset which was
>> 428 used by several vendors to build RISC/os and Windows NT workstations.
>> 429 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 430 Olivetti M700-10 workstations.
>> 431
>> 432 config MACH_INGENIC_SOC
>> 433 bool "Ingenic SoC based machines"
>> 434 select MIPS_GENERIC
>> 435 select MACH_INGENIC
>> 436 select SYS_SUPPORTS_ZBOOT_UART16550
>> 437 select CPU_SUPPORTS_CPUFREQ
>> 438 select MIPS_EXTERNAL_TIMER
>> 439
>> 440 config LANTIQ
>> 441 bool "Lantiq based platforms"
>> 442 select DMA_NONCOHERENT
>> 443 select IRQ_MIPS_CPU
>> 444 select CEVT_R4K
>> 445 select CSRC_R4K
>> 446 select NO_EXCEPT_FILL
>> 447 select SYS_HAS_CPU_MIPS32_R1
>> 448 select SYS_HAS_CPU_MIPS32_R2
>> 449 select SYS_SUPPORTS_BIG_ENDIAN
>> 450 select SYS_SUPPORTS_32BIT_KERNEL
>> 451 select SYS_SUPPORTS_MIPS16
>> 452 select SYS_SUPPORTS_MULTITHREADING
>> 453 select SYS_SUPPORTS_VPE_LOADER
>> 454 select SYS_HAS_EARLY_PRINTK
>> 455 select GPIOLIB
>> 456 select SWAP_IO_SPACE
>> 457 select BOOT_RAW
>> 458 select HAVE_LEGACY_CLK
>> 459 select USE_OF
>> 460 select PINCTRL
>> 461 select PINCTRL_LANTIQ
>> 462 select ARCH_HAS_RESET_CONTROLLER
>> 463 select RESET_CONTROLLER
>> 464
>> 465 config MACH_LOONGSON32
>> 466 bool "Loongson 32-bit family of machines"
>> 467 select SYS_SUPPORTS_ZBOOT
>> 468 help
>> 469 This enables support for the Loongson-1 family of machines.
>> 470
>> 471 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 472 the Institute of Computing Technology (ICT), Chinese Academy of
>> 473 Sciences (CAS).
>> 474
>> 475 config MACH_LOONGSON2EF
>> 476 bool "Loongson-2E/F family of machines"
>> 477 select SYS_SUPPORTS_ZBOOT
>> 478 help
>> 479 This enables the support of early Loongson-2E/F family of machines.
>> 480
>> 481 config MACH_LOONGSON64
>> 482 bool "Loongson 64-bit family of machines"
>> 483 select ARCH_SPARSEMEM_ENABLE
>> 484 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 485 select ARCH_MIGHT_HAVE_PC_SERIO
>> 486 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 487 select BOOT_ELF32
>> 488 select BOARD_SCACHE
>> 489 select CSRC_R4K
>> 490 select CEVT_R4K
>> 491 select FORCE_PCI
>> 492 select ISA
>> 493 select I8259
>> 494 select IRQ_MIPS_CPU
>> 495 select NO_EXCEPT_FILL
>> 496 select NR_CPUS_DEFAULT_64
>> 497 select USE_GENERIC_EARLY_PRINTK_8250
>> 498 select PCI_DRIVERS_GENERIC
>> 499 select SYS_HAS_CPU_LOONGSON64
>> 500 select SYS_HAS_EARLY_PRINTK
>> 501 select SYS_SUPPORTS_SMP
>> 502 select SYS_SUPPORTS_HOTPLUG_CPU
>> 503 select SYS_SUPPORTS_NUMA
>> 504 select SYS_SUPPORTS_64BIT_KERNEL
>> 505 select SYS_SUPPORTS_HIGHMEM
>> 506 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 507 select SYS_SUPPORTS_ZBOOT
>> 508 select SYS_SUPPORTS_RELOCATABLE
>> 509 select ZONE_DMA32
>> 510 select COMMON_CLK
>> 511 select USE_OF
>> 512 select BUILTIN_DTB
>> 513 select PCI_HOST_GENERIC
>> 514 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
>> 515 help
>> 516 This enables the support of Loongson-2/3 family of machines.
>> 517
>> 518 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
>> 519 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
>> 520 and Loongson-2F which will be removed), developed by the Institute
>> 521 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
>> 522
>> 523 config MIPS_MALTA
>> 524 bool "MIPS Malta board"
>> 525 select ARCH_MAY_HAVE_PC_FDC
>> 526 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 527 select ARCH_MIGHT_HAVE_PC_SERIO
>> 528 select BOOT_ELF32
>> 529 select BOOT_RAW
>> 530 select BUILTIN_DTB
>> 531 select CEVT_R4K
>> 532 select CLKSRC_MIPS_GIC
>> 533 select COMMON_CLK
>> 534 select CSRC_R4K
>> 535 select DMA_NONCOHERENT
>> 536 select GENERIC_ISA_DMA
>> 537 select HAVE_PCSPKR_PLATFORM
>> 538 select HAVE_PCI
>> 539 select I8253
>> 540 select I8259
>> 541 select IRQ_MIPS_CPU
>> 542 select MIPS_BONITO64
>> 543 select MIPS_CPU_SCACHE
>> 544 select MIPS_GIC
>> 545 select MIPS_L1_CACHE_SHIFT_6
>> 546 select MIPS_MSC
>> 547 select PCI_GT64XXX_PCI0
>> 548 select SMP_UP if SMP
>> 549 select SWAP_IO_SPACE
>> 550 select SYS_HAS_CPU_MIPS32_R1
>> 551 select SYS_HAS_CPU_MIPS32_R2
>> 552 select SYS_HAS_CPU_MIPS32_R3_5
>> 553 select SYS_HAS_CPU_MIPS32_R5
>> 554 select SYS_HAS_CPU_MIPS32_R6
>> 555 select SYS_HAS_CPU_MIPS64_R1
>> 556 select SYS_HAS_CPU_MIPS64_R2
>> 557 select SYS_HAS_CPU_MIPS64_R6
>> 558 select SYS_HAS_CPU_NEVADA
>> 559 select SYS_HAS_CPU_RM7000
>> 560 select SYS_SUPPORTS_32BIT_KERNEL
>> 561 select SYS_SUPPORTS_64BIT_KERNEL
>> 562 select SYS_SUPPORTS_BIG_ENDIAN
>> 563 select SYS_SUPPORTS_HIGHMEM
>> 564 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 565 select SYS_SUPPORTS_MICROMIPS
>> 566 select SYS_SUPPORTS_MIPS16
>> 567 select SYS_SUPPORTS_MIPS_CPS
>> 568 select SYS_SUPPORTS_MULTITHREADING
>> 569 select SYS_SUPPORTS_RELOCATABLE
>> 570 select SYS_SUPPORTS_SMARTMIPS
>> 571 select SYS_SUPPORTS_VPE_LOADER
>> 572 select SYS_SUPPORTS_ZBOOT
>> 573 select USE_OF
>> 574 select WAR_ICACHE_REFILLS
>> 575 select ZONE_DMA32 if 64BIT
>> 576 help
>> 577 This enables support for the MIPS Technologies Malta evaluation
>> 578 board.
>> 579
>> 580 config MACH_PIC32
>> 581 bool "Microchip PIC32 Family"
>> 582 help
>> 583 This enables support for the Microchip PIC32 family of platforms.
>> 584
>> 585 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 586 microcontrollers.
>> 587
>> 588 config MACH_NINTENDO64
>> 589 bool "Nintendo 64 console"
>> 590 select CEVT_R4K
>> 591 select CSRC_R4K
>> 592 select SYS_HAS_CPU_R4300
>> 593 select SYS_SUPPORTS_BIG_ENDIAN
>> 594 select SYS_SUPPORTS_ZBOOT
>> 595 select SYS_SUPPORTS_32BIT_KERNEL
>> 596 select SYS_SUPPORTS_64BIT_KERNEL
>> 597 select DMA_NONCOHERENT
>> 598 select IRQ_MIPS_CPU
>> 599
>> 600 config RALINK
>> 601 bool "Ralink based machines"
>> 602 select CEVT_R4K
>> 603 select COMMON_CLK
>> 604 select CSRC_R4K
>> 605 select BOOT_RAW
>> 606 select DMA_NONCOHERENT
>> 607 select IRQ_MIPS_CPU
>> 608 select USE_OF
>> 609 select SYS_HAS_CPU_MIPS32_R2
>> 610 select SYS_SUPPORTS_32BIT_KERNEL
>> 611 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 612 select SYS_SUPPORTS_MIPS16
>> 613 select SYS_SUPPORTS_ZBOOT
>> 614 select SYS_HAS_EARLY_PRINTK
>> 615 select ARCH_HAS_RESET_CONTROLLER
>> 616 select RESET_CONTROLLER
>> 617
>> 618 config MACH_REALTEK_RTL
>> 619 bool "Realtek RTL838x/RTL839x based machines"
>> 620 select MIPS_GENERIC
>> 621 select DMA_NONCOHERENT
>> 622 select IRQ_MIPS_CPU
>> 623 select CSRC_R4K
>> 624 select CEVT_R4K
>> 625 select SYS_HAS_CPU_MIPS32_R1
>> 626 select SYS_HAS_CPU_MIPS32_R2
>> 627 select SYS_SUPPORTS_BIG_ENDIAN
>> 628 select SYS_SUPPORTS_32BIT_KERNEL
>> 629 select SYS_SUPPORTS_MIPS16
>> 630 select SYS_SUPPORTS_MULTITHREADING
>> 631 select SYS_SUPPORTS_VPE_LOADER
>> 632 select BOOT_RAW
>> 633 select PINCTRL
>> 634 select USE_OF
>> 635
>> 636 config SGI_IP22
>> 637 bool "SGI IP22 (Indy/Indigo2)"
>> 638 select ARC_MEMORY
>> 639 select ARC_PROMLIB
>> 640 select FW_ARC
>> 641 select FW_ARC32
>> 642 select ARCH_MIGHT_HAVE_PC_SERIO
>> 643 select BOOT_ELF32
>> 644 select CEVT_R4K
>> 645 select CSRC_R4K
>> 646 select DEFAULT_SGI_PARTITION
>> 647 select DMA_NONCOHERENT
>> 648 select HAVE_EISA
>> 649 select I8253
>> 650 select I8259
>> 651 select IP22_CPU_SCACHE
>> 652 select IRQ_MIPS_CPU
>> 653 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 654 select SGI_HAS_I8042
>> 655 select SGI_HAS_INDYDOG
>> 656 select SGI_HAS_HAL2
>> 657 select SGI_HAS_SEEQ
>> 658 select SGI_HAS_WD93
>> 659 select SGI_HAS_ZILOG
>> 660 select SWAP_IO_SPACE
>> 661 select SYS_HAS_CPU_R4X00
>> 662 select SYS_HAS_CPU_R5000
>> 663 select SYS_HAS_EARLY_PRINTK
>> 664 select SYS_SUPPORTS_32BIT_KERNEL
>> 665 select SYS_SUPPORTS_64BIT_KERNEL
>> 666 select SYS_SUPPORTS_BIG_ENDIAN
>> 667 select WAR_R4600_V1_INDEX_ICACHEOP
>> 668 select WAR_R4600_V1_HIT_CACHEOP
>> 669 select WAR_R4600_V2_HIT_CACHEOP
>> 670 select MIPS_L1_CACHE_SHIFT_7
>> 671 help
>> 672 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 673 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 674 that runs on these, say Y here.
>> 675
>> 676 config SGI_IP27
>> 677 bool "SGI IP27 (Origin200/2000)"
>> 678 select ARCH_HAS_PHYS_TO_DMA
>> 679 select ARCH_SPARSEMEM_ENABLE
>> 680 select FW_ARC
>> 681 select FW_ARC64
>> 682 select ARC_CMDLINE_ONLY
>> 683 select BOOT_ELF64
>> 684 select DEFAULT_SGI_PARTITION
>> 685 select FORCE_PCI
>> 686 select SYS_HAS_EARLY_PRINTK
>> 687 select HAVE_PCI
>> 688 select IRQ_MIPS_CPU
>> 689 select IRQ_DOMAIN_HIERARCHY
>> 690 select NR_CPUS_DEFAULT_64
>> 691 select PCI_DRIVERS_GENERIC
>> 692 select PCI_XTALK_BRIDGE
>> 693 select SYS_HAS_CPU_R10000
>> 694 select SYS_SUPPORTS_64BIT_KERNEL
>> 695 select SYS_SUPPORTS_BIG_ENDIAN
>> 696 select SYS_SUPPORTS_NUMA
>> 697 select SYS_SUPPORTS_SMP
>> 698 select WAR_R10000_LLSC
>> 699 select MIPS_L1_CACHE_SHIFT_7
>> 700 select NUMA
>> 701 select HAVE_ARCH_NODEDATA_EXTENSION
>> 702 help
>> 703 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 704 workstations. To compile a Linux kernel that runs on these, say Y
>> 705 here.
>> 706
>> 707 config SGI_IP28
>> 708 bool "SGI IP28 (Indigo2 R10k)"
>> 709 select ARC_MEMORY
>> 710 select ARC_PROMLIB
>> 711 select FW_ARC
>> 712 select FW_ARC64
>> 713 select ARCH_MIGHT_HAVE_PC_SERIO
>> 714 select BOOT_ELF64
>> 715 select CEVT_R4K
>> 716 select CSRC_R4K
>> 717 select DEFAULT_SGI_PARTITION
>> 718 select DMA_NONCOHERENT
>> 719 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 720 select IRQ_MIPS_CPU
>> 721 select HAVE_EISA
>> 722 select I8253
>> 723 select I8259
>> 724 select SGI_HAS_I8042
>> 725 select SGI_HAS_INDYDOG
>> 726 select SGI_HAS_HAL2
>> 727 select SGI_HAS_SEEQ
>> 728 select SGI_HAS_WD93
>> 729 select SGI_HAS_ZILOG
>> 730 select SWAP_IO_SPACE
>> 731 select SYS_HAS_CPU_R10000
>> 732 select SYS_HAS_EARLY_PRINTK
>> 733 select SYS_SUPPORTS_64BIT_KERNEL
>> 734 select SYS_SUPPORTS_BIG_ENDIAN
>> 735 select WAR_R10000_LLSC
>> 736 select MIPS_L1_CACHE_SHIFT_7
>> 737 help
>> 738 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 739 kernel that runs on these, say Y here.
>> 740
>> 741 config SGI_IP30
>> 742 bool "SGI IP30 (Octane/Octane2)"
>> 743 select ARCH_HAS_PHYS_TO_DMA
>> 744 select FW_ARC
>> 745 select FW_ARC64
>> 746 select BOOT_ELF64
>> 747 select CEVT_R4K
>> 748 select CSRC_R4K
>> 749 select FORCE_PCI
>> 750 select SYNC_R4K if SMP
>> 751 select ZONE_DMA32
>> 752 select HAVE_PCI
>> 753 select IRQ_MIPS_CPU
>> 754 select IRQ_DOMAIN_HIERARCHY
>> 755 select PCI_DRIVERS_GENERIC
>> 756 select PCI_XTALK_BRIDGE
>> 757 select SYS_HAS_EARLY_PRINTK
>> 758 select SYS_HAS_CPU_R10000
>> 759 select SYS_SUPPORTS_64BIT_KERNEL
>> 760 select SYS_SUPPORTS_BIG_ENDIAN
>> 761 select SYS_SUPPORTS_SMP
>> 762 select WAR_R10000_LLSC
>> 763 select MIPS_L1_CACHE_SHIFT_7
>> 764 select ARC_MEMORY
>> 765 help
>> 766 These are the SGI Octane and Octane2 graphics workstations. To
>> 767 compile a Linux kernel that runs on these, say Y here.
>> 768
>> 769 config SGI_IP32
>> 770 bool "SGI IP32 (O2)"
>> 771 select ARC_MEMORY
>> 772 select ARC_PROMLIB
>> 773 select ARCH_HAS_PHYS_TO_DMA
>> 774 select FW_ARC
>> 775 select FW_ARC32
>> 776 select BOOT_ELF32
>> 777 select CEVT_R4K
>> 778 select CSRC_R4K
>> 779 select DMA_NONCOHERENT
>> 780 select HAVE_PCI
>> 781 select IRQ_MIPS_CPU
>> 782 select R5000_CPU_SCACHE
>> 783 select RM7000_CPU_SCACHE
>> 784 select SYS_HAS_CPU_R5000
>> 785 select SYS_HAS_CPU_R10000 if BROKEN
>> 786 select SYS_HAS_CPU_RM7000
>> 787 select SYS_HAS_CPU_NEVADA
>> 788 select SYS_SUPPORTS_64BIT_KERNEL
>> 789 select SYS_SUPPORTS_BIG_ENDIAN
>> 790 select WAR_ICACHE_REFILLS
>> 791 help
>> 792 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 793
>> 794 config SIBYTE_CRHONE
>> 795 bool "Sibyte BCM91125C-CRhone"
>> 796 select BOOT_ELF32
>> 797 select SIBYTE_BCM1125
>> 798 select SWAP_IO_SPACE
>> 799 select SYS_HAS_CPU_SB1
>> 800 select SYS_SUPPORTS_BIG_ENDIAN
>> 801 select SYS_SUPPORTS_HIGHMEM
>> 802 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 803
>> 804 config SIBYTE_RHONE
>> 805 bool "Sibyte BCM91125E-Rhone"
>> 806 select BOOT_ELF32
>> 807 select SIBYTE_SB1250
>> 808 select SWAP_IO_SPACE
>> 809 select SYS_HAS_CPU_SB1
>> 810 select SYS_SUPPORTS_BIG_ENDIAN
>> 811 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 812
>> 813 config SIBYTE_SWARM
>> 814 bool "Sibyte BCM91250A-SWARM"
>> 815 select BOOT_ELF32
>> 816 select HAVE_PATA_PLATFORM
>> 817 select SIBYTE_SB1250
>> 818 select SWAP_IO_SPACE
>> 819 select SYS_HAS_CPU_SB1
>> 820 select SYS_SUPPORTS_BIG_ENDIAN
>> 821 select SYS_SUPPORTS_HIGHMEM
>> 822 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 823 select ZONE_DMA32 if 64BIT
>> 824 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 825
>> 826 config SIBYTE_LITTLESUR
>> 827 bool "Sibyte BCM91250C2-LittleSur"
>> 828 select BOOT_ELF32
>> 829 select HAVE_PATA_PLATFORM
>> 830 select SIBYTE_SB1250
>> 831 select SWAP_IO_SPACE
>> 832 select SYS_HAS_CPU_SB1
>> 833 select SYS_SUPPORTS_BIG_ENDIAN
>> 834 select SYS_SUPPORTS_HIGHMEM
>> 835 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 836 select ZONE_DMA32 if 64BIT
>> 837
>> 838 config SIBYTE_SENTOSA
>> 839 bool "Sibyte BCM91250E-Sentosa"
>> 840 select BOOT_ELF32
>> 841 select SIBYTE_SB1250
>> 842 select SWAP_IO_SPACE
>> 843 select SYS_HAS_CPU_SB1
>> 844 select SYS_SUPPORTS_BIG_ENDIAN
>> 845 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 846 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 847
>> 848 config SIBYTE_BIGSUR
>> 849 bool "Sibyte BCM91480B-BigSur"
>> 850 select BOOT_ELF32
>> 851 select NR_CPUS_DEFAULT_4
>> 852 select SIBYTE_BCM1x80
>> 853 select SWAP_IO_SPACE
>> 854 select SYS_HAS_CPU_SB1
>> 855 select SYS_SUPPORTS_BIG_ENDIAN
>> 856 select SYS_SUPPORTS_HIGHMEM
>> 857 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 858 select ZONE_DMA32 if 64BIT
>> 859 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 860
>> 861 config SNI_RM
>> 862 bool "SNI RM200/300/400"
>> 863 select ARC_MEMORY
>> 864 select ARC_PROMLIB
>> 865 select FW_ARC if CPU_LITTLE_ENDIAN
>> 866 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 867 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 868 select ARCH_MAY_HAVE_PC_FDC
>> 869 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 870 select ARCH_MIGHT_HAVE_PC_SERIO
>> 871 select BOOT_ELF32
>> 872 select CEVT_R4K
>> 873 select CSRC_R4K
>> 874 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 875 select DMA_NONCOHERENT
>> 876 select GENERIC_ISA_DMA
>> 877 select HAVE_EISA
>> 878 select HAVE_PCSPKR_PLATFORM
>> 879 select HAVE_PCI
>> 880 select IRQ_MIPS_CPU
>> 881 select I8253
>> 882 select I8259
>> 883 select ISA
>> 884 select MIPS_L1_CACHE_SHIFT_6
>> 885 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 886 select SYS_HAS_CPU_R4X00
>> 887 select SYS_HAS_CPU_R5000
>> 888 select SYS_HAS_CPU_R10000
>> 889 select R5000_CPU_SCACHE
>> 890 select SYS_HAS_EARLY_PRINTK
>> 891 select SYS_SUPPORTS_32BIT_KERNEL
>> 892 select SYS_SUPPORTS_64BIT_KERNEL
>> 893 select SYS_SUPPORTS_BIG_ENDIAN
>> 894 select SYS_SUPPORTS_HIGHMEM
>> 895 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 896 select WAR_R4600_V2_HIT_CACHEOP
>> 897 help
>> 898 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 899 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 900 Technology and now in turn merged with Fujitsu. Say Y here to
>> 901 support this machine type.
>> 902
>> 903 config MACH_TX49XX
>> 904 bool "Toshiba TX49 series based machines"
>> 905 select WAR_TX49XX_ICACHE_INDEX_INV
>> 906
>> 907 config MIKROTIK_RB532
>> 908 bool "Mikrotik RB532 boards"
>> 909 select CEVT_R4K
>> 910 select CSRC_R4K
>> 911 select DMA_NONCOHERENT
>> 912 select HAVE_PCI
>> 913 select IRQ_MIPS_CPU
>> 914 select SYS_HAS_CPU_MIPS32_R1
>> 915 select SYS_SUPPORTS_32BIT_KERNEL
>> 916 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 917 select SWAP_IO_SPACE
>> 918 select BOOT_RAW
>> 919 select GPIOLIB
>> 920 select MIPS_L1_CACHE_SHIFT_4
>> 921 help
>> 922 Support the Mikrotik(tm) RouterBoard 532 series,
>> 923 based on the IDT RC32434 SoC.
>> 924
>> 925 config CAVIUM_OCTEON_SOC
>> 926 bool "Cavium Networks Octeon SoC based boards"
>> 927 select CEVT_R4K
>> 928 select ARCH_HAS_PHYS_TO_DMA
>> 929 select HAVE_RAPIDIO
>> 930 select PHYS_ADDR_T_64BIT
>> 931 select SYS_SUPPORTS_64BIT_KERNEL
>> 932 select SYS_SUPPORTS_BIG_ENDIAN
>> 933 select EDAC_SUPPORT
>> 934 select EDAC_ATOMIC_SCRUB
>> 935 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 936 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 937 select SYS_HAS_EARLY_PRINTK
>> 938 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 939 select HAVE_PCI
>> 940 select HAVE_PLAT_DELAY
>> 941 select HAVE_PLAT_FW_INIT_CMDLINE
>> 942 select HAVE_PLAT_MEMCPY
>> 943 select ZONE_DMA32
>> 944 select GPIOLIB
>> 945 select USE_OF
>> 946 select ARCH_SPARSEMEM_ENABLE
>> 947 select SYS_SUPPORTS_SMP
>> 948 select NR_CPUS_DEFAULT_64
>> 949 select MIPS_NR_CPU_NR_MAP_1024
>> 950 select BUILTIN_DTB
>> 951 select MTD
>> 952 select MTD_COMPLEX_MAPPINGS
>> 953 select SWIOTLB
>> 954 select SYS_SUPPORTS_RELOCATABLE
>> 955 help
>> 956 This option supports all of the Octeon reference boards from Cavium
>> 957 Networks. It builds a kernel that dynamically determines the Octeon
>> 958 CPU type and supports all known board reference implementations.
>> 959 Some of the supported boards are:
>> 960 EBT3000
>> 961 EBH3000
>> 962 EBH3100
>> 963 Thunder
>> 964 Kodama
>> 965 Hikari
>> 966 Say Y here for most Octeon reference boards.
>> 967
>> 968 endchoice
>> 969
>> 970 source "arch/mips/alchemy/Kconfig"
>> 971 source "arch/mips/ath25/Kconfig"
>> 972 source "arch/mips/ath79/Kconfig"
>> 973 source "arch/mips/bcm47xx/Kconfig"
>> 974 source "arch/mips/bcm63xx/Kconfig"
>> 975 source "arch/mips/bmips/Kconfig"
>> 976 source "arch/mips/generic/Kconfig"
>> 977 source "arch/mips/ingenic/Kconfig"
>> 978 source "arch/mips/jazz/Kconfig"
>> 979 source "arch/mips/lantiq/Kconfig"
>> 980 source "arch/mips/pic32/Kconfig"
>> 981 source "arch/mips/ralink/Kconfig"
>> 982 source "arch/mips/sgi-ip27/Kconfig"
>> 983 source "arch/mips/sibyte/Kconfig"
>> 984 source "arch/mips/txx9/Kconfig"
>> 985 source "arch/mips/cavium-octeon/Kconfig"
>> 986 source "arch/mips/loongson2ef/Kconfig"
>> 987 source "arch/mips/loongson32/Kconfig"
>> 988 source "arch/mips/loongson64/Kconfig"
>> 989
>> 990 endmenu
86 991
87 config GENERIC_HWEIGHT 992 config GENERIC_HWEIGHT
88 def_bool y !! 993 bool
>> 994 default y
89 995
90 config GENERIC_CALIBRATE_DELAY 996 config GENERIC_CALIBRATE_DELAY
91 bool 997 bool
>> 998 default y
92 999
93 config GENERIC_LOCKBREAK !! 1000 config SCHED_OMIT_FRAME_POINTER
94 def_bool y !! 1001 bool
95 depends on SMP && PREEMPTION !! 1002 default y
96 1003
97 config ARCH_SUSPEND_POSSIBLE !! 1004 #
98 def_bool n !! 1005 # Select some configuration options automatically based on user selections.
>> 1006 #
>> 1007 config FW_ARC
>> 1008 bool
99 1009
100 config ARCH_HIBERNATION_POSSIBLE !! 1010 config ARCH_MAY_HAVE_PC_FDC
101 def_bool n !! 1011 bool
102 1012
103 config SYS_SUPPORTS_APM_EMULATION !! 1013 config BOOT_RAW
104 bool 1014 bool
105 select ARCH_SUSPEND_POSSIBLE <<
106 1015
107 config SYS_SUPPORTS_SMP !! 1016 config CEVT_BCM1480
108 bool 1017 bool
109 1018
110 config SYS_SUPPORTS_NUMA !! 1019 config CEVT_DS1287
111 bool 1020 bool
112 1021
113 config STACKTRACE_SUPPORT !! 1022 config CEVT_GT641XX
114 def_bool y !! 1023 bool
115 1024
116 config LOCKDEP_SUPPORT !! 1025 config CEVT_R4K
117 def_bool y !! 1026 bool
118 1027
119 config ARCH_HAS_ILOG2_U32 !! 1028 config CEVT_SB1250
120 def_bool n !! 1029 bool
121 1030
122 config ARCH_HAS_ILOG2_U64 !! 1031 config CEVT_TXX9
123 def_bool n !! 1032 bool
124 1033
125 config NO_IOPORT_MAP !! 1034 config CSRC_BCM1480
126 def_bool !PCI !! 1035 bool
127 depends on !SH_SHMIN && !SH_HP6XX && ! <<
128 !SH_DREAMCAST <<
129 1036
130 config IO_TRAPPED !! 1037 config CSRC_IOASIC
131 bool 1038 bool
132 1039
133 config SWAP_IO_SPACE !! 1040 config CSRC_R4K
>> 1041 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
134 bool 1042 bool
135 1043
136 config DMA_COHERENT !! 1044 config CSRC_SB1250
137 bool 1045 bool
138 1046
>> 1047 config MIPS_CLOCK_VSYSCALL
>> 1048 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1049
>> 1050 config GPIO_TXX9
>> 1051 select GPIOLIB
>> 1052 bool
>> 1053
>> 1054 config FW_CFE
>> 1055 bool
>> 1056
>> 1057 config ARCH_SUPPORTS_UPROBES
>> 1058 def_bool y
>> 1059
139 config DMA_NONCOHERENT 1060 config DMA_NONCOHERENT
140 def_bool !NO_DMA && !DMA_COHERENT !! 1061 bool
>> 1062 #
>> 1063 # MIPS allows mixing "slightly different" Cacheability and Coherency
>> 1064 # Attribute bits. It is believed that the uncached access through
>> 1065 # KSEG1 and the implementation specific "uncached accelerated" used
>> 1066 # by pgprot_writcombine can be mixed, and the latter sometimes provides
>> 1067 # significant advantages.
>> 1068 #
>> 1069 select ARCH_HAS_SETUP_DMA_OPS
>> 1070 select ARCH_HAS_DMA_WRITE_COMBINE
141 select ARCH_HAS_DMA_PREP_COHERENT 1071 select ARCH_HAS_DMA_PREP_COHERENT
>> 1072 select ARCH_HAS_SYNC_DMA_FOR_CPU
142 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 1073 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
143 select DMA_DIRECT_REMAP !! 1074 select ARCH_HAS_DMA_SET_UNCACHED
>> 1075 select DMA_NONCOHERENT_MMAP
>> 1076 select NEED_DMA_MAP_STATE
144 1077
145 config PGTABLE_LEVELS !! 1078 config SYS_HAS_EARLY_PRINTK
146 default 3 if X2TLB !! 1079 bool
147 default 2 !! 1080
>> 1081 config SYS_SUPPORTS_HOTPLUG_CPU
>> 1082 bool
>> 1083
>> 1084 config MIPS_BONITO64
>> 1085 bool
>> 1086
>> 1087 config MIPS_MSC
>> 1088 bool
>> 1089
>> 1090 config SYNC_R4K
>> 1091 bool
>> 1092
>> 1093 config NO_IOPORT_MAP
>> 1094 def_bool n
>> 1095
>> 1096 config GENERIC_CSUM
>> 1097 def_bool CPU_NO_LOAD_STORE_LR
>> 1098
>> 1099 config GENERIC_ISA_DMA
>> 1100 bool
>> 1101 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1102 select ISA_DMA_API
>> 1103
>> 1104 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1105 bool
>> 1106 select GENERIC_ISA_DMA
148 1107
149 menu "System type" !! 1108 config HAVE_PLAT_DELAY
>> 1109 bool
>> 1110
>> 1111 config HAVE_PLAT_FW_INIT_CMDLINE
>> 1112 bool
>> 1113
>> 1114 config HAVE_PLAT_MEMCPY
>> 1115 bool
>> 1116
>> 1117 config ISA_DMA_API
>> 1118 bool
>> 1119
>> 1120 config SYS_SUPPORTS_RELOCATABLE
>> 1121 bool
>> 1122 help
>> 1123 Selected if the platform supports relocating the kernel.
>> 1124 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1125 to allow access to command line and entropy sources.
150 1126
151 # 1127 #
152 # Processor families !! 1128 # Endianness selection. Sufficiently obscure so many users don't know what to
>> 1129 # answer,so we try hard to limit the available choices. Also the use of a
>> 1130 # choice statement should be more obvious to the user.
153 # 1131 #
154 config CPU_SH2 !! 1132 choice
>> 1133 prompt "Endianness selection"
>> 1134 help
>> 1135 Some MIPS machines can be configured for either little or big endian
>> 1136 byte order. These modes require different kernels and a different
>> 1137 Linux distribution. In general there is one preferred byteorder for a
>> 1138 particular system but some systems are just as commonly used in the
>> 1139 one or the other endianness.
>> 1140
>> 1141 config CPU_BIG_ENDIAN
>> 1142 bool "Big endian"
>> 1143 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1144
>> 1145 config CPU_LITTLE_ENDIAN
>> 1146 bool "Little endian"
>> 1147 depends on SYS_SUPPORTS_LITTLE_ENDIAN
>> 1148
>> 1149 endchoice
>> 1150
>> 1151 config EXPORT_UASM
155 bool 1152 bool
156 select SH_INTC <<
157 1153
158 config CPU_SH2A !! 1154 config SYS_SUPPORTS_APM_EMULATION
159 bool 1155 bool
160 select CPU_SH2 <<
161 select UNCACHED_MAPPING <<
162 1156
163 config CPU_J2 !! 1157 config SYS_SUPPORTS_BIG_ENDIAN
164 bool 1158 bool
165 select CPU_SH2 <<
166 select OF <<
167 select OF_EARLY_FLATTREE <<
168 1159
169 config CPU_SH3 !! 1160 config SYS_SUPPORTS_LITTLE_ENDIAN
170 bool 1161 bool
171 select CPU_HAS_INTEVT <<
172 select CPU_HAS_SR_RB <<
173 select SH_INTC <<
174 select SYS_SUPPORTS_SH_TMU <<
175 1162
176 config CPU_SH4 !! 1163 config MIPS_HUGE_TLB_SUPPORT
>> 1164 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
>> 1165
>> 1166 config IRQ_TXX9
177 bool 1167 bool
178 select ARCH_SUPPORTS_HUGETLBFS if MMU <<
179 select CPU_HAS_INTEVT <<
180 select CPU_HAS_SR_RB <<
181 select CPU_HAS_FPU if !CPU_SH4AL_DSP <<
182 select SH_INTC <<
183 select SYS_SUPPORTS_SH_TMU <<
184 1168
185 config CPU_SH4A !! 1169 config IRQ_GT641XX
186 bool 1170 bool
187 select CPU_SH4 <<
188 1171
189 config CPU_SH4AL_DSP !! 1172 config PCI_GT64XXX_PCI0
190 bool 1173 bool
191 select CPU_SH4A <<
192 select CPU_HAS_DSP <<
193 1174
194 config CPU_SHX2 !! 1175 config PCI_XTALK_BRIDGE
195 bool 1176 bool
196 1177
197 config CPU_SHX3 !! 1178 config NO_EXCEPT_FILL
198 bool 1179 bool
199 select DMA_COHERENT <<
200 select SYS_SUPPORTS_SMP <<
201 select SYS_SUPPORTS_NUMA <<
202 1180
203 config ARCH_SHMOBILE !! 1181 config MIPS_SPRAM
204 bool 1182 bool
205 select ARCH_SUSPEND_POSSIBLE <<
206 select PM <<
207 1183
208 config CPU_HAS_PMU !! 1184 config SWAP_IO_SPACE
209 depends on CPU_SH4 || CPU_SH4A !! 1185 bool
210 default y <<
211 bool <<
212 1186
213 choice !! 1187 config SGI_HAS_INDYDOG
214 prompt "Processor sub-type selection" !! 1188 bool
215 1189
216 # !! 1190 config SGI_HAS_HAL2
217 # Processor subtypes !! 1191 bool
218 # <<
219 1192
220 # SH-2 Processor Support !! 1193 config SGI_HAS_SEEQ
>> 1194 bool
221 1195
222 config CPU_SUBTYPE_SH7619 !! 1196 config SGI_HAS_WD93
223 bool "Support SH7619 processor" !! 1197 bool
224 select CPU_SH2 <<
225 select SYS_SUPPORTS_SH_CMT <<
226 1198
227 config CPU_SUBTYPE_J2 !! 1199 config SGI_HAS_ZILOG
228 bool "Support J2 processor" !! 1200 bool
229 select CPU_J2 <<
230 select SYS_SUPPORTS_SMP <<
231 select GENERIC_CLOCKEVENTS_BROADCAST i <<
232 1201
233 # SH-2A Processor Support !! 1202 config SGI_HAS_I8042
>> 1203 bool
234 1204
235 config CPU_SUBTYPE_SH7201 !! 1205 config DEFAULT_SGI_PARTITION
236 bool "Support SH7201 processor" !! 1206 bool
237 select CPU_SH2A <<
238 select CPU_HAS_FPU <<
239 select SYS_SUPPORTS_SH_MTU2 <<
240 <<
241 config CPU_SUBTYPE_SH7203 <<
242 bool "Support SH7203 processor" <<
243 select CPU_SH2A <<
244 select CPU_HAS_FPU <<
245 select SYS_SUPPORTS_SH_CMT <<
246 select SYS_SUPPORTS_SH_MTU2 <<
247 select PINCTRL <<
248 1207
249 config CPU_SUBTYPE_SH7206 !! 1208 config FW_ARC32
250 bool "Support SH7206 processor" !! 1209 bool
251 select CPU_SH2A <<
252 select SYS_SUPPORTS_SH_CMT <<
253 select SYS_SUPPORTS_SH_MTU2 <<
254 <<
255 config CPU_SUBTYPE_SH7263 <<
256 bool "Support SH7263 processor" <<
257 select CPU_SH2A <<
258 select CPU_HAS_FPU <<
259 select SYS_SUPPORTS_SH_CMT <<
260 select SYS_SUPPORTS_SH_MTU2 <<
261 <<
262 config CPU_SUBTYPE_SH7264 <<
263 bool "Support SH7264 processor" <<
264 select CPU_SH2A <<
265 select CPU_HAS_FPU <<
266 select SYS_SUPPORTS_SH_CMT <<
267 select SYS_SUPPORTS_SH_MTU2 <<
268 select PINCTRL <<
269 1210
270 config CPU_SUBTYPE_SH7269 !! 1211 config FW_SNIPROM
271 bool "Support SH7269 processor" !! 1212 bool
272 select CPU_SH2A !! 1213
273 select CPU_HAS_FPU !! 1214 config BOOT_ELF32
274 select SYS_SUPPORTS_SH_CMT !! 1215 bool
275 select SYS_SUPPORTS_SH_MTU2 <<
276 select PINCTRL <<
277 1216
278 config CPU_SUBTYPE_MXG !! 1217 config MIPS_L1_CACHE_SHIFT_4
279 bool "Support MX-G processor" !! 1218 bool
280 select CPU_SH2A !! 1219
281 select SYS_SUPPORTS_SH_MTU2 !! 1220 config MIPS_L1_CACHE_SHIFT_5
>> 1221 bool
>> 1222
>> 1223 config MIPS_L1_CACHE_SHIFT_6
>> 1224 bool
>> 1225
>> 1226 config MIPS_L1_CACHE_SHIFT_7
>> 1227 bool
>> 1228
>> 1229 config MIPS_L1_CACHE_SHIFT
>> 1230 int
>> 1231 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1232 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1233 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1234 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1235 default "5"
>> 1236
>> 1237 config ARC_CMDLINE_ONLY
>> 1238 bool
>> 1239
>> 1240 config ARC_CONSOLE
>> 1241 bool "ARC console support"
>> 1242 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1243
>> 1244 config ARC_MEMORY
>> 1245 bool
>> 1246
>> 1247 config ARC_PROMLIB
>> 1248 bool
>> 1249
>> 1250 config FW_ARC64
>> 1251 bool
>> 1252
>> 1253 config BOOT_ELF64
>> 1254 bool
>> 1255
>> 1256 menu "CPU selection"
>> 1257
>> 1258 choice
>> 1259 prompt "CPU type"
>> 1260 default CPU_R4X00
>> 1261
>> 1262 config CPU_LOONGSON64
>> 1263 bool "Loongson 64-bit CPU"
>> 1264 depends on SYS_HAS_CPU_LOONGSON64
>> 1265 select ARCH_HAS_PHYS_TO_DMA
>> 1266 select CPU_MIPSR2
>> 1267 select CPU_HAS_PREFETCH
>> 1268 select CPU_SUPPORTS_64BIT_KERNEL
>> 1269 select CPU_SUPPORTS_HIGHMEM
>> 1270 select CPU_SUPPORTS_HUGEPAGES
>> 1271 select CPU_SUPPORTS_MSA
>> 1272 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
>> 1273 select CPU_MIPSR2_IRQ_VI
>> 1274 select WEAK_ORDERING
>> 1275 select WEAK_REORDERING_BEYOND_LLSC
>> 1276 select MIPS_ASID_BITS_VARIABLE
>> 1277 select MIPS_PGD_C0_CONTEXT
>> 1278 select MIPS_L1_CACHE_SHIFT_6
>> 1279 select MIPS_FP_SUPPORT
>> 1280 select GPIOLIB
>> 1281 select SWIOTLB
>> 1282 select HAVE_KVM
282 help 1283 help
283 Select MX-G if running on an R8A0302 !! 1284 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
>> 1285 cores implements the MIPS64R2 instruction set with many extensions,
>> 1286 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
>> 1287 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
>> 1288 Loongson-2E/2F is not covered here and will be removed in future.
284 1289
285 # SH-3 Processor Support !! 1290 config LOONGSON3_ENHANCEMENT
>> 1291 bool "New Loongson-3 CPU Enhancements"
>> 1292 default n
>> 1293 depends on CPU_LOONGSON64
>> 1294 help
>> 1295 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
>> 1296 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1297 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
>> 1298 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1299 Fast TLB refill support, etc.
>> 1300
>> 1301 This option enable those enhancements which are not probed at run
>> 1302 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1303 please say 'N' here. If you want a high-performance kernel to run on
>> 1304 new Loongson-3 machines only, please say 'Y' here.
>> 1305
>> 1306 config CPU_LOONGSON3_WORKAROUNDS
>> 1307 bool "Loongson-3 LLSC Workarounds"
>> 1308 default y if SMP
>> 1309 depends on CPU_LOONGSON64
>> 1310 help
>> 1311 Loongson-3 processors have the llsc issues which require workarounds.
>> 1312 Without workarounds the system may hang unexpectedly.
286 1313
287 config CPU_SUBTYPE_SH7705 !! 1314 Say Y, unless you know what you are doing.
288 bool "Support SH7705 processor" <<
289 select CPU_SH3 <<
290 1315
291 config CPU_SUBTYPE_SH7706 !! 1316 config CPU_LOONGSON3_CPUCFG_EMULATION
292 bool "Support SH7706 processor" !! 1317 bool "Emulate the CPUCFG instruction on older Loongson cores"
293 select CPU_SH3 !! 1318 default y
>> 1319 depends on CPU_LOONGSON64
294 help 1320 help
295 Select SH7706 if you have a 133 Mhz !! 1321 Loongson-3A R4 and newer have the CPUCFG instruction available for
>> 1322 userland to query CPU capabilities, much like CPUID on x86. This
>> 1323 option provides emulation of the instruction on older Loongson
>> 1324 cores, back to Loongson-3A1000.
>> 1325
>> 1326 If unsure, please say Y.
>> 1327
>> 1328 config CPU_LOONGSON2E
>> 1329 bool "Loongson 2E"
>> 1330 depends on SYS_HAS_CPU_LOONGSON2E
>> 1331 select CPU_LOONGSON2EF
>> 1332 help
>> 1333 The Loongson 2E processor implements the MIPS III instruction set
>> 1334 with many extensions.
>> 1335
>> 1336 It has an internal FPGA northbridge, which is compatible to
>> 1337 bonito64.
>> 1338
>> 1339 config CPU_LOONGSON2F
>> 1340 bool "Loongson 2F"
>> 1341 depends on SYS_HAS_CPU_LOONGSON2F
>> 1342 select CPU_LOONGSON2EF
>> 1343 help
>> 1344 The Loongson 2F processor implements the MIPS III instruction set
>> 1345 with many extensions.
>> 1346
>> 1347 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1348 have a similar programming interface with FPGA northbridge used in
>> 1349 Loongson2E.
>> 1350
>> 1351 config CPU_LOONGSON1B
>> 1352 bool "Loongson 1B"
>> 1353 depends on SYS_HAS_CPU_LOONGSON1B
>> 1354 select CPU_LOONGSON32
>> 1355 select LEDS_GPIO_REGISTER
>> 1356 help
>> 1357 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1358 Release 1 instruction set and part of the MIPS32 Release 2
>> 1359 instruction set.
>> 1360
>> 1361 config CPU_LOONGSON1C
>> 1362 bool "Loongson 1C"
>> 1363 depends on SYS_HAS_CPU_LOONGSON1C
>> 1364 select CPU_LOONGSON32
>> 1365 select LEDS_GPIO_REGISTER
>> 1366 help
>> 1367 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1368 Release 1 instruction set and part of the MIPS32 Release 2
>> 1369 instruction set.
>> 1370
>> 1371 config CPU_MIPS32_R1
>> 1372 bool "MIPS32 Release 1"
>> 1373 depends on SYS_HAS_CPU_MIPS32_R1
>> 1374 select CPU_HAS_PREFETCH
>> 1375 select CPU_SUPPORTS_32BIT_KERNEL
>> 1376 select CPU_SUPPORTS_HIGHMEM
>> 1377 help
>> 1378 Choose this option to build a kernel for release 1 or later of the
>> 1379 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1380 MIPS processor are based on a MIPS32 processor. If you know the
>> 1381 specific type of processor in your system, choose those that one
>> 1382 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1383 Release 2 of the MIPS32 architecture is available since several
>> 1384 years so chances are you even have a MIPS32 Release 2 processor
>> 1385 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1386 performance.
>> 1387
>> 1388 config CPU_MIPS32_R2
>> 1389 bool "MIPS32 Release 2"
>> 1390 depends on SYS_HAS_CPU_MIPS32_R2
>> 1391 select CPU_HAS_PREFETCH
>> 1392 select CPU_SUPPORTS_32BIT_KERNEL
>> 1393 select CPU_SUPPORTS_HIGHMEM
>> 1394 select CPU_SUPPORTS_MSA
>> 1395 select HAVE_KVM
>> 1396 help
>> 1397 Choose this option to build a kernel for release 2 or later of the
>> 1398 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1399 MIPS processor are based on a MIPS32 processor. If you know the
>> 1400 specific type of processor in your system, choose those that one
>> 1401 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1402
>> 1403 config CPU_MIPS32_R5
>> 1404 bool "MIPS32 Release 5"
>> 1405 depends on SYS_HAS_CPU_MIPS32_R5
>> 1406 select CPU_HAS_PREFETCH
>> 1407 select CPU_SUPPORTS_32BIT_KERNEL
>> 1408 select CPU_SUPPORTS_HIGHMEM
>> 1409 select CPU_SUPPORTS_MSA
>> 1410 select HAVE_KVM
>> 1411 select MIPS_O32_FP64_SUPPORT
>> 1412 help
>> 1413 Choose this option to build a kernel for release 5 or later of the
>> 1414 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1415 family, are based on a MIPS32r5 processor. If you own an older
>> 1416 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1417
>> 1418 config CPU_MIPS32_R6
>> 1419 bool "MIPS32 Release 6"
>> 1420 depends on SYS_HAS_CPU_MIPS32_R6
>> 1421 select CPU_HAS_PREFETCH
>> 1422 select CPU_NO_LOAD_STORE_LR
>> 1423 select CPU_SUPPORTS_32BIT_KERNEL
>> 1424 select CPU_SUPPORTS_HIGHMEM
>> 1425 select CPU_SUPPORTS_MSA
>> 1426 select HAVE_KVM
>> 1427 select MIPS_O32_FP64_SUPPORT
>> 1428 help
>> 1429 Choose this option to build a kernel for release 6 or later of the
>> 1430 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1431 family, are based on a MIPS32r6 processor. If you own an older
>> 1432 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1433
>> 1434 config CPU_MIPS64_R1
>> 1435 bool "MIPS64 Release 1"
>> 1436 depends on SYS_HAS_CPU_MIPS64_R1
>> 1437 select CPU_HAS_PREFETCH
>> 1438 select CPU_SUPPORTS_32BIT_KERNEL
>> 1439 select CPU_SUPPORTS_64BIT_KERNEL
>> 1440 select CPU_SUPPORTS_HIGHMEM
>> 1441 select CPU_SUPPORTS_HUGEPAGES
>> 1442 help
>> 1443 Choose this option to build a kernel for release 1 or later of the
>> 1444 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1445 MIPS processor are based on a MIPS64 processor. If you know the
>> 1446 specific type of processor in your system, choose those that one
>> 1447 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1448 Release 2 of the MIPS64 architecture is available since several
>> 1449 years so chances are you even have a MIPS64 Release 2 processor
>> 1450 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1451 performance.
>> 1452
>> 1453 config CPU_MIPS64_R2
>> 1454 bool "MIPS64 Release 2"
>> 1455 depends on SYS_HAS_CPU_MIPS64_R2
>> 1456 select CPU_HAS_PREFETCH
>> 1457 select CPU_SUPPORTS_32BIT_KERNEL
>> 1458 select CPU_SUPPORTS_64BIT_KERNEL
>> 1459 select CPU_SUPPORTS_HIGHMEM
>> 1460 select CPU_SUPPORTS_HUGEPAGES
>> 1461 select CPU_SUPPORTS_MSA
>> 1462 select HAVE_KVM
>> 1463 help
>> 1464 Choose this option to build a kernel for release 2 or later of the
>> 1465 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1466 MIPS processor are based on a MIPS64 processor. If you know the
>> 1467 specific type of processor in your system, choose those that one
>> 1468 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1469
>> 1470 config CPU_MIPS64_R5
>> 1471 bool "MIPS64 Release 5"
>> 1472 depends on SYS_HAS_CPU_MIPS64_R5
>> 1473 select CPU_HAS_PREFETCH
>> 1474 select CPU_SUPPORTS_32BIT_KERNEL
>> 1475 select CPU_SUPPORTS_64BIT_KERNEL
>> 1476 select CPU_SUPPORTS_HIGHMEM
>> 1477 select CPU_SUPPORTS_HUGEPAGES
>> 1478 select CPU_SUPPORTS_MSA
>> 1479 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1480 select HAVE_KVM
>> 1481 help
>> 1482 Choose this option to build a kernel for release 5 or later of the
>> 1483 MIPS64 architecture. This is a intermediate MIPS architecture
>> 1484 release partly implementing release 6 features. Though there is no
>> 1485 any hardware known to be based on this release.
>> 1486
>> 1487 config CPU_MIPS64_R6
>> 1488 bool "MIPS64 Release 6"
>> 1489 depends on SYS_HAS_CPU_MIPS64_R6
>> 1490 select CPU_HAS_PREFETCH
>> 1491 select CPU_NO_LOAD_STORE_LR
>> 1492 select CPU_SUPPORTS_32BIT_KERNEL
>> 1493 select CPU_SUPPORTS_64BIT_KERNEL
>> 1494 select CPU_SUPPORTS_HIGHMEM
>> 1495 select CPU_SUPPORTS_HUGEPAGES
>> 1496 select CPU_SUPPORTS_MSA
>> 1497 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1498 select HAVE_KVM
>> 1499 help
>> 1500 Choose this option to build a kernel for release 6 or later of the
>> 1501 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1502 family, are based on a MIPS64r6 processor. If you own an older
>> 1503 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1504
>> 1505 config CPU_P5600
>> 1506 bool "MIPS Warrior P5600"
>> 1507 depends on SYS_HAS_CPU_P5600
>> 1508 select CPU_HAS_PREFETCH
>> 1509 select CPU_SUPPORTS_32BIT_KERNEL
>> 1510 select CPU_SUPPORTS_HIGHMEM
>> 1511 select CPU_SUPPORTS_MSA
>> 1512 select CPU_SUPPORTS_CPUFREQ
>> 1513 select CPU_MIPSR2_IRQ_VI
>> 1514 select CPU_MIPSR2_IRQ_EI
>> 1515 select HAVE_KVM
>> 1516 select MIPS_O32_FP64_SUPPORT
>> 1517 help
>> 1518 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
>> 1519 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
>> 1520 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
>> 1521 level features like up to six P5600 calculation cores, CM2 with L2
>> 1522 cache, IOCU/IOMMU (though might be unused depending on the system-
>> 1523 specific IP core configuration), GIC, CPC, virtualisation module,
>> 1524 eJTAG and PDtrace.
>> 1525
>> 1526 config CPU_R3000
>> 1527 bool "R3000"
>> 1528 depends on SYS_HAS_CPU_R3000
>> 1529 select CPU_HAS_WB
>> 1530 select CPU_R3K_TLB
>> 1531 select CPU_SUPPORTS_32BIT_KERNEL
>> 1532 select CPU_SUPPORTS_HIGHMEM
>> 1533 help
>> 1534 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1535 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1536 *not* work on R4000 machines and vice versa. However, since most
>> 1537 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1538 might be a safe bet. If the resulting kernel does not work,
>> 1539 try to recompile with R3000.
>> 1540
>> 1541 config CPU_R4300
>> 1542 bool "R4300"
>> 1543 depends on SYS_HAS_CPU_R4300
>> 1544 select CPU_SUPPORTS_32BIT_KERNEL
>> 1545 select CPU_SUPPORTS_64BIT_KERNEL
>> 1546 help
>> 1547 MIPS Technologies R4300-series processors.
>> 1548
>> 1549 config CPU_R4X00
>> 1550 bool "R4x00"
>> 1551 depends on SYS_HAS_CPU_R4X00
>> 1552 select CPU_SUPPORTS_32BIT_KERNEL
>> 1553 select CPU_SUPPORTS_64BIT_KERNEL
>> 1554 select CPU_SUPPORTS_HUGEPAGES
>> 1555 help
>> 1556 MIPS Technologies R4000-series processors other than 4300, including
>> 1557 the R4000, R4400, R4600, and 4700.
>> 1558
>> 1559 config CPU_TX49XX
>> 1560 bool "R49XX"
>> 1561 depends on SYS_HAS_CPU_TX49XX
>> 1562 select CPU_HAS_PREFETCH
>> 1563 select CPU_SUPPORTS_32BIT_KERNEL
>> 1564 select CPU_SUPPORTS_64BIT_KERNEL
>> 1565 select CPU_SUPPORTS_HUGEPAGES
>> 1566
>> 1567 config CPU_R5000
>> 1568 bool "R5000"
>> 1569 depends on SYS_HAS_CPU_R5000
>> 1570 select CPU_SUPPORTS_32BIT_KERNEL
>> 1571 select CPU_SUPPORTS_64BIT_KERNEL
>> 1572 select CPU_SUPPORTS_HUGEPAGES
>> 1573 help
>> 1574 MIPS Technologies R5000-series processors other than the Nevada.
>> 1575
>> 1576 config CPU_R5500
>> 1577 bool "R5500"
>> 1578 depends on SYS_HAS_CPU_R5500
>> 1579 select CPU_SUPPORTS_32BIT_KERNEL
>> 1580 select CPU_SUPPORTS_64BIT_KERNEL
>> 1581 select CPU_SUPPORTS_HUGEPAGES
>> 1582 help
>> 1583 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1584 instruction set.
>> 1585
>> 1586 config CPU_NEVADA
>> 1587 bool "RM52xx"
>> 1588 depends on SYS_HAS_CPU_NEVADA
>> 1589 select CPU_SUPPORTS_32BIT_KERNEL
>> 1590 select CPU_SUPPORTS_64BIT_KERNEL
>> 1591 select CPU_SUPPORTS_HUGEPAGES
>> 1592 help
>> 1593 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1594
>> 1595 config CPU_R10000
>> 1596 bool "R10000"
>> 1597 depends on SYS_HAS_CPU_R10000
>> 1598 select CPU_HAS_PREFETCH
>> 1599 select CPU_SUPPORTS_32BIT_KERNEL
>> 1600 select CPU_SUPPORTS_64BIT_KERNEL
>> 1601 select CPU_SUPPORTS_HIGHMEM
>> 1602 select CPU_SUPPORTS_HUGEPAGES
>> 1603 help
>> 1604 MIPS Technologies R10000-series processors.
>> 1605
>> 1606 config CPU_RM7000
>> 1607 bool "RM7000"
>> 1608 depends on SYS_HAS_CPU_RM7000
>> 1609 select CPU_HAS_PREFETCH
>> 1610 select CPU_SUPPORTS_32BIT_KERNEL
>> 1611 select CPU_SUPPORTS_64BIT_KERNEL
>> 1612 select CPU_SUPPORTS_HIGHMEM
>> 1613 select CPU_SUPPORTS_HUGEPAGES
>> 1614
>> 1615 config CPU_SB1
>> 1616 bool "SB1"
>> 1617 depends on SYS_HAS_CPU_SB1
>> 1618 select CPU_SUPPORTS_32BIT_KERNEL
>> 1619 select CPU_SUPPORTS_64BIT_KERNEL
>> 1620 select CPU_SUPPORTS_HIGHMEM
>> 1621 select CPU_SUPPORTS_HUGEPAGES
>> 1622 select WEAK_ORDERING
>> 1623
>> 1624 config CPU_CAVIUM_OCTEON
>> 1625 bool "Cavium Octeon processor"
>> 1626 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1627 select CPU_HAS_PREFETCH
>> 1628 select CPU_SUPPORTS_64BIT_KERNEL
>> 1629 select WEAK_ORDERING
>> 1630 select CPU_SUPPORTS_HIGHMEM
>> 1631 select CPU_SUPPORTS_HUGEPAGES
>> 1632 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1633 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1634 select MIPS_L1_CACHE_SHIFT_7
>> 1635 select HAVE_KVM
>> 1636 help
>> 1637 The Cavium Octeon processor is a highly integrated chip containing
>> 1638 many ethernet hardware widgets for networking tasks. The processor
>> 1639 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1640 Full details can be found at http://www.caviumnetworks.com.
>> 1641
>> 1642 config CPU_BMIPS
>> 1643 bool "Broadcom BMIPS"
>> 1644 depends on SYS_HAS_CPU_BMIPS
>> 1645 select CPU_MIPS32
>> 1646 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1647 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1648 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1649 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1650 select CPU_SUPPORTS_32BIT_KERNEL
>> 1651 select DMA_NONCOHERENT
>> 1652 select IRQ_MIPS_CPU
>> 1653 select SWAP_IO_SPACE
>> 1654 select WEAK_ORDERING
>> 1655 select CPU_SUPPORTS_HIGHMEM
>> 1656 select CPU_HAS_PREFETCH
>> 1657 select CPU_SUPPORTS_CPUFREQ
>> 1658 select MIPS_EXTERNAL_TIMER
>> 1659 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
>> 1660 help
>> 1661 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1662
>> 1663 endchoice
296 1664
297 config CPU_SUBTYPE_SH7707 !! 1665 config CPU_MIPS32_3_5_FEATURES
298 bool "Support SH7707 processor" !! 1666 bool "MIPS32 Release 3.5 Features"
299 select CPU_SH3 !! 1667 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1668 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
>> 1669 CPU_P5600
>> 1670 help
>> 1671 Choose this option to build a kernel for release 2 or later of the
>> 1672 MIPS32 architecture including features from the 3.5 release such as
>> 1673 support for Enhanced Virtual Addressing (EVA).
>> 1674
>> 1675 config CPU_MIPS32_3_5_EVA
>> 1676 bool "Enhanced Virtual Addressing (EVA)"
>> 1677 depends on CPU_MIPS32_3_5_FEATURES
>> 1678 select EVA
>> 1679 default y
300 help 1680 help
301 Select SH7707 if you have a 60 Mhz !! 1681 Choose this option if you want to enable the Enhanced Virtual
>> 1682 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1683 One of its primary benefits is an increase in the maximum size
>> 1684 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1685
>> 1686 config CPU_MIPS32_R5_FEATURES
>> 1687 bool "MIPS32 Release 5 Features"
>> 1688 depends on SYS_HAS_CPU_MIPS32_R5
>> 1689 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
>> 1690 help
>> 1691 Choose this option to build a kernel for release 2 or later of the
>> 1692 MIPS32 architecture including features from release 5 such as
>> 1693 support for Extended Physical Addressing (XPA).
>> 1694
>> 1695 config CPU_MIPS32_R5_XPA
>> 1696 bool "Extended Physical Addressing (XPA)"
>> 1697 depends on CPU_MIPS32_R5_FEATURES
>> 1698 depends on !EVA
>> 1699 depends on !PAGE_SIZE_4KB
>> 1700 depends on SYS_SUPPORTS_HIGHMEM
>> 1701 select XPA
>> 1702 select HIGHMEM
>> 1703 select PHYS_ADDR_T_64BIT
>> 1704 default n
>> 1705 help
>> 1706 Choose this option if you want to enable the Extended Physical
>> 1707 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1708 benefit is to increase physical addressing equal to or greater
>> 1709 than 40 bits. Note that this has the side effect of turning on
>> 1710 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1711 If unsure, say 'N' here.
>> 1712
>> 1713 if CPU_LOONGSON2F
>> 1714 config CPU_NOP_WORKAROUNDS
>> 1715 bool
>> 1716
>> 1717 config CPU_JUMP_WORKAROUNDS
>> 1718 bool
302 1719
303 config CPU_SUBTYPE_SH7708 !! 1720 config CPU_LOONGSON2F_WORKAROUNDS
304 bool "Support SH7708 processor" !! 1721 bool "Loongson 2F Workarounds"
305 select CPU_SH3 !! 1722 default y
>> 1723 select CPU_NOP_WORKAROUNDS
>> 1724 select CPU_JUMP_WORKAROUNDS
306 help 1725 help
307 Select SH7708 if you have a 60 Mhz !! 1726 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
308 if you have a 100 Mhz SH-3 HD6417708 !! 1727 require workarounds. Without workarounds the system may hang
>> 1728 unexpectedly. For more information please refer to the gas
>> 1729 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1730
>> 1731 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1732 are needed. The workarounds have no significant side effect on them
>> 1733 but may decrease the performance of the system so this option should
>> 1734 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1735 systems.
>> 1736
>> 1737 If unsure, please say Y.
>> 1738 endif # CPU_LOONGSON2F
>> 1739
>> 1740 config SYS_SUPPORTS_ZBOOT
>> 1741 bool
>> 1742 select HAVE_KERNEL_GZIP
>> 1743 select HAVE_KERNEL_BZIP2
>> 1744 select HAVE_KERNEL_LZ4
>> 1745 select HAVE_KERNEL_LZMA
>> 1746 select HAVE_KERNEL_LZO
>> 1747 select HAVE_KERNEL_XZ
>> 1748 select HAVE_KERNEL_ZSTD
>> 1749
>> 1750 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1751 bool
>> 1752 select SYS_SUPPORTS_ZBOOT
>> 1753
>> 1754 config SYS_SUPPORTS_ZBOOT_UART_PROM
>> 1755 bool
>> 1756 select SYS_SUPPORTS_ZBOOT
>> 1757
>> 1758 config CPU_LOONGSON2EF
>> 1759 bool
>> 1760 select CPU_SUPPORTS_32BIT_KERNEL
>> 1761 select CPU_SUPPORTS_64BIT_KERNEL
>> 1762 select CPU_SUPPORTS_HIGHMEM
>> 1763 select CPU_SUPPORTS_HUGEPAGES
>> 1764
>> 1765 config CPU_LOONGSON32
>> 1766 bool
>> 1767 select CPU_MIPS32
>> 1768 select CPU_MIPSR2
>> 1769 select CPU_HAS_PREFETCH
>> 1770 select CPU_SUPPORTS_32BIT_KERNEL
>> 1771 select CPU_SUPPORTS_HIGHMEM
>> 1772 select CPU_SUPPORTS_CPUFREQ
>> 1773
>> 1774 config CPU_BMIPS32_3300
>> 1775 select SMP_UP if SMP
>> 1776 bool
>> 1777
>> 1778 config CPU_BMIPS4350
>> 1779 bool
>> 1780 select SYS_SUPPORTS_SMP
>> 1781 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1782
>> 1783 config CPU_BMIPS4380
>> 1784 bool
>> 1785 select MIPS_L1_CACHE_SHIFT_6
>> 1786 select SYS_SUPPORTS_SMP
>> 1787 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1788 select CPU_HAS_RIXI
>> 1789
>> 1790 config CPU_BMIPS5000
>> 1791 bool
>> 1792 select MIPS_CPU_SCACHE
>> 1793 select MIPS_L1_CACHE_SHIFT_7
>> 1794 select SYS_SUPPORTS_SMP
>> 1795 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1796 select CPU_HAS_RIXI
>> 1797
>> 1798 config SYS_HAS_CPU_LOONGSON64
>> 1799 bool
>> 1800 select CPU_SUPPORTS_CPUFREQ
>> 1801 select CPU_HAS_RIXI
>> 1802
>> 1803 config SYS_HAS_CPU_LOONGSON2E
>> 1804 bool
>> 1805
>> 1806 config SYS_HAS_CPU_LOONGSON2F
>> 1807 bool
>> 1808 select CPU_SUPPORTS_CPUFREQ
>> 1809 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1810
>> 1811 config SYS_HAS_CPU_LOONGSON1B
>> 1812 bool
>> 1813
>> 1814 config SYS_HAS_CPU_LOONGSON1C
>> 1815 bool
309 1816
310 config CPU_SUBTYPE_SH7709 !! 1817 config SYS_HAS_CPU_MIPS32_R1
311 bool "Support SH7709 processor" !! 1818 bool
312 select CPU_SH3 !! 1819
>> 1820 config SYS_HAS_CPU_MIPS32_R2
>> 1821 bool
>> 1822
>> 1823 config SYS_HAS_CPU_MIPS32_R3_5
>> 1824 bool
>> 1825
>> 1826 config SYS_HAS_CPU_MIPS32_R5
>> 1827 bool
>> 1828
>> 1829 config SYS_HAS_CPU_MIPS32_R6
>> 1830 bool
>> 1831
>> 1832 config SYS_HAS_CPU_MIPS64_R1
>> 1833 bool
>> 1834
>> 1835 config SYS_HAS_CPU_MIPS64_R2
>> 1836 bool
>> 1837
>> 1838 config SYS_HAS_CPU_MIPS64_R5
>> 1839 bool
>> 1840
>> 1841 config SYS_HAS_CPU_MIPS64_R6
>> 1842 bool
>> 1843
>> 1844 config SYS_HAS_CPU_P5600
>> 1845 bool
>> 1846
>> 1847 config SYS_HAS_CPU_R3000
>> 1848 bool
>> 1849
>> 1850 config SYS_HAS_CPU_R4300
>> 1851 bool
>> 1852
>> 1853 config SYS_HAS_CPU_R4X00
>> 1854 bool
>> 1855
>> 1856 config SYS_HAS_CPU_TX49XX
>> 1857 bool
>> 1858
>> 1859 config SYS_HAS_CPU_R5000
>> 1860 bool
>> 1861
>> 1862 config SYS_HAS_CPU_R5500
>> 1863 bool
>> 1864
>> 1865 config SYS_HAS_CPU_NEVADA
>> 1866 bool
>> 1867
>> 1868 config SYS_HAS_CPU_R10000
>> 1869 bool
>> 1870
>> 1871 config SYS_HAS_CPU_RM7000
>> 1872 bool
>> 1873
>> 1874 config SYS_HAS_CPU_SB1
>> 1875 bool
>> 1876
>> 1877 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1878 bool
>> 1879
>> 1880 config SYS_HAS_CPU_BMIPS
>> 1881 bool
>> 1882
>> 1883 config SYS_HAS_CPU_BMIPS32_3300
>> 1884 bool
>> 1885 select SYS_HAS_CPU_BMIPS
>> 1886
>> 1887 config SYS_HAS_CPU_BMIPS4350
>> 1888 bool
>> 1889 select SYS_HAS_CPU_BMIPS
>> 1890
>> 1891 config SYS_HAS_CPU_BMIPS4380
>> 1892 bool
>> 1893 select SYS_HAS_CPU_BMIPS
>> 1894
>> 1895 config SYS_HAS_CPU_BMIPS5000
>> 1896 bool
>> 1897 select SYS_HAS_CPU_BMIPS
>> 1898
>> 1899 #
>> 1900 # CPU may reorder R->R, R->W, W->R, W->W
>> 1901 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 1902 #
>> 1903 config WEAK_ORDERING
>> 1904 bool
>> 1905
>> 1906 #
>> 1907 # CPU may reorder reads and writes beyond LL/SC
>> 1908 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 1909 #
>> 1910 config WEAK_REORDERING_BEYOND_LLSC
>> 1911 bool
>> 1912 endmenu
>> 1913
>> 1914 #
>> 1915 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 1916 #
>> 1917 config CPU_MIPS32
>> 1918 bool
>> 1919 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
>> 1920 CPU_MIPS32_R6 || CPU_P5600
>> 1921
>> 1922 config CPU_MIPS64
>> 1923 bool
>> 1924 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
>> 1925 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
>> 1926
>> 1927 #
>> 1928 # These indicate the revision of the architecture
>> 1929 #
>> 1930 config CPU_MIPSR1
>> 1931 bool
>> 1932 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 1933
>> 1934 config CPU_MIPSR2
>> 1935 bool
>> 1936 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 1937 select CPU_HAS_RIXI
>> 1938 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1939 select MIPS_SPRAM
>> 1940
>> 1941 config CPU_MIPSR5
>> 1942 bool
>> 1943 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
>> 1944 select CPU_HAS_RIXI
>> 1945 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1946 select MIPS_SPRAM
>> 1947
>> 1948 config CPU_MIPSR6
>> 1949 bool
>> 1950 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 1951 select CPU_HAS_RIXI
>> 1952 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1953 select HAVE_ARCH_BITREVERSE
>> 1954 select MIPS_ASID_BITS_VARIABLE
>> 1955 select MIPS_CRC_SUPPORT
>> 1956 select MIPS_SPRAM
>> 1957
>> 1958 config TARGET_ISA_REV
>> 1959 int
>> 1960 default 1 if CPU_MIPSR1
>> 1961 default 2 if CPU_MIPSR2
>> 1962 default 5 if CPU_MIPSR5
>> 1963 default 6 if CPU_MIPSR6
>> 1964 default 0
313 help 1965 help
314 Select SH7709 if you have a 80 Mhz !! 1966 Reflects the ISA revision being targeted by the kernel build. This
>> 1967 is effectively the Kconfig equivalent of MIPS_ISA_REV.
315 1968
316 config CPU_SUBTYPE_SH7710 !! 1969 config EVA
317 bool "Support SH7710 processor" !! 1970 bool
318 select CPU_SH3 !! 1971
319 select CPU_HAS_DSP !! 1972 config XPA
>> 1973 bool
>> 1974
>> 1975 config SYS_SUPPORTS_32BIT_KERNEL
>> 1976 bool
>> 1977 config SYS_SUPPORTS_64BIT_KERNEL
>> 1978 bool
>> 1979 config CPU_SUPPORTS_32BIT_KERNEL
>> 1980 bool
>> 1981 config CPU_SUPPORTS_64BIT_KERNEL
>> 1982 bool
>> 1983 config CPU_SUPPORTS_CPUFREQ
>> 1984 bool
>> 1985 config CPU_SUPPORTS_ADDRWINCFG
>> 1986 bool
>> 1987 config CPU_SUPPORTS_HUGEPAGES
>> 1988 bool
>> 1989 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
>> 1990 config MIPS_PGD_C0_CONTEXT
>> 1991 bool
>> 1992 depends on 64BIT
>> 1993 default y if (CPU_MIPSR2 || CPU_MIPSR6)
>> 1994
>> 1995 #
>> 1996 # Set to y for ptrace access to watch registers.
>> 1997 #
>> 1998 config HARDWARE_WATCHPOINTS
>> 1999 bool
>> 2000 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2001
>> 2002 menu "Kernel type"
>> 2003
>> 2004 choice
>> 2005 prompt "Kernel code model"
320 help 2006 help
321 Select SH7710 if you have a SH3-DSP !! 2007 You should only select this option if you have a workload that
>> 2008 actually benefits from 64-bit processing or if your machine has
>> 2009 large memory. You will only be presented a single option in this
>> 2010 menu if your system does not support both 32-bit and 64-bit kernels.
322 2011
323 config CPU_SUBTYPE_SH7712 !! 2012 config 32BIT
324 bool "Support SH7712 processor" !! 2013 bool "32-bit kernel"
325 select CPU_SH3 !! 2014 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
326 select CPU_HAS_DSP !! 2015 select TRAD_SIGNALS
327 help 2016 help
328 Select SH7712 if you have a SH3-DSP !! 2017 Select this option if you want to build a 32-bit kernel.
329 2018
330 config CPU_SUBTYPE_SH7720 !! 2019 config 64BIT
331 bool "Support SH7720 processor" !! 2020 bool "64-bit kernel"
332 select CPU_SH3 !! 2021 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
333 select CPU_HAS_DSP <<
334 select SYS_SUPPORTS_SH_CMT <<
335 select USB_OHCI_SH if USB_OHCI_HCD <<
336 select PINCTRL <<
337 help 2022 help
338 Select SH7720 if you have a SH3-DSP !! 2023 Select this option if you want to build a 64-bit kernel.
>> 2024
>> 2025 endchoice
339 2026
340 config CPU_SUBTYPE_SH7721 !! 2027 config MIPS_VA_BITS_48
341 bool "Support SH7721 processor" !! 2028 bool "48 bits virtual memory"
342 select CPU_SH3 !! 2029 depends on 64BIT
343 select CPU_HAS_DSP !! 2030 help
344 select SYS_SUPPORTS_SH_CMT !! 2031 Support a maximum at least 48 bits of application virtual
345 select USB_OHCI_SH if USB_OHCI_HCD !! 2032 memory. Default is 40 bits or less, depending on the CPU.
>> 2033 For page sizes 16k and above, this option results in a small
>> 2034 memory overhead for page tables. For 4k page size, a fourth
>> 2035 level of page tables is added which imposes both a memory
>> 2036 overhead as well as slower TLB fault handling.
>> 2037
>> 2038 If unsure, say N.
>> 2039
>> 2040 config ZBOOT_LOAD_ADDRESS
>> 2041 hex "Compressed kernel load address"
>> 2042 default 0xffffffff80400000 if BCM47XX
>> 2043 default 0x0
>> 2044 depends on SYS_SUPPORTS_ZBOOT
346 help 2045 help
347 Select SH7721 if you have a SH3-DSP !! 2046 The address to load compressed kernel, aka vmlinuz.
>> 2047
>> 2048 This is only used if non-zero.
348 2049
349 # SH-4 Processor Support !! 2050 choice
>> 2051 prompt "Kernel page size"
>> 2052 default PAGE_SIZE_4KB
350 2053
351 config CPU_SUBTYPE_SH7750 !! 2054 config PAGE_SIZE_4KB
352 bool "Support SH7750 processor" !! 2055 bool "4kB"
353 select CPU_SH4 !! 2056 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
>> 2057 help
>> 2058 This option select the standard 4kB Linux page size. On some
>> 2059 R3000-family processors this is the only available page size. Using
>> 2060 4kB page size will minimize memory consumption and is therefore
>> 2061 recommended for low memory systems.
>> 2062
>> 2063 config PAGE_SIZE_8KB
>> 2064 bool "8kB"
>> 2065 depends on CPU_CAVIUM_OCTEON
>> 2066 depends on !MIPS_VA_BITS_48
>> 2067 help
>> 2068 Using 8kB page size will result in higher performance kernel at
>> 2069 the price of higher memory consumption. This option is available
>> 2070 only on cnMIPS processors. Note that you will need a suitable Linux
>> 2071 distribution to support this.
>> 2072
>> 2073 config PAGE_SIZE_16KB
>> 2074 bool "16kB"
>> 2075 depends on !CPU_R3000
>> 2076 help
>> 2077 Using 16kB page size will result in higher performance kernel at
>> 2078 the price of higher memory consumption. This option is available on
>> 2079 all non-R3000 family processors. Note that you will need a suitable
>> 2080 Linux distribution to support this.
>> 2081
>> 2082 config PAGE_SIZE_32KB
>> 2083 bool "32kB"
>> 2084 depends on CPU_CAVIUM_OCTEON
>> 2085 depends on !MIPS_VA_BITS_48
>> 2086 help
>> 2087 Using 32kB page size will result in higher performance kernel at
>> 2088 the price of higher memory consumption. This option is available
>> 2089 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2090 distribution to support this.
>> 2091
>> 2092 config PAGE_SIZE_64KB
>> 2093 bool "64kB"
>> 2094 depends on !CPU_R3000
>> 2095 help
>> 2096 Using 64kB page size will result in higher performance kernel at
>> 2097 the price of higher memory consumption. This option is available on
>> 2098 all non-R3000 family processor. Not that at the time of this
>> 2099 writing this option is still high experimental.
>> 2100
>> 2101 endchoice
>> 2102
>> 2103 config ARCH_FORCE_MAX_ORDER
>> 2104 int "Maximum zone order"
>> 2105 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2106 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2107 default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2108 default "10"
>> 2109 help
>> 2110 The kernel memory allocator divides physically contiguous memory
>> 2111 blocks into "zones", where each zone is a power of two number of
>> 2112 pages. This option selects the largest power of two that the kernel
>> 2113 keeps in the memory allocator. If you need to allocate very large
>> 2114 blocks of physically contiguous memory, then you may need to
>> 2115 increase this value.
>> 2116
>> 2117 The page size is not necessarily 4KB. Keep this in mind
>> 2118 when choosing a value for this option.
>> 2119
>> 2120 config BOARD_SCACHE
>> 2121 bool
>> 2122
>> 2123 config IP22_CPU_SCACHE
>> 2124 bool
>> 2125 select BOARD_SCACHE
>> 2126
>> 2127 #
>> 2128 # Support for a MIPS32 / MIPS64 style S-caches
>> 2129 #
>> 2130 config MIPS_CPU_SCACHE
>> 2131 bool
>> 2132 select BOARD_SCACHE
>> 2133
>> 2134 config R5000_CPU_SCACHE
>> 2135 bool
>> 2136 select BOARD_SCACHE
>> 2137
>> 2138 config RM7000_CPU_SCACHE
>> 2139 bool
>> 2140 select BOARD_SCACHE
>> 2141
>> 2142 config SIBYTE_DMA_PAGEOPS
>> 2143 bool "Use DMA to clear/copy pages"
>> 2144 depends on CPU_SB1
354 help 2145 help
355 Select SH7750 if you have a 200 Mhz !! 2146 Instead of using the CPU to zero and copy pages, use a Data Mover
>> 2147 channel. These DMA channels are otherwise unused by the standard
>> 2148 SiByte Linux port. Seems to give a small performance benefit.
356 2149
357 config CPU_SUBTYPE_SH7091 !! 2150 config CPU_HAS_PREFETCH
358 bool "Support SH7091 processor" !! 2151 bool
359 select CPU_SH4 !! 2152
>> 2153 config CPU_GENERIC_DUMP_TLB
>> 2154 bool
>> 2155 default y if !CPU_R3000
>> 2156
>> 2157 config MIPS_FP_SUPPORT
>> 2158 bool "Floating Point support" if EXPERT
>> 2159 default y
360 help 2160 help
361 Select SH7091 if you have an SH-4 ba !! 2161 Select y to include support for floating point in the kernel
362 the Dreamcast, Naomi, and Naomi 2). !! 2162 including initialization of FPU hardware, FP context save & restore
>> 2163 and emulation of an FPU where necessary. Without this support any
>> 2164 userland program attempting to use floating point instructions will
>> 2165 receive a SIGILL.
363 2166
364 config CPU_SUBTYPE_SH7750R !! 2167 If you know that your userland will not attempt to use floating point
365 bool "Support SH7750R processor" !! 2168 instructions then you can say n here to shrink the kernel a little.
366 select CPU_SH4 <<
367 2169
368 config CPU_SUBTYPE_SH7750S !! 2170 If unsure, say y.
369 bool "Support SH7750S processor" <<
370 select CPU_SH4 <<
371 2171
372 config CPU_SUBTYPE_SH7751 !! 2172 config CPU_R2300_FPU
373 bool "Support SH7751 processor" !! 2173 bool
374 select CPU_SH4 !! 2174 depends on MIPS_FP_SUPPORT
>> 2175 default y if CPU_R3000
>> 2176
>> 2177 config CPU_R3K_TLB
>> 2178 bool
>> 2179
>> 2180 config CPU_R4K_FPU
>> 2181 bool
>> 2182 depends on MIPS_FP_SUPPORT
>> 2183 default y if !CPU_R2300_FPU
>> 2184
>> 2185 config CPU_R4K_CACHE_TLB
>> 2186 bool
>> 2187 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
>> 2188
>> 2189 config MIPS_MT_SMP
>> 2190 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2191 default y
>> 2192 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2193 select CPU_MIPSR2_IRQ_VI
>> 2194 select CPU_MIPSR2_IRQ_EI
>> 2195 select SYNC_R4K
>> 2196 select MIPS_MT
>> 2197 select SMP
>> 2198 select SMP_UP
>> 2199 select SYS_SUPPORTS_SMP
>> 2200 select SYS_SUPPORTS_SCHED_SMT
>> 2201 select MIPS_PERF_SHARED_TC_COUNTERS
375 help 2202 help
376 Select SH7751 if you have a 166 Mhz !! 2203 This is a kernel model which is known as SMVP. This is supported
377 or if you have a HD6417751R CPU. !! 2204 on cores with the MT ASE and uses the available VPEs to implement
>> 2205 virtual processors which supports SMP. This is equivalent to the
>> 2206 Intel Hyperthreading feature. For further information go to
>> 2207 <http://www.imgtec.com/mips/mips-multithreading.asp>.
378 2208
379 config CPU_SUBTYPE_SH7751R !! 2209 config MIPS_MT
380 bool "Support SH7751R processor" !! 2210 bool
381 select CPU_SH4 <<
382 2211
383 config CPU_SUBTYPE_SH7760 !! 2212 config SCHED_SMT
384 bool "Support SH7760 processor" !! 2213 bool "SMT (multithreading) scheduler support"
385 select CPU_SH4 !! 2214 depends on SYS_SUPPORTS_SCHED_SMT
>> 2215 default n
>> 2216 help
>> 2217 SMT scheduler support improves the CPU scheduler's decision making
>> 2218 when dealing with MIPS MT enabled cores at a cost of slightly
>> 2219 increased overhead in some places. If unsure say N here.
386 2220
387 # SH-4A Processor Support !! 2221 config SYS_SUPPORTS_SCHED_SMT
>> 2222 bool
388 2223
389 config CPU_SUBTYPE_SH7723 !! 2224 config SYS_SUPPORTS_MULTITHREADING
390 bool "Support SH7723 processor" !! 2225 bool
391 select CPU_SH4A !! 2226
392 select CPU_SHX2 !! 2227 config MIPS_MT_FPAFF
393 select ARCH_SHMOBILE !! 2228 bool "Dynamic FPU affinity for FP-intensive threads"
394 select ARCH_SPARSEMEM_ENABLE !! 2229 default y
395 select SYS_SUPPORTS_SH_CMT !! 2230 depends on MIPS_MT_SMP
396 select PINCTRL !! 2231
>> 2232 config MIPSR2_TO_R6_EMULATOR
>> 2233 bool "MIPS R2-to-R6 emulator"
>> 2234 depends on CPU_MIPSR6
>> 2235 depends on MIPS_FP_SUPPORT
>> 2236 default y
397 help 2237 help
398 Select SH7723 if you have an SH-Mobi !! 2238 Choose this option if you want to run non-R6 MIPS userland code.
>> 2239 Even if you say 'Y' here, the emulator will still be disabled by
>> 2240 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2241 The only reason this is a build-time option is to save ~14K from the
>> 2242 final kernel image.
399 2243
400 config CPU_SUBTYPE_SH7724 !! 2244 config SYS_SUPPORTS_VPE_LOADER
401 bool "Support SH7724 processor" !! 2245 bool
402 select CPU_SH4A !! 2246 depends on SYS_SUPPORTS_MULTITHREADING
403 select CPU_SHX2 <<
404 select ARCH_SHMOBILE <<
405 select ARCH_SPARSEMEM_ENABLE <<
406 select SYS_SUPPORTS_SH_CMT <<
407 select PINCTRL <<
408 help 2247 help
409 Select SH7724 if you have an SH-Mobi !! 2248 Indicates that the platform supports the VPE loader, and provides
>> 2249 physical_memsize.
410 2250
411 config CPU_SUBTYPE_SH7734 !! 2251 config MIPS_VPE_LOADER
412 bool "Support SH7734 processor" !! 2252 bool "VPE loader support."
413 select CPU_SH4A !! 2253 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
414 select CPU_SHX2 !! 2254 select CPU_MIPSR2_IRQ_VI
415 select PINCTRL !! 2255 select CPU_MIPSR2_IRQ_EI
>> 2256 select MIPS_MT
416 help 2257 help
417 Select SH7734 if you have a SH4A SH7 !! 2258 Includes a loader for loading an elf relocatable object
>> 2259 onto another VPE and running it.
418 2260
419 config CPU_SUBTYPE_SH7757 !! 2261 config MIPS_VPE_LOADER_MT
420 bool "Support SH7757 processor" !! 2262 bool
421 select CPU_SH4A !! 2263 default "y"
422 select CPU_SHX2 !! 2264 depends on MIPS_VPE_LOADER
423 select PINCTRL !! 2265
>> 2266 config MIPS_VPE_LOADER_TOM
>> 2267 bool "Load VPE program into memory hidden from linux"
>> 2268 depends on MIPS_VPE_LOADER
>> 2269 default y
424 help 2270 help
425 Select SH7757 if you have a SH4A SH7 !! 2271 The loader can use memory that is present but has been hidden from
>> 2272 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2273 you to ensure the amount you put in the option and the space your
>> 2274 program requires is less or equal to the amount physically present.
>> 2275
>> 2276 config MIPS_VPE_APSP_API
>> 2277 bool "Enable support for AP/SP API (RTLX)"
>> 2278 depends on MIPS_VPE_LOADER
426 2279
427 config CPU_SUBTYPE_SH7763 !! 2280 config MIPS_VPE_APSP_API_MT
428 bool "Support SH7763 processor" !! 2281 bool
429 select CPU_SH4A !! 2282 default "y"
430 select USB_OHCI_SH if USB_OHCI_HCD !! 2283 depends on MIPS_VPE_APSP_API
431 help <<
432 Select SH7763 if you have a SH4A SH7 <<
433 <<
434 config CPU_SUBTYPE_SH7770 <<
435 bool "Support SH7770 processor" <<
436 select CPU_SH4A <<
437 <<
438 config CPU_SUBTYPE_SH7780 <<
439 bool "Support SH7780 processor" <<
440 select CPU_SH4A <<
441 <<
442 config CPU_SUBTYPE_SH7785 <<
443 bool "Support SH7785 processor" <<
444 select CPU_SH4A <<
445 select CPU_SHX2 <<
446 select ARCH_SPARSEMEM_ENABLE <<
447 select SYS_SUPPORTS_NUMA <<
448 select PINCTRL <<
449 2284
450 config CPU_SUBTYPE_SH7786 !! 2285 config MIPS_CPS
451 bool "Support SH7786 processor" !! 2286 bool "MIPS Coherent Processing System support"
452 select CPU_SH4A !! 2287 depends on SYS_SUPPORTS_MIPS_CPS
453 select CPU_SHX3 !! 2288 select MIPS_CM
454 select CPU_HAS_PTEAEX !! 2289 select MIPS_CPS_PM if HOTPLUG_CPU
455 select GENERIC_CLOCKEVENTS_BROADCAST i !! 2290 select SMP
456 select USB_OHCI_SH if USB_OHCI_HCD !! 2291 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
457 select USB_EHCI_SH if USB_EHCI_HCD !! 2292 select SYS_SUPPORTS_HOTPLUG_CPU
458 select PINCTRL !! 2293 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2294 select SYS_SUPPORTS_SMP
>> 2295 select WEAK_ORDERING
>> 2296 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
>> 2297 help
>> 2298 Select this if you wish to run an SMP kernel across multiple cores
>> 2299 within a MIPS Coherent Processing System. When this option is
>> 2300 enabled the kernel will probe for other cores and boot them with
>> 2301 no external assistance. It is safe to enable this when hardware
>> 2302 support is unavailable.
459 2303
460 config CPU_SUBTYPE_SHX3 !! 2304 config MIPS_CPS_PM
461 bool "Support SH-X3 processor" !! 2305 depends on MIPS_CPS
462 select CPU_SH4A !! 2306 bool
463 select CPU_SHX3 <<
464 select GENERIC_CLOCKEVENTS_BROADCAST i <<
465 select GPIOLIB <<
466 select PINCTRL <<
467 2307
468 # SH4AL-DSP Processor Support !! 2308 config MIPS_CM
>> 2309 bool
>> 2310 select MIPS_CPC
469 2311
470 config CPU_SUBTYPE_SH7343 !! 2312 config MIPS_CPC
471 bool "Support SH7343 processor" !! 2313 bool
472 select CPU_SH4AL_DSP <<
473 select ARCH_SHMOBILE <<
474 select SYS_SUPPORTS_SH_CMT <<
475 <<
476 config CPU_SUBTYPE_SH7722 <<
477 bool "Support SH7722 processor" <<
478 select CPU_SH4AL_DSP <<
479 select CPU_SHX2 <<
480 select ARCH_SHMOBILE <<
481 select ARCH_SPARSEMEM_ENABLE <<
482 select SYS_SUPPORTS_NUMA <<
483 select SYS_SUPPORTS_SH_CMT <<
484 select PINCTRL <<
485 2314
486 config CPU_SUBTYPE_SH7366 !! 2315 config SB1_PASS_2_WORKAROUNDS
487 bool "Support SH7366 processor" !! 2316 bool
488 select CPU_SH4AL_DSP !! 2317 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
489 select CPU_SHX2 !! 2318 default y
490 select ARCH_SHMOBILE !! 2319
491 select ARCH_SPARSEMEM_ENABLE !! 2320 config SB1_PASS_2_1_WORKAROUNDS
492 select SYS_SUPPORTS_NUMA !! 2321 bool
493 select SYS_SUPPORTS_SH_CMT !! 2322 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2323 default y
>> 2324
>> 2325 choice
>> 2326 prompt "SmartMIPS or microMIPS ASE support"
>> 2327
>> 2328 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2329 bool "None"
>> 2330 help
>> 2331 Select this if you want neither microMIPS nor SmartMIPS support
>> 2332
>> 2333 config CPU_HAS_SMARTMIPS
>> 2334 depends on SYS_SUPPORTS_SMARTMIPS
>> 2335 bool "SmartMIPS"
>> 2336 help
>> 2337 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2338 increased security at both hardware and software level for
>> 2339 smartcards. Enabling this option will allow proper use of the
>> 2340 SmartMIPS instructions by Linux applications. However a kernel with
>> 2341 this option will not work on a MIPS core without SmartMIPS core. If
>> 2342 you don't know you probably don't have SmartMIPS and should say N
>> 2343 here.
>> 2344
>> 2345 config CPU_MICROMIPS
>> 2346 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2347 bool "microMIPS"
>> 2348 help
>> 2349 When this option is enabled the kernel will be built using the
>> 2350 microMIPS ISA
494 2351
495 endchoice 2352 endchoice
496 2353
497 source "arch/sh/mm/Kconfig" !! 2354 config CPU_HAS_MSA
498 !! 2355 bool "Support for the MIPS SIMD Architecture"
499 source "arch/sh/Kconfig.cpu" !! 2356 depends on CPU_SUPPORTS_MSA
500 !! 2357 depends on MIPS_FP_SUPPORT
501 source "arch/sh/boards/Kconfig" !! 2358 depends on 64BIT || MIPS_O32_FP64_SUPPORT
502 !! 2359 help
503 menu "Timer and clock configuration" !! 2360 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
504 !! 2361 and a set of SIMD instructions to operate on them. When this option
505 config SH_PCLK_FREQ !! 2362 is enabled the kernel will support allocating & switching MSA
506 int "Peripheral clock frequency (in Hz !! 2363 vector register contexts. If you know that your kernel will only be
507 depends on SH_CLK_CPG_LEGACY !! 2364 running on CPUs which do not support MSA or that your userland will
508 default "31250000" if CPU_SUBTYPE_SH76 !! 2365 not be making use of it then you may wish to say N here to reduce
509 default "33333333" if CPU_SUBTYPE_SH77 !! 2366 the size & complexity of your kernel.
510 CPU_SUBTYPE_SH77 <<
511 CPU_SUBTYPE_SH77 <<
512 CPU_SUBTYPE_SH72 <<
513 CPU_SUBTYPE_SH72 <<
514 CPU_SUBTYPE_SH72 <<
515 CPU_SUBTYPE_MXG <<
516 default "60000000" if CPU_SUBTYPE_SH77 <<
517 default "50000000" <<
518 help <<
519 This option is used to specify the p <<
520 This is necessary for determining th <<
521 platforms lacking an RTC. <<
522 2367
523 config SH_CLK_CPG !! 2368 If unsure, say Y.
524 def_bool y <<
525 2369
526 config SH_CLK_CPG_LEGACY !! 2370 config CPU_HAS_WB
527 depends on SH_CLK_CPG !! 2371 bool
528 def_bool y if !CPU_SUBTYPE_SH7785 && ! <<
529 !CPU_SHX3 && !CPU_SUBTYP <<
530 !CPU_SUBTYPE_SH7734 && ! <<
531 !CPU_SUBTYPE_SH7269 <<
532 2372
533 endmenu !! 2373 config XKS01
>> 2374 bool
534 2375
535 menu "CPU Frequency scaling" !! 2376 config CPU_HAS_DIEI
536 source "drivers/cpufreq/Kconfig" !! 2377 depends on !CPU_DIEI_BROKEN
537 endmenu !! 2378 bool
538 2379
539 source "arch/sh/drivers/Kconfig" !! 2380 config CPU_DIEI_BROKEN
>> 2381 bool
540 2382
541 endmenu !! 2383 config CPU_HAS_RIXI
>> 2384 bool
>> 2385
>> 2386 config CPU_NO_LOAD_STORE_LR
>> 2387 bool
>> 2388 help
>> 2389 CPU lacks support for unaligned load and store instructions:
>> 2390 LWL, LWR, SWL, SWR (Load/store word left/right).
>> 2391 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
>> 2392 systems).
>> 2393
>> 2394 #
>> 2395 # Vectored interrupt mode is an R2 feature
>> 2396 #
>> 2397 config CPU_MIPSR2_IRQ_VI
>> 2398 bool
>> 2399
>> 2400 #
>> 2401 # Extended interrupt mode is an R2 feature
>> 2402 #
>> 2403 config CPU_MIPSR2_IRQ_EI
>> 2404 bool
>> 2405
>> 2406 config CPU_HAS_SYNC
>> 2407 bool
>> 2408 depends on !CPU_R3000
>> 2409 default y
>> 2410
>> 2411 #
>> 2412 # CPU non-features
>> 2413 #
>> 2414
>> 2415 # Work around the "daddi" and "daddiu" CPU errata:
>> 2416 #
>> 2417 # - The `daddi' instruction fails to trap on overflow.
>> 2418 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2419 # erratum #23
>> 2420 #
>> 2421 # - The `daddiu' instruction can produce an incorrect result.
>> 2422 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2423 # erratum #41
>> 2424 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
>> 2425 # #15
>> 2426 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
>> 2427 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
>> 2428 config CPU_DADDI_WORKAROUNDS
>> 2429 bool
>> 2430
>> 2431 # Work around certain R4000 CPU errata (as implemented by GCC):
>> 2432 #
>> 2433 # - A double-word or a variable shift may give an incorrect result
>> 2434 # if executed immediately after starting an integer division:
>> 2435 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2436 # erratum #28
>> 2437 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
>> 2438 # #19
>> 2439 #
>> 2440 # - A double-word or a variable shift may give an incorrect result
>> 2441 # if executed while an integer multiplication is in progress:
>> 2442 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2443 # errata #16 & #28
>> 2444 #
>> 2445 # - An integer division may give an incorrect result if started in
>> 2446 # a delay slot of a taken branch or a jump:
>> 2447 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2448 # erratum #52
>> 2449 config CPU_R4000_WORKAROUNDS
>> 2450 bool
>> 2451 select CPU_R4400_WORKAROUNDS
>> 2452
>> 2453 # Work around certain R4400 CPU errata (as implemented by GCC):
>> 2454 #
>> 2455 # - A double-word or a variable shift may give an incorrect result
>> 2456 # if executed immediately after starting an integer division:
>> 2457 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
>> 2458 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
>> 2459 config CPU_R4400_WORKAROUNDS
>> 2460 bool
>> 2461
>> 2462 config CPU_R4X00_BUGS64
>> 2463 bool
>> 2464 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
>> 2465
>> 2466 config MIPS_ASID_SHIFT
>> 2467 int
>> 2468 default 6 if CPU_R3000
>> 2469 default 0
>> 2470
>> 2471 config MIPS_ASID_BITS
>> 2472 int
>> 2473 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2474 default 6 if CPU_R3000
>> 2475 default 8
>> 2476
>> 2477 config MIPS_ASID_BITS_VARIABLE
>> 2478 bool
>> 2479
>> 2480 config MIPS_CRC_SUPPORT
>> 2481 bool
>> 2482
>> 2483 # R4600 erratum. Due to the lack of errata information the exact
>> 2484 # technical details aren't known. I've experimentally found that disabling
>> 2485 # interrupts during indexed I-cache flushes seems to be sufficient to deal
>> 2486 # with the issue.
>> 2487 config WAR_R4600_V1_INDEX_ICACHEOP
>> 2488 bool
>> 2489
>> 2490 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
>> 2491 #
>> 2492 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
>> 2493 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
>> 2494 # executed if there is no other dcache activity. If the dcache is
>> 2495 # accessed for another instruction immediately preceding when these
>> 2496 # cache instructions are executing, it is possible that the dcache
>> 2497 # tag match outputs used by these cache instructions will be
>> 2498 # incorrect. These cache instructions should be preceded by at least
>> 2499 # four instructions that are not any kind of load or store
>> 2500 # instruction.
>> 2501 #
>> 2502 # This is not allowed: lw
>> 2503 # nop
>> 2504 # nop
>> 2505 # nop
>> 2506 # cache Hit_Writeback_Invalidate_D
>> 2507 #
>> 2508 # This is allowed: lw
>> 2509 # nop
>> 2510 # nop
>> 2511 # nop
>> 2512 # nop
>> 2513 # cache Hit_Writeback_Invalidate_D
>> 2514 config WAR_R4600_V1_HIT_CACHEOP
>> 2515 bool
>> 2516
>> 2517 # Writeback and invalidate the primary cache dcache before DMA.
>> 2518 #
>> 2519 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
>> 2520 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
>> 2521 # operate correctly if the internal data cache refill buffer is empty. These
>> 2522 # CACHE instructions should be separated from any potential data cache miss
>> 2523 # by a load instruction to an uncached address to empty the response buffer."
>> 2524 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
>> 2525 # in .pdf format.)
>> 2526 config WAR_R4600_V2_HIT_CACHEOP
>> 2527 bool
>> 2528
>> 2529 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
>> 2530 # the line which this instruction itself exists, the following
>> 2531 # operation is not guaranteed."
>> 2532 #
>> 2533 # Workaround: do two phase flushing for Index_Invalidate_I
>> 2534 config WAR_TX49XX_ICACHE_INDEX_INV
>> 2535 bool
>> 2536
>> 2537 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
>> 2538 # opposes it being called that) where invalid instructions in the same
>> 2539 # I-cache line worth of instructions being fetched may case spurious
>> 2540 # exceptions.
>> 2541 config WAR_ICACHE_REFILLS
>> 2542 bool
>> 2543
>> 2544 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
>> 2545 # may cause ll / sc and lld / scd sequences to execute non-atomically.
>> 2546 config WAR_R10000_LLSC
>> 2547 bool
>> 2548
>> 2549 # 34K core erratum: "Problems Executing the TLBR Instruction"
>> 2550 config WAR_MIPS34K_MISSED_ITLB
>> 2551 bool
542 2552
543 menu "Kernel features" !! 2553 #
>> 2554 # - Highmem only makes sense for the 32-bit kernel.
>> 2555 # - The current highmem code will only work properly on physically indexed
>> 2556 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2557 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2558 # moment we protect the user and offer the highmem option only on machines
>> 2559 # where it's known to be safe. This will not offer highmem on a few systems
>> 2560 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2561 # indexed CPUs but we're playing safe.
>> 2562 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2563 # know they might have memory configurations that could make use of highmem
>> 2564 # support.
>> 2565 #
>> 2566 config HIGHMEM
>> 2567 bool "High Memory Support"
>> 2568 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2569 select KMAP_LOCAL
544 2570
545 source "kernel/Kconfig.hz" !! 2571 config CPU_SUPPORTS_HIGHMEM
>> 2572 bool
546 2573
547 config ARCH_SUPPORTS_KEXEC !! 2574 config SYS_SUPPORTS_HIGHMEM
548 def_bool MMU !! 2575 bool
549 2576
550 config ARCH_SUPPORTS_CRASH_DUMP !! 2577 config SYS_SUPPORTS_SMARTMIPS
551 def_bool BROKEN_ON_SMP !! 2578 bool
552 2579
553 config ARCH_SUPPORTS_KEXEC_JUMP !! 2580 config SYS_SUPPORTS_MICROMIPS
>> 2581 bool
>> 2582
>> 2583 config SYS_SUPPORTS_MIPS16
>> 2584 bool
>> 2585 help
>> 2586 This option must be set if a kernel might be executed on a MIPS16-
>> 2587 enabled CPU even if MIPS16 is not actually being used. In other
>> 2588 words, it makes the kernel MIPS16-tolerant.
>> 2589
>> 2590 config CPU_SUPPORTS_MSA
>> 2591 bool
>> 2592
>> 2593 config ARCH_FLATMEM_ENABLE
554 def_bool y 2594 def_bool y
>> 2595 depends on !NUMA && !CPU_LOONGSON2EF
555 2596
556 config PHYSICAL_START !! 2597 config ARCH_SPARSEMEM_ENABLE
557 hex "Physical address where the kernel !! 2598 bool
558 default MEMORY_START !! 2599
>> 2600 config NUMA
>> 2601 bool "NUMA Support"
>> 2602 depends on SYS_SUPPORTS_NUMA
>> 2603 select SMP
>> 2604 select HAVE_SETUP_PER_CPU_AREA
>> 2605 select NEED_PER_CPU_EMBED_FIRST_CHUNK
>> 2606 help
>> 2607 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2608 Access). This option improves performance on systems with more
>> 2609 than two nodes; on two node systems it is generally better to
>> 2610 leave it disabled; on single node systems leave this option
>> 2611 disabled.
>> 2612
>> 2613 config SYS_SUPPORTS_NUMA
>> 2614 bool
>> 2615
>> 2616 config HAVE_ARCH_NODEDATA_EXTENSION
>> 2617 bool
>> 2618
>> 2619 config RELOCATABLE
>> 2620 bool "Relocatable kernel"
>> 2621 depends on SYS_SUPPORTS_RELOCATABLE
>> 2622 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
>> 2623 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
>> 2624 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
>> 2625 CPU_P5600 || CAVIUM_OCTEON_SOC || \
>> 2626 CPU_LOONGSON64
>> 2627 help
>> 2628 This builds a kernel image that retains relocation information
>> 2629 so it can be loaded someplace besides the default 1MB.
>> 2630 The relocations make the kernel binary about 15% larger,
>> 2631 but are discarded at runtime
>> 2632
>> 2633 config RELOCATION_TABLE_SIZE
>> 2634 hex "Relocation table size"
>> 2635 depends on RELOCATABLE
>> 2636 range 0x0 0x01000000
>> 2637 default "0x00200000" if CPU_LOONGSON64
>> 2638 default "0x00100000"
>> 2639 help
>> 2640 A table of relocation data will be appended to the kernel binary
>> 2641 and parsed at boot to fix up the relocated kernel.
>> 2642
>> 2643 This option allows the amount of space reserved for the table to be
>> 2644 adjusted, although the default of 1Mb should be ok in most cases.
>> 2645
>> 2646 The build will fail and a valid size suggested if this is too small.
>> 2647
>> 2648 If unsure, leave at the default value.
>> 2649
>> 2650 config RANDOMIZE_BASE
>> 2651 bool "Randomize the address of the kernel image"
>> 2652 depends on RELOCATABLE
>> 2653 help
>> 2654 Randomizes the physical and virtual address at which the
>> 2655 kernel image is loaded, as a security feature that
>> 2656 deters exploit attempts relying on knowledge of the location
>> 2657 of kernel internals.
>> 2658
>> 2659 Entropy is generated using any coprocessor 0 registers available.
>> 2660
>> 2661 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2662
>> 2663 If unsure, say N.
>> 2664
>> 2665 config RANDOMIZE_BASE_MAX_OFFSET
>> 2666 hex "Maximum kASLR offset" if EXPERT
>> 2667 depends on RANDOMIZE_BASE
>> 2668 range 0x0 0x40000000 if EVA || 64BIT
>> 2669 range 0x0 0x08000000
>> 2670 default "0x01000000"
>> 2671 help
>> 2672 When kASLR is active, this provides the maximum offset that will
>> 2673 be applied to the kernel image. It should be set according to the
>> 2674 amount of physical RAM available in the target system minus
>> 2675 PHYSICAL_START and must be a power of 2.
>> 2676
>> 2677 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2678 EVA or 64-bit. The default is 16Mb.
>> 2679
>> 2680 config NODES_SHIFT
>> 2681 int
>> 2682 default "6"
>> 2683 depends on NUMA
>> 2684
>> 2685 config HW_PERF_EVENTS
>> 2686 bool "Enable hardware performance counter support for perf events"
>> 2687 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
>> 2688 default y
559 help 2689 help
560 This gives the physical address wher !! 2690 Enable hardware performance counter support for perf events. If
561 and is ordinarily the same as MEMORY !! 2691 disabled, perf events will use software events only.
562 2692
563 Different values are primarily used !! 2693 config DMI
564 where the fail safe kernel needs to !! 2694 bool "Enable DMI scanning"
565 than the panic-ed kernel. !! 2695 depends on MACH_LOONGSON64
>> 2696 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
>> 2697 default y
>> 2698 help
>> 2699 Enabled scanning of DMI to identify machine quirks. Say Y
>> 2700 here unless you have verified that your setup is not
>> 2701 affected by entries in the DMI blacklist. Required by PNP
>> 2702 BIOS code.
566 2703
567 config SMP 2704 config SMP
568 bool "Symmetric multi-processing suppo !! 2705 bool "Multi-Processing support"
569 depends on SYS_SUPPORTS_SMP 2706 depends on SYS_SUPPORTS_SMP
570 help 2707 help
571 This enables support for systems wit 2708 This enables support for systems with more than one CPU. If you have
572 a system with only one CPU, say N. I 2709 a system with only one CPU, say N. If you have a system with more
573 than one CPU, say Y. 2710 than one CPU, say Y.
574 2711
575 If you say N here, the kernel will r 2712 If you say N here, the kernel will run on uni- and multiprocessor
576 machines, but will use only one CPU 2713 machines, but will use only one CPU of a multiprocessor machine. If
577 you say Y here, the kernel will run 2714 you say Y here, the kernel will run on many, but not all,
578 uniprocessor machines. On a uniproce 2715 uniprocessor machines. On a uniprocessor machine, the kernel
579 will run faster if you say N here. 2716 will run faster if you say N here.
580 2717
581 People using multiprocessor machines 2718 People using multiprocessor machines who say Y here should also say
582 Y to "Enhanced Real Time Clock Suppo 2719 Y to "Enhanced Real Time Clock Support", below.
583 2720
584 See also <file:Documentation/admin-g !! 2721 See also the SMP-HOWTO available at
585 available at <https://www.tldp.org/d !! 2722 <https://www.tldp.org/docs.html#howto>.
586 2723
587 If you don't know what to do here, s 2724 If you don't know what to do here, say N.
588 2725
>> 2726 config HOTPLUG_CPU
>> 2727 bool "Support for hot-pluggable CPUs"
>> 2728 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
>> 2729 help
>> 2730 Say Y here to allow turning CPUs off and on. CPUs can be
>> 2731 controlled through /sys/devices/system/cpu.
>> 2732 (Note: power management support will enable this option
>> 2733 automatically on SMP systems. )
>> 2734 Say N if you want to disable CPU hotplug.
>> 2735
>> 2736 config SMP_UP
>> 2737 bool
>> 2738
>> 2739 config SYS_SUPPORTS_MIPS_CPS
>> 2740 bool
>> 2741
>> 2742 config SYS_SUPPORTS_SMP
>> 2743 bool
>> 2744
>> 2745 config NR_CPUS_DEFAULT_4
>> 2746 bool
>> 2747
>> 2748 config NR_CPUS_DEFAULT_8
>> 2749 bool
>> 2750
>> 2751 config NR_CPUS_DEFAULT_16
>> 2752 bool
>> 2753
>> 2754 config NR_CPUS_DEFAULT_32
>> 2755 bool
>> 2756
>> 2757 config NR_CPUS_DEFAULT_64
>> 2758 bool
>> 2759
589 config NR_CPUS 2760 config NR_CPUS
590 int "Maximum number of CPUs (2-32)" !! 2761 int "Maximum number of CPUs (2-256)"
591 range 2 32 !! 2762 range 2 256
592 depends on SMP 2763 depends on SMP
593 default "4" if CPU_SUBTYPE_SHX3 !! 2764 default "4" if NR_CPUS_DEFAULT_4
594 default "2" !! 2765 default "8" if NR_CPUS_DEFAULT_8
>> 2766 default "16" if NR_CPUS_DEFAULT_16
>> 2767 default "32" if NR_CPUS_DEFAULT_32
>> 2768 default "64" if NR_CPUS_DEFAULT_64
595 help 2769 help
596 This allows you to specify the maxim 2770 This allows you to specify the maximum number of CPUs which this
597 kernel will support. The maximum su !! 2771 kernel will support. The maximum supported value is 32 for 32-bit
598 minimum value which makes sense is 2 !! 2772 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2773 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2774 and 2 for all others.
599 2775
600 This is purely to save memory - each 2776 This is purely to save memory - each supported CPU adds
601 approximately eight kilobytes to the !! 2777 approximately eight kilobytes to the kernel image. For best
>> 2778 performance should round up your number of processors to the next
>> 2779 power of two.
602 2780
603 config HOTPLUG_CPU !! 2781 config MIPS_PERF_SHARED_TC_COUNTERS
604 bool "Support for hot-pluggable CPUs ( !! 2782 bool
>> 2783
>> 2784 config MIPS_NR_CPU_NR_MAP_1024
>> 2785 bool
>> 2786
>> 2787 config MIPS_NR_CPU_NR_MAP
>> 2788 int
605 depends on SMP 2789 depends on SMP
606 help !! 2790 default 1024 if MIPS_NR_CPU_NR_MAP_1024
607 Say Y here to experiment with turnin !! 2791 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
608 can be controlled through /sys/devic <<
609 2792
610 config GUSA !! 2793 #
611 def_bool y !! 2794 # Timer Interrupt Frequency Configuration
612 depends on !SMP !! 2795 #
613 help <<
614 This enables support for gUSA (gener <<
615 This is the default implementation f <<
616 CPUs, and is used by the libc, among <<
617 <<
618 For additional information, design i <<
619 in <http://lc.linux.or.jp/lc2002/pap <<
620 <<
621 This should only be disabled for spe <<
622 atomicity implementations exist. <<
623 <<
624 config GUSA_RB <<
625 bool "Implement atomic operations by r <<
626 depends on GUSA && CPU_SH3 || (CPU_SH4 <<
627 help <<
628 Enabling this option will allow the <<
629 atomic operations using a software i <<
630 store-conditional (LLSC). On machine <<
631 LLSC, this should be more efficient <<
632 disabling interrupts around the atom <<
633 2796
634 config HW_PERF_EVENTS !! 2797 choice
635 bool "Enable hardware performance coun !! 2798 prompt "Timer frequency"
636 depends on PERF_EVENTS && CPU_HAS_PMU !! 2799 default HZ_250
637 default y <<
638 help 2800 help
639 Enable hardware performance counter !! 2801 Allows the configuration of the timer frequency.
640 disabled, perf events will use softw <<
641 2802
642 source "drivers/sh/Kconfig" !! 2803 config HZ_24
>> 2804 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
643 2805
644 endmenu !! 2806 config HZ_48
>> 2807 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
645 2808
646 menu "Boot options" !! 2809 config HZ_100
>> 2810 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
647 2811
648 config USE_BUILTIN_DTB !! 2812 config HZ_128
649 bool "Use builtin DTB" !! 2813 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
650 default n <<
651 depends on SH_DEVICE_TREE <<
652 help <<
653 Link a device tree blob for particul <<
654 suppressing use of the DTB pointer p <<
655 This option should only be used with <<
656 not capable of providing a DTB to th <<
657 hardware without stable device tree <<
658 <<
659 config BUILTIN_DTB_SOURCE <<
660 string "Source file for builtin DTB" <<
661 default "" <<
662 depends on USE_BUILTIN_DTB <<
663 help <<
664 Base name (without suffix, relative <<
665 a DTS file that will be used to prod <<
666 kernel. <<
667 <<
668 config ZERO_PAGE_OFFSET <<
669 hex <<
670 default "0x00010000" if PAGE_SIZE_64KB <<
671 SH_7751_SOLUTI <<
672 default "0x00004000" if PAGE_SIZE_16KB <<
673 default "0x00002000" if PAGE_SIZE_8KB <<
674 default "0x00001000" <<
675 help <<
676 This sets the default offset of zero <<
677 <<
678 config BOOT_LINK_OFFSET <<
679 hex <<
680 default "0x00210000" if SH_SHMIN <<
681 default "0x00810000" if SH_7780_SOLUTI <<
682 default "0x009e0000" if SH_TITAN <<
683 default "0x01800000" if SH_SDK7780 <<
684 default "0x02000000" if SH_EDOSK7760 <<
685 default "0x00800000" <<
686 help <<
687 This option allows you to set the li <<
688 This can be useful if you are on a b <<
689 memory. <<
690 <<
691 config ENTRY_OFFSET <<
692 hex <<
693 default "0x00001000" if PAGE_SIZE_4KB <<
694 default "0x00002000" if PAGE_SIZE_8KB <<
695 default "0x00004000" if PAGE_SIZE_16KB <<
696 default "0x00010000" if PAGE_SIZE_64KB <<
697 default "0x00000000" <<
698 <<
699 config ROMIMAGE_MMCIF <<
700 bool "Include MMCIF loader in romImage <<
701 depends on CPU_SUBTYPE_SH7724 <<
702 help <<
703 Say Y here to include experimental M <<
704 romImage. With this enabled it is po <<
705 kernel image to an MMC card and boot <<
706 the reset vector. At reset the proce <<
707 first part of the romImage which in <<
708 image to RAM using the MMCIF hardwar <<
709 2814
710 choice !! 2815 config HZ_250
711 prompt "Kernel command line" !! 2816 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
712 default CMDLINE_OVERWRITE <<
713 help <<
714 Setting this option allows the kerne <<
715 to be set. <<
716 2817
717 config CMDLINE_OVERWRITE !! 2818 config HZ_256
718 bool "Overwrite bootloader kernel argu !! 2819 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
719 help <<
720 Given string will overwrite any argu <<
721 a bootloader. <<
722 2820
723 config CMDLINE_EXTEND !! 2821 config HZ_1000
724 bool "Extend bootloader kernel argumen !! 2822 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
725 help <<
726 Given string will be concatenated wi <<
727 by a bootloader. <<
728 2823
729 config CMDLINE_FROM_BOOTLOADER !! 2824 config HZ_1024
730 bool "Use bootloader kernel arguments" !! 2825 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
731 help <<
732 Uses the command-line options passed <<
733 2826
734 endchoice 2827 endchoice
735 2828
736 config CMDLINE !! 2829 config SYS_SUPPORTS_24HZ
737 string "Kernel command line arguments !! 2830 bool
738 depends on CMDLINE_OVERWRITE || CMDLIN !! 2831
739 default "console=ttySC1,115200" !! 2832 config SYS_SUPPORTS_48HZ
>> 2833 bool
>> 2834
>> 2835 config SYS_SUPPORTS_100HZ
>> 2836 bool
>> 2837
>> 2838 config SYS_SUPPORTS_128HZ
>> 2839 bool
>> 2840
>> 2841 config SYS_SUPPORTS_250HZ
>> 2842 bool
>> 2843
>> 2844 config SYS_SUPPORTS_256HZ
>> 2845 bool
>> 2846
>> 2847 config SYS_SUPPORTS_1000HZ
>> 2848 bool
>> 2849
>> 2850 config SYS_SUPPORTS_1024HZ
>> 2851 bool
>> 2852
>> 2853 config SYS_SUPPORTS_ARBIT_HZ
>> 2854 bool
>> 2855 default y if !SYS_SUPPORTS_24HZ && \
>> 2856 !SYS_SUPPORTS_48HZ && \
>> 2857 !SYS_SUPPORTS_100HZ && \
>> 2858 !SYS_SUPPORTS_128HZ && \
>> 2859 !SYS_SUPPORTS_250HZ && \
>> 2860 !SYS_SUPPORTS_256HZ && \
>> 2861 !SYS_SUPPORTS_1000HZ && \
>> 2862 !SYS_SUPPORTS_1024HZ
>> 2863
>> 2864 config HZ
>> 2865 int
>> 2866 default 24 if HZ_24
>> 2867 default 48 if HZ_48
>> 2868 default 100 if HZ_100
>> 2869 default 128 if HZ_128
>> 2870 default 250 if HZ_250
>> 2871 default 256 if HZ_256
>> 2872 default 1000 if HZ_1000
>> 2873 default 1024 if HZ_1024
>> 2874
>> 2875 config SCHED_HRTICK
>> 2876 def_bool HIGH_RES_TIMERS
>> 2877
>> 2878 config KEXEC
>> 2879 bool "Kexec system call"
>> 2880 select KEXEC_CORE
>> 2881 help
>> 2882 kexec is a system call that implements the ability to shutdown your
>> 2883 current kernel, and to start another kernel. It is like a reboot
>> 2884 but it is independent of the system firmware. And like a reboot
>> 2885 you can start any kernel with it, not just Linux.
>> 2886
>> 2887 The name comes from the similarity to the exec system call.
>> 2888
>> 2889 It is an ongoing process to be certain the hardware in a machine
>> 2890 is properly shutdown, so do not be surprised if this code does not
>> 2891 initially work for you. As of this writing the exact hardware
>> 2892 interface is strongly in flux, so no good recommendation can be
>> 2893 made.
>> 2894
>> 2895 config CRASH_DUMP
>> 2896 bool "Kernel crash dumps"
>> 2897 help
>> 2898 Generate crash dump after being started by kexec.
>> 2899 This should be normally only set in special crash dump kernels
>> 2900 which are loaded in the main kernel with kexec-tools into
>> 2901 a specially reserved region and then later executed after
>> 2902 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2903 to a memory address not used by the main kernel or firmware using
>> 2904 PHYSICAL_START.
>> 2905
>> 2906 config PHYSICAL_START
>> 2907 hex "Physical address where the kernel is loaded"
>> 2908 default "0xffffffff84000000"
>> 2909 depends on CRASH_DUMP
>> 2910 help
>> 2911 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2912 If you plan to use kernel for capturing the crash dump change
>> 2913 this value to start of the reserved region (the "X" value as
>> 2914 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2915 passed to the panic-ed kernel).
>> 2916
>> 2917 config MIPS_O32_FP64_SUPPORT
>> 2918 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 2919 depends on 32BIT || MIPS32_O32
>> 2920 help
>> 2921 When this is enabled, the kernel will support use of 64-bit floating
>> 2922 point registers with binaries using the O32 ABI along with the
>> 2923 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2924 32-bit MIPS systems this support is at the cost of increasing the
>> 2925 size and complexity of the compiled FPU emulator. Thus if you are
>> 2926 running a MIPS32 system and know that none of your userland binaries
>> 2927 will require 64-bit floating point, you may wish to reduce the size
>> 2928 of your kernel & potentially improve FP emulation performance by
>> 2929 saying N here.
>> 2930
>> 2931 Although binutils currently supports use of this flag the details
>> 2932 concerning its effect upon the O32 ABI in userland are still being
>> 2933 worked on. In order to avoid userland becoming dependent upon current
>> 2934 behaviour before the details have been finalised, this option should
>> 2935 be considered experimental and only enabled by those working upon
>> 2936 said details.
>> 2937
>> 2938 If unsure, say N.
>> 2939
>> 2940 config USE_OF
>> 2941 bool
>> 2942 select OF
>> 2943 select OF_EARLY_FLATTREE
>> 2944 select IRQ_DOMAIN
>> 2945
>> 2946 config UHI_BOOT
>> 2947 bool
>> 2948
>> 2949 config BUILTIN_DTB
>> 2950 bool
>> 2951
>> 2952 choice
>> 2953 prompt "Kernel appended dtb support" if USE_OF
>> 2954 default MIPS_NO_APPENDED_DTB
>> 2955
>> 2956 config MIPS_NO_APPENDED_DTB
>> 2957 bool "None"
>> 2958 help
>> 2959 Do not enable appended dtb support.
>> 2960
>> 2961 config MIPS_ELF_APPENDED_DTB
>> 2962 bool "vmlinux"
>> 2963 help
>> 2964 With this option, the boot code will look for a device tree binary
>> 2965 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 2966 it is empty and the DTB can be appended using binutils command
>> 2967 objcopy:
>> 2968
>> 2969 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 2970
>> 2971 This is meant as a backward compatibility convenience for those
>> 2972 systems with a bootloader that can't be upgraded to accommodate
>> 2973 the documented boot protocol using a device tree.
>> 2974
>> 2975 config MIPS_RAW_APPENDED_DTB
>> 2976 bool "vmlinux.bin or vmlinuz.bin"
>> 2977 help
>> 2978 With this option, the boot code will look for a device tree binary
>> 2979 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2980 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2981
>> 2982 This is meant as a backward compatibility convenience for those
>> 2983 systems with a bootloader that can't be upgraded to accommodate
>> 2984 the documented boot protocol using a device tree.
>> 2985
>> 2986 Beware that there is very little in terms of protection against
>> 2987 this option being confused by leftover garbage in memory that might
>> 2988 look like a DTB header after a reboot if no actual DTB is appended
>> 2989 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2990 if you don't intend to always append a DTB.
>> 2991 endchoice
>> 2992
>> 2993 choice
>> 2994 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
>> 2995 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 2996 !MACH_LOONGSON64 && !MIPS_MALTA && \
>> 2997 !CAVIUM_OCTEON_SOC
>> 2998 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2999
>> 3000 config MIPS_CMDLINE_FROM_DTB
>> 3001 depends on USE_OF
>> 3002 bool "Dtb kernel arguments if available"
>> 3003
>> 3004 config MIPS_CMDLINE_DTB_EXTEND
>> 3005 depends on USE_OF
>> 3006 bool "Extend dtb kernel arguments with bootloader arguments"
>> 3007
>> 3008 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 3009 bool "Bootloader kernel arguments if available"
>> 3010
>> 3011 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3012 depends on CMDLINE_BOOL
>> 3013 bool "Extend builtin kernel arguments with bootloader arguments"
>> 3014 endchoice
740 3015
741 endmenu 3016 endmenu
742 3017
743 menu "Bus options" !! 3018 config LOCKDEP_SUPPORT
>> 3019 bool
>> 3020 default y
>> 3021
>> 3022 config STACKTRACE_SUPPORT
>> 3023 bool
>> 3024 default y
>> 3025
>> 3026 config PGTABLE_LEVELS
>> 3027 int
>> 3028 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3029 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
>> 3030 default 2
>> 3031
>> 3032 config MIPS_AUTO_PFN_OFFSET
>> 3033 bool
744 3034
745 config MAPLE !! 3035 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
746 bool "Maple Bus support" <<
747 depends on SH_DREAMCAST <<
748 help <<
749 The Maple Bus is SEGA's serial commun <<
750 on the Dreamcast. Without this bus su <<
751 get your Dreamcast keyboard etc to wo <<
752 probably want to say 'Y' here, unless <<
753 Dreamcast with a serial line terminal <<
754 connection. <<
755 3036
>> 3037 config PCI_DRIVERS_GENERIC
>> 3038 select PCI_DOMAINS_GENERIC if PCI
>> 3039 bool
>> 3040
>> 3041 config PCI_DRIVERS_LEGACY
>> 3042 def_bool !PCI_DRIVERS_GENERIC
>> 3043 select NO_GENERIC_PCI_IOPORT_MAP
>> 3044 select PCI_DOMAINS if PCI
>> 3045
>> 3046 #
>> 3047 # ISA support is now enabled via select. Too many systems still have the one
>> 3048 # or other ISA chip on the board that users don't know about so don't expect
>> 3049 # users to choose the right thing ...
>> 3050 #
>> 3051 config ISA
>> 3052 bool
>> 3053
>> 3054 config TC
>> 3055 bool "TURBOchannel support"
>> 3056 depends on MACH_DECSTATION
>> 3057 help
>> 3058 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3059 processors. TURBOchannel programming specifications are available
>> 3060 at:
>> 3061 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3062 and:
>> 3063 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3064 Linux driver support status is documented at:
>> 3065 <http://www.linux-mips.org/wiki/DECstation>
>> 3066
>> 3067 config MMU
>> 3068 bool
>> 3069 default y
>> 3070
>> 3071 config ARCH_MMAP_RND_BITS_MIN
>> 3072 default 12 if 64BIT
>> 3073 default 8
>> 3074
>> 3075 config ARCH_MMAP_RND_BITS_MAX
>> 3076 default 18 if 64BIT
>> 3077 default 15
>> 3078
>> 3079 config ARCH_MMAP_RND_COMPAT_BITS_MIN
>> 3080 default 8
>> 3081
>> 3082 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3083 default 15
>> 3084
>> 3085 config I8253
>> 3086 bool
>> 3087 select CLKSRC_I8253
>> 3088 select CLKEVT_I8253
>> 3089 select MIPS_EXTERNAL_TIMER
756 endmenu 3090 endmenu
757 3091
758 menu "Power management options (EXPERIMENTAL)" !! 3092 config TRAD_SIGNALS
>> 3093 bool
>> 3094
>> 3095 config MIPS32_COMPAT
>> 3096 bool
>> 3097
>> 3098 config COMPAT
>> 3099 bool
>> 3100
>> 3101 config MIPS32_O32
>> 3102 bool "Kernel support for o32 binaries"
>> 3103 depends on 64BIT
>> 3104 select ARCH_WANT_OLD_COMPAT_IPC
>> 3105 select COMPAT
>> 3106 select MIPS32_COMPAT
>> 3107 help
>> 3108 Select this option if you want to run o32 binaries. These are pure
>> 3109 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3110 existing binaries are in this format.
>> 3111
>> 3112 If unsure, say Y.
>> 3113
>> 3114 config MIPS32_N32
>> 3115 bool "Kernel support for n32 binaries"
>> 3116 depends on 64BIT
>> 3117 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
>> 3118 select COMPAT
>> 3119 select MIPS32_COMPAT
>> 3120 help
>> 3121 Select this option if you want to run n32 binaries. These are
>> 3122 64-bit binaries using 32-bit quantities for addressing and certain
>> 3123 data that would normally be 64-bit. They are used in special
>> 3124 cases.
>> 3125
>> 3126 If unsure, say N.
>> 3127
>> 3128 config CC_HAS_MNO_BRANCH_LIKELY
>> 3129 def_bool y
>> 3130 depends on $(cc-option,-mno-branch-likely)
>> 3131
>> 3132 # https://github.com/llvm/llvm-project/issues/61045
>> 3133 config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
>> 3134 def_bool y if CC_IS_CLANG
>> 3135
>> 3136 menu "Power management options"
>> 3137
>> 3138 config ARCH_HIBERNATION_POSSIBLE
>> 3139 def_bool y
>> 3140 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3141
>> 3142 config ARCH_SUSPEND_POSSIBLE
>> 3143 def_bool y
>> 3144 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
759 3145
760 source "kernel/power/Kconfig" 3146 source "kernel/power/Kconfig"
761 3147
>> 3148 endmenu
>> 3149
>> 3150 config MIPS_EXTERNAL_TIMER
>> 3151 bool
>> 3152
>> 3153 menu "CPU Power Management"
>> 3154
>> 3155 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3156 source "drivers/cpufreq/Kconfig"
>> 3157 endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3158
762 source "drivers/cpuidle/Kconfig" 3159 source "drivers/cpuidle/Kconfig"
763 3160
764 endmenu 3161 endmenu
>> 3162
>> 3163 source "arch/mips/kvm/Kconfig"
>> 3164
>> 3165 source "arch/mips/vdso/Kconfig"
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