1 // SPDX-License-Identifier: GPL-2.0 1
2 /*
3 * PCI operations for the Sega Dreamcast
4 *
5 * Copyright (C) 2001, 2002 M. R. Brown
6 * Copyright (C) 2002, 2003 Paul Mundt
7 */
8
9 #include <linux/sched.h>
10 #include <linux/kernel.h>
11 #include <linux/param.h>
12 #include <linux/interrupt.h>
13 #include <linux/init.h>
14 #include <linux/irq.h>
15 #include <linux/pci.h>
16 #include <linux/module.h>
17 #include <linux/io.h>
18 #include <mach/pci.h>
19
20 /*
21 * The !gapspci_config_access case really shou
22 * someone implicitly messes around with the l
23 * only support a single device anyways, and i
24 * wouldn't make it terribly far through the P
25 *
26 * Also, we could very easily support both Typ
27 * here, but since it doesn't seem that there
28 * existence, we don't bother.
29 *
30 * I suppose if someone actually gets around t
31 * the BBA and hanging some more devices off o
32 * something to take into consideration. Howev
33 * and the general lack of activity by DC hard
34 * likely to happen anytime soon.
35 */
36 static int gapspci_config_access(unsigned char
37 {
38 return (bus == 0) && (devfn == 0);
39 }
40
41 /*
42 * We can also actually read and write in b/w/
43 * was at least done right, and we don't have
44 * shifting that we do on the 7751! Small wond
45 */
46 static int gapspci_read(struct pci_bus *bus, u
47 {
48 *val = 0xffffffff;
49
50 if (!gapspci_config_access(bus->number
51 return PCIBIOS_DEVICE_NOT_FOUN
52
53 switch (size) {
54 case 1: *val = inb(GAPSPCI_BBA_CONFIG+
55 case 2: *val = inw(GAPSPCI_BBA_CONFIG+
56 case 4: *val = inl(GAPSPCI_BBA_CONFIG+
57 }
58
59 return PCIBIOS_SUCCESSFUL;
60 }
61
62 static int gapspci_write(struct pci_bus *bus,
63 {
64 if (!gapspci_config_access(bus->number
65 return PCIBIOS_DEVICE_NOT_FOUN
66
67 switch (size) {
68 case 1: outb(( u8)val, GAPSPCI_BBA_CON
69 case 2: outw((u16)val, GAPSPCI_BBA_CON
70 case 4: outl((u32)val, GAPSPCI_BBA_CON
71 }
72
73 return PCIBIOS_SUCCESSFUL;
74 }
75
76 struct pci_ops gapspci_pci_ops = {
77 .read = gapspci_read,
78 .write = gapspci_write,
79 };
80
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