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Linux/arch/sh/drivers/pci/pci-sh7780.h

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Diff markup

Differences between /arch/sh/drivers/pci/pci-sh7780.h (Architecture mips) and /arch/sparc/drivers/pci/pci-sh7780.h (Architecture sparc)


  1 /* SPDX-License-Identifier: GPL-2.0                 1 
  2  *                                                
  3  *      Low-Level PCI Support for SH7780 targe    
  4  *                                                
  5  *  Dustin McIntire (dustin@sensoria.com) (c)     
  6  *  Paul Mundt (lethal@linux-sh.org) (c) 2003     
  7  */                                               
  8                                                   
  9 #ifndef _PCI_SH7780_H_                            
 10 #define _PCI_SH7780_H_                            
 11                                                   
 12 /* SH7780 Control Registers */                    
 13 #define PCIECR                  0xFE000008        
 14 #define PCIECR_ENBL             0x01              
 15                                                   
 16 /* SH7780 Specific Values */                      
 17 #define SH7780_PCI_CONFIG_BASE  0xFD000000        
 18 #define SH7780_PCI_CONFIG_SIZE  0x01000000        
 19                                                   
 20 #define SH7780_PCIREG_BASE      0xFE040000        
 21                                                   
 22 /* SH7780 PCI Config Registers */                 
 23 #define SH7780_PCIIR            0x114             
 24 #define SH7780_PCIIMR           0x118             
 25 #define SH7780_PCIAIR           0x11C             
 26 #define SH7780_PCICIR           0x120             
 27 #define SH7780_PCIAINT          0x130             
 28 #define SH7780_PCIAINTM         0x134             
 29 #define SH7780_PCIBMIR          0x138             
 30 #define SH7780_PCIPAR           0x1C0             
 31 #define SH7780_PCIPINT          0x1CC             
 32 #define SH7780_PCIPINTM         0x1D0             
 33                                                   
 34 #define SH7780_PCIMBR(x)        (0x1E0 + ((x)     
 35 #define SH7780_PCIMBMR(x)       (0x1E4 + ((x)     
 36 #define SH7780_PCIIOBR          0x1F8             
 37 #define SH7780_PCIIOBMR         0x1FC             
 38 #define SH7780_PCICSCR0         0x210             
 39 #define SH7780_PCICSCR1         0x214             
 40 #define SH7780_PCICSAR0         0x218   /* Cac    
 41 #define SH7780_PCICSAR1         0x21C   /* Cac    
 42                                                   
 43 #endif /* _PCI_SH7780_H_ */                       
 44                                                   

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