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Linux/arch/sh/mm/tlb-sh3.c

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Diff markup

Differences between /arch/sh/mm/tlb-sh3.c (Version linux-6.12-rc7) and /arch/ppc/mm/tlb-sh3.c (Version policy-sample)


  1 // SPDX-License-Identifier: GPL-2.0-only            1 
  2 /*                                                
  3  * arch/sh/mm/tlb-sh3.c                           
  4  *                                                
  5  * SH-3 specific TLB operations                   
  6  *                                                
  7  * Copyright (C) 1999  Niibe Yutaka               
  8  * Copyright (C) 2002  Paul Mundt                 
  9  */                                               
 10 #include <linux/signal.h>                         
 11 #include <linux/sched.h>                          
 12 #include <linux/kernel.h>                         
 13 #include <linux/errno.h>                          
 14 #include <linux/string.h>                         
 15 #include <linux/types.h>                          
 16 #include <linux/ptrace.h>                         
 17 #include <linux/mman.h>                           
 18 #include <linux/mm.h>                             
 19 #include <linux/smp.h>                            
 20 #include <linux/interrupt.h>                      
 21                                                   
 22 #include <asm/io.h>                               
 23 #include <linux/uaccess.h>                        
 24 #include <asm/mmu_context.h>                      
 25 #include <asm/cacheflush.h>                       
 26                                                   
 27 void __update_tlb(struct vm_area_struct *vma,     
 28 {                                                 
 29         unsigned long flags, pteval, vpn;         
 30                                                   
 31         /*                                        
 32          * Handle debugger faulting in for deb    
 33          */                                       
 34         if (vma && current->active_mm != vma->    
 35                 return;                           
 36                                                   
 37         local_irq_save(flags);                    
 38                                                   
 39         /* Set PTEH register */                   
 40         vpn = (address & MMU_VPN_MASK) | get_a    
 41         __raw_writel(vpn, MMU_PTEH);              
 42                                                   
 43         pteval = pte_val(pte);                    
 44                                                   
 45         /* Set PTEL register */                   
 46         pteval &= _PAGE_FLAGS_HARDWARE_MASK; /    
 47         /* conveniently, we want all the softw    
 48         __raw_writel(pteval, MMU_PTEL);           
 49                                                   
 50         /* Load the TLB */                        
 51         asm volatile("ldtlb": /* no output */     
 52         local_irq_restore(flags);                 
 53 }                                                 
 54                                                   
 55 void local_flush_tlb_one(unsigned long asid, u    
 56 {                                                 
 57         unsigned long addr, data;                 
 58         int i, ways = MMU_NTLB_WAYS;              
 59                                                   
 60         /*                                        
 61          * NOTE: PTEH.ASID should be set to th    
 62          *       _AND_ we need to write ASID t    
 63          *                                        
 64          * It would be simple if we didn't nee    
 65          */                                       
 66         addr = MMU_TLB_ADDRESS_ARRAY | (page &    
 67         data = (page & 0xfffe0000) | asid; /*     
 68                                                   
 69         if ((current_cpu_data.flags & CPU_HAS_    
 70                 addr |= MMU_PAGE_ASSOC_BIT;       
 71                 ways = 1;       /* we already     
 72         }                                         
 73                                                   
 74         for (i = 0; i < ways; i++)                
 75                 __raw_writel(data, addr + (i <    
 76 }                                                 
 77                                                   
 78 void local_flush_tlb_all(void)                    
 79 {                                                 
 80         unsigned long flags, status;              
 81                                                   
 82         /*                                        
 83          * Flush all the TLB.                     
 84          *                                        
 85          * Write to the MMU control register's    
 86          *      TF-bit for SH-3, TI-bit for SH    
 87          *      It's same position, bit #2.       
 88          */                                       
 89         local_irq_save(flags);                    
 90         status = __raw_readl(MMUCR);              
 91         status |= 0x04;                           
 92         __raw_writel(status, MMUCR);              
 93         ctrl_barrier();                           
 94         local_irq_restore(flags);                 
 95 }                                                 
 96                                                   

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