1 # SPDX-License-Identifier: GPL-2.0 !! 1 menu "Kernel hacking"
2 2
3 config DEBUG_DCFLUSH !! 3 config TRACE_IRQFLAGS_SUPPORT
4 bool "D-cache flush debugging" <<
5 depends on SPARC64 && DEBUG_KERNEL <<
6 <<
7 config MCOUNT <<
8 bool 4 bool
9 depends on SPARC64 <<
10 depends on FUNCTION_TRACER <<
11 select ARCH_WANT_FRAME_POINTERS <<
12 select FRAME_POINTER <<
13 default y 5 default y
14 6
15 config HAVE_HARDLOCKUP_DETECTOR_SPARC64 !! 7 source "lib/Kconfig.debug"
>> 8
>> 9 config EARLY_PRINTK
>> 10 bool "Early printk" if EXPERT
>> 11 depends on SYS_HAS_EARLY_PRINTK
>> 12 default y
>> 13 help
>> 14 This option enables special console drivers which allow the kernel
>> 15 to print messages very early in the bootup process.
>> 16
>> 17 This is useful for kernel debugging when your machine crashes very
>> 18 early before the console code is initialized. For normal operation,
>> 19 it is not recommended because it looks ugly on some machines and
>> 20 doesn't cooperate with an X server. You should normally say N here,
>> 21 unless you want to debug such a crash.
>> 22
>> 23 config EARLY_PRINTK_8250
16 bool 24 bool
17 depends on HAVE_NMI !! 25 depends on EARLY_PRINTK && USE_GENERIC_EARLY_PRINTK_8250
18 select HARDLOCKUP_DETECTOR_SPARC64 !! 26 default y
19 help 27 help
20 Sparc64 hardlockup detector is the l !! 28 "8250/16550 and compatible serial early printk driver"
21 the common infrastructure for handli !! 29 If you say Y here, it will be possible to use a 8250/16550 serial
22 always built. It does _not_ use the !! 30 port as the boot console.
23 and sysctl interface, except for /pr <<
24 31
25 config HARDLOCKUP_DETECTOR_SPARC64 !! 32 config USE_GENERIC_EARLY_PRINTK_8250
26 bool 33 bool
27 depends on HAVE_HARDLOCKUP_DETECTOR_SP !! 34
>> 35 config CMDLINE_BOOL
>> 36 bool "Built-in kernel command line"
>> 37 default n
>> 38 help
>> 39 For most systems, it is firmware or second stage bootloader that
>> 40 by default specifies the kernel command line options. However,
>> 41 it might be necessary or advantageous to either override the
>> 42 default kernel command line or add a few extra options to it.
>> 43 For such cases, this option allows you to hardcode your own
>> 44 command line options directly into the kernel. For that, you
>> 45 should choose 'Y' here, and fill in the extra boot arguments
>> 46 in CONFIG_CMDLINE.
>> 47
>> 48 The built-in options will be concatenated to the default command
>> 49 line if CMDLINE_OVERRIDE is set to 'N'. Otherwise, the default
>> 50 command line will be ignored and replaced by the built-in string.
>> 51
>> 52 Most MIPS systems will normally expect 'N' here and rely upon
>> 53 the command line from the firmware or the second-stage bootloader.
>> 54
>> 55 config CMDLINE
>> 56 string "Default kernel command string"
>> 57 depends on CMDLINE_BOOL
>> 58 default ""
>> 59 help
>> 60 On some platforms, there is currently no way for the boot loader to
>> 61 pass arguments to the kernel. For these platforms, and for the cases
>> 62 when you want to add some extra options to the command line or ignore
>> 63 the default command line, you can supply some command-line options at
>> 64 build time by entering them here. In other cases you can specify
>> 65 kernel args so that you don't have to set them up in board prom
>> 66 initialization routines.
>> 67
>> 68 For more information, see the CMDLINE_BOOL and CMDLINE_OVERRIDE
>> 69 options.
>> 70
>> 71 config CMDLINE_OVERRIDE
>> 72 bool "Built-in command line overrides firmware arguments"
>> 73 default n
>> 74 depends on CMDLINE_BOOL
>> 75 help
>> 76 By setting this option to 'Y' you will have your kernel ignore
>> 77 command line arguments from firmware or second stage bootloader.
>> 78 Instead, the built-in command line will be used exclusively.
>> 79
>> 80 Normally, you will choose 'N' here.
>> 81
>> 82 config SB1XXX_CORELIS
>> 83 bool "Corelis Debugger"
>> 84 depends on SIBYTE_SB1xxx_SOC
>> 85 select DEBUG_INFO if !COMPILE_TEST
>> 86 help
>> 87 Select compile flags that produce code that can be processed by the
>> 88 Corelis mksym utility and UDB Emulator.
>> 89
>> 90 config DEBUG_ZBOOT
>> 91 bool "Enable compressed kernel support debugging"
>> 92 depends on DEBUG_KERNEL && SYS_SUPPORTS_ZBOOT
>> 93 default n
>> 94 help
>> 95 If you want to add compressed kernel support to a new board, and the
>> 96 board supports uart16550 compatible serial port, please select
>> 97 SYS_SUPPORTS_ZBOOT_UART16550 for your board and enable this option to
>> 98 debug it.
>> 99
>> 100 If your board doesn't support uart16550 compatible serial port, you
>> 101 can try to select SYS_SUPPORTS_ZBOOT and use the other methods to
>> 102 debug it. for example, add a new serial port support just as
>> 103 arch/mips/boot/compressed/uart-16550.c does.
>> 104
>> 105 After the compressed kernel support works, please disable this option
>> 106 to reduce the kernel image size and speed up the booting procedure a
>> 107 little.
>> 108
>> 109 config SPINLOCK_TEST
>> 110 bool "Enable spinlock timing tests in debugfs"
>> 111 depends on DEBUG_FS
>> 112 default n
>> 113 help
>> 114 Add several files to the debugfs to test spinlock speed.
>> 115
>> 116 config SCACHE_DEBUGFS
>> 117 bool "L2 cache debugfs entries"
>> 118 depends on DEBUG_FS
>> 119 help
>> 120 Enable this to allow parts of the L2 cache configuration, such as
>> 121 whether or not prefetching is enabled, to be exposed to userland
>> 122 via debugfs.
>> 123
>> 124 If unsure, say N.
>> 125
>> 126 menuconfig MIPS_CPS_NS16550
>> 127 bool "CPS SMP NS16550 UART output"
>> 128 depends on MIPS_CPS
>> 129 help
>> 130 Output debug information via an ns16550 compatible UART if exceptions
>> 131 occur early in the boot process of a secondary core.
>> 132
>> 133 if MIPS_CPS_NS16550
>> 134
>> 135 config MIPS_CPS_NS16550_BASE
>> 136 hex "UART Base Address"
>> 137 default 0x1b0003f8 if MIPS_MALTA
>> 138 help
>> 139 The base address of the ns16550 compatible UART on which to output
>> 140 debug information from the early stages of core startup.
>> 141
>> 142 config MIPS_CPS_NS16550_SHIFT
>> 143 int "UART Register Shift"
>> 144 default 0 if MIPS_MALTA
>> 145 help
>> 146 The number of bits to shift ns16550 register indices by in order to
>> 147 form their addresses. That is, log base 2 of the span between
>> 148 adjacent ns16550 registers in the system.
>> 149
>> 150 endif # MIPS_CPS_NS16550
>> 151
>> 152 endmenu
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