1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0 2 2 3 config DEBUG_DCFLUSH !! 3 config TRACE_IRQFLAGS_SUPPORT 4 bool "D-cache flush debugging" << 5 depends on SPARC64 && DEBUG_KERNEL << 6 << 7 config MCOUNT << 8 bool 4 bool 9 depends on SPARC64 << 10 depends on FUNCTION_TRACER << 11 select ARCH_WANT_FRAME_POINTERS << 12 select FRAME_POINTER << 13 default y 5 default y 14 6 15 config HAVE_HARDLOCKUP_DETECTOR_SPARC64 !! 7 config EARLY_PRINTK >> 8 bool "Early printk" if EXPERT >> 9 depends on SYS_HAS_EARLY_PRINTK >> 10 default y >> 11 help >> 12 This option enables special console drivers which allow the kernel >> 13 to print messages very early in the bootup process. >> 14 >> 15 This is useful for kernel debugging when your machine crashes very >> 16 early before the console code is initialized. For normal operation, >> 17 it is not recommended because it looks ugly on some machines and >> 18 doesn't cooperate with an X server. You should normally say N here, >> 19 unless you want to debug such a crash. >> 20 >> 21 config EARLY_PRINTK_8250 16 bool 22 bool 17 depends on HAVE_NMI !! 23 depends on EARLY_PRINTK && USE_GENERIC_EARLY_PRINTK_8250 18 select HARDLOCKUP_DETECTOR_SPARC64 !! 24 default y 19 help 25 help 20 Sparc64 hardlockup detector is the l !! 26 "8250/16550 and compatible serial early printk driver" 21 the common infrastructure for handli !! 27 If you say Y here, it will be possible to use a 8250/16550 serial 22 always built. It does _not_ use the !! 28 port as the boot console. 23 and sysctl interface, except for /pr << 24 29 25 config HARDLOCKUP_DETECTOR_SPARC64 !! 30 config USE_GENERIC_EARLY_PRINTK_8250 26 bool 31 bool 27 depends on HAVE_HARDLOCKUP_DETECTOR_SP !! 32 >> 33 config CMDLINE_BOOL >> 34 bool "Built-in kernel command line" >> 35 help >> 36 For most systems, it is firmware or second stage bootloader that >> 37 by default specifies the kernel command line options. However, >> 38 it might be necessary or advantageous to either override the >> 39 default kernel command line or add a few extra options to it. >> 40 For such cases, this option allows you to hardcode your own >> 41 command line options directly into the kernel. For that, you >> 42 should choose 'Y' here, and fill in the extra boot arguments >> 43 in CONFIG_CMDLINE. >> 44 >> 45 The built-in options will be concatenated to the default command >> 46 line if CMDLINE_OVERRIDE is set to 'N'. Otherwise, the default >> 47 command line will be ignored and replaced by the built-in string. >> 48 >> 49 Most MIPS systems will normally expect 'N' here and rely upon >> 50 the command line from the firmware or the second-stage bootloader. >> 51 >> 52 config CMDLINE >> 53 string "Default kernel command string" >> 54 depends on CMDLINE_BOOL >> 55 help >> 56 On some platforms, there is currently no way for the boot loader to >> 57 pass arguments to the kernel. For these platforms, and for the cases >> 58 when you want to add some extra options to the command line or ignore >> 59 the default command line, you can supply some command-line options at >> 60 build time by entering them here. In other cases you can specify >> 61 kernel args so that you don't have to set them up in board prom >> 62 initialization routines. >> 63 >> 64 For more information, see the CMDLINE_BOOL and CMDLINE_OVERRIDE >> 65 options. >> 66 >> 67 config CMDLINE_OVERRIDE >> 68 bool "Built-in command line overrides firmware arguments" >> 69 depends on CMDLINE_BOOL >> 70 help >> 71 By setting this option to 'Y' you will have your kernel ignore >> 72 command line arguments from firmware or second stage bootloader. >> 73 Instead, the built-in command line will be used exclusively. >> 74 >> 75 Normally, you will choose 'N' here. >> 76 >> 77 config SB1XXX_CORELIS >> 78 bool "Corelis Debugger" >> 79 depends on SIBYTE_SB1xxx_SOC >> 80 select DEBUG_INFO if !COMPILE_TEST >> 81 help >> 82 Select compile flags that produce code that can be processed by the >> 83 Corelis mksym utility and UDB Emulator. >> 84 >> 85 config DEBUG_ZBOOT >> 86 bool "Enable compressed kernel support debugging" >> 87 depends on DEBUG_KERNEL && SYS_SUPPORTS_ZBOOT >> 88 default n >> 89 help >> 90 If you want to add compressed kernel support to a new board, and the >> 91 board supports uart16550 compatible serial port, please select >> 92 SYS_SUPPORTS_ZBOOT_UART16550 for your board and enable this option to >> 93 debug it. >> 94 >> 95 If your board doesn't support uart16550 compatible serial port, you >> 96 can try to select SYS_SUPPORTS_ZBOOT and use the other methods to >> 97 debug it. for example, add a new serial port support just as >> 98 arch/mips/boot/compressed/uart-16550.c does. >> 99 >> 100 After the compressed kernel support works, please disable this option >> 101 to reduce the kernel image size and speed up the booting procedure a >> 102 little. >> 103 >> 104 config SPINLOCK_TEST >> 105 bool "Enable spinlock timing tests in debugfs" >> 106 depends on DEBUG_FS >> 107 default n >> 108 help >> 109 Add several files to the debugfs to test spinlock speed. >> 110 >> 111 config SCACHE_DEBUGFS >> 112 bool "L2 cache debugfs entries" >> 113 depends on DEBUG_FS >> 114 help >> 115 Enable this to allow parts of the L2 cache configuration, such as >> 116 whether or not prefetching is enabled, to be exposed to userland >> 117 via debugfs. >> 118 >> 119 If unsure, say N. >> 120 >> 121 menuconfig MIPS_CPS_NS16550_BOOL >> 122 bool "CPS SMP NS16550 UART output" >> 123 depends on MIPS_CPS >> 124 help >> 125 Output debug information via an ns16550 compatible UART if exceptions >> 126 occur early in the boot process of a secondary core. >> 127 >> 128 if MIPS_CPS_NS16550_BOOL >> 129 >> 130 config MIPS_CPS_NS16550 >> 131 def_bool MIPS_CPS_NS16550_BASE != 0 >> 132 >> 133 config MIPS_CPS_NS16550_BASE >> 134 hex "UART Base Address" >> 135 default 0x1b0003f8 if MIPS_MALTA >> 136 default 0 >> 137 help >> 138 The base address of the ns16550 compatible UART on which to output >> 139 debug information from the early stages of core startup. >> 140 >> 141 This is only used if non-zero. >> 142 >> 143 config MIPS_CPS_NS16550_SHIFT >> 144 int "UART Register Shift" >> 145 default 0 >> 146 help >> 147 The number of bits to shift ns16550 register indices by in order to >> 148 form their addresses. That is, log base 2 of the span between >> 149 adjacent ns16550 registers in the system. >> 150 >> 151 config MIPS_CPS_NS16550_WIDTH >> 152 int "UART Register Width" >> 153 default 1 >> 154 help >> 155 ns16550 registers width. UART registers IO access methods will be >> 156 selected in accordance with this parameter. By setting it to 1, 2 or >> 157 4 UART registers will be accessed by means of lb/sb, lh/sh or lw/sw >> 158 instructions respectively. Any value not from that set activates >> 159 lb/sb instructions. >> 160 >> 161 endif # MIPS_CPS_NS16550_BOOL
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