1 # SPDX-License-Identifier: GPL-2.0-only !! 1 # SPDX-License-Identifier: GPL-2.0
2 config 64BIT !! 2 config MIPS
3 bool "64-bit kernel" if "$(ARCH)" = "s <<
4 default "$(ARCH)" = "sparc64" <<
5 help <<
6 SPARC is a family of RISC microproce <<
7 Sun Microsystems, incorporated. The <<
8 workstations and clones. <<
9 <<
10 Say yes to build a 64-bit kernel - f <<
11 Say no to build a 32-bit kernel - fo <<
12 <<
13 config SPARC <<
14 bool 3 bool
15 default y 4 default y
16 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 select ARCH_32BIT_OFF_T if !64BIT
17 select ARCH_HAS_DMA_OPS !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
18 select ARCH_MIGHT_HAVE_PC_PARPORT if S !! 7 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
19 select ARCH_MIGHT_HAVE_PC_SERIO !! 8 select ARCH_HAS_FORTIFY_SOURCE
20 select OF !! 9 select ARCH_HAS_KCOV
21 select OF_PROMTREE !! 10 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
22 select HAVE_ASM_MODVERSIONS !! 11 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
23 select HAVE_ARCH_KGDB if !SMP || SPARC !! 12 select ARCH_HAS_STRNCPY_FROM_USER
24 select HAVE_ARCH_TRACEHOOK !! 13 select ARCH_HAS_STRNLEN_USER
25 select HAVE_ARCH_SECCOMP if SPARC64 !! 14 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
26 select HAVE_EXIT_THREAD !! 15 select ARCH_HAS_UBSAN_SANITIZE_ALL
27 select HAVE_PCI !! 16 select ARCH_HAS_GCOV_PROFILE_ALL
28 select SYSCTL_EXCEPTION_TRACE !! 17 select ARCH_KEEP_MEMBLOCK
29 select RTC_CLASS !! 18 select ARCH_SUPPORTS_UPROBES
30 select RTC_DRV_M48T59 !! 19 select ARCH_USE_BUILTIN_BSWAP
31 select RTC_SYSTOHC !! 20 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
32 select HAVE_ARCH_JUMP_LABEL if SPARC64 !! 21 select ARCH_USE_MEMTEST
33 select GENERIC_IRQ_SHOW !! 22 select ARCH_USE_QUEUED_RWLOCKS
>> 23 select ARCH_USE_QUEUED_SPINLOCKS
>> 24 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
>> 25 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
34 select ARCH_WANT_IPC_PARSE_VERSION 26 select ARCH_WANT_IPC_PARSE_VERSION
35 select GENERIC_PCI_IOMAP !! 27 select ARCH_WANT_LD_ORPHAN_WARN
36 select HAS_IOPORT !! 28 select BUILDTIME_TABLE_SORT
37 select HAVE_HARDLOCKUP_DETECTOR_SPARC6 !! 29 select CLONE_BACKWARDS
38 select HAVE_CBPF_JIT if SPARC32 !! 30 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
39 select HAVE_EBPF_JIT if SPARC64 !! 31 select CPU_PM if CPU_IDLE
40 select HAVE_DEBUG_BUGVERBOSE !! 32 select GENERIC_ATOMIC64 if !64BIT
41 select GENERIC_SMP_IDLE_THREAD !! 33 select GENERIC_CMOS_UPDATE
42 select MODULES_USE_ELF_RELA !! 34 select GENERIC_CPU_AUTOPROBE
43 select PCI_SYSCALL if PCI !! 35 select GENERIC_GETTIMEOFDAY
44 select PCI_MSI_ARCH_FALLBACKS if PCI_M !! 36 select GENERIC_IOMAP
45 select ODD_RT_SIGACTION !! 37 select GENERIC_IRQ_PROBE
46 select OLD_SIGSUSPEND !! 38 select GENERIC_IRQ_SHOW
47 select CPU_NO_EFFICIENT_FFS !! 39 select GENERIC_ISA_DMA if EISA
48 select LOCKDEP_SMALL if LOCKDEP !! 40 select GENERIC_LIB_ASHLDI3
49 select NEED_DMA_MAP_STATE !! 41 select GENERIC_LIB_ASHRDI3
50 select NEED_SG_DMA_LENGTH <<
51 select TRACE_IRQFLAGS_SUPPORT <<
52 <<
53 config SPARC32 <<
54 def_bool !64BIT <<
55 select ARCH_32BIT_OFF_T <<
56 select ARCH_HAS_CPU_FINALIZE_INIT if ! <<
57 select ARCH_HAS_SYNC_DMA_FOR_CPU <<
58 select CLZ_TAB <<
59 select DMA_DIRECT_REMAP <<
60 select GENERIC_ATOMIC64 <<
61 select GENERIC_LIB_CMPDI2 42 select GENERIC_LIB_CMPDI2
>> 43 select GENERIC_LIB_LSHRDI3
62 select GENERIC_LIB_UCMPDI2 44 select GENERIC_LIB_UCMPDI2
63 select HAVE_UID16 !! 45 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
64 select HAVE_PAGE_SIZE_4KB !! 46 select GENERIC_SMP_IDLE_THREAD
65 select LOCK_MM_AND_FIND_VMA !! 47 select GENERIC_TIME_VSYSCALL
66 select OLD_SIGACTION !! 48 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
67 select ZONE_DMA !! 49 select HAVE_ARCH_COMPILER_H
68 !! 50 select HAVE_ARCH_JUMP_LABEL
69 config SPARC64 !! 51 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
70 def_bool 64BIT !! 52 select HAVE_ARCH_MMAP_RND_BITS if MMU
71 select ALTERNATE_USER_ADDRESS_SPACE !! 53 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
72 select HAVE_FUNCTION_TRACER !! 54 select HAVE_ARCH_SECCOMP_FILTER
73 select HAVE_FUNCTION_GRAPH_TRACER !! 55 select HAVE_ARCH_TRACEHOOK
74 select HAVE_KRETPROBES !! 56 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
75 select HAVE_KPROBES !! 57 select HAVE_ASM_MODVERSIONS
76 select MMU_GATHER_RCU_TABLE_FREE if SM !! 58 select HAVE_CONTEXT_TRACKING
77 select MMU_GATHER_MERGE_VMAS <<
78 select MMU_GATHER_NO_FLUSH_CACHE <<
79 select HAVE_ARCH_TRANSPARENT_HUGEPAGE <<
80 select HAVE_DYNAMIC_FTRACE <<
81 select HAVE_FTRACE_MCOUNT_RECORD <<
82 select HAVE_PAGE_SIZE_8KB <<
83 select HAVE_SYSCALL_TRACEPOINTS <<
84 select HAVE_CONTEXT_TRACKING_USER <<
85 select HAVE_TIF_NOHZ 59 select HAVE_TIF_NOHZ
86 select HAVE_DEBUG_KMEMLEAK <<
87 select IOMMU_HELPER <<
88 select SPARSE_IRQ <<
89 select RTC_DRV_CMOS <<
90 select RTC_DRV_BQ4802 <<
91 select RTC_DRV_SUN4V <<
92 select RTC_DRV_STARFIRE <<
93 select HAVE_PERF_EVENTS <<
94 select PERF_USE_VMALLOC <<
95 select ARCH_HAVE_NMI_SAFE_CMPXCHG <<
96 select HAVE_C_RECORDMCOUNT 60 select HAVE_C_RECORDMCOUNT
97 select HAVE_ARCH_AUDITSYSCALL !! 61 select HAVE_DEBUG_KMEMLEAK
98 select ARCH_SUPPORTS_ATOMIC_RMW !! 62 select HAVE_DEBUG_STACKOVERFLOW
99 select ARCH_SUPPORTS_DEBUG_PAGEALLOC !! 63 select HAVE_DMA_CONTIGUOUS
>> 64 select HAVE_DYNAMIC_FTRACE
>> 65 select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
>> 66 !CPU_DADDI_WORKAROUNDS && \
>> 67 !CPU_R4000_WORKAROUNDS && \
>> 68 !CPU_R4400_WORKAROUNDS
>> 69 select HAVE_EXIT_THREAD
>> 70 select HAVE_FAST_GUP
>> 71 select HAVE_FTRACE_MCOUNT_RECORD
>> 72 select HAVE_FUNCTION_GRAPH_TRACER
>> 73 select HAVE_FUNCTION_TRACER
>> 74 select HAVE_GCC_PLUGINS
>> 75 select HAVE_GENERIC_VDSO
>> 76 select HAVE_IOREMAP_PROT
>> 77 select HAVE_IRQ_EXIT_ON_IRQ_STACK
>> 78 select HAVE_IRQ_TIME_ACCOUNTING
>> 79 select HAVE_KPROBES
>> 80 select HAVE_KRETPROBES
>> 81 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
>> 82 select HAVE_MOD_ARCH_SPECIFIC
100 select HAVE_NMI 83 select HAVE_NMI
>> 84 select HAVE_PERF_EVENTS
>> 85 select HAVE_PERF_REGS
>> 86 select HAVE_PERF_USER_STACK_DUMP
101 select HAVE_REGS_AND_STACK_ACCESS_API 87 select HAVE_REGS_AND_STACK_ACCESS_API
102 select ARCH_USE_QUEUED_RWLOCKS !! 88 select HAVE_RSEQ
103 select ARCH_USE_QUEUED_SPINLOCKS !! 89 select HAVE_SPARSE_SYSCALL_NR
104 select GENERIC_TIME_VSYSCALL !! 90 select HAVE_STACKPROTECTOR
105 select ARCH_CLOCKSOURCE_DATA !! 91 select HAVE_SYSCALL_TRACEPOINTS
106 select ARCH_HAS_PTE_SPECIAL !! 92 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
107 select PCI_DOMAINS if PCI !! 93 select IRQ_FORCED_THREADING
108 select ARCH_HAS_GIGANTIC_PAGE !! 94 select ISA if EISA
109 select HAVE_SOFTIRQ_ON_OWN_STACK !! 95 select MODULES_USE_ELF_REL if MODULES
110 select HAVE_SETUP_PER_CPU_AREA !! 96 select MODULES_USE_ELF_RELA if MODULES && 64BIT
111 select NEED_PER_CPU_EMBED_FIRST_CHUNK !! 97 select PERF_USE_VMALLOC
112 select NEED_PER_CPU_PAGE_FIRST_CHUNK !! 98 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
113 !! 99 select RTC_LIB
114 config ARCH_PROC_KCORE_TEXT !! 100 select SYSCTL_EXCEPTION_TRACE
115 def_bool y !! 101 select TRACE_IRQFLAGS_SUPPORT
>> 102 select VIRT_TO_BUS
>> 103 select ARCH_HAS_ELFCORE_COMPAT
>> 104 select HAVE_ARCH_KCSAN if 64BIT
116 105
117 config CPU_BIG_ENDIAN !! 106 config MIPS_FIXUP_BIGPHYS_ADDR
118 def_bool y !! 107 bool
119 108
120 config STACKTRACE_SUPPORT !! 109 config MIPS_GENERIC
121 bool 110 bool
122 default y if SPARC64 <<
123 111
124 config LOCKDEP_SUPPORT !! 112 config MACH_INGENIC
125 bool 113 bool
126 default y if SPARC64 !! 114 select SYS_SUPPORTS_32BIT_KERNEL
>> 115 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 116 select SYS_SUPPORTS_ZBOOT
>> 117 select DMA_NONCOHERENT
>> 118 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 119 select IRQ_MIPS_CPU
>> 120 select PINCTRL
>> 121 select GPIOLIB
>> 122 select COMMON_CLK
>> 123 select GENERIC_IRQ_CHIP
>> 124 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 125 select USE_OF
>> 126 select CPU_SUPPORTS_CPUFREQ
>> 127 select MIPS_EXTERNAL_TIMER
>> 128
>> 129 menu "Machine selection"
>> 130
>> 131 choice
>> 132 prompt "System type"
>> 133 default MIPS_GENERIC_KERNEL
>> 134
>> 135 config MIPS_GENERIC_KERNEL
>> 136 bool "Generic board-agnostic MIPS kernel"
>> 137 select ARCH_HAS_SETUP_DMA_OPS
>> 138 select MIPS_GENERIC
>> 139 select BOOT_RAW
>> 140 select BUILTIN_DTB
>> 141 select CEVT_R4K
>> 142 select CLKSRC_MIPS_GIC
>> 143 select COMMON_CLK
>> 144 select CPU_MIPSR2_IRQ_EI
>> 145 select CPU_MIPSR2_IRQ_VI
>> 146 select CSRC_R4K
>> 147 select DMA_NONCOHERENT
>> 148 select HAVE_PCI
>> 149 select IRQ_MIPS_CPU
>> 150 select MIPS_AUTO_PFN_OFFSET
>> 151 select MIPS_CPU_SCACHE
>> 152 select MIPS_GIC
>> 153 select MIPS_L1_CACHE_SHIFT_7
>> 154 select NO_EXCEPT_FILL
>> 155 select PCI_DRIVERS_GENERIC
>> 156 select SMP_UP if SMP
>> 157 select SWAP_IO_SPACE
>> 158 select SYS_HAS_CPU_MIPS32_R1
>> 159 select SYS_HAS_CPU_MIPS32_R2
>> 160 select SYS_HAS_CPU_MIPS32_R6
>> 161 select SYS_HAS_CPU_MIPS64_R1
>> 162 select SYS_HAS_CPU_MIPS64_R2
>> 163 select SYS_HAS_CPU_MIPS64_R6
>> 164 select SYS_SUPPORTS_32BIT_KERNEL
>> 165 select SYS_SUPPORTS_64BIT_KERNEL
>> 166 select SYS_SUPPORTS_BIG_ENDIAN
>> 167 select SYS_SUPPORTS_HIGHMEM
>> 168 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 169 select SYS_SUPPORTS_MICROMIPS
>> 170 select SYS_SUPPORTS_MIPS16
>> 171 select SYS_SUPPORTS_MIPS_CPS
>> 172 select SYS_SUPPORTS_MULTITHREADING
>> 173 select SYS_SUPPORTS_RELOCATABLE
>> 174 select SYS_SUPPORTS_SMARTMIPS
>> 175 select SYS_SUPPORTS_ZBOOT
>> 176 select UHI_BOOT
>> 177 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 178 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 179 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 180 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 181 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 182 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 183 select USE_OF
>> 184 help
>> 185 Select this to build a kernel which aims to support multiple boards,
>> 186 generally using a flattened device tree passed from the bootloader
>> 187 using the boot protocol defined in the UHI (Unified Hosting
>> 188 Interface) specification.
>> 189
>> 190 config MIPS_ALCHEMY
>> 191 bool "Alchemy processor based machines"
>> 192 select PHYS_ADDR_T_64BIT
>> 193 select CEVT_R4K
>> 194 select CSRC_R4K
>> 195 select IRQ_MIPS_CPU
>> 196 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
>> 197 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
>> 198 select SYS_HAS_CPU_MIPS32_R1
>> 199 select SYS_SUPPORTS_32BIT_KERNEL
>> 200 select SYS_SUPPORTS_APM_EMULATION
>> 201 select GPIOLIB
>> 202 select SYS_SUPPORTS_ZBOOT
>> 203 select COMMON_CLK
>> 204
>> 205 config AR7
>> 206 bool "Texas Instruments AR7"
>> 207 select BOOT_ELF32
>> 208 select COMMON_CLK
>> 209 select DMA_NONCOHERENT
>> 210 select CEVT_R4K
>> 211 select CSRC_R4K
>> 212 select IRQ_MIPS_CPU
>> 213 select NO_EXCEPT_FILL
>> 214 select SWAP_IO_SPACE
>> 215 select SYS_HAS_CPU_MIPS32_R1
>> 216 select SYS_HAS_EARLY_PRINTK
>> 217 select SYS_SUPPORTS_32BIT_KERNEL
>> 218 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 219 select SYS_SUPPORTS_MIPS16
>> 220 select SYS_SUPPORTS_ZBOOT_UART16550
>> 221 select GPIOLIB
>> 222 select VLYNQ
>> 223 help
>> 224 Support for the Texas Instruments AR7 System-on-a-Chip
>> 225 family: TNETD7100, 7200 and 7300.
>> 226
>> 227 config ATH25
>> 228 bool "Atheros AR231x/AR531x SoC support"
>> 229 select CEVT_R4K
>> 230 select CSRC_R4K
>> 231 select DMA_NONCOHERENT
>> 232 select IRQ_MIPS_CPU
>> 233 select IRQ_DOMAIN
>> 234 select SYS_HAS_CPU_MIPS32_R1
>> 235 select SYS_SUPPORTS_BIG_ENDIAN
>> 236 select SYS_SUPPORTS_32BIT_KERNEL
>> 237 select SYS_HAS_EARLY_PRINTK
>> 238 help
>> 239 Support for Atheros AR231x and Atheros AR531x based boards
>> 240
>> 241 config ATH79
>> 242 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 243 select ARCH_HAS_RESET_CONTROLLER
>> 244 select BOOT_RAW
>> 245 select CEVT_R4K
>> 246 select CSRC_R4K
>> 247 select DMA_NONCOHERENT
>> 248 select GPIOLIB
>> 249 select PINCTRL
>> 250 select COMMON_CLK
>> 251 select IRQ_MIPS_CPU
>> 252 select SYS_HAS_CPU_MIPS32_R2
>> 253 select SYS_HAS_EARLY_PRINTK
>> 254 select SYS_SUPPORTS_32BIT_KERNEL
>> 255 select SYS_SUPPORTS_BIG_ENDIAN
>> 256 select SYS_SUPPORTS_MIPS16
>> 257 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 258 select USE_OF
>> 259 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 260 help
>> 261 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 262
>> 263 config BMIPS_GENERIC
>> 264 bool "Broadcom Generic BMIPS kernel"
>> 265 select ARCH_HAS_RESET_CONTROLLER
>> 266 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 267 select BOOT_RAW
>> 268 select NO_EXCEPT_FILL
>> 269 select USE_OF
>> 270 select CEVT_R4K
>> 271 select CSRC_R4K
>> 272 select SYNC_R4K
>> 273 select COMMON_CLK
>> 274 select BCM6345_L1_IRQ
>> 275 select BCM7038_L1_IRQ
>> 276 select BCM7120_L2_IRQ
>> 277 select BRCMSTB_L2_IRQ
>> 278 select IRQ_MIPS_CPU
>> 279 select DMA_NONCOHERENT
>> 280 select SYS_SUPPORTS_32BIT_KERNEL
>> 281 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 282 select SYS_SUPPORTS_BIG_ENDIAN
>> 283 select SYS_SUPPORTS_HIGHMEM
>> 284 select SYS_HAS_CPU_BMIPS32_3300
>> 285 select SYS_HAS_CPU_BMIPS4350
>> 286 select SYS_HAS_CPU_BMIPS4380
>> 287 select SYS_HAS_CPU_BMIPS5000
>> 288 select SWAP_IO_SPACE
>> 289 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 290 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 291 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 292 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 293 select HARDIRQS_SW_RESEND
>> 294 select HAVE_PCI
>> 295 select PCI_DRIVERS_GENERIC
>> 296 help
>> 297 Build a generic DT-based kernel image that boots on select
>> 298 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 299 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 300 must be set appropriately for your board.
>> 301
>> 302 config BCM47XX
>> 303 bool "Broadcom BCM47XX based boards"
>> 304 select BOOT_RAW
>> 305 select CEVT_R4K
>> 306 select CSRC_R4K
>> 307 select DMA_NONCOHERENT
>> 308 select HAVE_PCI
>> 309 select IRQ_MIPS_CPU
>> 310 select SYS_HAS_CPU_MIPS32_R1
>> 311 select NO_EXCEPT_FILL
>> 312 select SYS_SUPPORTS_32BIT_KERNEL
>> 313 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 314 select SYS_SUPPORTS_MIPS16
>> 315 select SYS_SUPPORTS_ZBOOT
>> 316 select SYS_HAS_EARLY_PRINTK
>> 317 select USE_GENERIC_EARLY_PRINTK_8250
>> 318 select GPIOLIB
>> 319 select LEDS_GPIO_REGISTER
>> 320 select BCM47XX_NVRAM
>> 321 select BCM47XX_SPROM
>> 322 select BCM47XX_SSB if !BCM47XX_BCMA
>> 323 help
>> 324 Support for BCM47XX based boards
>> 325
>> 326 config BCM63XX
>> 327 bool "Broadcom BCM63XX based boards"
>> 328 select BOOT_RAW
>> 329 select CEVT_R4K
>> 330 select CSRC_R4K
>> 331 select SYNC_R4K
>> 332 select DMA_NONCOHERENT
>> 333 select IRQ_MIPS_CPU
>> 334 select SYS_SUPPORTS_32BIT_KERNEL
>> 335 select SYS_SUPPORTS_BIG_ENDIAN
>> 336 select SYS_HAS_EARLY_PRINTK
>> 337 select SYS_HAS_CPU_BMIPS32_3300
>> 338 select SYS_HAS_CPU_BMIPS4350
>> 339 select SYS_HAS_CPU_BMIPS4380
>> 340 select SWAP_IO_SPACE
>> 341 select GPIOLIB
>> 342 select MIPS_L1_CACHE_SHIFT_4
>> 343 select HAVE_LEGACY_CLK
>> 344 help
>> 345 Support for BCM63XX based boards
>> 346
>> 347 config MIPS_COBALT
>> 348 bool "Cobalt Server"
>> 349 select CEVT_R4K
>> 350 select CSRC_R4K
>> 351 select CEVT_GT641XX
>> 352 select DMA_NONCOHERENT
>> 353 select FORCE_PCI
>> 354 select I8253
>> 355 select I8259
>> 356 select IRQ_MIPS_CPU
>> 357 select IRQ_GT641XX
>> 358 select PCI_GT64XXX_PCI0
>> 359 select SYS_HAS_CPU_NEVADA
>> 360 select SYS_HAS_EARLY_PRINTK
>> 361 select SYS_SUPPORTS_32BIT_KERNEL
>> 362 select SYS_SUPPORTS_64BIT_KERNEL
>> 363 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 364 select USE_GENERIC_EARLY_PRINTK_8250
>> 365
>> 366 config MACH_DECSTATION
>> 367 bool "DECstations"
>> 368 select BOOT_ELF32
>> 369 select CEVT_DS1287
>> 370 select CEVT_R4K if CPU_R4X00
>> 371 select CSRC_IOASIC
>> 372 select CSRC_R4K if CPU_R4X00
>> 373 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 374 select CPU_R4000_WORKAROUNDS if 64BIT
>> 375 select CPU_R4400_WORKAROUNDS if 64BIT
>> 376 select DMA_NONCOHERENT
>> 377 select NO_IOPORT_MAP
>> 378 select IRQ_MIPS_CPU
>> 379 select SYS_HAS_CPU_R3000
>> 380 select SYS_HAS_CPU_R4X00
>> 381 select SYS_SUPPORTS_32BIT_KERNEL
>> 382 select SYS_SUPPORTS_64BIT_KERNEL
>> 383 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 384 select SYS_SUPPORTS_128HZ
>> 385 select SYS_SUPPORTS_256HZ
>> 386 select SYS_SUPPORTS_1024HZ
>> 387 select MIPS_L1_CACHE_SHIFT_4
>> 388 help
>> 389 This enables support for DEC's MIPS based workstations. For details
>> 390 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 391 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 392
>> 393 If you have one of the following DECstation Models you definitely
>> 394 want to choose R4xx0 for the CPU Type:
>> 395
>> 396 DECstation 5000/50
>> 397 DECstation 5000/150
>> 398 DECstation 5000/260
>> 399 DECsystem 5900/260
>> 400
>> 401 otherwise choose R3000.
>> 402
>> 403 config MACH_JAZZ
>> 404 bool "Jazz family of machines"
>> 405 select ARC_MEMORY
>> 406 select ARC_PROMLIB
>> 407 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 408 select ARCH_MIGHT_HAVE_PC_SERIO
>> 409 select DMA_OPS
>> 410 select FW_ARC
>> 411 select FW_ARC32
>> 412 select ARCH_MAY_HAVE_PC_FDC
>> 413 select CEVT_R4K
>> 414 select CSRC_R4K
>> 415 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 416 select GENERIC_ISA_DMA
>> 417 select HAVE_PCSPKR_PLATFORM
>> 418 select IRQ_MIPS_CPU
>> 419 select I8253
>> 420 select I8259
>> 421 select ISA
>> 422 select SYS_HAS_CPU_R4X00
>> 423 select SYS_SUPPORTS_32BIT_KERNEL
>> 424 select SYS_SUPPORTS_64BIT_KERNEL
>> 425 select SYS_SUPPORTS_100HZ
>> 426 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 427 help
>> 428 This a family of machines based on the MIPS R4030 chipset which was
>> 429 used by several vendors to build RISC/os and Windows NT workstations.
>> 430 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 431 Olivetti M700-10 workstations.
>> 432
>> 433 config MACH_INGENIC_SOC
>> 434 bool "Ingenic SoC based machines"
>> 435 select MIPS_GENERIC
>> 436 select MACH_INGENIC
>> 437 select SYS_SUPPORTS_ZBOOT_UART16550
>> 438 select CPU_SUPPORTS_CPUFREQ
>> 439 select MIPS_EXTERNAL_TIMER
>> 440
>> 441 config LANTIQ
>> 442 bool "Lantiq based platforms"
>> 443 select DMA_NONCOHERENT
>> 444 select IRQ_MIPS_CPU
>> 445 select CEVT_R4K
>> 446 select CSRC_R4K
>> 447 select SYS_HAS_CPU_MIPS32_R1
>> 448 select SYS_HAS_CPU_MIPS32_R2
>> 449 select SYS_SUPPORTS_BIG_ENDIAN
>> 450 select SYS_SUPPORTS_32BIT_KERNEL
>> 451 select SYS_SUPPORTS_MIPS16
>> 452 select SYS_SUPPORTS_MULTITHREADING
>> 453 select SYS_SUPPORTS_VPE_LOADER
>> 454 select SYS_HAS_EARLY_PRINTK
>> 455 select GPIOLIB
>> 456 select SWAP_IO_SPACE
>> 457 select BOOT_RAW
>> 458 select HAVE_LEGACY_CLK
>> 459 select USE_OF
>> 460 select PINCTRL
>> 461 select PINCTRL_LANTIQ
>> 462 select ARCH_HAS_RESET_CONTROLLER
>> 463 select RESET_CONTROLLER
>> 464
>> 465 config MACH_LOONGSON32
>> 466 bool "Loongson 32-bit family of machines"
>> 467 select SYS_SUPPORTS_ZBOOT
>> 468 help
>> 469 This enables support for the Loongson-1 family of machines.
>> 470
>> 471 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 472 the Institute of Computing Technology (ICT), Chinese Academy of
>> 473 Sciences (CAS).
>> 474
>> 475 config MACH_LOONGSON2EF
>> 476 bool "Loongson-2E/F family of machines"
>> 477 select SYS_SUPPORTS_ZBOOT
>> 478 help
>> 479 This enables the support of early Loongson-2E/F family of machines.
>> 480
>> 481 config MACH_LOONGSON64
>> 482 bool "Loongson 64-bit family of machines"
>> 483 select ARCH_SPARSEMEM_ENABLE
>> 484 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 485 select ARCH_MIGHT_HAVE_PC_SERIO
>> 486 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 487 select BOOT_ELF32
>> 488 select BOARD_SCACHE
>> 489 select CSRC_R4K
>> 490 select CEVT_R4K
>> 491 select CPU_HAS_WB
>> 492 select FORCE_PCI
>> 493 select ISA
>> 494 select I8259
>> 495 select IRQ_MIPS_CPU
>> 496 select NO_EXCEPT_FILL
>> 497 select NR_CPUS_DEFAULT_64
>> 498 select USE_GENERIC_EARLY_PRINTK_8250
>> 499 select PCI_DRIVERS_GENERIC
>> 500 select SYS_HAS_CPU_LOONGSON64
>> 501 select SYS_HAS_EARLY_PRINTK
>> 502 select SYS_SUPPORTS_SMP
>> 503 select SYS_SUPPORTS_HOTPLUG_CPU
>> 504 select SYS_SUPPORTS_NUMA
>> 505 select SYS_SUPPORTS_64BIT_KERNEL
>> 506 select SYS_SUPPORTS_HIGHMEM
>> 507 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 508 select SYS_SUPPORTS_ZBOOT
>> 509 select SYS_SUPPORTS_RELOCATABLE
>> 510 select ZONE_DMA32
>> 511 select COMMON_CLK
>> 512 select USE_OF
>> 513 select BUILTIN_DTB
>> 514 select PCI_HOST_GENERIC
>> 515 help
>> 516 This enables the support of Loongson-2/3 family of machines.
>> 517
>> 518 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
>> 519 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
>> 520 and Loongson-2F which will be removed), developed by the Institute
>> 521 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
>> 522
>> 523 config MIPS_MALTA
>> 524 bool "MIPS Malta board"
>> 525 select ARCH_MAY_HAVE_PC_FDC
>> 526 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 527 select ARCH_MIGHT_HAVE_PC_SERIO
>> 528 select BOOT_ELF32
>> 529 select BOOT_RAW
>> 530 select BUILTIN_DTB
>> 531 select CEVT_R4K
>> 532 select CLKSRC_MIPS_GIC
>> 533 select COMMON_CLK
>> 534 select CSRC_R4K
>> 535 select DMA_NONCOHERENT
>> 536 select GENERIC_ISA_DMA
>> 537 select HAVE_PCSPKR_PLATFORM
>> 538 select HAVE_PCI
>> 539 select I8253
>> 540 select I8259
>> 541 select IRQ_MIPS_CPU
>> 542 select MIPS_BONITO64
>> 543 select MIPS_CPU_SCACHE
>> 544 select MIPS_GIC
>> 545 select MIPS_L1_CACHE_SHIFT_6
>> 546 select MIPS_MSC
>> 547 select PCI_GT64XXX_PCI0
>> 548 select SMP_UP if SMP
>> 549 select SWAP_IO_SPACE
>> 550 select SYS_HAS_CPU_MIPS32_R1
>> 551 select SYS_HAS_CPU_MIPS32_R2
>> 552 select SYS_HAS_CPU_MIPS32_R3_5
>> 553 select SYS_HAS_CPU_MIPS32_R5
>> 554 select SYS_HAS_CPU_MIPS32_R6
>> 555 select SYS_HAS_CPU_MIPS64_R1
>> 556 select SYS_HAS_CPU_MIPS64_R2
>> 557 select SYS_HAS_CPU_MIPS64_R6
>> 558 select SYS_HAS_CPU_NEVADA
>> 559 select SYS_HAS_CPU_RM7000
>> 560 select SYS_SUPPORTS_32BIT_KERNEL
>> 561 select SYS_SUPPORTS_64BIT_KERNEL
>> 562 select SYS_SUPPORTS_BIG_ENDIAN
>> 563 select SYS_SUPPORTS_HIGHMEM
>> 564 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 565 select SYS_SUPPORTS_MICROMIPS
>> 566 select SYS_SUPPORTS_MIPS16
>> 567 select SYS_SUPPORTS_MIPS_CMP
>> 568 select SYS_SUPPORTS_MIPS_CPS
>> 569 select SYS_SUPPORTS_MULTITHREADING
>> 570 select SYS_SUPPORTS_RELOCATABLE
>> 571 select SYS_SUPPORTS_SMARTMIPS
>> 572 select SYS_SUPPORTS_VPE_LOADER
>> 573 select SYS_SUPPORTS_ZBOOT
>> 574 select USE_OF
>> 575 select WAR_ICACHE_REFILLS
>> 576 select ZONE_DMA32 if 64BIT
>> 577 help
>> 578 This enables support for the MIPS Technologies Malta evaluation
>> 579 board.
>> 580
>> 581 config MACH_PIC32
>> 582 bool "Microchip PIC32 Family"
>> 583 help
>> 584 This enables support for the Microchip PIC32 family of platforms.
>> 585
>> 586 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 587 microcontrollers.
>> 588
>> 589 config MACH_VR41XX
>> 590 bool "NEC VR4100 series based machines"
>> 591 select CEVT_R4K
>> 592 select CSRC_R4K
>> 593 select SYS_HAS_CPU_VR41XX
>> 594 select SYS_SUPPORTS_MIPS16
>> 595 select GPIOLIB
>> 596
>> 597 config MACH_NINTENDO64
>> 598 bool "Nintendo 64 console"
>> 599 select CEVT_R4K
>> 600 select CSRC_R4K
>> 601 select SYS_HAS_CPU_R4300
>> 602 select SYS_SUPPORTS_BIG_ENDIAN
>> 603 select SYS_SUPPORTS_ZBOOT
>> 604 select SYS_SUPPORTS_32BIT_KERNEL
>> 605 select SYS_SUPPORTS_64BIT_KERNEL
>> 606 select DMA_NONCOHERENT
>> 607 select IRQ_MIPS_CPU
>> 608
>> 609 config RALINK
>> 610 bool "Ralink based machines"
>> 611 select CEVT_R4K
>> 612 select COMMON_CLK
>> 613 select CSRC_R4K
>> 614 select BOOT_RAW
>> 615 select DMA_NONCOHERENT
>> 616 select IRQ_MIPS_CPU
>> 617 select USE_OF
>> 618 select SYS_HAS_CPU_MIPS32_R1
>> 619 select SYS_HAS_CPU_MIPS32_R2
>> 620 select SYS_SUPPORTS_32BIT_KERNEL
>> 621 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 622 select SYS_SUPPORTS_MIPS16
>> 623 select SYS_SUPPORTS_ZBOOT
>> 624 select SYS_HAS_EARLY_PRINTK
>> 625 select ARCH_HAS_RESET_CONTROLLER
>> 626 select RESET_CONTROLLER
>> 627
>> 628 config MACH_REALTEK_RTL
>> 629 bool "Realtek RTL838x/RTL839x based machines"
>> 630 select MIPS_GENERIC
>> 631 select DMA_NONCOHERENT
>> 632 select IRQ_MIPS_CPU
>> 633 select CSRC_R4K
>> 634 select CEVT_R4K
>> 635 select SYS_HAS_CPU_MIPS32_R1
>> 636 select SYS_HAS_CPU_MIPS32_R2
>> 637 select SYS_SUPPORTS_BIG_ENDIAN
>> 638 select SYS_SUPPORTS_32BIT_KERNEL
>> 639 select SYS_SUPPORTS_MIPS16
>> 640 select SYS_SUPPORTS_MULTITHREADING
>> 641 select SYS_SUPPORTS_VPE_LOADER
>> 642 select BOOT_RAW
>> 643 select PINCTRL
>> 644 select USE_OF
>> 645
>> 646 config SGI_IP22
>> 647 bool "SGI IP22 (Indy/Indigo2)"
>> 648 select ARC_MEMORY
>> 649 select ARC_PROMLIB
>> 650 select FW_ARC
>> 651 select FW_ARC32
>> 652 select ARCH_MIGHT_HAVE_PC_SERIO
>> 653 select BOOT_ELF32
>> 654 select CEVT_R4K
>> 655 select CSRC_R4K
>> 656 select DEFAULT_SGI_PARTITION
>> 657 select DMA_NONCOHERENT
>> 658 select HAVE_EISA
>> 659 select I8253
>> 660 select I8259
>> 661 select IP22_CPU_SCACHE
>> 662 select IRQ_MIPS_CPU
>> 663 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 664 select SGI_HAS_I8042
>> 665 select SGI_HAS_INDYDOG
>> 666 select SGI_HAS_HAL2
>> 667 select SGI_HAS_SEEQ
>> 668 select SGI_HAS_WD93
>> 669 select SGI_HAS_ZILOG
>> 670 select SWAP_IO_SPACE
>> 671 select SYS_HAS_CPU_R4X00
>> 672 select SYS_HAS_CPU_R5000
>> 673 select SYS_HAS_EARLY_PRINTK
>> 674 select SYS_SUPPORTS_32BIT_KERNEL
>> 675 select SYS_SUPPORTS_64BIT_KERNEL
>> 676 select SYS_SUPPORTS_BIG_ENDIAN
>> 677 select WAR_R4600_V1_INDEX_ICACHEOP
>> 678 select WAR_R4600_V1_HIT_CACHEOP
>> 679 select WAR_R4600_V2_HIT_CACHEOP
>> 680 select MIPS_L1_CACHE_SHIFT_7
>> 681 help
>> 682 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 683 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 684 that runs on these, say Y here.
>> 685
>> 686 config SGI_IP27
>> 687 bool "SGI IP27 (Origin200/2000)"
>> 688 select ARCH_HAS_PHYS_TO_DMA
>> 689 select ARCH_SPARSEMEM_ENABLE
>> 690 select FW_ARC
>> 691 select FW_ARC64
>> 692 select ARC_CMDLINE_ONLY
>> 693 select BOOT_ELF64
>> 694 select DEFAULT_SGI_PARTITION
>> 695 select FORCE_PCI
>> 696 select SYS_HAS_EARLY_PRINTK
>> 697 select HAVE_PCI
>> 698 select IRQ_MIPS_CPU
>> 699 select IRQ_DOMAIN_HIERARCHY
>> 700 select NR_CPUS_DEFAULT_64
>> 701 select PCI_DRIVERS_GENERIC
>> 702 select PCI_XTALK_BRIDGE
>> 703 select SYS_HAS_CPU_R10000
>> 704 select SYS_SUPPORTS_64BIT_KERNEL
>> 705 select SYS_SUPPORTS_BIG_ENDIAN
>> 706 select SYS_SUPPORTS_NUMA
>> 707 select SYS_SUPPORTS_SMP
>> 708 select WAR_R10000_LLSC
>> 709 select MIPS_L1_CACHE_SHIFT_7
>> 710 select NUMA
>> 711 help
>> 712 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 713 workstations. To compile a Linux kernel that runs on these, say Y
>> 714 here.
>> 715
>> 716 config SGI_IP28
>> 717 bool "SGI IP28 (Indigo2 R10k)"
>> 718 select ARC_MEMORY
>> 719 select ARC_PROMLIB
>> 720 select FW_ARC
>> 721 select FW_ARC64
>> 722 select ARCH_MIGHT_HAVE_PC_SERIO
>> 723 select BOOT_ELF64
>> 724 select CEVT_R4K
>> 725 select CSRC_R4K
>> 726 select DEFAULT_SGI_PARTITION
>> 727 select DMA_NONCOHERENT
>> 728 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 729 select IRQ_MIPS_CPU
>> 730 select HAVE_EISA
>> 731 select I8253
>> 732 select I8259
>> 733 select SGI_HAS_I8042
>> 734 select SGI_HAS_INDYDOG
>> 735 select SGI_HAS_HAL2
>> 736 select SGI_HAS_SEEQ
>> 737 select SGI_HAS_WD93
>> 738 select SGI_HAS_ZILOG
>> 739 select SWAP_IO_SPACE
>> 740 select SYS_HAS_CPU_R10000
>> 741 select SYS_HAS_EARLY_PRINTK
>> 742 select SYS_SUPPORTS_64BIT_KERNEL
>> 743 select SYS_SUPPORTS_BIG_ENDIAN
>> 744 select WAR_R10000_LLSC
>> 745 select MIPS_L1_CACHE_SHIFT_7
>> 746 help
>> 747 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 748 kernel that runs on these, say Y here.
>> 749
>> 750 config SGI_IP30
>> 751 bool "SGI IP30 (Octane/Octane2)"
>> 752 select ARCH_HAS_PHYS_TO_DMA
>> 753 select FW_ARC
>> 754 select FW_ARC64
>> 755 select BOOT_ELF64
>> 756 select CEVT_R4K
>> 757 select CSRC_R4K
>> 758 select FORCE_PCI
>> 759 select SYNC_R4K if SMP
>> 760 select ZONE_DMA32
>> 761 select HAVE_PCI
>> 762 select IRQ_MIPS_CPU
>> 763 select IRQ_DOMAIN_HIERARCHY
>> 764 select PCI_DRIVERS_GENERIC
>> 765 select PCI_XTALK_BRIDGE
>> 766 select SYS_HAS_EARLY_PRINTK
>> 767 select SYS_HAS_CPU_R10000
>> 768 select SYS_SUPPORTS_64BIT_KERNEL
>> 769 select SYS_SUPPORTS_BIG_ENDIAN
>> 770 select SYS_SUPPORTS_SMP
>> 771 select WAR_R10000_LLSC
>> 772 select MIPS_L1_CACHE_SHIFT_7
>> 773 select ARC_MEMORY
>> 774 help
>> 775 These are the SGI Octane and Octane2 graphics workstations. To
>> 776 compile a Linux kernel that runs on these, say Y here.
>> 777
>> 778 config SGI_IP32
>> 779 bool "SGI IP32 (O2)"
>> 780 select ARC_MEMORY
>> 781 select ARC_PROMLIB
>> 782 select ARCH_HAS_PHYS_TO_DMA
>> 783 select FW_ARC
>> 784 select FW_ARC32
>> 785 select BOOT_ELF32
>> 786 select CEVT_R4K
>> 787 select CSRC_R4K
>> 788 select DMA_NONCOHERENT
>> 789 select HAVE_PCI
>> 790 select IRQ_MIPS_CPU
>> 791 select R5000_CPU_SCACHE
>> 792 select RM7000_CPU_SCACHE
>> 793 select SYS_HAS_CPU_R5000
>> 794 select SYS_HAS_CPU_R10000 if BROKEN
>> 795 select SYS_HAS_CPU_RM7000
>> 796 select SYS_HAS_CPU_NEVADA
>> 797 select SYS_SUPPORTS_64BIT_KERNEL
>> 798 select SYS_SUPPORTS_BIG_ENDIAN
>> 799 select WAR_ICACHE_REFILLS
>> 800 help
>> 801 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 802
>> 803 config SIBYTE_CRHINE
>> 804 bool "Sibyte BCM91120C-CRhine"
>> 805 select BOOT_ELF32
>> 806 select SIBYTE_BCM1120
>> 807 select SWAP_IO_SPACE
>> 808 select SYS_HAS_CPU_SB1
>> 809 select SYS_SUPPORTS_BIG_ENDIAN
>> 810 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 811
>> 812 config SIBYTE_CARMEL
>> 813 bool "Sibyte BCM91120x-Carmel"
>> 814 select BOOT_ELF32
>> 815 select SIBYTE_BCM1120
>> 816 select SWAP_IO_SPACE
>> 817 select SYS_HAS_CPU_SB1
>> 818 select SYS_SUPPORTS_BIG_ENDIAN
>> 819 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 820
>> 821 config SIBYTE_CRHONE
>> 822 bool "Sibyte BCM91125C-CRhone"
>> 823 select BOOT_ELF32
>> 824 select SIBYTE_BCM1125
>> 825 select SWAP_IO_SPACE
>> 826 select SYS_HAS_CPU_SB1
>> 827 select SYS_SUPPORTS_BIG_ENDIAN
>> 828 select SYS_SUPPORTS_HIGHMEM
>> 829 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 830
>> 831 config SIBYTE_RHONE
>> 832 bool "Sibyte BCM91125E-Rhone"
>> 833 select BOOT_ELF32
>> 834 select SIBYTE_BCM1125H
>> 835 select SWAP_IO_SPACE
>> 836 select SYS_HAS_CPU_SB1
>> 837 select SYS_SUPPORTS_BIG_ENDIAN
>> 838 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 839
>> 840 config SIBYTE_SWARM
>> 841 bool "Sibyte BCM91250A-SWARM"
>> 842 select BOOT_ELF32
>> 843 select HAVE_PATA_PLATFORM
>> 844 select SIBYTE_SB1250
>> 845 select SWAP_IO_SPACE
>> 846 select SYS_HAS_CPU_SB1
>> 847 select SYS_SUPPORTS_BIG_ENDIAN
>> 848 select SYS_SUPPORTS_HIGHMEM
>> 849 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 850 select ZONE_DMA32 if 64BIT
>> 851 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 852
>> 853 config SIBYTE_LITTLESUR
>> 854 bool "Sibyte BCM91250C2-LittleSur"
>> 855 select BOOT_ELF32
>> 856 select HAVE_PATA_PLATFORM
>> 857 select SIBYTE_SB1250
>> 858 select SWAP_IO_SPACE
>> 859 select SYS_HAS_CPU_SB1
>> 860 select SYS_SUPPORTS_BIG_ENDIAN
>> 861 select SYS_SUPPORTS_HIGHMEM
>> 862 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 863 select ZONE_DMA32 if 64BIT
>> 864
>> 865 config SIBYTE_SENTOSA
>> 866 bool "Sibyte BCM91250E-Sentosa"
>> 867 select BOOT_ELF32
>> 868 select SIBYTE_SB1250
>> 869 select SWAP_IO_SPACE
>> 870 select SYS_HAS_CPU_SB1
>> 871 select SYS_SUPPORTS_BIG_ENDIAN
>> 872 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 873 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 874
>> 875 config SIBYTE_BIGSUR
>> 876 bool "Sibyte BCM91480B-BigSur"
>> 877 select BOOT_ELF32
>> 878 select NR_CPUS_DEFAULT_4
>> 879 select SIBYTE_BCM1x80
>> 880 select SWAP_IO_SPACE
>> 881 select SYS_HAS_CPU_SB1
>> 882 select SYS_SUPPORTS_BIG_ENDIAN
>> 883 select SYS_SUPPORTS_HIGHMEM
>> 884 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 885 select ZONE_DMA32 if 64BIT
>> 886 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 887
>> 888 config SNI_RM
>> 889 bool "SNI RM200/300/400"
>> 890 select ARC_MEMORY
>> 891 select ARC_PROMLIB
>> 892 select FW_ARC if CPU_LITTLE_ENDIAN
>> 893 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 894 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 895 select ARCH_MAY_HAVE_PC_FDC
>> 896 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 897 select ARCH_MIGHT_HAVE_PC_SERIO
>> 898 select BOOT_ELF32
>> 899 select CEVT_R4K
>> 900 select CSRC_R4K
>> 901 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 902 select DMA_NONCOHERENT
>> 903 select GENERIC_ISA_DMA
>> 904 select HAVE_EISA
>> 905 select HAVE_PCSPKR_PLATFORM
>> 906 select HAVE_PCI
>> 907 select IRQ_MIPS_CPU
>> 908 select I8253
>> 909 select I8259
>> 910 select ISA
>> 911 select MIPS_L1_CACHE_SHIFT_6
>> 912 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 913 select SYS_HAS_CPU_R4X00
>> 914 select SYS_HAS_CPU_R5000
>> 915 select SYS_HAS_CPU_R10000
>> 916 select R5000_CPU_SCACHE
>> 917 select SYS_HAS_EARLY_PRINTK
>> 918 select SYS_SUPPORTS_32BIT_KERNEL
>> 919 select SYS_SUPPORTS_64BIT_KERNEL
>> 920 select SYS_SUPPORTS_BIG_ENDIAN
>> 921 select SYS_SUPPORTS_HIGHMEM
>> 922 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 923 select WAR_R4600_V2_HIT_CACHEOP
>> 924 help
>> 925 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 926 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 927 Technology and now in turn merged with Fujitsu. Say Y here to
>> 928 support this machine type.
>> 929
>> 930 config MACH_TX39XX
>> 931 bool "Toshiba TX39 series based machines"
>> 932
>> 933 config MACH_TX49XX
>> 934 bool "Toshiba TX49 series based machines"
>> 935 select WAR_TX49XX_ICACHE_INDEX_INV
>> 936
>> 937 config MIKROTIK_RB532
>> 938 bool "Mikrotik RB532 boards"
>> 939 select CEVT_R4K
>> 940 select CSRC_R4K
>> 941 select DMA_NONCOHERENT
>> 942 select HAVE_PCI
>> 943 select IRQ_MIPS_CPU
>> 944 select SYS_HAS_CPU_MIPS32_R1
>> 945 select SYS_SUPPORTS_32BIT_KERNEL
>> 946 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 947 select SWAP_IO_SPACE
>> 948 select BOOT_RAW
>> 949 select GPIOLIB
>> 950 select MIPS_L1_CACHE_SHIFT_4
>> 951 help
>> 952 Support the Mikrotik(tm) RouterBoard 532 series,
>> 953 based on the IDT RC32434 SoC.
>> 954
>> 955 config CAVIUM_OCTEON_SOC
>> 956 bool "Cavium Networks Octeon SoC based boards"
>> 957 select CEVT_R4K
>> 958 select ARCH_HAS_PHYS_TO_DMA
>> 959 select HAVE_RAPIDIO
>> 960 select PHYS_ADDR_T_64BIT
>> 961 select SYS_SUPPORTS_64BIT_KERNEL
>> 962 select SYS_SUPPORTS_BIG_ENDIAN
>> 963 select EDAC_SUPPORT
>> 964 select EDAC_ATOMIC_SCRUB
>> 965 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 966 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 967 select SYS_HAS_EARLY_PRINTK
>> 968 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 969 select HAVE_PCI
>> 970 select HAVE_PLAT_DELAY
>> 971 select HAVE_PLAT_FW_INIT_CMDLINE
>> 972 select HAVE_PLAT_MEMCPY
>> 973 select ZONE_DMA32
>> 974 select GPIOLIB
>> 975 select USE_OF
>> 976 select ARCH_SPARSEMEM_ENABLE
>> 977 select SYS_SUPPORTS_SMP
>> 978 select NR_CPUS_DEFAULT_64
>> 979 select MIPS_NR_CPU_NR_MAP_1024
>> 980 select BUILTIN_DTB
>> 981 select MTD
>> 982 select MTD_COMPLEX_MAPPINGS
>> 983 select SWIOTLB
>> 984 select SYS_SUPPORTS_RELOCATABLE
>> 985 help
>> 986 This option supports all of the Octeon reference boards from Cavium
>> 987 Networks. It builds a kernel that dynamically determines the Octeon
>> 988 CPU type and supports all known board reference implementations.
>> 989 Some of the supported boards are:
>> 990 EBT3000
>> 991 EBH3000
>> 992 EBH3100
>> 993 Thunder
>> 994 Kodama
>> 995 Hikari
>> 996 Say Y here for most Octeon reference boards.
>> 997
>> 998 endchoice
>> 999
>> 1000 source "arch/mips/alchemy/Kconfig"
>> 1001 source "arch/mips/ath25/Kconfig"
>> 1002 source "arch/mips/ath79/Kconfig"
>> 1003 source "arch/mips/bcm47xx/Kconfig"
>> 1004 source "arch/mips/bcm63xx/Kconfig"
>> 1005 source "arch/mips/bmips/Kconfig"
>> 1006 source "arch/mips/generic/Kconfig"
>> 1007 source "arch/mips/ingenic/Kconfig"
>> 1008 source "arch/mips/jazz/Kconfig"
>> 1009 source "arch/mips/lantiq/Kconfig"
>> 1010 source "arch/mips/pic32/Kconfig"
>> 1011 source "arch/mips/ralink/Kconfig"
>> 1012 source "arch/mips/sgi-ip27/Kconfig"
>> 1013 source "arch/mips/sibyte/Kconfig"
>> 1014 source "arch/mips/txx9/Kconfig"
>> 1015 source "arch/mips/vr41xx/Kconfig"
>> 1016 source "arch/mips/cavium-octeon/Kconfig"
>> 1017 source "arch/mips/loongson2ef/Kconfig"
>> 1018 source "arch/mips/loongson32/Kconfig"
>> 1019 source "arch/mips/loongson64/Kconfig"
127 1020
128 config ARCH_HIBERNATION_POSSIBLE !! 1021 endmenu
129 def_bool y if SPARC64 <<
130 1022
131 config AUDIT_ARCH !! 1023 config GENERIC_HWEIGHT
132 bool 1024 bool
133 default y 1025 default y
134 1026
135 config MMU !! 1027 config GENERIC_CALIBRATE_DELAY
136 bool 1028 bool
137 default y 1029 default y
138 1030
139 config HIGHMEM !! 1031 config SCHED_OMIT_FRAME_POINTER
140 bool 1032 bool
141 default y if SPARC32 !! 1033 default y
142 select KMAP_LOCAL <<
143 1034
144 config PGTABLE_LEVELS !! 1035 #
145 default 4 if 64BIT !! 1036 # Select some configuration options automatically based on user selections.
146 default 3 !! 1037 #
>> 1038 config FW_ARC
>> 1039 bool
>> 1040
>> 1041 config ARCH_MAY_HAVE_PC_FDC
>> 1042 bool
>> 1043
>> 1044 config BOOT_RAW
>> 1045 bool
>> 1046
>> 1047 config CEVT_BCM1480
>> 1048 bool
>> 1049
>> 1050 config CEVT_DS1287
>> 1051 bool
>> 1052
>> 1053 config CEVT_GT641XX
>> 1054 bool
>> 1055
>> 1056 config CEVT_R4K
>> 1057 bool
>> 1058
>> 1059 config CEVT_SB1250
>> 1060 bool
>> 1061
>> 1062 config CEVT_TXX9
>> 1063 bool
>> 1064
>> 1065 config CSRC_BCM1480
>> 1066 bool
>> 1067
>> 1068 config CSRC_IOASIC
>> 1069 bool
>> 1070
>> 1071 config CSRC_R4K
>> 1072 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
>> 1073 bool
>> 1074
>> 1075 config CSRC_SB1250
>> 1076 bool
>> 1077
>> 1078 config MIPS_CLOCK_VSYSCALL
>> 1079 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1080
>> 1081 config GPIO_TXX9
>> 1082 select GPIOLIB
>> 1083 bool
>> 1084
>> 1085 config FW_CFE
>> 1086 bool
147 1087
148 config ARCH_SUPPORTS_UPROBES 1088 config ARCH_SUPPORTS_UPROBES
149 def_bool y if SPARC64 !! 1089 bool
150 1090
151 menu "Processor type and features" !! 1091 config DMA_PERDEV_COHERENT
>> 1092 bool
>> 1093 select ARCH_HAS_SETUP_DMA_OPS
>> 1094 select DMA_NONCOHERENT
152 1095
153 config SMP !! 1096 config DMA_NONCOHERENT
154 bool "Symmetric multi-processing suppo !! 1097 bool
155 help !! 1098 #
156 This enables support for systems wit !! 1099 # MIPS allows mixing "slightly different" Cacheability and Coherency
157 a system with only one CPU, say N. I !! 1100 # Attribute bits. It is believed that the uncached access through
158 than one CPU, say Y. !! 1101 # KSEG1 and the implementation specific "uncached accelerated" used
>> 1102 # by pgprot_writcombine can be mixed, and the latter sometimes provides
>> 1103 # significant advantages.
>> 1104 #
>> 1105 select ARCH_HAS_DMA_WRITE_COMBINE
>> 1106 select ARCH_HAS_DMA_PREP_COHERENT
>> 1107 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
>> 1108 select ARCH_HAS_DMA_SET_UNCACHED
>> 1109 select DMA_NONCOHERENT_MMAP
>> 1110 select NEED_DMA_MAP_STATE
159 1111
160 If you say N here, the kernel will r !! 1112 config SYS_HAS_EARLY_PRINTK
161 machines, but will use only one CPU !! 1113 bool
162 you say Y here, the kernel will run <<
163 uniprocessor machines. On a uniproce <<
164 will run faster if you say N here. <<
165 1114
166 People using multiprocessor machines !! 1115 config SYS_SUPPORTS_HOTPLUG_CPU
167 Y to "Enhanced Real Time Clock Suppo !! 1116 bool
168 Management" code will be disabled if <<
169 1117
170 See also <file:Documentation/admin-g !! 1118 config MIPS_BONITO64
171 available at <https://www.tldp.org/d !! 1119 bool
172 1120
173 If you don't know what to do here, s !! 1121 config MIPS_MSC
>> 1122 bool
174 1123
175 config NR_CPUS !! 1124 config SYNC_R4K
176 int "Maximum number of CPUs" !! 1125 bool
177 depends on SMP <<
178 range 2 32 if SPARC32 <<
179 range 2 4096 if SPARC64 <<
180 default 32 if SPARC32 <<
181 default 4096 if SPARC64 <<
182 1126
183 source "kernel/Kconfig.hz" !! 1127 config NO_IOPORT_MAP
>> 1128 def_bool n
184 1129
185 config GENERIC_HWEIGHT !! 1130 config GENERIC_CSUM
>> 1131 def_bool CPU_NO_LOAD_STORE_LR
>> 1132
>> 1133 config GENERIC_ISA_DMA
186 bool 1134 bool
187 default y !! 1135 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1136 select ISA_DMA_API
188 1137
189 config GENERIC_CALIBRATE_DELAY !! 1138 config GENERIC_ISA_DMA_SUPPORT_BROKEN
190 bool 1139 bool
191 default y !! 1140 select GENERIC_ISA_DMA
192 1141
193 config ARCH_MAY_HAVE_PC_FDC !! 1142 config HAVE_PLAT_DELAY
>> 1143 bool
>> 1144
>> 1145 config HAVE_PLAT_FW_INIT_CMDLINE
>> 1146 bool
>> 1147
>> 1148 config HAVE_PLAT_MEMCPY
>> 1149 bool
>> 1150
>> 1151 config ISA_DMA_API
194 bool 1152 bool
195 default y <<
196 1153
197 config EMULATED_CMPXCHG !! 1154 config SYS_SUPPORTS_RELOCATABLE
198 bool 1155 bool
199 default y if SPARC32 <<
200 help 1156 help
201 Sparc32 does not have a CAS instruct !! 1157 Selected if the platform supports relocating the kernel.
202 is emulated, and therefore it is not !! 1158 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1159 to allow access to command line and entropy sources.
>> 1160
>> 1161 #
>> 1162 # Endianness selection. Sufficiently obscure so many users don't know what to
>> 1163 # answer,so we try hard to limit the available choices. Also the use of a
>> 1164 # choice statement should be more obvious to the user.
>> 1165 #
>> 1166 choice
>> 1167 prompt "Endianness selection"
>> 1168 help
>> 1169 Some MIPS machines can be configured for either little or big endian
>> 1170 byte order. These modes require different kernels and a different
>> 1171 Linux distribution. In general there is one preferred byteorder for a
>> 1172 particular system but some systems are just as commonly used in the
>> 1173 one or the other endianness.
>> 1174
>> 1175 config CPU_BIG_ENDIAN
>> 1176 bool "Big endian"
>> 1177 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1178
>> 1179 config CPU_LITTLE_ENDIAN
>> 1180 bool "Little endian"
>> 1181 depends on SYS_SUPPORTS_LITTLE_ENDIAN
>> 1182
>> 1183 endchoice
203 1184
204 # Makefile helpers !! 1185 config EXPORT_UASM
205 config SPARC32_SMP <<
206 bool 1186 bool
207 default y <<
208 depends on SPARC32 && SMP <<
209 1187
210 config SPARC64_SMP !! 1188 config SYS_SUPPORTS_APM_EMULATION
211 bool 1189 bool
212 default y <<
213 depends on SPARC64 && SMP <<
214 1190
215 config EARLYFB !! 1191 config SYS_SUPPORTS_BIG_ENDIAN
216 bool "Support for early boot text cons !! 1192 bool
>> 1193
>> 1194 config SYS_SUPPORTS_LITTLE_ENDIAN
>> 1195 bool
>> 1196
>> 1197 config MIPS_HUGE_TLB_SUPPORT
>> 1198 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
>> 1199
>> 1200 config IRQ_MSP_SLP
>> 1201 bool
>> 1202
>> 1203 config IRQ_MSP_CIC
>> 1204 bool
>> 1205
>> 1206 config IRQ_TXX9
>> 1207 bool
>> 1208
>> 1209 config IRQ_GT641XX
>> 1210 bool
>> 1211
>> 1212 config PCI_GT64XXX_PCI0
>> 1213 bool
>> 1214
>> 1215 config PCI_XTALK_BRIDGE
>> 1216 bool
>> 1217
>> 1218 config NO_EXCEPT_FILL
>> 1219 bool
>> 1220
>> 1221 config MIPS_SPRAM
>> 1222 bool
>> 1223
>> 1224 config SWAP_IO_SPACE
>> 1225 bool
>> 1226
>> 1227 config SGI_HAS_INDYDOG
>> 1228 bool
>> 1229
>> 1230 config SGI_HAS_HAL2
>> 1231 bool
>> 1232
>> 1233 config SGI_HAS_SEEQ
>> 1234 bool
>> 1235
>> 1236 config SGI_HAS_WD93
>> 1237 bool
>> 1238
>> 1239 config SGI_HAS_ZILOG
>> 1240 bool
>> 1241
>> 1242 config SGI_HAS_I8042
>> 1243 bool
>> 1244
>> 1245 config DEFAULT_SGI_PARTITION
>> 1246 bool
>> 1247
>> 1248 config FW_ARC32
>> 1249 bool
>> 1250
>> 1251 config FW_SNIPROM
>> 1252 bool
>> 1253
>> 1254 config BOOT_ELF32
>> 1255 bool
>> 1256
>> 1257 config MIPS_L1_CACHE_SHIFT_4
>> 1258 bool
>> 1259
>> 1260 config MIPS_L1_CACHE_SHIFT_5
>> 1261 bool
>> 1262
>> 1263 config MIPS_L1_CACHE_SHIFT_6
>> 1264 bool
>> 1265
>> 1266 config MIPS_L1_CACHE_SHIFT_7
>> 1267 bool
>> 1268
>> 1269 config MIPS_L1_CACHE_SHIFT
>> 1270 int
>> 1271 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1272 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1273 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1274 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1275 default "5"
>> 1276
>> 1277 config ARC_CMDLINE_ONLY
>> 1278 bool
>> 1279
>> 1280 config ARC_CONSOLE
>> 1281 bool "ARC console support"
>> 1282 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1283
>> 1284 config ARC_MEMORY
>> 1285 bool
>> 1286
>> 1287 config ARC_PROMLIB
>> 1288 bool
>> 1289
>> 1290 config FW_ARC64
>> 1291 bool
>> 1292
>> 1293 config BOOT_ELF64
>> 1294 bool
>> 1295
>> 1296 menu "CPU selection"
>> 1297
>> 1298 choice
>> 1299 prompt "CPU type"
>> 1300 default CPU_R4X00
>> 1301
>> 1302 config CPU_LOONGSON64
>> 1303 bool "Loongson 64-bit CPU"
>> 1304 depends on SYS_HAS_CPU_LOONGSON64
>> 1305 select ARCH_HAS_PHYS_TO_DMA
>> 1306 select CPU_MIPSR2
>> 1307 select CPU_HAS_PREFETCH
>> 1308 select CPU_SUPPORTS_64BIT_KERNEL
>> 1309 select CPU_SUPPORTS_HIGHMEM
>> 1310 select CPU_SUPPORTS_HUGEPAGES
>> 1311 select CPU_SUPPORTS_MSA
>> 1312 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
>> 1313 select CPU_MIPSR2_IRQ_VI
>> 1314 select WEAK_ORDERING
>> 1315 select WEAK_REORDERING_BEYOND_LLSC
>> 1316 select MIPS_ASID_BITS_VARIABLE
>> 1317 select MIPS_PGD_C0_CONTEXT
>> 1318 select MIPS_L1_CACHE_SHIFT_6
>> 1319 select MIPS_FP_SUPPORT
>> 1320 select GPIOLIB
>> 1321 select SWIOTLB
>> 1322 select HAVE_KVM
>> 1323 help
>> 1324 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
>> 1325 cores implements the MIPS64R2 instruction set with many extensions,
>> 1326 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
>> 1327 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
>> 1328 Loongson-2E/2F is not covered here and will be removed in future.
>> 1329
>> 1330 config LOONGSON3_ENHANCEMENT
>> 1331 bool "New Loongson-3 CPU Enhancements"
>> 1332 default n
>> 1333 depends on CPU_LOONGSON64
>> 1334 help
>> 1335 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
>> 1336 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1337 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
>> 1338 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1339 Fast TLB refill support, etc.
>> 1340
>> 1341 This option enable those enhancements which are not probed at run
>> 1342 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1343 please say 'N' here. If you want a high-performance kernel to run on
>> 1344 new Loongson-3 machines only, please say 'Y' here.
>> 1345
>> 1346 config CPU_LOONGSON3_WORKAROUNDS
>> 1347 bool "Old Loongson-3 LLSC Workarounds"
>> 1348 default y if SMP
>> 1349 depends on CPU_LOONGSON64
>> 1350 help
>> 1351 Loongson-3 processors have the llsc issues which require workarounds.
>> 1352 Without workarounds the system may hang unexpectedly.
>> 1353
>> 1354 Newer Loongson-3 will fix these issues and no workarounds are needed.
>> 1355 The workarounds have no significant side effect on them but may
>> 1356 decrease the performance of the system so this option should be
>> 1357 disabled unless the kernel is intended to be run on old systems.
>> 1358
>> 1359 If unsure, please say Y.
>> 1360
>> 1361 config CPU_LOONGSON3_CPUCFG_EMULATION
>> 1362 bool "Emulate the CPUCFG instruction on older Loongson cores"
217 default y 1363 default y
218 depends on SPARC64 !! 1364 depends on CPU_LOONGSON64
219 select FONT_SUN8x16 <<
220 select FONT_SUPPORT <<
221 help 1365 help
222 Say Y here to enable a faster early !! 1366 Loongson-3A R4 and newer have the CPUCFG instruction available for
>> 1367 userland to query CPU capabilities, much like CPUID on x86. This
>> 1368 option provides emulation of the instruction on older Loongson
>> 1369 cores, back to Loongson-3A1000.
223 1370
224 config HOTPLUG_CPU !! 1371 If unsure, please say Y.
225 bool "Support for hot-pluggable CPUs" !! 1372
226 depends on SPARC64 && SMP !! 1373 config CPU_LOONGSON2E
>> 1374 bool "Loongson 2E"
>> 1375 depends on SYS_HAS_CPU_LOONGSON2E
>> 1376 select CPU_LOONGSON2EF
227 help 1377 help
228 Say Y here to experiment with turnin !! 1378 The Loongson 2E processor implements the MIPS III instruction set
229 can be controlled through /sys/devic !! 1379 with many extensions.
230 Say N if you want to disable CPU hot <<
231 1380
232 if SPARC64 !! 1381 It has an internal FPGA northbridge, which is compatible to
233 source "drivers/cpufreq/Kconfig" !! 1382 bonito64.
234 endif !! 1383
>> 1384 config CPU_LOONGSON2F
>> 1385 bool "Loongson 2F"
>> 1386 depends on SYS_HAS_CPU_LOONGSON2F
>> 1387 select CPU_LOONGSON2EF
>> 1388 select GPIOLIB
>> 1389 help
>> 1390 The Loongson 2F processor implements the MIPS III instruction set
>> 1391 with many extensions.
>> 1392
>> 1393 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1394 have a similar programming interface with FPGA northbridge used in
>> 1395 Loongson2E.
>> 1396
>> 1397 config CPU_LOONGSON1B
>> 1398 bool "Loongson 1B"
>> 1399 depends on SYS_HAS_CPU_LOONGSON1B
>> 1400 select CPU_LOONGSON32
>> 1401 select LEDS_GPIO_REGISTER
>> 1402 help
>> 1403 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1404 Release 1 instruction set and part of the MIPS32 Release 2
>> 1405 instruction set.
>> 1406
>> 1407 config CPU_LOONGSON1C
>> 1408 bool "Loongson 1C"
>> 1409 depends on SYS_HAS_CPU_LOONGSON1C
>> 1410 select CPU_LOONGSON32
>> 1411 select LEDS_GPIO_REGISTER
>> 1412 help
>> 1413 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1414 Release 1 instruction set and part of the MIPS32 Release 2
>> 1415 instruction set.
>> 1416
>> 1417 config CPU_MIPS32_R1
>> 1418 bool "MIPS32 Release 1"
>> 1419 depends on SYS_HAS_CPU_MIPS32_R1
>> 1420 select CPU_HAS_PREFETCH
>> 1421 select CPU_SUPPORTS_32BIT_KERNEL
>> 1422 select CPU_SUPPORTS_HIGHMEM
>> 1423 help
>> 1424 Choose this option to build a kernel for release 1 or later of the
>> 1425 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1426 MIPS processor are based on a MIPS32 processor. If you know the
>> 1427 specific type of processor in your system, choose those that one
>> 1428 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1429 Release 2 of the MIPS32 architecture is available since several
>> 1430 years so chances are you even have a MIPS32 Release 2 processor
>> 1431 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1432 performance.
>> 1433
>> 1434 config CPU_MIPS32_R2
>> 1435 bool "MIPS32 Release 2"
>> 1436 depends on SYS_HAS_CPU_MIPS32_R2
>> 1437 select CPU_HAS_PREFETCH
>> 1438 select CPU_SUPPORTS_32BIT_KERNEL
>> 1439 select CPU_SUPPORTS_HIGHMEM
>> 1440 select CPU_SUPPORTS_MSA
>> 1441 select HAVE_KVM
>> 1442 help
>> 1443 Choose this option to build a kernel for release 2 or later of the
>> 1444 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1445 MIPS processor are based on a MIPS32 processor. If you know the
>> 1446 specific type of processor in your system, choose those that one
>> 1447 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1448
>> 1449 config CPU_MIPS32_R5
>> 1450 bool "MIPS32 Release 5"
>> 1451 depends on SYS_HAS_CPU_MIPS32_R5
>> 1452 select CPU_HAS_PREFETCH
>> 1453 select CPU_SUPPORTS_32BIT_KERNEL
>> 1454 select CPU_SUPPORTS_HIGHMEM
>> 1455 select CPU_SUPPORTS_MSA
>> 1456 select HAVE_KVM
>> 1457 select MIPS_O32_FP64_SUPPORT
>> 1458 help
>> 1459 Choose this option to build a kernel for release 5 or later of the
>> 1460 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1461 family, are based on a MIPS32r5 processor. If you own an older
>> 1462 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1463
>> 1464 config CPU_MIPS32_R6
>> 1465 bool "MIPS32 Release 6"
>> 1466 depends on SYS_HAS_CPU_MIPS32_R6
>> 1467 select CPU_HAS_PREFETCH
>> 1468 select CPU_NO_LOAD_STORE_LR
>> 1469 select CPU_SUPPORTS_32BIT_KERNEL
>> 1470 select CPU_SUPPORTS_HIGHMEM
>> 1471 select CPU_SUPPORTS_MSA
>> 1472 select HAVE_KVM
>> 1473 select MIPS_O32_FP64_SUPPORT
>> 1474 help
>> 1475 Choose this option to build a kernel for release 6 or later of the
>> 1476 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1477 family, are based on a MIPS32r6 processor. If you own an older
>> 1478 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1479
>> 1480 config CPU_MIPS64_R1
>> 1481 bool "MIPS64 Release 1"
>> 1482 depends on SYS_HAS_CPU_MIPS64_R1
>> 1483 select CPU_HAS_PREFETCH
>> 1484 select CPU_SUPPORTS_32BIT_KERNEL
>> 1485 select CPU_SUPPORTS_64BIT_KERNEL
>> 1486 select CPU_SUPPORTS_HIGHMEM
>> 1487 select CPU_SUPPORTS_HUGEPAGES
>> 1488 help
>> 1489 Choose this option to build a kernel for release 1 or later of the
>> 1490 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1491 MIPS processor are based on a MIPS64 processor. If you know the
>> 1492 specific type of processor in your system, choose those that one
>> 1493 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1494 Release 2 of the MIPS64 architecture is available since several
>> 1495 years so chances are you even have a MIPS64 Release 2 processor
>> 1496 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1497 performance.
>> 1498
>> 1499 config CPU_MIPS64_R2
>> 1500 bool "MIPS64 Release 2"
>> 1501 depends on SYS_HAS_CPU_MIPS64_R2
>> 1502 select CPU_HAS_PREFETCH
>> 1503 select CPU_SUPPORTS_32BIT_KERNEL
>> 1504 select CPU_SUPPORTS_64BIT_KERNEL
>> 1505 select CPU_SUPPORTS_HIGHMEM
>> 1506 select CPU_SUPPORTS_HUGEPAGES
>> 1507 select CPU_SUPPORTS_MSA
>> 1508 select HAVE_KVM
>> 1509 help
>> 1510 Choose this option to build a kernel for release 2 or later of the
>> 1511 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1512 MIPS processor are based on a MIPS64 processor. If you know the
>> 1513 specific type of processor in your system, choose those that one
>> 1514 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1515
>> 1516 config CPU_MIPS64_R5
>> 1517 bool "MIPS64 Release 5"
>> 1518 depends on SYS_HAS_CPU_MIPS64_R5
>> 1519 select CPU_HAS_PREFETCH
>> 1520 select CPU_SUPPORTS_32BIT_KERNEL
>> 1521 select CPU_SUPPORTS_64BIT_KERNEL
>> 1522 select CPU_SUPPORTS_HIGHMEM
>> 1523 select CPU_SUPPORTS_HUGEPAGES
>> 1524 select CPU_SUPPORTS_MSA
>> 1525 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1526 select HAVE_KVM
>> 1527 help
>> 1528 Choose this option to build a kernel for release 5 or later of the
>> 1529 MIPS64 architecture. This is a intermediate MIPS architecture
>> 1530 release partly implementing release 6 features. Though there is no
>> 1531 any hardware known to be based on this release.
>> 1532
>> 1533 config CPU_MIPS64_R6
>> 1534 bool "MIPS64 Release 6"
>> 1535 depends on SYS_HAS_CPU_MIPS64_R6
>> 1536 select CPU_HAS_PREFETCH
>> 1537 select CPU_NO_LOAD_STORE_LR
>> 1538 select CPU_SUPPORTS_32BIT_KERNEL
>> 1539 select CPU_SUPPORTS_64BIT_KERNEL
>> 1540 select CPU_SUPPORTS_HIGHMEM
>> 1541 select CPU_SUPPORTS_HUGEPAGES
>> 1542 select CPU_SUPPORTS_MSA
>> 1543 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1544 select HAVE_KVM
>> 1545 help
>> 1546 Choose this option to build a kernel for release 6 or later of the
>> 1547 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1548 family, are based on a MIPS64r6 processor. If you own an older
>> 1549 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1550
>> 1551 config CPU_P5600
>> 1552 bool "MIPS Warrior P5600"
>> 1553 depends on SYS_HAS_CPU_P5600
>> 1554 select CPU_HAS_PREFETCH
>> 1555 select CPU_SUPPORTS_32BIT_KERNEL
>> 1556 select CPU_SUPPORTS_HIGHMEM
>> 1557 select CPU_SUPPORTS_MSA
>> 1558 select CPU_SUPPORTS_CPUFREQ
>> 1559 select CPU_MIPSR2_IRQ_VI
>> 1560 select CPU_MIPSR2_IRQ_EI
>> 1561 select HAVE_KVM
>> 1562 select MIPS_O32_FP64_SUPPORT
>> 1563 help
>> 1564 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
>> 1565 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
>> 1566 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
>> 1567 level features like up to six P5600 calculation cores, CM2 with L2
>> 1568 cache, IOCU/IOMMU (though might be unused depending on the system-
>> 1569 specific IP core configuration), GIC, CPC, virtualisation module,
>> 1570 eJTAG and PDtrace.
>> 1571
>> 1572 config CPU_R3000
>> 1573 bool "R3000"
>> 1574 depends on SYS_HAS_CPU_R3000
>> 1575 select CPU_HAS_WB
>> 1576 select CPU_R3K_TLB
>> 1577 select CPU_SUPPORTS_32BIT_KERNEL
>> 1578 select CPU_SUPPORTS_HIGHMEM
>> 1579 help
>> 1580 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1581 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1582 *not* work on R4000 machines and vice versa. However, since most
>> 1583 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1584 might be a safe bet. If the resulting kernel does not work,
>> 1585 try to recompile with R3000.
>> 1586
>> 1587 config CPU_TX39XX
>> 1588 bool "R39XX"
>> 1589 depends on SYS_HAS_CPU_TX39XX
>> 1590 select CPU_SUPPORTS_32BIT_KERNEL
>> 1591 select CPU_R3K_TLB
>> 1592
>> 1593 config CPU_VR41XX
>> 1594 bool "R41xx"
>> 1595 depends on SYS_HAS_CPU_VR41XX
>> 1596 select CPU_SUPPORTS_32BIT_KERNEL
>> 1597 select CPU_SUPPORTS_64BIT_KERNEL
>> 1598 help
>> 1599 The options selects support for the NEC VR4100 series of processors.
>> 1600 Only choose this option if you have one of these processors as a
>> 1601 kernel built with this option will not run on any other type of
>> 1602 processor or vice versa.
>> 1603
>> 1604 config CPU_R4300
>> 1605 bool "R4300"
>> 1606 depends on SYS_HAS_CPU_R4300
>> 1607 select CPU_SUPPORTS_32BIT_KERNEL
>> 1608 select CPU_SUPPORTS_64BIT_KERNEL
>> 1609 help
>> 1610 MIPS Technologies R4300-series processors.
>> 1611
>> 1612 config CPU_R4X00
>> 1613 bool "R4x00"
>> 1614 depends on SYS_HAS_CPU_R4X00
>> 1615 select CPU_SUPPORTS_32BIT_KERNEL
>> 1616 select CPU_SUPPORTS_64BIT_KERNEL
>> 1617 select CPU_SUPPORTS_HUGEPAGES
>> 1618 help
>> 1619 MIPS Technologies R4000-series processors other than 4300, including
>> 1620 the R4000, R4400, R4600, and 4700.
>> 1621
>> 1622 config CPU_TX49XX
>> 1623 bool "R49XX"
>> 1624 depends on SYS_HAS_CPU_TX49XX
>> 1625 select CPU_HAS_PREFETCH
>> 1626 select CPU_SUPPORTS_32BIT_KERNEL
>> 1627 select CPU_SUPPORTS_64BIT_KERNEL
>> 1628 select CPU_SUPPORTS_HUGEPAGES
>> 1629
>> 1630 config CPU_R5000
>> 1631 bool "R5000"
>> 1632 depends on SYS_HAS_CPU_R5000
>> 1633 select CPU_SUPPORTS_32BIT_KERNEL
>> 1634 select CPU_SUPPORTS_64BIT_KERNEL
>> 1635 select CPU_SUPPORTS_HUGEPAGES
>> 1636 help
>> 1637 MIPS Technologies R5000-series processors other than the Nevada.
235 1638
236 config US3_MC !! 1639 config CPU_R5500
237 tristate "UltraSPARC-III Memory Contro !! 1640 bool "R5500"
238 depends on SPARC64 !! 1641 depends on SYS_HAS_CPU_R5500
>> 1642 select CPU_SUPPORTS_32BIT_KERNEL
>> 1643 select CPU_SUPPORTS_64BIT_KERNEL
>> 1644 select CPU_SUPPORTS_HUGEPAGES
>> 1645 help
>> 1646 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1647 instruction set.
>> 1648
>> 1649 config CPU_NEVADA
>> 1650 bool "RM52xx"
>> 1651 depends on SYS_HAS_CPU_NEVADA
>> 1652 select CPU_SUPPORTS_32BIT_KERNEL
>> 1653 select CPU_SUPPORTS_64BIT_KERNEL
>> 1654 select CPU_SUPPORTS_HUGEPAGES
>> 1655 help
>> 1656 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1657
>> 1658 config CPU_R10000
>> 1659 bool "R10000"
>> 1660 depends on SYS_HAS_CPU_R10000
>> 1661 select CPU_HAS_PREFETCH
>> 1662 select CPU_SUPPORTS_32BIT_KERNEL
>> 1663 select CPU_SUPPORTS_64BIT_KERNEL
>> 1664 select CPU_SUPPORTS_HIGHMEM
>> 1665 select CPU_SUPPORTS_HUGEPAGES
>> 1666 help
>> 1667 MIPS Technologies R10000-series processors.
>> 1668
>> 1669 config CPU_RM7000
>> 1670 bool "RM7000"
>> 1671 depends on SYS_HAS_CPU_RM7000
>> 1672 select CPU_HAS_PREFETCH
>> 1673 select CPU_SUPPORTS_32BIT_KERNEL
>> 1674 select CPU_SUPPORTS_64BIT_KERNEL
>> 1675 select CPU_SUPPORTS_HIGHMEM
>> 1676 select CPU_SUPPORTS_HUGEPAGES
>> 1677
>> 1678 config CPU_SB1
>> 1679 bool "SB1"
>> 1680 depends on SYS_HAS_CPU_SB1
>> 1681 select CPU_SUPPORTS_32BIT_KERNEL
>> 1682 select CPU_SUPPORTS_64BIT_KERNEL
>> 1683 select CPU_SUPPORTS_HIGHMEM
>> 1684 select CPU_SUPPORTS_HUGEPAGES
>> 1685 select WEAK_ORDERING
>> 1686
>> 1687 config CPU_CAVIUM_OCTEON
>> 1688 bool "Cavium Octeon processor"
>> 1689 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1690 select CPU_HAS_PREFETCH
>> 1691 select CPU_SUPPORTS_64BIT_KERNEL
>> 1692 select WEAK_ORDERING
>> 1693 select CPU_SUPPORTS_HIGHMEM
>> 1694 select CPU_SUPPORTS_HUGEPAGES
>> 1695 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1696 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1697 select MIPS_L1_CACHE_SHIFT_7
>> 1698 select HAVE_KVM
>> 1699 help
>> 1700 The Cavium Octeon processor is a highly integrated chip containing
>> 1701 many ethernet hardware widgets for networking tasks. The processor
>> 1702 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1703 Full details can be found at http://www.caviumnetworks.com.
>> 1704
>> 1705 config CPU_BMIPS
>> 1706 bool "Broadcom BMIPS"
>> 1707 depends on SYS_HAS_CPU_BMIPS
>> 1708 select CPU_MIPS32
>> 1709 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1710 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1711 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1712 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1713 select CPU_SUPPORTS_32BIT_KERNEL
>> 1714 select DMA_NONCOHERENT
>> 1715 select IRQ_MIPS_CPU
>> 1716 select SWAP_IO_SPACE
>> 1717 select WEAK_ORDERING
>> 1718 select CPU_SUPPORTS_HIGHMEM
>> 1719 select CPU_HAS_PREFETCH
>> 1720 select CPU_SUPPORTS_CPUFREQ
>> 1721 select MIPS_EXTERNAL_TIMER
>> 1722 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
>> 1723 help
>> 1724 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1725
>> 1726 endchoice
>> 1727
>> 1728 config CPU_MIPS32_3_5_FEATURES
>> 1729 bool "MIPS32 Release 3.5 Features"
>> 1730 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1731 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
>> 1732 CPU_P5600
>> 1733 help
>> 1734 Choose this option to build a kernel for release 2 or later of the
>> 1735 MIPS32 architecture including features from the 3.5 release such as
>> 1736 support for Enhanced Virtual Addressing (EVA).
>> 1737
>> 1738 config CPU_MIPS32_3_5_EVA
>> 1739 bool "Enhanced Virtual Addressing (EVA)"
>> 1740 depends on CPU_MIPS32_3_5_FEATURES
>> 1741 select EVA
239 default y 1742 default y
240 help 1743 help
241 This adds a driver for the UltraSPAR !! 1744 Choose this option if you want to enable the Enhanced Virtual
242 Loading this driver allows exact mne !! 1745 Addressing (EVA) on your MIPS32 core (such as proAptiv).
243 printed in the event of a memory err !! 1746 One of its primary benefits is an increase in the maximum size
244 on the motherboard can be matched to !! 1747 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1748
>> 1749 config CPU_MIPS32_R5_FEATURES
>> 1750 bool "MIPS32 Release 5 Features"
>> 1751 depends on SYS_HAS_CPU_MIPS32_R5
>> 1752 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
>> 1753 help
>> 1754 Choose this option to build a kernel for release 2 or later of the
>> 1755 MIPS32 architecture including features from release 5 such as
>> 1756 support for Extended Physical Addressing (XPA).
>> 1757
>> 1758 config CPU_MIPS32_R5_XPA
>> 1759 bool "Extended Physical Addressing (XPA)"
>> 1760 depends on CPU_MIPS32_R5_FEATURES
>> 1761 depends on !EVA
>> 1762 depends on !PAGE_SIZE_4KB
>> 1763 depends on SYS_SUPPORTS_HIGHMEM
>> 1764 select XPA
>> 1765 select HIGHMEM
>> 1766 select PHYS_ADDR_T_64BIT
>> 1767 default n
>> 1768 help
>> 1769 Choose this option if you want to enable the Extended Physical
>> 1770 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1771 benefit is to increase physical addressing equal to or greater
>> 1772 than 40 bits. Note that this has the side effect of turning on
>> 1773 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1774 If unsure, say 'N' here.
245 1775
246 If in doubt, say Y, as this informat !! 1776 if CPU_LOONGSON2F
>> 1777 config CPU_NOP_WORKAROUNDS
>> 1778 bool
247 1779
248 # Global things across all Sun machines. !! 1780 config CPU_JUMP_WORKAROUNDS
249 config GENERIC_LOCKBREAK <<
250 bool 1781 bool
>> 1782
>> 1783 config CPU_LOONGSON2F_WORKAROUNDS
>> 1784 bool "Loongson 2F Workarounds"
251 default y 1785 default y
252 depends on SPARC64 && SMP && PREEMPTIO !! 1786 select CPU_NOP_WORKAROUNDS
>> 1787 select CPU_JUMP_WORKAROUNDS
>> 1788 help
>> 1789 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
>> 1790 require workarounds. Without workarounds the system may hang
>> 1791 unexpectedly. For more information please refer to the gas
>> 1792 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
253 1793
254 config NUMA !! 1794 Loongson 2F03 and later have fixed these issues and no workarounds
255 bool "NUMA support" !! 1795 are needed. The workarounds have no significant side effect on them
256 depends on SPARC64 && SMP !! 1796 but may decrease the performance of the system so this option should
>> 1797 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1798 systems.
257 1799
258 config NODES_SHIFT !! 1800 If unsure, please say Y.
259 int "Maximum NUMA Nodes (as a power of !! 1801 endif # CPU_LOONGSON2F
260 range 4 5 if SPARC64 !! 1802
261 default "5" !! 1803 config SYS_SUPPORTS_ZBOOT
262 depends on NUMA !! 1804 bool
>> 1805 select HAVE_KERNEL_GZIP
>> 1806 select HAVE_KERNEL_BZIP2
>> 1807 select HAVE_KERNEL_LZ4
>> 1808 select HAVE_KERNEL_LZMA
>> 1809 select HAVE_KERNEL_LZO
>> 1810 select HAVE_KERNEL_XZ
>> 1811 select HAVE_KERNEL_ZSTD
>> 1812
>> 1813 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1814 bool
>> 1815 select SYS_SUPPORTS_ZBOOT
>> 1816
>> 1817 config SYS_SUPPORTS_ZBOOT_UART_PROM
>> 1818 bool
>> 1819 select SYS_SUPPORTS_ZBOOT
>> 1820
>> 1821 config CPU_LOONGSON2EF
>> 1822 bool
>> 1823 select CPU_SUPPORTS_32BIT_KERNEL
>> 1824 select CPU_SUPPORTS_64BIT_KERNEL
>> 1825 select CPU_SUPPORTS_HIGHMEM
>> 1826 select CPU_SUPPORTS_HUGEPAGES
>> 1827 select ARCH_HAS_PHYS_TO_DMA
>> 1828
>> 1829 config CPU_LOONGSON32
>> 1830 bool
>> 1831 select CPU_MIPS32
>> 1832 select CPU_MIPSR2
>> 1833 select CPU_HAS_PREFETCH
>> 1834 select CPU_SUPPORTS_32BIT_KERNEL
>> 1835 select CPU_SUPPORTS_HIGHMEM
>> 1836 select CPU_SUPPORTS_CPUFREQ
>> 1837
>> 1838 config CPU_BMIPS32_3300
>> 1839 select SMP_UP if SMP
>> 1840 bool
>> 1841
>> 1842 config CPU_BMIPS4350
>> 1843 bool
>> 1844 select SYS_SUPPORTS_SMP
>> 1845 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1846
>> 1847 config CPU_BMIPS4380
>> 1848 bool
>> 1849 select MIPS_L1_CACHE_SHIFT_6
>> 1850 select SYS_SUPPORTS_SMP
>> 1851 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1852 select CPU_HAS_RIXI
>> 1853
>> 1854 config CPU_BMIPS5000
>> 1855 bool
>> 1856 select MIPS_CPU_SCACHE
>> 1857 select MIPS_L1_CACHE_SHIFT_7
>> 1858 select SYS_SUPPORTS_SMP
>> 1859 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1860 select CPU_HAS_RIXI
>> 1861
>> 1862 config SYS_HAS_CPU_LOONGSON64
>> 1863 bool
>> 1864 select CPU_SUPPORTS_CPUFREQ
>> 1865 select CPU_HAS_RIXI
>> 1866
>> 1867 config SYS_HAS_CPU_LOONGSON2E
>> 1868 bool
>> 1869
>> 1870 config SYS_HAS_CPU_LOONGSON2F
>> 1871 bool
>> 1872 select CPU_SUPPORTS_CPUFREQ
>> 1873 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1874
>> 1875 config SYS_HAS_CPU_LOONGSON1B
>> 1876 bool
>> 1877
>> 1878 config SYS_HAS_CPU_LOONGSON1C
>> 1879 bool
>> 1880
>> 1881 config SYS_HAS_CPU_MIPS32_R1
>> 1882 bool
>> 1883
>> 1884 config SYS_HAS_CPU_MIPS32_R2
>> 1885 bool
>> 1886
>> 1887 config SYS_HAS_CPU_MIPS32_R3_5
>> 1888 bool
>> 1889
>> 1890 config SYS_HAS_CPU_MIPS32_R5
>> 1891 bool
>> 1892 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1893
>> 1894 config SYS_HAS_CPU_MIPS32_R6
>> 1895 bool
>> 1896 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1897
>> 1898 config SYS_HAS_CPU_MIPS64_R1
>> 1899 bool
>> 1900
>> 1901 config SYS_HAS_CPU_MIPS64_R2
>> 1902 bool
>> 1903
>> 1904 config SYS_HAS_CPU_MIPS64_R5
>> 1905 bool
>> 1906 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1907
>> 1908 config SYS_HAS_CPU_MIPS64_R6
>> 1909 bool
>> 1910 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1911
>> 1912 config SYS_HAS_CPU_P5600
>> 1913 bool
>> 1914 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1915
>> 1916 config SYS_HAS_CPU_R3000
>> 1917 bool
>> 1918
>> 1919 config SYS_HAS_CPU_TX39XX
>> 1920 bool
>> 1921
>> 1922 config SYS_HAS_CPU_VR41XX
>> 1923 bool
>> 1924
>> 1925 config SYS_HAS_CPU_R4300
>> 1926 bool
>> 1927
>> 1928 config SYS_HAS_CPU_R4X00
>> 1929 bool
>> 1930
>> 1931 config SYS_HAS_CPU_TX49XX
>> 1932 bool
>> 1933
>> 1934 config SYS_HAS_CPU_R5000
>> 1935 bool
>> 1936
>> 1937 config SYS_HAS_CPU_R5500
>> 1938 bool
>> 1939
>> 1940 config SYS_HAS_CPU_NEVADA
>> 1941 bool
>> 1942
>> 1943 config SYS_HAS_CPU_R10000
>> 1944 bool
>> 1945 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
>> 1946
>> 1947 config SYS_HAS_CPU_RM7000
>> 1948 bool
>> 1949
>> 1950 config SYS_HAS_CPU_SB1
>> 1951 bool
>> 1952
>> 1953 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1954 bool
>> 1955
>> 1956 config SYS_HAS_CPU_BMIPS
>> 1957 bool
>> 1958
>> 1959 config SYS_HAS_CPU_BMIPS32_3300
>> 1960 bool
>> 1961 select SYS_HAS_CPU_BMIPS
>> 1962
>> 1963 config SYS_HAS_CPU_BMIPS4350
>> 1964 bool
>> 1965 select SYS_HAS_CPU_BMIPS
>> 1966
>> 1967 config SYS_HAS_CPU_BMIPS4380
>> 1968 bool
>> 1969 select SYS_HAS_CPU_BMIPS
>> 1970
>> 1971 config SYS_HAS_CPU_BMIPS5000
>> 1972 bool
>> 1973 select SYS_HAS_CPU_BMIPS
>> 1974 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 1975
>> 1976 #
>> 1977 # CPU may reorder R->R, R->W, W->R, W->W
>> 1978 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 1979 #
>> 1980 config WEAK_ORDERING
>> 1981 bool
>> 1982
>> 1983 #
>> 1984 # CPU may reorder reads and writes beyond LL/SC
>> 1985 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 1986 #
>> 1987 config WEAK_REORDERING_BEYOND_LLSC
>> 1988 bool
>> 1989 endmenu
>> 1990
>> 1991 #
>> 1992 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 1993 #
>> 1994 config CPU_MIPS32
>> 1995 bool
>> 1996 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
>> 1997 CPU_MIPS32_R6 || CPU_P5600
>> 1998
>> 1999 config CPU_MIPS64
>> 2000 bool
>> 2001 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
>> 2002 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
>> 2003
>> 2004 #
>> 2005 # These indicate the revision of the architecture
>> 2006 #
>> 2007 config CPU_MIPSR1
>> 2008 bool
>> 2009 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2010
>> 2011 config CPU_MIPSR2
>> 2012 bool
>> 2013 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2014 select CPU_HAS_RIXI
>> 2015 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2016 select MIPS_SPRAM
>> 2017
>> 2018 config CPU_MIPSR5
>> 2019 bool
>> 2020 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
>> 2021 select CPU_HAS_RIXI
>> 2022 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2023 select MIPS_SPRAM
>> 2024
>> 2025 config CPU_MIPSR6
>> 2026 bool
>> 2027 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2028 select CPU_HAS_RIXI
>> 2029 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2030 select HAVE_ARCH_BITREVERSE
>> 2031 select MIPS_ASID_BITS_VARIABLE
>> 2032 select MIPS_CRC_SUPPORT
>> 2033 select MIPS_SPRAM
>> 2034
>> 2035 config TARGET_ISA_REV
>> 2036 int
>> 2037 default 1 if CPU_MIPSR1
>> 2038 default 2 if CPU_MIPSR2
>> 2039 default 5 if CPU_MIPSR5
>> 2040 default 6 if CPU_MIPSR6
>> 2041 default 0
263 help 2042 help
264 Specify the maximum number of NUMA N !! 2043 Reflects the ISA revision being targeted by the kernel build. This
265 system. Increases memory reserved t !! 2044 is effectively the Kconfig equivalent of MIPS_ISA_REV.
266 2045
267 config ARCH_SPARSEMEM_ENABLE !! 2046 config EVA
268 def_bool y if SPARC64 !! 2047 bool
269 select SPARSEMEM_VMEMMAP_ENABLE !! 2048
>> 2049 config XPA
>> 2050 bool
>> 2051
>> 2052 config SYS_SUPPORTS_32BIT_KERNEL
>> 2053 bool
>> 2054 config SYS_SUPPORTS_64BIT_KERNEL
>> 2055 bool
>> 2056 config CPU_SUPPORTS_32BIT_KERNEL
>> 2057 bool
>> 2058 config CPU_SUPPORTS_64BIT_KERNEL
>> 2059 bool
>> 2060 config CPU_SUPPORTS_CPUFREQ
>> 2061 bool
>> 2062 config CPU_SUPPORTS_ADDRWINCFG
>> 2063 bool
>> 2064 config CPU_SUPPORTS_HUGEPAGES
>> 2065 bool
>> 2066 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
>> 2067 config MIPS_PGD_C0_CONTEXT
>> 2068 bool
>> 2069 depends on 64BIT
>> 2070 default y if (CPU_MIPSR2 || CPU_MIPSR6)
270 2071
271 config ARCH_SPARSEMEM_DEFAULT !! 2072 #
272 def_bool y if SPARC64 !! 2073 # Set to y for ptrace access to watch registers.
>> 2074 #
>> 2075 config HARDWARE_WATCHPOINTS
>> 2076 bool
>> 2077 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
273 2078
274 config ARCH_FORCE_MAX_ORDER !! 2079 menu "Kernel type"
275 int "Order of maximal physically conti <<
276 default "12" <<
277 help <<
278 The kernel page allocator limits the <<
279 contiguous allocations. The limit is <<
280 defines the maximal power of two of <<
281 allocated as a single contiguous blo <<
282 overriding the default setting when <<
283 large blocks of physically contiguou <<
284 2080
285 Don't change if unsure. !! 2081 choice
>> 2082 prompt "Kernel code model"
>> 2083 help
>> 2084 You should only select this option if you have a workload that
>> 2085 actually benefits from 64-bit processing or if your machine has
>> 2086 large memory. You will only be presented a single option in this
>> 2087 menu if your system does not support both 32-bit and 64-bit kernels.
286 2088
287 if SPARC64 || COMPILE_TEST !! 2089 config 32BIT
288 source "kernel/power/Kconfig" !! 2090 bool "32-bit kernel"
289 endif !! 2091 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2092 select TRAD_SIGNALS
>> 2093 help
>> 2094 Select this option if you want to build a 32-bit kernel.
290 2095
291 config SCHED_SMT !! 2096 config 64BIT
292 bool "SMT (Hyperthreading) scheduler s !! 2097 bool "64-bit kernel"
293 depends on SPARC64 && SMP !! 2098 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
>> 2099 help
>> 2100 Select this option if you want to build a 64-bit kernel.
>> 2101
>> 2102 endchoice
>> 2103
>> 2104 config MIPS_VA_BITS_48
>> 2105 bool "48 bits virtual memory"
>> 2106 depends on 64BIT
>> 2107 help
>> 2108 Support a maximum at least 48 bits of application virtual
>> 2109 memory. Default is 40 bits or less, depending on the CPU.
>> 2110 For page sizes 16k and above, this option results in a small
>> 2111 memory overhead for page tables. For 4k page size, a fourth
>> 2112 level of page tables is added which imposes both a memory
>> 2113 overhead as well as slower TLB fault handling.
>> 2114
>> 2115 If unsure, say N.
>> 2116
>> 2117 config ZBOOT_LOAD_ADDRESS
>> 2118 hex "Compressed kernel load address"
>> 2119 default 0xffffffff80400000 if BCM47XX
>> 2120 default 0x0
>> 2121 depends on SYS_SUPPORTS_ZBOOT
>> 2122 help
>> 2123 The address to load compressed kernel, aka vmlinuz.
>> 2124
>> 2125 This is only used if non-zero.
>> 2126
>> 2127 choice
>> 2128 prompt "Kernel page size"
>> 2129 default PAGE_SIZE_4KB
>> 2130
>> 2131 config PAGE_SIZE_4KB
>> 2132 bool "4kB"
>> 2133 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
>> 2134 help
>> 2135 This option select the standard 4kB Linux page size. On some
>> 2136 R3000-family processors this is the only available page size. Using
>> 2137 4kB page size will minimize memory consumption and is therefore
>> 2138 recommended for low memory systems.
>> 2139
>> 2140 config PAGE_SIZE_8KB
>> 2141 bool "8kB"
>> 2142 depends on CPU_CAVIUM_OCTEON
>> 2143 depends on !MIPS_VA_BITS_48
>> 2144 help
>> 2145 Using 8kB page size will result in higher performance kernel at
>> 2146 the price of higher memory consumption. This option is available
>> 2147 only on cnMIPS processors. Note that you will need a suitable Linux
>> 2148 distribution to support this.
>> 2149
>> 2150 config PAGE_SIZE_16KB
>> 2151 bool "16kB"
>> 2152 depends on !CPU_R3000 && !CPU_TX39XX
>> 2153 help
>> 2154 Using 16kB page size will result in higher performance kernel at
>> 2155 the price of higher memory consumption. This option is available on
>> 2156 all non-R3000 family processors. Note that you will need a suitable
>> 2157 Linux distribution to support this.
>> 2158
>> 2159 config PAGE_SIZE_32KB
>> 2160 bool "32kB"
>> 2161 depends on CPU_CAVIUM_OCTEON
>> 2162 depends on !MIPS_VA_BITS_48
>> 2163 help
>> 2164 Using 32kB page size will result in higher performance kernel at
>> 2165 the price of higher memory consumption. This option is available
>> 2166 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2167 distribution to support this.
>> 2168
>> 2169 config PAGE_SIZE_64KB
>> 2170 bool "64kB"
>> 2171 depends on !CPU_R3000 && !CPU_TX39XX
>> 2172 help
>> 2173 Using 64kB page size will result in higher performance kernel at
>> 2174 the price of higher memory consumption. This option is available on
>> 2175 all non-R3000 family processor. Not that at the time of this
>> 2176 writing this option is still high experimental.
>> 2177
>> 2178 endchoice
>> 2179
>> 2180 config FORCE_MAX_ZONEORDER
>> 2181 int "Maximum zone order"
>> 2182 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2183 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2184 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2185 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2186 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2187 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2188 range 0 64
>> 2189 default "11"
>> 2190 help
>> 2191 The kernel memory allocator divides physically contiguous memory
>> 2192 blocks into "zones", where each zone is a power of two number of
>> 2193 pages. This option selects the largest power of two that the kernel
>> 2194 keeps in the memory allocator. If you need to allocate very large
>> 2195 blocks of physically contiguous memory, then you may need to
>> 2196 increase this value.
>> 2197
>> 2198 This config option is actually maximum order plus one. For example,
>> 2199 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2200
>> 2201 The page size is not necessarily 4KB. Keep this in mind
>> 2202 when choosing a value for this option.
>> 2203
>> 2204 config BOARD_SCACHE
>> 2205 bool
>> 2206
>> 2207 config IP22_CPU_SCACHE
>> 2208 bool
>> 2209 select BOARD_SCACHE
>> 2210
>> 2211 #
>> 2212 # Support for a MIPS32 / MIPS64 style S-caches
>> 2213 #
>> 2214 config MIPS_CPU_SCACHE
>> 2215 bool
>> 2216 select BOARD_SCACHE
>> 2217
>> 2218 config R5000_CPU_SCACHE
>> 2219 bool
>> 2220 select BOARD_SCACHE
>> 2221
>> 2222 config RM7000_CPU_SCACHE
>> 2223 bool
>> 2224 select BOARD_SCACHE
>> 2225
>> 2226 config SIBYTE_DMA_PAGEOPS
>> 2227 bool "Use DMA to clear/copy pages"
>> 2228 depends on CPU_SB1
>> 2229 help
>> 2230 Instead of using the CPU to zero and copy pages, use a Data Mover
>> 2231 channel. These DMA channels are otherwise unused by the standard
>> 2232 SiByte Linux port. Seems to give a small performance benefit.
>> 2233
>> 2234 config CPU_HAS_PREFETCH
>> 2235 bool
>> 2236
>> 2237 config CPU_GENERIC_DUMP_TLB
>> 2238 bool
>> 2239 default y if !(CPU_R3000 || CPU_TX39XX)
>> 2240
>> 2241 config MIPS_FP_SUPPORT
>> 2242 bool "Floating Point support" if EXPERT
294 default y 2243 default y
295 help 2244 help
296 SMT scheduler support improves the C !! 2245 Select y to include support for floating point in the kernel
297 when dealing with SPARC cpus at a co !! 2246 including initialization of FPU hardware, FP context save & restore
298 in some places. If unsure say N here !! 2247 and emulation of an FPU where necessary. Without this support any
>> 2248 userland program attempting to use floating point instructions will
>> 2249 receive a SIGILL.
>> 2250
>> 2251 If you know that your userland will not attempt to use floating point
>> 2252 instructions then you can say n here to shrink the kernel a little.
>> 2253
>> 2254 If unsure, say y.
>> 2255
>> 2256 config CPU_R2300_FPU
>> 2257 bool
>> 2258 depends on MIPS_FP_SUPPORT
>> 2259 default y if CPU_R3000 || CPU_TX39XX
>> 2260
>> 2261 config CPU_R3K_TLB
>> 2262 bool
>> 2263
>> 2264 config CPU_R4K_FPU
>> 2265 bool
>> 2266 depends on MIPS_FP_SUPPORT
>> 2267 default y if !CPU_R2300_FPU
>> 2268
>> 2269 config CPU_R4K_CACHE_TLB
>> 2270 bool
>> 2271 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
299 2272
300 config SCHED_MC !! 2273 config MIPS_MT_SMP
301 bool "Multi-core scheduler support" !! 2274 bool "MIPS MT SMP support (1 TC on each available VPE)"
302 depends on SPARC64 && SMP <<
303 default y 2275 default y
>> 2276 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2277 select CPU_MIPSR2_IRQ_VI
>> 2278 select CPU_MIPSR2_IRQ_EI
>> 2279 select SYNC_R4K
>> 2280 select MIPS_MT
>> 2281 select SMP
>> 2282 select SMP_UP
>> 2283 select SYS_SUPPORTS_SMP
>> 2284 select SYS_SUPPORTS_SCHED_SMT
>> 2285 select MIPS_PERF_SHARED_TC_COUNTERS
304 help 2286 help
305 Multi-core scheduler support improve !! 2287 This is a kernel model which is known as SMVP. This is supported
306 making when dealing with multi-core !! 2288 on cores with the MT ASE and uses the available VPEs to implement
307 increased overhead in some places. I !! 2289 virtual processors which supports SMP. This is equivalent to the
>> 2290 Intel Hyperthreading feature. For further information go to
>> 2291 <http://www.imgtec.com/mips/mips-multithreading.asp>.
308 2292
309 config CMDLINE_BOOL !! 2293 config MIPS_MT
310 bool "Default bootloader kernel argume !! 2294 bool
311 depends on SPARC64 <<
312 2295
313 config CMDLINE !! 2296 config SCHED_SMT
314 string "Initial kernel command string" !! 2297 bool "SMT (multithreading) scheduler support"
315 depends on CMDLINE_BOOL !! 2298 depends on SYS_SUPPORTS_SCHED_SMT
316 default "console=ttyS0,9600 root=/dev/ !! 2299 default n
317 help 2300 help
318 Say Y here if you want to be able to !! 2301 SMT scheduler support improves the CPU scheduler's decision making
319 the kernel. This will be overridden !! 2302 when dealing with MIPS MT enabled cores at a cost of slightly
320 use one (such as SILO). This is most !! 2303 increased overhead in some places. If unsure say N here.
321 a kernel from TFTP, and want default <<
322 with having them passed on the comma <<
323 2304
324 NOTE: This option WILL override the !! 2305 config SYS_SUPPORTS_SCHED_SMT
>> 2306 bool
325 2307
326 config SUN_PM !! 2308 config SYS_SUPPORTS_MULTITHREADING
327 bool 2309 bool
328 default y if SPARC32 !! 2310
>> 2311 config MIPS_MT_FPAFF
>> 2312 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2313 default y
>> 2314 depends on MIPS_MT_SMP
>> 2315
>> 2316 config MIPSR2_TO_R6_EMULATOR
>> 2317 bool "MIPS R2-to-R6 emulator"
>> 2318 depends on CPU_MIPSR6
>> 2319 depends on MIPS_FP_SUPPORT
>> 2320 default y
329 help 2321 help
330 Enable power management and CPU stan !! 2322 Choose this option if you want to run non-R6 MIPS userland code.
331 SPARC platforms. !! 2323 Even if you say 'Y' here, the emulator will still be disabled by
>> 2324 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2325 The only reason this is a build-time option is to save ~14K from the
>> 2326 final kernel image.
332 2327
333 config SPARC_LED !! 2328 config SYS_SUPPORTS_VPE_LOADER
334 tristate "Sun4m LED driver" !! 2329 bool
335 depends on SPARC32 !! 2330 depends on SYS_SUPPORTS_MULTITHREADING
336 help 2331 help
337 This driver toggles the front-panel !! 2332 Indicates that the platform supports the VPE loader, and provides
338 in a user-specifiable manner. Its s !! 2333 physical_memsize.
339 by reading /proc/led and its blinkin <<
340 via writes to /proc/led <<
341 2334
342 config SERIAL_CONSOLE !! 2335 config MIPS_VPE_LOADER
>> 2336 bool "VPE loader support."
>> 2337 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2338 select CPU_MIPSR2_IRQ_VI
>> 2339 select CPU_MIPSR2_IRQ_EI
>> 2340 select MIPS_MT
>> 2341 help
>> 2342 Includes a loader for loading an elf relocatable object
>> 2343 onto another VPE and running it.
>> 2344
>> 2345 config MIPS_VPE_LOADER_CMP
>> 2346 bool
>> 2347 default "y"
>> 2348 depends on MIPS_VPE_LOADER && MIPS_CMP
>> 2349
>> 2350 config MIPS_VPE_LOADER_MT
343 bool 2351 bool
344 depends on SPARC32 !! 2352 default "y"
>> 2353 depends on MIPS_VPE_LOADER && !MIPS_CMP
>> 2354
>> 2355 config MIPS_VPE_LOADER_TOM
>> 2356 bool "Load VPE program into memory hidden from linux"
>> 2357 depends on MIPS_VPE_LOADER
345 default y 2358 default y
346 help 2359 help
347 If you say Y here, it will be possib !! 2360 The loader can use memory that is present but has been hidden from
348 system console (the system console i !! 2361 Linux using the kernel command line option "mem=xxMB". It's up to
349 kernel messages and warnings and whi !! 2362 you to ensure the amount you put in the option and the space your
350 mode). This could be useful if some !! 2363 program requires is less or equal to the amount physically present.
351 to that serial port. <<
352 2364
353 Even if you say Y here, the currentl !! 2365 config MIPS_VPE_APSP_API
354 (/dev/tty0) will still be used as th !! 2366 bool "Enable support for AP/SP API (RTLX)"
355 you can alter that using a kernel co !! 2367 depends on MIPS_VPE_LOADER
356 "console=ttyS1". (Try "man bootparam <<
357 your boot loader (silo) about how to <<
358 boot time.) <<
359 2368
360 If you don't have a graphics card in !! 2369 config MIPS_VPE_APSP_API_CMP
361 kernel will automatically use the fi !! 2370 bool
362 system console. !! 2371 default "y"
>> 2372 depends on MIPS_VPE_APSP_API && MIPS_CMP
363 2373
364 If unsure, say N. !! 2374 config MIPS_VPE_APSP_API_MT
>> 2375 bool
>> 2376 default "y"
>> 2377 depends on MIPS_VPE_APSP_API && !MIPS_CMP
365 2378
366 config SPARC_LEON !! 2379 config MIPS_CMP
367 bool "Sparc Leon processor family" !! 2380 bool "MIPS CMP framework support (DEPRECATED)"
368 depends on SPARC32 !! 2381 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
369 select USB_EHCI_BIG_ENDIAN_MMIO !! 2382 select SMP
370 select USB_EHCI_BIG_ENDIAN_DESC !! 2383 select SYNC_R4K
371 select USB_UHCI_BIG_ENDIAN_MMIO !! 2384 select SYS_SUPPORTS_SMP
372 select USB_UHCI_BIG_ENDIAN_DESC !! 2385 select WEAK_ORDERING
373 help !! 2386 default n
374 If you say Y here if you are running <<
375 The LEON processor is a synthesizabl <<
376 SPARC-v8 standard. LEON is part of <<
377 IP cores that are distributed under <<
378 from www.gaisler.com. You can downlo <<
379 toolchain at www.gaisler.com. <<
380 <<
381 if SPARC_LEON <<
382 menu "U-Boot options" <<
383 <<
384 config UBOOT_LOAD_ADDR <<
385 hex "uImage Load Address" <<
386 default 0x40004000 <<
387 help <<
388 U-Boot kernel load address, the addre <<
389 where u-boot will place the Linux ker <<
390 This address is normally the base add <<
391 <<
392 config UBOOT_FLASH_ADDR <<
393 hex "uImage.o Load Address" <<
394 default 0x00080000 <<
395 help <<
396 Optional setting only affecting the u <<
397 download the uImage file to the targe <<
398 U-Boot. It may for example be used to <<
399 the GRMON utility before even startin <<
400 <<
401 config UBOOT_ENTRY_ADDR <<
402 hex "uImage Entry Address" <<
403 default 0xf0004000 <<
404 help 2387 help
405 Do not change this unless you know wh !! 2388 Select this if you are using a bootloader which implements the "CMP
406 hardcoded by the SPARC32 and LEON por !! 2389 framework" protocol (ie. YAMON) and want your kernel to make use of
>> 2390 its ability to start secondary CPUs.
407 2391
408 This is the virtual address u-boot ju !! 2392 Unless you have a specific need, you should use CONFIG_MIPS_CPS
409 Kernel. !! 2393 instead of this.
410 2394
411 endmenu !! 2395 config MIPS_CPS
412 endif !! 2396 bool "MIPS Coherent Processing System support"
>> 2397 depends on SYS_SUPPORTS_MIPS_CPS
>> 2398 select MIPS_CM
>> 2399 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2400 select SMP
>> 2401 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2402 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2403 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2404 select SYS_SUPPORTS_SMP
>> 2405 select WEAK_ORDERING
>> 2406 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
>> 2407 help
>> 2408 Select this if you wish to run an SMP kernel across multiple cores
>> 2409 within a MIPS Coherent Processing System. When this option is
>> 2410 enabled the kernel will probe for other cores and boot them with
>> 2411 no external assistance. It is safe to enable this when hardware
>> 2412 support is unavailable.
413 2413
414 endmenu !! 2414 config MIPS_CPS_PM
>> 2415 depends on MIPS_CPS
>> 2416 bool
>> 2417
>> 2418 config MIPS_CM
>> 2419 bool
>> 2420 select MIPS_CPC
415 2421
416 menu "Bus options (PCI etc.)" !! 2422 config MIPS_CPC
417 config SBUS <<
418 bool 2423 bool
>> 2424
>> 2425 config SB1_PASS_2_WORKAROUNDS
>> 2426 bool
>> 2427 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
419 default y 2428 default y
420 2429
421 config SBUSCHAR !! 2430 config SB1_PASS_2_1_WORKAROUNDS
422 bool 2431 bool
>> 2432 depends on CPU_SB1 && CPU_SB1_PASS_2
423 default y 2433 default y
424 2434
425 config SUN_LDOMS !! 2435 choice
426 bool "Sun Logical Domains support" !! 2436 prompt "SmartMIPS or microMIPS ASE support"
427 depends on SPARC64 !! 2437
>> 2438 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2439 bool "None"
>> 2440 help
>> 2441 Select this if you want neither microMIPS nor SmartMIPS support
>> 2442
>> 2443 config CPU_HAS_SMARTMIPS
>> 2444 depends on SYS_SUPPORTS_SMARTMIPS
>> 2445 bool "SmartMIPS"
>> 2446 help
>> 2447 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2448 increased security at both hardware and software level for
>> 2449 smartcards. Enabling this option will allow proper use of the
>> 2450 SmartMIPS instructions by Linux applications. However a kernel with
>> 2451 this option will not work on a MIPS core without SmartMIPS core. If
>> 2452 you don't know you probably don't have SmartMIPS and should say N
>> 2453 here.
>> 2454
>> 2455 config CPU_MICROMIPS
>> 2456 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2457 bool "microMIPS"
>> 2458 help
>> 2459 When this option is enabled the kernel will be built using the
>> 2460 microMIPS ISA
>> 2461
>> 2462 endchoice
>> 2463
>> 2464 config CPU_HAS_MSA
>> 2465 bool "Support for the MIPS SIMD Architecture"
>> 2466 depends on CPU_SUPPORTS_MSA
>> 2467 depends on MIPS_FP_SUPPORT
>> 2468 depends on 64BIT || MIPS_O32_FP64_SUPPORT
428 help 2469 help
429 Say Y here is you want to support vi !! 2470 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
430 Logical Domains. !! 2471 and a set of SIMD instructions to operate on them. When this option
>> 2472 is enabled the kernel will support allocating & switching MSA
>> 2473 vector register contexts. If you know that your kernel will only be
>> 2474 running on CPUs which do not support MSA or that your userland will
>> 2475 not be making use of it then you may wish to say N here to reduce
>> 2476 the size & complexity of your kernel.
>> 2477
>> 2478 If unsure, say Y.
431 2479
432 config PCIC_PCI !! 2480 config CPU_HAS_WB
>> 2481 bool
>> 2482
>> 2483 config XKS01
>> 2484 bool
>> 2485
>> 2486 config CPU_HAS_DIEI
>> 2487 depends on !CPU_DIEI_BROKEN
>> 2488 bool
>> 2489
>> 2490 config CPU_DIEI_BROKEN
>> 2491 bool
>> 2492
>> 2493 config CPU_HAS_RIXI
433 bool 2494 bool
434 depends on PCI && SPARC32 && !SPARC_LE <<
435 default y <<
436 2495
437 config LEON_PCI !! 2496 config CPU_NO_LOAD_STORE_LR
438 bool 2497 bool
439 depends on PCI && SPARC_LEON !! 2498 help
>> 2499 CPU lacks support for unaligned load and store instructions:
>> 2500 LWL, LWR, SWL, SWR (Load/store word left/right).
>> 2501 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
>> 2502 systems).
>> 2503
>> 2504 #
>> 2505 # Vectored interrupt mode is an R2 feature
>> 2506 #
>> 2507 config CPU_MIPSR2_IRQ_VI
>> 2508 bool
>> 2509
>> 2510 #
>> 2511 # Extended interrupt mode is an R2 feature
>> 2512 #
>> 2513 config CPU_MIPSR2_IRQ_EI
>> 2514 bool
>> 2515
>> 2516 config CPU_HAS_SYNC
>> 2517 bool
>> 2518 depends on !CPU_R3000
440 default y 2519 default y
441 2520
442 config SPARC_GRPCI1 !! 2521 #
443 bool "GRPCI Host Bridge Support" !! 2522 # CPU non-features
444 depends on LEON_PCI !! 2523 #
>> 2524 config CPU_DADDI_WORKAROUNDS
>> 2525 bool
>> 2526
>> 2527 config CPU_R4000_WORKAROUNDS
>> 2528 bool
>> 2529 select CPU_R4400_WORKAROUNDS
>> 2530
>> 2531 config CPU_R4400_WORKAROUNDS
>> 2532 bool
>> 2533
>> 2534 config CPU_R4X00_BUGS64
>> 2535 bool
>> 2536 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
>> 2537
>> 2538 config MIPS_ASID_SHIFT
>> 2539 int
>> 2540 default 6 if CPU_R3000 || CPU_TX39XX
>> 2541 default 0
>> 2542
>> 2543 config MIPS_ASID_BITS
>> 2544 int
>> 2545 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2546 default 6 if CPU_R3000 || CPU_TX39XX
>> 2547 default 8
>> 2548
>> 2549 config MIPS_ASID_BITS_VARIABLE
>> 2550 bool
>> 2551
>> 2552 config MIPS_CRC_SUPPORT
>> 2553 bool
>> 2554
>> 2555 # R4600 erratum. Due to the lack of errata information the exact
>> 2556 # technical details aren't known. I've experimentally found that disabling
>> 2557 # interrupts during indexed I-cache flushes seems to be sufficient to deal
>> 2558 # with the issue.
>> 2559 config WAR_R4600_V1_INDEX_ICACHEOP
>> 2560 bool
>> 2561
>> 2562 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
>> 2563 #
>> 2564 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
>> 2565 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
>> 2566 # executed if there is no other dcache activity. If the dcache is
>> 2567 # accessed for another instruction immediately preceding when these
>> 2568 # cache instructions are executing, it is possible that the dcache
>> 2569 # tag match outputs used by these cache instructions will be
>> 2570 # incorrect. These cache instructions should be preceded by at least
>> 2571 # four instructions that are not any kind of load or store
>> 2572 # instruction.
>> 2573 #
>> 2574 # This is not allowed: lw
>> 2575 # nop
>> 2576 # nop
>> 2577 # nop
>> 2578 # cache Hit_Writeback_Invalidate_D
>> 2579 #
>> 2580 # This is allowed: lw
>> 2581 # nop
>> 2582 # nop
>> 2583 # nop
>> 2584 # nop
>> 2585 # cache Hit_Writeback_Invalidate_D
>> 2586 config WAR_R4600_V1_HIT_CACHEOP
>> 2587 bool
>> 2588
>> 2589 # Writeback and invalidate the primary cache dcache before DMA.
>> 2590 #
>> 2591 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
>> 2592 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
>> 2593 # operate correctly if the internal data cache refill buffer is empty. These
>> 2594 # CACHE instructions should be separated from any potential data cache miss
>> 2595 # by a load instruction to an uncached address to empty the response buffer."
>> 2596 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
>> 2597 # in .pdf format.)
>> 2598 config WAR_R4600_V2_HIT_CACHEOP
>> 2599 bool
>> 2600
>> 2601 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
>> 2602 # the line which this instruction itself exists, the following
>> 2603 # operation is not guaranteed."
>> 2604 #
>> 2605 # Workaround: do two phase flushing for Index_Invalidate_I
>> 2606 config WAR_TX49XX_ICACHE_INDEX_INV
>> 2607 bool
>> 2608
>> 2609 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
>> 2610 # opposes it being called that) where invalid instructions in the same
>> 2611 # I-cache line worth of instructions being fetched may case spurious
>> 2612 # exceptions.
>> 2613 config WAR_ICACHE_REFILLS
>> 2614 bool
>> 2615
>> 2616 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
>> 2617 # may cause ll / sc and lld / scd sequences to execute non-atomically.
>> 2618 config WAR_R10000_LLSC
>> 2619 bool
>> 2620
>> 2621 # 34K core erratum: "Problems Executing the TLBR Instruction"
>> 2622 config WAR_MIPS34K_MISSED_ITLB
>> 2623 bool
>> 2624
>> 2625 #
>> 2626 # - Highmem only makes sense for the 32-bit kernel.
>> 2627 # - The current highmem code will only work properly on physically indexed
>> 2628 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2629 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2630 # moment we protect the user and offer the highmem option only on machines
>> 2631 # where it's known to be safe. This will not offer highmem on a few systems
>> 2632 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2633 # indexed CPUs but we're playing safe.
>> 2634 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2635 # know they might have memory configurations that could make use of highmem
>> 2636 # support.
>> 2637 #
>> 2638 config HIGHMEM
>> 2639 bool "High Memory Support"
>> 2640 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2641 select KMAP_LOCAL
>> 2642
>> 2643 config CPU_SUPPORTS_HIGHMEM
>> 2644 bool
>> 2645
>> 2646 config SYS_SUPPORTS_HIGHMEM
>> 2647 bool
>> 2648
>> 2649 config SYS_SUPPORTS_SMARTMIPS
>> 2650 bool
>> 2651
>> 2652 config SYS_SUPPORTS_MICROMIPS
>> 2653 bool
>> 2654
>> 2655 config SYS_SUPPORTS_MIPS16
>> 2656 bool
>> 2657 help
>> 2658 This option must be set if a kernel might be executed on a MIPS16-
>> 2659 enabled CPU even if MIPS16 is not actually being used. In other
>> 2660 words, it makes the kernel MIPS16-tolerant.
>> 2661
>> 2662 config CPU_SUPPORTS_MSA
>> 2663 bool
>> 2664
>> 2665 config ARCH_FLATMEM_ENABLE
>> 2666 def_bool y
>> 2667 depends on !NUMA && !CPU_LOONGSON2EF
>> 2668
>> 2669 config ARCH_SPARSEMEM_ENABLE
>> 2670 bool
>> 2671 select SPARSEMEM_STATIC if !SGI_IP27
>> 2672
>> 2673 config NUMA
>> 2674 bool "NUMA Support"
>> 2675 depends on SYS_SUPPORTS_NUMA
>> 2676 select SMP
>> 2677 select HAVE_SETUP_PER_CPU_AREA
>> 2678 select NEED_PER_CPU_EMBED_FIRST_CHUNK
>> 2679 help
>> 2680 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2681 Access). This option improves performance on systems with more
>> 2682 than two nodes; on two node systems it is generally better to
>> 2683 leave it disabled; on single node systems leave this option
>> 2684 disabled.
>> 2685
>> 2686 config SYS_SUPPORTS_NUMA
>> 2687 bool
>> 2688
>> 2689 config RELOCATABLE
>> 2690 bool "Relocatable kernel"
>> 2691 depends on SYS_SUPPORTS_RELOCATABLE
>> 2692 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
>> 2693 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
>> 2694 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
>> 2695 CPU_P5600 || CAVIUM_OCTEON_SOC || \
>> 2696 CPU_LOONGSON64
>> 2697 help
>> 2698 This builds a kernel image that retains relocation information
>> 2699 so it can be loaded someplace besides the default 1MB.
>> 2700 The relocations make the kernel binary about 15% larger,
>> 2701 but are discarded at runtime
>> 2702
>> 2703 config RELOCATION_TABLE_SIZE
>> 2704 hex "Relocation table size"
>> 2705 depends on RELOCATABLE
>> 2706 range 0x0 0x01000000
>> 2707 default "0x00200000" if CPU_LOONGSON64
>> 2708 default "0x00100000"
>> 2709 help
>> 2710 A table of relocation data will be appended to the kernel binary
>> 2711 and parsed at boot to fix up the relocated kernel.
>> 2712
>> 2713 This option allows the amount of space reserved for the table to be
>> 2714 adjusted, although the default of 1Mb should be ok in most cases.
>> 2715
>> 2716 The build will fail and a valid size suggested if this is too small.
>> 2717
>> 2718 If unsure, leave at the default value.
>> 2719
>> 2720 config RANDOMIZE_BASE
>> 2721 bool "Randomize the address of the kernel image"
>> 2722 depends on RELOCATABLE
>> 2723 help
>> 2724 Randomizes the physical and virtual address at which the
>> 2725 kernel image is loaded, as a security feature that
>> 2726 deters exploit attempts relying on knowledge of the location
>> 2727 of kernel internals.
>> 2728
>> 2729 Entropy is generated using any coprocessor 0 registers available.
>> 2730
>> 2731 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2732
>> 2733 If unsure, say N.
>> 2734
>> 2735 config RANDOMIZE_BASE_MAX_OFFSET
>> 2736 hex "Maximum kASLR offset" if EXPERT
>> 2737 depends on RANDOMIZE_BASE
>> 2738 range 0x0 0x40000000 if EVA || 64BIT
>> 2739 range 0x0 0x08000000
>> 2740 default "0x01000000"
>> 2741 help
>> 2742 When kASLR is active, this provides the maximum offset that will
>> 2743 be applied to the kernel image. It should be set according to the
>> 2744 amount of physical RAM available in the target system minus
>> 2745 PHYSICAL_START and must be a power of 2.
>> 2746
>> 2747 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2748 EVA or 64-bit. The default is 16Mb.
>> 2749
>> 2750 config NODES_SHIFT
>> 2751 int
>> 2752 default "6"
>> 2753 depends on NUMA
>> 2754
>> 2755 config HW_PERF_EVENTS
>> 2756 bool "Enable hardware performance counter support for perf events"
>> 2757 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
445 default y 2758 default y
446 help 2759 help
447 Say Y here to include the GRPCI Host !! 2760 Enable hardware performance counter support for perf events. If
448 PCI host controller is typically fou !! 2761 disabled, perf events will use software events only.
449 systems. The driver has one property <<
450 from the bootloader that makes the G <<
451 on detected PCI Parity and System er <<
452 2762
453 config SPARC_GRPCI2 !! 2763 config DMI
454 bool "GRPCI2 Host Bridge Support" !! 2764 bool "Enable DMI scanning"
455 depends on LEON_PCI !! 2765 depends on MACH_LOONGSON64
>> 2766 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
456 default y 2767 default y
457 help 2768 help
458 Say Y here to include the GRPCI2 Hos !! 2769 Enabled scanning of DMI to identify machine quirks. Say Y
>> 2770 here unless you have verified that your setup is not
>> 2771 affected by entries in the DMI blacklist. Required by PNP
>> 2772 BIOS code.
>> 2773
>> 2774 config SMP
>> 2775 bool "Multi-Processing support"
>> 2776 depends on SYS_SUPPORTS_SMP
>> 2777 help
>> 2778 This enables support for systems with more than one CPU. If you have
>> 2779 a system with only one CPU, say N. If you have a system with more
>> 2780 than one CPU, say Y.
>> 2781
>> 2782 If you say N here, the kernel will run on uni- and multiprocessor
>> 2783 machines, but will use only one CPU of a multiprocessor machine. If
>> 2784 you say Y here, the kernel will run on many, but not all,
>> 2785 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2786 will run faster if you say N here.
>> 2787
>> 2788 People using multiprocessor machines who say Y here should also say
>> 2789 Y to "Enhanced Real Time Clock Support", below.
>> 2790
>> 2791 See also the SMP-HOWTO available at
>> 2792 <https://www.tldp.org/docs.html#howto>.
>> 2793
>> 2794 If you don't know what to do here, say N.
>> 2795
>> 2796 config HOTPLUG_CPU
>> 2797 bool "Support for hot-pluggable CPUs"
>> 2798 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
>> 2799 help
>> 2800 Say Y here to allow turning CPUs off and on. CPUs can be
>> 2801 controlled through /sys/devices/system/cpu.
>> 2802 (Note: power management support will enable this option
>> 2803 automatically on SMP systems. )
>> 2804 Say N if you want to disable CPU hotplug.
>> 2805
>> 2806 config SMP_UP
>> 2807 bool
>> 2808
>> 2809 config SYS_SUPPORTS_MIPS_CMP
>> 2810 bool
>> 2811
>> 2812 config SYS_SUPPORTS_MIPS_CPS
>> 2813 bool
>> 2814
>> 2815 config SYS_SUPPORTS_SMP
>> 2816 bool
>> 2817
>> 2818 config NR_CPUS_DEFAULT_4
>> 2819 bool
>> 2820
>> 2821 config NR_CPUS_DEFAULT_8
>> 2822 bool
>> 2823
>> 2824 config NR_CPUS_DEFAULT_16
>> 2825 bool
>> 2826
>> 2827 config NR_CPUS_DEFAULT_32
>> 2828 bool
>> 2829
>> 2830 config NR_CPUS_DEFAULT_64
>> 2831 bool
>> 2832
>> 2833 config NR_CPUS
>> 2834 int "Maximum number of CPUs (2-256)"
>> 2835 range 2 256
>> 2836 depends on SMP
>> 2837 default "4" if NR_CPUS_DEFAULT_4
>> 2838 default "8" if NR_CPUS_DEFAULT_8
>> 2839 default "16" if NR_CPUS_DEFAULT_16
>> 2840 default "32" if NR_CPUS_DEFAULT_32
>> 2841 default "64" if NR_CPUS_DEFAULT_64
>> 2842 help
>> 2843 This allows you to specify the maximum number of CPUs which this
>> 2844 kernel will support. The maximum supported value is 32 for 32-bit
>> 2845 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2846 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2847 and 2 for all others.
>> 2848
>> 2849 This is purely to save memory - each supported CPU adds
>> 2850 approximately eight kilobytes to the kernel image. For best
>> 2851 performance should round up your number of processors to the next
>> 2852 power of two.
>> 2853
>> 2854 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2855 bool
>> 2856
>> 2857 config MIPS_NR_CPU_NR_MAP_1024
>> 2858 bool
>> 2859
>> 2860 config MIPS_NR_CPU_NR_MAP
>> 2861 int
>> 2862 depends on SMP
>> 2863 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2864 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2865
>> 2866 #
>> 2867 # Timer Interrupt Frequency Configuration
>> 2868 #
>> 2869
>> 2870 choice
>> 2871 prompt "Timer frequency"
>> 2872 default HZ_250
>> 2873 help
>> 2874 Allows the configuration of the timer frequency.
>> 2875
>> 2876 config HZ_24
>> 2877 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2878
>> 2879 config HZ_48
>> 2880 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2881
>> 2882 config HZ_100
>> 2883 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2884
>> 2885 config HZ_128
>> 2886 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2887
>> 2888 config HZ_250
>> 2889 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2890
>> 2891 config HZ_256
>> 2892 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2893
>> 2894 config HZ_1000
>> 2895 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2896
>> 2897 config HZ_1024
>> 2898 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2899
>> 2900 endchoice
>> 2901
>> 2902 config SYS_SUPPORTS_24HZ
>> 2903 bool
>> 2904
>> 2905 config SYS_SUPPORTS_48HZ
>> 2906 bool
>> 2907
>> 2908 config SYS_SUPPORTS_100HZ
>> 2909 bool
>> 2910
>> 2911 config SYS_SUPPORTS_128HZ
>> 2912 bool
>> 2913
>> 2914 config SYS_SUPPORTS_250HZ
>> 2915 bool
>> 2916
>> 2917 config SYS_SUPPORTS_256HZ
>> 2918 bool
>> 2919
>> 2920 config SYS_SUPPORTS_1000HZ
>> 2921 bool
>> 2922
>> 2923 config SYS_SUPPORTS_1024HZ
>> 2924 bool
>> 2925
>> 2926 config SYS_SUPPORTS_ARBIT_HZ
>> 2927 bool
>> 2928 default y if !SYS_SUPPORTS_24HZ && \
>> 2929 !SYS_SUPPORTS_48HZ && \
>> 2930 !SYS_SUPPORTS_100HZ && \
>> 2931 !SYS_SUPPORTS_128HZ && \
>> 2932 !SYS_SUPPORTS_250HZ && \
>> 2933 !SYS_SUPPORTS_256HZ && \
>> 2934 !SYS_SUPPORTS_1000HZ && \
>> 2935 !SYS_SUPPORTS_1024HZ
>> 2936
>> 2937 config HZ
>> 2938 int
>> 2939 default 24 if HZ_24
>> 2940 default 48 if HZ_48
>> 2941 default 100 if HZ_100
>> 2942 default 128 if HZ_128
>> 2943 default 250 if HZ_250
>> 2944 default 256 if HZ_256
>> 2945 default 1000 if HZ_1000
>> 2946 default 1024 if HZ_1024
>> 2947
>> 2948 config SCHED_HRTICK
>> 2949 def_bool HIGH_RES_TIMERS
>> 2950
>> 2951 config KEXEC
>> 2952 bool "Kexec system call"
>> 2953 select KEXEC_CORE
>> 2954 help
>> 2955 kexec is a system call that implements the ability to shutdown your
>> 2956 current kernel, and to start another kernel. It is like a reboot
>> 2957 but it is independent of the system firmware. And like a reboot
>> 2958 you can start any kernel with it, not just Linux.
>> 2959
>> 2960 The name comes from the similarity to the exec system call.
>> 2961
>> 2962 It is an ongoing process to be certain the hardware in a machine
>> 2963 is properly shutdown, so do not be surprised if this code does not
>> 2964 initially work for you. As of this writing the exact hardware
>> 2965 interface is strongly in flux, so no good recommendation can be
>> 2966 made.
>> 2967
>> 2968 config CRASH_DUMP
>> 2969 bool "Kernel crash dumps"
>> 2970 help
>> 2971 Generate crash dump after being started by kexec.
>> 2972 This should be normally only set in special crash dump kernels
>> 2973 which are loaded in the main kernel with kexec-tools into
>> 2974 a specially reserved region and then later executed after
>> 2975 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2976 to a memory address not used by the main kernel or firmware using
>> 2977 PHYSICAL_START.
459 2978
460 config SUN_OPENPROMFS !! 2979 config PHYSICAL_START
461 tristate "Openprom tree appears in /pr !! 2980 hex "Physical address where the kernel is loaded"
>> 2981 default "0xffffffff84000000"
>> 2982 depends on CRASH_DUMP
462 help 2983 help
463 If you say Y, the OpenPROM device tr !! 2984 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
464 virtual file system, which you can m !! 2985 If you plan to use kernel for capturing the crash dump change
465 -t openpromfs none /proc/openprom". !! 2986 this value to start of the reserved region (the "X" value as
>> 2987 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2988 passed to the panic-ed kernel).
466 2989
467 To compile the /proc/openprom suppor !! 2990 config MIPS_O32_FP64_SUPPORT
468 module will be called openpromfs. !! 2991 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 2992 depends on 32BIT || MIPS32_O32
>> 2993 help
>> 2994 When this is enabled, the kernel will support use of 64-bit floating
>> 2995 point registers with binaries using the O32 ABI along with the
>> 2996 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2997 32-bit MIPS systems this support is at the cost of increasing the
>> 2998 size and complexity of the compiled FPU emulator. Thus if you are
>> 2999 running a MIPS32 system and know that none of your userland binaries
>> 3000 will require 64-bit floating point, you may wish to reduce the size
>> 3001 of your kernel & potentially improve FP emulation performance by
>> 3002 saying N here.
>> 3003
>> 3004 Although binutils currently supports use of this flag the details
>> 3005 concerning its effect upon the O32 ABI in userland are still being
>> 3006 worked on. In order to avoid userland becoming dependent upon current
>> 3007 behaviour before the details have been finalised, this option should
>> 3008 be considered experimental and only enabled by those working upon
>> 3009 said details.
>> 3010
>> 3011 If unsure, say N.
469 3012
470 Only choose N if you know in advance !! 3013 config USE_OF
471 OpenPROM settings on the running sys !! 3014 bool
>> 3015 select OF
>> 3016 select OF_EARLY_FLATTREE
>> 3017 select IRQ_DOMAIN
>> 3018
>> 3019 config UHI_BOOT
>> 3020 bool
>> 3021
>> 3022 config BUILTIN_DTB
>> 3023 bool
>> 3024
>> 3025 choice
>> 3026 prompt "Kernel appended dtb support" if USE_OF
>> 3027 default MIPS_NO_APPENDED_DTB
>> 3028
>> 3029 config MIPS_NO_APPENDED_DTB
>> 3030 bool "None"
>> 3031 help
>> 3032 Do not enable appended dtb support.
>> 3033
>> 3034 config MIPS_ELF_APPENDED_DTB
>> 3035 bool "vmlinux"
>> 3036 help
>> 3037 With this option, the boot code will look for a device tree binary
>> 3038 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 3039 it is empty and the DTB can be appended using binutils command
>> 3040 objcopy:
>> 3041
>> 3042 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 3043
>> 3044 This is meant as a backward compatibility convenience for those
>> 3045 systems with a bootloader that can't be upgraded to accommodate
>> 3046 the documented boot protocol using a device tree.
>> 3047
>> 3048 config MIPS_RAW_APPENDED_DTB
>> 3049 bool "vmlinux.bin or vmlinuz.bin"
>> 3050 help
>> 3051 With this option, the boot code will look for a device tree binary
>> 3052 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 3053 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 3054
>> 3055 This is meant as a backward compatibility convenience for those
>> 3056 systems with a bootloader that can't be upgraded to accommodate
>> 3057 the documented boot protocol using a device tree.
>> 3058
>> 3059 Beware that there is very little in terms of protection against
>> 3060 this option being confused by leftover garbage in memory that might
>> 3061 look like a DTB header after a reboot if no actual DTB is appended
>> 3062 to vmlinux.bin. Do not leave this option active in a production kernel
>> 3063 if you don't intend to always append a DTB.
>> 3064 endchoice
>> 3065
>> 3066 choice
>> 3067 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
>> 3068 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 3069 !MACH_LOONGSON64 && !MIPS_MALTA && \
>> 3070 !CAVIUM_OCTEON_SOC
>> 3071 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 3072
>> 3073 config MIPS_CMDLINE_FROM_DTB
>> 3074 depends on USE_OF
>> 3075 bool "Dtb kernel arguments if available"
>> 3076
>> 3077 config MIPS_CMDLINE_DTB_EXTEND
>> 3078 depends on USE_OF
>> 3079 bool "Extend dtb kernel arguments with bootloader arguments"
>> 3080
>> 3081 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 3082 bool "Bootloader kernel arguments if available"
>> 3083
>> 3084 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3085 depends on CMDLINE_BOOL
>> 3086 bool "Extend builtin kernel arguments with bootloader arguments"
>> 3087 endchoice
>> 3088
>> 3089 endmenu
>> 3090
>> 3091 config LOCKDEP_SUPPORT
>> 3092 bool
>> 3093 default y
472 3094
473 # Makefile helpers !! 3095 config STACKTRACE_SUPPORT
474 config SPARC64_PCI <<
475 bool 3096 bool
476 default y 3097 default y
477 depends on SPARC64 && PCI <<
478 3098
479 config SPARC64_PCI_MSI !! 3099 config PGTABLE_LEVELS
>> 3100 int
>> 3101 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3102 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
>> 3103 default 2
>> 3104
>> 3105 config MIPS_AUTO_PFN_OFFSET
>> 3106 bool
>> 3107
>> 3108 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 3109
>> 3110 config PCI_DRIVERS_GENERIC
>> 3111 select PCI_DOMAINS_GENERIC if PCI
>> 3112 bool
>> 3113
>> 3114 config PCI_DRIVERS_LEGACY
>> 3115 def_bool !PCI_DRIVERS_GENERIC
>> 3116 select NO_GENERIC_PCI_IOPORT_MAP
>> 3117 select PCI_DOMAINS if PCI
>> 3118
>> 3119 #
>> 3120 # ISA support is now enabled via select. Too many systems still have the one
>> 3121 # or other ISA chip on the board that users don't know about so don't expect
>> 3122 # users to choose the right thing ...
>> 3123 #
>> 3124 config ISA
>> 3125 bool
>> 3126
>> 3127 config TC
>> 3128 bool "TURBOchannel support"
>> 3129 depends on MACH_DECSTATION
>> 3130 help
>> 3131 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3132 processors. TURBOchannel programming specifications are available
>> 3133 at:
>> 3134 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3135 and:
>> 3136 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3137 Linux driver support status is documented at:
>> 3138 <http://www.linux-mips.org/wiki/DECstation>
>> 3139
>> 3140 config MMU
480 bool 3141 bool
481 default y 3142 default y
482 depends on SPARC64_PCI && PCI_MSI <<
483 3143
>> 3144 config ARCH_MMAP_RND_BITS_MIN
>> 3145 default 12 if 64BIT
>> 3146 default 8
>> 3147
>> 3148 config ARCH_MMAP_RND_BITS_MAX
>> 3149 default 18 if 64BIT
>> 3150 default 15
>> 3151
>> 3152 config ARCH_MMAP_RND_COMPAT_BITS_MIN
>> 3153 default 8
>> 3154
>> 3155 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3156 default 15
>> 3157
>> 3158 config I8253
>> 3159 bool
>> 3160 select CLKSRC_I8253
>> 3161 select CLKEVT_I8253
>> 3162 select MIPS_EXTERNAL_TIMER
484 endmenu 3163 endmenu
485 3164
>> 3165 config TRAD_SIGNALS
>> 3166 bool
>> 3167
>> 3168 config MIPS32_COMPAT
>> 3169 bool
>> 3170
486 config COMPAT 3171 config COMPAT
487 bool 3172 bool
488 depends on SPARC64 !! 3173
489 default y !! 3174 config SYSVIPC_COMPAT
490 select HAVE_UID16 !! 3175 bool
>> 3176
>> 3177 config MIPS32_O32
>> 3178 bool "Kernel support for o32 binaries"
>> 3179 depends on 64BIT
491 select ARCH_WANT_OLD_COMPAT_IPC 3180 select ARCH_WANT_OLD_COMPAT_IPC
492 select COMPAT_OLD_SIGACTION !! 3181 select COMPAT
>> 3182 select MIPS32_COMPAT
>> 3183 select SYSVIPC_COMPAT if SYSVIPC
>> 3184 help
>> 3185 Select this option if you want to run o32 binaries. These are pure
>> 3186 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3187 existing binaries are in this format.
>> 3188
>> 3189 If unsure, say Y.
>> 3190
>> 3191 config MIPS32_N32
>> 3192 bool "Kernel support for n32 binaries"
>> 3193 depends on 64BIT
>> 3194 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
>> 3195 select COMPAT
>> 3196 select MIPS32_COMPAT
>> 3197 select SYSVIPC_COMPAT if SYSVIPC
>> 3198 help
>> 3199 Select this option if you want to run n32 binaries. These are
>> 3200 64-bit binaries using 32-bit quantities for addressing and certain
>> 3201 data that would normally be 64-bit. They are used in special
>> 3202 cases.
>> 3203
>> 3204 If unsure, say N.
>> 3205
>> 3206 menu "Power management options"
>> 3207
>> 3208 config ARCH_HIBERNATION_POSSIBLE
>> 3209 def_bool y
>> 3210 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3211
>> 3212 config ARCH_SUSPEND_POSSIBLE
>> 3213 def_bool y
>> 3214 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3215
>> 3216 source "kernel/power/Kconfig"
>> 3217
>> 3218 endmenu
>> 3219
>> 3220 config MIPS_EXTERNAL_TIMER
>> 3221 bool
>> 3222
>> 3223 menu "CPU Power Management"
>> 3224
>> 3225 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3226 source "drivers/cpufreq/Kconfig"
>> 3227 endif
>> 3228
>> 3229 source "drivers/cpuidle/Kconfig"
>> 3230
>> 3231 endmenu
>> 3232
>> 3233 source "arch/mips/kvm/Kconfig"
493 3234
494 source "drivers/sbus/char/Kconfig" !! 3235 source "arch/mips/vdso/Kconfig"
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