1 /* SPDX-License-Identifier: GPL-2.0 */ 1 2 /* 3 * winmacro.h: Window loading-unloading macros 4 * 5 * Copyright (C) 1995 David S. Miller (davem@c 6 */ 7 8 #ifndef _SPARC_WINMACRO_H 9 #define _SPARC_WINMACRO_H 10 11 #include <asm/ptrace.h> 12 13 /* Store the register window onto the 8-byte a 14 * at %reg. It might be %sp, it might not, we 15 */ 16 #define STORE_WINDOW(reg) \ 17 std %l0, [%reg + RW_L0]; \ 18 std %l2, [%reg + RW_L2]; \ 19 std %l4, [%reg + RW_L4]; \ 20 std %l6, [%reg + RW_L6]; \ 21 std %i0, [%reg + RW_I0]; \ 22 std %i2, [%reg + RW_I2]; \ 23 std %i4, [%reg + RW_I4]; \ 24 std %i6, [%reg + RW_I6]; 25 26 /* Load a register window from the area beginn 27 #define LOAD_WINDOW(reg) \ 28 ldd [%reg + RW_L0], %l0; \ 29 ldd [%reg + RW_L2], %l2; \ 30 ldd [%reg + RW_L4], %l4; \ 31 ldd [%reg + RW_L6], %l6; \ 32 ldd [%reg + RW_I0], %i0; \ 33 ldd [%reg + RW_I2], %i2; \ 34 ldd [%reg + RW_I4], %i4; \ 35 ldd [%reg + RW_I6], %i6; 36 37 /* Loading and storing struct pt_reg trap fram 38 #define LOAD_PT_INS(base_reg) \ 39 ldd [%base_reg + STACKFRAME_SZ + P 40 ldd [%base_reg + STACKFRAME_SZ + P 41 ldd [%base_reg + STACKFRAME_SZ + P 42 ldd [%base_reg + STACKFRAME_SZ + P 43 44 #define LOAD_PT_GLOBALS(base_reg) \ 45 ld [%base_reg + STACKFRAME_SZ + P 46 ldd [%base_reg + STACKFRAME_SZ + P 47 ldd [%base_reg + STACKFRAME_SZ + P 48 ldd [%base_reg + STACKFRAME_SZ + P 49 50 #define LOAD_PT_YREG(base_reg, scratch) \ 51 ld [%base_reg + STACKFRAME_SZ + P 52 wr %scratch, 0x0, %y; 53 54 #define LOAD_PT_PRIV(base_reg, pt_psr, pt_pc, 55 ld [%base_reg + STACKFRAME_SZ + P 56 ld [%base_reg + STACKFRAME_SZ + P 57 ld [%base_reg + STACKFRAME_SZ + P 58 59 #define LOAD_PT_ALL(base_reg, pt_psr, pt_pc, p 60 LOAD_PT_YREG(base_reg, scratch) \ 61 LOAD_PT_INS(base_reg) \ 62 LOAD_PT_GLOBALS(base_reg) \ 63 LOAD_PT_PRIV(base_reg, pt_psr, pt_pc, 64 65 #define STORE_PT_INS(base_reg) \ 66 std %i0, [%base_reg + STACKFRAME_S 67 std %i2, [%base_reg + STACKFRAME_S 68 std %i4, [%base_reg + STACKFRAME_S 69 std %i6, [%base_reg + STACKFRAME_S 70 71 #define STORE_PT_GLOBALS(base_reg) \ 72 st %g1, [%base_reg + STACKFRAME_S 73 std %g2, [%base_reg + STACKFRAME_S 74 std %g4, [%base_reg + STACKFRAME_S 75 std %g6, [%base_reg + STACKFRAME_S 76 77 #define STORE_PT_YREG(base_reg, scratch) \ 78 rd %y, %scratch; \ 79 st %scratch, [%base_reg + STACKFR 80 81 #define STORE_PT_PRIV(base_reg, pt_psr, pt_pc, 82 st %pt_psr, [%base_reg + STACKFRA 83 st %pt_pc, [%base_reg + STACKFRA 84 st %pt_npc, [%base_reg + STACKFRA 85 86 #define STORE_PT_ALL(base_reg, reg_psr, reg_pc 87 STORE_PT_PRIV(base_reg, reg_psr, reg_p 88 STORE_PT_GLOBALS(base_reg) \ 89 STORE_PT_YREG(base_reg, g_scratch) \ 90 STORE_PT_INS(base_reg) 91 92 #define SAVE_BOLIXED_USER_STACK(cur_reg, scrat 93 ld [%cur_reg + TI_W_SAVED], %scr 94 sll %scratch, 2, %scratch; \ 95 add %scratch, %cur_reg, %scratch; 96 st %sp, [%scratch + TI_RWIN_SPTR 97 sub %scratch, %cur_reg, %scratch; 98 sll %scratch, 4, %scratch; \ 99 add %scratch, %cur_reg, %scratch; 100 STORE_WINDOW(scratch + TI_REG_WINDOW); 101 sub %scratch, %cur_reg, %scratch; 102 srl %scratch, 6, %scratch; \ 103 add %scratch, 1, %scratch; \ 104 st %scratch, [%cur_reg + TI_W_SA 105 106 #ifdef CONFIG_SMP 107 #define LOAD_CURRENT(dest_reg, idreg) 108 661: rd %tbr, %idreg; 109 srl %idreg, 10, %idreg; 110 and %idreg, 0xc, %idreg; 111 .section .cpuid_patch, "ax"; 112 /* Instruction location. */ 113 .word 661b; 114 /* SUN4D implementation. */ 115 lda [%g0] ASI_M_VIKING_TMP1, %idr 116 sll %idreg, 2, %idreg; 117 nop; 118 /* LEON implementation. */ 119 rd %asr17, %idreg; 120 srl %idreg, 0x1c, %idreg; 121 sll %idreg, 0x02, %idreg; 122 .previous; 123 sethi %hi(current_set), %dest_reg; 124 or %dest_reg, %lo(current_set), 125 ld [%idreg + %dest_reg], %dest_r 126 #else 127 #define LOAD_CURRENT(dest_reg, idreg) \ 128 sethi %hi(current_set), %idreg; \ 129 ld [%idreg + %lo(current_set)], 130 #endif 131 132 #endif /* !(_SPARC_WINMACRO_H) */ 133
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