1 /* SPDX-License-Identifier: GPL-2.0 */ !! 1 /* SPDX-License-Identifier: GPL-2.0-or-later
2 /* arch/sparc/kernel/entry.S: Sparc trap low- !! 2 * -*- mode: asm -*-
>> 3 *
>> 4 * linux/arch/m68k/kernel/entry.S
>> 5 *
>> 6 * Copyright (C) 1991, 1992 Linus Torvalds
>> 7 *
>> 8 * Linux/m68k support by Hamish Macdonald
>> 9 *
>> 10 * 68060 fixes by Jesper Skov
3 * 11 *
4 * Copyright (C) 1995, 2007 David S. Miller (d <<
5 * Copyright (C) 1996 Eddie C. Dost (ecd@sky <<
6 * Copyright (C) 1996 Miguel de Icaza (miguel@ <<
7 * Copyright (C) 1996-1999 Jakub Jelinek (jj <<
8 * Copyright (C) 1997 Anton Blanchard (anton@p <<
9 */ 12 */
10 13
11 #include <linux/export.h> !! 14 /*
12 #include <linux/linkage.h> !! 15 * entry.S contains the system-call and fault low-level handling routines.
13 #include <linux/errno.h> !! 16 * This also contains the timer-interrupt handler, as well as all interrupts
14 #include <linux/pgtable.h> !! 17 * and faults that can result in a task-switch.
15 !! 18 *
16 #include <asm/head.h> !! 19 * NOTE: This code handles signal-recognition, which happens every time
17 #include <asm/asi.h> !! 20 * after a timer-interrupt and after each system call.
18 #include <asm/smp.h> !! 21 *
19 #include <asm/contregs.h> <<
20 #include <asm/ptrace.h> <<
21 #include <asm/asm-offsets.h> <<
22 #include <asm/psr.h> <<
23 #include <asm/vaddrs.h> <<
24 #include <asm/page.h> <<
25 #include <asm/winmacro.h> <<
26 #include <asm/signal.h> <<
27 #include <asm/obio.h> <<
28 #include <asm/mxcc.h> <<
29 #include <asm/thread_info.h> <<
30 #include <asm/param.h> <<
31 #include <asm/unistd.h> <<
32 <<
33 #include <asm/asmmacro.h> <<
34 <<
35 #define curptr g6 <<
36 <<
37 /* These are just handy. */ <<
38 #define _SV save %sp, -STACKFRAME_SZ, % <<
39 #define _RS restore <<
40 <<
41 #define FLUSH_ALL_KERNEL_WINDOWS \ <<
42 _SV; _SV; _SV; _SV; _SV; _SV; _SV; \ <<
43 _RS; _RS; _RS; _RS; _RS; _RS; _RS; <<
44 <<
45 .text <<
46 <<
47 #ifdef CONFIG_KGDB <<
48 .align 4 <<
49 .globl arch_kgdb_breakpoint <<
50 .type arch_kgdb_breakpoint,# <<
51 arch_kgdb_breakpoint: <<
52 ta 0x7d <<
53 retl <<
54 nop <<
55 .size arch_kgdb_breakpoint,. <<
56 #endif <<
57 <<
58 #if defined(CONFIG_BLK_DEV_FD) || defined(CONF <<
59 .align 4 <<
60 .globl floppy_hardint <<
61 floppy_hardint: <<
62 /* <<
63 * This code cannot touch registers %l <<
64 * because SAVE_ALL depends on their v <<
65 * on %l3 also, but we regenerate it b <<
66 * Other registers are: <<
67 * %l3 -- base address of fdc register <<
68 * %l4 -- pdma_vaddr <<
69 * %l5 -- scratch for ld/st address <<
70 * %l6 -- pdma_size <<
71 * %l7 -- scratch [floppy byte, ld/st <<
72 */ <<
73 <<
74 /* Do we have work to do? */ <<
75 sethi %hi(doing_pdma), %l7 <<
76 ld [%l7 + %lo(doing_pdma)], %l7 <<
77 cmp %l7, 0 <<
78 be floppy_dosoftint <<
79 nop <<
80 <<
81 /* Load fdc register base */ <<
82 sethi %hi(fdc_status), %l3 <<
83 ld [%l3 + %lo(fdc_status)], %l3 <<
84 <<
85 /* Setup register addresses */ <<
86 sethi %hi(pdma_vaddr), %l5 ! tran <<
87 ld [%l5 + %lo(pdma_vaddr)], %l4 <<
88 sethi %hi(pdma_size), %l5 ! byte <<
89 ld [%l5 + %lo(pdma_size)], %l6 <<
90 next_byte: <<
91 ldub [%l3], %l7 <<
92 <<
93 andcc %l7, 0x80, %g0 ! Does <<
94 bz floppy_fifo_emptied ! fifo <<
95 andcc %l7, 0x20, %g0 ! in n <<
96 bz floppy_overrun ! nope <<
97 andcc %l7, 0x40, %g0 ! 0=wr <<
98 bz floppy_write <<
99 sub %l6, 0x1, %l6 <<
100 <<
101 /* Ok, actually read this byte */ <<
102 ldub [%l3 + 1], %l7 <<
103 orcc %g0, %l6, %g0 <<
104 stb %l7, [%l4] <<
105 bne next_byte <<
106 add %l4, 0x1, %l4 <<
107 <<
108 b floppy_tdone <<
109 nop <<
110 <<
111 floppy_write: <<
112 /* Ok, actually write this byte */ <<
113 ldub [%l4], %l7 <<
114 orcc %g0, %l6, %g0 <<
115 stb %l7, [%l3 + 1] <<
116 bne next_byte <<
117 add %l4, 0x1, %l4 <<
118 <<
119 /* fall through... */ <<
120 floppy_tdone: <<
121 sethi %hi(pdma_vaddr), %l5 <<
122 st %l4, [%l5 + %lo(pdma_vaddr)] <<
123 sethi %hi(pdma_size), %l5 <<
124 st %l6, [%l5 + %lo(pdma_size)] <<
125 /* Flip terminal count pin */ <<
126 set auxio_register, %l7 <<
127 ld [%l7], %l7 <<
128 <<
129 ldub [%l7], %l5 <<
130 <<
131 or %l5, 0xc2, %l5 <<
132 stb %l5, [%l7] <<
133 andn %l5, 0x02, %l5 <<
134 <<
135 2: <<
136 /* Kill some time so the bits set */ <<
137 WRITE_PAUSE <<
138 WRITE_PAUSE <<
139 <<
140 stb %l5, [%l7] <<
141 <<
142 /* Prevent recursion */ <<
143 sethi %hi(doing_pdma), %l7 <<
144 b floppy_dosoftint <<
145 st %g0, [%l7 + %lo(doing_pdma)] <<
146 <<
147 /* We emptied the FIFO, but we haven't <<
148 * as of yet. Store the current trans <<
149 * bytes left to read so we can contin <<
150 * fast IRQ comes in. <<
151 */ <<
152 floppy_fifo_emptied: <<
153 sethi %hi(pdma_vaddr), %l5 <<
154 st %l4, [%l5 + %lo(pdma_vaddr)] <<
155 sethi %hi(pdma_size), %l7 <<
156 st %l6, [%l7 + %lo(pdma_size)] <<
157 <<
158 /* Restore condition codes */ <<
159 wr %l0, 0x0, %psr <<
160 WRITE_PAUSE <<
161 <<
162 jmp %l1 <<
163 rett %l2 <<
164 <<
165 floppy_overrun: <<
166 sethi %hi(pdma_vaddr), %l5 <<
167 st %l4, [%l5 + %lo(pdma_vaddr)] <<
168 sethi %hi(pdma_size), %l5 <<
169 st %l6, [%l5 + %lo(pdma_size)] <<
170 /* Prevent recursion */ <<
171 sethi %hi(doing_pdma), %l7 <<
172 st %g0, [%l7 + %lo(doing_pdma)] <<
173 <<
174 /* fall through... */ <<
175 floppy_dosoftint: <<
176 rd %wim, %l3 <<
177 SAVE_ALL <<
178 <<
179 /* Set all IRQs off. */ <<
180 or %l0, PSR_PIL, %l4 <<
181 wr %l4, 0x0, %psr <<
182 WRITE_PAUSE <<
183 wr %l4, PSR_ET, %psr <<
184 WRITE_PAUSE <<
185 <<
186 mov 11, %o0 ! flop <<
187 mov %g0, %o1 ! devi <<
188 call sparc_floppy_irq <<
189 add %sp, STACKFRAME_SZ, %o2 ! stru <<
190 <<
191 RESTORE_ALL <<
192 <<
193 #endif /* (CONFIG_BLK_DEV_FD) */ <<
194 <<
195 /* Bad trap handler */ <<
196 .globl bad_trap_handler <<
197 bad_trap_handler: <<
198 SAVE_ALL <<
199 <<
200 wr %l0, PSR_ET, %psr <<
201 WRITE_PAUSE <<
202 <<
203 add %sp, STACKFRAME_SZ, %o0 ! pt_r <<
204 call do_hw_interrupt <<
205 mov %l7, %o1 ! trap <<
206 <<
207 RESTORE_ALL <<
208 <<
209 /* For now all IRQ's not registered get sent h <<
210 * see if a routine is registered to handle th <<
211 * it will say so on the console. <<
212 */ 22 */
213 23
214 .align 4 !! 24 /*
215 .globl real_irq_entry, patch_handler_ !! 25 * 12/03/96 Jes: Currently we only support m68k single-cpu systems, so
216 real_irq_entry: !! 26 * all pointers that used to be 'current' are now entry
217 SAVE_ALL !! 27 * number 0 in the 'current_set' list.
218 <<
219 #ifdef CONFIG_SMP <<
220 .globl patchme_maybe_smp_msg <<
221 <<
222 cmp %l7, 11 <<
223 patchme_maybe_smp_msg: <<
224 bgu maybe_smp4m_msg <<
225 nop <<
226 #endif <<
227 <<
228 real_irq_continue: <<
229 or %l0, PSR_PIL, %g2 <<
230 wr %g2, 0x0, %psr <<
231 WRITE_PAUSE <<
232 wr %g2, PSR_ET, %psr <<
233 WRITE_PAUSE <<
234 mov %l7, %o0 ! irq <<
235 patch_handler_irq: <<
236 call handler_irq <<
237 add %sp, STACKFRAME_SZ, %o1 ! pt_r <<
238 or %l0, PSR_PIL, %g2 ! rest <<
239 wr %g2, PSR_ET, %psr ! keep <<
240 WRITE_PAUSE <<
241 <<
242 RESTORE_ALL <<
243 <<
244 #ifdef CONFIG_SMP <<
245 /* SMP per-cpu ticker interrupts are h <<
246 smp4m_ticker: <<
247 bne real_irq_continue+4 <<
248 or %l0, PSR_PIL, %g2 <<
249 wr %g2, 0x0, %psr <<
250 WRITE_PAUSE <<
251 wr %g2, PSR_ET, %psr <<
252 WRITE_PAUSE <<
253 call smp4m_percpu_timer_interrupt <<
254 add %sp, STACKFRAME_SZ, %o0 <<
255 wr %l0, PSR_ET, %psr <<
256 WRITE_PAUSE <<
257 RESTORE_ALL <<
258 <<
259 #define GET_PROCESSOR4M_ID(reg) \ <<
260 rd %tbr, %reg; \ <<
261 srl %reg, 12, %reg; \ <<
262 and %reg, 3, %reg; <<
263 <<
264 /* Here is where we check for possible <<
265 * on some level other than 15 which i <<
266 * for cross calls. That has a separa <<
267 * <<
268 * IPIs are sent on Level 12, 13 and 1 <<
269 */ <<
270 maybe_smp4m_msg: <<
271 GET_PROCESSOR4M_ID(o3) <<
272 sethi %hi(sun4m_irq_percpu), %l5 <<
273 sll %o3, 2, %o3 <<
274 or %l5, %lo(sun4m_irq_percpu), %o <<
275 sethi %hi(0x70000000), %o2 ! Chec <<
276 ld [%o5 + %o3], %o1 <<
277 ld [%o1 + 0x00], %o3 ! sun4 <<
278 andcc %o3, %o2, %g0 <<
279 be,a smp4m_ticker <<
280 cmp %l7, 14 <<
281 /* Soft-IRQ IPI */ <<
282 st %o2, [%o1 + 0x04] ! sun4 <<
283 WRITE_PAUSE <<
284 ld [%o1 + 0x00], %g0 ! sun4 <<
285 WRITE_PAUSE <<
286 or %l0, PSR_PIL, %l4 <<
287 wr %l4, 0x0, %psr <<
288 WRITE_PAUSE <<
289 wr %l4, PSR_ET, %psr <<
290 WRITE_PAUSE <<
291 srl %o3, 28, %o2 ! shif <<
292 maybe_smp4m_msg_check_single: <<
293 andcc %o2, 0x1, %g0 <<
294 beq,a maybe_smp4m_msg_check_mask <<
295 andcc %o2, 0x2, %g0 <<
296 call smp_call_function_single_inter <<
297 nop <<
298 andcc %o2, 0x2, %g0 <<
299 maybe_smp4m_msg_check_mask: <<
300 beq,a maybe_smp4m_msg_check_resched <<
301 andcc %o2, 0x4, %g0 <<
302 call smp_call_function_interrupt <<
303 nop <<
304 andcc %o2, 0x4, %g0 <<
305 maybe_smp4m_msg_check_resched: <<
306 /* rescheduling is done in RESTORE_ALL <<
307 beq,a maybe_smp4m_msg_out <<
308 nop <<
309 call smp_resched_interrupt <<
310 nop <<
311 maybe_smp4m_msg_out: <<
312 RESTORE_ALL <<
313 <<
314 .align 4 <<
315 .globl linux_trap_ipi15_sun4m <<
316 linux_trap_ipi15_sun4m: <<
317 SAVE_ALL <<
318 sethi %hi(0x80000000), %o2 <<
319 GET_PROCESSOR4M_ID(o0) <<
320 sethi %hi(sun4m_irq_percpu), %l5 <<
321 or %l5, %lo(sun4m_irq_percpu), %o <<
322 sll %o0, 2, %o0 <<
323 ld [%o5 + %o0], %o5 <<
324 ld [%o5 + 0x00], %o3 ! sun4 <<
325 andcc %o3, %o2, %g0 <<
326 be sun4m_nmi_error ! Must <<
327 st %o2, [%o5 + 0x04] ! sun4 <<
328 WRITE_PAUSE <<
329 ld [%o5 + 0x00], %g0 ! sun4 <<
330 WRITE_PAUSE <<
331 or %l0, PSR_PIL, %l4 <<
332 wr %l4, 0x0, %psr <<
333 WRITE_PAUSE <<
334 wr %l4, PSR_ET, %psr <<
335 WRITE_PAUSE <<
336 call smp4m_cross_call_irq <<
337 nop <<
338 b ret_trap_lockless_ipi <<
339 clr %l6 <<
340 <<
341 .globl smp4d_ticker <<
342 /* SMP per-cpu ticker interrupts are h <<
343 smp4d_ticker: <<
344 SAVE_ALL <<
345 or %l0, PSR_PIL, %g2 <<
346 sethi %hi(CC_ICLR), %o0 <<
347 sethi %hi(1 << 14), %o1 <<
348 or %o0, %lo(CC_ICLR), %o0 <<
349 stha %o1, [%o0] ASI_M_MXCC /* Cle <<
350 wr %g2, 0x0, %psr <<
351 WRITE_PAUSE <<
352 wr %g2, PSR_ET, %psr <<
353 WRITE_PAUSE <<
354 call smp4d_percpu_timer_interrupt <<
355 add %sp, STACKFRAME_SZ, %o0 <<
356 wr %l0, PSR_ET, %psr <<
357 WRITE_PAUSE <<
358 RESTORE_ALL <<
359 <<
360 .align 4 <<
361 .globl linux_trap_ipi15_sun4d <<
362 linux_trap_ipi15_sun4d: <<
363 SAVE_ALL <<
364 sethi %hi(CC_BASE), %o4 <<
365 sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|M <<
366 or %o4, (CC_EREG - CC_BASE), %o0 <<
367 ldda [%o0] ASI_M_MXCC, %o0 <<
368 andcc %o0, %o2, %g0 <<
369 bne 1f <<
370 sethi %hi(BB_STAT2), %o2 <<
371 lduba [%o2] ASI_M_CTL, %o2 <<
372 andcc %o2, BB_STAT2_MASK, %g0 <<
373 bne 2f <<
374 or %o4, (CC_ICLR - CC_BASE), %o0 <<
375 sethi %hi(1 << 15), %o1 <<
376 stha %o1, [%o0] ASI_M_MXCC /* Cle <<
377 or %l0, PSR_PIL, %l4 <<
378 wr %l4, 0x0, %psr <<
379 WRITE_PAUSE <<
380 wr %l4, PSR_ET, %psr <<
381 WRITE_PAUSE <<
382 call smp4d_cross_call_irq <<
383 nop <<
384 b ret_trap_lockless_ipi <<
385 clr %l6 <<
386 <<
387 1: /* MXCC error */ <<
388 2: /* BB error */ <<
389 /* Disable PIL 15 */ <<
390 set CC_IMSK, %l4 <<
391 lduha [%l4] ASI_M_MXCC, %l5 <<
392 sethi %hi(1 << 15), %l7 <<
393 or %l5, %l7, %l5 <<
394 stha %l5, [%l4] ASI_M_MXCC <<
395 /* FIXME */ <<
396 1: b,a 1b <<
397 <<
398 .globl smpleon_ipi <<
399 .extern leon_ipi_interrupt <<
400 /* SMP per-cpu IPI interrupts are hand <<
401 smpleon_ipi: <<
402 SAVE_ALL <<
403 or %l0, PSR_PIL, %g2 <<
404 wr %g2, 0x0, %psr <<
405 WRITE_PAUSE <<
406 wr %g2, PSR_ET, %psr <<
407 WRITE_PAUSE <<
408 call leonsmp_ipi_interrupt <<
409 add %sp, STACKFRAME_SZ, %o1 ! pt_r <<
410 wr %l0, PSR_ET, %psr <<
411 WRITE_PAUSE <<
412 RESTORE_ALL <<
413 <<
414 .align 4 <<
415 .globl linux_trap_ipi15_leon <<
416 linux_trap_ipi15_leon: <<
417 SAVE_ALL <<
418 or %l0, PSR_PIL, %l4 <<
419 wr %l4, 0x0, %psr <<
420 WRITE_PAUSE <<
421 wr %l4, PSR_ET, %psr <<
422 WRITE_PAUSE <<
423 call leon_cross_call_irq <<
424 nop <<
425 b ret_trap_lockless_ipi <<
426 clr %l6 <<
427 <<
428 #endif /* CONFIG_SMP */ <<
429 <<
430 /* This routine handles illegal instru <<
431 * instruction attempts from user code <<
432 */ <<
433 .align 4 <<
434 .globl bad_instruction <<
435 bad_instruction: <<
436 sethi %hi(0xc1f80000), %l4 <<
437 ld [%l1], %l5 <<
438 sethi %hi(0x81d80000), %l7 <<
439 and %l5, %l4, %l5 <<
440 cmp %l5, %l7 <<
441 be 1f <<
442 SAVE_ALL <<
443 <<
444 wr %l0, PSR_ET, %psr <<
445 WRITE_PAUSE <<
446 <<
447 add %sp, STACKFRAME_SZ, %o0 <<
448 mov %l1, %o1 <<
449 mov %l2, %o2 <<
450 call do_illegal_instruction <<
451 mov %l0, %o3 <<
452 <<
453 RESTORE_ALL <<
454 <<
455 1: /* unimplemented flush - just skip */ <<
456 jmpl %l2, %g0 <<
457 rett %l2 + 4 <<
458 <<
459 .align 4 <<
460 .globl priv_instruction <<
461 priv_instruction: <<
462 SAVE_ALL <<
463 <<
464 wr %l0, PSR_ET, %psr <<
465 WRITE_PAUSE <<
466 <<
467 add %sp, STACKFRAME_SZ, %o0 <<
468 mov %l1, %o1 <<
469 mov %l2, %o2 <<
470 call do_priv_instruction <<
471 mov %l0, %o3 <<
472 <<
473 RESTORE_ALL <<
474 <<
475 /* This routine handles unaligned data <<
476 .align 4 <<
477 .globl mna_handler <<
478 mna_handler: <<
479 andcc %l0, PSR_PS, %g0 <<
480 be mna_fromuser <<
481 nop <<
482 <<
483 SAVE_ALL <<
484 <<
485 wr %l0, PSR_ET, %psr <<
486 WRITE_PAUSE <<
487 <<
488 ld [%l1], %o1 <<
489 call kernel_unaligned_trap <<
490 add %sp, STACKFRAME_SZ, %o0 <<
491 <<
492 RESTORE_ALL <<
493 <<
494 mna_fromuser: <<
495 SAVE_ALL <<
496 <<
497 wr %l0, PSR_ET, %psr <<
498 WRITE_PAUSE <<
499 <<
500 ld [%l1], %o1 <<
501 call user_unaligned_trap <<
502 add %sp, STACKFRAME_SZ, %o0 <<
503 <<
504 RESTORE_ALL <<
505 <<
506 /* This routine handles floating point <<
507 .align 4 <<
508 .globl fpd_trap_handler <<
509 fpd_trap_handler: <<
510 SAVE_ALL <<
511 <<
512 wr %l0, PSR_ET, %psr <<
513 WRITE_PAUSE <<
514 <<
515 add %sp, STACKFRAME_SZ, %o0 <<
516 mov %l1, %o1 <<
517 mov %l2, %o2 <<
518 call do_fpd_trap <<
519 mov %l0, %o3 <<
520 <<
521 RESTORE_ALL <<
522 <<
523 /* This routine handles Floating Point <<
524 .align 4 <<
525 .globl fpe_trap_handler <<
526 fpe_trap_handler: <<
527 set fpsave_magic, %l5 <<
528 cmp %l1, %l5 <<
529 be 1f <<
530 sethi %hi(fpsave), %l5 <<
531 or %l5, %lo(fpsave), %l5 <<
532 cmp %l1, %l5 <<
533 bne 2f <<
534 sethi %hi(fpsave_catch2), %l5 <<
535 or %l5, %lo(fpsave_catch2), %l5 <<
536 wr %l0, 0x0, %psr <<
537 WRITE_PAUSE <<
538 jmp %l5 <<
539 rett %l5 + 4 <<
540 1: <<
541 sethi %hi(fpsave_catch), %l5 <<
542 or %l5, %lo(fpsave_catch), %l5 <<
543 wr %l0, 0x0, %psr <<
544 WRITE_PAUSE <<
545 jmp %l5 <<
546 rett %l5 + 4 <<
547 <<
548 2: <<
549 SAVE_ALL <<
550 <<
551 wr %l0, PSR_ET, %psr <<
552 WRITE_PAUSE <<
553 <<
554 add %sp, STACKFRAME_SZ, %o0 <<
555 mov %l1, %o1 <<
556 mov %l2, %o2 <<
557 call do_fpe_trap <<
558 mov %l0, %o3 <<
559 <<
560 RESTORE_ALL <<
561 <<
562 /* This routine handles Tag Overflow E <<
563 .align 4 <<
564 .globl do_tag_overflow <<
565 do_tag_overflow: <<
566 SAVE_ALL <<
567 <<
568 wr %l0, PSR_ET, %psr <<
569 WRITE_PAUSE <<
570 <<
571 add %sp, STACKFRAME_SZ, %o0 <<
572 mov %l1, %o1 <<
573 mov %l2, %o2 <<
574 call handle_tag_overflow <<
575 mov %l0, %o3 <<
576 <<
577 RESTORE_ALL <<
578 <<
579 /* This routine handles Watchpoint Exc <<
580 .align 4 <<
581 .globl do_watchpoint <<
582 do_watchpoint: <<
583 SAVE_ALL <<
584 <<
585 wr %l0, PSR_ET, %psr <<
586 WRITE_PAUSE <<
587 <<
588 add %sp, STACKFRAME_SZ, %o0 <<
589 mov %l1, %o1 <<
590 mov %l2, %o2 <<
591 call handle_watchpoint <<
592 mov %l0, %o3 <<
593 <<
594 RESTORE_ALL <<
595 <<
596 /* This routine handles Register Acces <<
597 .align 4 <<
598 .globl do_reg_access <<
599 do_reg_access: <<
600 SAVE_ALL <<
601 <<
602 wr %l0, PSR_ET, %psr <<
603 WRITE_PAUSE <<
604 <<
605 add %sp, STACKFRAME_SZ, %o0 <<
606 mov %l1, %o1 <<
607 mov %l2, %o2 <<
608 call handle_reg_access <<
609 mov %l0, %o3 <<
610 <<
611 RESTORE_ALL <<
612 <<
613 /* This routine handles Co-Processor D <<
614 .align 4 <<
615 .globl do_cp_disabled <<
616 do_cp_disabled: <<
617 SAVE_ALL <<
618 <<
619 wr %l0, PSR_ET, %psr <<
620 WRITE_PAUSE <<
621 <<
622 add %sp, STACKFRAME_SZ, %o0 <<
623 mov %l1, %o1 <<
624 mov %l2, %o2 <<
625 call handle_cp_disabled <<
626 mov %l0, %o3 <<
627 <<
628 RESTORE_ALL <<
629 <<
630 /* This routine handles Co-Processor E <<
631 .align 4 <<
632 .globl do_cp_exception <<
633 do_cp_exception: <<
634 SAVE_ALL <<
635 <<
636 wr %l0, PSR_ET, %psr <<
637 WRITE_PAUSE <<
638 <<
639 add %sp, STACKFRAME_SZ, %o0 <<
640 mov %l1, %o1 <<
641 mov %l2, %o2 <<
642 call handle_cp_exception <<
643 mov %l0, %o3 <<
644 <<
645 RESTORE_ALL <<
646 <<
647 /* This routine handles Hardware Divid <<
648 .align 4 <<
649 .globl do_hw_divzero <<
650 do_hw_divzero: <<
651 SAVE_ALL <<
652 <<
653 wr %l0, PSR_ET, %psr <<
654 WRITE_PAUSE <<
655 <<
656 add %sp, STACKFRAME_SZ, %o0 <<
657 mov %l1, %o1 <<
658 mov %l2, %o2 <<
659 call handle_hw_divzero <<
660 mov %l0, %o3 <<
661 <<
662 RESTORE_ALL <<
663 <<
664 .align 4 <<
665 .globl do_flush_windows <<
666 do_flush_windows: <<
667 SAVE_ALL <<
668 <<
669 wr %l0, PSR_ET, %psr <<
670 WRITE_PAUSE <<
671 <<
672 andcc %l0, PSR_PS, %g0 <<
673 bne dfw_kernel <<
674 nop <<
675 <<
676 call flush_user_windows <<
677 nop <<
678 <<
679 /* Advance over the trap instruction. <<
680 ld [%sp + STACKFRAME_SZ + PT_NPC] <<
681 add %l1, 0x4, %l2 <<
682 st %l1, [%sp + STACKFRAME_SZ + PT <<
683 st %l2, [%sp + STACKFRAME_SZ + PT <<
684 <<
685 RESTORE_ALL <<
686 <<
687 .globl flush_patch_one <<
688 <<
689 /* We get these for debugging routines <<
690 dfw_kernel: <<
691 flush_patch_one: <<
692 FLUSH_ALL_KERNEL_WINDOWS <<
693 <<
694 /* Advance over the trap instruction. <<
695 ld [%sp + STACKFRAME_SZ + PT_NPC] <<
696 add %l1, 0x4, %l2 <<
697 st %l1, [%sp + STACKFRAME_SZ + PT <<
698 st %l2, [%sp + STACKFRAME_SZ + PT <<
699 <<
700 RESTORE_ALL <<
701 <<
702 /* The getcc software trap. The user <<
703 * the %psr in register %g1. <<
704 */ <<
705 <<
706 .align 4 <<
707 .globl getcc_trap_handler <<
708 getcc_trap_handler: <<
709 srl %l0, 20, %g1 ! give user <<
710 and %g1, 0xf, %g1 ! only ICC bit <<
711 jmp %l2 ! advance over <<
712 rett %l2 + 0x4 ! like this... <<
713 <<
714 /* The setcc software trap. The user <<
715 * that it would like placed in the %p <<
716 * any unintentional bits! <<
717 */ <<
718 <<
719 .align 4 <<
720 .globl setcc_trap_handler <<
721 setcc_trap_handler: <<
722 sll %g1, 0x14, %l4 <<
723 set PSR_ICC, %l5 <<
724 andn %l0, %l5, %l0 ! clear ICC bi <<
725 and %l4, %l5, %l4 ! clear non-IC <<
726 or %l4, %l0, %l4 ! or them in.. <<
727 <<
728 wr %l4, 0x0, %psr ! set new %psr <<
729 WRITE_PAUSE ! TI scumbags. <<
730 <<
731 jmp %l2 ! advance over <<
732 rett %l2 + 0x4 ! like this... <<
733 <<
734 sun4m_nmi_error: <<
735 /* NMI async memory error handling. */ <<
736 sethi %hi(0x80000000), %l4 <<
737 sethi %hi(sun4m_irq_global), %o5 <<
738 ld [%o5 + %lo(sun4m_irq_global)], <<
739 st %l4, [%l5 + 0x0c] ! sun4 <<
740 WRITE_PAUSE <<
741 ld [%l5 + 0x00], %g0 ! sun4 <<
742 WRITE_PAUSE <<
743 or %l0, PSR_PIL, %l4 <<
744 wr %l4, 0x0, %psr <<
745 WRITE_PAUSE <<
746 wr %l4, PSR_ET, %psr <<
747 WRITE_PAUSE <<
748 call sun4m_nmi <<
749 nop <<
750 st %l4, [%l5 + 0x08] ! sun4 <<
751 WRITE_PAUSE <<
752 ld [%l5 + 0x00], %g0 ! sun4 <<
753 WRITE_PAUSE <<
754 RESTORE_ALL <<
755 <<
756 #ifndef CONFIG_SMP <<
757 .align 4 <<
758 .globl linux_trap_ipi15_sun4m <<
759 linux_trap_ipi15_sun4m: <<
760 SAVE_ALL <<
761 <<
762 ba sun4m_nmi_error <<
763 nop <<
764 #endif /* CONFIG_SMP */ <<
765 <<
766 .align 4 <<
767 .globl srmmu_fault <<
768 srmmu_fault: <<
769 mov 0x400, %l5 <<
770 mov 0x300, %l4 <<
771 <<
772 LEON_PI(lda [%l5] ASI_LEON_MMUREGS, %l6) <<
773 SUN_PI_(lda [%l5] ASI_M_MMUREGS, %l6) <<
774 <<
775 LEON_PI(lda [%l4] ASI_LEON_MMUREGS, %l5) <<
776 SUN_PI_(lda [%l4] ASI_M_MMUREGS, %l5) <<
777 <<
778 andn %l6, 0xfff, %l6 <<
779 srl %l5, 6, %l5 <<
780 <<
781 and %l5, 2, %l5 <<
782 or %l5, %l6, %l6 <<
783 <<
784 or %l6, %l7, %l7 <<
785 <<
786 SAVE_ALL <<
787 <<
788 mov %l7, %o1 <<
789 mov %l7, %o2 <<
790 and %o1, 1, %o1 ! arg2 <<
791 mov %l7, %o3 <<
792 and %o2, 2, %o2 ! arg3 <<
793 andn %o3, 0xfff, %o3 ! arg4 <<
794 <<
795 wr %l0, PSR_ET, %psr <<
796 WRITE_PAUSE <<
797 <<
798 call do_sparc_fault <<
799 add %sp, STACKFRAME_SZ, %o0 ! arg1 <<
800 <<
801 RESTORE_ALL <<
802 <<
803 .align 4 <<
804 sunos_execv: <<
805 .globl sunos_execv <<
806 b sys_execve <<
807 clr %i2 <<
808 <<
809 .align 4 <<
810 .globl sys_sigstack <<
811 sys_sigstack: <<
812 mov %o7, %l5 <<
813 mov %fp, %o2 <<
814 call do_sys_sigstack <<
815 mov %l5, %o7 <<
816 <<
817 .align 4 <<
818 .globl sys_sigreturn <<
819 sys_sigreturn: <<
820 call do_sigreturn <<
821 add %sp, STACKFRAME_SZ, %o0 <<
822 <<
823 ld [%curptr + TI_FLAGS], %l5 <<
824 andcc %l5, _TIF_SYSCALL_TRACE, %g0 <<
825 be 1f <<
826 nop <<
827 <<
828 call syscall_trace <<
829 mov 1, %o1 <<
830 <<
831 1: <<
832 /* We don't want to muck with user reg <<
833 * normal syscall, just return. <<
834 */ <<
835 RESTORE_ALL <<
836 <<
837 .align 4 <<
838 .globl sys_rt_sigreturn <<
839 sys_rt_sigreturn: <<
840 call do_rt_sigreturn <<
841 add %sp, STACKFRAME_SZ, %o0 <<
842 <<
843 ld [%curptr + TI_FLAGS], %l5 <<
844 andcc %l5, _TIF_SYSCALL_TRACE, %g0 <<
845 be 1f <<
846 nop <<
847 <<
848 add %sp, STACKFRAME_SZ, %o0 <<
849 call syscall_trace <<
850 mov 1, %o1 <<
851 <<
852 1: <<
853 /* We are returning to a signal handle <<
854 RESTORE_ALL <<
855 <<
856 /* Now that we have a real sys_clone, <<
857 * implemented in terms of it. Our _r <<
858 * of SunOS vfork() will use sys_vfork <<
859 * <<
860 * XXX These three should be consolida <<
861 * XXX code just like on sparc64... -D <<
862 */ <<
863 .align 4 <<
864 .globl sys_fork, flush_patch_two <<
865 sys_fork: <<
866 mov %o7, %l5 <<
867 flush_patch_two: <<
868 FLUSH_ALL_KERNEL_WINDOWS; <<
869 ld [%curptr + TI_TASK], %o4 <<
870 rd %psr, %g4 <<
871 WRITE_PAUSE <<
872 rd %wim, %g5 <<
873 WRITE_PAUSE <<
874 std %g4, [%o4 + AOFF_task_thread + <<
875 add %sp, STACKFRAME_SZ, %o0 <<
876 call sparc_fork <<
877 mov %l5, %o7 <<
878 <<
879 /* Whee, kernel threads! */ <<
880 .globl sys_clone, flush_patch_three <<
881 sys_clone: <<
882 mov %o7, %l5 <<
883 flush_patch_three: <<
884 FLUSH_ALL_KERNEL_WINDOWS; <<
885 ld [%curptr + TI_TASK], %o4 <<
886 rd %psr, %g4 <<
887 WRITE_PAUSE <<
888 rd %wim, %g5 <<
889 WRITE_PAUSE <<
890 std %g4, [%o4 + AOFF_task_thread + <<
891 add %sp, STACKFRAME_SZ, %o0 <<
892 call sparc_clone <<
893 mov %l5, %o7 <<
894 <<
895 /* Whee, real vfork! */ <<
896 .globl sys_vfork, flush_patch_four <<
897 sys_vfork: <<
898 flush_patch_four: <<
899 FLUSH_ALL_KERNEL_WINDOWS; <<
900 ld [%curptr + TI_TASK], %o4 <<
901 rd %psr, %g4 <<
902 WRITE_PAUSE <<
903 rd %wim, %g5 <<
904 WRITE_PAUSE <<
905 std %g4, [%o4 + AOFF_task_thread + <<
906 sethi %hi(sparc_vfork), %l1 <<
907 jmpl %l1 + %lo(sparc_vfork), %g0 <<
908 add %sp, STACKFRAME_SZ, %o0 <<
909 <<
910 .align 4 <<
911 linux_sparc_ni_syscall: <<
912 sethi %hi(sys_ni_syscall), %l7 <<
913 b do_syscall <<
914 or %l7, %lo(sys_ni_syscall), %l7 <<
915 <<
916 linux_syscall_trace: <<
917 add %sp, STACKFRAME_SZ, %o0 <<
918 call syscall_trace <<
919 mov 0, %o1 <<
920 cmp %o0, 0 <<
921 bne 3f <<
922 mov -ENOSYS, %o0 <<
923 <<
924 /* Syscall tracing can modify the regi <<
925 ld [%sp + STACKFRAME_SZ + PT_G1], <<
926 sethi %hi(sys_call_table), %l7 <<
927 ld [%sp + STACKFRAME_SZ + PT_I0], <<
928 or %l7, %lo(sys_call_table), %l7 <<
929 ld [%sp + STACKFRAME_SZ + PT_I1], <<
930 ld [%sp + STACKFRAME_SZ + PT_I2], <<
931 ld [%sp + STACKFRAME_SZ + PT_I3], <<
932 ld [%sp + STACKFRAME_SZ + PT_I4], <<
933 ld [%sp + STACKFRAME_SZ + PT_I5], <<
934 cmp %g1, NR_syscalls <<
935 bgeu 3f <<
936 mov -ENOSYS, %o0 <<
937 <<
938 sll %g1, 2, %l4 <<
939 mov %i0, %o0 <<
940 ld [%l7 + %l4], %l7 <<
941 mov %i1, %o1 <<
942 mov %i2, %o2 <<
943 mov %i3, %o3 <<
944 b 2f <<
945 mov %i4, %o4 <<
946 <<
947 .globl ret_from_fork <<
948 ret_from_fork: <<
949 call schedule_tail <<
950 ld [%g3 + TI_TASK], %o0 <<
951 b ret_sys_call <<
952 ld [%sp + STACKFRAME_SZ + PT_I0], <<
953 <<
954 .globl ret_from_kernel_thread <<
955 ret_from_kernel_thread: <<
956 call schedule_tail <<
957 ld [%g3 + TI_TASK], %o0 <<
958 ld [%sp + STACKFRAME_SZ + PT_G1], <<
959 call %l0 <<
960 ld [%sp + STACKFRAME_SZ + PT_G2], <<
961 rd %psr, %l1 <<
962 ld [%sp + STACKFRAME_SZ + PT_PSR] <<
963 andn %l0, PSR_CWP, %l0 <<
964 nop <<
965 and %l1, PSR_CWP, %l1 <<
966 or %l0, %l1, %l0 <<
967 st %l0, [%sp + STACKFRAME_SZ + PT <<
968 b ret_sys_call <<
969 mov 0, %o0 <<
970 <<
971 /* Linux native system calls enter her <<
972 .align 4 <<
973 .globl linux_sparc_syscall <<
974 linux_sparc_syscall: <<
975 sethi %hi(PSR_SYSCALL), %l4 <<
976 or %l0, %l4, %l0 <<
977 /* Direct access to user regs, must fa <<
978 cmp %g1, NR_syscalls <<
979 bgeu linux_sparc_ni_syscall <<
980 sll %g1, 2, %l4 <<
981 ld [%l7 + %l4], %l7 <<
982 <<
983 do_syscall: <<
984 SAVE_ALL_HEAD <<
985 rd %wim, %l3 <<
986 <<
987 wr %l0, PSR_ET, %psr <<
988 mov %i0, %o0 <<
989 mov %i1, %o1 <<
990 mov %i2, %o2 <<
991 <<
992 ld [%curptr + TI_FLAGS], %l5 <<
993 mov %i3, %o3 <<
994 andcc %l5, _TIF_SYSCALL_TRACE, %g0 <<
995 mov %i4, %o4 <<
996 bne linux_syscall_trace <<
997 mov %i0, %l6 <<
998 2: <<
999 call %l7 <<
1000 mov %i5, %o5 <<
1001 <<
1002 3: <<
1003 st %o0, [%sp + STACKFRAME_SZ + P <<
1004 <<
1005 ret_sys_call: <<
1006 ld [%curptr + TI_FLAGS], %l5 <<
1007 cmp %o0, -ERESTART_RESTARTBLOCK <<
1008 ld [%sp + STACKFRAME_SZ + PT_PSR <<
1009 set PSR_C, %g2 <<
1010 bgeu 1f <<
1011 andcc %l5, _TIF_SYSCALL_TRACE, %g0 <<
1012 <<
1013 /* System call success, clear Carry c <<
1014 andn %g3, %g2, %g3 <<
1015 st %g3, [%sp + STACKFRAME_SZ + P <<
1016 bne linux_syscall_trace2 <<
1017 ld [%sp + STACKFRAME_SZ + PT_NPC <<
1018 add %l1, 0x4, %l2 <<
1019 st %l1, [%sp + STACKFRAME_SZ + P <<
1020 b ret_trap_entry <<
1021 st %l2, [%sp + STACKFRAME_SZ + P <<
1022 1: <<
1023 /* System call failure, set Carry con <<
1024 * Also, get abs(errno) to return to <<
1025 */ <<
1026 sub %g0, %o0, %o0 <<
1027 or %g3, %g2, %g3 <<
1028 st %o0, [%sp + STACKFRAME_SZ + P <<
1029 st %g3, [%sp + STACKFRAME_SZ + P <<
1030 bne linux_syscall_trace2 <<
1031 ld [%sp + STACKFRAME_SZ + PT_NPC <<
1032 add %l1, 0x4, %l2 <<
1033 st %l1, [%sp + STACKFRAME_SZ + P <<
1034 b ret_trap_entry <<
1035 st %l2, [%sp + STACKFRAME_SZ + P <<
1036 <<
1037 linux_syscall_trace2: <<
1038 add %sp, STACKFRAME_SZ, %o0 <<
1039 mov 1, %o1 <<
1040 call syscall_trace <<
1041 add %l1, 0x4, %l2 <<
1042 st %l1, [%sp + STACKFRAME_SZ + P <<
1043 b ret_trap_entry <<
1044 st %l2, [%sp + STACKFRAME_SZ + P <<
1045 <<
1046 <<
1047 /* Saving and restoring the FPU state is best <<
1048 * 28 *
1049 * void fpsave(unsigned long *fpregs, unsigne !! 29 * 6/05/00 RZ: addedd writeback completion after return from sighandler
1050 * void *fpqueue, unsigned long * !! 30 * for 68040
1051 */ 31 */
1052 32
1053 .globl fpsave !! 33 #include <linux/linkage.h>
1054 fpsave: !! 34 #include <asm/errno.h>
1055 st %fsr, [%o1] ! this can tr !! 35 #include <asm/setup.h>
1056 ld [%o1], %g1 !! 36 #include <asm/traps.h>
1057 set 0x2000, %g4 !! 37 #include <asm/unistd.h>
1058 andcc %g1, %g4, %g0 !! 38 #include <asm/asm-offsets.h>
1059 be 2f !! 39 #include <asm/entry.h>
1060 mov 0, %g2 <<
1061 40
1062 /* We have an fpqueue to save. */ !! 41 .globl system_call, buserr, trap, resume
1063 1: !! 42 .globl sys_call_table
1064 std %fq, [%o2] !! 43 .globl __sys_fork, __sys_clone, __sys_vfork
1065 fpsave_magic: !! 44 .globl bad_interrupt
1066 st %fsr, [%o1] !! 45 .globl auto_irqhandler_fixup
1067 ld [%o1], %g3 !! 46 .globl user_irqvec_fixup
1068 andcc %g3, %g4, %g0 !! 47
1069 add %g2, 1, %g2 !! 48 .text
1070 bne 1b !! 49 ENTRY(__sys_fork)
1071 add %o2, 8, %o2 !! 50 SAVE_SWITCH_STACK
1072 !! 51 jbsr sys_fork
1073 2: !! 52 lea %sp@(24),%sp
1074 st %g2, [%o3] !! 53 rts
1075 !! 54
1076 std %f0, [%o0 + 0x00] !! 55 ENTRY(__sys_clone)
1077 std %f2, [%o0 + 0x08] !! 56 SAVE_SWITCH_STACK
1078 std %f4, [%o0 + 0x10] !! 57 pea %sp@(SWITCH_STACK_SIZE)
1079 std %f6, [%o0 + 0x18] !! 58 jbsr m68k_clone
1080 std %f8, [%o0 + 0x20] !! 59 lea %sp@(28),%sp
1081 std %f10, [%o0 + 0x28] !! 60 rts
1082 std %f12, [%o0 + 0x30] !! 61
1083 std %f14, [%o0 + 0x38] !! 62 ENTRY(__sys_vfork)
1084 std %f16, [%o0 + 0x40] !! 63 SAVE_SWITCH_STACK
1085 std %f18, [%o0 + 0x48] !! 64 jbsr sys_vfork
1086 std %f20, [%o0 + 0x50] !! 65 lea %sp@(24),%sp
1087 std %f22, [%o0 + 0x58] !! 66 rts
1088 std %f24, [%o0 + 0x60] !! 67
1089 std %f26, [%o0 + 0x68] !! 68 ENTRY(__sys_clone3)
1090 std %f28, [%o0 + 0x70] !! 69 SAVE_SWITCH_STACK
1091 retl !! 70 pea %sp@(SWITCH_STACK_SIZE)
1092 std %f30, [%o0 + 0x78] !! 71 jbsr m68k_clone3
1093 !! 72 lea %sp@(28),%sp
1094 /* Thanks for Theo Deraadt and the au !! 73 rts
1095 * code for pointing out this possibl !! 74
1096 * above we could trap on the fsr sto !! 75 ENTRY(sys_sigreturn)
1097 * code has to know how to deal with !! 76 SAVE_SWITCH_STACK
1098 */ !! 77 movel %sp,%a1 | switch_stack pointer
1099 fpsave_catch: !! 78 lea %sp@(SWITCH_STACK_SIZE),%a0 | pt_regs pointer
1100 b fpsave_magic + 4 !! 79 lea %sp@(-84),%sp | leave a gap
1101 st %fsr, [%o1] !! 80 movel %a1,%sp@-
1102 !! 81 movel %a0,%sp@-
1103 fpsave_catch2: !! 82 jbsr do_sigreturn
1104 b fpsave + 4 !! 83 jra 1f | shared with rt_sigreturn()
1105 st %fsr, [%o1] !! 84
1106 !! 85 ENTRY(sys_rt_sigreturn)
1107 /* void fpload(unsigned long *fpregs, !! 86 SAVE_SWITCH_STACK
1108 !! 87 movel %sp,%a1 | switch_stack pointer
1109 .globl fpload !! 88 lea %sp@(SWITCH_STACK_SIZE),%a0 | pt_regs pointer
1110 fpload: !! 89 lea %sp@(-84),%sp | leave a gap
1111 ldd [%o0 + 0x00], %f0 !! 90 movel %a1,%sp@-
1112 ldd [%o0 + 0x08], %f2 !! 91 movel %a0,%sp@-
1113 ldd [%o0 + 0x10], %f4 !! 92 | stack contents:
1114 ldd [%o0 + 0x18], %f6 !! 93 | [original pt_regs address] [original switch_stack address]
1115 ldd [%o0 + 0x20], %f8 !! 94 | [gap] [switch_stack] [pt_regs] [exception frame]
1116 ldd [%o0 + 0x28], %f10 !! 95 jbsr do_rt_sigreturn
1117 ldd [%o0 + 0x30], %f12 <<
1118 ldd [%o0 + 0x38], %f14 <<
1119 ldd [%o0 + 0x40], %f16 <<
1120 ldd [%o0 + 0x48], %f18 <<
1121 ldd [%o0 + 0x50], %f20 <<
1122 ldd [%o0 + 0x58], %f22 <<
1123 ldd [%o0 + 0x60], %f24 <<
1124 ldd [%o0 + 0x68], %f26 <<
1125 ldd [%o0 + 0x70], %f28 <<
1126 ldd [%o0 + 0x78], %f30 <<
1127 ld [%o1], %fsr <<
1128 retl <<
1129 nop <<
1130 <<
1131 /* __ndelay and __udelay take two arg <<
1132 * 0 - nsecs or usecs to delay <<
1133 * 1 - per_cpu udelay_val (loops per <<
1134 * <<
1135 * Note that ndelay gives HZ times hi <<
1136 * limit. udelay can handle up to 1s <<
1137 */ <<
1138 .globl __ndelay <<
1139 __ndelay: <<
1140 save %sp, -STACKFRAME_SZ, %sp <<
1141 mov %i0, %o0 ! rou <<
1142 mov 0x1ae, %o1 ! 2** <<
1143 umul %o0, %o1, %o0 <<
1144 rd %y, %o1 <<
1145 mov %i1, %o1 ! ude <<
1146 umul %o0, %o1, %o0 <<
1147 rd %y, %o1 <<
1148 ba delay_continue <<
1149 mov %o1, %o0 ! >>3 <<
1150 <<
1151 .globl __udelay <<
1152 __udelay: <<
1153 save %sp, -STACKFRAME_SZ, %sp <<
1154 mov %i0, %o0 <<
1155 sethi %hi(0x10c7), %o1 ! rou <<
1156 or %o1, %lo(0x10c7), %o1 ! 2** <<
1157 umul %o0, %o1, %o0 <<
1158 rd %y, %o1 <<
1159 mov %i1, %o1 ! ude <<
1160 umul %o0, %o1, %o0 <<
1161 rd %y, %o1 <<
1162 sethi %hi(0x028f4b62), %l0 ! Add <<
1163 or %g0, %lo(0x028f4b62), %l0 <<
1164 addcc %o0, %l0, %o0 ! 2** <<
1165 bcs,a 3f <<
1166 add %o1, 0x01, %o1 <<
1167 3: <<
1168 mov HZ, %o0 ! >>3 <<
1169 umul %o0, %o1, %o0 <<
1170 rd %y, %o1 <<
1171 96
1172 delay_continue: <<
1173 cmp %o0, 0x0 <<
1174 1: 97 1:
1175 bne 1b !! 98 | stack contents now:
1176 subcc %o0, 1, %o0 !! 99 | [original pt_regs address] [original switch_stack address]
1177 !! 100 | [unused part of the gap] [moved switch_stack] [moved pt_regs]
1178 ret !! 101 | [replacement exception frame]
1179 restore !! 102 | return value of do_{rt_,}sigreturn() points to moved switch_stack.
1180 EXPORT_SYMBOL(__udelay) !! 103
1181 EXPORT_SYMBOL(__ndelay) !! 104 movel %d0,%sp | discard the leftover junk
1182 !! 105 RESTORE_SWITCH_STACK
1183 /* Handle a software breakpoint */ !! 106 | stack contents now is just [syscall return address] [pt_regs] [frame]
1184 /* We have to inform parent that chil !! 107 | return pt_regs.d0
1185 .align 4 !! 108 movel %sp@(PT_OFF_D0+4),%d0
1186 .globl breakpoint_trap !! 109 rts
1187 breakpoint_trap: !! 110
1188 rd %wim,%l3 !! 111 ENTRY(buserr)
1189 SAVE_ALL !! 112 SAVE_ALL_INT
1190 wr %l0, PSR_ET, %psr !! 113 GET_CURRENT(%d0)
1191 WRITE_PAUSE !! 114 movel %sp,%sp@- | stack frame pointer argument
1192 !! 115 jbsr buserr_c
1193 st %i0, [%sp + STACKFRAME_SZ + P !! 116 addql #4,%sp
1194 call sparc_breakpoint !! 117 jra ret_from_exception
1195 add %sp, STACKFRAME_SZ, %o0 !! 118
1196 !! 119 ENTRY(trap)
1197 RESTORE_ALL !! 120 SAVE_ALL_INT
1198 !! 121 GET_CURRENT(%d0)
1199 #ifdef CONFIG_KGDB !! 122 movel %sp,%sp@- | stack frame pointer argument
1200 ENTRY(kgdb_trap_low) !! 123 jbsr trap_c
1201 rd %wim,%l3 !! 124 addql #4,%sp
1202 SAVE_ALL !! 125 jra ret_from_exception
1203 wr %l0, PSR_ET, %psr !! 126
1204 WRITE_PAUSE !! 127 | After a fork we jump here directly from resume,
1205 !! 128 | so that %d1 contains the previous task
1206 mov %l7, %o0 ! tra !! 129 | schedule_tail now used regardless of CONFIG_SMP
1207 call kgdb_trap !! 130 ENTRY(ret_from_fork)
1208 add %sp, STACKFRAME_SZ, %o1 ! str !! 131 movel %d1,%sp@-
>> 132 jsr schedule_tail
>> 133 addql #4,%sp
>> 134 jra ret_from_exception
>> 135
>> 136 ENTRY(ret_from_kernel_thread)
>> 137 | a3 contains the kernel thread payload, d7 - its argument
>> 138 movel %d1,%sp@-
>> 139 jsr schedule_tail
>> 140 movel %d7,(%sp)
>> 141 jsr %a3@
>> 142 addql #4,%sp
>> 143 jra ret_from_exception
>> 144
>> 145 #if defined(CONFIG_COLDFIRE) || !defined(CONFIG_MMU)
>> 146
>> 147 #ifdef TRAP_DBG_INTERRUPT
>> 148
>> 149 .globl dbginterrupt
>> 150 ENTRY(dbginterrupt)
>> 151 SAVE_ALL_INT
>> 152 GET_CURRENT(%d0)
>> 153 movel %sp,%sp@- /* stack frame pointer argument */
>> 154 jsr dbginterrupt_c
>> 155 addql #4,%sp
>> 156 jra ret_from_exception
>> 157 #endif
>> 158
>> 159 ENTRY(reschedule)
>> 160 /* save top of frame */
>> 161 pea %sp@
>> 162 jbsr set_esp0
>> 163 addql #4,%sp
>> 164 pea ret_from_exception
>> 165 jmp schedule
>> 166
>> 167 ENTRY(ret_from_user_signal)
>> 168 moveq #__NR_sigreturn,%d0
>> 169 trap #0
>> 170
>> 171 ENTRY(ret_from_user_rt_signal)
>> 172 movel #__NR_rt_sigreturn,%d0
>> 173 trap #0
>> 174
>> 175 #else
>> 176
>> 177 do_trace_entry:
>> 178 movel #-ENOSYS,%sp@(PT_OFF_D0)| needed for strace
>> 179 subql #4,%sp
>> 180 SAVE_SWITCH_STACK
>> 181 jbsr syscall_trace_enter
>> 182 RESTORE_SWITCH_STACK
>> 183 addql #4,%sp
>> 184 addql #1,%d0 | optimization for cmpil #-1,%d0
>> 185 jeq ret_from_syscall
>> 186 movel %sp@(PT_OFF_ORIG_D0),%d0
>> 187 cmpl #NR_syscalls,%d0
>> 188 jcs syscall
>> 189 jra ret_from_syscall
>> 190 badsys:
>> 191 movel #-ENOSYS,%sp@(PT_OFF_D0)
>> 192 jra ret_from_syscall
>> 193
>> 194 do_trace_exit:
>> 195 subql #4,%sp
>> 196 SAVE_SWITCH_STACK
>> 197 jbsr syscall_trace_leave
>> 198 RESTORE_SWITCH_STACK
>> 199 addql #4,%sp
>> 200 jra .Lret_from_exception
>> 201
>> 202 ENTRY(system_call)
>> 203 SAVE_ALL_SYS
>> 204
>> 205 GET_CURRENT(%d1)
>> 206 movel %d1,%a1
>> 207
>> 208 | save top of frame
>> 209 movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
>> 210
>> 211 | syscall trace?
>> 212 tstb %a1@(TINFO_FLAGS+2)
>> 213 jmi do_trace_entry
>> 214 | seccomp filter active?
>> 215 btst #5,%a1@(TINFO_FLAGS+2)
>> 216 bnes do_trace_entry
>> 217 cmpl #NR_syscalls,%d0
>> 218 jcc badsys
>> 219 syscall:
>> 220 jbsr @(sys_call_table,%d0:l:4)@(0)
>> 221 movel %d0,%sp@(PT_OFF_D0) | save the return value
>> 222 ret_from_syscall:
>> 223 |oriw #0x0700,%sr
>> 224 movel %curptr@(TASK_STACK),%a1
>> 225 movew %a1@(TINFO_FLAGS+2),%d0
>> 226 jne syscall_exit_work
>> 227 1: RESTORE_ALL
>> 228
>> 229 syscall_exit_work:
>> 230 btst #5,%sp@(PT_OFF_SR) | check if returning to kernel
>> 231 bnes 1b | if so, skip resched, signals
>> 232 lslw #1,%d0
>> 233 jcs do_trace_exit
>> 234 jmi do_delayed_trace
>> 235 lslw #8,%d0
>> 236 jne do_signal_return
>> 237 pea resume_userspace
>> 238 jra schedule
>> 239
>> 240
>> 241 ENTRY(ret_from_exception)
>> 242 .Lret_from_exception:
>> 243 btst #5,%sp@(PT_OFF_SR) | check if returning to kernel
>> 244 bnes 1f | if so, skip resched, signals
>> 245 | only allow interrupts when we are really the last one on the
>> 246 | kernel stack, otherwise stack overflow can occur during
>> 247 | heavy interrupt load
>> 248 andw #ALLOWINT,%sr
>> 249
>> 250 resume_userspace:
>> 251 movel %curptr@(TASK_STACK),%a1
>> 252 moveb %a1@(TINFO_FLAGS+3),%d0
>> 253 jne exit_work
>> 254 1: RESTORE_ALL
>> 255
>> 256 exit_work:
>> 257 | save top of frame
>> 258 movel %sp,%curptr@(TASK_THREAD+THREAD_ESP0)
>> 259 lslb #1,%d0
>> 260 jne do_signal_return
>> 261 pea resume_userspace
>> 262 jra schedule
>> 263
>> 264
>> 265 do_signal_return:
>> 266 |andw #ALLOWINT,%sr
>> 267 subql #4,%sp | dummy return address
>> 268 SAVE_SWITCH_STACK
>> 269 pea %sp@(SWITCH_STACK_SIZE)
>> 270 bsrl do_notify_resume
>> 271 addql #4,%sp
>> 272 RESTORE_SWITCH_STACK
>> 273 addql #4,%sp
>> 274 jbra resume_userspace
>> 275
>> 276 do_delayed_trace:
>> 277 bclr #7,%sp@(PT_OFF_SR) | clear trace bit in SR
>> 278 pea 1 | send SIGTRAP
>> 279 movel %curptr,%sp@-
>> 280 pea LSIGTRAP
>> 281 jbsr send_sig
>> 282 addql #8,%sp
>> 283 addql #4,%sp
>> 284 jbra resume_userspace
>> 285
>> 286
>> 287 /* This is the main interrupt handler for autovector interrupts */
>> 288
>> 289 ENTRY(auto_inthandler)
>> 290 SAVE_ALL_INT
>> 291 GET_CURRENT(%d0)
>> 292 | put exception # in d0
>> 293 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
>> 294 subw #VEC_SPUR,%d0
>> 295
>> 296 movel %sp,%sp@-
>> 297 movel %d0,%sp@- | put vector # on stack
>> 298 auto_irqhandler_fixup = . + 2
>> 299 jsr do_IRQ | process the IRQ
>> 300 addql #8,%sp | pop parameters off stack
>> 301 jra ret_from_exception
>> 302
>> 303 /* Handler for user defined interrupt vectors */
>> 304
>> 305 ENTRY(user_inthandler)
>> 306 SAVE_ALL_INT
>> 307 GET_CURRENT(%d0)
>> 308 | put exception # in d0
>> 309 bfextu %sp@(PT_OFF_FORMATVEC){#4,#10},%d0
>> 310 user_irqvec_fixup = . + 2
>> 311 subw #VEC_USER,%d0
>> 312
>> 313 movel %sp,%sp@-
>> 314 movel %d0,%sp@- | put vector # on stack
>> 315 jsr do_IRQ | process the IRQ
>> 316 addql #8,%sp | pop parameters off stack
>> 317 jra ret_from_exception
>> 318
>> 319 /* Handler for uninitialized and spurious interrupts */
>> 320
>> 321 ENTRY(bad_inthandler)
>> 322 SAVE_ALL_INT
>> 323 GET_CURRENT(%d0)
>> 324
>> 325 movel %sp,%sp@-
>> 326 jsr handle_badint
>> 327 addql #4,%sp
>> 328 jra ret_from_exception
1209 329
1210 RESTORE_ALL !! 330 resume:
1211 ENDPROC(kgdb_trap_low) !! 331 /*
>> 332 * Beware - when entering resume, prev (the current task) is
>> 333 * in a0, next (the new task) is in a1,so don't change these
>> 334 * registers until their contents are no longer needed.
>> 335 */
>> 336
>> 337 /* save sr */
>> 338 movew %sr,%a0@(TASK_THREAD+THREAD_SR)
>> 339
>> 340 /* save fs (sfc,%dfc) (may be pointing to kernel memory) */
>> 341 movec %sfc,%d0
>> 342 movew %d0,%a0@(TASK_THREAD+THREAD_FC)
>> 343
>> 344 /* save usp */
>> 345 /* it is better to use a movel here instead of a movew 8*) */
>> 346 movec %usp,%d0
>> 347 movel %d0,%a0@(TASK_THREAD+THREAD_USP)
>> 348
>> 349 /* save non-scratch registers on stack */
>> 350 SAVE_SWITCH_STACK
>> 351
>> 352 /* save current kernel stack pointer */
>> 353 movel %sp,%a0@(TASK_THREAD+THREAD_KSP)
>> 354
>> 355 /* save floating point context */
>> 356 #ifndef CONFIG_M68KFPU_EMU_ONLY
>> 357 #ifdef CONFIG_M68KFPU_EMU
>> 358 tstl m68k_fputype
>> 359 jeq 3f
1212 #endif 360 #endif
>> 361 fsave %a0@(TASK_THREAD+THREAD_FPSTATE)
1213 362
1214 .align 4 !! 363 #if defined(CONFIG_M68060)
1215 .globl flush_patch_exception !! 364 #if !defined(CPU_M68060_ONLY)
1216 flush_patch_exception: !! 365 btst #3,m68k_cputype+3
1217 FLUSH_ALL_KERNEL_WINDOWS; !! 366 beqs 1f
1218 ldd [%o0], %o6 !! 367 #endif
1219 jmpl %o7 + 0xc, %g0 !! 368 /* The 060 FPU keeps status in bits 15-8 of the first longword */
1220 mov 1, %g1 !! 369 tstb %a0@(TASK_THREAD+THREAD_FPSTATE+2)
1221 !! 370 jeq 3f
1222 .align 4 !! 371 #if !defined(CPU_M68060_ONLY)
1223 .globl kill_user_windows, kuw_patch1 !! 372 jra 2f
1224 .globl kuw_patch1 !! 373 #endif
1225 kuw_patch1_7win: sll %o3, 6, %o3 !! 374 #endif /* CONFIG_M68060 */
1226 !! 375 #if !defined(CPU_M68060_ONLY)
1227 /* No matter how much overhead this r !! 376 1: tstb %a0@(TASK_THREAD+THREAD_FPSTATE)
1228 * case scenario, it is several times !! 377 jeq 3f
1229 * traps with the old method of just !! 378 #endif
1230 */ !! 379 2: fmovemx %fp0-%fp7,%a0@(TASK_THREAD+THREAD_FPREG)
1231 kill_user_windows: !! 380 fmoveml %fpcr/%fpsr/%fpiar,%a0@(TASK_THREAD+THREAD_FPCNTL)
1232 ld [%g6 + TI_UWINMASK], %o0 <<
1233 orcc %g0, %o0, %g0 <<
1234 be 3f <<
1235 rd %psr, %o5 <<
1236 or %o5, PSR_PIL, %o4 <<
1237 wr %o4, 0x0, %psr <<
1238 WRITE_PAUSE <<
1239 1: <<
1240 ld [%g6 + TI_UWINMASK], %o0 <<
1241 orcc %g0, %o0, %g0 <<
1242 be 4f <<
1243 rd %wim, %o3 <<
1244 srl %o3, 1, %o4 <<
1245 kuw_patch1: <<
1246 sll %o3, 7, %o3 <<
1247 or %o4, %o3, %o3 <<
1248 andncc %o0, %o3, %o0 <<
1249 bne kuw_patch1 <<
1250 srl %o3, 1, %o4 <<
1251 wr %o3, 0x0, %wim <<
1252 st %g0, [%g6 + TI_UWINMASK] <<
1253 4: <<
1254 wr %o5, 0x0, %psr <<
1255 WRITE_PAUSE <<
1256 3: 381 3:
1257 retl !! 382 #endif /* CONFIG_M68KFPU_EMU_ONLY */
1258 st %g0, [%g6 + TI_W_SAVED] !! 383 /* Return previous task in %d1 */
>> 384 movel %curptr,%d1
>> 385
>> 386 /* switch to new task (a1 contains new task) */
>> 387 movel %a1,%curptr
>> 388
>> 389 /* restore floating point context */
>> 390 #ifndef CONFIG_M68KFPU_EMU_ONLY
>> 391 #ifdef CONFIG_M68KFPU_EMU
>> 392 tstl m68k_fputype
>> 393 jeq 4f
>> 394 #endif
>> 395 #if defined(CONFIG_M68060)
>> 396 #if !defined(CPU_M68060_ONLY)
>> 397 btst #3,m68k_cputype+3
>> 398 beqs 1f
>> 399 #endif
>> 400 /* The 060 FPU keeps status in bits 15-8 of the first longword */
>> 401 tstb %a1@(TASK_THREAD+THREAD_FPSTATE+2)
>> 402 jeq 3f
>> 403 #if !defined(CPU_M68060_ONLY)
>> 404 jra 2f
>> 405 #endif
>> 406 #endif /* CONFIG_M68060 */
>> 407 #if !defined(CPU_M68060_ONLY)
>> 408 1: tstb %a1@(TASK_THREAD+THREAD_FPSTATE)
>> 409 jeq 3f
>> 410 #endif
>> 411 2: fmovemx %a1@(TASK_THREAD+THREAD_FPREG),%fp0-%fp7
>> 412 fmoveml %a1@(TASK_THREAD+THREAD_FPCNTL),%fpcr/%fpsr/%fpiar
>> 413 3: frestore %a1@(TASK_THREAD+THREAD_FPSTATE)
>> 414 4:
>> 415 #endif /* CONFIG_M68KFPU_EMU_ONLY */
1259 416
1260 .align 4 !! 417 /* restore the kernel stack pointer */
1261 .globl restore_current !! 418 movel %a1@(TASK_THREAD+THREAD_KSP),%sp
1262 restore_current: <<
1263 LOAD_CURRENT(g6, o0) <<
1264 retl <<
1265 nop <<
1266 <<
1267 #ifdef CONFIG_PCIC_PCI <<
1268 #include <asm/pcic.h> <<
1269 <<
1270 .align 4 <<
1271 .globl linux_trap_ipi15_pcic <<
1272 linux_trap_ipi15_pcic: <<
1273 rd %wim, %l3 <<
1274 SAVE_ALL <<
1275 419
1276 /* !! 420 /* restore non-scratch registers */
1277 * First deactivate NMI !! 421 RESTORE_SWITCH_STACK
1278 * or we cannot drop ET, cannot get w <<
1279 * The busy loop is necessary because <<
1280 * sometimes does not go away quickly <<
1281 */ <<
1282 sethi %hi(pcic_regs), %o1 <<
1283 ld [%o1 + %lo(pcic_regs)], %o2 <<
1284 422
1285 ! Get pending status for printouts la !! 423 /* restore user stack pointer */
1286 ld [%o2 + PCI_SYS_INT_PENDING], !! 424 movel %a1@(TASK_THREAD+THREAD_USP),%a0
>> 425 movel %a0,%usp
1287 426
1288 mov PCI_SYS_INT_PENDING_CLEAR_ALL !! 427 /* restore fs (sfc,%dfc) */
1289 stb %o1, [%o2 + PCI_SYS_INT_PENDI !! 428 movew %a1@(TASK_THREAD+THREAD_FC),%a0
1290 1: !! 429 movec %a0,%sfc
1291 ld [%o2 + PCI_SYS_INT_PENDING], !! 430 movec %a0,%dfc
1292 andcc %o1, ((PCI_SYS_INT_PENDING_PI !! 431
1293 bne 1b !! 432 /* restore status register */
1294 nop !! 433 movew %a1@(TASK_THREAD+THREAD_SR),%d0
1295 !! 434 oriw #0x0700,%d0
1296 or %l0, PSR_PIL, %l4 !! 435 movew %d0,%sr
1297 wr %l4, 0x0, %psr !! 436
1298 WRITE_PAUSE !! 437 rts
1299 wr %l4, PSR_ET, %psr <<
1300 WRITE_PAUSE <<
1301 <<
1302 call pcic_nmi <<
1303 add %sp, STACKFRAME_SZ, %o1 ! str <<
1304 RESTORE_ALL <<
1305 <<
1306 .globl pcic_nmi_trap_patch <<
1307 pcic_nmi_trap_patch: <<
1308 sethi %hi(linux_trap_ipi15_pcic), % <<
1309 jmpl %l3 + %lo(linux_trap_ipi15_pc <<
1310 rd %psr, %l0 <<
1311 .word 0 <<
1312 <<
1313 #endif /* CONFIG_PCIC_PCI */ <<
1314 <<
1315 .globl flushw_all <<
1316 flushw_all: <<
1317 save %sp, -0x40, %sp <<
1318 save %sp, -0x40, %sp <<
1319 save %sp, -0x40, %sp <<
1320 save %sp, -0x40, %sp <<
1321 save %sp, -0x40, %sp <<
1322 save %sp, -0x40, %sp <<
1323 save %sp, -0x40, %sp <<
1324 restore <<
1325 restore <<
1326 restore <<
1327 restore <<
1328 restore <<
1329 restore <<
1330 ret <<
1331 restore <<
1332 <<
1333 #ifdef CONFIG_SMP <<
1334 ENTRY(hard_smp_processor_id) <<
1335 661: rd %tbr, %g1 <<
1336 srl %g1, 12, %o0 <<
1337 and %o0, 3, %o0 <<
1338 .section .cpuid_patch, "ax" <<
1339 /* Instruction location. */ <<
1340 .word 661b <<
1341 /* SUN4D implementation. */ <<
1342 lda [%g0] ASI_M_VIKING_TM <<
1343 nop <<
1344 nop <<
1345 /* LEON implementation. */ <<
1346 rd %asr17, %o0 <<
1347 srl %o0, 0x1c, %o0 <<
1348 nop <<
1349 .previous <<
1350 retl <<
1351 nop <<
1352 ENDPROC(hard_smp_processor_id) <<
1353 #endif <<
1354 438
1355 /* End of entry.S */ !! 439 #endif /* CONFIG_MMU && !CONFIG_COLDFIRE */
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.