1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * head.S: The initial boot code for the Sparc
4 *
5 * Copyright (C) 1995 David S. Miller (davem@c
6 * Copyright (C) 1995,1999 Pete Zaitcev (zai
7 * Copyright (C) 1996 Miguel de Icaza (miguel@
8 * Copyright (C) 1997 Jakub Jelinek (jj@suns
9 * Copyright (C) 1997 Michael A. Griffith (gri
10 *
11 * CompactPCI platform by Eric Brower, 1999.
12 */
13
14 #include <linux/export.h>
15 #include <linux/version.h>
16 #include <linux/init.h>
17
18 #include <asm/head.h>
19 #include <asm/asi.h>
20 #include <asm/contregs.h>
21 #include <asm/ptrace.h>
22 #include <asm/psr.h>
23 #include <asm/page.h>
24 #include <asm/kdebug.h>
25 #include <asm/winmacro.h>
26 #include <asm/thread_info.h> /* TI_UWINMASK
27 #include <asm/errno.h>
28 #include <asm/pgtable.h> /* PGDIR_SHIFT
29
30 .data
31 /* The following are used with the prom_vector
32 * the cpu-type
33 */
34 .align 4
35 .globl cputypval
36 cputypval:
37 .asciz "sun4m"
38 .ascii " "
39
40 /* Tested on SS-5, SS-10 */
41 .align 4
42 cputypvar:
43 .asciz "compatible"
44
45 .align 4
46
47 notsup:
48 .asciz "Sparc-Linux sun4/sun4c or MMU
49 .align 4
50
51 sun4e_notsup:
52 .asciz "Sparc-Linux sun4e support doe
53 .align 4
54
55 /* The trap-table - located in the __HEAD sect
56 #include "ttable_32.S"
57
58 .align PAGE_SIZE
59
60 /* This was the only reasonable way I could th
61 * these page-table data structures.
62 */
63 .globl empty_zero_page
64 empty_zero_page: .skip PAGE_SIZE
65 EXPORT_SYMBOL(empty_zero_page)
66
67 .global root_flags
68 .global ram_flags
69 .global root_dev
70 .global sparc_ramdisk_image
71 .global sparc_ramdisk_size
72
73 /* This stuff has to be in sync with SILO and
74 * Fields should be kept upward compatible and
75 * HdrS version should be incremented.
76 */
77 .ascii "HdrS"
78 .word LINUX_VERSION_CODE
79 .half 0x0203 /* HdrS versio
80 root_flags:
81 .half 1
82 root_dev:
83 .half 0
84 ram_flags:
85 .half 0
86 sparc_ramdisk_image:
87 .word 0
88 sparc_ramdisk_size:
89 .word 0
90 .word reboot_command
91 .word 0, 0, 0
92 .word _end
93
94 /* Cool, here we go. Pick up the romvec pointe
95 * %g7 and at prom_vector_p. And also quickly
96 * a v0, v2, or v3 prom.
97 */
98 gokernel:
99 /* Ok, it's nice to know, as e
100 * are already mapped where we
101 * memory. The Solaris /boot
102 * will peek into our elf head
103 * we want to be, otherwise we
104 *
105 * Some boot loaders don't pla
106 * in %o7, so we do a pc-relat
107 * label, then see what %o7 ha
108 */
109
110 mov %o7, %g4
111
112 /* Jump to it, and pray... */
113 current_pc:
114 call 1f
115 nop
116
117 1:
118 mov %o7, %g3
119
120 tst %o0
121 bne 2f
122 mov %g4, %o7
123 sethi %hi(no_sun4u_here), %l
124 jmpl %l1 + %lo(no_sun4u_her
125 nop
126 2:
127 mov %o0, %l0
128 mov %o0, %g7
129 mov %o1, %l1
130
131 /* Ok, let's check out our run
132 set current_pc, %g5
133 cmp %g3, %g5
134 be already_mapped
135 nop
136
137 /* %l6 will hold the offset we
138 * from absolute symbols in or
139 * in our own image. If alrea
140 * just plain zero, else it is
141 */
142 set KERNBASE, %l6
143 b copy_prom_lvl14
144 nop
145
146 already_mapped:
147 mov 0, %l6
148
149 /* Copy over the Prom's level
150 copy_prom_lvl14:
151 #if 1
152 /* DJHR
153 * preserve our linked/calcula
154 */
155 set lvl14_save, %g1
156 set t_irq14, %g3
157 sub %g1, %l6, %g1
158 sub %g3, %l6, %g3
159 ldd [%g3], %g4
160 std %g4, [%g1]
161 ldd [%g3+8], %g4
162 std %g4, [%g1+8]
163 #endif
164 rd %tbr, %g1
165 andn %g1, 0xfff, %g1
166 or %g0, (0x1e<<4), %g2
167 or %g1, %g2, %g2
168 set t_irq14, %g3
169 sub %g3, %l6, %g3
170 ldd [%g2], %g4
171 std %g4, [%g3]
172 ldd [%g2 + 0x8], %g4
173 std %g4, [%g3 + 0x8]
174
175 /* DON'T TOUCH %l0 thru %l5 in these remapping
176 * we need their values afterwards!
177 */
178
179 /* Now check whether we are al
180 * are we can skip all this ga
181 */
182 copy_prom_done:
183 cmp %l6, 0
184 be go_to_highmem
185 nop
186
187 /* Validate that we are in fac
188 * SRMMU based cpu.
189 */
190 set 0x4000, %g6
191 cmp %g7, %g6
192 bne not_a_sun4
193 nop
194
195 halt_notsup:
196 ld [%g7 + 0x68], %o1
197 set notsup, %o0
198 sub %o0, %l6, %o0
199 call %o1
200 nop
201 sethi %hi(halt_me), %o0
202 jmpl %o0 + %lo(halt_me), %g
203 nop
204
205 not_a_sun4:
206 /* It looks like this is a mac
207 * Now find out what MMU we ar
208 * LEON - identified by the ps
209 * Viking - identified by the
210 * In all other cases a sun4m
211 * We check that the MMU is en
212 */
213
214 /* Check if this is a LEON CPU
215 rd %psr, %g3
216 srl %g3, PSR_IMPL_SHIFT, %
217 and %g3, PSR_IMPL_SHIFTED_
218 cmp %g3, PSR_IMPL_LEON
219 be leon_remap
220 nop
221
222 /* Sanity-check, is MMU enable
223 lda [%g0] ASI_M_MMUREGS, %
224 andcc %g1, 1, %g0
225 be halt_notsup
226 nop
227
228 /* Check for a viking (TI) mod
229 cmp %g3, PSR_IMPL_TI
230 bne srmmu_not_viking
231 nop
232
233 /* Figure out what kind of vik
234 * We need to know if we have
235 * AC bit and disable traps or
236 */
237
238 /* I've only seen MicroSparc's
239 * bit set.
240 */
241 set 0x800, %g2
242 lda [%g0] ASI_M_MMUREGS, %
243 and %g2, %g3, %g3
244 subcc %g3, 0x0, %g0
245 bnz srmmu_not_viking
246 nop
247
248 rd %psr, %g3
249 andn %g3, PSR_ET, %g2
250 wr %g2, 0x0, %psr
251 WRITE_PAUSE
252
253 /* Get context table pointer,
254 * a physical address, which i
255 */
256 set AC_M_CTPR, %g4
257 lda [%g4] ASI_M_MMUREGS, %
258 sll %g4, 0x4, %g4
259
260
261 /* Set the AC bit in the Vikin
262 lda [%g0] ASI_M_MMUREGS, %
263 set 0x8000, %g6
264 or %g5, %g6, %g6
265 sta %g6, [%g0] ASI_M_MMURE
266
267 /* Grrr, why does it seem like
268 * on the sun4m is in some ASI
269 * Fine with me, let's get the
270 * page table directory and fe
271 */
272 lda [%g4] ASI_M_BYPASS, %o
273 srl %o1, 0x4, %o1
274 sll %o1, 0x8, %o1
275
276 /* Ok, pull in the PTD. */
277 lda [%o1] ASI_M_BYPASS, %o
278
279 /* Calculate to KERNBASE entry
280 add %o1, KERNBASE >> (PGDI
281
282 /* Poke the entry into the cal
283 sta %o2, [%o3] ASI_M_BYPAS
284
285 /* I don't get it Sun, if you
286 * boot loaders and the PROM (
287 * features btw) why did you n
288 * images up in high address s
289 * for ABI compliance anyways?
290 * enhanced interoperability?
291 *
292 * "The PROM is the computer."
293 */
294
295 /* Ok, restore the MMU control
296 sta %g5, [%g0] ASI_M_MMURE
297
298 /* Turn traps back on. We sav
299 wr %g3, 0x0, %psr
300
301 /* Now we burn precious CPU cy
302 WRITE_PAUSE
303
304 /* Wow, all that just to move
305 * place to another... Jump t
306 */
307 b go_to_highmem
308 nop
309
310 srmmu_not_viking:
311 /* This works on viking's in M
312 * other MBUS modules. It is
313 * the above madness sans turn
314 * the AC bit.
315 */
316 set AC_M_CTPR, %g1
317 lda [%g1] ASI_M_MMUREGS, %
318 sll %g1, 0x4, %g1
319 lda [%g1] ASI_M_BYPASS, %g
320 srl %g1, 0x4, %g1
321 sll %g1, 0x8, %g1
322
323 lda [%g1] ASI_M_BYPASS, %g
324 add %g1, KERNBASE >> (PGDI
325 sta %g2, [%g3] ASI_M_BYPAS
326 b go_to_highmem
327 nop
328
329
330 leon_remap:
331 /* Sanity-check, is MMU enable
332 lda [%g0] ASI_LEON_MMUREGS
333 andcc %g1, 1, %g0
334 be halt_notsup
335 nop
336
337 /* Same code as in the srmmu_n
338 * with the LEON ASI for mmure
339 */
340 set AC_M_CTPR, %g1
341 lda [%g1] ASI_LEON_MMUREGS
342 sll %g1, 0x4, %g1
343 lda [%g1] ASI_M_BYPASS, %g
344 srl %g1, 0x4, %g1
345 sll %g1, 0x8, %g1
346
347 lda [%g1] ASI_M_BYPASS, %g
348 add %g1, KERNBASE >> (PGDI
349 sta %g2, [%g3] ASI_M_BYPAS
350 b go_to_highmem
351 nop
352
353 /* Now do a non-relative jump so that PC is in
354 go_to_highmem:
355 set execute_in_high_mem, %
356 jmpl %g1, %g0
357 nop
358
359 /* The code above should be at beginning and w
360 * short jumps, as branching to .init.text sec
361 * impossible */
362 __INIT
363 /* Acquire boot time privileged register value
364 * I figure out and store nwindows and nwindow
365 */
366 execute_in_high_mem:
367 mov %l0, %o0
368 mov %l1, %o1
369
370 sethi %hi(prom_vector_p), %g
371 st %o0, [%g1 + %lo(prom_v
372
373 sethi %hi(linux_dbvec), %g1
374 st %o1, [%g1 + %lo(linux_
375
376 /* Get the machine type via th
377 * getprops node operation
378 */
379 add %g7, 0x1c, %l1
380 ld [%l1], %l0
381 ld [%l0], %l0
382 call %l0
383 or %g0, %g0, %o0
384 or %o0, %g0, %g6
385
386 sethi %hi(cputypvar), %o1
387 or %o1, %lo(cputypvar), %
388 sethi %hi(cputypval), %o2
389 or %o2, %lo(cputypval), %
390 ld [%l1], %l0
391 ld [%l0 + 0xc], %l0
392 call %l0
393 nop
394
395
396
397
398 /* Check value of "compatible"
399 * "value" => "model"
400 * leon => sparc_leon
401 * sun4m => sun4m
402 * sun4s => sun4m
403 * sun4d => sun4d
404 * sun4e => "no_sun4e_here"
405 * '*' => "no_sun4u_here"
406 * Check single letters only
407 */
408
409 set cputypval, %o2
410 /* If cputypval[0] == 'l' (low
411 ldub [%o2], %l1
412 cmp %l1, 'l'
413 be leon_init
414 nop
415
416 /* Check cputypval[4] to find
417 ldub [%o2 + 0x4], %l1
418
419 cmp %l1, 'm'
420 be sun4m_init
421 cmp %l1, 's'
422 be sun4m_init
423 cmp %l1, 'd'
424 be sun4d_init
425 cmp %l1, 'e'
426 be no_sun4e_here
427 nop
428 b no_sun4u_here
429 nop
430
431 leon_init:
432 /* LEON CPU - set boot_cpu_id
433 sethi %hi(boot_cpu_id), %g2
434
435 #ifdef CONFIG_SMP
436 ldub [%g2 + %lo(boot_cpu_id
437 cmp %g1, 0xff
438 be 1f
439 sethi %hi(leon_smp_cpu_start
440 jmpl %g1 + %lo(leon_smp_cpu
441 nop
442 1:
443 #endif
444 /* Get CPU-ID from most signif
445 rd %asr17, %g1
446 srl %g1, 28, %g1
447
448 /* Update boot_cpu_id only on
449 stub %g1, [%g2 + %lo(boot_c
450
451 ba continue_boot
452 nop
453
454 /* CPUID in bootbus can be found at PA 0xff014
455 #define SUN4D_BOOTBUS_CPUID 0xf0140000
456
457 sun4d_init:
458 /* Need to patch call to handler_irq *
459 set patch_handler_irq, %g4
460 set sun4d_handler_irq, %g5
461 sethi %hi(0x40000000), %g3
462 sub %g5, %g4, %g5
463 srl %g5, 2, %g5
464 or %g5, %g3, %g5
465 st %g5, [%g4]
466
467 #ifdef CONFIG_SMP
468 /* Get our CPU id out of bootbus */
469 set SUN4D_BOOTBUS_CPUID, %g3
470 lduba [%g3] ASI_M_CTL, %g3
471 and %g3, 0xf8, %g3
472 srl %g3, 3, %g4
473 sta %g4, [%g0] ASI_M_VIKING_TMP1
474 sethi %hi(boot_cpu_id), %g5
475 stb %g4, [%g5 + %lo(boot_cpu_id)]
476 #endif
477
478 /* Fall through to sun4m_init */
479
480 sun4m_init:
481 /* Ok, the PROM could have done funny things a
482 * be sitting in the fault status/address regi
483 * clear them so we don't get magic faults lat
484 */
485 /* This sucks, apparently this makes Vikings c
486 2:
487 rd %psr, %o1
488 srl %o1, PSR_IMPL_SHIFT, %
489
490 subcc %o1, PSR_IMPL_TI, %g0
491 be continue_boot
492 nop
493
494 set AC_M_SFSR, %o0
495 lda [%o0] ASI_M_MMUREGS, %
496 set AC_M_SFAR, %o0
497 lda [%o0] ASI_M_MMUREGS, %
498
499 /* Fujitsu MicroSPARC-II has n
500 subcc %o1, 0, %g0
501 be continue_boot
502 nop
503
504 set AC_M_AFSR, %o0
505 lda [%o0] ASI_M_MMUREGS, %
506 set AC_M_AFAR, %o0
507 lda [%o0] ASI_M_MMUREGS, %
508 nop
509
510
511 continue_boot:
512
513 /* Aieee, now set PC and nPC, enable traps, gi
514 * show-time!
515 */
516 /* Turn on Supervisor, EnableF
517 * Also puts us in register wi
518 */
519 set (PSR_PS | PSR_S | PSR_
520 wr %g2, 0x0, %psr
521 WRITE_PAUSE
522
523 /* I want a kernel stack NOW!
524 set init_thread_union, %g1
525 set (THREAD_SIZE - STACKFR
526 add %g1, %g2, %sp
527 mov 0, %fp
528
529 /* Zero out our BSS section. *
530 set __bss_start , %o0
531 set _end , %o1
532 add %o0, 0x1, %o0
533 1:
534 stb %g0, [%o0]
535 subcc %o0, %o1, %g0
536 bl 1b
537 add %o0, 0x1, %o0
538
539 /* If boot_cpu_id has not been
540 * init-code above we default
541 */
542 sethi %hi(boot_cpu_id), %g2
543 ldub [%g2 + %lo(boot_cpu_id
544 cmp %g3, 0xff
545 bne 1f
546 nop
547 mov %g0, %g3
548 stub %g3, [%g2 + %lo(boot_c
549
550 1: sll %g3, 2, %g3
551
552 /* Initialize the uwinmask val
553 * But first make current_set[
554 */
555 set init_thread_union, %g6
556 set current_set, %g2
557 #ifdef CONFIG_SMP
558 st %g6, [%g2]
559 add %g2, %g3, %g2
560 #endif
561 st %g6, [%g2]
562
563 st %g0, [%g6 + TI_UWINMAS
564
565 /* Compute NWINDOWS and stash it away. Now use
566 * in the V8 manual. Ok, this method seems to
567 * No, it doesn't work, have to play the save/
568 */
569
570 wr %g0, 0x0, %wim
571 WRITE_PAUSE
572
573 save
574
575 rd %psr, %g3
576
577 restore
578
579 and %g3, 0x1f, %g3
580 add %g3, 0x1, %g3
581
582 mov 2, %g1
583 wr %g1, 0x0, %wim
584 WRITE_PAUSE
585
586 cmp %g3, 0x7
587 bne 2f
588 nop
589
590 /* Adjust our window handling
591 * do things correctly on 7 wi
592 */
593
594 #define PATCH_INSN(src, dest) \
595 set src, %g5; \
596 set dest, %g2; \
597 ld [%g5], %g4; \
598 st %g4, [%g2];
599
600 /* Patch for window spills...
601 PATCH_INSN(spnwin_patch1_7win,
602 PATCH_INSN(spnwin_patch2_7win,
603 PATCH_INSN(spnwin_patch3_7win,
604
605 /* Patch for window fills... *
606 PATCH_INSN(fnwin_patch1_7win,
607 PATCH_INSN(fnwin_patch2_7win,
608
609 /* Patch for trap entry setup.
610 PATCH_INSN(tsetup_7win_patch1,
611 PATCH_INSN(tsetup_7win_patch2,
612 PATCH_INSN(tsetup_7win_patch3,
613 PATCH_INSN(tsetup_7win_patch4,
614 PATCH_INSN(tsetup_7win_patch5,
615 PATCH_INSN(tsetup_7win_patch6,
616
617 /* Patch for returning from tr
618 PATCH_INSN(rtrap_7win_patch1,
619 PATCH_INSN(rtrap_7win_patch2,
620 PATCH_INSN(rtrap_7win_patch3,
621 PATCH_INSN(rtrap_7win_patch4,
622 PATCH_INSN(rtrap_7win_patch5,
623
624 /* Patch for killing user wind
625 PATCH_INSN(kuw_patch1_7win, ku
626
627 /* Now patch the kernel window
628 * This saves 2 traps on every
629 */
630 set 0x01000000, %g4
631 set flush_patch_one, %g5
632 st %g4, [%g5 + 0x18]
633 st %g4, [%g5 + 0x1c]
634 set flush_patch_two, %g5
635 st %g4, [%g5 + 0x18]
636 st %g4, [%g5 + 0x1c]
637 set flush_patch_three, %g5
638 st %g4, [%g5 + 0x18]
639 st %g4, [%g5 + 0x1c]
640 set flush_patch_four, %g5
641 st %g4, [%g5 + 0x18]
642 st %g4, [%g5 + 0x1c]
643 set flush_patch_exception,
644 st %g4, [%g5 + 0x18]
645 st %g4, [%g5 + 0x1c]
646 set flush_patch_switch, %g
647 st %g4, [%g5 + 0x18]
648 st %g4, [%g5 + 0x1c]
649
650 2:
651 sethi %hi(nwindows), %g4
652 st %g3, [%g4 + %lo(nwindo
653 sub %g3, 0x1, %g3
654 sethi %hi(nwindowsm1), %g4
655 st %g3, [%g4 + %lo(nwindo
656
657 /* Here we go, start using Lin
658 set trapbase, %g3
659 wr %g3, 0x0, %tbr
660 WRITE_PAUSE
661
662 /* Finally, turn on traps so t
663 rd %psr, %g3
664 wr %g3, 0x0, %psr
665 WRITE_PAUSE
666
667 wr %g3, PSR_ET, %psr
668 WRITE_PAUSE
669
670 /* Call sparc32_start_kernel(s
671 sethi %hi(prom_vector_p), %g
672 ld [%g5 + %lo(prom_vector
673 call sparc32_start_kernel
674 nop
675
676 /* We should not get here. */
677 call halt_me
678 nop
679
680 no_sun4e_here:
681 ld [%g7 + 0x68], %o1
682 set sun4e_notsup, %o0
683 call %o1
684 nop
685 b halt_me
686 nop
687
688 __INITDATA
689
690 sun4u_1:
691 .asciz "finddevice"
692 .align 4
693 sun4u_2:
694 .asciz "/chosen"
695 .align 4
696 sun4u_3:
697 .asciz "getprop"
698 .align 4
699 sun4u_4:
700 .asciz "stdout"
701 .align 4
702 sun4u_5:
703 .asciz "write"
704 .align 4
705 sun4u_6:
706 .asciz "\n\rOn sun4u you have
707 sun4u_6e:
708 .align 4
709 sun4u_7:
710 .asciz "exit"
711 .align 8
712 sun4u_a1:
713 .word 0, sun4u_1, 0, 1, 0, 1
714 sun4u_r1:
715 .word 0
716 sun4u_a2:
717 .word 0, sun4u_3, 0, 4, 0, 1
718 sun4u_i2:
719 .word 0, 0, sun4u_4, 0, sun4
720 sun4u_r2:
721 .word 0
722 sun4u_a3:
723 .word 0, sun4u_5, 0, 3, 0, 1
724 sun4u_i3:
725 .word 0, 0, sun4u_6, 0, sun4
726 sun4u_r3:
727 .word 0
728 sun4u_a4:
729 .word 0, sun4u_7, 0, 0, 0, 0
730 sun4u_r4:
731
732 __INIT
733 no_sun4u_here:
734 set sun4u_a1, %o0
735 set current_pc, %l2
736 cmp %l2, %g3
737 be 1f
738 mov %o4, %l0
739 sub %g3, %l2, %l6
740 add %o0, %l6, %o0
741 mov %o0, %l4
742 mov sun4u_r4 - sun4u_a1, %
743 ld [%l4], %l5
744 2:
745 add %l4, 4, %l4
746 cmp %l5, %l2
747 add %l5, %l6, %l5
748 bgeu,a 3f
749 st %l5, [%l4 - 4]
750 3:
751 subcc %l3, 4, %l3
752 bne 2b
753 ld [%l4], %l5
754 1:
755 call %l0
756 mov %o0, %l1
757
758 ld [%l1 + (sun4u_r1 - sun
759 add %l1, (sun4u_a2 - sun4u
760 call %l0
761 st %o1, [%o0 + (sun4u_i2
762
763 ld [%l1 + (sun4u_1 - sun4
764 add %l1, (sun4u_a3 - sun4u
765 call %l0
766 st %o1, [%o0 + (sun4u_i3
767
768 call %l0
769 add %l1, (sun4u_a4 - sun4u
770
771 /* Not reached */
772 halt_me:
773 ld [%g7 + 0x74], %o0
774 call %o0
775 nop
776
777 /* Ok, now we continue in the .data/.text sect
778
779 .data
780 .align 4
781
782 /*
783 * Fill up the prom vector, note in particular
784 * no joke. I don't need all of them in here a
785 * gets initialized in c-code so all routines
786 */
787
788 prom_vector_p:
789 .word 0
790
791 /* We calculate the following at boot time, wi
792 * code uses these to keep track of the regist
793 */
794
795 .align 4
796 .globl nwindows
797 .globl nwindowsm1
798 nwindows:
799 .word 8
800 nwindowsm1:
801 .word 7
802
803 /* Boot time debugger vector value. We need t
804
805 .align 4
806 .globl linux_dbvec
807 linux_dbvec:
808 .word 0
809 .word 0
810
811 .align 8
812
813 .globl lvl14_save
814 lvl14_save:
815 .word 0
816 .word 0
817 .word 0
818 .word 0
819 .word t_irq14
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.