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Linux/arch/sparc/kernel/itlb_miss.S

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Diff markup

Differences between /arch/sparc/kernel/itlb_miss.S (Architecture mips) and /arch/sparc/kernel/itlb_miss.S (Architecture sparc)


  1 /* SPDX-License-Identifier: GPL-2.0 */              1 /* SPDX-License-Identifier: GPL-2.0 */
  2 /* ITLB ** ICACHE line 1: Context 0 check and       2 /* ITLB ** ICACHE line 1: Context 0 check and TSB load  */
  3         ldxa    [%g0] ASI_IMMU_TSB_8KB_PTR, %g      3         ldxa    [%g0] ASI_IMMU_TSB_8KB_PTR, %g1 ! Get TSB 8K pointer
  4         ldxa    [%g0] ASI_IMMU, %g6                 4         ldxa    [%g0] ASI_IMMU, %g6             ! Get TAG TARGET
  5         srlx    %g6, 48, %g5                        5         srlx    %g6, 48, %g5                    ! Get context
  6         sllx    %g6, 22, %g6                        6         sllx    %g6, 22, %g6                    ! Zero out context
  7         brz,pn  %g5, kvmap_itlb                     7         brz,pn  %g5, kvmap_itlb                 ! Context 0 processing
  8          srlx   %g6, 22, %g6                        8          srlx   %g6, 22, %g6                    ! Delay slot
  9         TSB_LOAD_QUAD(%g1, %g4)                     9         TSB_LOAD_QUAD(%g1, %g4)                 ! Load TSB entry
 10         cmp     %g4, %g6                           10         cmp     %g4, %g6                        ! Compare TAG
 11                                                    11 
 12 /* ITLB ** ICACHE line 2: TSB compare and TLB      12 /* ITLB ** ICACHE line 2: TSB compare and TLB load      */
 13         bne,pn  %xcc, tsb_miss_itlb                13         bne,pn  %xcc, tsb_miss_itlb             ! Miss
 14          mov    FAULT_CODE_ITLB, %g3               14          mov    FAULT_CODE_ITLB, %g3
 15         sethi   %hi(_PAGE_EXEC_4U), %g4            15         sethi   %hi(_PAGE_EXEC_4U), %g4
 16         andcc   %g5, %g4, %g0                      16         andcc   %g5, %g4, %g0                   ! Executable?
 17         be,pn   %xcc, tsb_do_fault                 17         be,pn   %xcc, tsb_do_fault
 18          nop                                       18          nop                                    ! Delay slot, fill me
 19         stxa    %g5, [%g0] ASI_ITLB_DATA_IN        19         stxa    %g5, [%g0] ASI_ITLB_DATA_IN     ! Load TLB
 20         retry                                      20         retry                                   ! Trap done
 21                                                    21 
 22 /* ITLB ** ICACHE line 3:                          22 /* ITLB ** ICACHE line 3:                               */
 23         nop                                        23         nop
 24         nop                                        24         nop
 25         nop                                        25         nop
 26         nop                                        26         nop
 27         nop                                        27         nop
 28         nop                                        28         nop
 29         nop                                        29         nop
 30         nop                                        30         nop
 31                                                    31 
 32 /* ITLB ** ICACHE line 4:                          32 /* ITLB ** ICACHE line 4:                               */
 33         nop                                        33         nop
 34         nop                                        34         nop
 35         nop                                        35         nop
 36         nop                                        36         nop
 37         nop                                        37         nop
 38         nop                                        38         nop
 39         nop                                        39         nop
 40         nop                                        40         nop
                                                      

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