1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* ld script for sparc32/sparc64 kernel */ 2 /* ld script for sparc32/sparc64 kernel */
3 3
4 #include <asm-generic/vmlinux.lds.h> 4 #include <asm-generic/vmlinux.lds.h>
5 5
6 #include <asm/page.h> 6 #include <asm/page.h>
7 #include <asm/thread_info.h> 7 #include <asm/thread_info.h>
8 8
9 #ifdef CONFIG_SPARC32 9 #ifdef CONFIG_SPARC32
10 #define INITIAL_ADDRESS 0x10000 + SIZEOF_HEAD 10 #define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS
11 #define TEXTSTART 0xf0004000 11 #define TEXTSTART 0xf0004000
12 12
13 #define SMP_CACHE_BYTES_SHIFT 5 13 #define SMP_CACHE_BYTES_SHIFT 5
14 14
15 #else 15 #else
16 #define SMP_CACHE_BYTES_SHIFT 6 16 #define SMP_CACHE_BYTES_SHIFT 6
17 #define INITIAL_ADDRESS 0x4000 17 #define INITIAL_ADDRESS 0x4000
18 #define TEXTSTART 0x0000000000404000 18 #define TEXTSTART 0x0000000000404000
19 19
20 #endif 20 #endif
21 21
22 #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_ 22 #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
23 23
24 #ifdef CONFIG_SPARC32 24 #ifdef CONFIG_SPARC32
25 OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "e 25 OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
26 OUTPUT_ARCH(sparc) 26 OUTPUT_ARCH(sparc)
27 ENTRY(_start) 27 ENTRY(_start)
28 jiffies = jiffies_64 + 4; 28 jiffies = jiffies_64 + 4;
29 #else 29 #else
30 /* sparc64 */ 30 /* sparc64 */
31 OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "e 31 OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
32 OUTPUT_ARCH(sparc:v9a) 32 OUTPUT_ARCH(sparc:v9a)
33 ENTRY(_start) 33 ENTRY(_start)
34 jiffies = jiffies_64; 34 jiffies = jiffies_64;
35 #endif 35 #endif
36 36
37 #ifdef CONFIG_SPARC64 37 #ifdef CONFIG_SPARC64
38 ASSERT((swapper_tsb == 0x0000000000408000), "E 38 ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large")
39 #endif 39 #endif
40 40
41 SECTIONS 41 SECTIONS
42 { 42 {
43 #ifdef CONFIG_SPARC64 43 #ifdef CONFIG_SPARC64
44 swapper_pg_dir = 0x0000000000402000; 44 swapper_pg_dir = 0x0000000000402000;
45 #endif 45 #endif
46 . = INITIAL_ADDRESS; 46 . = INITIAL_ADDRESS;
47 .text TEXTSTART : 47 .text TEXTSTART :
48 { 48 {
49 _text = .; 49 _text = .;
50 HEAD_TEXT 50 HEAD_TEXT
51 TEXT_TEXT 51 TEXT_TEXT
52 SCHED_TEXT 52 SCHED_TEXT
53 LOCK_TEXT 53 LOCK_TEXT
54 KPROBES_TEXT 54 KPROBES_TEXT
55 IRQENTRY_TEXT 55 IRQENTRY_TEXT
56 SOFTIRQENTRY_TEXT 56 SOFTIRQENTRY_TEXT
57 *(.gnu.warning) 57 *(.gnu.warning)
58 } = 0 58 } = 0
59 _etext = .; 59 _etext = .;
60 60
61 RO_DATA(PAGE_SIZE) 61 RO_DATA(PAGE_SIZE)
62 62
63 /* Start of data section */ 63 /* Start of data section */
64 _sdata = .; 64 _sdata = .;
65 65
66 .data1 : { 66 .data1 : {
67 *(.data1) 67 *(.data1)
68 } 68 }
69 RW_DATA(SMP_CACHE_BYTES, 0, THREAD_SIZ 69 RW_DATA(SMP_CACHE_BYTES, 0, THREAD_SIZE)
70 70
71 /* End of data section */ 71 /* End of data section */
72 _edata = .; 72 _edata = .;
73 73
74 .fixup : { 74 .fixup : {
75 __start___fixup = .; 75 __start___fixup = .;
76 *(.fixup) 76 *(.fixup)
77 __stop___fixup = .; 77 __stop___fixup = .;
78 } 78 }
79 EXCEPTION_TABLE(16) 79 EXCEPTION_TABLE(16)
80 80
81 . = ALIGN(PAGE_SIZE); 81 . = ALIGN(PAGE_SIZE);
82 __init_begin = ALIGN(PAGE_SIZE); 82 __init_begin = ALIGN(PAGE_SIZE);
83 INIT_TEXT_SECTION(PAGE_SIZE) 83 INIT_TEXT_SECTION(PAGE_SIZE)
84 __init_text_end = .; 84 __init_text_end = .;
85 INIT_DATA_SECTION(16) 85 INIT_DATA_SECTION(16)
86 86
87 . = ALIGN(4); 87 . = ALIGN(4);
88 .tsb_ldquad_phys_patch : { 88 .tsb_ldquad_phys_patch : {
89 __tsb_ldquad_phys_patch = .; 89 __tsb_ldquad_phys_patch = .;
90 *(.tsb_ldquad_phys_patch) 90 *(.tsb_ldquad_phys_patch)
91 __tsb_ldquad_phys_patch_end = 91 __tsb_ldquad_phys_patch_end = .;
92 } 92 }
93 93
94 .tsb_phys_patch : { 94 .tsb_phys_patch : {
95 __tsb_phys_patch = .; 95 __tsb_phys_patch = .;
96 *(.tsb_phys_patch) 96 *(.tsb_phys_patch)
97 __tsb_phys_patch_end = .; 97 __tsb_phys_patch_end = .;
98 } 98 }
99 99
100 .cpuid_patch : { 100 .cpuid_patch : {
101 __cpuid_patch = .; 101 __cpuid_patch = .;
102 *(.cpuid_patch) 102 *(.cpuid_patch)
103 __cpuid_patch_end = .; 103 __cpuid_patch_end = .;
104 } 104 }
105 105
106 .sun4v_1insn_patch : { 106 .sun4v_1insn_patch : {
107 __sun4v_1insn_patch = .; 107 __sun4v_1insn_patch = .;
108 *(.sun4v_1insn_patch) 108 *(.sun4v_1insn_patch)
109 __sun4v_1insn_patch_end = .; 109 __sun4v_1insn_patch_end = .;
110 } 110 }
111 .sun4v_2insn_patch : { 111 .sun4v_2insn_patch : {
112 __sun4v_2insn_patch = .; 112 __sun4v_2insn_patch = .;
113 *(.sun4v_2insn_patch) 113 *(.sun4v_2insn_patch)
114 __sun4v_2insn_patch_end = .; 114 __sun4v_2insn_patch_end = .;
115 } 115 }
116 .leon_1insn_patch : { 116 .leon_1insn_patch : {
117 __leon_1insn_patch = .; 117 __leon_1insn_patch = .;
118 *(.leon_1insn_patch) 118 *(.leon_1insn_patch)
119 __leon_1insn_patch_end = .; 119 __leon_1insn_patch_end = .;
120 } 120 }
121 .swapper_tsb_phys_patch : { 121 .swapper_tsb_phys_patch : {
122 __swapper_tsb_phys_patch = .; 122 __swapper_tsb_phys_patch = .;
123 *(.swapper_tsb_phys_patch) 123 *(.swapper_tsb_phys_patch)
124 __swapper_tsb_phys_patch_end = 124 __swapper_tsb_phys_patch_end = .;
125 } 125 }
126 .swapper_4m_tsb_phys_patch : { 126 .swapper_4m_tsb_phys_patch : {
127 __swapper_4m_tsb_phys_patch = 127 __swapper_4m_tsb_phys_patch = .;
128 *(.swapper_4m_tsb_phys_patch) 128 *(.swapper_4m_tsb_phys_patch)
129 __swapper_4m_tsb_phys_patch_en 129 __swapper_4m_tsb_phys_patch_end = .;
130 } 130 }
131 .popc_3insn_patch : { 131 .popc_3insn_patch : {
132 __popc_3insn_patch = .; 132 __popc_3insn_patch = .;
133 *(.popc_3insn_patch) 133 *(.popc_3insn_patch)
134 __popc_3insn_patch_end = .; 134 __popc_3insn_patch_end = .;
135 } 135 }
136 .popc_6insn_patch : { 136 .popc_6insn_patch : {
137 __popc_6insn_patch = .; 137 __popc_6insn_patch = .;
138 *(.popc_6insn_patch) 138 *(.popc_6insn_patch)
139 __popc_6insn_patch_end = .; 139 __popc_6insn_patch_end = .;
140 } 140 }
141 .pause_3insn_patch : { 141 .pause_3insn_patch : {
142 __pause_3insn_patch = .; 142 __pause_3insn_patch = .;
143 *(.pause_3insn_patch) 143 *(.pause_3insn_patch)
144 __pause_3insn_patch_end = .; 144 __pause_3insn_patch_end = .;
145 } 145 }
146 .sun_m7_1insn_patch : { 146 .sun_m7_1insn_patch : {
147 __sun_m7_1insn_patch = .; 147 __sun_m7_1insn_patch = .;
148 *(.sun_m7_1insn_patch) 148 *(.sun_m7_1insn_patch)
149 __sun_m7_1insn_patch_end = .; 149 __sun_m7_1insn_patch_end = .;
150 } 150 }
151 .sun_m7_2insn_patch : { 151 .sun_m7_2insn_patch : {
152 __sun_m7_2insn_patch = .; 152 __sun_m7_2insn_patch = .;
153 *(.sun_m7_2insn_patch) 153 *(.sun_m7_2insn_patch)
154 __sun_m7_2insn_patch_end = .; 154 __sun_m7_2insn_patch_end = .;
155 } 155 }
156 .get_tick_patch : { 156 .get_tick_patch : {
157 __get_tick_patch = .; 157 __get_tick_patch = .;
158 *(.get_tick_patch) 158 *(.get_tick_patch)
159 __get_tick_patch_end = .; 159 __get_tick_patch_end = .;
160 } 160 }
161 .pud_huge_patch : { 161 .pud_huge_patch : {
162 __pud_huge_patch = .; 162 __pud_huge_patch = .;
163 *(.pud_huge_patch) 163 *(.pud_huge_patch)
164 __pud_huge_patch_end = .; 164 __pud_huge_patch_end = .;
165 } 165 }
166 .fast_win_ctrl_1insn_patch : { 166 .fast_win_ctrl_1insn_patch : {
167 __fast_win_ctrl_1insn_patch = 167 __fast_win_ctrl_1insn_patch = .;
168 *(.fast_win_ctrl_1insn_patch) 168 *(.fast_win_ctrl_1insn_patch)
169 __fast_win_ctrl_1insn_patch_en 169 __fast_win_ctrl_1insn_patch_end = .;
170 } 170 }
171 PERCPU_SECTION(SMP_CACHE_BYTES) 171 PERCPU_SECTION(SMP_CACHE_BYTES)
172 172
173 . = ALIGN(PAGE_SIZE); 173 . = ALIGN(PAGE_SIZE);
174 .exit.text : { 174 .exit.text : {
175 EXIT_TEXT 175 EXIT_TEXT
176 } 176 }
177 177
178 .exit.data : { 178 .exit.data : {
179 EXIT_DATA 179 EXIT_DATA
180 } 180 }
181 181
182 . = ALIGN(PAGE_SIZE); 182 . = ALIGN(PAGE_SIZE);
183 __init_end = .; 183 __init_end = .;
184 BSS_SECTION(0, 0, 0) 184 BSS_SECTION(0, 0, 0)
185 _end = . ; 185 _end = . ;
186 186
187 STABS_DEBUG 187 STABS_DEBUG
188 DWARF_DEBUG 188 DWARF_DEBUG
189 ELF_DETAILS 189 ELF_DETAILS
190 190
191 DISCARDS 191 DISCARDS
192 } 192 }
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