1 /* SPDX-License-Identifier: GPL-2.0 */ !! 1 /* ld script to make UltraLinux kernel */ 2 /* ld script for sparc32/sparc64 kernel */ << 3 2 4 #include <asm-generic/vmlinux.lds.h> 3 #include <asm-generic/vmlinux.lds.h> 5 4 6 #include <asm/page.h> << 7 #include <asm/thread_info.h> << 8 << 9 #ifdef CONFIG_SPARC32 << 10 #define INITIAL_ADDRESS 0x10000 + SIZEOF_HEAD << 11 #define TEXTSTART 0xf0004000 << 12 << 13 #define SMP_CACHE_BYTES_SHIFT 5 << 14 << 15 #else << 16 #define SMP_CACHE_BYTES_SHIFT 6 << 17 #define INITIAL_ADDRESS 0x4000 << 18 #define TEXTSTART 0x0000000000404000 << 19 << 20 #endif << 21 << 22 #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_ << 23 << 24 #ifdef CONFIG_SPARC32 << 25 OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "e << 26 OUTPUT_ARCH(sparc) << 27 ENTRY(_start) << 28 jiffies = jiffies_64 + 4; << 29 #else << 30 /* sparc64 */ << 31 OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "e 5 OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc") 32 OUTPUT_ARCH(sparc:v9a) 6 OUTPUT_ARCH(sparc:v9a) 33 ENTRY(_start) 7 ENTRY(_start) 34 jiffies = jiffies_64; << 35 #endif << 36 << 37 #ifdef CONFIG_SPARC64 << 38 ASSERT((swapper_tsb == 0x0000000000408000), "E << 39 #endif << 40 8 >> 9 jiffies = jiffies_64; 41 SECTIONS 10 SECTIONS 42 { 11 { 43 #ifdef CONFIG_SPARC64 !! 12 swapper_pmd_dir = 0x0000000000402000; 44 swapper_pg_dir = 0x0000000000402000; !! 13 empty_pg_dir = 0x0000000000403000; 45 #endif !! 14 . = 0x4000; 46 . = INITIAL_ADDRESS; !! 15 .text 0x0000000000404000 : 47 .text TEXTSTART : !! 16 { 48 { !! 17 *(.text) 49 _text = .; !! 18 *(.gnu.warning) 50 HEAD_TEXT !! 19 } =0 51 TEXT_TEXT !! 20 _etext = .; 52 SCHED_TEXT !! 21 PROVIDE (etext = .); 53 LOCK_TEXT !! 22 54 KPROBES_TEXT !! 23 RODATA 55 IRQENTRY_TEXT !! 24 56 SOFTIRQENTRY_TEXT !! 25 .data : 57 *(.gnu.warning) !! 26 { 58 } = 0 !! 27 *(.data) 59 _etext = .; !! 28 CONSTRUCTORS 60 !! 29 } 61 RO_DATA(PAGE_SIZE) !! 30 .data1 : { *(.data1) } 62 !! 31 . = ALIGN(64); 63 /* Start of data section */ !! 32 .data.cacheline_aligned : { *(.data.cacheline_aligned) } 64 _sdata = .; !! 33 _edata = .; 65 !! 34 PROVIDE (edata = .); 66 .data1 : { !! 35 .fixup : { *(.fixup) } 67 *(.data1) !! 36 68 } !! 37 . = ALIGN(16); 69 RW_DATA(SMP_CACHE_BYTES, 0, THREAD_SIZ !! 38 __start___ex_table = .; 70 !! 39 __ex_table : { *(__ex_table) } 71 /* End of data section */ !! 40 __stop___ex_table = .; 72 _edata = .; !! 41 73 !! 42 . = ALIGN(8192); 74 .fixup : { !! 43 __init_begin = .; 75 __start___fixup = .; !! 44 .init.text : { 76 *(.fixup) !! 45 _sinittext = .; 77 __stop___fixup = .; !! 46 *(.init.text) 78 } !! 47 _einittext = .; 79 EXCEPTION_TABLE(16) !! 48 } 80 !! 49 .init.data : { *(.init.data) } 81 . = ALIGN(PAGE_SIZE); !! 50 . = ALIGN(16); 82 __init_begin = ALIGN(PAGE_SIZE); !! 51 __setup_start = .; 83 INIT_TEXT_SECTION(PAGE_SIZE) !! 52 .init.setup : { *(.init.setup) } 84 __init_text_end = .; !! 53 __setup_end = .; 85 INIT_DATA_SECTION(16) !! 54 __start___param = .; 86 !! 55 __param : { *(__param) } 87 . = ALIGN(4); !! 56 __stop___param = .; 88 .tsb_ldquad_phys_patch : { !! 57 __initcall_start = .; 89 __tsb_ldquad_phys_patch = .; !! 58 .initcall.init : { 90 *(.tsb_ldquad_phys_patch) !! 59 *(.initcall1.init) 91 __tsb_ldquad_phys_patch_end = !! 60 *(.initcall2.init) 92 } !! 61 *(.initcall3.init) 93 !! 62 *(.initcall4.init) 94 .tsb_phys_patch : { !! 63 *(.initcall5.init) 95 __tsb_phys_patch = .; !! 64 *(.initcall6.init) 96 *(.tsb_phys_patch) !! 65 *(.initcall7.init) 97 __tsb_phys_patch_end = .; !! 66 } 98 } !! 67 __initcall_end = .; 99 !! 68 __con_initcall_start = .; 100 .cpuid_patch : { !! 69 .con_initcall.init : { *(.con_initcall.init) } 101 __cpuid_patch = .; !! 70 __con_initcall_end = .; 102 *(.cpuid_patch) !! 71 SECURITY_INIT 103 __cpuid_patch_end = .; !! 72 . = ALIGN(8192); 104 } !! 73 __initramfs_start = .; 105 !! 74 .init.ramfs : { *(.init.ramfs) } 106 .sun4v_1insn_patch : { !! 75 __initramfs_end = .; 107 __sun4v_1insn_patch = .; !! 76 . = ALIGN(32); 108 *(.sun4v_1insn_patch) !! 77 __per_cpu_start = .; 109 __sun4v_1insn_patch_end = .; !! 78 .data.percpu : { *(.data.percpu) } 110 } !! 79 __per_cpu_end = .; 111 .sun4v_2insn_patch : { !! 80 . = ALIGN(8192); 112 __sun4v_2insn_patch = .; !! 81 __init_end = .; 113 *(.sun4v_2insn_patch) !! 82 __bss_start = .; 114 __sun4v_2insn_patch_end = .; !! 83 .sbss : { *(.sbss) *(.scommon) } 115 } !! 84 .bss : 116 .leon_1insn_patch : { !! 85 { 117 __leon_1insn_patch = .; !! 86 *(.dynbss) 118 *(.leon_1insn_patch) !! 87 *(.bss) 119 __leon_1insn_patch_end = .; !! 88 *(COMMON) 120 } !! 89 } 121 .swapper_tsb_phys_patch : { !! 90 _end = . ; 122 __swapper_tsb_phys_patch = .; !! 91 PROVIDE (end = .); 123 *(.swapper_tsb_phys_patch) !! 92 /* Stabs debugging sections. */ 124 __swapper_tsb_phys_patch_end = !! 93 .stab 0 : { *(.stab) } 125 } !! 94 .stabstr 0 : { *(.stabstr) } 126 .swapper_4m_tsb_phys_patch : { !! 95 .stab.excl 0 : { *(.stab.excl) } 127 __swapper_4m_tsb_phys_patch = !! 96 .stab.exclstr 0 : { *(.stab.exclstr) } 128 *(.swapper_4m_tsb_phys_patch) !! 97 .stab.index 0 : { *(.stab.index) } 129 __swapper_4m_tsb_phys_patch_en !! 98 .stab.indexstr 0 : { *(.stab.indexstr) } 130 } !! 99 .comment 0 : { *(.comment) } 131 .popc_3insn_patch : { !! 100 .debug 0 : { *(.debug) } 132 __popc_3insn_patch = .; !! 101 .debug_srcinfo 0 : { *(.debug_srcinfo) } 133 *(.popc_3insn_patch) !! 102 .debug_aranges 0 : { *(.debug_aranges) } 134 __popc_3insn_patch_end = .; !! 103 .debug_pubnames 0 : { *(.debug_pubnames) } 135 } !! 104 .debug_sfnames 0 : { *(.debug_sfnames) } 136 .popc_6insn_patch : { !! 105 .line 0 : { *(.line) } 137 __popc_6insn_patch = .; !! 106 /DISCARD/ : { *(.exit.text) *(.exit.data) *(.exitcall.exit) } 138 *(.popc_6insn_patch) << 139 __popc_6insn_patch_end = .; << 140 } << 141 .pause_3insn_patch : { << 142 __pause_3insn_patch = .; << 143 *(.pause_3insn_patch) << 144 __pause_3insn_patch_end = .; << 145 } << 146 .sun_m7_1insn_patch : { << 147 __sun_m7_1insn_patch = .; << 148 *(.sun_m7_1insn_patch) << 149 __sun_m7_1insn_patch_end = .; << 150 } << 151 .sun_m7_2insn_patch : { << 152 __sun_m7_2insn_patch = .; << 153 *(.sun_m7_2insn_patch) << 154 __sun_m7_2insn_patch_end = .; << 155 } << 156 .get_tick_patch : { << 157 __get_tick_patch = .; << 158 *(.get_tick_patch) << 159 __get_tick_patch_end = .; << 160 } << 161 .pud_huge_patch : { << 162 __pud_huge_patch = .; << 163 *(.pud_huge_patch) << 164 __pud_huge_patch_end = .; << 165 } << 166 .fast_win_ctrl_1insn_patch : { << 167 __fast_win_ctrl_1insn_patch = << 168 *(.fast_win_ctrl_1insn_patch) << 169 __fast_win_ctrl_1insn_patch_en << 170 } << 171 PERCPU_SECTION(SMP_CACHE_BYTES) << 172 << 173 . = ALIGN(PAGE_SIZE); << 174 .exit.text : { << 175 EXIT_TEXT << 176 } << 177 << 178 .exit.data : { << 179 EXIT_DATA << 180 } << 181 << 182 . = ALIGN(PAGE_SIZE); << 183 __init_end = .; << 184 BSS_SECTION(0, 0, 0) << 185 _end = . ; << 186 << 187 STABS_DEBUG << 188 DWARF_DEBUG << 189 ELF_DETAILS << 190 << 191 DISCARDS << 192 } 107 }
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