1 # SPDX-License-Identifier: GPL-2.0 !! 1 config MIPS
2 # Select 32 or 64 bit !! 2 bool
3 config 64BIT !! 3 default y
4 bool "64-bit kernel" if "$(ARCH)" = "x !! 4 select ARCH_SUPPORTS_UPROBES
5 default "$(ARCH)" != "i386" <<
6 help <<
7 Say yes to build a 64-bit kernel - f <<
8 Say no to build a 32-bit kernel - fo <<
9 <<
10 config X86_32 <<
11 def_bool y <<
12 depends on !64BIT <<
13 # Options that are inherently 32-bit k <<
14 select ARCH_WANT_IPC_PARSE_VERSION <<
15 select CLKSRC_I8253 <<
16 select CLONE_BACKWARDS <<
17 select GENERIC_VDSO_32 <<
18 select HAVE_DEBUG_STACKOVERFLOW <<
19 select KMAP_LOCAL <<
20 select MODULES_USE_ELF_REL <<
21 select OLD_SIGACTION <<
22 select ARCH_SPLIT_ARG64 <<
23 <<
24 config X86_64 <<
25 def_bool y <<
26 depends on 64BIT <<
27 # Options that are inherently 64-bit k <<
28 select ARCH_HAS_GIGANTIC_PAGE <<
29 select ARCH_SUPPORTS_INT128 if CC_HAS_ <<
30 select ARCH_SUPPORTS_PER_VMA_LOCK <<
31 select ARCH_SUPPORTS_HUGE_PFNMAP if TR <<
32 select HAVE_ARCH_SOFT_DIRTY <<
33 select MODULES_USE_ELF_RELA <<
34 select NEED_DMA_MAP_STATE <<
35 select SWIOTLB <<
36 select ARCH_HAS_ELFCORE_COMPAT <<
37 select ZONE_DMA32 <<
38 select EXECMEM if DYNAMIC_FTRACE <<
39 <<
40 config FORCE_DYNAMIC_FTRACE <<
41 def_bool y <<
42 depends on X86_32 <<
43 depends on FUNCTION_TRACER <<
44 select DYNAMIC_FTRACE <<
45 help <<
46 We keep the static function tracing <<
47 in order to test the non static func <<
48 generic code, as other architectures <<
49 only need to keep it around for x86_ <<
50 for x86_32. For x86_32, force DYNAMI <<
51 # <<
52 # Arch settings <<
53 # <<
54 # ( Note that options that are marked 'if X86_ <<
55 # ported to 32-bit as well. ) <<
56 # <<
57 config X86 <<
58 def_bool y <<
59 # <<
60 # Note: keep this list sorted alphabet <<
61 # <<
62 select ACPI_LEGACY_TABLES_LOOKUP <<
63 select ACPI_SYSTEM_POWER_STATES_SUPPOR <<
64 select ACPI_HOTPLUG_CPU <<
65 select ARCH_32BIT_OFF_T <<
66 select ARCH_CLOCKSOURCE_INIT <<
67 select ARCH_CONFIGURES_CPU_MITIGATIONS <<
68 select ARCH_CORRECT_STACKTRACE_ON_KRET <<
69 select ARCH_ENABLE_HUGEPAGE_MIGRATION <<
70 select ARCH_ENABLE_MEMORY_HOTPLUG if X <<
71 select ARCH_ENABLE_MEMORY_HOTREMOVE if <<
72 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if <<
73 select ARCH_ENABLE_THP_MIGRATION if X8 <<
74 select ARCH_HAS_ACPI_TABLE_UPGRADE <<
75 select ARCH_HAS_CACHE_LINE_SIZE <<
76 select ARCH_HAS_CPU_CACHE_INVALIDATE_M <<
77 select ARCH_HAS_CPU_FINALIZE_INIT <<
78 select ARCH_HAS_CPU_PASID <<
79 select ARCH_HAS_CURRENT_STACK_POINTER <<
80 select ARCH_HAS_DEBUG_VIRTUAL <<
81 select ARCH_HAS_DEBUG_VM_PGTABLE <<
82 select ARCH_HAS_DEVMEM_IS_ALLOWED <<
83 select ARCH_HAS_DMA_OPS <<
84 select ARCH_HAS_EARLY_DEBUG <<
85 select ARCH_HAS_ELF_RANDOMIZE <<
86 select ARCH_HAS_FAST_MULTIPLIER <<
87 select ARCH_HAS_FORTIFY_SOURCE <<
88 select ARCH_HAS_GCOV_PROFILE_ALL <<
89 select ARCH_HAS_KCOV <<
90 select ARCH_HAS_KERNEL_FPU_SUPPORT <<
91 select ARCH_HAS_MEM_ENCRYPT <<
92 select ARCH_HAS_MEMBARRIER_SYNC_CORE <<
93 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS <<
94 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
95 select ARCH_HAS_PMEM_API <<
96 select ARCH_HAS_PTE_DEVMAP <<
97 select ARCH_HAS_PTE_SPECIAL <<
98 select ARCH_HAS_HW_PTE_YOUNG <<
99 select ARCH_HAS_NONLEAF_PMD_YOUNG <<
100 select ARCH_HAS_UACCESS_FLUSHCACHE <<
101 select ARCH_HAS_COPY_MC <<
102 select ARCH_HAS_SET_MEMORY <<
103 select ARCH_HAS_SET_DIRECT_MAP <<
104 select ARCH_HAS_STRICT_KERNEL_RWX <<
105 select ARCH_HAS_STRICT_MODULE_RWX <<
106 select ARCH_HAS_SYNC_CORE_BEFORE_USERM <<
107 select ARCH_HAS_SYSCALL_WRAPPER <<
108 select ARCH_HAS_UBSAN <<
109 select ARCH_HAS_DEBUG_WX <<
110 select ARCH_HAS_ZONE_DMA_SET if EXPERT <<
111 select ARCH_HAVE_NMI_SAFE_CMPXCHG <<
112 select ARCH_HAVE_EXTRA_ELF_NOTES <<
113 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL <<
114 select ARCH_MIGHT_HAVE_ACPI_PDC <<
115 select ARCH_MIGHT_HAVE_PC_PARPORT 5 select ARCH_MIGHT_HAVE_PC_PARPORT
116 select ARCH_MIGHT_HAVE_PC_SERIO 6 select ARCH_MIGHT_HAVE_PC_SERIO
117 select ARCH_STACKWALK !! 7 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
118 select ARCH_SUPPORTS_ACPI <<
119 select ARCH_SUPPORTS_ATOMIC_RMW <<
120 select ARCH_SUPPORTS_DEBUG_PAGEALLOC <<
121 select ARCH_SUPPORTS_PAGE_TABLE_CHECK <<
122 select ARCH_SUPPORTS_NUMA_BALANCING <<
123 select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_ <<
124 select ARCH_SUPPORTS_CFI_CLANG <<
125 select ARCH_USES_CFI_TRAPS <<
126 select ARCH_SUPPORTS_LTO_CLANG <<
127 select ARCH_SUPPORTS_LTO_CLANG_THIN <<
128 select ARCH_SUPPORTS_RT <<
129 select ARCH_USE_BUILTIN_BSWAP 8 select ARCH_USE_BUILTIN_BSWAP
130 select ARCH_USE_CMPXCHG_LOCKREF !! 9 select HAVE_CONTEXT_TRACKING
131 select ARCH_USE_MEMTEST !! 10 select HAVE_GENERIC_DMA_COHERENT
132 select ARCH_USE_QUEUED_RWLOCKS !! 11 select HAVE_IDE
133 select ARCH_USE_QUEUED_SPINLOCKS !! 12 select HAVE_IRQ_EXIT_ON_IRQ_STACK
134 select ARCH_USE_SYM_ANNOTATIONS !! 13 select HAVE_OPROFILE
135 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU !! 14 select HAVE_PERF_EVENTS
136 select ARCH_WANT_DEFAULT_BPF_JIT !! 15 select PERF_USE_VMALLOC
137 select ARCH_WANTS_DYNAMIC_TASK_STRUCT <<
138 select ARCH_WANTS_NO_INSTR <<
139 select ARCH_WANT_GENERAL_HUGETLB <<
140 select ARCH_WANT_HUGE_PMD_SHARE <<
141 select ARCH_WANT_LD_ORPHAN_WARN <<
142 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
143 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM <<
144 select ARCH_WANTS_THP_SWAP <<
145 select ARCH_HAS_PARANOID_L1D_FLUSH <<
146 select BUILDTIME_TABLE_SORT <<
147 select CLKEVT_I8253 <<
148 select CLOCKSOURCE_VALIDATE_LAST_CYCLE <<
149 select CLOCKSOURCE_WATCHDOG <<
150 # Word-size accesses may read uninitia <<
151 # in strings and cause false KMSAN rep <<
152 select DCACHE_WORD_ACCESS <<
153 select DYNAMIC_SIGFRAME <<
154 select EDAC_ATOMIC_SCRUB <<
155 select EDAC_SUPPORT <<
156 select GENERIC_CLOCKEVENTS_BROADCAST <<
157 select GENERIC_CLOCKEVENTS_BROADCAST_I <<
158 select GENERIC_CLOCKEVENTS_MIN_ADJUST <<
159 select GENERIC_CMOS_UPDATE <<
160 select GENERIC_CPU_AUTOPROBE <<
161 select GENERIC_CPU_DEVICES <<
162 select GENERIC_CPU_VULNERABILITIES <<
163 select GENERIC_EARLY_IOREMAP <<
164 select GENERIC_ENTRY <<
165 select GENERIC_IOMAP <<
166 select GENERIC_IRQ_EFFECTIVE_AFF_MASK <<
167 select GENERIC_IRQ_MATRIX_ALLOCATOR <<
168 select GENERIC_IRQ_MIGRATION <<
169 select GENERIC_IRQ_PROBE <<
170 select GENERIC_IRQ_RESERVATION_MODE <<
171 select GENERIC_IRQ_SHOW <<
172 select GENERIC_PENDING_IRQ <<
173 select GENERIC_PTDUMP <<
174 select GENERIC_SMP_IDLE_THREAD <<
175 select GENERIC_TIME_VSYSCALL <<
176 select GENERIC_GETTIMEOFDAY <<
177 select GENERIC_VDSO_TIME_NS <<
178 select GENERIC_VDSO_OVERFLOW_PROTECT <<
179 select GUP_GET_PXX_LOW_HIGH <<
180 select HARDIRQS_SW_RESEND <<
181 select HARDLOCKUP_CHECK_TIMESTAMP <<
182 select HAS_IOPORT <<
183 select HAVE_ACPI_APEI <<
184 select HAVE_ACPI_APEI_NMI <<
185 select HAVE_ALIGNED_STRUCT_PAGE <<
186 select HAVE_ARCH_AUDITSYSCALL <<
187 select HAVE_ARCH_HUGE_VMAP <<
188 select HAVE_ARCH_HUGE_VMALLOC <<
189 select HAVE_ARCH_JUMP_LABEL <<
190 select HAVE_ARCH_JUMP_LABEL_RELATIVE <<
191 select HAVE_ARCH_KASAN <<
192 select HAVE_ARCH_KASAN_VMALLOC <<
193 select HAVE_ARCH_KFENCE <<
194 select HAVE_ARCH_KMSAN <<
195 select HAVE_ARCH_KGDB 16 select HAVE_ARCH_KGDB
196 select HAVE_ARCH_MMAP_RND_BITS !! 17 select HAVE_ARCH_MMAP_RND_BITS if MMU
197 select HAVE_ARCH_MMAP_RND_COMPAT_BITS !! 18 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
198 select HAVE_ARCH_COMPAT_MMAP_BASES <<
199 select HAVE_ARCH_PREL32_RELOCATIONS <<
200 select HAVE_ARCH_SECCOMP_FILTER 19 select HAVE_ARCH_SECCOMP_FILTER
201 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
202 select HAVE_ARCH_STACKLEAK <<
203 select HAVE_ARCH_TRACEHOOK 20 select HAVE_ARCH_TRACEHOOK
204 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 21 select HAVE_CBPF_JIT if !CPU_MICROMIPS
205 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_ !! 22 select HAVE_FUNCTION_TRACER
206 select HAVE_ARCH_USERFAULTFD_WP <<
207 select HAVE_ARCH_USERFAULTFD_MINOR <<
208 select HAVE_ARCH_VMAP_STACK <<
209 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
210 select HAVE_ARCH_WITHIN_STACK_FRAMES <<
211 select HAVE_ASM_MODVERSIONS <<
212 select HAVE_CMPXCHG_DOUBLE <<
213 select HAVE_CMPXCHG_LOCAL <<
214 select HAVE_CONTEXT_TRACKING_USER <<
215 select HAVE_CONTEXT_TRACKING_USER_OFFS <<
216 select HAVE_C_RECORDMCOUNT <<
217 select HAVE_OBJTOOL_MCOUNT <<
218 select HAVE_OBJTOOL_NOP_MCOUNT <<
219 select HAVE_BUILDTIME_MCOUNT_SORT <<
220 select HAVE_DEBUG_KMEMLEAK <<
221 select HAVE_DMA_CONTIGUOUS <<
222 select HAVE_DYNAMIC_FTRACE 23 select HAVE_DYNAMIC_FTRACE
223 select HAVE_DYNAMIC_FTRACE_WITH_REGS <<
224 select HAVE_DYNAMIC_FTRACE_WITH_ARGS <<
225 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT <<
226 select HAVE_SAMPLE_FTRACE_DIRECT <<
227 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI <<
228 select HAVE_EBPF_JIT <<
229 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
230 select HAVE_EISA <<
231 select HAVE_EXIT_THREAD <<
232 select HAVE_GUP_FAST <<
233 select HAVE_FENTRY <<
234 select HAVE_FTRACE_MCOUNT_RECORD 24 select HAVE_FTRACE_MCOUNT_RECORD
235 select HAVE_FUNCTION_GRAPH_RETVAL !! 25 select HAVE_C_RECORDMCOUNT
236 select HAVE_FUNCTION_GRAPH_TRACER !! 26 select HAVE_FUNCTION_GRAPH_TRACER
237 select HAVE_FUNCTION_TRACER <<
238 select HAVE_GCC_PLUGINS <<
239 select HAVE_HW_BREAKPOINT <<
240 select HAVE_IOREMAP_PROT <<
241 select HAVE_IRQ_EXIT_ON_IRQ_STACK <<
242 select HAVE_IRQ_TIME_ACCOUNTING <<
243 select HAVE_JUMP_LABEL_HACK <<
244 select HAVE_KERNEL_BZIP2 <<
245 select HAVE_KERNEL_GZIP <<
246 select HAVE_KERNEL_LZ4 <<
247 select HAVE_KERNEL_LZMA <<
248 select HAVE_KERNEL_LZO <<
249 select HAVE_KERNEL_XZ <<
250 select HAVE_KERNEL_ZSTD <<
251 select HAVE_KPROBES 27 select HAVE_KPROBES
252 select HAVE_KPROBES_ON_FTRACE <<
253 select HAVE_FUNCTION_ERROR_INJECTION <<
254 select HAVE_KRETPROBES 28 select HAVE_KRETPROBES
255 select HAVE_RETHOOK <<
256 select HAVE_LIVEPATCH <<
257 select HAVE_MIXED_BREAKPOINTS_REGS <<
258 select HAVE_MOD_ARCH_SPECIFIC <<
259 select HAVE_MOVE_PMD <<
260 select HAVE_MOVE_PUD <<
261 select HAVE_NOINSTR_HACK <<
262 select HAVE_NMI <<
263 select HAVE_NOINSTR_VALIDATION <<
264 select HAVE_OBJTOOL <<
265 select HAVE_OPTPROBES <<
266 select HAVE_PAGE_SIZE_4KB <<
267 select HAVE_PCSPKR_PLATFORM <<
268 select HAVE_PERF_EVENTS <<
269 select HAVE_PERF_EVENTS_NMI <<
270 select HAVE_HARDLOCKUP_DETECTOR_PERF <<
271 select HAVE_PCI <<
272 select HAVE_PERF_REGS <<
273 select HAVE_PERF_USER_STACK_DUMP <<
274 select MMU_GATHER_RCU_TABLE_FREE <<
275 select MMU_GATHER_MERGE_VMAS <<
276 select HAVE_POSIX_CPU_TIMERS_TASK_WORK <<
277 select HAVE_REGS_AND_STACK_ACCESS_API <<
278 select HAVE_RELIABLE_STACKTRACE <<
279 select HAVE_FUNCTION_ARG_ACCESS_API <<
280 select HAVE_SETUP_PER_CPU_AREA <<
281 select HAVE_SOFTIRQ_ON_OWN_STACK <<
282 select HAVE_STACKPROTECTOR <<
283 select HAVE_STACK_VALIDATION <<
284 select HAVE_STATIC_CALL <<
285 select HAVE_STATIC_CALL_INLINE <<
286 select HAVE_PREEMPT_DYNAMIC_CALL <<
287 select HAVE_RSEQ <<
288 select HAVE_RUST <<
289 select HAVE_SYSCALL_TRACEPOINTS 29 select HAVE_SYSCALL_TRACEPOINTS
290 select HAVE_UACCESS_VALIDATION !! 30 select HAVE_DEBUG_KMEMLEAK
291 select HAVE_UNSTABLE_SCHED_CLOCK !! 31 select HAVE_SYSCALL_TRACEPOINTS
292 select HAVE_USER_RETURN_NOTIFIER !! 32 select ARCH_HAS_ELF_RANDOMIZE
293 select HAVE_GENERIC_VDSO !! 33 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
294 select VDSO_GETRANDOM !! 34 select RTC_LIB if !MACH_LOONGSON64
295 select HOTPLUG_PARALLEL !! 35 select GENERIC_ATOMIC64 if !64BIT
296 select HOTPLUG_SMT !! 36 select HAVE_DMA_CONTIGUOUS
297 select HOTPLUG_SPLIT_STARTUP !! 37 select HAVE_DMA_API_DEBUG
>> 38 select GENERIC_IRQ_PROBE
>> 39 select GENERIC_IRQ_SHOW
>> 40 select GENERIC_PCI_IOMAP
>> 41 select HAVE_ARCH_JUMP_LABEL
>> 42 select ARCH_WANT_IPC_PARSE_VERSION
298 select IRQ_FORCED_THREADING 43 select IRQ_FORCED_THREADING
299 select LOCK_MM_AND_FIND_VMA !! 44 select HAVE_MEMBLOCK
300 select NEED_PER_CPU_EMBED_FIRST_CHUNK !! 45 select HAVE_MEMBLOCK_NODE_MAP
301 select NEED_PER_CPU_PAGE_FIRST_CHUNK !! 46 select ARCH_DISCARD_MEMBLOCK
302 select NEED_SG_DMA_LENGTH !! 47 select GENERIC_SMP_IDLE_THREAD
303 select NUMA_MEMBLKS !! 48 select BUILDTIME_EXTABLE_SORT
304 select PCI_DOMAINS !! 49 select GENERIC_CPU_AUTOPROBE
305 select PCI_LOCKLESS_CONFIG !! 50 select GENERIC_CLOCKEVENTS
306 select PERF_EVENTS !! 51 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
307 select RTC_LIB !! 52 select GENERIC_CMOS_UPDATE
308 select RTC_MC146818_LIB !! 53 select HAVE_MOD_ARCH_SPECIFIC
309 select SPARSE_IRQ !! 54 select HAVE_NMI
>> 55 select VIRT_TO_BUS
>> 56 select MODULES_USE_ELF_REL if MODULES
>> 57 select MODULES_USE_ELF_RELA if MODULES && 64BIT
>> 58 select CLONE_BACKWARDS
>> 59 select HAVE_DEBUG_STACKOVERFLOW
>> 60 select HAVE_CC_STACKPROTECTOR
>> 61 select CPU_PM if CPU_IDLE
>> 62 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
>> 63 select ARCH_BINFMT_ELF_STATE
310 select SYSCTL_EXCEPTION_TRACE 64 select SYSCTL_EXCEPTION_TRACE
311 select THREAD_INFO_IN_TASK !! 65 select HAVE_VIRT_CPU_ACCOUNTING_GEN
312 select TRACE_IRQFLAGS_SUPPORT !! 66 select HAVE_IRQ_TIME_ACCOUNTING
313 select TRACE_IRQFLAGS_NMI_SUPPORT !! 67 select GENERIC_TIME_VSYSCALL
314 select USER_STACKTRACE_SUPPORT !! 68 select ARCH_CLOCKSOURCE_DATA
315 select HAVE_ARCH_KCSAN !! 69 select HANDLE_DOMAIN_IRQ
316 select PROC_PID_ARCH_STATUS !! 70 select HAVE_EXIT_THREAD
317 select HAVE_ARCH_NODE_DEV_GROUP !! 71 select HAVE_REGS_AND_STACK_ACCESS_API
318 select FUNCTION_ALIGNMENT_16B !! 72 select HAVE_COPY_THREAD_TLS
319 select FUNCTION_ALIGNMENT_4B <<
320 imply IMA_SECURE_AND_OR_TRUSTED_BOOT <<
321 select HAVE_DYNAMIC_FTRACE_NO_PATCHABL <<
322 73
323 config INSTRUCTION_DECODER !! 74 menu "Machine selection"
324 def_bool y <<
325 depends on KPROBES || PERF_EVENTS || U <<
326 75
327 config OUTPUT_FORMAT !! 76 choice
328 string !! 77 prompt "System type"
329 default "elf32-i386" if X86_32 !! 78 default SGI_IP22
330 default "elf64-x86-64" if X86_64 <<
331 79
332 config LOCKDEP_SUPPORT !! 80 config MIPS_GENERIC
333 def_bool y !! 81 bool "Generic board-agnostic MIPS kernel"
>> 82 select BOOT_RAW
>> 83 select BUILTIN_DTB
>> 84 select CEVT_R4K
>> 85 select CLKSRC_MIPS_GIC
>> 86 select COMMON_CLK
>> 87 select CPU_MIPSR2_IRQ_VI
>> 88 select CPU_MIPSR2_IRQ_EI
>> 89 select CSRC_R4K
>> 90 select DMA_PERDEV_COHERENT
>> 91 select HW_HAS_PCI
>> 92 select IRQ_MIPS_CPU
>> 93 select LIBFDT
>> 94 select MIPS_CPU_SCACHE
>> 95 select MIPS_GIC
>> 96 select MIPS_L1_CACHE_SHIFT_7
>> 97 select NO_EXCEPT_FILL
>> 98 select PCI_DRIVERS_GENERIC
>> 99 select PINCTRL
>> 100 select SMP_UP if SMP
>> 101 select SWAP_IO_SPACE
>> 102 select SYS_HAS_CPU_MIPS32_R1
>> 103 select SYS_HAS_CPU_MIPS32_R2
>> 104 select SYS_HAS_CPU_MIPS32_R6
>> 105 select SYS_HAS_CPU_MIPS64_R1
>> 106 select SYS_HAS_CPU_MIPS64_R2
>> 107 select SYS_HAS_CPU_MIPS64_R6
>> 108 select SYS_SUPPORTS_32BIT_KERNEL
>> 109 select SYS_SUPPORTS_64BIT_KERNEL
>> 110 select SYS_SUPPORTS_BIG_ENDIAN
>> 111 select SYS_SUPPORTS_HIGHMEM
>> 112 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 113 select SYS_SUPPORTS_MICROMIPS
>> 114 select SYS_SUPPORTS_MIPS_CPS
>> 115 select SYS_SUPPORTS_MIPS16
>> 116 select SYS_SUPPORTS_MULTITHREADING
>> 117 select SYS_SUPPORTS_RELOCATABLE
>> 118 select SYS_SUPPORTS_SMARTMIPS
>> 119 select USB_EHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
>> 120 select USB_EHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
>> 121 select USB_OHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
>> 122 select USB_OHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
>> 123 select USB_UHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
>> 124 select USB_UHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
>> 125 select USE_OF
>> 126 help
>> 127 Select this to build a kernel which aims to support multiple boards,
>> 128 generally using a flattened device tree passed from the bootloader
>> 129 using the boot protocol defined in the UHI (Unified Hosting
>> 130 Interface) specification.
>> 131
>> 132 config MIPS_ALCHEMY
>> 133 bool "Alchemy processor based machines"
>> 134 select ARCH_PHYS_ADDR_T_64BIT
>> 135 select CEVT_R4K
>> 136 select CSRC_R4K
>> 137 select IRQ_MIPS_CPU
>> 138 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 139 select SYS_HAS_CPU_MIPS32_R1
>> 140 select SYS_SUPPORTS_32BIT_KERNEL
>> 141 select SYS_SUPPORTS_APM_EMULATION
>> 142 select GPIOLIB
>> 143 select SYS_SUPPORTS_ZBOOT
>> 144 select COMMON_CLK
334 145
335 config STACKTRACE_SUPPORT !! 146 config AR7
336 def_bool y !! 147 bool "Texas Instruments AR7"
>> 148 select BOOT_ELF32
>> 149 select DMA_NONCOHERENT
>> 150 select CEVT_R4K
>> 151 select CSRC_R4K
>> 152 select IRQ_MIPS_CPU
>> 153 select NO_EXCEPT_FILL
>> 154 select SWAP_IO_SPACE
>> 155 select SYS_HAS_CPU_MIPS32_R1
>> 156 select SYS_HAS_EARLY_PRINTK
>> 157 select SYS_SUPPORTS_32BIT_KERNEL
>> 158 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 159 select SYS_SUPPORTS_MIPS16
>> 160 select SYS_SUPPORTS_ZBOOT_UART16550
>> 161 select GPIOLIB
>> 162 select VLYNQ
>> 163 select HAVE_CLK
>> 164 help
>> 165 Support for the Texas Instruments AR7 System-on-a-Chip
>> 166 family: TNETD7100, 7200 and 7300.
337 167
338 config MMU !! 168 config ATH25
339 def_bool y !! 169 bool "Atheros AR231x/AR531x SoC support"
>> 170 select CEVT_R4K
>> 171 select CSRC_R4K
>> 172 select DMA_NONCOHERENT
>> 173 select IRQ_MIPS_CPU
>> 174 select IRQ_DOMAIN
>> 175 select SYS_HAS_CPU_MIPS32_R1
>> 176 select SYS_SUPPORTS_BIG_ENDIAN
>> 177 select SYS_SUPPORTS_32BIT_KERNEL
>> 178 select SYS_HAS_EARLY_PRINTK
>> 179 help
>> 180 Support for Atheros AR231x and Atheros AR531x based boards
>> 181
>> 182 config ATH79
>> 183 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 184 select ARCH_HAS_RESET_CONTROLLER
>> 185 select BOOT_RAW
>> 186 select CEVT_R4K
>> 187 select CSRC_R4K
>> 188 select DMA_NONCOHERENT
>> 189 select GPIOLIB
>> 190 select HAVE_CLK
>> 191 select COMMON_CLK
>> 192 select CLKDEV_LOOKUP
>> 193 select IRQ_MIPS_CPU
>> 194 select MIPS_MACHINE
>> 195 select SYS_HAS_CPU_MIPS32_R2
>> 196 select SYS_HAS_EARLY_PRINTK
>> 197 select SYS_SUPPORTS_32BIT_KERNEL
>> 198 select SYS_SUPPORTS_BIG_ENDIAN
>> 199 select SYS_SUPPORTS_MIPS16
>> 200 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 201 select USE_OF
>> 202 help
>> 203 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 204
>> 205 config BMIPS_GENERIC
>> 206 bool "Broadcom Generic BMIPS kernel"
>> 207 select BOOT_RAW
>> 208 select NO_EXCEPT_FILL
>> 209 select USE_OF
>> 210 select CEVT_R4K
>> 211 select CSRC_R4K
>> 212 select SYNC_R4K
>> 213 select COMMON_CLK
>> 214 select BCM6345_L1_IRQ
>> 215 select BCM7038_L1_IRQ
>> 216 select BCM7120_L2_IRQ
>> 217 select BRCMSTB_L2_IRQ
>> 218 select IRQ_MIPS_CPU
>> 219 select DMA_NONCOHERENT
>> 220 select SYS_SUPPORTS_32BIT_KERNEL
>> 221 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 222 select SYS_SUPPORTS_BIG_ENDIAN
>> 223 select SYS_SUPPORTS_HIGHMEM
>> 224 select SYS_HAS_CPU_BMIPS32_3300
>> 225 select SYS_HAS_CPU_BMIPS4350
>> 226 select SYS_HAS_CPU_BMIPS4380
>> 227 select SYS_HAS_CPU_BMIPS5000
>> 228 select SWAP_IO_SPACE
>> 229 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 230 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 231 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 232 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 233 help
>> 234 Build a generic DT-based kernel image that boots on select
>> 235 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 236 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 237 must be set appropriately for your board.
>> 238
>> 239 config BCM47XX
>> 240 bool "Broadcom BCM47XX based boards"
>> 241 select BOOT_RAW
>> 242 select CEVT_R4K
>> 243 select CSRC_R4K
>> 244 select DMA_NONCOHERENT
>> 245 select HW_HAS_PCI
>> 246 select IRQ_MIPS_CPU
>> 247 select SYS_HAS_CPU_MIPS32_R1
>> 248 select NO_EXCEPT_FILL
>> 249 select SYS_SUPPORTS_32BIT_KERNEL
>> 250 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 251 select SYS_SUPPORTS_MIPS16
>> 252 select SYS_HAS_EARLY_PRINTK
>> 253 select USE_GENERIC_EARLY_PRINTK_8250
>> 254 select GPIOLIB
>> 255 select LEDS_GPIO_REGISTER
>> 256 select BCM47XX_NVRAM
>> 257 select BCM47XX_SPROM
>> 258 help
>> 259 Support for BCM47XX based boards
>> 260
>> 261 config BCM63XX
>> 262 bool "Broadcom BCM63XX based boards"
>> 263 select BOOT_RAW
>> 264 select CEVT_R4K
>> 265 select CSRC_R4K
>> 266 select SYNC_R4K
>> 267 select DMA_NONCOHERENT
>> 268 select IRQ_MIPS_CPU
>> 269 select SYS_SUPPORTS_32BIT_KERNEL
>> 270 select SYS_SUPPORTS_BIG_ENDIAN
>> 271 select SYS_HAS_EARLY_PRINTK
>> 272 select SWAP_IO_SPACE
>> 273 select GPIOLIB
>> 274 select HAVE_CLK
>> 275 select MIPS_L1_CACHE_SHIFT_4
>> 276 help
>> 277 Support for BCM63XX based boards
340 278
341 config ARCH_MMAP_RND_BITS_MIN !! 279 config MIPS_COBALT
342 default 28 if 64BIT !! 280 bool "Cobalt Server"
343 default 8 !! 281 select CEVT_R4K
>> 282 select CSRC_R4K
>> 283 select CEVT_GT641XX
>> 284 select DMA_NONCOHERENT
>> 285 select HW_HAS_PCI
>> 286 select I8253
>> 287 select I8259
>> 288 select IRQ_MIPS_CPU
>> 289 select IRQ_GT641XX
>> 290 select PCI_GT64XXX_PCI0
>> 291 select PCI
>> 292 select SYS_HAS_CPU_NEVADA
>> 293 select SYS_HAS_EARLY_PRINTK
>> 294 select SYS_SUPPORTS_32BIT_KERNEL
>> 295 select SYS_SUPPORTS_64BIT_KERNEL
>> 296 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 297 select USE_GENERIC_EARLY_PRINTK_8250
>> 298
>> 299 config MACH_DECSTATION
>> 300 bool "DECstations"
>> 301 select BOOT_ELF32
>> 302 select CEVT_DS1287
>> 303 select CEVT_R4K if CPU_R4X00
>> 304 select CSRC_IOASIC
>> 305 select CSRC_R4K if CPU_R4X00
>> 306 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 307 select CPU_R4000_WORKAROUNDS if 64BIT
>> 308 select CPU_R4400_WORKAROUNDS if 64BIT
>> 309 select DMA_NONCOHERENT
>> 310 select NO_IOPORT_MAP
>> 311 select IRQ_MIPS_CPU
>> 312 select SYS_HAS_CPU_R3000
>> 313 select SYS_HAS_CPU_R4X00
>> 314 select SYS_SUPPORTS_32BIT_KERNEL
>> 315 select SYS_SUPPORTS_64BIT_KERNEL
>> 316 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 317 select SYS_SUPPORTS_128HZ
>> 318 select SYS_SUPPORTS_256HZ
>> 319 select SYS_SUPPORTS_1024HZ
>> 320 select MIPS_L1_CACHE_SHIFT_4
>> 321 help
>> 322 This enables support for DEC's MIPS based workstations. For details
>> 323 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 324 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 325
>> 326 If you have one of the following DECstation Models you definitely
>> 327 want to choose R4xx0 for the CPU Type:
>> 328
>> 329 DECstation 5000/50
>> 330 DECstation 5000/150
>> 331 DECstation 5000/260
>> 332 DECsystem 5900/260
>> 333
>> 334 otherwise choose R3000.
>> 335
>> 336 config MACH_JAZZ
>> 337 bool "Jazz family of machines"
>> 338 select FW_ARC
>> 339 select FW_ARC32
>> 340 select ARCH_MAY_HAVE_PC_FDC
>> 341 select CEVT_R4K
>> 342 select CSRC_R4K
>> 343 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 344 select GENERIC_ISA_DMA
>> 345 select HAVE_PCSPKR_PLATFORM
>> 346 select IRQ_MIPS_CPU
>> 347 select I8253
>> 348 select I8259
>> 349 select ISA
>> 350 select SYS_HAS_CPU_R4X00
>> 351 select SYS_SUPPORTS_32BIT_KERNEL
>> 352 select SYS_SUPPORTS_64BIT_KERNEL
>> 353 select SYS_SUPPORTS_100HZ
>> 354 help
>> 355 This a family of machines based on the MIPS R4030 chipset which was
>> 356 used by several vendors to build RISC/os and Windows NT workstations.
>> 357 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 358 Olivetti M700-10 workstations.
>> 359
>> 360 config MACH_INGENIC
>> 361 bool "Ingenic SoC based machines"
>> 362 select SYS_SUPPORTS_32BIT_KERNEL
>> 363 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 364 select SYS_SUPPORTS_ZBOOT_UART16550
>> 365 select DMA_NONCOHERENT
>> 366 select IRQ_MIPS_CPU
>> 367 select GPIOLIB
>> 368 select COMMON_CLK
>> 369 select GENERIC_IRQ_CHIP
>> 370 select BUILTIN_DTB
>> 371 select USE_OF
>> 372 select LIBFDT
>> 373
>> 374 config LANTIQ
>> 375 bool "Lantiq based platforms"
>> 376 select DMA_NONCOHERENT
>> 377 select IRQ_MIPS_CPU
>> 378 select CEVT_R4K
>> 379 select CSRC_R4K
>> 380 select SYS_HAS_CPU_MIPS32_R1
>> 381 select SYS_HAS_CPU_MIPS32_R2
>> 382 select SYS_SUPPORTS_BIG_ENDIAN
>> 383 select SYS_SUPPORTS_32BIT_KERNEL
>> 384 select SYS_SUPPORTS_MIPS16
>> 385 select SYS_SUPPORTS_MULTITHREADING
>> 386 select SYS_HAS_EARLY_PRINTK
>> 387 select GPIOLIB
>> 388 select SWAP_IO_SPACE
>> 389 select BOOT_RAW
>> 390 select CLKDEV_LOOKUP
>> 391 select USE_OF
>> 392 select PINCTRL
>> 393 select PINCTRL_LANTIQ
>> 394 select ARCH_HAS_RESET_CONTROLLER
>> 395 select RESET_CONTROLLER
>> 396
>> 397 config LASAT
>> 398 bool "LASAT Networks platforms"
>> 399 select CEVT_R4K
>> 400 select CRC32
>> 401 select CSRC_R4K
>> 402 select DMA_NONCOHERENT
>> 403 select SYS_HAS_EARLY_PRINTK
>> 404 select HW_HAS_PCI
>> 405 select IRQ_MIPS_CPU
>> 406 select PCI_GT64XXX_PCI0
>> 407 select MIPS_NILE4
>> 408 select R5000_CPU_SCACHE
>> 409 select SYS_HAS_CPU_R5000
>> 410 select SYS_SUPPORTS_32BIT_KERNEL
>> 411 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 412 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 413
>> 414 config MACH_LOONGSON32
>> 415 bool "Loongson-1 family of machines"
>> 416 select SYS_SUPPORTS_ZBOOT
>> 417 help
>> 418 This enables support for the Loongson-1 family of machines.
>> 419
>> 420 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 421 the Institute of Computing Technology (ICT), Chinese Academy of
>> 422 Sciences (CAS).
>> 423
>> 424 config MACH_LOONGSON64
>> 425 bool "Loongson-2/3 family of machines"
>> 426 select SYS_SUPPORTS_ZBOOT
>> 427 help
>> 428 This enables the support of Loongson-2/3 family of machines.
>> 429
>> 430 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 431 family of multi-core CPUs. They are both 64-bit general-purpose
>> 432 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 433 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 434 in the People's Republic of China. The chief architect is Professor
>> 435 Weiwu Hu.
>> 436
>> 437 config MACH_PISTACHIO
>> 438 bool "IMG Pistachio SoC based boards"
>> 439 select BOOT_ELF32
>> 440 select BOOT_RAW
>> 441 select CEVT_R4K
>> 442 select CLKSRC_MIPS_GIC
>> 443 select COMMON_CLK
>> 444 select CSRC_R4K
>> 445 select DMA_NONCOHERENT
>> 446 select GPIOLIB
>> 447 select IRQ_MIPS_CPU
>> 448 select LIBFDT
>> 449 select MFD_SYSCON
>> 450 select MIPS_CPU_SCACHE
>> 451 select MIPS_GIC
>> 452 select PINCTRL
>> 453 select REGULATOR
>> 454 select SYS_HAS_CPU_MIPS32_R2
>> 455 select SYS_SUPPORTS_32BIT_KERNEL
>> 456 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 457 select SYS_SUPPORTS_MIPS_CPS
>> 458 select SYS_SUPPORTS_MULTITHREADING
>> 459 select SYS_SUPPORTS_RELOCATABLE
>> 460 select SYS_SUPPORTS_ZBOOT
>> 461 select SYS_HAS_EARLY_PRINTK
>> 462 select USE_GENERIC_EARLY_PRINTK_8250
>> 463 select USE_OF
>> 464 help
>> 465 This enables support for the IMG Pistachio SoC platform.
>> 466
>> 467 config MACH_XILFPGA
>> 468 bool "MIPSfpga Xilinx based boards"
>> 469 select BOOT_ELF32
>> 470 select BOOT_RAW
>> 471 select BUILTIN_DTB
>> 472 select CEVT_R4K
>> 473 select COMMON_CLK
>> 474 select CSRC_R4K
>> 475 select GPIOLIB
>> 476 select IRQ_MIPS_CPU
>> 477 select LIBFDT
>> 478 select MIPS_CPU_SCACHE
>> 479 select SYS_HAS_EARLY_PRINTK
>> 480 select SYS_HAS_CPU_MIPS32_R2
>> 481 select SYS_SUPPORTS_32BIT_KERNEL
>> 482 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 483 select SYS_SUPPORTS_ZBOOT_UART16550
>> 484 select USE_OF
>> 485 select USE_GENERIC_EARLY_PRINTK_8250
>> 486 select XILINX_INTC
>> 487 help
>> 488 This enables support for the IMG University Program MIPSfpga platform.
>> 489
>> 490 config MIPS_MALTA
>> 491 bool "MIPS Malta board"
>> 492 select ARCH_MAY_HAVE_PC_FDC
>> 493 select BOOT_ELF32
>> 494 select BOOT_RAW
>> 495 select BUILTIN_DTB
>> 496 select CEVT_R4K
>> 497 select CSRC_R4K
>> 498 select CLKSRC_MIPS_GIC
>> 499 select COMMON_CLK
>> 500 select DMA_MAYBE_COHERENT
>> 501 select GENERIC_ISA_DMA
>> 502 select HAVE_PCSPKR_PLATFORM
>> 503 select IRQ_MIPS_CPU
>> 504 select MIPS_GIC
>> 505 select HW_HAS_PCI
>> 506 select I8253
>> 507 select I8259
>> 508 select MIPS_BONITO64
>> 509 select MIPS_CPU_SCACHE
>> 510 select MIPS_L1_CACHE_SHIFT_6
>> 511 select PCI_GT64XXX_PCI0
>> 512 select MIPS_MSC
>> 513 select SMP_UP if SMP
>> 514 select SWAP_IO_SPACE
>> 515 select SYS_HAS_CPU_MIPS32_R1
>> 516 select SYS_HAS_CPU_MIPS32_R2
>> 517 select SYS_HAS_CPU_MIPS32_R3_5
>> 518 select SYS_HAS_CPU_MIPS32_R5
>> 519 select SYS_HAS_CPU_MIPS32_R6
>> 520 select SYS_HAS_CPU_MIPS64_R1
>> 521 select SYS_HAS_CPU_MIPS64_R2
>> 522 select SYS_HAS_CPU_MIPS64_R6
>> 523 select SYS_HAS_CPU_NEVADA
>> 524 select SYS_HAS_CPU_RM7000
>> 525 select SYS_SUPPORTS_32BIT_KERNEL
>> 526 select SYS_SUPPORTS_64BIT_KERNEL
>> 527 select SYS_SUPPORTS_BIG_ENDIAN
>> 528 select SYS_SUPPORTS_HIGHMEM
>> 529 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 530 select SYS_SUPPORTS_MICROMIPS
>> 531 select SYS_SUPPORTS_MIPS_CMP
>> 532 select SYS_SUPPORTS_MIPS_CPS
>> 533 select SYS_SUPPORTS_MIPS16
>> 534 select SYS_SUPPORTS_MULTITHREADING
>> 535 select SYS_SUPPORTS_SMARTMIPS
>> 536 select SYS_SUPPORTS_ZBOOT
>> 537 select SYS_SUPPORTS_RELOCATABLE
>> 538 select USE_OF
>> 539 select LIBFDT
>> 540 select ZONE_DMA32 if 64BIT
>> 541 select BUILTIN_DTB
>> 542 select LIBFDT
>> 543 help
>> 544 This enables support for the MIPS Technologies Malta evaluation
>> 545 board.
>> 546
>> 547 config MACH_PIC32
>> 548 bool "Microchip PIC32 Family"
>> 549 help
>> 550 This enables support for the Microchip PIC32 family of platforms.
>> 551
>> 552 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 553 microcontrollers.
>> 554
>> 555 config NEC_MARKEINS
>> 556 bool "NEC EMMA2RH Mark-eins board"
>> 557 select SOC_EMMA2RH
>> 558 select HW_HAS_PCI
>> 559 help
>> 560 This enables support for the NEC Electronics Mark-eins boards.
>> 561
>> 562 config MACH_VR41XX
>> 563 bool "NEC VR4100 series based machines"
>> 564 select CEVT_R4K
>> 565 select CSRC_R4K
>> 566 select SYS_HAS_CPU_VR41XX
>> 567 select SYS_SUPPORTS_MIPS16
>> 568 select GPIOLIB
344 569
345 config ARCH_MMAP_RND_BITS_MAX !! 570 config NXP_STB220
346 default 32 if 64BIT !! 571 bool "NXP STB220 board"
347 default 16 !! 572 select SOC_PNX833X
>> 573 help
>> 574 Support for NXP Semiconductors STB220 Development Board.
>> 575
>> 576 config NXP_STB225
>> 577 bool "NXP 225 board"
>> 578 select SOC_PNX833X
>> 579 select SOC_PNX8335
>> 580 help
>> 581 Support for NXP Semiconductors STB225 Development Board.
>> 582
>> 583 config PMC_MSP
>> 584 bool "PMC-Sierra MSP chipsets"
>> 585 select CEVT_R4K
>> 586 select CSRC_R4K
>> 587 select DMA_NONCOHERENT
>> 588 select SWAP_IO_SPACE
>> 589 select NO_EXCEPT_FILL
>> 590 select BOOT_RAW
>> 591 select SYS_HAS_CPU_MIPS32_R1
>> 592 select SYS_HAS_CPU_MIPS32_R2
>> 593 select SYS_SUPPORTS_32BIT_KERNEL
>> 594 select SYS_SUPPORTS_BIG_ENDIAN
>> 595 select SYS_SUPPORTS_MIPS16
>> 596 select IRQ_MIPS_CPU
>> 597 select SERIAL_8250
>> 598 select SERIAL_8250_CONSOLE
>> 599 select USB_EHCI_BIG_ENDIAN_MMIO
>> 600 select USB_EHCI_BIG_ENDIAN_DESC
>> 601 help
>> 602 This adds support for the PMC-Sierra family of Multi-Service
>> 603 Processor System-On-A-Chips. These parts include a number
>> 604 of integrated peripherals, interfaces and DSPs in addition to
>> 605 a variety of MIPS cores.
>> 606
>> 607 config RALINK
>> 608 bool "Ralink based machines"
>> 609 select CEVT_R4K
>> 610 select CSRC_R4K
>> 611 select BOOT_RAW
>> 612 select DMA_NONCOHERENT
>> 613 select IRQ_MIPS_CPU
>> 614 select USE_OF
>> 615 select SYS_HAS_CPU_MIPS32_R1
>> 616 select SYS_HAS_CPU_MIPS32_R2
>> 617 select SYS_SUPPORTS_32BIT_KERNEL
>> 618 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 619 select SYS_SUPPORTS_MIPS16
>> 620 select SYS_HAS_EARLY_PRINTK
>> 621 select CLKDEV_LOOKUP
>> 622 select ARCH_HAS_RESET_CONTROLLER
>> 623 select RESET_CONTROLLER
>> 624
>> 625 config SGI_IP22
>> 626 bool "SGI IP22 (Indy/Indigo2)"
>> 627 select FW_ARC
>> 628 select FW_ARC32
>> 629 select BOOT_ELF32
>> 630 select CEVT_R4K
>> 631 select CSRC_R4K
>> 632 select DEFAULT_SGI_PARTITION
>> 633 select DMA_NONCOHERENT
>> 634 select HW_HAS_EISA
>> 635 select I8253
>> 636 select I8259
>> 637 select IP22_CPU_SCACHE
>> 638 select IRQ_MIPS_CPU
>> 639 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 640 select SGI_HAS_I8042
>> 641 select SGI_HAS_INDYDOG
>> 642 select SGI_HAS_HAL2
>> 643 select SGI_HAS_SEEQ
>> 644 select SGI_HAS_WD93
>> 645 select SGI_HAS_ZILOG
>> 646 select SWAP_IO_SPACE
>> 647 select SYS_HAS_CPU_R4X00
>> 648 select SYS_HAS_CPU_R5000
>> 649 #
>> 650 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 651 # memory during early boot on some machines.
>> 652 #
>> 653 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 654 # for a more details discussion
>> 655 #
>> 656 # select SYS_HAS_EARLY_PRINTK
>> 657 select SYS_SUPPORTS_32BIT_KERNEL
>> 658 select SYS_SUPPORTS_64BIT_KERNEL
>> 659 select SYS_SUPPORTS_BIG_ENDIAN
>> 660 select MIPS_L1_CACHE_SHIFT_7
>> 661 help
>> 662 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 663 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 664 that runs on these, say Y here.
>> 665
>> 666 config SGI_IP27
>> 667 bool "SGI IP27 (Origin200/2000)"
>> 668 select FW_ARC
>> 669 select FW_ARC64
>> 670 select BOOT_ELF64
>> 671 select DEFAULT_SGI_PARTITION
>> 672 select DMA_COHERENT
>> 673 select SYS_HAS_EARLY_PRINTK
>> 674 select HW_HAS_PCI
>> 675 select NR_CPUS_DEFAULT_64
>> 676 select SYS_HAS_CPU_R10000
>> 677 select SYS_SUPPORTS_64BIT_KERNEL
>> 678 select SYS_SUPPORTS_BIG_ENDIAN
>> 679 select SYS_SUPPORTS_NUMA
>> 680 select SYS_SUPPORTS_SMP
>> 681 select MIPS_L1_CACHE_SHIFT_7
>> 682 help
>> 683 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 684 workstations. To compile a Linux kernel that runs on these, say Y
>> 685 here.
>> 686
>> 687 config SGI_IP28
>> 688 bool "SGI IP28 (Indigo2 R10k)"
>> 689 select FW_ARC
>> 690 select FW_ARC64
>> 691 select BOOT_ELF64
>> 692 select CEVT_R4K
>> 693 select CSRC_R4K
>> 694 select DEFAULT_SGI_PARTITION
>> 695 select DMA_NONCOHERENT
>> 696 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 697 select IRQ_MIPS_CPU
>> 698 select HW_HAS_EISA
>> 699 select I8253
>> 700 select I8259
>> 701 select SGI_HAS_I8042
>> 702 select SGI_HAS_INDYDOG
>> 703 select SGI_HAS_HAL2
>> 704 select SGI_HAS_SEEQ
>> 705 select SGI_HAS_WD93
>> 706 select SGI_HAS_ZILOG
>> 707 select SWAP_IO_SPACE
>> 708 select SYS_HAS_CPU_R10000
>> 709 #
>> 710 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 711 # memory during early boot on some machines.
>> 712 #
>> 713 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 714 # for a more details discussion
>> 715 #
>> 716 # select SYS_HAS_EARLY_PRINTK
>> 717 select SYS_SUPPORTS_64BIT_KERNEL
>> 718 select SYS_SUPPORTS_BIG_ENDIAN
>> 719 select MIPS_L1_CACHE_SHIFT_7
>> 720 help
>> 721 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 722 kernel that runs on these, say Y here.
>> 723
>> 724 config SGI_IP32
>> 725 bool "SGI IP32 (O2)"
>> 726 select FW_ARC
>> 727 select FW_ARC32
>> 728 select BOOT_ELF32
>> 729 select CEVT_R4K
>> 730 select CSRC_R4K
>> 731 select DMA_NONCOHERENT
>> 732 select HW_HAS_PCI
>> 733 select IRQ_MIPS_CPU
>> 734 select R5000_CPU_SCACHE
>> 735 select RM7000_CPU_SCACHE
>> 736 select SYS_HAS_CPU_R5000
>> 737 select SYS_HAS_CPU_R10000 if BROKEN
>> 738 select SYS_HAS_CPU_RM7000
>> 739 select SYS_HAS_CPU_NEVADA
>> 740 select SYS_SUPPORTS_64BIT_KERNEL
>> 741 select SYS_SUPPORTS_BIG_ENDIAN
>> 742 help
>> 743 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 744
>> 745 config SIBYTE_CRHINE
>> 746 bool "Sibyte BCM91120C-CRhine"
>> 747 select BOOT_ELF32
>> 748 select DMA_COHERENT
>> 749 select SIBYTE_BCM1120
>> 750 select SWAP_IO_SPACE
>> 751 select SYS_HAS_CPU_SB1
>> 752 select SYS_SUPPORTS_BIG_ENDIAN
>> 753 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 754
>> 755 config SIBYTE_CARMEL
>> 756 bool "Sibyte BCM91120x-Carmel"
>> 757 select BOOT_ELF32
>> 758 select DMA_COHERENT
>> 759 select SIBYTE_BCM1120
>> 760 select SWAP_IO_SPACE
>> 761 select SYS_HAS_CPU_SB1
>> 762 select SYS_SUPPORTS_BIG_ENDIAN
>> 763 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 764
>> 765 config SIBYTE_CRHONE
>> 766 bool "Sibyte BCM91125C-CRhone"
>> 767 select BOOT_ELF32
>> 768 select DMA_COHERENT
>> 769 select SIBYTE_BCM1125
>> 770 select SWAP_IO_SPACE
>> 771 select SYS_HAS_CPU_SB1
>> 772 select SYS_SUPPORTS_BIG_ENDIAN
>> 773 select SYS_SUPPORTS_HIGHMEM
>> 774 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 775
>> 776 config SIBYTE_RHONE
>> 777 bool "Sibyte BCM91125E-Rhone"
>> 778 select BOOT_ELF32
>> 779 select DMA_COHERENT
>> 780 select SIBYTE_BCM1125H
>> 781 select SWAP_IO_SPACE
>> 782 select SYS_HAS_CPU_SB1
>> 783 select SYS_SUPPORTS_BIG_ENDIAN
>> 784 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 785
>> 786 config SIBYTE_SWARM
>> 787 bool "Sibyte BCM91250A-SWARM"
>> 788 select BOOT_ELF32
>> 789 select DMA_COHERENT
>> 790 select HAVE_PATA_PLATFORM
>> 791 select SIBYTE_SB1250
>> 792 select SWAP_IO_SPACE
>> 793 select SYS_HAS_CPU_SB1
>> 794 select SYS_SUPPORTS_BIG_ENDIAN
>> 795 select SYS_SUPPORTS_HIGHMEM
>> 796 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 797 select ZONE_DMA32 if 64BIT
>> 798
>> 799 config SIBYTE_LITTLESUR
>> 800 bool "Sibyte BCM91250C2-LittleSur"
>> 801 select BOOT_ELF32
>> 802 select DMA_COHERENT
>> 803 select HAVE_PATA_PLATFORM
>> 804 select SIBYTE_SB1250
>> 805 select SWAP_IO_SPACE
>> 806 select SYS_HAS_CPU_SB1
>> 807 select SYS_SUPPORTS_BIG_ENDIAN
>> 808 select SYS_SUPPORTS_HIGHMEM
>> 809 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 810
>> 811 config SIBYTE_SENTOSA
>> 812 bool "Sibyte BCM91250E-Sentosa"
>> 813 select BOOT_ELF32
>> 814 select DMA_COHERENT
>> 815 select SIBYTE_SB1250
>> 816 select SWAP_IO_SPACE
>> 817 select SYS_HAS_CPU_SB1
>> 818 select SYS_SUPPORTS_BIG_ENDIAN
>> 819 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 820
>> 821 config SIBYTE_BIGSUR
>> 822 bool "Sibyte BCM91480B-BigSur"
>> 823 select BOOT_ELF32
>> 824 select DMA_COHERENT
>> 825 select NR_CPUS_DEFAULT_4
>> 826 select SIBYTE_BCM1x80
>> 827 select SWAP_IO_SPACE
>> 828 select SYS_HAS_CPU_SB1
>> 829 select SYS_SUPPORTS_BIG_ENDIAN
>> 830 select SYS_SUPPORTS_HIGHMEM
>> 831 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 832 select ZONE_DMA32 if 64BIT
>> 833
>> 834 config SNI_RM
>> 835 bool "SNI RM200/300/400"
>> 836 select FW_ARC if CPU_LITTLE_ENDIAN
>> 837 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 838 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 839 select ARCH_MAY_HAVE_PC_FDC
>> 840 select BOOT_ELF32
>> 841 select CEVT_R4K
>> 842 select CSRC_R4K
>> 843 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 844 select DMA_NONCOHERENT
>> 845 select GENERIC_ISA_DMA
>> 846 select HAVE_PCSPKR_PLATFORM
>> 847 select HW_HAS_EISA
>> 848 select HW_HAS_PCI
>> 849 select IRQ_MIPS_CPU
>> 850 select I8253
>> 851 select I8259
>> 852 select ISA
>> 853 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 854 select SYS_HAS_CPU_R4X00
>> 855 select SYS_HAS_CPU_R5000
>> 856 select SYS_HAS_CPU_R10000
>> 857 select R5000_CPU_SCACHE
>> 858 select SYS_HAS_EARLY_PRINTK
>> 859 select SYS_SUPPORTS_32BIT_KERNEL
>> 860 select SYS_SUPPORTS_64BIT_KERNEL
>> 861 select SYS_SUPPORTS_BIG_ENDIAN
>> 862 select SYS_SUPPORTS_HIGHMEM
>> 863 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 864 help
>> 865 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 866 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 867 Technology and now in turn merged with Fujitsu. Say Y here to
>> 868 support this machine type.
>> 869
>> 870 config MACH_TX39XX
>> 871 bool "Toshiba TX39 series based machines"
>> 872
>> 873 config MACH_TX49XX
>> 874 bool "Toshiba TX49 series based machines"
>> 875
>> 876 config MIKROTIK_RB532
>> 877 bool "Mikrotik RB532 boards"
>> 878 select CEVT_R4K
>> 879 select CSRC_R4K
>> 880 select DMA_NONCOHERENT
>> 881 select HW_HAS_PCI
>> 882 select IRQ_MIPS_CPU
>> 883 select SYS_HAS_CPU_MIPS32_R1
>> 884 select SYS_SUPPORTS_32BIT_KERNEL
>> 885 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 886 select SWAP_IO_SPACE
>> 887 select BOOT_RAW
>> 888 select GPIOLIB
>> 889 select MIPS_L1_CACHE_SHIFT_4
>> 890 help
>> 891 Support the Mikrotik(tm) RouterBoard 532 series,
>> 892 based on the IDT RC32434 SoC.
348 893
349 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 894 config CAVIUM_OCTEON_SOC
350 default 8 !! 895 bool "Cavium Networks Octeon SoC based boards"
>> 896 select CEVT_R4K
>> 897 select ARCH_PHYS_ADDR_T_64BIT
>> 898 select DMA_COHERENT
>> 899 select SYS_SUPPORTS_64BIT_KERNEL
>> 900 select SYS_SUPPORTS_BIG_ENDIAN
>> 901 select EDAC_SUPPORT
>> 902 select EDAC_ATOMIC_SCRUB
>> 903 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 904 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 905 select SYS_HAS_EARLY_PRINTK
>> 906 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 907 select HW_HAS_PCI
>> 908 select ZONE_DMA32
>> 909 select HOLES_IN_ZONE
>> 910 select GPIOLIB
>> 911 select LIBFDT
>> 912 select USE_OF
>> 913 select ARCH_SPARSEMEM_ENABLE
>> 914 select SYS_SUPPORTS_SMP
>> 915 select NR_CPUS_DEFAULT_16
>> 916 select BUILTIN_DTB
>> 917 select MTD_COMPLEX_MAPPINGS
>> 918 select SYS_SUPPORTS_RELOCATABLE
>> 919 help
>> 920 This option supports all of the Octeon reference boards from Cavium
>> 921 Networks. It builds a kernel that dynamically determines the Octeon
>> 922 CPU type and supports all known board reference implementations.
>> 923 Some of the supported boards are:
>> 924 EBT3000
>> 925 EBH3000
>> 926 EBH3100
>> 927 Thunder
>> 928 Kodama
>> 929 Hikari
>> 930 Say Y here for most Octeon reference boards.
>> 931
>> 932 config NLM_XLR_BOARD
>> 933 bool "Netlogic XLR/XLS based systems"
>> 934 select BOOT_ELF32
>> 935 select NLM_COMMON
>> 936 select SYS_HAS_CPU_XLR
>> 937 select SYS_SUPPORTS_SMP
>> 938 select HW_HAS_PCI
>> 939 select SWAP_IO_SPACE
>> 940 select SYS_SUPPORTS_32BIT_KERNEL
>> 941 select SYS_SUPPORTS_64BIT_KERNEL
>> 942 select ARCH_PHYS_ADDR_T_64BIT
>> 943 select SYS_SUPPORTS_BIG_ENDIAN
>> 944 select SYS_SUPPORTS_HIGHMEM
>> 945 select DMA_COHERENT
>> 946 select NR_CPUS_DEFAULT_32
>> 947 select CEVT_R4K
>> 948 select CSRC_R4K
>> 949 select IRQ_MIPS_CPU
>> 950 select ZONE_DMA32 if 64BIT
>> 951 select SYNC_R4K
>> 952 select SYS_HAS_EARLY_PRINTK
>> 953 select SYS_SUPPORTS_ZBOOT
>> 954 select SYS_SUPPORTS_ZBOOT_UART16550
>> 955 help
>> 956 Support for systems based on Netlogic XLR and XLS processors.
>> 957 Say Y here if you have a XLR or XLS based board.
>> 958
>> 959 config NLM_XLP_BOARD
>> 960 bool "Netlogic XLP based systems"
>> 961 select BOOT_ELF32
>> 962 select NLM_COMMON
>> 963 select SYS_HAS_CPU_XLP
>> 964 select SYS_SUPPORTS_SMP
>> 965 select HW_HAS_PCI
>> 966 select SYS_SUPPORTS_32BIT_KERNEL
>> 967 select SYS_SUPPORTS_64BIT_KERNEL
>> 968 select ARCH_PHYS_ADDR_T_64BIT
>> 969 select GPIOLIB
>> 970 select SYS_SUPPORTS_BIG_ENDIAN
>> 971 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 972 select SYS_SUPPORTS_HIGHMEM
>> 973 select DMA_COHERENT
>> 974 select NR_CPUS_DEFAULT_32
>> 975 select CEVT_R4K
>> 976 select CSRC_R4K
>> 977 select IRQ_MIPS_CPU
>> 978 select ZONE_DMA32 if 64BIT
>> 979 select SYNC_R4K
>> 980 select SYS_HAS_EARLY_PRINTK
>> 981 select USE_OF
>> 982 select SYS_SUPPORTS_ZBOOT
>> 983 select SYS_SUPPORTS_ZBOOT_UART16550
>> 984 help
>> 985 This board is based on Netlogic XLP Processor.
>> 986 Say Y here if you have a XLP based board.
>> 987
>> 988 config MIPS_PARAVIRT
>> 989 bool "Para-Virtualized guest system"
>> 990 select CEVT_R4K
>> 991 select CSRC_R4K
>> 992 select DMA_COHERENT
>> 993 select SYS_SUPPORTS_64BIT_KERNEL
>> 994 select SYS_SUPPORTS_32BIT_KERNEL
>> 995 select SYS_SUPPORTS_BIG_ENDIAN
>> 996 select SYS_SUPPORTS_SMP
>> 997 select NR_CPUS_DEFAULT_4
>> 998 select SYS_HAS_EARLY_PRINTK
>> 999 select SYS_HAS_CPU_MIPS32_R2
>> 1000 select SYS_HAS_CPU_MIPS64_R2
>> 1001 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1002 select HW_HAS_PCI
>> 1003 select SWAP_IO_SPACE
>> 1004 help
>> 1005 This option supports guest running under ????
351 1006
352 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 1007 endchoice
353 default 16 !! 1008
>> 1009 source "arch/mips/alchemy/Kconfig"
>> 1010 source "arch/mips/ath25/Kconfig"
>> 1011 source "arch/mips/ath79/Kconfig"
>> 1012 source "arch/mips/bcm47xx/Kconfig"
>> 1013 source "arch/mips/bcm63xx/Kconfig"
>> 1014 source "arch/mips/bmips/Kconfig"
>> 1015 source "arch/mips/generic/Kconfig"
>> 1016 source "arch/mips/jazz/Kconfig"
>> 1017 source "arch/mips/jz4740/Kconfig"
>> 1018 source "arch/mips/lantiq/Kconfig"
>> 1019 source "arch/mips/lasat/Kconfig"
>> 1020 source "arch/mips/pic32/Kconfig"
>> 1021 source "arch/mips/pistachio/Kconfig"
>> 1022 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1023 source "arch/mips/ralink/Kconfig"
>> 1024 source "arch/mips/sgi-ip27/Kconfig"
>> 1025 source "arch/mips/sibyte/Kconfig"
>> 1026 source "arch/mips/txx9/Kconfig"
>> 1027 source "arch/mips/vr41xx/Kconfig"
>> 1028 source "arch/mips/cavium-octeon/Kconfig"
>> 1029 source "arch/mips/loongson32/Kconfig"
>> 1030 source "arch/mips/loongson64/Kconfig"
>> 1031 source "arch/mips/netlogic/Kconfig"
>> 1032 source "arch/mips/paravirt/Kconfig"
>> 1033 source "arch/mips/xilfpga/Kconfig"
354 1034
355 config SBUS !! 1035 endmenu
>> 1036
>> 1037 config RWSEM_GENERIC_SPINLOCK
356 bool 1038 bool
>> 1039 default y
357 1040
358 config GENERIC_ISA_DMA !! 1041 config RWSEM_XCHGADD_ALGORITHM
359 def_bool y !! 1042 bool
360 depends on ISA_DMA_API <<
361 1043
362 config GENERIC_CSUM !! 1044 config GENERIC_HWEIGHT
363 bool 1045 bool
364 default y if KMSAN || KASAN !! 1046 default y
365 1047
366 config GENERIC_BUG !! 1048 config GENERIC_CALIBRATE_DELAY
367 def_bool y !! 1049 bool
368 depends on BUG !! 1050 default y
369 select GENERIC_BUG_RELATIVE_POINTERS i !! 1051
>> 1052 config SCHED_OMIT_FRAME_POINTER
>> 1053 bool
>> 1054 default y
370 1055
371 config GENERIC_BUG_RELATIVE_POINTERS !! 1056 #
>> 1057 # Select some configuration options automatically based on user selections.
>> 1058 #
>> 1059 config FW_ARC
372 bool 1060 bool
373 1061
374 config ARCH_MAY_HAVE_PC_FDC 1062 config ARCH_MAY_HAVE_PC_FDC
375 def_bool y !! 1063 bool
376 depends on ISA_DMA_API <<
377 1064
378 config GENERIC_CALIBRATE_DELAY !! 1065 config BOOT_RAW
379 def_bool y !! 1066 bool
380 1067
381 config ARCH_HAS_CPU_RELAX !! 1068 config CEVT_BCM1480
382 def_bool y !! 1069 bool
383 1070
384 config ARCH_HIBERNATION_POSSIBLE !! 1071 config CEVT_DS1287
385 def_bool y !! 1072 bool
386 1073
387 config ARCH_SUSPEND_POSSIBLE !! 1074 config CEVT_GT641XX
388 def_bool y !! 1075 bool
389 1076
390 config AUDIT_ARCH !! 1077 config CEVT_R4K
391 def_bool y if X86_64 !! 1078 bool
392 1079
393 config KASAN_SHADOW_OFFSET !! 1080 config CEVT_SB1250
394 hex !! 1081 bool
395 depends on KASAN <<
396 default 0xdffffc0000000000 <<
397 1082
398 config HAVE_INTEL_TXT !! 1083 config CEVT_TXX9
399 def_bool y !! 1084 bool
400 depends on INTEL_IOMMU && ACPI <<
401 1085
402 config X86_64_SMP !! 1086 config CSRC_BCM1480
403 def_bool y !! 1087 bool
404 depends on X86_64 && SMP <<
405 1088
406 config ARCH_SUPPORTS_UPROBES !! 1089 config CSRC_IOASIC
407 def_bool y !! 1090 bool
408 1091
409 config FIX_EARLYCON_MEM !! 1092 config CSRC_R4K
410 def_bool y !! 1093 bool
411 1094
412 config DYNAMIC_PHYSICAL_MASK !! 1095 config CSRC_SB1250
413 bool 1096 bool
414 1097
415 config PGTABLE_LEVELS !! 1098 config MIPS_CLOCK_VSYSCALL
416 int !! 1099 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
417 default 5 if X86_5LEVEL <<
418 default 4 if X86_64 <<
419 default 3 if X86_PAE <<
420 default 2 <<
421 1100
422 config CC_HAS_SANE_STACKPROTECTOR !! 1101 config GPIO_TXX9
>> 1102 select GPIOLIB
423 bool 1103 bool
424 default $(success,$(srctree)/scripts/g <<
425 default $(success,$(srctree)/scripts/g <<
426 help <<
427 We have to make sure stack protector <<
428 the compiler produces broken code or <<
429 the segment on 32-bit kernels. <<
430 1104
431 menu "Processor type and features" !! 1105 config FW_CFE
>> 1106 bool
432 1107
433 config SMP !! 1108 config ARCH_DMA_ADDR_T_64BIT
434 bool "Symmetric multi-processing suppo !! 1109 def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
435 help <<
436 This enables support for systems wit <<
437 a system with only one CPU, say N. I <<
438 than one CPU, say Y. <<
439 1110
440 If you say N here, the kernel will r !! 1111 config ARCH_SUPPORTS_UPROBES
441 machines, but will use only one CPU !! 1112 bool
442 you say Y here, the kernel will run <<
443 uniprocessor machines. On a uniproce <<
444 will run faster if you say N here. <<
445 1113
446 Note that if you say Y here and choo !! 1114 config DMA_MAYBE_COHERENT
447 "Pentium" under "Processor family", !! 1115 select DMA_NONCOHERENT
448 architectures. Similarly, multiproce !! 1116 bool
449 architecture may not work on all Pen <<
450 1117
451 People using multiprocessor machines !! 1118 config DMA_PERDEV_COHERENT
452 Y to "Enhanced Real Time Clock Suppo !! 1119 bool
453 Management" code will be disabled if !! 1120 select DMA_MAYBE_COHERENT
454 1121
455 See also <file:Documentation/arch/x8 !! 1122 config DMA_COHERENT
456 <file:Documentation/admin-guide/lock !! 1123 bool
457 <http://www.tldp.org/docs.html#howto <<
458 1124
459 If you don't know what to do here, s !! 1125 config DMA_NONCOHERENT
>> 1126 bool
>> 1127 select NEED_DMA_MAP_STATE
460 1128
461 config X86_X2APIC !! 1129 config NEED_DMA_MAP_STATE
462 bool "Support x2apic" !! 1130 bool
463 depends on X86_LOCAL_APIC && X86_64 && <<
464 help <<
465 This enables x2apic support on CPUs <<
466 <<
467 This allows 32-bit apic IDs (so it c <<
468 and accesses the local apic via MSRs <<
469 <<
470 Some Intel systems circa 2022 and la <<
471 and can not fall back to the legacy <<
472 enabled in the BIOS. They will boot <<
473 without enabling this option. <<
474 1131
475 If you don't know what to do here, s !! 1132 config SYS_HAS_EARLY_PRINTK
>> 1133 bool
476 1134
477 config X86_POSTED_MSI !! 1135 config SYS_SUPPORTS_HOTPLUG_CPU
478 bool "Enable MSI and MSI-x delivery by !! 1136 bool
479 depends on X86_64 && IRQ_REMAP <<
480 help <<
481 This enables MSIs that are under int <<
482 posted interrupts to the host kernel <<
483 potentially be improved by coalescin <<
484 frequency bursts. <<
485 1137
486 If you don't know what to do here, s !! 1138 config MIPS_BONITO64
>> 1139 bool
487 1140
488 config X86_MPPARSE !! 1141 config MIPS_MSC
489 bool "Enable MPS table" if ACPI !! 1142 bool
490 default y <<
491 depends on X86_LOCAL_APIC <<
492 help <<
493 For old smp systems that do not have <<
494 (esp with 64bit cpus) with acpi supp <<
495 1143
496 config X86_CPU_RESCTRL !! 1144 config MIPS_NILE4
497 bool "x86 CPU resource control support !! 1145 bool
498 depends on X86 && (CPU_SUP_INTEL || CP <<
499 select KERNFS <<
500 select PROC_CPU_RESCTRL if PRO <<
501 help <<
502 Enable x86 CPU resource control supp <<
503 1146
504 Provide support for the allocation a !! 1147 config SYNC_R4K
505 usage by the CPU. !! 1148 bool
506 1149
507 Intel calls this Intel Resource Dire !! 1150 config MIPS_MACHINE
508 (Intel(R) RDT). More information abo !! 1151 def_bool n
509 Intel x86 Architecture Software Deve <<
510 1152
511 AMD calls this AMD Platform Quality !! 1153 config NO_IOPORT_MAP
512 More information about AMD QoS can b !! 1154 def_bool n
513 Platform Quality of Service Extensio <<
514 1155
515 Say N if unsure. !! 1156 config GENERIC_CSUM
>> 1157 bool
516 1158
517 config X86_FRED !! 1159 config GENERIC_ISA_DMA
518 bool "Flexible Return and Event Delive !! 1160 bool
519 depends on X86_64 !! 1161 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
520 help !! 1162 select ISA_DMA_API
521 When enabled, try to use Flexible Re <<
522 instead of the legacy SYSCALL/SYSENT <<
523 ring transitions and exception/inter <<
524 system supports it. <<
525 1163
526 config X86_BIGSMP !! 1164 config GENERIC_ISA_DMA_SUPPORT_BROKEN
527 bool "Support for big SMP systems with !! 1165 bool
528 depends on SMP && X86_32 !! 1166 select GENERIC_ISA_DMA
>> 1167
>> 1168 config ISA_DMA_API
>> 1169 bool
>> 1170
>> 1171 config HOLES_IN_ZONE
>> 1172 bool
>> 1173
>> 1174 config SYS_SUPPORTS_RELOCATABLE
>> 1175 bool
529 help 1176 help
530 This option is needed for the system !! 1177 Selected if the platform supports relocating the kernel.
>> 1178 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1179 to allow access to command line and entropy sources.
531 1180
532 config X86_EXTENDED_PLATFORM !! 1181 #
533 bool "Support for extended (non-PC) x8 !! 1182 # Endianness selection. Sufficiently obscure so many users don't know what to
534 default y !! 1183 # answer,so we try hard to limit the available choices. Also the use of a
>> 1184 # choice statement should be more obvious to the user.
>> 1185 #
>> 1186 choice
>> 1187 prompt "Endianness selection"
535 help 1188 help
536 If you disable this option then the !! 1189 Some MIPS machines can be configured for either little or big endian
537 standard PC platforms. (which covers !! 1190 byte order. These modes require different kernels and a different
538 systems out there.) !! 1191 Linux distribution. In general there is one preferred byteorder for a
>> 1192 particular system but some systems are just as commonly used in the
>> 1193 one or the other endianness.
>> 1194
>> 1195 config CPU_BIG_ENDIAN
>> 1196 bool "Big endian"
>> 1197 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1198
>> 1199 config CPU_LITTLE_ENDIAN
>> 1200 bool "Little endian"
>> 1201 depends on SYS_SUPPORTS_LITTLE_ENDIAN
539 1202
540 If you enable this option then you'l !! 1203 endchoice
541 for the following non-PC x86 platfor <<
542 CONFIG_64BIT. <<
543 1204
544 32-bit platforms (CONFIG_64BIT=n): !! 1205 config EXPORT_UASM
545 Goldfish (Android emulator) !! 1206 bool
546 AMD Elan <<
547 RDC R-321x SoC <<
548 SGI 320/540 (Visual Workstatio <<
549 STA2X11-based (e.g. Northville <<
550 Moorestown MID devices <<
551 1207
552 64-bit platforms (CONFIG_64BIT=y): !! 1208 config SYS_SUPPORTS_APM_EMULATION
553 Numascale NumaChip !! 1209 bool
554 ScaleMP vSMP <<
555 SGI Ultraviolet <<
556 1210
557 If you have one of these systems, or !! 1211 config SYS_SUPPORTS_BIG_ENDIAN
558 generic distribution kernel, say Y h !! 1212 bool
559 1213
560 # This is an alphabetically sorted list of 64 !! 1214 config SYS_SUPPORTS_LITTLE_ENDIAN
561 # Please maintain the alphabetic order if and !! 1215 bool
562 config X86_NUMACHIP <<
563 bool "Numascale NumaChip" <<
564 depends on X86_64 <<
565 depends on X86_EXTENDED_PLATFORM <<
566 depends on NUMA <<
567 depends on SMP <<
568 depends on X86_X2APIC <<
569 depends on PCI_MMCONFIG <<
570 help <<
571 Adds support for Numascale NumaChip <<
572 enable more than ~168 cores. <<
573 If you don't have one of these, you <<
574 <<
575 config X86_VSMP <<
576 bool "ScaleMP vSMP" <<
577 select HYPERVISOR_GUEST <<
578 select PARAVIRT <<
579 depends on X86_64 && PCI <<
580 depends on X86_EXTENDED_PLATFORM <<
581 depends on SMP <<
582 help <<
583 Support for ScaleMP vSMP systems. S <<
584 supposed to run on these EM64T-based <<
585 if you have one of these machines. <<
586 <<
587 config X86_UV <<
588 bool "SGI Ultraviolet" <<
589 depends on X86_64 <<
590 depends on X86_EXTENDED_PLATFORM <<
591 depends on NUMA <<
592 depends on EFI <<
593 depends on KEXEC_CORE <<
594 depends on X86_X2APIC <<
595 depends on PCI <<
596 help <<
597 This option is needed in order to su <<
598 If you don't have one of these, you <<
599 1216
600 # Following is an alphabetically sorted list o !! 1217 config SYS_SUPPORTS_HUGETLBFS
601 # Please maintain the alphabetic order if and !! 1218 bool
>> 1219 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
>> 1220 default y
602 1221
603 config X86_GOLDFISH !! 1222 config MIPS_HUGE_TLB_SUPPORT
604 bool "Goldfish (Virtual Platform)" !! 1223 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
605 depends on X86_EXTENDED_PLATFORM <<
606 help <<
607 Enable support for the Goldfish virt <<
608 for Android development. Unless you <<
609 Goldfish emulator say N here. <<
610 1224
611 config X86_INTEL_CE !! 1225 config IRQ_CPU_RM7K
612 bool "CE4100 TV platform" !! 1226 bool
613 depends on PCI <<
614 depends on PCI_GODIRECT <<
615 depends on X86_IO_APIC <<
616 depends on X86_32 <<
617 depends on X86_EXTENDED_PLATFORM <<
618 select X86_REBOOTFIXUPS <<
619 select OF <<
620 select OF_EARLY_FLATTREE <<
621 help <<
622 Select for the Intel CE media proces <<
623 This option compiles in support for <<
624 boxes and media devices. <<
625 <<
626 config X86_INTEL_MID <<
627 bool "Intel MID platform support" <<
628 depends on X86_EXTENDED_PLATFORM <<
629 depends on X86_PLATFORM_DEVICES <<
630 depends on PCI <<
631 depends on X86_64 || (PCI_GOANY && X86 <<
632 depends on X86_IO_APIC <<
633 select I2C <<
634 select DW_APB_TIMER <<
635 select INTEL_SCU_PCI <<
636 help <<
637 Select to build a kernel capable of <<
638 Internet Device) platform systems wh <<
639 interfaces. If you are building for <<
640 <<
641 Intel MID platforms are based on an <<
642 consume less power than most of the <<
643 <<
644 config X86_INTEL_QUARK <<
645 bool "Intel Quark platform support" <<
646 depends on X86_32 <<
647 depends on X86_EXTENDED_PLATFORM <<
648 depends on X86_PLATFORM_DEVICES <<
649 depends on X86_TSC <<
650 depends on PCI <<
651 depends on PCI_GOANY <<
652 depends on X86_IO_APIC <<
653 select IOSF_MBI <<
654 select INTEL_IMR <<
655 select COMMON_CLK <<
656 help <<
657 Select to include support for Quark <<
658 Say Y here if you have a Quark based <<
659 compatible Intel Galileo. <<
660 <<
661 config X86_INTEL_LPSS <<
662 bool "Intel Low Power Subsystem Suppor <<
663 depends on X86 && ACPI && PCI <<
664 select COMMON_CLK <<
665 select PINCTRL <<
666 select IOSF_MBI <<
667 help <<
668 Select to build support for Intel Lo <<
669 found on Intel Lynxpoint PCH. Select <<
670 things like clock tree (common clock <<
671 which are needed by the LPSS periphe <<
672 <<
673 config X86_AMD_PLATFORM_DEVICE <<
674 bool "AMD ACPI2Platform devices suppor <<
675 depends on ACPI <<
676 select COMMON_CLK <<
677 select PINCTRL <<
678 help <<
679 Select to interpret AMD specific ACP <<
680 such as I2C, UART, GPIO found on AMD <<
681 I2C and UART depend on COMMON_CLK to <<
682 implemented under PINCTRL subsystem. <<
683 1227
684 config IOSF_MBI !! 1228 config IRQ_MSP_SLP
685 tristate "Intel SoC IOSF Sideband supp !! 1229 bool
686 depends on PCI <<
687 help <<
688 This option enables sideband registe <<
689 platforms. On these platforms the IO <<
690 MSR's for some register accesses, mo <<
691 and power. Drivers may query the ava <<
692 determine if they need the sideband <<
693 platforms. The sideband is available <<
694 This list is not meant to be exclusi <<
695 - BayTrail <<
696 - Braswell <<
697 - Quark <<
698 <<
699 You should say Y if you are running <<
700 <<
701 config IOSF_MBI_DEBUG <<
702 bool "Enable IOSF sideband access thro <<
703 depends on IOSF_MBI && DEBUG_FS <<
704 help <<
705 Select this option to expose the IOS <<
706 MDR, MCRX) through debugfs to write <<
707 different units on the SoC. This is <<
708 state information for debug and anal <<
709 mechanism, users of this option woul <<
710 device they want to access. <<
711 <<
712 If you don't require the option or a <<
713 <<
714 config X86_RDC321X <<
715 bool "RDC R-321x SoC" <<
716 depends on X86_32 <<
717 depends on X86_EXTENDED_PLATFORM <<
718 select M486 <<
719 select X86_REBOOTFIXUPS <<
720 help <<
721 This option is needed for RDC R-321x <<
722 as R-8610-(G). <<
723 If you don't have one of these chips <<
724 <<
725 config X86_32_NON_STANDARD <<
726 bool "Support non-standard 32-bit SMP <<
727 depends on X86_32 && SMP <<
728 depends on X86_EXTENDED_PLATFORM <<
729 help <<
730 This option compiles in the bigsmp a <<
731 subarchitectures. It is intended fo <<
732 kernel. If you select them all, kern <<
733 one and will fallback to default. <<
734 1230
735 # Alphabetically sorted list of Non standard 3 !! 1231 config IRQ_MSP_CIC
>> 1232 bool
736 1233
737 config X86_SUPPORTS_MEMORY_FAILURE !! 1234 config IRQ_TXX9
738 def_bool y !! 1235 bool
739 # MCE code calls memory_failure(): <<
740 depends on X86_MCE <<
741 # On 32-bit this adds too big of NODES <<
742 # On 32-bit SPARSEMEM adds too big of <<
743 depends on X86_64 || !SPARSEMEM <<
744 select ARCH_SUPPORTS_MEMORY_FAILURE <<
745 <<
746 config STA2X11 <<
747 bool "STA2X11 Companion Chip Support" <<
748 depends on X86_32_NON_STANDARD && PCI <<
749 select SWIOTLB <<
750 select MFD_STA2X11 <<
751 select GPIOLIB <<
752 help <<
753 This adds support for boards based o <<
754 a.k.a. "ConneXt". The chip is used i <<
755 PC chipset, so all "standard" periph <<
756 option is selected the kernel will s <<
757 standard PC machines. <<
758 <<
759 config X86_32_IRIS <<
760 tristate "Eurobraille/Iris poweroff mo <<
761 depends on X86_32 <<
762 help <<
763 The Iris machines from EuroBraille d <<
764 to shut themselves down properly. A <<
765 needed to do so, which is what this <<
766 kernel shutdown. <<
767 1236
768 This is only for Iris machines from !! 1237 config IRQ_GT641XX
>> 1238 bool
769 1239
770 If unused, say N. !! 1240 config PCI_GT64XXX_PCI0
>> 1241 bool
771 1242
772 config SCHED_OMIT_FRAME_POINTER !! 1243 config NO_EXCEPT_FILL
773 def_bool y !! 1244 bool
774 prompt "Single-depth WCHAN output" <<
775 depends on X86 <<
776 help <<
777 Calculate simpler /proc/<PID>/wchan <<
778 is disabled then wchan values will r <<
779 caller function. This provides more <<
780 at the expense of slightly more sche <<
781 1245
782 If in doubt, say "Y". !! 1246 config SOC_EMMA2RH
>> 1247 bool
>> 1248 select CEVT_R4K
>> 1249 select CSRC_R4K
>> 1250 select DMA_NONCOHERENT
>> 1251 select IRQ_MIPS_CPU
>> 1252 select SWAP_IO_SPACE
>> 1253 select SYS_HAS_CPU_R5500
>> 1254 select SYS_SUPPORTS_32BIT_KERNEL
>> 1255 select SYS_SUPPORTS_64BIT_KERNEL
>> 1256 select SYS_SUPPORTS_BIG_ENDIAN
783 1257
784 menuconfig HYPERVISOR_GUEST !! 1258 config SOC_PNX833X
785 bool "Linux guest support" !! 1259 bool
786 help !! 1260 select CEVT_R4K
787 Say Y here to enable options for run !! 1261 select CSRC_R4K
788 visors. This option enables basic hy !! 1262 select IRQ_MIPS_CPU
789 setup. !! 1263 select DMA_NONCOHERENT
>> 1264 select SYS_HAS_CPU_MIPS32_R2
>> 1265 select SYS_SUPPORTS_32BIT_KERNEL
>> 1266 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1267 select SYS_SUPPORTS_BIG_ENDIAN
>> 1268 select SYS_SUPPORTS_MIPS16
>> 1269 select CPU_MIPSR2_IRQ_VI
790 1270
791 If you say N, all options in this su !! 1271 config SOC_PNX8335
792 disabled, and Linux guest support wo !! 1272 bool
>> 1273 select SOC_PNX833X
793 1274
794 if HYPERVISOR_GUEST !! 1275 config MIPS_SPRAM
>> 1276 bool
795 1277
796 config PARAVIRT !! 1278 config SWAP_IO_SPACE
797 bool "Enable paravirtualization code" !! 1279 bool
798 depends on HAVE_STATIC_CALL <<
799 help <<
800 This changes the kernel so it can mo <<
801 under a hypervisor, potentially impr <<
802 over full virtualization. However, <<
803 the kernel is theoretically slower a <<
804 1280
805 config PARAVIRT_XXL !! 1281 config SGI_HAS_INDYDOG
806 bool 1282 bool
807 1283
808 config PARAVIRT_DEBUG !! 1284 config SGI_HAS_HAL2
809 bool "paravirt-ops debugging" !! 1285 bool
810 depends on PARAVIRT && DEBUG_KERNEL <<
811 help <<
812 Enable to debug paravirt_ops interna <<
813 a paravirt_op is missing when it is <<
814 1286
815 config PARAVIRT_SPINLOCKS !! 1287 config SGI_HAS_SEEQ
816 bool "Paravirtualization layer for spi !! 1288 bool
817 depends on PARAVIRT && SMP <<
818 help <<
819 Paravirtualized spinlocks allow a pv <<
820 spinlock implementation with somethi <<
821 (for example, block the virtual CPU <<
822 1289
823 It has a minimal impact on native ke !! 1290 config SGI_HAS_WD93
824 benefit on paravirtualized KVM / Xen !! 1291 bool
825 1292
826 If you are unsure how to answer this !! 1293 config SGI_HAS_ZILOG
>> 1294 bool
827 1295
828 config X86_HV_CALLBACK_VECTOR !! 1296 config SGI_HAS_I8042
829 def_bool n !! 1297 bool
830 1298
831 source "arch/x86/xen/Kconfig" !! 1299 config DEFAULT_SGI_PARTITION
>> 1300 bool
832 1301
833 config KVM_GUEST !! 1302 config FW_ARC32
834 bool "KVM Guest support (including kvm !! 1303 bool
835 depends on PARAVIRT <<
836 select PARAVIRT_CLOCK <<
837 select ARCH_CPUIDLE_HALTPOLL <<
838 select X86_HV_CALLBACK_VECTOR <<
839 default y <<
840 help <<
841 This option enables various optimiza <<
842 hypervisor. It includes a paravirtua <<
843 of relying on a PIT (or probably oth <<
844 underlying device model, the host pr <<
845 timing infrastructure such as time o <<
846 1304
847 config ARCH_CPUIDLE_HALTPOLL !! 1305 config FW_SNIPROM
848 def_bool n !! 1306 bool
849 prompt "Disable host haltpoll when loa <<
850 help <<
851 If virtualized under KVM, disable ho <<
852 1307
853 config PVH !! 1308 config BOOT_ELF32
854 bool "Support for running PVH guests" !! 1309 bool
855 help !! 1310
856 This option enables the PVH entry po !! 1311 config MIPS_L1_CACHE_SHIFT_4
857 as specified in the x86/HVM direct b !! 1312 bool
858 <<
859 config PARAVIRT_TIME_ACCOUNTING <<
860 bool "Paravirtual steal time accountin <<
861 depends on PARAVIRT <<
862 help <<
863 Select this option to enable fine gr <<
864 accounting. Time spent executing oth <<
865 the current vCPU is discounted from <<
866 that, there can be a small performan <<
867 <<
868 If in doubt, say N here. <<
869 <<
870 config PARAVIRT_CLOCK <<
871 bool <<
872 <<
873 config JAILHOUSE_GUEST <<
874 bool "Jailhouse non-root cell support" <<
875 depends on X86_64 && PCI <<
876 select X86_PM_TIMER <<
877 help <<
878 This option allows to run Linux as g <<
879 cell. You can leave this option disa <<
880 Jailhouse and run Linux afterwards i <<
881 <<
882 config ACRN_GUEST <<
883 bool "ACRN Guest support" <<
884 depends on X86_64 <<
885 select X86_HV_CALLBACK_VECTOR <<
886 help <<
887 This option allows to run Linux as g <<
888 a flexible, lightweight reference op <<
889 real-time and safety-criticality in <<
890 IOT with small footprint and real-ti <<
891 found in https://projectacrn.org/. <<
892 <<
893 config INTEL_TDX_GUEST <<
894 bool "Intel TDX (Trust Domain Extensio <<
895 depends on X86_64 && CPU_SUP_INTEL <<
896 depends on X86_X2APIC <<
897 depends on EFI_STUB <<
898 select ARCH_HAS_CC_PLATFORM <<
899 select X86_MEM_ENCRYPT <<
900 select X86_MCE <<
901 select UNACCEPTED_MEMORY <<
902 help <<
903 Support running as a guest under Int <<
904 the guest kernel can not boot or run <<
905 TDX includes memory encryption and i <<
906 which protect the confidentiality an <<
907 memory contents and CPU state. TDX g <<
908 some attacks from the VMM. <<
909 <<
910 endif # HYPERVISOR_GUEST <<
911 <<
912 source "arch/x86/Kconfig.cpu" <<
913 <<
914 config HPET_TIMER <<
915 def_bool X86_64 <<
916 prompt "HPET Timer Support" if X86_32 <<
917 help <<
918 Use the IA-PC HPET (High Precision E <<
919 time in preference to the PIT and RT <<
920 present. <<
921 HPET is the next generation timer re <<
922 The HPET provides a stable time base <<
923 systems, unlike the TSC, but it is m <<
924 as it is off-chip. The interface us <<
925 in the HPET spec, revision 1. <<
926 <<
927 You can safely choose Y here. Howev <<
928 activated if the platform and the BI <<
929 Otherwise the 8254 will be used for <<
930 1313
931 Choose N to continue using the legac !! 1314 config MIPS_L1_CACHE_SHIFT_5
>> 1315 bool
932 1316
933 config HPET_EMULATE_RTC !! 1317 config MIPS_L1_CACHE_SHIFT_6
934 def_bool y !! 1318 bool
935 depends on HPET_TIMER && (RTC_DRV_CMOS <<
936 1319
937 # Mark as expert because too many people got i !! 1320 config MIPS_L1_CACHE_SHIFT_7
938 # The code disables itself when not needed. !! 1321 bool
939 config DMI <<
940 default y <<
941 select DMI_SCAN_MACHINE_NON_EFI_FALLBA <<
942 bool "Enable DMI scanning" if EXPERT <<
943 help <<
944 Enabled scanning of DMI to identify <<
945 here unless you have verified that y <<
946 affected by entries in the DMI black <<
947 BIOS code. <<
948 <<
949 config GART_IOMMU <<
950 bool "Old AMD GART IOMMU support" <<
951 select IOMMU_HELPER <<
952 select SWIOTLB <<
953 depends on X86_64 && PCI && AMD_NB <<
954 help <<
955 Provides a driver for older AMD Athl <<
956 GART based hardware IOMMUs. <<
957 <<
958 The GART supports full DMA access fo <<
959 limitations, on systems with more th <<
960 for USB, sound, many IDE/SATA chipse <<
961 <<
962 Newer systems typically have a moder <<
963 the CONFIG_AMD_IOMMU=y config option <<
964 <<
965 In normal configurations this driver <<
966 there's more than 3 GB of memory and <<
967 32-bit limited device. <<
968 1322
969 If unsure, say Y. !! 1323 config MIPS_L1_CACHE_SHIFT
>> 1324 int
>> 1325 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1326 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1327 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1328 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1329 default "5"
970 1330
971 config BOOT_VESA_SUPPORT !! 1331 config HAVE_STD_PC_SERIAL_PORT
972 bool 1332 bool
973 help <<
974 If true, at least one selected frame <<
975 of VESA video modes set at an early <<
976 1333
977 config MAXSMP !! 1334 config ARC_CONSOLE
978 bool "Enable Maximum number of SMP Pro !! 1335 bool "ARC console support"
979 depends on X86_64 && SMP && DEBUG_KERN !! 1336 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
980 select CPUMASK_OFFSTACK <<
981 help <<
982 Enable maximum number of CPUS and NU <<
983 If unsure, say N. <<
984 1337
985 # !! 1338 config ARC_MEMORY
986 # The maximum number of CPUs supported: !! 1339 bool
987 # !! 1340 depends on MACH_JAZZ || SNI_RM || SGI_IP32
988 # The main config value is NR_CPUS, which defa !! 1341 default y
989 # and which can be configured interactively in <<
990 # [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] <<
991 # <<
992 # The ranges are different on 32-bit and 64-bi <<
993 # hardware capabilities and scalability featur <<
994 # <<
995 # ( If MAXSMP is enabled we just use the highe <<
996 # interactive configuration. ) <<
997 # <<
998 1342
999 config NR_CPUS_RANGE_BEGIN !! 1343 config ARC_PROMLIB
1000 int !! 1344 bool
1001 default NR_CPUS_RANGE_END if MAXSMP !! 1345 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
1002 default 1 if !SMP !! 1346 default y
1003 default 2 <<
1004 1347
1005 config NR_CPUS_RANGE_END !! 1348 config FW_ARC64
1006 int !! 1349 bool
1007 depends on X86_32 <<
1008 default 64 if SMP && X86_BIGSMP <<
1009 default 8 if SMP && !X86_BIGSMP <<
1010 default 1 if !SMP <<
1011 1350
1012 config NR_CPUS_RANGE_END !! 1351 config BOOT_ELF64
1013 int !! 1352 bool
1014 depends on X86_64 <<
1015 default 8192 if SMP && CPUMASK_OFFST <<
1016 default 512 if SMP && !CPUMASK_OFFS <<
1017 default 1 if !SMP <<
1018 1353
1019 config NR_CPUS_DEFAULT !! 1354 menu "CPU selection"
1020 int <<
1021 depends on X86_32 <<
1022 default 32 if X86_BIGSMP <<
1023 default 8 if SMP <<
1024 default 1 if !SMP <<
1025 1355
1026 config NR_CPUS_DEFAULT !! 1356 choice
1027 int !! 1357 prompt "CPU type"
1028 depends on X86_64 !! 1358 default CPU_R4X00
1029 default 8192 if MAXSMP <<
1030 default 64 if SMP <<
1031 default 1 if !SMP <<
1032 1359
1033 config NR_CPUS !! 1360 config CPU_LOONGSON3
1034 int "Maximum number of CPUs" if SMP & !! 1361 bool "Loongson 3 CPU"
1035 range NR_CPUS_RANGE_BEGIN NR_CPUS_RAN !! 1362 depends on SYS_HAS_CPU_LOONGSON3
1036 default NR_CPUS_DEFAULT !! 1363 select CPU_SUPPORTS_64BIT_KERNEL
>> 1364 select CPU_SUPPORTS_HIGHMEM
>> 1365 select CPU_SUPPORTS_HUGEPAGES
>> 1366 select WEAK_ORDERING
>> 1367 select WEAK_REORDERING_BEYOND_LLSC
>> 1368 select MIPS_PGD_C0_CONTEXT
>> 1369 select MIPS_L1_CACHE_SHIFT_6
>> 1370 select GPIOLIB
1037 help 1371 help
1038 This allows you to specify the maxi !! 1372 The Loongson 3 processor implements the MIPS64R2 instruction
1039 kernel will support. If CPUMASK_OF !! 1373 set with many extensions.
1040 supported value is 8192, otherwise <<
1041 minimum value which makes sense is <<
1042 1374
1043 This is purely to save memory: each !! 1375 config LOONGSON3_ENHANCEMENT
1044 to the kernel image. !! 1376 bool "New Loongson 3 CPU Enhancements"
1045 !! 1377 default n
1046 config SCHED_CLUSTER !! 1378 select CPU_MIPSR2
1047 bool "Cluster scheduler support" !! 1379 select CPU_HAS_PREFETCH
1048 depends on SMP !! 1380 depends on CPU_LOONGSON3
1049 default y !! 1381 help
>> 1382 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1383 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1384 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1385 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1386 Fast TLB refill support, etc.
>> 1387
>> 1388 This option enable those enhancements which are not probed at run
>> 1389 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1390 please say 'N' here. If you want a high-performance kernel to run on
>> 1391 new Loongson 3 machines only, please say 'Y' here.
>> 1392
>> 1393 config CPU_LOONGSON2E
>> 1394 bool "Loongson 2E"
>> 1395 depends on SYS_HAS_CPU_LOONGSON2E
>> 1396 select CPU_LOONGSON2
>> 1397 help
>> 1398 The Loongson 2E processor implements the MIPS III instruction set
>> 1399 with many extensions.
>> 1400
>> 1401 It has an internal FPGA northbridge, which is compatible to
>> 1402 bonito64.
>> 1403
>> 1404 config CPU_LOONGSON2F
>> 1405 bool "Loongson 2F"
>> 1406 depends on SYS_HAS_CPU_LOONGSON2F
>> 1407 select CPU_LOONGSON2
>> 1408 select GPIOLIB
1050 help 1409 help
1051 Cluster scheduler support improves !! 1410 The Loongson 2F processor implements the MIPS III instruction set
1052 making when dealing with machines t !! 1411 with many extensions.
1053 Cluster usually means a couple of C <<
1054 by sharing mid-level caches, last-l <<
1055 busses. <<
1056 1412
1057 config SCHED_SMT !! 1413 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1058 def_bool y if SMP !! 1414 have a similar programming interface with FPGA northbridge used in
>> 1415 Loongson2E.
>> 1416
>> 1417 config CPU_LOONGSON1B
>> 1418 bool "Loongson 1B"
>> 1419 depends on SYS_HAS_CPU_LOONGSON1B
>> 1420 select CPU_LOONGSON1
>> 1421 select LEDS_GPIO_REGISTER
>> 1422 help
>> 1423 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1424 release 2 instruction set.
>> 1425
>> 1426 config CPU_LOONGSON1C
>> 1427 bool "Loongson 1C"
>> 1428 depends on SYS_HAS_CPU_LOONGSON1C
>> 1429 select CPU_LOONGSON1
>> 1430 select LEDS_GPIO_REGISTER
>> 1431 help
>> 1432 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1433 release 2 instruction set.
>> 1434
>> 1435 config CPU_MIPS32_R1
>> 1436 bool "MIPS32 Release 1"
>> 1437 depends on SYS_HAS_CPU_MIPS32_R1
>> 1438 select CPU_HAS_PREFETCH
>> 1439 select CPU_SUPPORTS_32BIT_KERNEL
>> 1440 select CPU_SUPPORTS_HIGHMEM
>> 1441 help
>> 1442 Choose this option to build a kernel for release 1 or later of the
>> 1443 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1444 MIPS processor are based on a MIPS32 processor. If you know the
>> 1445 specific type of processor in your system, choose those that one
>> 1446 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1447 Release 2 of the MIPS32 architecture is available since several
>> 1448 years so chances are you even have a MIPS32 Release 2 processor
>> 1449 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1450 performance.
1059 1451
1060 config SCHED_MC !! 1452 config CPU_MIPS32_R2
1061 def_bool y !! 1453 bool "MIPS32 Release 2"
1062 prompt "Multi-core scheduler support" !! 1454 depends on SYS_HAS_CPU_MIPS32_R2
1063 depends on SMP !! 1455 select CPU_HAS_PREFETCH
>> 1456 select CPU_SUPPORTS_32BIT_KERNEL
>> 1457 select CPU_SUPPORTS_HIGHMEM
>> 1458 select CPU_SUPPORTS_MSA
>> 1459 select HAVE_KVM
>> 1460 help
>> 1461 Choose this option to build a kernel for release 2 or later of the
>> 1462 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1463 MIPS processor are based on a MIPS32 processor. If you know the
>> 1464 specific type of processor in your system, choose those that one
>> 1465 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1466
>> 1467 config CPU_MIPS32_R6
>> 1468 bool "MIPS32 Release 6"
>> 1469 depends on SYS_HAS_CPU_MIPS32_R6
>> 1470 select CPU_HAS_PREFETCH
>> 1471 select CPU_SUPPORTS_32BIT_KERNEL
>> 1472 select CPU_SUPPORTS_HIGHMEM
>> 1473 select CPU_SUPPORTS_MSA
>> 1474 select GENERIC_CSUM
>> 1475 select HAVE_KVM
>> 1476 select MIPS_O32_FP64_SUPPORT
>> 1477 help
>> 1478 Choose this option to build a kernel for release 6 or later of the
>> 1479 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1480 family, are based on a MIPS32r6 processor. If you own an older
>> 1481 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1482
>> 1483 config CPU_MIPS64_R1
>> 1484 bool "MIPS64 Release 1"
>> 1485 depends on SYS_HAS_CPU_MIPS64_R1
>> 1486 select CPU_HAS_PREFETCH
>> 1487 select CPU_SUPPORTS_32BIT_KERNEL
>> 1488 select CPU_SUPPORTS_64BIT_KERNEL
>> 1489 select CPU_SUPPORTS_HIGHMEM
>> 1490 select CPU_SUPPORTS_HUGEPAGES
>> 1491 help
>> 1492 Choose this option to build a kernel for release 1 or later of the
>> 1493 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1494 MIPS processor are based on a MIPS64 processor. If you know the
>> 1495 specific type of processor in your system, choose those that one
>> 1496 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1497 Release 2 of the MIPS64 architecture is available since several
>> 1498 years so chances are you even have a MIPS64 Release 2 processor
>> 1499 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1500 performance.
>> 1501
>> 1502 config CPU_MIPS64_R2
>> 1503 bool "MIPS64 Release 2"
>> 1504 depends on SYS_HAS_CPU_MIPS64_R2
>> 1505 select CPU_HAS_PREFETCH
>> 1506 select CPU_SUPPORTS_32BIT_KERNEL
>> 1507 select CPU_SUPPORTS_64BIT_KERNEL
>> 1508 select CPU_SUPPORTS_HIGHMEM
>> 1509 select CPU_SUPPORTS_HUGEPAGES
>> 1510 select CPU_SUPPORTS_MSA
>> 1511 select HAVE_KVM
>> 1512 help
>> 1513 Choose this option to build a kernel for release 2 or later of the
>> 1514 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1515 MIPS processor are based on a MIPS64 processor. If you know the
>> 1516 specific type of processor in your system, choose those that one
>> 1517 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1518
>> 1519 config CPU_MIPS64_R6
>> 1520 bool "MIPS64 Release 6"
>> 1521 depends on SYS_HAS_CPU_MIPS64_R6
>> 1522 select CPU_HAS_PREFETCH
>> 1523 select CPU_SUPPORTS_32BIT_KERNEL
>> 1524 select CPU_SUPPORTS_64BIT_KERNEL
>> 1525 select CPU_SUPPORTS_HIGHMEM
>> 1526 select CPU_SUPPORTS_MSA
>> 1527 select GENERIC_CSUM
>> 1528 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1529 select HAVE_KVM
>> 1530 help
>> 1531 Choose this option to build a kernel for release 6 or later of the
>> 1532 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1533 family, are based on a MIPS64r6 processor. If you own an older
>> 1534 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1535
>> 1536 config CPU_R3000
>> 1537 bool "R3000"
>> 1538 depends on SYS_HAS_CPU_R3000
>> 1539 select CPU_HAS_WB
>> 1540 select CPU_SUPPORTS_32BIT_KERNEL
>> 1541 select CPU_SUPPORTS_HIGHMEM
>> 1542 help
>> 1543 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1544 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1545 *not* work on R4000 machines and vice versa. However, since most
>> 1546 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1547 might be a safe bet. If the resulting kernel does not work,
>> 1548 try to recompile with R3000.
>> 1549
>> 1550 config CPU_TX39XX
>> 1551 bool "R39XX"
>> 1552 depends on SYS_HAS_CPU_TX39XX
>> 1553 select CPU_SUPPORTS_32BIT_KERNEL
>> 1554
>> 1555 config CPU_VR41XX
>> 1556 bool "R41xx"
>> 1557 depends on SYS_HAS_CPU_VR41XX
>> 1558 select CPU_SUPPORTS_32BIT_KERNEL
>> 1559 select CPU_SUPPORTS_64BIT_KERNEL
>> 1560 help
>> 1561 The options selects support for the NEC VR4100 series of processors.
>> 1562 Only choose this option if you have one of these processors as a
>> 1563 kernel built with this option will not run on any other type of
>> 1564 processor or vice versa.
>> 1565
>> 1566 config CPU_R4300
>> 1567 bool "R4300"
>> 1568 depends on SYS_HAS_CPU_R4300
>> 1569 select CPU_SUPPORTS_32BIT_KERNEL
>> 1570 select CPU_SUPPORTS_64BIT_KERNEL
>> 1571 help
>> 1572 MIPS Technologies R4300-series processors.
>> 1573
>> 1574 config CPU_R4X00
>> 1575 bool "R4x00"
>> 1576 depends on SYS_HAS_CPU_R4X00
>> 1577 select CPU_SUPPORTS_32BIT_KERNEL
>> 1578 select CPU_SUPPORTS_64BIT_KERNEL
>> 1579 select CPU_SUPPORTS_HUGEPAGES
>> 1580 help
>> 1581 MIPS Technologies R4000-series processors other than 4300, including
>> 1582 the R4000, R4400, R4600, and 4700.
>> 1583
>> 1584 config CPU_TX49XX
>> 1585 bool "R49XX"
>> 1586 depends on SYS_HAS_CPU_TX49XX
>> 1587 select CPU_HAS_PREFETCH
>> 1588 select CPU_SUPPORTS_32BIT_KERNEL
>> 1589 select CPU_SUPPORTS_64BIT_KERNEL
>> 1590 select CPU_SUPPORTS_HUGEPAGES
>> 1591
>> 1592 config CPU_R5000
>> 1593 bool "R5000"
>> 1594 depends on SYS_HAS_CPU_R5000
>> 1595 select CPU_SUPPORTS_32BIT_KERNEL
>> 1596 select CPU_SUPPORTS_64BIT_KERNEL
>> 1597 select CPU_SUPPORTS_HUGEPAGES
>> 1598 help
>> 1599 MIPS Technologies R5000-series processors other than the Nevada.
>> 1600
>> 1601 config CPU_R5432
>> 1602 bool "R5432"
>> 1603 depends on SYS_HAS_CPU_R5432
>> 1604 select CPU_SUPPORTS_32BIT_KERNEL
>> 1605 select CPU_SUPPORTS_64BIT_KERNEL
>> 1606 select CPU_SUPPORTS_HUGEPAGES
>> 1607
>> 1608 config CPU_R5500
>> 1609 bool "R5500"
>> 1610 depends on SYS_HAS_CPU_R5500
>> 1611 select CPU_SUPPORTS_32BIT_KERNEL
>> 1612 select CPU_SUPPORTS_64BIT_KERNEL
>> 1613 select CPU_SUPPORTS_HUGEPAGES
>> 1614 help
>> 1615 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1616 instruction set.
>> 1617
>> 1618 config CPU_R6000
>> 1619 bool "R6000"
>> 1620 depends on SYS_HAS_CPU_R6000
>> 1621 select CPU_SUPPORTS_32BIT_KERNEL
>> 1622 help
>> 1623 MIPS Technologies R6000 and R6000A series processors. Note these
>> 1624 processors are extremely rare and the support for them is incomplete.
>> 1625
>> 1626 config CPU_NEVADA
>> 1627 bool "RM52xx"
>> 1628 depends on SYS_HAS_CPU_NEVADA
>> 1629 select CPU_SUPPORTS_32BIT_KERNEL
>> 1630 select CPU_SUPPORTS_64BIT_KERNEL
>> 1631 select CPU_SUPPORTS_HUGEPAGES
>> 1632 help
>> 1633 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1634
>> 1635 config CPU_R8000
>> 1636 bool "R8000"
>> 1637 depends on SYS_HAS_CPU_R8000
>> 1638 select CPU_HAS_PREFETCH
>> 1639 select CPU_SUPPORTS_64BIT_KERNEL
>> 1640 help
>> 1641 MIPS Technologies R8000 processors. Note these processors are
>> 1642 uncommon and the support for them is incomplete.
>> 1643
>> 1644 config CPU_R10000
>> 1645 bool "R10000"
>> 1646 depends on SYS_HAS_CPU_R10000
>> 1647 select CPU_HAS_PREFETCH
>> 1648 select CPU_SUPPORTS_32BIT_KERNEL
>> 1649 select CPU_SUPPORTS_64BIT_KERNEL
>> 1650 select CPU_SUPPORTS_HIGHMEM
>> 1651 select CPU_SUPPORTS_HUGEPAGES
>> 1652 help
>> 1653 MIPS Technologies R10000-series processors.
>> 1654
>> 1655 config CPU_RM7000
>> 1656 bool "RM7000"
>> 1657 depends on SYS_HAS_CPU_RM7000
>> 1658 select CPU_HAS_PREFETCH
>> 1659 select CPU_SUPPORTS_32BIT_KERNEL
>> 1660 select CPU_SUPPORTS_64BIT_KERNEL
>> 1661 select CPU_SUPPORTS_HIGHMEM
>> 1662 select CPU_SUPPORTS_HUGEPAGES
>> 1663
>> 1664 config CPU_SB1
>> 1665 bool "SB1"
>> 1666 depends on SYS_HAS_CPU_SB1
>> 1667 select CPU_SUPPORTS_32BIT_KERNEL
>> 1668 select CPU_SUPPORTS_64BIT_KERNEL
>> 1669 select CPU_SUPPORTS_HIGHMEM
>> 1670 select CPU_SUPPORTS_HUGEPAGES
>> 1671 select WEAK_ORDERING
>> 1672
>> 1673 config CPU_CAVIUM_OCTEON
>> 1674 bool "Cavium Octeon processor"
>> 1675 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1676 select CPU_HAS_PREFETCH
>> 1677 select CPU_SUPPORTS_64BIT_KERNEL
>> 1678 select WEAK_ORDERING
>> 1679 select CPU_SUPPORTS_HIGHMEM
>> 1680 select CPU_SUPPORTS_HUGEPAGES
>> 1681 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1682 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1683 select MIPS_L1_CACHE_SHIFT_7
>> 1684 select HAVE_KVM
>> 1685 help
>> 1686 The Cavium Octeon processor is a highly integrated chip containing
>> 1687 many ethernet hardware widgets for networking tasks. The processor
>> 1688 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1689 Full details can be found at http://www.caviumnetworks.com.
>> 1690
>> 1691 config CPU_BMIPS
>> 1692 bool "Broadcom BMIPS"
>> 1693 depends on SYS_HAS_CPU_BMIPS
>> 1694 select CPU_MIPS32
>> 1695 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1696 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1697 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1698 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1699 select CPU_SUPPORTS_32BIT_KERNEL
>> 1700 select DMA_NONCOHERENT
>> 1701 select IRQ_MIPS_CPU
>> 1702 select SWAP_IO_SPACE
>> 1703 select WEAK_ORDERING
>> 1704 select CPU_SUPPORTS_HIGHMEM
>> 1705 select CPU_HAS_PREFETCH
>> 1706 select CPU_SUPPORTS_CPUFREQ
>> 1707 select MIPS_EXTERNAL_TIMER
>> 1708 help
>> 1709 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1710
>> 1711 config CPU_XLR
>> 1712 bool "Netlogic XLR SoC"
>> 1713 depends on SYS_HAS_CPU_XLR
>> 1714 select CPU_SUPPORTS_32BIT_KERNEL
>> 1715 select CPU_SUPPORTS_64BIT_KERNEL
>> 1716 select CPU_SUPPORTS_HIGHMEM
>> 1717 select CPU_SUPPORTS_HUGEPAGES
>> 1718 select WEAK_ORDERING
>> 1719 select WEAK_REORDERING_BEYOND_LLSC
>> 1720 help
>> 1721 Netlogic Microsystems XLR/XLS processors.
>> 1722
>> 1723 config CPU_XLP
>> 1724 bool "Netlogic XLP SoC"
>> 1725 depends on SYS_HAS_CPU_XLP
>> 1726 select CPU_SUPPORTS_32BIT_KERNEL
>> 1727 select CPU_SUPPORTS_64BIT_KERNEL
>> 1728 select CPU_SUPPORTS_HIGHMEM
>> 1729 select WEAK_ORDERING
>> 1730 select WEAK_REORDERING_BEYOND_LLSC
>> 1731 select CPU_HAS_PREFETCH
>> 1732 select CPU_MIPSR2
>> 1733 select CPU_SUPPORTS_HUGEPAGES
>> 1734 select MIPS_ASID_BITS_VARIABLE
1064 help 1735 help
1065 Multi-core scheduler support improv !! 1736 Netlogic Microsystems XLP processors.
1066 making when dealing with multi-core !! 1737 endchoice
1067 increased overhead in some places. <<
1068 1738
1069 config SCHED_MC_PRIO !! 1739 config CPU_MIPS32_3_5_FEATURES
1070 bool "CPU core priorities scheduler s !! 1740 bool "MIPS32 Release 3.5 Features"
1071 depends on SCHED_MC !! 1741 depends on SYS_HAS_CPU_MIPS32_R3_5
1072 select X86_INTEL_PSTATE if CPU_SUP_IN !! 1742 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1073 select X86_AMD_PSTATE if CPU_SUP_AMD !! 1743 help
1074 select CPU_FREQ !! 1744 Choose this option to build a kernel for release 2 or later of the
1075 default y !! 1745 MIPS32 architecture including features from the 3.5 release such as
>> 1746 support for Enhanced Virtual Addressing (EVA).
>> 1747
>> 1748 config CPU_MIPS32_3_5_EVA
>> 1749 bool "Enhanced Virtual Addressing (EVA)"
>> 1750 depends on CPU_MIPS32_3_5_FEATURES
>> 1751 select EVA
>> 1752 default y
>> 1753 help
>> 1754 Choose this option if you want to enable the Enhanced Virtual
>> 1755 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1756 One of its primary benefits is an increase in the maximum size
>> 1757 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1758
>> 1759 config CPU_MIPS32_R5_FEATURES
>> 1760 bool "MIPS32 Release 5 Features"
>> 1761 depends on SYS_HAS_CPU_MIPS32_R5
>> 1762 depends on CPU_MIPS32_R2
>> 1763 help
>> 1764 Choose this option to build a kernel for release 2 or later of the
>> 1765 MIPS32 architecture including features from release 5 such as
>> 1766 support for Extended Physical Addressing (XPA).
>> 1767
>> 1768 config CPU_MIPS32_R5_XPA
>> 1769 bool "Extended Physical Addressing (XPA)"
>> 1770 depends on CPU_MIPS32_R5_FEATURES
>> 1771 depends on !EVA
>> 1772 depends on !PAGE_SIZE_4KB
>> 1773 depends on SYS_SUPPORTS_HIGHMEM
>> 1774 select XPA
>> 1775 select HIGHMEM
>> 1776 select ARCH_PHYS_ADDR_T_64BIT
>> 1777 default n
1076 help 1778 help
1077 Intel Turbo Boost Max Technology 3. !! 1779 Choose this option if you want to enable the Extended Physical
1078 core ordering determined at manufac !! 1780 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1079 certain cores to reach higher turbo !! 1781 benefit is to increase physical addressing equal to or greater
1080 single threaded workloads) than oth !! 1782 than 40 bits. Note that this has the side effect of turning on
>> 1783 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1784 If unsure, say 'N' here.
1081 1785
1082 Enabling this kernel feature teache !! 1786 if CPU_LOONGSON2F
1083 the TBM3 (aka ITMT) priority order !! 1787 config CPU_NOP_WORKAROUNDS
1084 scheduler's CPU selection logic acc !! 1788 bool
1085 overall system performance can be a <<
1086 1789
1087 This feature will have no effect on !! 1790 config CPU_JUMP_WORKAROUNDS
>> 1791 bool
1088 1792
1089 If unsure say Y here. !! 1793 config CPU_LOONGSON2F_WORKAROUNDS
>> 1794 bool "Loongson 2F Workarounds"
>> 1795 default y
>> 1796 select CPU_NOP_WORKAROUNDS
>> 1797 select CPU_JUMP_WORKAROUNDS
>> 1798 help
>> 1799 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
>> 1800 require workarounds. Without workarounds the system may hang
>> 1801 unexpectedly. For more information please refer to the gas
>> 1802 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1803
>> 1804 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1805 are needed. The workarounds have no significant side effect on them
>> 1806 but may decrease the performance of the system so this option should
>> 1807 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1808 systems.
1090 1809
1091 config UP_LATE_INIT !! 1810 If unsure, please say Y.
1092 def_bool y !! 1811 endif # CPU_LOONGSON2F
1093 depends on !SMP && X86_LOCAL_APIC !! 1812
>> 1813 config SYS_SUPPORTS_ZBOOT
>> 1814 bool
>> 1815 select HAVE_KERNEL_GZIP
>> 1816 select HAVE_KERNEL_BZIP2
>> 1817 select HAVE_KERNEL_LZ4
>> 1818 select HAVE_KERNEL_LZMA
>> 1819 select HAVE_KERNEL_LZO
>> 1820 select HAVE_KERNEL_XZ
1094 1821
1095 config X86_UP_APIC !! 1822 config SYS_SUPPORTS_ZBOOT_UART16550
1096 bool "Local APIC support on uniproces !! 1823 bool
1097 default PCI_MSI !! 1824 select SYS_SUPPORTS_ZBOOT
1098 depends on X86_32 && !SMP && !X86_32_ <<
1099 help <<
1100 A local APIC (Advanced Programmable <<
1101 integrated interrupt controller in <<
1102 system which has a processor with a <<
1103 enable and use it. If you say Y her <<
1104 have a local APIC, then the kernel <<
1105 all. The local APIC supports CPU-ge <<
1106 performance counters), and the NMI <<
1107 lockups. <<
1108 <<
1109 config X86_UP_IOAPIC <<
1110 bool "IO-APIC support on uniprocessor <<
1111 depends on X86_UP_APIC <<
1112 help <<
1113 An IO-APIC (I/O Advanced Programmab <<
1114 SMP-capable replacement for PC-styl <<
1115 SMP systems and many recent uniproc <<
1116 <<
1117 If you have a single-CPU system wit <<
1118 to use it. If you say Y here even t <<
1119 an IO-APIC, then the kernel will st <<
1120 1825
1121 config X86_LOCAL_APIC !! 1826 config SYS_SUPPORTS_ZBOOT_UART_PROM
1122 def_bool y !! 1827 bool
1123 depends on X86_64 || SMP || X86_32_NO !! 1828 select SYS_SUPPORTS_ZBOOT
1124 select IRQ_DOMAIN_HIERARCHY <<
1125 1829
1126 config ACPI_MADT_WAKEUP !! 1830 config CPU_LOONGSON2
1127 def_bool y !! 1831 bool
1128 depends on X86_64 !! 1832 select CPU_SUPPORTS_32BIT_KERNEL
1129 depends on ACPI !! 1833 select CPU_SUPPORTS_64BIT_KERNEL
1130 depends on SMP !! 1834 select CPU_SUPPORTS_HIGHMEM
1131 depends on X86_LOCAL_APIC !! 1835 select CPU_SUPPORTS_HUGEPAGES
1132 1836
1133 config X86_IO_APIC !! 1837 config CPU_LOONGSON1
1134 def_bool y !! 1838 bool
1135 depends on X86_LOCAL_APIC || X86_UP_I !! 1839 select CPU_MIPS32
>> 1840 select CPU_MIPSR2
>> 1841 select CPU_HAS_PREFETCH
>> 1842 select CPU_SUPPORTS_32BIT_KERNEL
>> 1843 select CPU_SUPPORTS_HIGHMEM
>> 1844 select CPU_SUPPORTS_CPUFREQ
1136 1845
1137 config X86_REROUTE_FOR_BROKEN_BOOT_IRQS !! 1846 config CPU_BMIPS32_3300
1138 bool "Reroute for broken boot IRQs" !! 1847 select SMP_UP if SMP
1139 depends on X86_IO_APIC !! 1848 bool
1140 help <<
1141 This option enables a workaround th <<
1142 spurious interrupts. This is recomm <<
1143 interrupt handling is used on syste <<
1144 superfluous "boot interrupts" canno <<
1145 <<
1146 Some chipsets generate a legacy INT <<
1147 entry in the chipset's IO-APIC is m <<
1148 kernel does during interrupt handli <<
1149 boot IRQ generation cannot be disab <<
1150 the original IRQ line masked so tha <<
1151 IRQ" is delivered to the CPUs. The <<
1152 kernel to set up the IRQ handler on <<
1153 way only one interrupt is delivered <<
1154 the spurious second interrupt may c <<
1155 down (vital) interrupt lines. <<
1156 <<
1157 Only affects "broken" chipsets. Int <<
1158 increased on these systems. <<
1159 <<
1160 config X86_MCE <<
1161 bool "Machine Check / overheating rep <<
1162 select GENERIC_ALLOCATOR <<
1163 default y <<
1164 help <<
1165 Machine Check support allows the pr <<
1166 kernel if it detects a problem (e.g <<
1167 The action the kernel takes depends <<
1168 ranging from warning messages to ha <<
1169 <<
1170 config X86_MCELOG_LEGACY <<
1171 bool "Support for deprecated /dev/mce <<
1172 depends on X86_MCE <<
1173 help <<
1174 Enable support for /dev/mcelog whic <<
1175 userspace logging daemon. Consider <<
1176 rasdaemon solution. <<
1177 1849
1178 config X86_MCE_INTEL !! 1850 config CPU_BMIPS4350
1179 def_bool y !! 1851 bool
1180 prompt "Intel MCE features" !! 1852 select SYS_SUPPORTS_SMP
1181 depends on X86_MCE && X86_LOCAL_APIC !! 1853 select SYS_SUPPORTS_HOTPLUG_CPU
1182 help <<
1183 Additional support for intel specif <<
1184 the thermal monitor. <<
1185 1854
1186 config X86_MCE_AMD !! 1855 config CPU_BMIPS4380
1187 def_bool y !! 1856 bool
1188 prompt "AMD MCE features" !! 1857 select MIPS_L1_CACHE_SHIFT_6
1189 depends on X86_MCE && X86_LOCAL_APIC !! 1858 select SYS_SUPPORTS_SMP
1190 help !! 1859 select SYS_SUPPORTS_HOTPLUG_CPU
1191 Additional support for AMD specific !! 1860 select CPU_HAS_RIXI
1192 the DRAM Error Threshold. <<
1193 1861
1194 config X86_ANCIENT_MCE !! 1862 config CPU_BMIPS5000
1195 bool "Support for old Pentium 5 / Win !! 1863 bool
1196 depends on X86_32 && X86_MCE !! 1864 select MIPS_CPU_SCACHE
1197 help !! 1865 select MIPS_L1_CACHE_SHIFT_7
1198 Include support for machine check h !! 1866 select SYS_SUPPORTS_SMP
1199 systems. These typically need to be !! 1867 select SYS_SUPPORTS_HOTPLUG_CPU
1200 line. !! 1868 select CPU_HAS_RIXI
1201 1869
1202 config X86_MCE_THRESHOLD !! 1870 config SYS_HAS_CPU_LOONGSON3
1203 depends on X86_MCE_AMD || X86_MCE_INT !! 1871 bool
1204 def_bool y !! 1872 select CPU_SUPPORTS_CPUFREQ
>> 1873 select CPU_HAS_RIXI
1205 1874
1206 config X86_MCE_INJECT !! 1875 config SYS_HAS_CPU_LOONGSON2E
1207 depends on X86_MCE && X86_LOCAL_APIC !! 1876 bool
1208 tristate "Machine check injector supp <<
1209 help <<
1210 Provide support for injecting machi <<
1211 If you don't know what a machine ch <<
1212 QA it is safe to say n. <<
1213 1877
1214 source "arch/x86/events/Kconfig" !! 1878 config SYS_HAS_CPU_LOONGSON2F
>> 1879 bool
>> 1880 select CPU_SUPPORTS_CPUFREQ
>> 1881 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1882 select CPU_SUPPORTS_UNCACHED_ACCELERATED
1215 1883
1216 config X86_LEGACY_VM86 !! 1884 config SYS_HAS_CPU_LOONGSON1B
1217 bool "Legacy VM86 support" !! 1885 bool
1218 depends on X86_32 <<
1219 help <<
1220 This option allows user programs to <<
1221 mode, which is an 80286-era approxi <<
1222 1886
1223 Some very old versions of X and/or !! 1887 config SYS_HAS_CPU_LOONGSON1C
1224 for user mode setting. Similarly, !! 1888 bool
1225 available to accelerate real mode D <<
1226 recent version of DOSEMU, X, or vbe <<
1227 functional even without kernel VM86 <<
1228 fall back to software emulation. Ne <<
1229 a 16-bit DOS program where 16-bit p <<
1230 mode might be faster than emulation <<
1231 enable this option. <<
1232 1889
1233 Note that any app that works on a 6 !! 1890 config SYS_HAS_CPU_MIPS32_R1
1234 need this option, as 64-bit kernels !! 1891 bool
1235 V8086 mode. This option is also unr <<
1236 mode and is not needed to run most <<
1237 1892
1238 Enabling this option increases the !! 1893 config SYS_HAS_CPU_MIPS32_R2
1239 and slows down exception handling a !! 1894 bool
1240 1895
1241 If unsure, say N here. !! 1896 config SYS_HAS_CPU_MIPS32_R3_5
>> 1897 bool
1242 1898
1243 config VM86 !! 1899 config SYS_HAS_CPU_MIPS32_R5
1244 bool 1900 bool
1245 default X86_LEGACY_VM86 <<
1246 1901
1247 config X86_16BIT !! 1902 config SYS_HAS_CPU_MIPS32_R6
1248 bool "Enable support for 16-bit segme !! 1903 bool
1249 default y <<
1250 depends on MODIFY_LDT_SYSCALL <<
1251 help <<
1252 This option is required by programs <<
1253 protected mode legacy code on x86 p <<
1254 this option saves about 300 bytes o <<
1255 plus 16K runtime memory on x86-64, <<
1256 1904
1257 config X86_ESPFIX32 !! 1905 config SYS_HAS_CPU_MIPS64_R1
1258 def_bool y !! 1906 bool
1259 depends on X86_16BIT && X86_32 <<
1260 1907
1261 config X86_ESPFIX64 !! 1908 config SYS_HAS_CPU_MIPS64_R2
1262 def_bool y !! 1909 bool
1263 depends on X86_16BIT && X86_64 <<
1264 1910
1265 config X86_VSYSCALL_EMULATION !! 1911 config SYS_HAS_CPU_MIPS64_R6
1266 bool "Enable vsyscall emulation" if E !! 1912 bool
1267 default y <<
1268 depends on X86_64 <<
1269 help <<
1270 This enables emulation of the legac <<
1271 it is roughly equivalent to booting <<
1272 that it will also disable the helpf <<
1273 tries to use a vsyscall. With this <<
1274 programs will just segfault, citing <<
1275 0xffffffffff600?00. <<
1276 1913
1277 This option is required by many pro !! 1914 config SYS_HAS_CPU_R3000
1278 care should be used even with newer !! 1915 bool
1279 1916
1280 Disabling this option saves about 7 !! 1917 config SYS_HAS_CPU_TX39XX
1281 possibly 4K of additional runtime p !! 1918 bool
1282 1919
1283 config X86_IOPL_IOPERM !! 1920 config SYS_HAS_CPU_VR41XX
1284 bool "IOPERM and IOPL Emulation" !! 1921 bool
1285 default y <<
1286 help <<
1287 This enables the ioperm() and iopl( <<
1288 for legacy applications. <<
1289 1922
1290 Legacy IOPL support is an overbroad !! 1923 config SYS_HAS_CPU_R4300
1291 space aside of accessing all 65536 !! 1924 bool
1292 interrupts. To gain this access the <<
1293 capabilities and permission from po <<
1294 modules. <<
1295 1925
1296 The emulation restricts the functio !! 1926 config SYS_HAS_CPU_R4X00
1297 only allowing the full range I/O po !! 1927 bool
1298 ability to disable interrupts from <<
1299 granted if the hardware IOPL mechan <<
1300 1928
1301 config TOSHIBA !! 1929 config SYS_HAS_CPU_TX49XX
1302 tristate "Toshiba Laptop support" !! 1930 bool
1303 depends on X86_32 <<
1304 help <<
1305 This adds a driver to safely access <<
1306 the CPU on Toshiba portables with a <<
1307 not work on models with a Phoenix B <<
1308 is used to set the BIOS and power s <<
1309 1931
1310 For information on utilities to mak !! 1932 config SYS_HAS_CPU_R5000
1311 Toshiba Linux utilities web site at !! 1933 bool
1312 <http://www.buzzard.org.uk/toshiba/ <<
1313 1934
1314 Say Y if you intend to run this ker !! 1935 config SYS_HAS_CPU_R5432
1315 Say N otherwise. !! 1936 bool
1316 1937
1317 config X86_REBOOTFIXUPS !! 1938 config SYS_HAS_CPU_R5500
1318 bool "Enable X86 board specific fixup !! 1939 bool
1319 depends on X86_32 <<
1320 help <<
1321 This enables chipset and/or board s <<
1322 in order to get reboot to work corr <<
1323 some combinations of hardware and B <<
1324 this config is intended, is when re <<
1325 system. <<
1326 1940
1327 Currently, the only fixup is for th !! 1941 config SYS_HAS_CPU_R6000
1328 CS5530A and CS5536 chipsets and the !! 1942 bool
1329 1943
1330 Say Y if you want to enable the fix !! 1944 config SYS_HAS_CPU_NEVADA
1331 enable this option even if you don' !! 1945 bool
1332 Say N otherwise. <<
1333 1946
1334 config MICROCODE !! 1947 config SYS_HAS_CPU_R8000
1335 def_bool y !! 1948 bool
1336 depends on CPU_SUP_AMD || CPU_SUP_INT <<
1337 1949
1338 config MICROCODE_INITRD32 !! 1950 config SYS_HAS_CPU_R10000
1339 def_bool y !! 1951 bool
1340 depends on MICROCODE && X86_32 && BLK <<
1341 1952
1342 config MICROCODE_LATE_LOADING !! 1953 config SYS_HAS_CPU_RM7000
1343 bool "Late microcode loading (DANGERO !! 1954 bool
1344 default n <<
1345 depends on MICROCODE && SMP <<
1346 help <<
1347 Loading microcode late, when the sy <<
1348 is a tricky business and should be <<
1349 of synchronizing all cores and SMT <<
1350 not guarantee that cores might not <<
1351 use this at your own risk. Late loa <<
1352 microcode header indicates that it <<
1353 minimal revision check. This minima <<
1354 the kernel command line with "micro <<
1355 1955
1356 config MICROCODE_LATE_FORCE_MINREV !! 1956 config SYS_HAS_CPU_SB1
1357 bool "Enforce late microcode loading !! 1957 bool
1358 default n <<
1359 depends on MICROCODE_LATE_LOADING <<
1360 help <<
1361 To prevent that users load microcod <<
1362 in use features, newer microcode pa <<
1363 in the microcode header, which tell <<
1364 revision must be active in the CPU <<
1365 late into the running system. If di <<
1366 be enforced but the kernel will be <<
1367 revision check fails. <<
1368 <<
1369 This minimal revision check can als <<
1370 "microcode.minrev" parameter on the <<
1371 <<
1372 If unsure say Y. <<
1373 <<
1374 config X86_MSR <<
1375 tristate "/dev/cpu/*/msr - Model-spec <<
1376 help <<
1377 This device gives privileged proces <<
1378 Model-Specific Registers (MSRs). I <<
1379 major 202 and minors 0 to 31 for /d <<
1380 MSR accesses are directed to a spec <<
1381 systems. <<
1382 1958
1383 config X86_CPUID !! 1959 config SYS_HAS_CPU_CAVIUM_OCTEON
1384 tristate "/dev/cpu/*/cpuid - CPU info !! 1960 bool
1385 help <<
1386 This device gives processes access <<
1387 be executed on a specific processor <<
1388 with major 203 and minors 0 to 31 f <<
1389 /dev/cpu/31/cpuid. <<
1390 1961
1391 choice !! 1962 config SYS_HAS_CPU_BMIPS
1392 prompt "High Memory Support" !! 1963 bool
1393 default HIGHMEM4G <<
1394 depends on X86_32 <<
1395 <<
1396 config NOHIGHMEM <<
1397 bool "off" <<
1398 help <<
1399 Linux can use up to 64 Gigabytes of <<
1400 However, the address space of 32-bi <<
1401 Gigabytes large. That means that, i <<
1402 physical memory, not all of it can <<
1403 kernel. The physical memory that's <<
1404 "high memory". <<
1405 <<
1406 If you are compiling a kernel which <<
1407 more than 1 Gigabyte total physical <<
1408 choice and suitable for most users) <<
1409 split: 3GB are mapped so that each <<
1410 space and the remaining part of the <<
1411 by the kernel to permanently map as <<
1412 possible. <<
1413 <<
1414 If the machine has between 1 and 4 <<
1415 answer "4GB" here. <<
1416 <<
1417 If more than 4 Gigabytes is used th <<
1418 selection turns Intel PAE (Physical <<
1419 PAE implements 3-level paging on IA <<
1420 supported by Linux, PAE mode is imp <<
1421 processors (Pentium Pro and better) <<
1422 then the kernel will not boot on CP <<
1423 <<
1424 The actual amount of total physical <<
1425 auto detected or can be forced by u <<
1426 such as "mem=256M". (Try "man bootp <<
1427 your boot loader (lilo or loadlin) <<
1428 kernel at boot time.) <<
1429 <<
1430 If unsure, say "off". <<
1431 <<
1432 config HIGHMEM4G <<
1433 bool "4GB" <<
1434 help <<
1435 Select this if you have a 32-bit pr <<
1436 gigabytes of physical RAM. <<
1437 <<
1438 config HIGHMEM64G <<
1439 bool "64GB" <<
1440 depends on X86_HAVE_PAE <<
1441 select X86_PAE <<
1442 help <<
1443 Select this if you have a 32-bit pr <<
1444 gigabytes of physical RAM. <<
1445 1964
1446 endchoice !! 1965 config SYS_HAS_CPU_BMIPS32_3300
>> 1966 bool
>> 1967 select SYS_HAS_CPU_BMIPS
1447 1968
1448 choice !! 1969 config SYS_HAS_CPU_BMIPS4350
1449 prompt "Memory split" if EXPERT !! 1970 bool
1450 default VMSPLIT_3G !! 1971 select SYS_HAS_CPU_BMIPS
1451 depends on X86_32 <<
1452 help <<
1453 Select the desired split between ke <<
1454 <<
1455 If the address range available to t <<
1456 physical memory installed, the rema <<
1457 as "high memory". Accessing high me <<
1458 than low memory, as it needs to be <<
1459 Note that increasing the kernel add <<
1460 available to user programs, making <<
1461 tighter. Selecting anything other <<
1462 will also likely make your kernel i <<
1463 kernel modules. <<
1464 <<
1465 If you are not absolutely sure what <<
1466 option alone! <<
1467 <<
1468 config VMSPLIT_3G <<
1469 bool "3G/1G user/kernel split <<
1470 config VMSPLIT_3G_OPT <<
1471 depends on !X86_PAE <<
1472 bool "3G/1G user/kernel split <<
1473 config VMSPLIT_2G <<
1474 bool "2G/2G user/kernel split <<
1475 config VMSPLIT_2G_OPT <<
1476 depends on !X86_PAE <<
1477 bool "2G/2G user/kernel split <<
1478 config VMSPLIT_1G <<
1479 bool "1G/3G user/kernel split <<
1480 endchoice <<
1481 1972
1482 config PAGE_OFFSET !! 1973 config SYS_HAS_CPU_BMIPS4380
1483 hex !! 1974 bool
1484 default 0xB0000000 if VMSPLIT_3G_OPT !! 1975 select SYS_HAS_CPU_BMIPS
1485 default 0x80000000 if VMSPLIT_2G <<
1486 default 0x78000000 if VMSPLIT_2G_OPT <<
1487 default 0x40000000 if VMSPLIT_1G <<
1488 default 0xC0000000 <<
1489 depends on X86_32 <<
1490 1976
1491 config HIGHMEM !! 1977 config SYS_HAS_CPU_BMIPS5000
1492 def_bool y !! 1978 bool
1493 depends on X86_32 && (HIGHMEM64G || H !! 1979 select SYS_HAS_CPU_BMIPS
1494 1980
1495 config X86_PAE !! 1981 config SYS_HAS_CPU_XLR
1496 bool "PAE (Physical Address Extension !! 1982 bool
1497 depends on X86_32 && X86_HAVE_PAE <<
1498 select PHYS_ADDR_T_64BIT <<
1499 select SWIOTLB <<
1500 help <<
1501 PAE is required for NX support, and <<
1502 larger swapspace support for non-ov <<
1503 has the cost of more pagetable look <<
1504 consumes more pagetable space per p <<
1505 1983
1506 config X86_5LEVEL !! 1984 config SYS_HAS_CPU_XLP
1507 bool "Enable 5-level page tables supp !! 1985 bool
>> 1986
>> 1987 config MIPS_MALTA_PM
>> 1988 depends on MIPS_MALTA
>> 1989 depends on PCI
>> 1990 bool
1508 default y 1991 default y
1509 select DYNAMIC_MEMORY_LAYOUT <<
1510 select SPARSEMEM_VMEMMAP <<
1511 depends on X86_64 <<
1512 help <<
1513 5-level paging enables access to la <<
1514 up to 128 PiB of virtual address sp <<
1515 physical address space. <<
1516 1992
1517 It will be supported by future Inte !! 1993 #
>> 1994 # CPU may reorder R->R, R->W, W->R, W->W
>> 1995 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 1996 #
>> 1997 config WEAK_ORDERING
>> 1998 bool
1518 1999
1519 A kernel with the option enabled ca !! 2000 #
1520 support 4- or 5-level paging. !! 2001 # CPU may reorder reads and writes beyond LL/SC
>> 2002 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 2003 #
>> 2004 config WEAK_REORDERING_BEYOND_LLSC
>> 2005 bool
>> 2006 endmenu
1521 2007
1522 See Documentation/arch/x86/x86_64/5 !! 2008 #
1523 information. !! 2009 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2010 #
>> 2011 config CPU_MIPS32
>> 2012 bool
>> 2013 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
1524 2014
1525 Say N if unsure. !! 2015 config CPU_MIPS64
>> 2016 bool
>> 2017 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
1526 2018
1527 config X86_DIRECT_GBPAGES !! 2019 #
1528 def_bool y !! 2020 # These two indicate the revision of the architecture, either Release 1 or Release 2
1529 depends on X86_64 !! 2021 #
1530 help !! 2022 config CPU_MIPSR1
1531 Certain kernel features effectively !! 2023 bool
1532 linear 1 GB mappings (even if the C !! 2024 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1533 supports them), so don't confuse th <<
1534 that we have them enabled. <<
1535 <<
1536 config X86_CPA_STATISTICS <<
1537 bool "Enable statistic for Change Pag <<
1538 depends on DEBUG_FS <<
1539 help <<
1540 Expose statistics about the Change <<
1541 helps to determine the effectivenes <<
1542 page mappings when mapping protecti <<
1543 <<
1544 config X86_MEM_ENCRYPT <<
1545 select ARCH_HAS_FORCE_DMA_UNENCRYPTED <<
1546 select DYNAMIC_PHYSICAL_MASK <<
1547 def_bool n <<
1548 2025
1549 config AMD_MEM_ENCRYPT !! 2026 config CPU_MIPSR2
1550 bool "AMD Secure Memory Encryption (S !! 2027 bool
1551 depends on X86_64 && CPU_SUP_AMD !! 2028 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1552 depends on EFI_STUB !! 2029 select CPU_HAS_RIXI
1553 select DMA_COHERENT_POOL !! 2030 select MIPS_SPRAM
1554 select ARCH_USE_MEMREMAP_PROT <<
1555 select INSTRUCTION_DECODER <<
1556 select ARCH_HAS_CC_PLATFORM <<
1557 select X86_MEM_ENCRYPT <<
1558 select UNACCEPTED_MEMORY <<
1559 help <<
1560 Say yes to enable support for the e <<
1561 This requires an AMD processor that <<
1562 Encryption (SME). <<
1563 2031
1564 # Common NUMA Features !! 2032 config CPU_MIPSR6
1565 config NUMA !! 2033 bool
1566 bool "NUMA Memory Allocation and Sche !! 2034 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1567 depends on SMP !! 2035 select CPU_HAS_RIXI
1568 depends on X86_64 || (X86_32 && HIGHM !! 2036 select HAVE_ARCH_BITREVERSE
1569 default y if X86_BIGSMP !! 2037 select MIPS_ASID_BITS_VARIABLE
1570 select USE_PERCPU_NUMA_NODE_ID !! 2038 select MIPS_SPRAM
1571 select OF_NUMA if OF <<
1572 help <<
1573 Enable NUMA (Non-Uniform Memory Acc <<
1574 2039
1575 The kernel will try to allocate mem !! 2040 config EVA
1576 local memory controller of the CPU !! 2041 bool
1577 NUMA awareness to the kernel. <<
1578 2042
1579 For 64-bit this is recommended if t !! 2043 config XPA
1580 (or later), AMD Opteron, or EM64T N !! 2044 bool
>> 2045
>> 2046 config SYS_SUPPORTS_32BIT_KERNEL
>> 2047 bool
>> 2048 config SYS_SUPPORTS_64BIT_KERNEL
>> 2049 bool
>> 2050 config CPU_SUPPORTS_32BIT_KERNEL
>> 2051 bool
>> 2052 config CPU_SUPPORTS_64BIT_KERNEL
>> 2053 bool
>> 2054 config CPU_SUPPORTS_CPUFREQ
>> 2055 bool
>> 2056 config CPU_SUPPORTS_ADDRWINCFG
>> 2057 bool
>> 2058 config CPU_SUPPORTS_HUGEPAGES
>> 2059 bool
>> 2060 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2061 bool
>> 2062 config MIPS_PGD_C0_CONTEXT
>> 2063 bool
>> 2064 default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
1581 2065
1582 For 32-bit this is only needed if y !! 2066 #
1583 kernel on a 64-bit NUMA platform. !! 2067 # Set to y for ptrace access to watch registers.
>> 2068 #
>> 2069 config HARDWARE_WATCHPOINTS
>> 2070 bool
>> 2071 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
1584 2072
1585 Otherwise, you should say N. !! 2073 menu "Kernel type"
1586 2074
1587 config AMD_NUMA !! 2075 choice
1588 def_bool y !! 2076 prompt "Kernel code model"
1589 prompt "Old style AMD Opteron NUMA de !! 2077 help
1590 depends on X86_64 && NUMA && PCI !! 2078 You should only select this option if you have a workload that
>> 2079 actually benefits from 64-bit processing or if your machine has
>> 2080 large memory. You will only be presented a single option in this
>> 2081 menu if your system does not support both 32-bit and 64-bit kernels.
>> 2082
>> 2083 config 32BIT
>> 2084 bool "32-bit kernel"
>> 2085 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2086 select TRAD_SIGNALS
1591 help 2087 help
1592 Enable AMD NUMA node topology detec !! 2088 Select this option if you want to build a 32-bit kernel.
1593 you have a multi processor AMD syst <<
1594 read the NUMA configuration directl <<
1595 of Opteron. It is recommended to us <<
1596 which also takes priority if both a <<
1597 2089
1598 config X86_64_ACPI_NUMA !! 2090 config 64BIT
1599 def_bool y !! 2091 bool "64-bit kernel"
1600 prompt "ACPI NUMA detection" !! 2092 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
1601 depends on X86_64 && NUMA && ACPI && <<
1602 select ACPI_NUMA <<
1603 help 2093 help
1604 Enable ACPI SRAT based node topolog !! 2094 Select this option if you want to build a 64-bit kernel.
1605 2095
1606 config NODES_SHIFT !! 2096 endchoice
1607 int "Maximum NUMA Nodes (as a power o !! 2097
1608 range 1 10 !! 2098 config KVM_GUEST
1609 default "10" if MAXSMP !! 2099 bool "KVM Guest Kernel"
1610 default "6" if X86_64 !! 2100 depends on BROKEN_ON_SMP
1611 default "3" <<
1612 depends on NUMA <<
1613 help 2101 help
1614 Specify the maximum number of NUMA !! 2102 Select this option if building a guest kernel for KVM (Trap & Emulate)
1615 system. Increases memory reserved !! 2103 mode.
1616 2104
1617 config ARCH_FLATMEM_ENABLE !! 2105 config KVM_GUEST_TIMER_FREQ
1618 def_bool y !! 2106 int "Count/Compare Timer Frequency (MHz)"
1619 depends on X86_32 && !NUMA !! 2107 depends on KVM_GUEST
>> 2108 default 100
>> 2109 help
>> 2110 Set this to non-zero if building a guest kernel for KVM to skip RTC
>> 2111 emulation when determining guest CPU Frequency. Instead, the guest's
>> 2112 timer frequency is specified directly.
1620 2113
1621 config ARCH_SPARSEMEM_ENABLE !! 2114 config MIPS_VA_BITS_48
1622 def_bool y !! 2115 bool "48 bits virtual memory"
1623 depends on X86_64 || NUMA || X86_32 | !! 2116 depends on 64BIT
1624 select SPARSEMEM_STATIC if X86_32 !! 2117 help
1625 select SPARSEMEM_VMEMMAP_ENABLE if X8 !! 2118 Support a maximum at least 48 bits of application virtual
>> 2119 memory. Default is 40 bits or less, depending on the CPU.
>> 2120 For page sizes 16k and above, this option results in a small
>> 2121 memory overhead for page tables. For 4k page size, a fourth
>> 2122 level of page tables is added which imposes both a memory
>> 2123 overhead as well as slower TLB fault handling.
1626 2124
1627 config ARCH_SPARSEMEM_DEFAULT !! 2125 If unsure, say N.
1628 def_bool X86_64 || (NUMA && X86_32) <<
1629 2126
1630 config ARCH_SELECT_MEMORY_MODEL !! 2127 choice
1631 def_bool y !! 2128 prompt "Kernel page size"
1632 depends on ARCH_SPARSEMEM_ENABLE && A !! 2129 default PAGE_SIZE_4KB
1633 2130
1634 config ARCH_MEMORY_PROBE !! 2131 config PAGE_SIZE_4KB
1635 bool "Enable sysfs memory/probe inter !! 2132 bool "4kB"
1636 depends on MEMORY_HOTPLUG !! 2133 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
1637 help !! 2134 help
1638 This option enables a sysfs memory/ !! 2135 This option select the standard 4kB Linux page size. On some
1639 See Documentation/admin-guide/mm/me !! 2136 R3000-family processors this is the only available page size. Using
1640 If you are unsure how to answer thi !! 2137 4kB page size will minimize memory consumption and is therefore
>> 2138 recommended for low memory systems.
>> 2139
>> 2140 config PAGE_SIZE_8KB
>> 2141 bool "8kB"
>> 2142 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
>> 2143 depends on !MIPS_VA_BITS_48
>> 2144 help
>> 2145 Using 8kB page size will result in higher performance kernel at
>> 2146 the price of higher memory consumption. This option is available
>> 2147 only on R8000 and cnMIPS processors. Note that you will need a
>> 2148 suitable Linux distribution to support this.
>> 2149
>> 2150 config PAGE_SIZE_16KB
>> 2151 bool "16kB"
>> 2152 depends on !CPU_R3000 && !CPU_TX39XX
>> 2153 help
>> 2154 Using 16kB page size will result in higher performance kernel at
>> 2155 the price of higher memory consumption. This option is available on
>> 2156 all non-R3000 family processors. Note that you will need a suitable
>> 2157 Linux distribution to support this.
>> 2158
>> 2159 config PAGE_SIZE_32KB
>> 2160 bool "32kB"
>> 2161 depends on CPU_CAVIUM_OCTEON
>> 2162 depends on !MIPS_VA_BITS_48
>> 2163 help
>> 2164 Using 32kB page size will result in higher performance kernel at
>> 2165 the price of higher memory consumption. This option is available
>> 2166 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2167 distribution to support this.
>> 2168
>> 2169 config PAGE_SIZE_64KB
>> 2170 bool "64kB"
>> 2171 depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000
>> 2172 help
>> 2173 Using 64kB page size will result in higher performance kernel at
>> 2174 the price of higher memory consumption. This option is available on
>> 2175 all non-R3000 family processor. Not that at the time of this
>> 2176 writing this option is still high experimental.
1641 2177
1642 config ARCH_PROC_KCORE_TEXT !! 2178 endchoice
1643 def_bool y <<
1644 depends on X86_64 && PROC_KCORE <<
1645 2179
1646 config ILLEGAL_POINTER_VALUE !! 2180 config FORCE_MAX_ZONEORDER
1647 hex !! 2181 int "Maximum zone order"
1648 default 0 if X86_32 !! 2182 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
1649 default 0xdead000000000000 if X86_64 !! 2183 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
1650 !! 2184 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
1651 config X86_PMEM_LEGACY_DEVICE !! 2185 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
1652 bool !! 2186 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
1653 !! 2187 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
1654 config X86_PMEM_LEGACY !! 2188 range 11 64
1655 tristate "Support non-standard NVDIMM !! 2189 default "11"
1656 depends on PHYS_ADDR_T_64BIT !! 2190 help
1657 depends on BLK_DEV !! 2191 The kernel memory allocator divides physically contiguous memory
1658 select X86_PMEM_LEGACY_DEVICE !! 2192 blocks into "zones", where each zone is a power of two number of
1659 select NUMA_KEEP_MEMINFO if NUMA !! 2193 pages. This option selects the largest power of two that the kernel
1660 select LIBNVDIMM !! 2194 keeps in the memory allocator. If you need to allocate very large
1661 help !! 2195 blocks of physically contiguous memory, then you may need to
1662 Treat memory marked using the non-s !! 2196 increase this value.
1663 by the Intel Sandy Bridge-EP refere <<
1664 The kernel will offer these regions <<
1665 they can be used for persistent sto <<
1666 <<
1667 Say Y if unsure. <<
1668 <<
1669 config HIGHPTE <<
1670 bool "Allocate 3rd-level pagetables f <<
1671 depends on HIGHMEM <<
1672 help <<
1673 The VM uses one page table entry fo <<
1674 For systems with a lot of RAM, this <<
1675 low memory. Setting this option wi <<
1676 entries in high memory. <<
1677 <<
1678 config X86_CHECK_BIOS_CORRUPTION <<
1679 bool "Check for low memory corruption <<
1680 help <<
1681 Periodically check for memory corru <<
1682 is suspected to be caused by BIOS. <<
1683 configuration, it is disabled at ru <<
1684 setting "memory_corruption_check=1" <<
1685 line. By default it scans the low <<
1686 seconds; see the memory_corruption_ <<
1687 memory_corruption_check_period para <<
1688 Documentation/admin-guide/kernel-pa <<
1689 <<
1690 When enabled with the default param <<
1691 almost no overhead, as it reserves <<
1692 of memory and scans it infrequently <<
1693 and prevents it from affecting the <<
1694 <<
1695 It is, however, intended as a diagn <<
1696 BIOS-originated corruption always a <<
1697 you can use memmap= to prevent the <<
1698 memory. <<
1699 <<
1700 config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK <<
1701 bool "Set the default setting of memo <<
1702 depends on X86_CHECK_BIOS_CORRUPTION <<
1703 default y <<
1704 help <<
1705 Set whether the default state of me <<
1706 on or off. <<
1707 <<
1708 config MATH_EMULATION <<
1709 bool <<
1710 depends on MODIFY_LDT_SYSCALL <<
1711 prompt "Math emulation" if X86_32 && <<
1712 help <<
1713 Linux can emulate a math coprocesso <<
1714 operations) if you don't have one. <<
1715 a math coprocessor built in, 486SX <<
1716 a 487DX or 387, respectively. (The <<
1717 give you some hints here ["man dmes <<
1718 coprocessor or this emulation. <<
1719 <<
1720 If you don't have a math coprocesso <<
1721 say Y here even though you have a c <<
1722 be used nevertheless. (This behavio <<
1723 command line option "no387", which <<
1724 is broken. Try "man bootparam" or s <<
1725 loader (lilo or loadlin) about how <<
1726 boot time.) This means that it is a <<
1727 intend to use this kernel on differ <<
1728 2197
1729 More information about the internal !! 2198 This config option is actually maximum order plus one. For example,
1730 emulation can be found in <file:arc !! 2199 a value of 11 means that the largest free memory block is 2^10 pages.
1731 2200
1732 If you are not sure, say Y; apart f !! 2201 The page size is not necessarily 4KB. Keep this in mind
1733 kernel, it won't hurt. !! 2202 when choosing a value for this option.
1734 2203
1735 config MTRR !! 2204 config BOARD_SCACHE
1736 def_bool y !! 2205 bool
1737 prompt "MTRR (Memory Type Range Regis <<
1738 help <<
1739 On Intel P6 family processors (Pent <<
1740 the Memory Type Range Registers (MT <<
1741 processor access to memory ranges. <<
1742 a video (VGA) card on a PCI or AGP <<
1743 allows bus write transfers to be co <<
1744 before bursting over the PCI/AGP bu <<
1745 of image write operations 2.5 times <<
1746 /proc/mtrr file which may be used t <<
1747 MTRRs. Typically the X server shoul <<
1748 <<
1749 This code has a reasonably generic <<
1750 control registers on other processo <<
1751 as well: <<
1752 <<
1753 The Cyrix 6x86, 6x86MX and M II pro <<
1754 Registers (ARRs) which provide a si <<
1755 these, the ARRs are used to emulate <<
1756 The AMD K6-2 (stepping 8 and above) <<
1757 MTRRs. The Centaur C6 (WinChip) has <<
1758 write-combining. All of these proce <<
1759 and it makes sense to say Y here if <<
1760 <<
1761 Saying Y here also fixes a problem <<
1762 set the MTRRs for the boot CPU and <<
1763 can lead to all sorts of problems, <<
1764 2206
1765 You can safely say Y even if your m !! 2207 config IP22_CPU_SCACHE
1766 just add about 9 KB to your kernel. !! 2208 bool
>> 2209 select BOARD_SCACHE
1767 2210
1768 See <file:Documentation/arch/x86/mt !! 2211 #
>> 2212 # Support for a MIPS32 / MIPS64 style S-caches
>> 2213 #
>> 2214 config MIPS_CPU_SCACHE
>> 2215 bool
>> 2216 select BOARD_SCACHE
1769 2217
1770 config MTRR_SANITIZER !! 2218 config R5000_CPU_SCACHE
1771 def_bool y !! 2219 bool
1772 prompt "MTRR cleanup support" !! 2220 select BOARD_SCACHE
1773 depends on MTRR !! 2221
>> 2222 config RM7000_CPU_SCACHE
>> 2223 bool
>> 2224 select BOARD_SCACHE
>> 2225
>> 2226 config SIBYTE_DMA_PAGEOPS
>> 2227 bool "Use DMA to clear/copy pages"
>> 2228 depends on CPU_SB1
1774 help 2229 help
1775 Convert MTRR layout from continuous !! 2230 Instead of using the CPU to zero and copy pages, use a Data Mover
1776 add writeback entries. !! 2231 channel. These DMA channels are otherwise unused by the standard
>> 2232 SiByte Linux port. Seems to give a small performance benefit.
1777 2233
1778 Can be disabled with disable_mtrr_c !! 2234 config CPU_HAS_PREFETCH
1779 The largest mtrr entry size for a c !! 2235 bool
1780 mtrr_chunk_size. <<
1781 2236
1782 If unsure, say Y. !! 2237 config CPU_GENERIC_DUMP_TLB
>> 2238 bool
>> 2239 default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
1783 2240
1784 config MTRR_SANITIZER_ENABLE_DEFAULT !! 2241 config CPU_R4K_FPU
1785 int "MTRR cleanup enable value (0-1)" !! 2242 bool
1786 range 0 1 !! 2243 default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
1787 default "0" <<
1788 depends on MTRR_SANITIZER <<
1789 help <<
1790 Enable mtrr cleanup default value <<
1791 <<
1792 config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT <<
1793 int "MTRR cleanup spare reg num (0-7) <<
1794 range 0 7 <<
1795 default "1" <<
1796 depends on MTRR_SANITIZER <<
1797 help <<
1798 mtrr cleanup spare entries default, <<
1799 mtrr_spare_reg_nr=N on the kernel c <<
1800 2244
1801 config X86_PAT !! 2245 config CPU_R4K_CACHE_TLB
1802 def_bool y !! 2246 bool
1803 prompt "x86 PAT support" if EXPERT !! 2247 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
1804 depends on MTRR !! 2248
1805 select ARCH_USES_PG_ARCH_2 !! 2249 config MIPS_MT_SMP
>> 2250 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2251 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
>> 2252 select CPU_MIPSR2_IRQ_VI
>> 2253 select CPU_MIPSR2_IRQ_EI
>> 2254 select SYNC_R4K
>> 2255 select MIPS_MT
>> 2256 select SMP
>> 2257 select SMP_UP
>> 2258 select SYS_SUPPORTS_SMP
>> 2259 select SYS_SUPPORTS_SCHED_SMT
>> 2260 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2261 help
>> 2262 This is a kernel model which is known as SMVP. This is supported
>> 2263 on cores with the MT ASE and uses the available VPEs to implement
>> 2264 virtual processors which supports SMP. This is equivalent to the
>> 2265 Intel Hyperthreading feature. For further information go to
>> 2266 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2267
>> 2268 config MIPS_MT
>> 2269 bool
>> 2270
>> 2271 config SCHED_SMT
>> 2272 bool "SMT (multithreading) scheduler support"
>> 2273 depends on SYS_SUPPORTS_SCHED_SMT
>> 2274 default n
1806 help 2275 help
1807 Use PAT attributes to setup page le !! 2276 SMT scheduler support improves the CPU scheduler's decision making
>> 2277 when dealing with MIPS MT enabled cores at a cost of slightly
>> 2278 increased overhead in some places. If unsure say N here.
1808 2279
1809 PATs are the modern equivalents of !! 2280 config SYS_SUPPORTS_SCHED_SMT
1810 flexible than MTRRs. !! 2281 bool
1811 2282
1812 Say N here if you see bootup proble !! 2283 config SYS_SUPPORTS_MULTITHREADING
1813 spontaneous reboots) or a non-worki !! 2284 bool
1814 2285
1815 If unsure, say Y. !! 2286 config MIPS_MT_FPAFF
>> 2287 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2288 default y
>> 2289 depends on MIPS_MT_SMP
1816 2290
1817 config X86_UMIP !! 2291 config MIPSR2_TO_R6_EMULATOR
1818 def_bool y !! 2292 bool "MIPS R2-to-R6 emulator"
1819 prompt "User Mode Instruction Prevent !! 2293 depends on CPU_MIPSR6
>> 2294 default y
1820 help 2295 help
1821 User Mode Instruction Prevention (U !! 2296 Choose this option if you want to run non-R6 MIPS userland code.
1822 some x86 processors. If enabled, a !! 2297 Even if you say 'Y' here, the emulator will still be disabled by
1823 issued if the SGDT, SLDT, SIDT, SMS !! 2298 default. You can enable it using the 'mipsr2emu' kernel option.
1824 executed in user mode. These instru !! 2299 The only reason this is a build-time option is to save ~14K from the
1825 information about the hardware stat !! 2300 final kernel image.
1826 <<
1827 The vast majority of applications d <<
1828 For the very few that do, software <<
1829 specific cases in protected and vir <<
1830 results are dummy. <<
1831 <<
1832 config CC_HAS_IBT <<
1833 # GCC >= 9 and binutils >= 2.29 <<
1834 # Retpoline check to work around http <<
1835 # Clang/LLVM >= 14 <<
1836 # https://github.com/llvm/llvm-projec <<
1837 # https://github.com/llvm/llvm-projec <<
1838 def_bool ((CC_IS_GCC && $(cc-option, <<
1839 (CC_IS_CLANG && CLANG_VERSI <<
1840 $(as-instr,endbr64) <<
1841 2301
1842 config X86_CET !! 2302 config MIPS_VPE_LOADER
1843 def_bool n !! 2303 bool "VPE loader support."
>> 2304 depends on SYS_SUPPORTS_MULTITHREADING && MODULES
>> 2305 select CPU_MIPSR2_IRQ_VI
>> 2306 select CPU_MIPSR2_IRQ_EI
>> 2307 select MIPS_MT
1844 help 2308 help
1845 CET features configured (Shadow sta !! 2309 Includes a loader for loading an elf relocatable object
>> 2310 onto another VPE and running it.
1846 2311
1847 config X86_KERNEL_IBT !! 2312 config MIPS_VPE_LOADER_CMP
1848 prompt "Indirect Branch Tracking" !! 2313 bool
1849 def_bool y !! 2314 default "y"
1850 depends on X86_64 && CC_HAS_IBT && HA !! 2315 depends on MIPS_VPE_LOADER && MIPS_CMP
1851 # https://github.com/llvm/llvm-projec <<
1852 depends on !LD_IS_LLD || LLD_VERSION <<
1853 select OBJTOOL <<
1854 select X86_CET <<
1855 help <<
1856 Build the kernel with support for I <<
1857 hardware support course-grain forwa <<
1858 protection. It enforces that all in <<
1859 an ENDBR instruction, as such, the <<
1860 code with them to make this happen. <<
1861 <<
1862 In addition to building the kernel <<
1863 are not indirect call targets, avoi <<
1864 <<
1865 This requires LTO like objtool runs <<
1866 does significantly reduce the numbe <<
1867 kernel image. <<
1868 2316
1869 config X86_INTEL_MEMORY_PROTECTION_KEYS !! 2317 config MIPS_VPE_LOADER_MT
1870 prompt "Memory Protection Keys" !! 2318 bool
1871 def_bool y !! 2319 default "y"
1872 # Note: only available in 64-bit mode !! 2320 depends on MIPS_VPE_LOADER && !MIPS_CMP
1873 depends on X86_64 && (CPU_SUP_INTEL | !! 2321
1874 select ARCH_USES_HIGH_VMA_FLAGS !! 2322 config MIPS_VPE_LOADER_TOM
1875 select ARCH_HAS_PKEYS !! 2323 bool "Load VPE program into memory hidden from linux"
>> 2324 depends on MIPS_VPE_LOADER
>> 2325 default y
1876 help 2326 help
1877 Memory Protection Keys provides a m !! 2327 The loader can use memory that is present but has been hidden from
1878 page-based protections, but without !! 2328 Linux using the kernel command line option "mem=xxMB". It's up to
1879 page tables when an application cha !! 2329 you to ensure the amount you put in the option and the space your
>> 2330 program requires is less or equal to the amount physically present.
1880 2331
1881 For details, see Documentation/core !! 2332 config MIPS_VPE_APSP_API
>> 2333 bool "Enable support for AP/SP API (RTLX)"
>> 2334 depends on MIPS_VPE_LOADER
>> 2335 help
1882 2336
1883 If unsure, say y. !! 2337 config MIPS_VPE_APSP_API_CMP
>> 2338 bool
>> 2339 default "y"
>> 2340 depends on MIPS_VPE_APSP_API && MIPS_CMP
1884 2341
1885 config ARCH_PKEY_BITS !! 2342 config MIPS_VPE_APSP_API_MT
1886 int !! 2343 bool
1887 default 4 !! 2344 default "y"
>> 2345 depends on MIPS_VPE_APSP_API && !MIPS_CMP
1888 2346
1889 choice !! 2347 config MIPS_CMP
1890 prompt "TSX enable mode" !! 2348 bool "MIPS CMP framework support (DEPRECATED)"
1891 depends on CPU_SUP_INTEL !! 2349 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
1892 default X86_INTEL_TSX_MODE_OFF !! 2350 select SMP
>> 2351 select SYNC_R4K
>> 2352 select SYS_SUPPORTS_SMP
>> 2353 select WEAK_ORDERING
>> 2354 default n
1893 help 2355 help
1894 Intel's TSX (Transactional Synchron !! 2356 Select this if you are using a bootloader which implements the "CMP
1895 allows to optimize locking protocol !! 2357 framework" protocol (ie. YAMON) and want your kernel to make use of
1896 can lead to a noticeable performanc !! 2358 its ability to start secondary CPUs.
>> 2359
>> 2360 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2361 instead of this.
>> 2362
>> 2363 config MIPS_CPS
>> 2364 bool "MIPS Coherent Processing System support"
>> 2365 depends on SYS_SUPPORTS_MIPS_CPS
>> 2366 select MIPS_CM
>> 2367 select MIPS_CPC
>> 2368 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2369 select SMP
>> 2370 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2371 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2372 select SYS_SUPPORTS_SMP
>> 2373 select WEAK_ORDERING
>> 2374 help
>> 2375 Select this if you wish to run an SMP kernel across multiple cores
>> 2376 within a MIPS Coherent Processing System. When this option is
>> 2377 enabled the kernel will probe for other cores and boot them with
>> 2378 no external assistance. It is safe to enable this when hardware
>> 2379 support is unavailable.
>> 2380
>> 2381 config MIPS_CPS_PM
>> 2382 depends on MIPS_CPS
>> 2383 select MIPS_CPC
>> 2384 bool
1897 2385
1898 On the other hand it has been shown !! 2386 config MIPS_CM
1899 to form side channel attacks (e.g. !! 2387 bool
1900 will be more of those attacks disco <<
1901 2388
1902 Therefore TSX is not enabled by def !! 2389 config MIPS_CPC
1903 might override this decision by tsx !! 2390 bool
1904 Even with TSX enabled, the kernel w <<
1905 possible TAA mitigation setting dep <<
1906 for the particular machine. <<
1907 2391
1908 This option allows to set the defau !! 2392 config SB1_PASS_2_WORKAROUNDS
1909 and =auto. See Documentation/admin- !! 2393 bool
1910 details. !! 2394 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2395 default y
1911 2396
1912 Say off if not sure, auto if TSX is !! 2397 config SB1_PASS_2_1_WORKAROUNDS
1913 platforms or on if TSX is in use an !! 2398 bool
1914 relevant. !! 2399 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2400 default y
1915 2401
1916 config X86_INTEL_TSX_MODE_OFF <<
1917 bool "off" <<
1918 help <<
1919 TSX is disabled if possible - equal <<
1920 2402
1921 config X86_INTEL_TSX_MODE_ON !! 2403 config ARCH_PHYS_ADDR_T_64BIT
1922 bool "on" !! 2404 bool
>> 2405
>> 2406 choice
>> 2407 prompt "SmartMIPS or microMIPS ASE support"
>> 2408
>> 2409 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2410 bool "None"
1923 help 2411 help
1924 TSX is always enabled on TSX capabl !! 2412 Select this if you want neither microMIPS nor SmartMIPS support
1925 line parameter. <<
1926 2413
1927 config X86_INTEL_TSX_MODE_AUTO !! 2414 config CPU_HAS_SMARTMIPS
1928 bool "auto" !! 2415 depends on SYS_SUPPORTS_SMARTMIPS
>> 2416 bool "SmartMIPS"
>> 2417 help
>> 2418 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2419 increased security at both hardware and software level for
>> 2420 smartcards. Enabling this option will allow proper use of the
>> 2421 SmartMIPS instructions by Linux applications. However a kernel with
>> 2422 this option will not work on a MIPS core without SmartMIPS core. If
>> 2423 you don't know you probably don't have SmartMIPS and should say N
>> 2424 here.
>> 2425
>> 2426 config CPU_MICROMIPS
>> 2427 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2428 bool "microMIPS"
1929 help 2429 help
1930 TSX is enabled on TSX capable HW th !! 2430 When this option is enabled the kernel will be built using the
1931 side channel attacks- equals the ts !! 2431 microMIPS ISA
>> 2432
1932 endchoice 2433 endchoice
1933 2434
1934 config X86_SGX !! 2435 config CPU_HAS_MSA
1935 bool "Software Guard eXtensions (SGX) !! 2436 bool "Support for the MIPS SIMD Architecture"
1936 depends on X86_64 && CPU_SUP_INTEL && !! 2437 depends on CPU_SUPPORTS_MSA
1937 depends on CRYPTO=y !! 2438 depends on 64BIT || MIPS_O32_FP64_SUPPORT
1938 depends on CRYPTO_SHA256=y !! 2439 help
1939 select MMU_NOTIFIER !! 2440 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
1940 select NUMA_KEEP_MEMINFO if NUMA !! 2441 and a set of SIMD instructions to operate on them. When this option
1941 select XARRAY_MULTI !! 2442 is enabled the kernel will support allocating & switching MSA
1942 help !! 2443 vector register contexts. If you know that your kernel will only be
1943 Intel(R) Software Guard eXtensions !! 2444 running on CPUs which do not support MSA or that your userland will
1944 that can be used by applications to !! 2445 not be making use of it then you may wish to say N here to reduce
1945 and data, referred to as enclaves. !! 2446 the size & complexity of your kernel.
1946 only be accessed by code running wi <<
1947 outside the enclave, including othe <<
1948 hardware. <<
1949 2447
1950 If unsure, say N. !! 2448 If unsure, say Y.
1951 2449
1952 config X86_USER_SHADOW_STACK !! 2450 config CPU_HAS_WB
1953 bool "X86 userspace shadow stack" !! 2451 bool
1954 depends on AS_WRUSS <<
1955 depends on X86_64 <<
1956 select ARCH_USES_HIGH_VMA_FLAGS <<
1957 select X86_CET <<
1958 help <<
1959 Shadow stack protection is a hardwa <<
1960 return address corruption. This he <<
1961 Applications must be enabled to use <<
1962 get protection "for free". <<
1963 2452
1964 CPUs supporting shadow stacks were !! 2453 config XKS01
>> 2454 bool
1965 2455
1966 See Documentation/arch/x86/shstk.rs !! 2456 config CPU_HAS_RIXI
>> 2457 bool
1967 2458
1968 If unsure, say N. !! 2459 #
>> 2460 # Vectored interrupt mode is an R2 feature
>> 2461 #
>> 2462 config CPU_MIPSR2_IRQ_VI
>> 2463 bool
1969 2464
1970 config INTEL_TDX_HOST !! 2465 #
1971 bool "Intel Trust Domain Extensions ( !! 2466 # Extended interrupt mode is an R2 feature
1972 depends on CPU_SUP_INTEL !! 2467 #
1973 depends on X86_64 !! 2468 config CPU_MIPSR2_IRQ_EI
1974 depends on KVM_INTEL !! 2469 bool
1975 depends on X86_X2APIC <<
1976 select ARCH_KEEP_MEMBLOCK <<
1977 depends on CONTIG_ALLOC <<
1978 depends on !KEXEC_CORE <<
1979 depends on X86_MCE <<
1980 help <<
1981 Intel Trust Domain Extensions (TDX) <<
1982 host and certain physical attacks. <<
1983 support in the host kernel to run c <<
1984 2470
1985 If unsure, say N. !! 2471 config CPU_HAS_SYNC
>> 2472 bool
>> 2473 depends on !CPU_R3000
>> 2474 default y
1986 2475
1987 config EFI !! 2476 #
1988 bool "EFI runtime service support" !! 2477 # CPU non-features
1989 depends on ACPI !! 2478 #
1990 select UCS2_STRING !! 2479 config CPU_DADDI_WORKAROUNDS
1991 select EFI_RUNTIME_WRAPPERS !! 2480 bool
1992 select ARCH_USE_MEMREMAP_PROT <<
1993 select EFI_RUNTIME_MAP if KEXEC_CORE <<
1994 help <<
1995 This enables the kernel to use EFI <<
1996 available (such as the EFI variable <<
1997 <<
1998 This option is only useful on syste <<
1999 In addition, you should use the lat <<
2000 at <http://elilo.sourceforge.net> i <<
2001 of EFI runtime services. However, e <<
2002 resultant kernel should continue to <<
2003 platforms. <<
2004 <<
2005 config EFI_STUB <<
2006 bool "EFI stub support" <<
2007 depends on EFI <<
2008 select RELOCATABLE <<
2009 help <<
2010 This kernel feature allows a bzImag <<
2011 by EFI firmware without the use of <<
2012 <<
2013 See Documentation/admin-guide/efi-s <<
2014 <<
2015 config EFI_HANDOVER_PROTOCOL <<
2016 bool "EFI handover protocol (DEPRECAT <<
2017 depends on EFI_STUB <<
2018 default y <<
2019 help <<
2020 Select this in order to include sup <<
2021 handover protocol, which defines al <<
2022 EFI stub. This is a practice that <<
2023 specification, and requires a prior <<
2024 bootloader about Linux/x86 specific <<
2025 and initrd, and where in memory tho <<
2026 <<
2027 If in doubt, say Y. Even though the <<
2028 present in upstream GRUB or other b <<
2029 GRUB with numerous downstream patch <<
2030 handover protocol as as result. <<
2031 <<
2032 config EFI_MIXED <<
2033 bool "EFI mixed-mode support" <<
2034 depends on EFI_STUB && X86_64 <<
2035 help <<
2036 Enabling this feature allows a 64-b <<
2037 on a 32-bit firmware, provided that <<
2038 mode. <<
2039 2481
2040 Note that it is not possible to boo !! 2482 config CPU_R4000_WORKAROUNDS
2041 kernel via the EFI boot stub - a bo !! 2483 bool
2042 the EFI handover protocol must be u !! 2484 select CPU_R4400_WORKAROUNDS
2043 2485
2044 If unsure, say N. !! 2486 config CPU_R4400_WORKAROUNDS
>> 2487 bool
2045 2488
2046 config EFI_RUNTIME_MAP !! 2489 config MIPS_ASID_SHIFT
2047 bool "Export EFI runtime maps to sysf !! 2490 int
2048 depends on EFI !! 2491 default 6 if CPU_R3000 || CPU_TX39XX
2049 help !! 2492 default 4 if CPU_R8000
2050 Export EFI runtime memory regions t !! 2493 default 0
2051 That memory map is required by the <<
2052 mappings after kexec, but can also <<
2053 2494
2054 See also Documentation/ABI/testing/ !! 2495 config MIPS_ASID_BITS
>> 2496 int
>> 2497 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2498 default 6 if CPU_R3000 || CPU_TX39XX
>> 2499 default 8
2055 2500
2056 source "kernel/Kconfig.hz" !! 2501 config MIPS_ASID_BITS_VARIABLE
>> 2502 bool
2057 2503
2058 config ARCH_SUPPORTS_KEXEC !! 2504 #
2059 def_bool y !! 2505 # - Highmem only makes sense for the 32-bit kernel.
>> 2506 # - The current highmem code will only work properly on physically indexed
>> 2507 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2508 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2509 # moment we protect the user and offer the highmem option only on machines
>> 2510 # where it's known to be safe. This will not offer highmem on a few systems
>> 2511 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2512 # indexed CPUs but we're playing safe.
>> 2513 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2514 # know they might have memory configurations that could make use of highmem
>> 2515 # support.
>> 2516 #
>> 2517 config HIGHMEM
>> 2518 bool "High Memory Support"
>> 2519 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2060 2520
2061 config ARCH_SUPPORTS_KEXEC_FILE !! 2521 config CPU_SUPPORTS_HIGHMEM
2062 def_bool X86_64 !! 2522 bool
2063 2523
2064 config ARCH_SELECTS_KEXEC_FILE !! 2524 config SYS_SUPPORTS_HIGHMEM
2065 def_bool y !! 2525 bool
2066 depends on KEXEC_FILE <<
2067 select HAVE_IMA_KEXEC if IMA <<
2068 2526
2069 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2527 config SYS_SUPPORTS_SMARTMIPS
2070 def_bool y !! 2528 bool
2071 2529
2072 config ARCH_SUPPORTS_KEXEC_SIG !! 2530 config SYS_SUPPORTS_MICROMIPS
2073 def_bool y !! 2531 bool
2074 2532
2075 config ARCH_SUPPORTS_KEXEC_SIG_FORCE !! 2533 config SYS_SUPPORTS_MIPS16
2076 def_bool y !! 2534 bool
>> 2535 help
>> 2536 This option must be set if a kernel might be executed on a MIPS16-
>> 2537 enabled CPU even if MIPS16 is not actually being used. In other
>> 2538 words, it makes the kernel MIPS16-tolerant.
2077 2539
2078 config ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG !! 2540 config CPU_SUPPORTS_MSA
2079 def_bool y !! 2541 bool
2080 2542
2081 config ARCH_SUPPORTS_KEXEC_JUMP !! 2543 config ARCH_FLATMEM_ENABLE
2082 def_bool y 2544 def_bool y
>> 2545 depends on !NUMA && !CPU_LOONGSON2
2083 2546
2084 config ARCH_SUPPORTS_CRASH_DUMP !! 2547 config ARCH_DISCONTIGMEM_ENABLE
2085 def_bool X86_64 || (X86_32 && HIGHMEM !! 2548 bool
2086 !! 2549 default y if SGI_IP27
2087 config ARCH_SUPPORTS_CRASH_HOTPLUG !! 2550 help
2088 def_bool y !! 2551 Say Y to support efficient handling of discontiguous physical memory,
>> 2552 for architectures which are either NUMA (Non-Uniform Memory Access)
>> 2553 or have huge holes in the physical address space for other reasons.
>> 2554 See <file:Documentation/vm/numa> for more.
2089 2555
2090 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATI !! 2556 config ARCH_SPARSEMEM_ENABLE
2091 def_bool CRASH_RESERVE !! 2557 bool
>> 2558 select SPARSEMEM_STATIC
2092 2559
2093 config PHYSICAL_START !! 2560 config NUMA
2094 hex "Physical address where the kerne !! 2561 bool "NUMA Support"
2095 default "0x1000000" !! 2562 depends on SYS_SUPPORTS_NUMA
2096 help 2563 help
2097 This gives the physical address whe !! 2564 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2565 Access). This option improves performance on systems with more
>> 2566 than two nodes; on two node systems it is generally better to
>> 2567 leave it disabled; on single node systems disable this option
>> 2568 disabled.
2098 2569
2099 If the kernel is not relocatable (C !! 2570 config SYS_SUPPORTS_NUMA
2100 will decompress itself to above phy !! 2571 bool
2101 Otherwise, bzImage will run from th <<
2102 by the boot loader. The only except <<
2103 above physical address, in which ca <<
2104 <<
2105 In normal kdump cases one does not <<
2106 as now bzImage can be compiled as a <<
2107 (CONFIG_RELOCATABLE=y) and be used <<
2108 address. This option is mainly usef <<
2109 to use a bzImage for capturing the <<
2110 vmlinux instead. vmlinux is not rel <<
2111 to be specifically compiled to run <<
2112 (normally a reserved region) and th <<
2113 <<
2114 So if you are using bzImage for cap <<
2115 leave the value here unchanged to 0 <<
2116 CONFIG_RELOCATABLE=y. Otherwise if <<
2117 for capturing the crash dump change <<
2118 the reserved region. In other word <<
2119 the "X" value as specified in the " <<
2120 command line boot parameter passed <<
2121 kernel. Please take a look at Docum <<
2122 for more details about crash dumps. <<
2123 <<
2124 Usage of bzImage for capturing the <<
2125 one does not have to build two kern <<
2126 as production kernel and capture ke <<
2127 gone away after relocatable bzImage <<
2128 is present because there are users <<
2129 vmlinux for dump capture. This opti <<
2130 line. <<
2131 <<
2132 Don't change this unless you know w <<
2133 2572
2134 config RELOCATABLE 2573 config RELOCATABLE
2135 bool "Build a relocatable kernel" !! 2574 bool "Relocatable kernel"
2136 default y !! 2575 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
2137 help 2576 help
2138 This builds a kernel image that ret 2577 This builds a kernel image that retains relocation information
2139 so it can be loaded someplace besid 2578 so it can be loaded someplace besides the default 1MB.
2140 The relocations tend to make the ke !! 2579 The relocations make the kernel binary about 15% larger,
2141 but are discarded at runtime. !! 2580 but are discarded at runtime
>> 2581
>> 2582 config RELOCATION_TABLE_SIZE
>> 2583 hex "Relocation table size"
>> 2584 depends on RELOCATABLE
>> 2585 range 0x0 0x01000000
>> 2586 default "0x00100000"
>> 2587 ---help---
>> 2588 A table of relocation data will be appended to the kernel binary
>> 2589 and parsed at boot to fix up the relocated kernel.
2142 2590
2143 One use is for the kexec on panic c !! 2591 This option allows the amount of space reserved for the table to be
2144 must live at a different physical a !! 2592 adjusted, although the default of 1Mb should be ok in most cases.
2145 kernel. !! 2593
2146 !! 2594 The build will fail and a valid size suggested if this is too small.
2147 Note: If CONFIG_RELOCATABLE=y, then !! 2595
2148 it has been loaded at and the compi !! 2596 If unsure, leave at the default value.
2149 (CONFIG_PHYSICAL_START) is used as <<
2150 2597
2151 config RANDOMIZE_BASE 2598 config RANDOMIZE_BASE
2152 bool "Randomize the address of the ke !! 2599 bool "Randomize the address of the kernel image"
2153 depends on RELOCATABLE 2600 depends on RELOCATABLE
2154 default y !! 2601 ---help---
2155 help !! 2602 Randomizes the physical and virtual address at which the
2156 In support of Kernel Address Space !! 2603 kernel image is loaded, as a security feature that
2157 this randomizes the physical addres !! 2604 deters exploit attempts relying on knowledge of the location
2158 is decompressed and the virtual add !! 2605 of kernel internals.
2159 image is mapped, as a security feat <<
2160 attempts relying on knowledge of th <<
2161 code internals. <<
2162 <<
2163 On 64-bit, the kernel physical and <<
2164 randomized separately. The physical <<
2165 between 16MB and the top of physica <<
2166 virtual address will be randomized <<
2167 of entropy). Note that this also re <<
2168 available to kernel modules from 1. <<
2169 <<
2170 On 32-bit, the kernel physical and <<
2171 randomized together. They will be r <<
2172 512MB (8 bits of entropy). <<
2173 <<
2174 Entropy is generated using the RDRA <<
2175 supported. If RDTSC is supported, i <<
2176 the entropy pool as well. If neithe <<
2177 supported, then entropy is read fro <<
2178 usable entropy is limited by the ke <<
2179 2GB addressing, and that PHYSICAL_A <<
2180 minimum of 2MB. As a result, only 1 <<
2181 theoretically possible, but the imp <<
2182 limited due to memory layouts. <<
2183 2606
2184 If unsure, say Y. !! 2607 Entropy is generated using any coprocessor 0 registers available.
2185 2608
2186 # Relocation on x86 needs some additional bui !! 2609 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2187 config X86_NEED_RELOCS <<
2188 def_bool y <<
2189 depends on RANDOMIZE_BASE || (X86_32 <<
2190 2610
2191 config PHYSICAL_ALIGN !! 2611 If unsure, say N.
2192 hex "Alignment value to which kernel <<
2193 default "0x200000" <<
2194 range 0x2000 0x1000000 if X86_32 <<
2195 range 0x200000 0x1000000 if X86_64 <<
2196 help <<
2197 This value puts the alignment restr <<
2198 where kernel is loaded and run from <<
2199 address which meets above alignment <<
2200 <<
2201 If bootloader loads the kernel at a <<
2202 CONFIG_RELOCATABLE is set, kernel w <<
2203 address aligned to above value and <<
2204 2612
2205 If bootloader loads the kernel at a !! 2613 config RANDOMIZE_BASE_MAX_OFFSET
2206 CONFIG_RELOCATABLE is not set, kern !! 2614 hex "Maximum kASLR offset" if EXPERT
2207 load address and decompress itself !! 2615 depends on RANDOMIZE_BASE
2208 compiled for and run from there. Th !! 2616 range 0x0 0x40000000 if EVA || 64BIT
2209 compiled already meets above alignm !! 2617 range 0x0 0x08000000
2210 end result is that kernel runs from !! 2618 default "0x01000000"
2211 above alignment restrictions. !! 2619 ---help---
>> 2620 When kASLR is active, this provides the maximum offset that will
>> 2621 be applied to the kernel image. It should be set according to the
>> 2622 amount of physical RAM available in the target system minus
>> 2623 PHYSICAL_START and must be a power of 2.
2212 2624
2213 On 32-bit this value must be a mult !! 2625 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2214 this value must be a multiple of 0x !! 2626 EVA or 64-bit. The default is 16Mb.
2215 2627
2216 Don't change this unless you know w !! 2628 config NODES_SHIFT
>> 2629 int
>> 2630 default "6"
>> 2631 depends on NEED_MULTIPLE_NODES
2217 2632
2218 config DYNAMIC_MEMORY_LAYOUT !! 2633 config HW_PERF_EVENTS
2219 bool !! 2634 bool "Enable hardware performance counter support for perf events"
>> 2635 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
>> 2636 default y
2220 help 2637 help
2221 This option makes base addresses of !! 2638 Enable hardware performance counter support for perf events. If
2222 __PAGE_OFFSET movable during boot. !! 2639 disabled, perf events will use software events only.
2223 2640
2224 config RANDOMIZE_MEMORY !! 2641 source "mm/Kconfig"
2225 bool "Randomize the kernel memory sec <<
2226 depends on X86_64 <<
2227 depends on RANDOMIZE_BASE <<
2228 select DYNAMIC_MEMORY_LAYOUT <<
2229 default RANDOMIZE_BASE <<
2230 help <<
2231 Randomizes the base virtual address <<
2232 (physical memory mapping, vmalloc & <<
2233 makes exploits relying on predictab <<
2234 <<
2235 The order of allocations remains un <<
2236 the same way as RANDOMIZE_BASE. Cur <<
2237 configuration have in average 30,00 <<
2238 addresses for each memory section. <<
2239 2642
2240 If unsure, say Y. !! 2643 config SMP
>> 2644 bool "Multi-Processing support"
>> 2645 depends on SYS_SUPPORTS_SMP
>> 2646 help
>> 2647 This enables support for systems with more than one CPU. If you have
>> 2648 a system with only one CPU, say N. If you have a system with more
>> 2649 than one CPU, say Y.
2241 2650
2242 config RANDOMIZE_MEMORY_PHYSICAL_PADDING !! 2651 If you say N here, the kernel will run on uni- and multiprocessor
2243 hex "Physical memory mapping padding" !! 2652 machines, but will use only one CPU of a multiprocessor machine. If
2244 depends on RANDOMIZE_MEMORY !! 2653 you say Y here, the kernel will run on many, but not all,
2245 default "0xa" if MEMORY_HOTPLUG !! 2654 uniprocessor machines. On a uniprocessor machine, the kernel
2246 default "0x0" !! 2655 will run faster if you say N here.
2247 range 0x1 0x40 if MEMORY_HOTPLUG <<
2248 range 0x0 0x40 <<
2249 help <<
2250 Define the padding in terabytes add <<
2251 memory size during kernel memory ra <<
2252 for memory hotplug support but redu <<
2253 address randomization. <<
2254 2656
2255 If unsure, leave at the default val !! 2657 People using multiprocessor machines who say Y here should also say
>> 2658 Y to "Enhanced Real Time Clock Support", below.
2256 2659
2257 config ADDRESS_MASKING !! 2660 See also the SMP-HOWTO available at
2258 bool "Linear Address Masking support" !! 2661 <http://www.tldp.org/docs.html#howto>.
2259 depends on X86_64 <<
2260 depends on COMPILE_TEST || !CPU_MITIG <<
2261 help <<
2262 Linear Address Masking (LAM) modifi <<
2263 to 64-bit linear addresses, allowin <<
2264 untranslated address bits for metad <<
2265 2662
2266 The capability can be used for effi !! 2663 If you don't know what to do here, say N.
2267 implementation and for optimization <<
2268 2664
2269 config HOTPLUG_CPU 2665 config HOTPLUG_CPU
2270 def_bool y !! 2666 bool "Support for hot-pluggable CPUs"
2271 depends on SMP !! 2667 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2272 <<
2273 config COMPAT_VDSO <<
2274 def_bool n <<
2275 prompt "Disable the 32-bit vDSO (need <<
2276 depends on COMPAT_32 <<
2277 help 2668 help
2278 Certain buggy versions of glibc wil !! 2669 Say Y here to allow turning CPUs off and on. CPUs can be
2279 presented with a 32-bit vDSO that i !! 2670 controlled through /sys/devices/system/cpu.
2280 indicated in its segment table. !! 2671 (Note: power management support will enable this option
2281 !! 2672 automatically on SMP systems. )
2282 The bug was introduced by f866314b8 !! 2673 Say N if you want to disable CPU hotplug.
2283 and fixed by 3b3ddb4f7db98ec9e912cc <<
2284 49ad572a70b8aeb91e57483a11dd1b77e31 <<
2285 the only released version with the <<
2286 contains a buggy "glibc 2.3.2". <<
2287 <<
2288 The symptom of the bug is that ever <<
2289 dl_main: Assertion `(void *) ph->p_ <<
2290 <<
2291 Saying Y here changes the default v <<
2292 option from 1 to 0, which turns off <<
2293 This works around the glibc bug but <<
2294 2674
2295 If unsure, say N: if you are compil !! 2675 config SMP_UP
2296 are unlikely to be using a buggy ve !! 2676 bool
2297 2677
2298 choice !! 2678 config SYS_SUPPORTS_MIPS_CMP
2299 prompt "vsyscall table for legacy app !! 2679 bool
2300 depends on X86_64 <<
2301 default LEGACY_VSYSCALL_XONLY <<
2302 help <<
2303 Legacy user code that does not know <<
2304 to be able to issue three syscalls <<
2305 kernel space. Since this location i <<
2306 it can be used to assist security v <<
2307 <<
2308 This setting can be changed at boot <<
2309 line parameter vsyscall=[emulate|xo <<
2310 is deprecated and can only be enabl <<
2311 line. <<
2312 <<
2313 On a system with recent enough glib <<
2314 static binaries, you can say None w <<
2315 to improve security. <<
2316 2680
2317 If unsure, select "Emulate executio !! 2681 config SYS_SUPPORTS_MIPS_CPS
>> 2682 bool
2318 2683
2319 config LEGACY_VSYSCALL_XONLY !! 2684 config SYS_SUPPORTS_SMP
2320 bool "Emulate execution only" !! 2685 bool
2321 help <<
2322 The kernel traps and emulat <<
2323 address mapping and does no <<
2324 configuration is recommende <<
2325 legacy vsyscall area but su <<
2326 instrumentation of legacy c <<
2327 certain uses of the vsyscal <<
2328 buffer. <<
2329 2686
2330 config LEGACY_VSYSCALL_NONE !! 2687 config NR_CPUS_DEFAULT_4
2331 bool "None" !! 2688 bool
2332 help <<
2333 There will be no vsyscall m <<
2334 eliminate any risk of ASLR <<
2335 fixed address mapping. Atte <<
2336 will be reported to dmesg, <<
2337 malicious userspace program <<
2338 2689
2339 endchoice !! 2690 config NR_CPUS_DEFAULT_8
>> 2691 bool
2340 2692
2341 config CMDLINE_BOOL !! 2693 config NR_CPUS_DEFAULT_16
2342 bool "Built-in kernel command line" !! 2694 bool
2343 help <<
2344 Allow for specifying boot arguments <<
2345 build time. On some systems (e.g. <<
2346 necessary or convenient to provide <<
2347 kernel boot arguments with the kern <<
2348 to not rely on the boot loader to p <<
2349 2695
2350 To compile command line arguments i !! 2696 config NR_CPUS_DEFAULT_32
2351 set this option to 'Y', then fill i !! 2697 bool
2352 boot arguments in CONFIG_CMDLINE. <<
2353 2698
2354 Systems with fully functional boot !! 2699 config NR_CPUS_DEFAULT_64
2355 should leave this option set to 'N' !! 2700 bool
2356 2701
2357 config CMDLINE !! 2702 config NR_CPUS
2358 string "Built-in kernel command strin !! 2703 int "Maximum number of CPUs (2-256)"
2359 depends on CMDLINE_BOOL !! 2704 range 2 256
2360 default "" !! 2705 depends on SMP
>> 2706 default "4" if NR_CPUS_DEFAULT_4
>> 2707 default "8" if NR_CPUS_DEFAULT_8
>> 2708 default "16" if NR_CPUS_DEFAULT_16
>> 2709 default "32" if NR_CPUS_DEFAULT_32
>> 2710 default "64" if NR_CPUS_DEFAULT_64
2361 help 2711 help
2362 Enter arguments here that should be !! 2712 This allows you to specify the maximum number of CPUs which this
2363 image and used at boot time. If th !! 2713 kernel will support. The maximum supported value is 32 for 32-bit
2364 command line at boot time, it is ap !! 2714 kernel and 64 for 64-bit kernels; the minimum value which makes
2365 form the full kernel command line, !! 2715 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2716 and 2 for all others.
>> 2717
>> 2718 This is purely to save memory - each supported CPU adds
>> 2719 approximately eight kilobytes to the kernel image. For best
>> 2720 performance should round up your number of processors to the next
>> 2721 power of two.
2366 2722
2367 However, you can use the CONFIG_CMD !! 2723 config MIPS_PERF_SHARED_TC_COUNTERS
2368 change this behavior. !! 2724 bool
2369 2725
2370 In most cases, the command line (wh !! 2726 #
2371 by the boot loader) should specify !! 2727 # Timer Interrupt Frequency Configuration
2372 file system. !! 2728 #
2373 2729
2374 config CMDLINE_OVERRIDE !! 2730 choice
2375 bool "Built-in command line overrides !! 2731 prompt "Timer frequency"
2376 depends on CMDLINE_BOOL && CMDLINE != !! 2732 default HZ_250
2377 help 2733 help
2378 Set this option to 'Y' to have the !! 2734 Allows the configuration of the timer frequency.
2379 command line, and use ONLY the buil <<
2380 2735
2381 This is used to work around broken !! 2736 config HZ_24
2382 be set to 'N' under normal conditio !! 2737 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2383 2738
2384 config MODIFY_LDT_SYSCALL !! 2739 config HZ_48
2385 bool "Enable the LDT (local descripto !! 2740 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2386 default y <<
2387 help <<
2388 Linux can allow user programs to in <<
2389 Local Descriptor Table (LDT) using <<
2390 call. This is required to run 16-b <<
2391 DOSEMU or some Wine programs. It i <<
2392 threading libraries. <<
2393 2741
2394 Enabling this feature adds a small !! 2742 config HZ_100
2395 context switches and increases the !! 2743 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2396 surface. Disabling it removes the <<
2397 2744
2398 Saying 'N' here may make sense for !! 2745 config HZ_128
>> 2746 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2399 2747
2400 config STRICT_SIGALTSTACK_SIZE !! 2748 config HZ_250
2401 bool "Enforce strict size checking fo !! 2749 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2402 depends on DYNAMIC_SIGFRAME <<
2403 help <<
2404 For historical reasons MINSIGSTKSZ <<
2405 already too small with AVX512 suppo <<
2406 enforce strict checking of the siga <<
2407 real size of the FPU frame. This op <<
2408 by default. It can also be controll <<
2409 line option 'strict_sas_size' indep <<
2410 switch. Enabling it might break exi <<
2411 allocate a too small sigaltstack bu <<
2412 never get a signal delivered. <<
2413 2750
2414 Say 'N' unless you want to really e !! 2751 config HZ_256
>> 2752 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2415 2753
2416 config CFI_AUTO_DEFAULT !! 2754 config HZ_1000
2417 bool "Attempt to use FineIBT by defau !! 2755 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2418 depends on FINEIBT <<
2419 default y <<
2420 help <<
2421 Attempt to use FineIBT by default a <<
2422 this is the same as booting with "c <<
2423 this is the same as booting with "c <<
2424 2756
2425 source "kernel/livepatch/Kconfig" !! 2757 config HZ_1024
>> 2758 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2426 2759
2427 endmenu !! 2760 endchoice
2428 2761
2429 config CC_HAS_NAMED_AS !! 2762 config SYS_SUPPORTS_24HZ
2430 def_bool $(success,echo 'int __seg_fs !! 2763 bool
2431 depends on CC_IS_GCC <<
2432 2764
2433 config CC_HAS_NAMED_AS_FIXED_SANITIZERS !! 2765 config SYS_SUPPORTS_48HZ
2434 def_bool CC_IS_GCC && GCC_VERSION >= !! 2766 bool
2435 2767
2436 config USE_X86_SEG_SUPPORT !! 2768 config SYS_SUPPORTS_100HZ
2437 def_bool y !! 2769 bool
2438 depends on CC_HAS_NAMED_AS <<
2439 # <<
2440 # -fsanitize=kernel-address (KASAN) a <<
2441 # (KCSAN) are incompatible with named <<
2442 # GCC < 13.3 - see GCC PR sanitizer/1 <<
2443 # <<
2444 depends on !(KASAN || KCSAN) || CC_HA <<
2445 2770
2446 config CC_HAS_SLS !! 2771 config SYS_SUPPORTS_128HZ
2447 def_bool $(cc-option,-mharden-sls=all !! 2772 bool
2448 2773
2449 config CC_HAS_RETURN_THUNK !! 2774 config SYS_SUPPORTS_250HZ
2450 def_bool $(cc-option,-mfunction-retur !! 2775 bool
2451 2776
2452 config CC_HAS_ENTRY_PADDING !! 2777 config SYS_SUPPORTS_256HZ
2453 def_bool $(cc-option,-fpatchable-func !! 2778 bool
2454 2779
2455 config FUNCTION_PADDING_CFI !! 2780 config SYS_SUPPORTS_1000HZ
2456 int !! 2781 bool
2457 default 59 if FUNCTION_ALIGNMENT_64B <<
2458 default 27 if FUNCTION_ALIGNMENT_32B <<
2459 default 11 if FUNCTION_ALIGNMENT_16B <<
2460 default 3 if FUNCTION_ALIGNMENT_8B <<
2461 default 0 <<
2462 <<
2463 # Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG <<
2464 # except Kconfig can't do arithmetic :/ <<
2465 config FUNCTION_PADDING_BYTES <<
2466 int <<
2467 default FUNCTION_PADDING_CFI if CFI_C <<
2468 default FUNCTION_ALIGNMENT <<
2469 2782
2470 config CALL_PADDING !! 2783 config SYS_SUPPORTS_1024HZ
2471 def_bool n !! 2784 bool
2472 depends on CC_HAS_ENTRY_PADDING && OB <<
2473 select FUNCTION_ALIGNMENT_16B <<
2474 2785
2475 config FINEIBT !! 2786 config SYS_SUPPORTS_ARBIT_HZ
2476 def_bool y !! 2787 bool
2477 depends on X86_KERNEL_IBT && CFI_CLAN !! 2788 default y if !SYS_SUPPORTS_24HZ && \
2478 select CALL_PADDING !! 2789 !SYS_SUPPORTS_48HZ && \
>> 2790 !SYS_SUPPORTS_100HZ && \
>> 2791 !SYS_SUPPORTS_128HZ && \
>> 2792 !SYS_SUPPORTS_250HZ && \
>> 2793 !SYS_SUPPORTS_256HZ && \
>> 2794 !SYS_SUPPORTS_1000HZ && \
>> 2795 !SYS_SUPPORTS_1024HZ
2479 2796
2480 config HAVE_CALL_THUNKS !! 2797 config HZ
2481 def_bool y !! 2798 int
2482 depends on CC_HAS_ENTRY_PADDING && MI !! 2799 default 24 if HZ_24
>> 2800 default 48 if HZ_48
>> 2801 default 100 if HZ_100
>> 2802 default 128 if HZ_128
>> 2803 default 250 if HZ_250
>> 2804 default 256 if HZ_256
>> 2805 default 1000 if HZ_1000
>> 2806 default 1024 if HZ_1024
>> 2807
>> 2808 config SCHED_HRTICK
>> 2809 def_bool HIGH_RES_TIMERS
>> 2810
>> 2811 source "kernel/Kconfig.preempt"
>> 2812
>> 2813 config KEXEC
>> 2814 bool "Kexec system call"
>> 2815 select KEXEC_CORE
>> 2816 help
>> 2817 kexec is a system call that implements the ability to shutdown your
>> 2818 current kernel, and to start another kernel. It is like a reboot
>> 2819 but it is independent of the system firmware. And like a reboot
>> 2820 you can start any kernel with it, not just Linux.
>> 2821
>> 2822 The name comes from the similarity to the exec system call.
>> 2823
>> 2824 It is an ongoing process to be certain the hardware in a machine
>> 2825 is properly shutdown, so do not be surprised if this code does not
>> 2826 initially work for you. As of this writing the exact hardware
>> 2827 interface is strongly in flux, so no good recommendation can be
>> 2828 made.
>> 2829
>> 2830 config CRASH_DUMP
>> 2831 bool "Kernel crash dumps"
>> 2832 help
>> 2833 Generate crash dump after being started by kexec.
>> 2834 This should be normally only set in special crash dump kernels
>> 2835 which are loaded in the main kernel with kexec-tools into
>> 2836 a specially reserved region and then later executed after
>> 2837 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2838 to a memory address not used by the main kernel or firmware using
>> 2839 PHYSICAL_START.
2483 2840
2484 config CALL_THUNKS !! 2841 config PHYSICAL_START
2485 def_bool n !! 2842 hex "Physical address where the kernel is loaded"
2486 select CALL_PADDING !! 2843 default "0xffffffff84000000" if 64BIT
>> 2844 default "0x84000000" if 32BIT
>> 2845 depends on CRASH_DUMP
>> 2846 help
>> 2847 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2848 If you plan to use kernel for capturing the crash dump change
>> 2849 this value to start of the reserved region (the "X" value as
>> 2850 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2851 passed to the panic-ed kernel).
>> 2852
>> 2853 config SECCOMP
>> 2854 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2855 depends on PROC_FS
>> 2856 default y
>> 2857 help
>> 2858 This kernel feature is useful for number crunching applications
>> 2859 that may need to compute untrusted bytecode during their
>> 2860 execution. By using pipes or other transports made available to
>> 2861 the process as file descriptors supporting the read/write
>> 2862 syscalls, it's possible to isolate those applications in
>> 2863 their own address space using seccomp. Once seccomp is
>> 2864 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2865 and the task is only allowed to execute a few safe syscalls
>> 2866 defined by each seccomp mode.
>> 2867
>> 2868 If unsure, say Y. Only embedded should say N here.
>> 2869
>> 2870 config MIPS_O32_FP64_SUPPORT
>> 2871 bool "Support for O32 binaries using 64-bit FP"
>> 2872 depends on 32BIT || MIPS32_O32
>> 2873 help
>> 2874 When this is enabled, the kernel will support use of 64-bit floating
>> 2875 point registers with binaries using the O32 ABI along with the
>> 2876 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2877 32-bit MIPS systems this support is at the cost of increasing the
>> 2878 size and complexity of the compiled FPU emulator. Thus if you are
>> 2879 running a MIPS32 system and know that none of your userland binaries
>> 2880 will require 64-bit floating point, you may wish to reduce the size
>> 2881 of your kernel & potentially improve FP emulation performance by
>> 2882 saying N here.
>> 2883
>> 2884 Although binutils currently supports use of this flag the details
>> 2885 concerning its effect upon the O32 ABI in userland are still being
>> 2886 worked on. In order to avoid userland becoming dependant upon current
>> 2887 behaviour before the details have been finalised, this option should
>> 2888 be considered experimental and only enabled by those working upon
>> 2889 said details.
2487 2890
2488 config PREFIX_SYMBOLS !! 2891 If unsure, say N.
2489 def_bool y <<
2490 depends on CALL_PADDING && !CFI_CLANG <<
2491 2892
2492 menuconfig CPU_MITIGATIONS !! 2893 config USE_OF
2493 bool "Mitigations for CPU vulnerabili !! 2894 bool
2494 default y !! 2895 select OF
2495 help !! 2896 select OF_EARLY_FLATTREE
2496 Say Y here to enable options which !! 2897 select IRQ_DOMAIN
2497 vulnerabilities (usually related to <<
2498 Mitigations can be disabled or rest <<
2499 via the "mitigations" kernel parame <<
2500 2898
2501 If you say N, all mitigations will !! 2899 config BUILTIN_DTB
2502 overridden at runtime. !! 2900 bool
2503 2901
2504 Say 'Y', unless you really know wha !! 2902 choice
>> 2903 prompt "Kernel appended dtb support" if USE_OF
>> 2904 default MIPS_NO_APPENDED_DTB
2505 2905
2506 if CPU_MITIGATIONS !! 2906 config MIPS_NO_APPENDED_DTB
>> 2907 bool "None"
>> 2908 help
>> 2909 Do not enable appended dtb support.
2507 2910
2508 config MITIGATION_PAGE_TABLE_ISOLATION !! 2911 config MIPS_ELF_APPENDED_DTB
2509 bool "Remove the kernel mapping in us !! 2912 bool "vmlinux"
2510 default y !! 2913 help
2511 depends on (X86_64 || X86_PAE) !! 2914 With this option, the boot code will look for a device tree binary
2512 help !! 2915 DTB) included in the vmlinux ELF section .appended_dtb. By default
2513 This feature reduces the number of !! 2916 it is empty and the DTB can be appended using binutils command
2514 ensuring that the majority of kerne !! 2917 objcopy:
2515 into userspace. !! 2918
>> 2919 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 2920
>> 2921 This is meant as a backward compatiblity convenience for those
>> 2922 systems with a bootloader that can't be upgraded to accommodate
>> 2923 the documented boot protocol using a device tree.
2516 2924
2517 See Documentation/arch/x86/pti.rst !! 2925 config MIPS_RAW_APPENDED_DTB
>> 2926 bool "vmlinux.bin or vmlinuz.bin"
>> 2927 help
>> 2928 With this option, the boot code will look for a device tree binary
>> 2929 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2930 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2931
>> 2932 This is meant as a backward compatibility convenience for those
>> 2933 systems with a bootloader that can't be upgraded to accommodate
>> 2934 the documented boot protocol using a device tree.
>> 2935
>> 2936 Beware that there is very little in terms of protection against
>> 2937 this option being confused by leftover garbage in memory that might
>> 2938 look like a DTB header after a reboot if no actual DTB is appended
>> 2939 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2940 if you don't intend to always append a DTB.
>> 2941 endchoice
2518 2942
2519 config MITIGATION_RETPOLINE !! 2943 choice
2520 bool "Avoid speculative indirect bran !! 2944 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
2521 select OBJTOOL if HAVE_OBJTOOL !! 2945 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
2522 default y !! 2946 !MIPS_MALTA && \
2523 help !! 2947 !CAVIUM_OCTEON_SOC
2524 Compile kernel with the retpoline c !! 2948 default MIPS_CMDLINE_FROM_BOOTLOADER
2525 kernel-to-user data leaks by avoidi !! 2949
2526 branches. Requires a compiler with !! 2950 config MIPS_CMDLINE_FROM_DTB
2527 support for full protection. The ke !! 2951 depends on USE_OF
>> 2952 bool "Dtb kernel arguments if available"
>> 2953
>> 2954 config MIPS_CMDLINE_DTB_EXTEND
>> 2955 depends on USE_OF
>> 2956 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2957
>> 2958 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2959 bool "Bootloader kernel arguments if available"
>> 2960
>> 2961 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 2962 depends on CMDLINE_BOOL
>> 2963 bool "Extend builtin kernel arguments with bootloader arguments"
>> 2964 endchoice
2528 2965
2529 config MITIGATION_RETHUNK !! 2966 endmenu
2530 bool "Enable return-thunks" <<
2531 depends on MITIGATION_RETPOLINE && CC <<
2532 select OBJTOOL if HAVE_OBJTOOL <<
2533 default y if X86_64 <<
2534 help <<
2535 Compile the kernel with the return- <<
2536 against kernel-to-user data leaks b <<
2537 Requires a compiler with -mfunction <<
2538 support for full protection. The ke <<
2539 2967
2540 config MITIGATION_UNRET_ENTRY !! 2968 config LOCKDEP_SUPPORT
2541 bool "Enable UNRET on kernel entry" !! 2969 bool
2542 depends on CPU_SUP_AMD && MITIGATION_ <<
2543 default y 2970 default y
2544 help <<
2545 Compile the kernel with support for <<
2546 2971
2547 config MITIGATION_CALL_DEPTH_TRACKING !! 2972 config STACKTRACE_SUPPORT
2548 bool "Mitigate RSB underflow with cal !! 2973 bool
2549 depends on CPU_SUP_INTEL && HAVE_CALL <<
2550 select HAVE_DYNAMIC_FTRACE_NO_PATCHAB <<
2551 select CALL_THUNKS <<
2552 default y 2974 default y
2553 help <<
2554 Compile the kernel with call depth <<
2555 SKL Return-Speculation-Buffer (RSB) <<
2556 mitigation is off by default and ne <<
2557 kernel command line via the retblee <<
2558 non-affected systems the overhead o <<
2559 the call depth tracking is using ru <<
2560 in a compiler generated padding are <<
2561 increases text size by ~5%. For non <<
2562 is unused. On affected SKL systems <<
2563 performance gain over the IBRS miti <<
2564 <<
2565 config CALL_THUNKS_DEBUG <<
2566 bool "Enable call thunks and call dep <<
2567 depends on MITIGATION_CALL_DEPTH_TRAC <<
2568 select FUNCTION_ALIGNMENT_32B <<
2569 default n <<
2570 help <<
2571 Enable call/ret counters for imbala <<
2572 a noisy dmesg about callthunks gene <<
2573 trouble shooting. The debug prints <<
2574 kernel command line with 'debug-cal <<
2575 Only enable this when you are debug <<
2576 creates a noticeable runtime overhe <<
2577 2975
2578 config MITIGATION_IBPB_ENTRY !! 2976 config HAVE_LATENCYTOP_SUPPORT
2579 bool "Enable IBPB on kernel entry" !! 2977 bool
2580 depends on CPU_SUP_AMD && X86_64 <<
2581 default y 2978 default y
2582 help <<
2583 Compile the kernel with support for <<
2584 2979
2585 config MITIGATION_IBRS_ENTRY !! 2980 config PGTABLE_LEVELS
2586 bool "Enable IBRS on kernel entry" !! 2981 int
2587 depends on CPU_SUP_INTEL && X86_64 !! 2982 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
2588 default y !! 2983 default 3 if 64BIT && !PAGE_SIZE_64KB
2589 help !! 2984 default 2
2590 Compile the kernel with support for <<
2591 This mitigates both spectre_v2 and <<
2592 performance. <<
2593 2985
2594 config MITIGATION_SRSO !! 2986 source "init/Kconfig"
2595 bool "Mitigate speculative RAS overfl <<
2596 depends on CPU_SUP_AMD && X86_64 && M <<
2597 default y <<
2598 help <<
2599 Enable the SRSO mitigation needed o <<
2600 2987
2601 config MITIGATION_SLS !! 2988 source "kernel/Kconfig.freezer"
2602 bool "Mitigate Straight-Line-Speculat <<
2603 depends on CC_HAS_SLS && X86_64 <<
2604 select OBJTOOL if HAVE_OBJTOOL <<
2605 default n <<
2606 help <<
2607 Compile the kernel with straight-li <<
2608 against straight line speculation. <<
2609 larger. <<
2610 2989
2611 config MITIGATION_GDS !! 2990 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
2612 bool "Mitigate Gather Data Sampling" <<
2613 depends on CPU_SUP_INTEL <<
2614 default y <<
2615 help <<
2616 Enable mitigation for Gather Data S <<
2617 vulnerability which allows unprivil <<
2618 which was previously stored in vect <<
2619 instructions to infer the stale vec <<
2620 2991
2621 config MITIGATION_RFDS !! 2992 config HW_HAS_EISA
2622 bool "RFDS Mitigation" !! 2993 bool
2623 depends on CPU_SUP_INTEL !! 2994 config HW_HAS_PCI
2624 default y !! 2995 bool
2625 help <<
2626 Enable mitigation for Register File <<
2627 RFDS is a hardware vulnerability wh <<
2628 allows unprivileged speculative acc <<
2629 stored in floating point, vector an <<
2630 See also <file:Documentation/admin- <<
2631 2996
2632 config MITIGATION_SPECTRE_BHI !! 2997 config PCI
2633 bool "Mitigate Spectre-BHB (Branch Hi !! 2998 bool "Support for PCI controller"
2634 depends on CPU_SUP_INTEL !! 2999 depends on HW_HAS_PCI
2635 default y !! 3000 select PCI_DOMAINS
2636 help !! 3001 help
2637 Enable BHI mitigations. BHI attacks !! 3002 Find out whether you have a PCI motherboard. PCI is the name of a
2638 where the branch history buffer is !! 3003 bus system, i.e. the way the CPU talks to the other stuff inside
2639 indirect branches. !! 3004 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
2640 See <file:Documentation/admin-guide !! 3005 say Y, otherwise N.
>> 3006
>> 3007 config HT_PCI
>> 3008 bool "Support for HT-linked PCI"
>> 3009 default y
>> 3010 depends on CPU_LOONGSON3
>> 3011 select PCI
>> 3012 select PCI_DOMAINS
>> 3013 help
>> 3014 Loongson family machines use Hyper-Transport bus for inter-core
>> 3015 connection and device connection. The PCI bus is a subordinate
>> 3016 linked at HT. Choose Y for Loongson-3 based machines.
2641 3017
2642 config MITIGATION_MDS !! 3018 config PCI_DOMAINS
2643 bool "Mitigate Microarchitectural Dat !! 3019 bool
2644 depends on CPU_SUP_INTEL <<
2645 default y <<
2646 help <<
2647 Enable mitigation for Microarchitec <<
2648 a hardware vulnerability which allo <<
2649 to data which is available in vario <<
2650 See also <file:Documentation/admin- <<
2651 3020
2652 config MITIGATION_TAA !! 3021 config PCI_DOMAINS_GENERIC
2653 bool "Mitigate TSX Asynchronous Abort !! 3022 bool
2654 depends on CPU_SUP_INTEL <<
2655 default y <<
2656 help <<
2657 Enable mitigation for TSX Asynchron <<
2658 vulnerability that allows unprivile <<
2659 which is available in various CPU i <<
2660 asynchronous aborts within an Intel <<
2661 See also <file:Documentation/admin- <<
2662 3023
2663 config MITIGATION_MMIO_STALE_DATA !! 3024 config PCI_DRIVERS_GENERIC
2664 bool "Mitigate MMIO Stale Data hardwa !! 3025 select PCI_DOMAINS_GENERIC if PCI_DOMAINS
2665 depends on CPU_SUP_INTEL !! 3026 bool
2666 default y <<
2667 help <<
2668 Enable mitigation for MMIO Stale Da <<
2669 Stale Data Vulnerabilities are a cl <<
2670 vulnerabilities that can expose dat <<
2671 attacker to have access to MMIO. <<
2672 See also <<
2673 <file:Documentation/admin-guide/hw- <<
2674 3027
2675 config MITIGATION_L1TF !! 3028 config PCI_DRIVERS_LEGACY
2676 bool "Mitigate L1 Terminal Fault (L1T !! 3029 def_bool !PCI_DRIVERS_GENERIC
2677 depends on CPU_SUP_INTEL !! 3030 select NO_GENERIC_PCI_IOPORT_MAP
2678 default y <<
2679 help <<
2680 Mitigate L1 Terminal Fault (L1TF) h <<
2681 hardware vulnerability which allows <<
2682 available in the Level 1 Data Cache <<
2683 See <file:Documentation/admin-guide <<
2684 3031
2685 config MITIGATION_RETBLEED !! 3032 source "drivers/pci/Kconfig"
2686 bool "Mitigate RETBleed hardware bug" <<
2687 depends on (CPU_SUP_INTEL && MITIGATI <<
2688 default y <<
2689 help <<
2690 Enable mitigation for RETBleed (Arb <<
2691 with Return Instructions) vulnerabi <<
2692 execution attack which takes advant <<
2693 in many modern microprocessors, sim <<
2694 unprivileged attacker can use these <<
2695 memory security restrictions to gai <<
2696 that would otherwise be inaccessibl <<
2697 3033
2698 config MITIGATION_SPECTRE_V1 !! 3034 #
2699 bool "Mitigate SPECTRE V1 hardware bu !! 3035 # ISA support is now enabled via select. Too many systems still have the one
2700 default y !! 3036 # or other ISA chip on the board that users don't know about so don't expect
2701 help !! 3037 # users to choose the right thing ...
2702 Enable mitigation for Spectre V1 (B !! 3038 #
2703 class of side channel attacks that !! 3039 config ISA
2704 execution that bypasses conditional !! 3040 bool
2705 memory access bounds check. <<
2706 See also <file:Documentation/admin- <<
2707 <<
2708 config MITIGATION_SPECTRE_V2 <<
2709 bool "Mitigate SPECTRE V2 hardware bu <<
2710 default y <<
2711 help <<
2712 Enable mitigation for Spectre V2 (B <<
2713 V2 is a class of side channel attac <<
2714 indirect branch predictors inside t <<
2715 attacks, the attacker can steer spe <<
2716 victim to gadget code by poisoning <<
2717 used for predicting indirect branch <<
2718 See also <file:Documentation/admin- <<
2719 3041
2720 config MITIGATION_SRBDS !! 3042 config EISA
2721 bool "Mitigate Special Register Buffe !! 3043 bool "EISA support"
2722 depends on CPU_SUP_INTEL !! 3044 depends on HW_HAS_EISA
2723 default y !! 3045 select ISA
2724 help !! 3046 select GENERIC_ISA_DMA
2725 Enable mitigation for Special Regis !! 3047 ---help---
2726 SRBDS is a hardware vulnerability t !! 3048 The Extended Industry Standard Architecture (EISA) bus was
2727 Sampling (MDS) techniques to infer !! 3049 developed as an open alternative to the IBM MicroChannel bus.
2728 register accesses. An unprivileged !! 3050
2729 from RDRAND and RDSEED executed on !! 3051 The EISA bus provided some of the features of the IBM MicroChannel
2730 using MDS techniques. !! 3052 bus while maintaining backward compatibility with cards made for
2731 See also !! 3053 the older ISA bus. The EISA bus saw limited use between 1988 and
2732 <file:Documentation/admin-guide/hw- !! 3054 1995 when it was made obsolete by the PCI bus.
>> 3055
>> 3056 Say Y here if you are building a kernel for an EISA-based machine.
>> 3057
>> 3058 Otherwise, say N.
>> 3059
>> 3060 source "drivers/eisa/Kconfig"
>> 3061
>> 3062 config TC
>> 3063 bool "TURBOchannel support"
>> 3064 depends on MACH_DECSTATION
>> 3065 help
>> 3066 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3067 processors. TURBOchannel programming specifications are available
>> 3068 at:
>> 3069 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3070 and:
>> 3071 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3072 Linux driver support status is documented at:
>> 3073 <http://www.linux-mips.org/wiki/DECstation>
2733 3074
2734 config MITIGATION_SSB !! 3075 config MMU
2735 bool "Mitigate Speculative Store Bypa !! 3076 bool
2736 default y 3077 default y
2737 help <<
2738 Enable mitigation for Speculative S <<
2739 hardware security vulnerability and <<
2740 of speculative execution in a simil <<
2741 security vulnerabilities. <<
2742 3078
2743 endif !! 3079 config ARCH_MMAP_RND_BITS_MIN
2744 !! 3080 default 12 if 64BIT
2745 config ARCH_HAS_ADD_PAGES !! 3081 default 8
2746 def_bool y <<
2747 depends on ARCH_ENABLE_MEMORY_HOTPLUG <<
2748 <<
2749 menu "Power management and ACPI options" <<
2750 <<
2751 config ARCH_HIBERNATION_HEADER <<
2752 def_bool y <<
2753 depends on HIBERNATION <<
2754 3082
2755 source "kernel/power/Kconfig" !! 3083 config ARCH_MMAP_RND_BITS_MAX
>> 3084 default 18 if 64BIT
>> 3085 default 15
2756 3086
2757 source "drivers/acpi/Kconfig" !! 3087 config ARCH_MMAP_RND_COMPAT_BITS_MIN
>> 3088 default 8
2758 3089
2759 config X86_APM_BOOT !! 3090 config ARCH_MMAP_RND_COMPAT_BITS_MAX
2760 def_bool y !! 3091 default 15
2761 depends on APM <<
2762 3092
2763 menuconfig APM !! 3093 config I8253
2764 tristate "APM (Advanced Power Managem !! 3094 bool
2765 depends on X86_32 && PM_SLEEP !! 3095 select CLKSRC_I8253
2766 help !! 3096 select CLKEVT_I8253
2767 APM is a BIOS specification for sav !! 3097 select MIPS_EXTERNAL_TIMER
2768 techniques. This is mostly useful f <<
2769 APM compliant BIOSes. If you say Y <<
2770 reset after a RESUME operation, the <<
2771 battery status information, and use <<
2772 notification of APM "events" (e.g. <<
2773 <<
2774 If you select "Y" here, you can dis <<
2775 BIOS by passing the "apm=off" optio <<
2776 <<
2777 Note that the APM support is almost <<
2778 machines with more than one CPU. <<
2779 <<
2780 In order to use APM, you will need <<
2781 and more information, read <file:Do <<
2782 and the Battery Powered Linux mini- <<
2783 <http://www.tldp.org/docs.html#howt <<
2784 3098
2785 This driver does not spin down disk !! 3099 config ZONE_DMA
2786 manpage ("man 8 hdparm") for that), !! 3100 bool
2787 VESA-compliant "green" monitors. <<
2788 <<
2789 This driver does not support the TI <<
2790 486/DX4/75 because they don't have <<
2791 desktop machines also don't have co <<
2792 may cause those machines to panic d <<
2793 <<
2794 Generally, if you don't have a batt <<
2795 much point in using this driver and <<
2796 random kernel OOPSes or reboots tha <<
2797 anything, try disabling/enabling th <<
2798 APM in your BIOS). <<
2799 <<
2800 Some other things you should try wh <<
2801 "weird" problems: <<
2802 <<
2803 1) make sure that you have enough s <<
2804 enabled. <<
2805 2) pass the "idle=poll" option to t <<
2806 3) switch on floating point emulati <<
2807 the "no387" option to the kernel <<
2808 4) pass the "floppy=nodma" option t <<
2809 5) pass the "mem=4M" option to the <<
2810 all but the first 4 MB of RAM) <<
2811 6) make sure that the CPU is not ov <<
2812 7) read the sig11 FAQ at <http://ww <<
2813 8) disable the cache from your BIOS <<
2814 9) install a fan for the video card <<
2815 10) install a better fan for the CP <<
2816 11) exchange RAM chips <<
2817 12) exchange the motherboard. <<
2818 <<
2819 To compile this driver as a module, <<
2820 module will be called apm. <<
2821 <<
2822 if APM <<
2823 <<
2824 config APM_IGNORE_USER_SUSPEND <<
2825 bool "Ignore USER SUSPEND" <<
2826 help <<
2827 This option will ignore USER SUSPEN <<
2828 compliant APM BIOS, you want to say <<
2829 series notebooks, it is necessary t <<
2830 <<
2831 config APM_DO_ENABLE <<
2832 bool "Enable PM at boot time" <<
2833 help <<
2834 Enable APM features at boot time. F <<
2835 specification: "When disabled, the <<
2836 power manage devices, enter the Sta <<
2837 State, or take power saving steps i <<
2838 This driver will make CPU Idle call <<
2839 feature is turned off -- see "Do CP <<
2840 should always save battery power, b <<
2841 will be dependent on your BIOS impl <<
2842 this option off if your computer ha <<
2843 support, or if it beeps continuousl <<
2844 this off if you have a NEC UltraLit <<
2845 T400CDT. This is off by default sin <<
2846 this feature. <<
2847 <<
2848 config APM_CPU_IDLE <<
2849 depends on CPU_IDLE <<
2850 bool "Make CPU Idle calls when idle" <<
2851 help <<
2852 Enable calls to APM CPU Idle/CPU Bu <<
2853 On some machines, this can activate <<
2854 a slowed CPU clock rate, when the m <<
2855 are made after the idle loop has ru <<
2856 333 mS). On some machines, this wil <<
2857 whenever the CPU becomes idle. (On <<
2858 this option does nothing.) <<
2859 <<
2860 config APM_DISPLAY_BLANK <<
2861 bool "Enable console blanking using A <<
2862 help <<
2863 Enable console blanking using the A <<
2864 turn off the LCD backlight when the <<
2865 virtual console blanks the screen. <<
2866 the virtual console screen blanker, <<
2867 when using the X Window system. Thi <<
2868 do with your VESA-compliant power-s <<
2869 option doesn't work for all laptops <<
2870 backlight at all, or it might print <<
2871 especially if you are using gpm. <<
2872 <<
2873 config APM_ALLOW_INTS <<
2874 bool "Allow interrupts during APM BIO <<
2875 help <<
2876 Normally we disable external interr <<
2877 the APM BIOS as a measure to lessen <<
2878 BIOS implementation. The BIOS shou <<
2879 needs to. Unfortunately, some BIOS <<
2880 many of the newer IBM Thinkpads. I <<
2881 suspend, try setting this to Y. Ot <<
2882 3101
2883 endif # APM !! 3102 config ZONE_DMA32
>> 3103 bool
2884 3104
2885 source "drivers/cpufreq/Kconfig" !! 3105 source "drivers/pcmcia/Kconfig"
2886 3106
2887 source "drivers/cpuidle/Kconfig" !! 3107 config RAPIDIO
>> 3108 tristate "RapidIO support"
>> 3109 depends on PCI
>> 3110 default n
>> 3111 help
>> 3112 If you say Y here, the kernel will include drivers and
>> 3113 infrastructure code to support RapidIO interconnect devices.
2888 3114
2889 source "drivers/idle/Kconfig" !! 3115 source "drivers/rapidio/Kconfig"
2890 3116
2891 endmenu 3117 endmenu
2892 3118
2893 menu "Bus options (PCI etc.)" !! 3119 menu "Executable file formats"
2894 3120
2895 choice !! 3121 source "fs/Kconfig.binfmt"
2896 prompt "PCI access mode" <<
2897 depends on X86_32 && PCI <<
2898 default PCI_GOANY <<
2899 help <<
2900 On PCI systems, the BIOS can be use <<
2901 determine their configuration. Howe <<
2902 have BIOS bugs and may crash if thi <<
2903 PCI-based systems don't have any BI <<
2904 detect the PCI hardware directly wi <<
2905 <<
2906 With this option, you can specify h <<
2907 PCI devices. If you choose "BIOS", <<
2908 if you choose "Direct", the BIOS wo <<
2909 choose "MMConfig", then PCI Express <<
2910 If you choose "Any", the kernel wil <<
2911 direct access method and falls back <<
2912 work. If unsure, go with the defaul <<
2913 <<
2914 config PCI_GOBIOS <<
2915 bool "BIOS" <<
2916 <<
2917 config PCI_GOMMCONFIG <<
2918 bool "MMConfig" <<
2919 <<
2920 config PCI_GODIRECT <<
2921 bool "Direct" <<
2922 <<
2923 config PCI_GOOLPC <<
2924 bool "OLPC XO-1" <<
2925 depends on OLPC <<
2926 <<
2927 config PCI_GOANY <<
2928 bool "Any" <<
2929 3122
2930 endchoice !! 3123 config TRAD_SIGNALS
2931 !! 3124 bool
2932 config PCI_BIOS <<
2933 def_bool y <<
2934 depends on X86_32 && PCI && (PCI_GOBI <<
2935 3125
2936 # x86-64 doesn't support PCI BIOS access from !! 3126 config MIPS32_COMPAT
2937 config PCI_DIRECT !! 3127 bool
2938 def_bool y <<
2939 depends on PCI && (X86_64 || (PCI_GOD <<
2940 3128
2941 config PCI_MMCONFIG !! 3129 config COMPAT
2942 bool "Support mmconfig PCI config spa !! 3130 bool
2943 default y <<
2944 depends on PCI && (ACPI || JAILHOUSE_ <<
2945 depends on X86_64 || (PCI_GOANY || PC <<
2946 3131
2947 config PCI_OLPC !! 3132 config SYSVIPC_COMPAT
2948 def_bool y !! 3133 bool
2949 depends on PCI && OLPC && (PCI_GOOLPC <<
2950 3134
2951 config PCI_XEN !! 3135 config MIPS32_O32
2952 def_bool y !! 3136 bool "Kernel support for o32 binaries"
2953 depends on PCI && XEN !! 3137 depends on 64BIT
>> 3138 select ARCH_WANT_OLD_COMPAT_IPC
>> 3139 select COMPAT
>> 3140 select MIPS32_COMPAT
>> 3141 select SYSVIPC_COMPAT if SYSVIPC
>> 3142 help
>> 3143 Select this option if you want to run o32 binaries. These are pure
>> 3144 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3145 existing binaries are in this format.
2954 3146
2955 config MMCONF_FAM10H !! 3147 If unsure, say Y.
2956 def_bool y <<
2957 depends on X86_64 && PCI_MMCONFIG && <<
2958 3148
2959 config PCI_CNB20LE_QUIRK !! 3149 config MIPS32_N32
2960 bool "Read CNB20LE Host Bridge Window !! 3150 bool "Kernel support for n32 binaries"
2961 depends on PCI !! 3151 depends on 64BIT
2962 help !! 3152 select COMPAT
2963 Read the PCI windows out of the CNB !! 3153 select MIPS32_COMPAT
2964 PCI hotplug to work on systems with !! 3154 select SYSVIPC_COMPAT if SYSVIPC
2965 not have ACPI. !! 3155 help
2966 !! 3156 Select this option if you want to run n32 binaries. These are
2967 There's no public spec for this chi !! 3157 64-bit binaries using 32-bit quantities for addressing and certain
2968 is known to be incomplete. !! 3158 data that would normally be 64-bit. They are used in special
2969 !! 3159 cases.
2970 You should say N unless you know yo <<
2971 <<
2972 config ISA_BUS <<
2973 bool "ISA bus support on modern syste <<
2974 help <<
2975 Expose ISA bus device drivers and o <<
2976 configuration. Enable this option i <<
2977 bus. ISA is an older system, displa <<
2978 architectures -- if your target mac <<
2979 not have an ISA bus. <<
2980 3160
2981 If unsure, say N. 3161 If unsure, say N.
2982 3162
2983 # x86_64 have no ISA slots, but can have ISA- !! 3163 config BINFMT_ELF32
2984 config ISA_DMA_API !! 3164 bool
2985 bool "ISA-style DMA support" if (X86_ !! 3165 default y if MIPS32_O32 || MIPS32_N32
2986 default y !! 3166 select ELFCORE
2987 help <<
2988 Enables ISA-style DMA support for d <<
2989 If unsure, say Y. <<
2990 3167
2991 if X86_32 !! 3168 endmenu
2992 3169
2993 config ISA !! 3170 menu "Power management options"
2994 bool "ISA support" <<
2995 help <<
2996 Find out whether you have ISA slots <<
2997 name of a bus system, i.e. the way <<
2998 inside your box. Other bus systems <<
2999 (MCA) or VESA. ISA is an older sys <<
3000 newer boards don't support it. If <<
3001 <<
3002 config SCx200 <<
3003 tristate "NatSemi SCx200 support" <<
3004 help <<
3005 This provides basic support for Nat <<
3006 (now AMD's) Geode processors. The <<
3007 PCI-IDs of several on-chip devices, <<
3008 for other scx200_* drivers. <<
3009 <<
3010 If compiled as a module, the driver <<
3011 <<
3012 config SCx200HR_TIMER <<
3013 tristate "NatSemi SCx200 27MHz High-R <<
3014 depends on SCx200 <<
3015 default y <<
3016 help <<
3017 This driver provides a clocksource <<
3018 27MHz high-resolution timer. Its a <<
3019 NSC Geode SC-1100's buggy TSC, whic <<
3020 processor goes idle (as is done by <<
3021 other workaround is idle=poll boot <<
3022 <<
3023 config OLPC <<
3024 bool "One Laptop Per Child support" <<
3025 depends on !X86_PAE <<
3026 select GPIOLIB <<
3027 select OF <<
3028 select OF_PROMTREE <<
3029 select IRQ_DOMAIN <<
3030 select OLPC_EC <<
3031 help <<
3032 Add support for detecting the uniqu <<
3033 XO hardware. <<
3034 3171
3035 config OLPC_XO1_PM !! 3172 config ARCH_HIBERNATION_POSSIBLE
3036 bool "OLPC XO-1 Power Management" !! 3173 def_bool y
3037 depends on OLPC && MFD_CS5535=y && PM !! 3174 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3038 help <<
3039 Add support for poweroff and suspen <<
3040 3175
3041 config OLPC_XO1_RTC !! 3176 config ARCH_SUSPEND_POSSIBLE
3042 bool "OLPC XO-1 Real Time Clock" !! 3177 def_bool y
3043 depends on OLPC_XO1_PM && RTC_DRV_CMO !! 3178 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3044 help <<
3045 Add support for the XO-1 real time <<
3046 programmable wakeup source. <<
3047 3179
3048 config OLPC_XO1_SCI !! 3180 source "kernel/power/Kconfig"
3049 bool "OLPC XO-1 SCI extras" <<
3050 depends on OLPC && OLPC_XO1_PM && GPI <<
3051 depends on INPUT=y <<
3052 select POWER_SUPPLY <<
3053 help <<
3054 Add support for SCI-based features <<
3055 - EC-driven system wakeups <<
3056 - Power button <<
3057 - Ebook switch <<
3058 - Lid switch <<
3059 - AC adapter status updates <<
3060 - Battery status updates <<
3061 3181
3062 config OLPC_XO15_SCI !! 3182 endmenu
3063 bool "OLPC XO-1.5 SCI extras" <<
3064 depends on OLPC && ACPI <<
3065 select POWER_SUPPLY <<
3066 help <<
3067 Add support for SCI-based features <<
3068 - EC-driven system wakeups <<
3069 - AC adapter status updates <<
3070 - Battery status updates <<
3071 3183
3072 config GEODE_COMMON !! 3184 config MIPS_EXTERNAL_TIMER
3073 bool 3185 bool
3074 3186
3075 config ALIX !! 3187 menu "CPU Power Management"
3076 bool "PCEngines ALIX System Support ( <<
3077 select GPIOLIB <<
3078 select GEODE_COMMON <<
3079 help <<
3080 This option enables system support <<
3081 At present this just sets up LEDs f <<
3082 ALIX2/3/6 boards. However, other s <<
3083 get added here. <<
3084 <<
3085 Note: You must still enable the dri <<
3086 (GPIO_CS5535 & LEDS_GPIO) to actual <<
3087 <<
3088 Note: You have to set alix.force=1 <<
3089 <<
3090 config NET5501 <<
3091 bool "Soekris Engineering net5501 Sys <<
3092 select GPIOLIB <<
3093 select GEODE_COMMON <<
3094 help <<
3095 This option enables system support <<
3096 3188
3097 config GEOS !! 3189 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3098 bool "Traverse Technologies GEOS Syst !! 3190 source "drivers/cpufreq/Kconfig"
3099 select GPIOLIB !! 3191 endif
3100 select GEODE_COMMON <<
3101 depends on DMI <<
3102 help <<
3103 This option enables system support <<
3104 <<
3105 config TS5500 <<
3106 bool "Technologic Systems TS-5500 pla <<
3107 depends on MELAN <<
3108 select CHECK_SIGNATURE <<
3109 select NEW_LEDS <<
3110 select LEDS_CLASS <<
3111 help <<
3112 This option enables system support <<
3113 <<
3114 endif # X86_32 <<
3115 3192
3116 config AMD_NB !! 3193 source "drivers/cpuidle/Kconfig"
3117 def_bool y <<
3118 depends on CPU_SUP_AMD && PCI <<
3119 3194
3120 endmenu 3195 endmenu
3121 3196
3122 menu "Binary Emulations" !! 3197 source "net/Kconfig"
3123 3198
3124 config IA32_EMULATION !! 3199 source "drivers/Kconfig"
3125 bool "IA32 Emulation" <<
3126 depends on X86_64 <<
3127 select ARCH_WANT_OLD_COMPAT_IPC <<
3128 select BINFMT_ELF <<
3129 select COMPAT_OLD_SIGACTION <<
3130 help <<
3131 Include code to run legacy 32-bit p <<
3132 64-bit kernel. You should likely tu <<
3133 100% sure that you don't have any 3 <<
3134 3200
3135 config IA32_EMULATION_DEFAULT_DISABLED !! 3201 source "drivers/firmware/Kconfig"
3136 bool "IA32 emulation disabled by defa <<
3137 default n <<
3138 depends on IA32_EMULATION <<
3139 help <<
3140 Make IA32 emulation disabled by def <<
3141 processes and access to 32-bit sysc <<
3142 default value. <<
3143 <<
3144 config X86_X32_ABI <<
3145 bool "x32 ABI for 64-bit mode" <<
3146 depends on X86_64 <<
3147 # llvm-objcopy does not convert x86_6 <<
3148 # compressed debug sections to x86_x3 <<
3149 # https://github.com/ClangBuiltLinux/ <<
3150 # https://github.com/ClangBuiltLinux/ <<
3151 depends on $(success,$(OBJCOPY) --ver <<
3152 help <<
3153 Include code to run binaries for th <<
3154 for 64-bit processors. An x32 proc <<
3155 full 64-bit register file and wide <<
3156 pointers at 32 bits for smaller mem <<
3157 3202
3158 config COMPAT_32 !! 3203 source "fs/Kconfig"
3159 def_bool y <<
3160 depends on IA32_EMULATION || X86_32 <<
3161 select HAVE_UID16 <<
3162 select OLD_SIGSUSPEND3 <<
3163 3204
3164 config COMPAT !! 3205 source "arch/mips/Kconfig.debug"
3165 def_bool y <<
3166 depends on IA32_EMULATION || X86_X32_ <<
3167 <<
3168 config COMPAT_FOR_U64_ALIGNMENT <<
3169 def_bool y <<
3170 depends on COMPAT <<
3171 3206
3172 endmenu !! 3207 source "security/Kconfig"
3173 3208
3174 config HAVE_ATOMIC_IOMAP !! 3209 source "crypto/Kconfig"
3175 def_bool y <<
3176 depends on X86_32 <<
3177 3210
3178 source "arch/x86/kvm/Kconfig" !! 3211 source "lib/Kconfig"
3179 3212
3180 source "arch/x86/Kconfig.assembler" !! 3213 source "arch/mips/kvm/Kconfig"
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