1 # SPDX-License-Identifier: GPL-2.0 !! 1 config MIPS 2 # Select 32 or 64 bit !! 2 bool 3 config 64BIT !! 3 default y 4 bool "64-bit kernel" if "$(ARCH)" = "x !! 4 select ARCH_BINFMT_ELF_STATE 5 default "$(ARCH)" != "i386" !! 5 select ARCH_CLOCKSOURCE_DATA 6 help !! 6 select ARCH_DISCARD_MEMBLOCK 7 Say yes to build a 64-bit kernel - f << 8 Say no to build a 32-bit kernel - fo << 9 << 10 config X86_32 << 11 def_bool y << 12 depends on !64BIT << 13 # Options that are inherently 32-bit k << 14 select ARCH_WANT_IPC_PARSE_VERSION << 15 select CLKSRC_I8253 << 16 select CLONE_BACKWARDS << 17 select GENERIC_VDSO_32 << 18 select HAVE_DEBUG_STACKOVERFLOW << 19 select KMAP_LOCAL << 20 select MODULES_USE_ELF_REL << 21 select OLD_SIGACTION << 22 select ARCH_SPLIT_ARG64 << 23 << 24 config X86_64 << 25 def_bool y << 26 depends on 64BIT << 27 # Options that are inherently 64-bit k << 28 select ARCH_HAS_GIGANTIC_PAGE << 29 select ARCH_SUPPORTS_INT128 if CC_HAS_ << 30 select ARCH_SUPPORTS_PER_VMA_LOCK << 31 select ARCH_SUPPORTS_HUGE_PFNMAP if TR << 32 select HAVE_ARCH_SOFT_DIRTY << 33 select MODULES_USE_ELF_RELA << 34 select NEED_DMA_MAP_STATE << 35 select SWIOTLB << 36 select ARCH_HAS_ELFCORE_COMPAT << 37 select ZONE_DMA32 << 38 select EXECMEM if DYNAMIC_FTRACE << 39 << 40 config FORCE_DYNAMIC_FTRACE << 41 def_bool y << 42 depends on X86_32 << 43 depends on FUNCTION_TRACER << 44 select DYNAMIC_FTRACE << 45 help << 46 We keep the static function tracing << 47 in order to test the non static func << 48 generic code, as other architectures << 49 only need to keep it around for x86_ << 50 for x86_32. For x86_32, force DYNAMI << 51 # << 52 # Arch settings << 53 # << 54 # ( Note that options that are marked 'if X86_ << 55 # ported to 32-bit as well. ) << 56 # << 57 config X86 << 58 def_bool y << 59 # << 60 # Note: keep this list sorted alphabet << 61 # << 62 select ACPI_LEGACY_TABLES_LOOKUP << 63 select ACPI_SYSTEM_POWER_STATES_SUPPOR << 64 select ACPI_HOTPLUG_CPU << 65 select ARCH_32BIT_OFF_T << 66 select ARCH_CLOCKSOURCE_INIT << 67 select ARCH_CONFIGURES_CPU_MITIGATIONS << 68 select ARCH_CORRECT_STACKTRACE_ON_KRET << 69 select ARCH_ENABLE_HUGEPAGE_MIGRATION << 70 select ARCH_ENABLE_MEMORY_HOTPLUG if X << 71 select ARCH_ENABLE_MEMORY_HOTREMOVE if << 72 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if << 73 select ARCH_ENABLE_THP_MIGRATION if X8 << 74 select ARCH_HAS_ACPI_TABLE_UPGRADE << 75 select ARCH_HAS_CACHE_LINE_SIZE << 76 select ARCH_HAS_CPU_CACHE_INVALIDATE_M << 77 select ARCH_HAS_CPU_FINALIZE_INIT << 78 select ARCH_HAS_CPU_PASID << 79 select ARCH_HAS_CURRENT_STACK_POINTER << 80 select ARCH_HAS_DEBUG_VIRTUAL << 81 select ARCH_HAS_DEBUG_VM_PGTABLE << 82 select ARCH_HAS_DEVMEM_IS_ALLOWED << 83 select ARCH_HAS_DMA_OPS << 84 select ARCH_HAS_EARLY_DEBUG << 85 select ARCH_HAS_ELF_RANDOMIZE 7 select ARCH_HAS_ELF_RANDOMIZE 86 select ARCH_HAS_FAST_MULTIPLIER !! 8 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 87 select ARCH_HAS_FORTIFY_SOURCE << 88 select ARCH_HAS_GCOV_PROFILE_ALL << 89 select ARCH_HAS_KCOV << 90 select ARCH_HAS_KERNEL_FPU_SUPPORT << 91 select ARCH_HAS_MEM_ENCRYPT << 92 select ARCH_HAS_MEMBARRIER_SYNC_CORE << 93 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS << 94 select ARCH_HAS_NON_OVERLAPPING_ADDRES << 95 select ARCH_HAS_PMEM_API << 96 select ARCH_HAS_PTE_DEVMAP << 97 select ARCH_HAS_PTE_SPECIAL << 98 select ARCH_HAS_HW_PTE_YOUNG << 99 select ARCH_HAS_NONLEAF_PMD_YOUNG << 100 select ARCH_HAS_UACCESS_FLUSHCACHE << 101 select ARCH_HAS_COPY_MC << 102 select ARCH_HAS_SET_MEMORY << 103 select ARCH_HAS_SET_DIRECT_MAP << 104 select ARCH_HAS_STRICT_KERNEL_RWX << 105 select ARCH_HAS_STRICT_MODULE_RWX << 106 select ARCH_HAS_SYNC_CORE_BEFORE_USERM << 107 select ARCH_HAS_SYSCALL_WRAPPER << 108 select ARCH_HAS_UBSAN << 109 select ARCH_HAS_DEBUG_WX << 110 select ARCH_HAS_ZONE_DMA_SET if EXPERT << 111 select ARCH_HAVE_NMI_SAFE_CMPXCHG << 112 select ARCH_HAVE_EXTRA_ELF_NOTES << 113 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL << 114 select ARCH_MIGHT_HAVE_ACPI_PDC << 115 select ARCH_MIGHT_HAVE_PC_PARPORT 9 select ARCH_MIGHT_HAVE_PC_PARPORT 116 select ARCH_MIGHT_HAVE_PC_SERIO 10 select ARCH_MIGHT_HAVE_PC_SERIO 117 select ARCH_STACKWALK !! 11 select ARCH_SUPPORTS_UPROBES 118 select ARCH_SUPPORTS_ACPI << 119 select ARCH_SUPPORTS_ATOMIC_RMW << 120 select ARCH_SUPPORTS_DEBUG_PAGEALLOC << 121 select ARCH_SUPPORTS_PAGE_TABLE_CHECK << 122 select ARCH_SUPPORTS_NUMA_BALANCING << 123 select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_ << 124 select ARCH_SUPPORTS_CFI_CLANG << 125 select ARCH_USES_CFI_TRAPS << 126 select ARCH_SUPPORTS_LTO_CLANG << 127 select ARCH_SUPPORTS_LTO_CLANG_THIN << 128 select ARCH_SUPPORTS_RT << 129 select ARCH_USE_BUILTIN_BSWAP 12 select ARCH_USE_BUILTIN_BSWAP 130 select ARCH_USE_CMPXCHG_LOCKREF !! 13 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 131 select ARCH_USE_MEMTEST << 132 select ARCH_USE_QUEUED_RWLOCKS 14 select ARCH_USE_QUEUED_RWLOCKS 133 select ARCH_USE_QUEUED_SPINLOCKS 15 select ARCH_USE_QUEUED_SPINLOCKS 134 select ARCH_USE_SYM_ANNOTATIONS !! 16 select ARCH_WANT_IPC_PARSE_VERSION 135 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU !! 17 select BUILDTIME_EXTABLE_SORT 136 select ARCH_WANT_DEFAULT_BPF_JIT !! 18 select CLONE_BACKWARDS 137 select ARCH_WANTS_DYNAMIC_TASK_STRUCT !! 19 select CPU_PM if CPU_IDLE 138 select ARCH_WANTS_NO_INSTR !! 20 select GENERIC_ATOMIC64 if !64BIT 139 select ARCH_WANT_GENERAL_HUGETLB !! 21 select GENERIC_CLOCKEVENTS 140 select ARCH_WANT_HUGE_PMD_SHARE << 141 select ARCH_WANT_LD_ORPHAN_WARN << 142 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP << 143 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM << 144 select ARCH_WANTS_THP_SWAP << 145 select ARCH_HAS_PARANOID_L1D_FLUSH << 146 select BUILDTIME_TABLE_SORT << 147 select CLKEVT_I8253 << 148 select CLOCKSOURCE_VALIDATE_LAST_CYCLE << 149 select CLOCKSOURCE_WATCHDOG << 150 # Word-size accesses may read uninitia << 151 # in strings and cause false KMSAN rep << 152 select DCACHE_WORD_ACCESS << 153 select DYNAMIC_SIGFRAME << 154 select EDAC_ATOMIC_SCRUB << 155 select EDAC_SUPPORT << 156 select GENERIC_CLOCKEVENTS_BROADCAST << 157 select GENERIC_CLOCKEVENTS_BROADCAST_I << 158 select GENERIC_CLOCKEVENTS_MIN_ADJUST << 159 select GENERIC_CMOS_UPDATE 22 select GENERIC_CMOS_UPDATE 160 select GENERIC_CPU_AUTOPROBE 23 select GENERIC_CPU_AUTOPROBE 161 select GENERIC_CPU_DEVICES << 162 select GENERIC_CPU_VULNERABILITIES << 163 select GENERIC_EARLY_IOREMAP << 164 select GENERIC_ENTRY << 165 select GENERIC_IOMAP << 166 select GENERIC_IRQ_EFFECTIVE_AFF_MASK << 167 select GENERIC_IRQ_MATRIX_ALLOCATOR << 168 select GENERIC_IRQ_MIGRATION << 169 select GENERIC_IRQ_PROBE 24 select GENERIC_IRQ_PROBE 170 select GENERIC_IRQ_RESERVATION_MODE << 171 select GENERIC_IRQ_SHOW 25 select GENERIC_IRQ_SHOW 172 select GENERIC_PENDING_IRQ !! 26 select GENERIC_PCI_IOMAP 173 select GENERIC_PTDUMP !! 27 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 174 select GENERIC_SMP_IDLE_THREAD 28 select GENERIC_SMP_IDLE_THREAD 175 select GENERIC_TIME_VSYSCALL 29 select GENERIC_TIME_VSYSCALL 176 select GENERIC_GETTIMEOFDAY !! 30 select HANDLE_DOMAIN_IRQ 177 select GENERIC_VDSO_TIME_NS << 178 select GENERIC_VDSO_OVERFLOW_PROTECT << 179 select GUP_GET_PXX_LOW_HIGH << 180 select HARDIRQS_SW_RESEND << 181 select HARDLOCKUP_CHECK_TIMESTAMP << 182 select HAS_IOPORT << 183 select HAVE_ACPI_APEI << 184 select HAVE_ACPI_APEI_NMI << 185 select HAVE_ALIGNED_STRUCT_PAGE << 186 select HAVE_ARCH_AUDITSYSCALL << 187 select HAVE_ARCH_HUGE_VMAP << 188 select HAVE_ARCH_HUGE_VMALLOC << 189 select HAVE_ARCH_JUMP_LABEL 31 select HAVE_ARCH_JUMP_LABEL 190 select HAVE_ARCH_JUMP_LABEL_RELATIVE << 191 select HAVE_ARCH_KASAN << 192 select HAVE_ARCH_KASAN_VMALLOC << 193 select HAVE_ARCH_KFENCE << 194 select HAVE_ARCH_KMSAN << 195 select HAVE_ARCH_KGDB 32 select HAVE_ARCH_KGDB 196 select HAVE_ARCH_MMAP_RND_BITS !! 33 select HAVE_ARCH_MMAP_RND_BITS if MMU 197 select HAVE_ARCH_MMAP_RND_COMPAT_BITS !! 34 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 198 select HAVE_ARCH_COMPAT_MMAP_BASES << 199 select HAVE_ARCH_PREL32_RELOCATIONS << 200 select HAVE_ARCH_SECCOMP_FILTER 35 select HAVE_ARCH_SECCOMP_FILTER 201 select HAVE_ARCH_THREAD_STRUCT_WHITELI << 202 select HAVE_ARCH_STACKLEAK << 203 select HAVE_ARCH_TRACEHOOK 36 select HAVE_ARCH_TRACEHOOK 204 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 37 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 205 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_ !! 38 select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS) 206 select HAVE_ARCH_USERFAULTFD_WP !! 39 select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS) 207 select HAVE_ARCH_USERFAULTFD_MINOR !! 40 select HAVE_CC_STACKPROTECTOR 208 select HAVE_ARCH_VMAP_STACK !! 41 select HAVE_CONTEXT_TRACKING 209 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS !! 42 select HAVE_COPY_THREAD_TLS 210 select HAVE_ARCH_WITHIN_STACK_FRAMES << 211 select HAVE_ASM_MODVERSIONS << 212 select HAVE_CMPXCHG_DOUBLE << 213 select HAVE_CMPXCHG_LOCAL << 214 select HAVE_CONTEXT_TRACKING_USER << 215 select HAVE_CONTEXT_TRACKING_USER_OFFS << 216 select HAVE_C_RECORDMCOUNT 43 select HAVE_C_RECORDMCOUNT 217 select HAVE_OBJTOOL_MCOUNT << 218 select HAVE_OBJTOOL_NOP_MCOUNT << 219 select HAVE_BUILDTIME_MCOUNT_SORT << 220 select HAVE_DEBUG_KMEMLEAK 44 select HAVE_DEBUG_KMEMLEAK >> 45 select HAVE_DEBUG_STACKOVERFLOW >> 46 select HAVE_DMA_API_DEBUG 221 select HAVE_DMA_CONTIGUOUS 47 select HAVE_DMA_CONTIGUOUS 222 select HAVE_DYNAMIC_FTRACE 48 select HAVE_DYNAMIC_FTRACE 223 select HAVE_DYNAMIC_FTRACE_WITH_REGS << 224 select HAVE_DYNAMIC_FTRACE_WITH_ARGS << 225 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT << 226 select HAVE_SAMPLE_FTRACE_DIRECT << 227 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI << 228 select HAVE_EBPF_JIT << 229 select HAVE_EFFICIENT_UNALIGNED_ACCESS << 230 select HAVE_EISA << 231 select HAVE_EXIT_THREAD 49 select HAVE_EXIT_THREAD 232 select HAVE_GUP_FAST << 233 select HAVE_FENTRY << 234 select HAVE_FTRACE_MCOUNT_RECORD 50 select HAVE_FTRACE_MCOUNT_RECORD 235 select HAVE_FUNCTION_GRAPH_RETVAL !! 51 select HAVE_FUNCTION_GRAPH_TRACER 236 select HAVE_FUNCTION_GRAPH_TRACER << 237 select HAVE_FUNCTION_TRACER 52 select HAVE_FUNCTION_TRACER 238 select HAVE_GCC_PLUGINS !! 53 select HAVE_GENERIC_DMA_COHERENT 239 select HAVE_HW_BREAKPOINT !! 54 select HAVE_IDE 240 select HAVE_IOREMAP_PROT !! 55 select HAVE_IRQ_EXIT_ON_IRQ_STACK 241 select HAVE_IRQ_EXIT_ON_IRQ_STACK << 242 select HAVE_IRQ_TIME_ACCOUNTING 56 select HAVE_IRQ_TIME_ACCOUNTING 243 select HAVE_JUMP_LABEL_HACK << 244 select HAVE_KERNEL_BZIP2 << 245 select HAVE_KERNEL_GZIP << 246 select HAVE_KERNEL_LZ4 << 247 select HAVE_KERNEL_LZMA << 248 select HAVE_KERNEL_LZO << 249 select HAVE_KERNEL_XZ << 250 select HAVE_KERNEL_ZSTD << 251 select HAVE_KPROBES 57 select HAVE_KPROBES 252 select HAVE_KPROBES_ON_FTRACE << 253 select HAVE_FUNCTION_ERROR_INJECTION << 254 select HAVE_KRETPROBES 58 select HAVE_KRETPROBES 255 select HAVE_RETHOOK !! 59 select HAVE_MEMBLOCK 256 select HAVE_LIVEPATCH !! 60 select HAVE_MEMBLOCK_NODE_MAP 257 select HAVE_MIXED_BREAKPOINTS_REGS << 258 select HAVE_MOD_ARCH_SPECIFIC 61 select HAVE_MOD_ARCH_SPECIFIC 259 select HAVE_MOVE_PMD << 260 select HAVE_MOVE_PUD << 261 select HAVE_NOINSTR_HACK << 262 select HAVE_NMI 62 select HAVE_NMI 263 select HAVE_NOINSTR_VALIDATION !! 63 select HAVE_OPROFILE 264 select HAVE_OBJTOOL << 265 select HAVE_OPTPROBES << 266 select HAVE_PAGE_SIZE_4KB << 267 select HAVE_PCSPKR_PLATFORM << 268 select HAVE_PERF_EVENTS 64 select HAVE_PERF_EVENTS 269 select HAVE_PERF_EVENTS_NMI << 270 select HAVE_HARDLOCKUP_DETECTOR_PERF << 271 select HAVE_PCI << 272 select HAVE_PERF_REGS << 273 select HAVE_PERF_USER_STACK_DUMP << 274 select MMU_GATHER_RCU_TABLE_FREE << 275 select MMU_GATHER_MERGE_VMAS << 276 select HAVE_POSIX_CPU_TIMERS_TASK_WORK << 277 select HAVE_REGS_AND_STACK_ACCESS_API 65 select HAVE_REGS_AND_STACK_ACCESS_API 278 select HAVE_RELIABLE_STACKTRACE << 279 select HAVE_FUNCTION_ARG_ACCESS_API << 280 select HAVE_SETUP_PER_CPU_AREA << 281 select HAVE_SOFTIRQ_ON_OWN_STACK << 282 select HAVE_STACKPROTECTOR << 283 select HAVE_STACK_VALIDATION << 284 select HAVE_STATIC_CALL << 285 select HAVE_STATIC_CALL_INLINE << 286 select HAVE_PREEMPT_DYNAMIC_CALL << 287 select HAVE_RSEQ << 288 select HAVE_RUST << 289 select HAVE_SYSCALL_TRACEPOINTS 66 select HAVE_SYSCALL_TRACEPOINTS 290 select HAVE_UACCESS_VALIDATION !! 67 select HAVE_VIRT_CPU_ACCOUNTING_GEN 291 select HAVE_UNSTABLE_SCHED_CLOCK << 292 select HAVE_USER_RETURN_NOTIFIER << 293 select HAVE_GENERIC_VDSO << 294 select VDSO_GETRANDOM << 295 select HOTPLUG_PARALLEL << 296 select HOTPLUG_SMT << 297 select HOTPLUG_SPLIT_STARTUP << 298 select IRQ_FORCED_THREADING 68 select IRQ_FORCED_THREADING 299 select LOCK_MM_AND_FIND_VMA !! 69 select MODULES_USE_ELF_RELA if MODULES && 64BIT 300 select NEED_PER_CPU_EMBED_FIRST_CHUNK !! 70 select MODULES_USE_ELF_REL if MODULES 301 select NEED_PER_CPU_PAGE_FIRST_CHUNK !! 71 select PERF_USE_VMALLOC 302 select NEED_SG_DMA_LENGTH !! 72 select RTC_LIB if !MACH_LOONGSON64 303 select NUMA_MEMBLKS << 304 select PCI_DOMAINS << 305 select PCI_LOCKLESS_CONFIG << 306 select PERF_EVENTS << 307 select RTC_LIB << 308 select RTC_MC146818_LIB << 309 select SPARSE_IRQ << 310 select SYSCTL_EXCEPTION_TRACE 73 select SYSCTL_EXCEPTION_TRACE 311 select THREAD_INFO_IN_TASK !! 74 select VIRT_TO_BUS 312 select TRACE_IRQFLAGS_SUPPORT << 313 select TRACE_IRQFLAGS_NMI_SUPPORT << 314 select USER_STACKTRACE_SUPPORT << 315 select HAVE_ARCH_KCSAN << 316 select PROC_PID_ARCH_STATUS << 317 select HAVE_ARCH_NODE_DEV_GROUP << 318 select FUNCTION_ALIGNMENT_16B << 319 select FUNCTION_ALIGNMENT_4B << 320 imply IMA_SECURE_AND_OR_TRUSTED_BOOT << 321 select HAVE_DYNAMIC_FTRACE_NO_PATCHABL << 322 75 323 config INSTRUCTION_DECODER !! 76 menu "Machine selection" 324 def_bool y << 325 depends on KPROBES || PERF_EVENTS || U << 326 77 327 config OUTPUT_FORMAT !! 78 choice 328 string !! 79 prompt "System type" 329 default "elf32-i386" if X86_32 !! 80 default SGI_IP22 330 default "elf64-x86-64" if X86_64 << 331 81 332 config LOCKDEP_SUPPORT !! 82 config MIPS_GENERIC 333 def_bool y !! 83 bool "Generic board-agnostic MIPS kernel" >> 84 select BOOT_RAW >> 85 select BUILTIN_DTB >> 86 select CEVT_R4K >> 87 select CLKSRC_MIPS_GIC >> 88 select COMMON_CLK >> 89 select CPU_MIPSR2_IRQ_VI >> 90 select CPU_MIPSR2_IRQ_EI >> 91 select CSRC_R4K >> 92 select DMA_PERDEV_COHERENT >> 93 select HW_HAS_PCI >> 94 select IRQ_MIPS_CPU >> 95 select LIBFDT >> 96 select MIPS_CPU_SCACHE >> 97 select MIPS_GIC >> 98 select MIPS_L1_CACHE_SHIFT_7 >> 99 select NO_EXCEPT_FILL >> 100 select PCI_DRIVERS_GENERIC >> 101 select PINCTRL >> 102 select SMP_UP if SMP >> 103 select SWAP_IO_SPACE >> 104 select SYS_HAS_CPU_MIPS32_R1 >> 105 select SYS_HAS_CPU_MIPS32_R2 >> 106 select SYS_HAS_CPU_MIPS32_R6 >> 107 select SYS_HAS_CPU_MIPS64_R1 >> 108 select SYS_HAS_CPU_MIPS64_R2 >> 109 select SYS_HAS_CPU_MIPS64_R6 >> 110 select SYS_SUPPORTS_32BIT_KERNEL >> 111 select SYS_SUPPORTS_64BIT_KERNEL >> 112 select SYS_SUPPORTS_BIG_ENDIAN >> 113 select SYS_SUPPORTS_HIGHMEM >> 114 select SYS_SUPPORTS_LITTLE_ENDIAN >> 115 select SYS_SUPPORTS_MICROMIPS >> 116 select SYS_SUPPORTS_MIPS_CPS >> 117 select SYS_SUPPORTS_MIPS16 >> 118 select SYS_SUPPORTS_MULTITHREADING >> 119 select SYS_SUPPORTS_RELOCATABLE >> 120 select SYS_SUPPORTS_SMARTMIPS >> 121 select USB_EHCI_BIG_ENDIAN_DESC if BIG_ENDIAN >> 122 select USB_EHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN >> 123 select USB_OHCI_BIG_ENDIAN_DESC if BIG_ENDIAN >> 124 select USB_OHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN >> 125 select USB_UHCI_BIG_ENDIAN_DESC if BIG_ENDIAN >> 126 select USB_UHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN >> 127 select USE_OF >> 128 help >> 129 Select this to build a kernel which aims to support multiple boards, >> 130 generally using a flattened device tree passed from the bootloader >> 131 using the boot protocol defined in the UHI (Unified Hosting >> 132 Interface) specification. >> 133 >> 134 config MIPS_ALCHEMY >> 135 bool "Alchemy processor based machines" >> 136 select ARCH_PHYS_ADDR_T_64BIT >> 137 select CEVT_R4K >> 138 select CSRC_R4K >> 139 select IRQ_MIPS_CPU >> 140 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is >> 141 select SYS_HAS_CPU_MIPS32_R1 >> 142 select SYS_SUPPORTS_32BIT_KERNEL >> 143 select SYS_SUPPORTS_APM_EMULATION >> 144 select GPIOLIB >> 145 select SYS_SUPPORTS_ZBOOT >> 146 select COMMON_CLK 334 147 335 config STACKTRACE_SUPPORT !! 148 config AR7 336 def_bool y !! 149 bool "Texas Instruments AR7" >> 150 select BOOT_ELF32 >> 151 select DMA_NONCOHERENT >> 152 select CEVT_R4K >> 153 select CSRC_R4K >> 154 select IRQ_MIPS_CPU >> 155 select NO_EXCEPT_FILL >> 156 select SWAP_IO_SPACE >> 157 select SYS_HAS_CPU_MIPS32_R1 >> 158 select SYS_HAS_EARLY_PRINTK >> 159 select SYS_SUPPORTS_32BIT_KERNEL >> 160 select SYS_SUPPORTS_LITTLE_ENDIAN >> 161 select SYS_SUPPORTS_MIPS16 >> 162 select SYS_SUPPORTS_ZBOOT_UART16550 >> 163 select GPIOLIB >> 164 select VLYNQ >> 165 select HAVE_CLK >> 166 help >> 167 Support for the Texas Instruments AR7 System-on-a-Chip >> 168 family: TNETD7100, 7200 and 7300. 337 169 338 config MMU !! 170 config ATH25 339 def_bool y !! 171 bool "Atheros AR231x/AR531x SoC support" >> 172 select CEVT_R4K >> 173 select CSRC_R4K >> 174 select DMA_NONCOHERENT >> 175 select IRQ_MIPS_CPU >> 176 select IRQ_DOMAIN >> 177 select SYS_HAS_CPU_MIPS32_R1 >> 178 select SYS_SUPPORTS_BIG_ENDIAN >> 179 select SYS_SUPPORTS_32BIT_KERNEL >> 180 select SYS_HAS_EARLY_PRINTK >> 181 help >> 182 Support for Atheros AR231x and Atheros AR531x based boards >> 183 >> 184 config ATH79 >> 185 bool "Atheros AR71XX/AR724X/AR913X based boards" >> 186 select ARCH_HAS_RESET_CONTROLLER >> 187 select BOOT_RAW >> 188 select CEVT_R4K >> 189 select CSRC_R4K >> 190 select DMA_NONCOHERENT >> 191 select GPIOLIB >> 192 select HAVE_CLK >> 193 select COMMON_CLK >> 194 select CLKDEV_LOOKUP >> 195 select IRQ_MIPS_CPU >> 196 select MIPS_MACHINE >> 197 select SYS_HAS_CPU_MIPS32_R2 >> 198 select SYS_HAS_EARLY_PRINTK >> 199 select SYS_SUPPORTS_32BIT_KERNEL >> 200 select SYS_SUPPORTS_BIG_ENDIAN >> 201 select SYS_SUPPORTS_MIPS16 >> 202 select SYS_SUPPORTS_ZBOOT_UART_PROM >> 203 select USE_OF >> 204 help >> 205 Support for the Atheros AR71XX/AR724X/AR913X SoCs. >> 206 >> 207 config BMIPS_GENERIC >> 208 bool "Broadcom Generic BMIPS kernel" >> 209 select BOOT_RAW >> 210 select NO_EXCEPT_FILL >> 211 select USE_OF >> 212 select CEVT_R4K >> 213 select CSRC_R4K >> 214 select SYNC_R4K >> 215 select COMMON_CLK >> 216 select BCM6345_L1_IRQ >> 217 select BCM7038_L1_IRQ >> 218 select BCM7120_L2_IRQ >> 219 select BRCMSTB_L2_IRQ >> 220 select IRQ_MIPS_CPU >> 221 select DMA_NONCOHERENT >> 222 select SYS_SUPPORTS_32BIT_KERNEL >> 223 select SYS_SUPPORTS_LITTLE_ENDIAN >> 224 select SYS_SUPPORTS_BIG_ENDIAN >> 225 select SYS_SUPPORTS_HIGHMEM >> 226 select SYS_HAS_CPU_BMIPS32_3300 >> 227 select SYS_HAS_CPU_BMIPS4350 >> 228 select SYS_HAS_CPU_BMIPS4380 >> 229 select SYS_HAS_CPU_BMIPS5000 >> 230 select SWAP_IO_SPACE >> 231 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN >> 232 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN >> 233 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN >> 234 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN >> 235 help >> 236 Build a generic DT-based kernel image that boots on select >> 237 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top >> 238 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN >> 239 must be set appropriately for your board. >> 240 >> 241 config BCM47XX >> 242 bool "Broadcom BCM47XX based boards" >> 243 select BOOT_RAW >> 244 select CEVT_R4K >> 245 select CSRC_R4K >> 246 select DMA_NONCOHERENT >> 247 select HW_HAS_PCI >> 248 select IRQ_MIPS_CPU >> 249 select SYS_HAS_CPU_MIPS32_R1 >> 250 select NO_EXCEPT_FILL >> 251 select SYS_SUPPORTS_32BIT_KERNEL >> 252 select SYS_SUPPORTS_LITTLE_ENDIAN >> 253 select SYS_SUPPORTS_MIPS16 >> 254 select SYS_HAS_EARLY_PRINTK >> 255 select USE_GENERIC_EARLY_PRINTK_8250 >> 256 select GPIOLIB >> 257 select LEDS_GPIO_REGISTER >> 258 select BCM47XX_NVRAM >> 259 select BCM47XX_SPROM >> 260 help >> 261 Support for BCM47XX based boards >> 262 >> 263 config BCM63XX >> 264 bool "Broadcom BCM63XX based boards" >> 265 select BOOT_RAW >> 266 select CEVT_R4K >> 267 select CSRC_R4K >> 268 select SYNC_R4K >> 269 select DMA_NONCOHERENT >> 270 select IRQ_MIPS_CPU >> 271 select SYS_SUPPORTS_32BIT_KERNEL >> 272 select SYS_SUPPORTS_BIG_ENDIAN >> 273 select SYS_HAS_EARLY_PRINTK >> 274 select SWAP_IO_SPACE >> 275 select GPIOLIB >> 276 select HAVE_CLK >> 277 select MIPS_L1_CACHE_SHIFT_4 >> 278 help >> 279 Support for BCM63XX based boards 340 280 341 config ARCH_MMAP_RND_BITS_MIN !! 281 config MIPS_COBALT 342 default 28 if 64BIT !! 282 bool "Cobalt Server" 343 default 8 !! 283 select CEVT_R4K >> 284 select CSRC_R4K >> 285 select CEVT_GT641XX >> 286 select DMA_NONCOHERENT >> 287 select HW_HAS_PCI >> 288 select I8253 >> 289 select I8259 >> 290 select IRQ_MIPS_CPU >> 291 select IRQ_GT641XX >> 292 select PCI_GT64XXX_PCI0 >> 293 select PCI >> 294 select SYS_HAS_CPU_NEVADA >> 295 select SYS_HAS_EARLY_PRINTK >> 296 select SYS_SUPPORTS_32BIT_KERNEL >> 297 select SYS_SUPPORTS_64BIT_KERNEL >> 298 select SYS_SUPPORTS_LITTLE_ENDIAN >> 299 select USE_GENERIC_EARLY_PRINTK_8250 >> 300 >> 301 config MACH_DECSTATION >> 302 bool "DECstations" >> 303 select BOOT_ELF32 >> 304 select CEVT_DS1287 >> 305 select CEVT_R4K if CPU_R4X00 >> 306 select CSRC_IOASIC >> 307 select CSRC_R4K if CPU_R4X00 >> 308 select CPU_DADDI_WORKAROUNDS if 64BIT >> 309 select CPU_R4000_WORKAROUNDS if 64BIT >> 310 select CPU_R4400_WORKAROUNDS if 64BIT >> 311 select DMA_NONCOHERENT >> 312 select NO_IOPORT_MAP >> 313 select IRQ_MIPS_CPU >> 314 select SYS_HAS_CPU_R3000 >> 315 select SYS_HAS_CPU_R4X00 >> 316 select SYS_SUPPORTS_32BIT_KERNEL >> 317 select SYS_SUPPORTS_64BIT_KERNEL >> 318 select SYS_SUPPORTS_LITTLE_ENDIAN >> 319 select SYS_SUPPORTS_128HZ >> 320 select SYS_SUPPORTS_256HZ >> 321 select SYS_SUPPORTS_1024HZ >> 322 select MIPS_L1_CACHE_SHIFT_4 >> 323 help >> 324 This enables support for DEC's MIPS based workstations. For details >> 325 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the >> 326 DECstation porting pages on <http://decstation.unix-ag.org/>. >> 327 >> 328 If you have one of the following DECstation Models you definitely >> 329 want to choose R4xx0 for the CPU Type: >> 330 >> 331 DECstation 5000/50 >> 332 DECstation 5000/150 >> 333 DECstation 5000/260 >> 334 DECsystem 5900/260 >> 335 >> 336 otherwise choose R3000. >> 337 >> 338 config MACH_JAZZ >> 339 bool "Jazz family of machines" >> 340 select FW_ARC >> 341 select FW_ARC32 >> 342 select ARCH_MAY_HAVE_PC_FDC >> 343 select CEVT_R4K >> 344 select CSRC_R4K >> 345 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN >> 346 select GENERIC_ISA_DMA >> 347 select HAVE_PCSPKR_PLATFORM >> 348 select IRQ_MIPS_CPU >> 349 select I8253 >> 350 select I8259 >> 351 select ISA >> 352 select SYS_HAS_CPU_R4X00 >> 353 select SYS_SUPPORTS_32BIT_KERNEL >> 354 select SYS_SUPPORTS_64BIT_KERNEL >> 355 select SYS_SUPPORTS_100HZ >> 356 help >> 357 This a family of machines based on the MIPS R4030 chipset which was >> 358 used by several vendors to build RISC/os and Windows NT workstations. >> 359 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and >> 360 Olivetti M700-10 workstations. >> 361 >> 362 config MACH_INGENIC >> 363 bool "Ingenic SoC based machines" >> 364 select SYS_SUPPORTS_32BIT_KERNEL >> 365 select SYS_SUPPORTS_LITTLE_ENDIAN >> 366 select SYS_SUPPORTS_ZBOOT_UART16550 >> 367 select DMA_NONCOHERENT >> 368 select IRQ_MIPS_CPU >> 369 select PINCTRL >> 370 select GPIOLIB >> 371 select COMMON_CLK >> 372 select GENERIC_IRQ_CHIP >> 373 select BUILTIN_DTB >> 374 select USE_OF >> 375 select LIBFDT >> 376 >> 377 config LANTIQ >> 378 bool "Lantiq based platforms" >> 379 select DMA_NONCOHERENT >> 380 select IRQ_MIPS_CPU >> 381 select CEVT_R4K >> 382 select CSRC_R4K >> 383 select SYS_HAS_CPU_MIPS32_R1 >> 384 select SYS_HAS_CPU_MIPS32_R2 >> 385 select SYS_SUPPORTS_BIG_ENDIAN >> 386 select SYS_SUPPORTS_32BIT_KERNEL >> 387 select SYS_SUPPORTS_MIPS16 >> 388 select SYS_SUPPORTS_MULTITHREADING >> 389 select SYS_HAS_EARLY_PRINTK >> 390 select GPIOLIB >> 391 select SWAP_IO_SPACE >> 392 select BOOT_RAW >> 393 select CLKDEV_LOOKUP >> 394 select USE_OF >> 395 select PINCTRL >> 396 select PINCTRL_LANTIQ >> 397 select ARCH_HAS_RESET_CONTROLLER >> 398 select RESET_CONTROLLER >> 399 >> 400 config LASAT >> 401 bool "LASAT Networks platforms" >> 402 select CEVT_R4K >> 403 select CRC32 >> 404 select CSRC_R4K >> 405 select DMA_NONCOHERENT >> 406 select SYS_HAS_EARLY_PRINTK >> 407 select HW_HAS_PCI >> 408 select IRQ_MIPS_CPU >> 409 select PCI_GT64XXX_PCI0 >> 410 select MIPS_NILE4 >> 411 select R5000_CPU_SCACHE >> 412 select SYS_HAS_CPU_R5000 >> 413 select SYS_SUPPORTS_32BIT_KERNEL >> 414 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN >> 415 select SYS_SUPPORTS_LITTLE_ENDIAN >> 416 >> 417 config MACH_LOONGSON32 >> 418 bool "Loongson-1 family of machines" >> 419 select SYS_SUPPORTS_ZBOOT >> 420 help >> 421 This enables support for the Loongson-1 family of machines. >> 422 >> 423 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by >> 424 the Institute of Computing Technology (ICT), Chinese Academy of >> 425 Sciences (CAS). >> 426 >> 427 config MACH_LOONGSON64 >> 428 bool "Loongson-2/3 family of machines" >> 429 select SYS_SUPPORTS_ZBOOT >> 430 help >> 431 This enables the support of Loongson-2/3 family of machines. >> 432 >> 433 Loongson-2 is a family of single-core CPUs and Loongson-3 is a >> 434 family of multi-core CPUs. They are both 64-bit general-purpose >> 435 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute >> 436 of Computing Technology (ICT), Chinese Academy of Sciences (CAS) >> 437 in the People's Republic of China. The chief architect is Professor >> 438 Weiwu Hu. >> 439 >> 440 config MACH_PISTACHIO >> 441 bool "IMG Pistachio SoC based boards" >> 442 select BOOT_ELF32 >> 443 select BOOT_RAW >> 444 select CEVT_R4K >> 445 select CLKSRC_MIPS_GIC >> 446 select COMMON_CLK >> 447 select CSRC_R4K >> 448 select DMA_NONCOHERENT >> 449 select GPIOLIB >> 450 select IRQ_MIPS_CPU >> 451 select LIBFDT >> 452 select MFD_SYSCON >> 453 select MIPS_CPU_SCACHE >> 454 select MIPS_GIC >> 455 select PINCTRL >> 456 select REGULATOR >> 457 select SYS_HAS_CPU_MIPS32_R2 >> 458 select SYS_SUPPORTS_32BIT_KERNEL >> 459 select SYS_SUPPORTS_LITTLE_ENDIAN >> 460 select SYS_SUPPORTS_MIPS_CPS >> 461 select SYS_SUPPORTS_MULTITHREADING >> 462 select SYS_SUPPORTS_RELOCATABLE >> 463 select SYS_SUPPORTS_ZBOOT >> 464 select SYS_HAS_EARLY_PRINTK >> 465 select USE_GENERIC_EARLY_PRINTK_8250 >> 466 select USE_OF >> 467 help >> 468 This enables support for the IMG Pistachio SoC platform. >> 469 >> 470 config MACH_XILFPGA >> 471 bool "MIPSfpga Xilinx based boards" >> 472 select BOOT_ELF32 >> 473 select BOOT_RAW >> 474 select BUILTIN_DTB >> 475 select CEVT_R4K >> 476 select COMMON_CLK >> 477 select CSRC_R4K >> 478 select GPIOLIB >> 479 select IRQ_MIPS_CPU >> 480 select LIBFDT >> 481 select MIPS_CPU_SCACHE >> 482 select SYS_HAS_EARLY_PRINTK >> 483 select SYS_HAS_CPU_MIPS32_R2 >> 484 select SYS_SUPPORTS_32BIT_KERNEL >> 485 select SYS_SUPPORTS_LITTLE_ENDIAN >> 486 select SYS_SUPPORTS_ZBOOT_UART16550 >> 487 select USE_OF >> 488 select USE_GENERIC_EARLY_PRINTK_8250 >> 489 select XILINX_INTC >> 490 help >> 491 This enables support for the IMG University Program MIPSfpga platform. >> 492 >> 493 config MIPS_MALTA >> 494 bool "MIPS Malta board" >> 495 select ARCH_MAY_HAVE_PC_FDC >> 496 select BOOT_ELF32 >> 497 select BOOT_RAW >> 498 select BUILTIN_DTB >> 499 select CEVT_R4K >> 500 select CSRC_R4K >> 501 select CLKSRC_MIPS_GIC >> 502 select COMMON_CLK >> 503 select DMA_MAYBE_COHERENT >> 504 select GENERIC_ISA_DMA >> 505 select HAVE_PCSPKR_PLATFORM >> 506 select IRQ_MIPS_CPU >> 507 select MIPS_GIC >> 508 select HW_HAS_PCI >> 509 select I8253 >> 510 select I8259 >> 511 select MIPS_BONITO64 >> 512 select MIPS_CPU_SCACHE >> 513 select MIPS_L1_CACHE_SHIFT_6 >> 514 select PCI_GT64XXX_PCI0 >> 515 select MIPS_MSC >> 516 select SMP_UP if SMP >> 517 select SWAP_IO_SPACE >> 518 select SYS_HAS_CPU_MIPS32_R1 >> 519 select SYS_HAS_CPU_MIPS32_R2 >> 520 select SYS_HAS_CPU_MIPS32_R3_5 >> 521 select SYS_HAS_CPU_MIPS32_R5 >> 522 select SYS_HAS_CPU_MIPS32_R6 >> 523 select SYS_HAS_CPU_MIPS64_R1 >> 524 select SYS_HAS_CPU_MIPS64_R2 >> 525 select SYS_HAS_CPU_MIPS64_R6 >> 526 select SYS_HAS_CPU_NEVADA >> 527 select SYS_HAS_CPU_RM7000 >> 528 select SYS_SUPPORTS_32BIT_KERNEL >> 529 select SYS_SUPPORTS_64BIT_KERNEL >> 530 select SYS_SUPPORTS_BIG_ENDIAN >> 531 select SYS_SUPPORTS_HIGHMEM >> 532 select SYS_SUPPORTS_LITTLE_ENDIAN >> 533 select SYS_SUPPORTS_MICROMIPS >> 534 select SYS_SUPPORTS_MIPS_CMP >> 535 select SYS_SUPPORTS_MIPS_CPS >> 536 select SYS_SUPPORTS_MIPS16 >> 537 select SYS_SUPPORTS_MULTITHREADING >> 538 select SYS_SUPPORTS_SMARTMIPS >> 539 select SYS_SUPPORTS_ZBOOT >> 540 select SYS_SUPPORTS_RELOCATABLE >> 541 select USE_OF >> 542 select LIBFDT >> 543 select ZONE_DMA32 if 64BIT >> 544 select BUILTIN_DTB >> 545 select LIBFDT >> 546 help >> 547 This enables support for the MIPS Technologies Malta evaluation >> 548 board. >> 549 >> 550 config MACH_PIC32 >> 551 bool "Microchip PIC32 Family" >> 552 help >> 553 This enables support for the Microchip PIC32 family of platforms. >> 554 >> 555 Microchip PIC32 is a family of general-purpose 32 bit MIPS core >> 556 microcontrollers. >> 557 >> 558 config NEC_MARKEINS >> 559 bool "NEC EMMA2RH Mark-eins board" >> 560 select SOC_EMMA2RH >> 561 select HW_HAS_PCI >> 562 help >> 563 This enables support for the NEC Electronics Mark-eins boards. >> 564 >> 565 config MACH_VR41XX >> 566 bool "NEC VR4100 series based machines" >> 567 select CEVT_R4K >> 568 select CSRC_R4K >> 569 select SYS_HAS_CPU_VR41XX >> 570 select SYS_SUPPORTS_MIPS16 >> 571 select GPIOLIB 344 572 345 config ARCH_MMAP_RND_BITS_MAX !! 573 config NXP_STB220 346 default 32 if 64BIT !! 574 bool "NXP STB220 board" 347 default 16 !! 575 select SOC_PNX833X >> 576 help >> 577 Support for NXP Semiconductors STB220 Development Board. >> 578 >> 579 config NXP_STB225 >> 580 bool "NXP 225 board" >> 581 select SOC_PNX833X >> 582 select SOC_PNX8335 >> 583 help >> 584 Support for NXP Semiconductors STB225 Development Board. >> 585 >> 586 config PMC_MSP >> 587 bool "PMC-Sierra MSP chipsets" >> 588 select CEVT_R4K >> 589 select CSRC_R4K >> 590 select DMA_NONCOHERENT >> 591 select SWAP_IO_SPACE >> 592 select NO_EXCEPT_FILL >> 593 select BOOT_RAW >> 594 select SYS_HAS_CPU_MIPS32_R1 >> 595 select SYS_HAS_CPU_MIPS32_R2 >> 596 select SYS_SUPPORTS_32BIT_KERNEL >> 597 select SYS_SUPPORTS_BIG_ENDIAN >> 598 select SYS_SUPPORTS_MIPS16 >> 599 select IRQ_MIPS_CPU >> 600 select SERIAL_8250 >> 601 select SERIAL_8250_CONSOLE >> 602 select USB_EHCI_BIG_ENDIAN_MMIO >> 603 select USB_EHCI_BIG_ENDIAN_DESC >> 604 help >> 605 This adds support for the PMC-Sierra family of Multi-Service >> 606 Processor System-On-A-Chips. These parts include a number >> 607 of integrated peripherals, interfaces and DSPs in addition to >> 608 a variety of MIPS cores. >> 609 >> 610 config RALINK >> 611 bool "Ralink based machines" >> 612 select CEVT_R4K >> 613 select CSRC_R4K >> 614 select BOOT_RAW >> 615 select DMA_NONCOHERENT >> 616 select IRQ_MIPS_CPU >> 617 select USE_OF >> 618 select SYS_HAS_CPU_MIPS32_R1 >> 619 select SYS_HAS_CPU_MIPS32_R2 >> 620 select SYS_SUPPORTS_32BIT_KERNEL >> 621 select SYS_SUPPORTS_LITTLE_ENDIAN >> 622 select SYS_SUPPORTS_MIPS16 >> 623 select SYS_HAS_EARLY_PRINTK >> 624 select CLKDEV_LOOKUP >> 625 select ARCH_HAS_RESET_CONTROLLER >> 626 select RESET_CONTROLLER >> 627 >> 628 config SGI_IP22 >> 629 bool "SGI IP22 (Indy/Indigo2)" >> 630 select FW_ARC >> 631 select FW_ARC32 >> 632 select BOOT_ELF32 >> 633 select CEVT_R4K >> 634 select CSRC_R4K >> 635 select DEFAULT_SGI_PARTITION >> 636 select DMA_NONCOHERENT >> 637 select HW_HAS_EISA >> 638 select I8253 >> 639 select I8259 >> 640 select IP22_CPU_SCACHE >> 641 select IRQ_MIPS_CPU >> 642 select GENERIC_ISA_DMA_SUPPORT_BROKEN >> 643 select SGI_HAS_I8042 >> 644 select SGI_HAS_INDYDOG >> 645 select SGI_HAS_HAL2 >> 646 select SGI_HAS_SEEQ >> 647 select SGI_HAS_WD93 >> 648 select SGI_HAS_ZILOG >> 649 select SWAP_IO_SPACE >> 650 select SYS_HAS_CPU_R4X00 >> 651 select SYS_HAS_CPU_R5000 >> 652 # >> 653 # Disable EARLY_PRINTK for now since it leads to overwritten prom >> 654 # memory during early boot on some machines. >> 655 # >> 656 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com >> 657 # for a more details discussion >> 658 # >> 659 # select SYS_HAS_EARLY_PRINTK >> 660 select SYS_SUPPORTS_32BIT_KERNEL >> 661 select SYS_SUPPORTS_64BIT_KERNEL >> 662 select SYS_SUPPORTS_BIG_ENDIAN >> 663 select MIPS_L1_CACHE_SHIFT_7 >> 664 help >> 665 This are the SGI Indy, Challenge S and Indigo2, as well as certain >> 666 OEM variants like the Tandem CMN B006S. To compile a Linux kernel >> 667 that runs on these, say Y here. >> 668 >> 669 config SGI_IP27 >> 670 bool "SGI IP27 (Origin200/2000)" >> 671 select FW_ARC >> 672 select FW_ARC64 >> 673 select BOOT_ELF64 >> 674 select DEFAULT_SGI_PARTITION >> 675 select DMA_COHERENT >> 676 select SYS_HAS_EARLY_PRINTK >> 677 select HW_HAS_PCI >> 678 select NR_CPUS_DEFAULT_64 >> 679 select SYS_HAS_CPU_R10000 >> 680 select SYS_SUPPORTS_64BIT_KERNEL >> 681 select SYS_SUPPORTS_BIG_ENDIAN >> 682 select SYS_SUPPORTS_NUMA >> 683 select SYS_SUPPORTS_SMP >> 684 select MIPS_L1_CACHE_SHIFT_7 >> 685 help >> 686 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics >> 687 workstations. To compile a Linux kernel that runs on these, say Y >> 688 here. >> 689 >> 690 config SGI_IP28 >> 691 bool "SGI IP28 (Indigo2 R10k)" >> 692 select FW_ARC >> 693 select FW_ARC64 >> 694 select BOOT_ELF64 >> 695 select CEVT_R4K >> 696 select CSRC_R4K >> 697 select DEFAULT_SGI_PARTITION >> 698 select DMA_NONCOHERENT >> 699 select GENERIC_ISA_DMA_SUPPORT_BROKEN >> 700 select IRQ_MIPS_CPU >> 701 select HW_HAS_EISA >> 702 select I8253 >> 703 select I8259 >> 704 select SGI_HAS_I8042 >> 705 select SGI_HAS_INDYDOG >> 706 select SGI_HAS_HAL2 >> 707 select SGI_HAS_SEEQ >> 708 select SGI_HAS_WD93 >> 709 select SGI_HAS_ZILOG >> 710 select SWAP_IO_SPACE >> 711 select SYS_HAS_CPU_R10000 >> 712 # >> 713 # Disable EARLY_PRINTK for now since it leads to overwritten prom >> 714 # memory during early boot on some machines. >> 715 # >> 716 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com >> 717 # for a more details discussion >> 718 # >> 719 # select SYS_HAS_EARLY_PRINTK >> 720 select SYS_SUPPORTS_64BIT_KERNEL >> 721 select SYS_SUPPORTS_BIG_ENDIAN >> 722 select MIPS_L1_CACHE_SHIFT_7 >> 723 help >> 724 This is the SGI Indigo2 with R10000 processor. To compile a Linux >> 725 kernel that runs on these, say Y here. >> 726 >> 727 config SGI_IP32 >> 728 bool "SGI IP32 (O2)" >> 729 select FW_ARC >> 730 select FW_ARC32 >> 731 select BOOT_ELF32 >> 732 select CEVT_R4K >> 733 select CSRC_R4K >> 734 select DMA_NONCOHERENT >> 735 select HW_HAS_PCI >> 736 select IRQ_MIPS_CPU >> 737 select R5000_CPU_SCACHE >> 738 select RM7000_CPU_SCACHE >> 739 select SYS_HAS_CPU_R5000 >> 740 select SYS_HAS_CPU_R10000 if BROKEN >> 741 select SYS_HAS_CPU_RM7000 >> 742 select SYS_HAS_CPU_NEVADA >> 743 select SYS_SUPPORTS_64BIT_KERNEL >> 744 select SYS_SUPPORTS_BIG_ENDIAN >> 745 help >> 746 If you want this kernel to run on SGI O2 workstation, say Y here. >> 747 >> 748 config SIBYTE_CRHINE >> 749 bool "Sibyte BCM91120C-CRhine" >> 750 select BOOT_ELF32 >> 751 select DMA_COHERENT >> 752 select SIBYTE_BCM1120 >> 753 select SWAP_IO_SPACE >> 754 select SYS_HAS_CPU_SB1 >> 755 select SYS_SUPPORTS_BIG_ENDIAN >> 756 select SYS_SUPPORTS_LITTLE_ENDIAN >> 757 >> 758 config SIBYTE_CARMEL >> 759 bool "Sibyte BCM91120x-Carmel" >> 760 select BOOT_ELF32 >> 761 select DMA_COHERENT >> 762 select SIBYTE_BCM1120 >> 763 select SWAP_IO_SPACE >> 764 select SYS_HAS_CPU_SB1 >> 765 select SYS_SUPPORTS_BIG_ENDIAN >> 766 select SYS_SUPPORTS_LITTLE_ENDIAN >> 767 >> 768 config SIBYTE_CRHONE >> 769 bool "Sibyte BCM91125C-CRhone" >> 770 select BOOT_ELF32 >> 771 select DMA_COHERENT >> 772 select SIBYTE_BCM1125 >> 773 select SWAP_IO_SPACE >> 774 select SYS_HAS_CPU_SB1 >> 775 select SYS_SUPPORTS_BIG_ENDIAN >> 776 select SYS_SUPPORTS_HIGHMEM >> 777 select SYS_SUPPORTS_LITTLE_ENDIAN >> 778 >> 779 config SIBYTE_RHONE >> 780 bool "Sibyte BCM91125E-Rhone" >> 781 select BOOT_ELF32 >> 782 select DMA_COHERENT >> 783 select SIBYTE_BCM1125H >> 784 select SWAP_IO_SPACE >> 785 select SYS_HAS_CPU_SB1 >> 786 select SYS_SUPPORTS_BIG_ENDIAN >> 787 select SYS_SUPPORTS_LITTLE_ENDIAN >> 788 >> 789 config SIBYTE_SWARM >> 790 bool "Sibyte BCM91250A-SWARM" >> 791 select BOOT_ELF32 >> 792 select DMA_COHERENT >> 793 select HAVE_PATA_PLATFORM >> 794 select SIBYTE_SB1250 >> 795 select SWAP_IO_SPACE >> 796 select SYS_HAS_CPU_SB1 >> 797 select SYS_SUPPORTS_BIG_ENDIAN >> 798 select SYS_SUPPORTS_HIGHMEM >> 799 select SYS_SUPPORTS_LITTLE_ENDIAN >> 800 select ZONE_DMA32 if 64BIT >> 801 >> 802 config SIBYTE_LITTLESUR >> 803 bool "Sibyte BCM91250C2-LittleSur" >> 804 select BOOT_ELF32 >> 805 select DMA_COHERENT >> 806 select HAVE_PATA_PLATFORM >> 807 select SIBYTE_SB1250 >> 808 select SWAP_IO_SPACE >> 809 select SYS_HAS_CPU_SB1 >> 810 select SYS_SUPPORTS_BIG_ENDIAN >> 811 select SYS_SUPPORTS_HIGHMEM >> 812 select SYS_SUPPORTS_LITTLE_ENDIAN >> 813 >> 814 config SIBYTE_SENTOSA >> 815 bool "Sibyte BCM91250E-Sentosa" >> 816 select BOOT_ELF32 >> 817 select DMA_COHERENT >> 818 select SIBYTE_SB1250 >> 819 select SWAP_IO_SPACE >> 820 select SYS_HAS_CPU_SB1 >> 821 select SYS_SUPPORTS_BIG_ENDIAN >> 822 select SYS_SUPPORTS_LITTLE_ENDIAN >> 823 >> 824 config SIBYTE_BIGSUR >> 825 bool "Sibyte BCM91480B-BigSur" >> 826 select BOOT_ELF32 >> 827 select DMA_COHERENT >> 828 select NR_CPUS_DEFAULT_4 >> 829 select SIBYTE_BCM1x80 >> 830 select SWAP_IO_SPACE >> 831 select SYS_HAS_CPU_SB1 >> 832 select SYS_SUPPORTS_BIG_ENDIAN >> 833 select SYS_SUPPORTS_HIGHMEM >> 834 select SYS_SUPPORTS_LITTLE_ENDIAN >> 835 select ZONE_DMA32 if 64BIT >> 836 >> 837 config SNI_RM >> 838 bool "SNI RM200/300/400" >> 839 select FW_ARC if CPU_LITTLE_ENDIAN >> 840 select FW_ARC32 if CPU_LITTLE_ENDIAN >> 841 select FW_SNIPROM if CPU_BIG_ENDIAN >> 842 select ARCH_MAY_HAVE_PC_FDC >> 843 select BOOT_ELF32 >> 844 select CEVT_R4K >> 845 select CSRC_R4K >> 846 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN >> 847 select DMA_NONCOHERENT >> 848 select GENERIC_ISA_DMA >> 849 select HAVE_PCSPKR_PLATFORM >> 850 select HW_HAS_EISA >> 851 select HW_HAS_PCI >> 852 select IRQ_MIPS_CPU >> 853 select I8253 >> 854 select I8259 >> 855 select ISA >> 856 select SWAP_IO_SPACE if CPU_BIG_ENDIAN >> 857 select SYS_HAS_CPU_R4X00 >> 858 select SYS_HAS_CPU_R5000 >> 859 select SYS_HAS_CPU_R10000 >> 860 select R5000_CPU_SCACHE >> 861 select SYS_HAS_EARLY_PRINTK >> 862 select SYS_SUPPORTS_32BIT_KERNEL >> 863 select SYS_SUPPORTS_64BIT_KERNEL >> 864 select SYS_SUPPORTS_BIG_ENDIAN >> 865 select SYS_SUPPORTS_HIGHMEM >> 866 select SYS_SUPPORTS_LITTLE_ENDIAN >> 867 help >> 868 The SNI RM200/300/400 are MIPS-based machines manufactured by >> 869 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid >> 870 Technology and now in turn merged with Fujitsu. Say Y here to >> 871 support this machine type. >> 872 >> 873 config MACH_TX39XX >> 874 bool "Toshiba TX39 series based machines" >> 875 >> 876 config MACH_TX49XX >> 877 bool "Toshiba TX49 series based machines" >> 878 >> 879 config MIKROTIK_RB532 >> 880 bool "Mikrotik RB532 boards" >> 881 select CEVT_R4K >> 882 select CSRC_R4K >> 883 select DMA_NONCOHERENT >> 884 select HW_HAS_PCI >> 885 select IRQ_MIPS_CPU >> 886 select SYS_HAS_CPU_MIPS32_R1 >> 887 select SYS_SUPPORTS_32BIT_KERNEL >> 888 select SYS_SUPPORTS_LITTLE_ENDIAN >> 889 select SWAP_IO_SPACE >> 890 select BOOT_RAW >> 891 select GPIOLIB >> 892 select MIPS_L1_CACHE_SHIFT_4 >> 893 help >> 894 Support the Mikrotik(tm) RouterBoard 532 series, >> 895 based on the IDT RC32434 SoC. 348 896 349 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 897 config CAVIUM_OCTEON_SOC 350 default 8 !! 898 bool "Cavium Networks Octeon SoC based boards" >> 899 select CEVT_R4K >> 900 select ARCH_PHYS_ADDR_T_64BIT >> 901 select DMA_COHERENT >> 902 select SYS_SUPPORTS_64BIT_KERNEL >> 903 select SYS_SUPPORTS_BIG_ENDIAN >> 904 select EDAC_SUPPORT >> 905 select EDAC_ATOMIC_SCRUB >> 906 select SYS_SUPPORTS_LITTLE_ENDIAN >> 907 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN >> 908 select SYS_HAS_EARLY_PRINTK >> 909 select SYS_HAS_CPU_CAVIUM_OCTEON >> 910 select HW_HAS_PCI >> 911 select ZONE_DMA32 >> 912 select HOLES_IN_ZONE >> 913 select GPIOLIB >> 914 select LIBFDT >> 915 select USE_OF >> 916 select ARCH_SPARSEMEM_ENABLE >> 917 select SYS_SUPPORTS_SMP >> 918 select NR_CPUS_DEFAULT_16 >> 919 select BUILTIN_DTB >> 920 select MTD_COMPLEX_MAPPINGS >> 921 select SYS_SUPPORTS_RELOCATABLE >> 922 help >> 923 This option supports all of the Octeon reference boards from Cavium >> 924 Networks. It builds a kernel that dynamically determines the Octeon >> 925 CPU type and supports all known board reference implementations. >> 926 Some of the supported boards are: >> 927 EBT3000 >> 928 EBH3000 >> 929 EBH3100 >> 930 Thunder >> 931 Kodama >> 932 Hikari >> 933 Say Y here for most Octeon reference boards. >> 934 >> 935 config NLM_XLR_BOARD >> 936 bool "Netlogic XLR/XLS based systems" >> 937 select BOOT_ELF32 >> 938 select NLM_COMMON >> 939 select SYS_HAS_CPU_XLR >> 940 select SYS_SUPPORTS_SMP >> 941 select HW_HAS_PCI >> 942 select SWAP_IO_SPACE >> 943 select SYS_SUPPORTS_32BIT_KERNEL >> 944 select SYS_SUPPORTS_64BIT_KERNEL >> 945 select ARCH_PHYS_ADDR_T_64BIT >> 946 select SYS_SUPPORTS_BIG_ENDIAN >> 947 select SYS_SUPPORTS_HIGHMEM >> 948 select DMA_COHERENT >> 949 select NR_CPUS_DEFAULT_32 >> 950 select CEVT_R4K >> 951 select CSRC_R4K >> 952 select IRQ_MIPS_CPU >> 953 select ZONE_DMA32 if 64BIT >> 954 select SYNC_R4K >> 955 select SYS_HAS_EARLY_PRINTK >> 956 select SYS_SUPPORTS_ZBOOT >> 957 select SYS_SUPPORTS_ZBOOT_UART16550 >> 958 help >> 959 Support for systems based on Netlogic XLR and XLS processors. >> 960 Say Y here if you have a XLR or XLS based board. >> 961 >> 962 config NLM_XLP_BOARD >> 963 bool "Netlogic XLP based systems" >> 964 select BOOT_ELF32 >> 965 select NLM_COMMON >> 966 select SYS_HAS_CPU_XLP >> 967 select SYS_SUPPORTS_SMP >> 968 select HW_HAS_PCI >> 969 select SYS_SUPPORTS_32BIT_KERNEL >> 970 select SYS_SUPPORTS_64BIT_KERNEL >> 971 select ARCH_PHYS_ADDR_T_64BIT >> 972 select GPIOLIB >> 973 select SYS_SUPPORTS_BIG_ENDIAN >> 974 select SYS_SUPPORTS_LITTLE_ENDIAN >> 975 select SYS_SUPPORTS_HIGHMEM >> 976 select DMA_COHERENT >> 977 select NR_CPUS_DEFAULT_32 >> 978 select CEVT_R4K >> 979 select CSRC_R4K >> 980 select IRQ_MIPS_CPU >> 981 select ZONE_DMA32 if 64BIT >> 982 select SYNC_R4K >> 983 select SYS_HAS_EARLY_PRINTK >> 984 select USE_OF >> 985 select SYS_SUPPORTS_ZBOOT >> 986 select SYS_SUPPORTS_ZBOOT_UART16550 >> 987 help >> 988 This board is based on Netlogic XLP Processor. >> 989 Say Y here if you have a XLP based board. >> 990 >> 991 config MIPS_PARAVIRT >> 992 bool "Para-Virtualized guest system" >> 993 select CEVT_R4K >> 994 select CSRC_R4K >> 995 select DMA_COHERENT >> 996 select SYS_SUPPORTS_64BIT_KERNEL >> 997 select SYS_SUPPORTS_32BIT_KERNEL >> 998 select SYS_SUPPORTS_BIG_ENDIAN >> 999 select SYS_SUPPORTS_SMP >> 1000 select NR_CPUS_DEFAULT_4 >> 1001 select SYS_HAS_EARLY_PRINTK >> 1002 select SYS_HAS_CPU_MIPS32_R2 >> 1003 select SYS_HAS_CPU_MIPS64_R2 >> 1004 select SYS_HAS_CPU_CAVIUM_OCTEON >> 1005 select HW_HAS_PCI >> 1006 select SWAP_IO_SPACE >> 1007 help >> 1008 This option supports guest running under ???? 351 1009 352 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 1010 endchoice 353 default 16 << 354 1011 355 config SBUS !! 1012 source "arch/mips/alchemy/Kconfig" 356 bool !! 1013 source "arch/mips/ath25/Kconfig" >> 1014 source "arch/mips/ath79/Kconfig" >> 1015 source "arch/mips/bcm47xx/Kconfig" >> 1016 source "arch/mips/bcm63xx/Kconfig" >> 1017 source "arch/mips/bmips/Kconfig" >> 1018 source "arch/mips/generic/Kconfig" >> 1019 source "arch/mips/jazz/Kconfig" >> 1020 source "arch/mips/jz4740/Kconfig" >> 1021 source "arch/mips/lantiq/Kconfig" >> 1022 source "arch/mips/lasat/Kconfig" >> 1023 source "arch/mips/pic32/Kconfig" >> 1024 source "arch/mips/pistachio/Kconfig" >> 1025 source "arch/mips/pmcs-msp71xx/Kconfig" >> 1026 source "arch/mips/ralink/Kconfig" >> 1027 source "arch/mips/sgi-ip27/Kconfig" >> 1028 source "arch/mips/sibyte/Kconfig" >> 1029 source "arch/mips/txx9/Kconfig" >> 1030 source "arch/mips/vr41xx/Kconfig" >> 1031 source "arch/mips/cavium-octeon/Kconfig" >> 1032 source "arch/mips/loongson32/Kconfig" >> 1033 source "arch/mips/loongson64/Kconfig" >> 1034 source "arch/mips/netlogic/Kconfig" >> 1035 source "arch/mips/paravirt/Kconfig" >> 1036 source "arch/mips/xilfpga/Kconfig" 357 1037 358 config GENERIC_ISA_DMA !! 1038 endmenu 359 def_bool y << 360 depends on ISA_DMA_API << 361 1039 362 config GENERIC_CSUM !! 1040 config RWSEM_GENERIC_SPINLOCK 363 bool 1041 bool 364 default y if KMSAN || KASAN !! 1042 default y 365 << 366 config GENERIC_BUG << 367 def_bool y << 368 depends on BUG << 369 select GENERIC_BUG_RELATIVE_POINTERS i << 370 1043 371 config GENERIC_BUG_RELATIVE_POINTERS !! 1044 config RWSEM_XCHGADD_ALGORITHM 372 bool 1045 bool 373 1046 374 config ARCH_MAY_HAVE_PC_FDC !! 1047 config GENERIC_HWEIGHT 375 def_bool y !! 1048 bool 376 depends on ISA_DMA_API !! 1049 default y 377 1050 378 config GENERIC_CALIBRATE_DELAY 1051 config GENERIC_CALIBRATE_DELAY 379 def_bool y !! 1052 bool >> 1053 default y 380 1054 381 config ARCH_HAS_CPU_RELAX !! 1055 config SCHED_OMIT_FRAME_POINTER 382 def_bool y !! 1056 bool >> 1057 default y 383 1058 384 config ARCH_HIBERNATION_POSSIBLE !! 1059 # 385 def_bool y !! 1060 # Select some configuration options automatically based on user selections. >> 1061 # >> 1062 config FW_ARC >> 1063 bool 386 1064 387 config ARCH_SUSPEND_POSSIBLE !! 1065 config ARCH_MAY_HAVE_PC_FDC 388 def_bool y !! 1066 bool 389 1067 390 config AUDIT_ARCH !! 1068 config BOOT_RAW 391 def_bool y if X86_64 !! 1069 bool 392 1070 393 config KASAN_SHADOW_OFFSET !! 1071 config CEVT_BCM1480 394 hex !! 1072 bool 395 depends on KASAN << 396 default 0xdffffc0000000000 << 397 1073 398 config HAVE_INTEL_TXT !! 1074 config CEVT_DS1287 399 def_bool y !! 1075 bool 400 depends on INTEL_IOMMU && ACPI << 401 1076 402 config X86_64_SMP !! 1077 config CEVT_GT641XX 403 def_bool y !! 1078 bool 404 depends on X86_64 && SMP << 405 1079 406 config ARCH_SUPPORTS_UPROBES !! 1080 config CEVT_R4K 407 def_bool y !! 1081 bool 408 1082 409 config FIX_EARLYCON_MEM !! 1083 config CEVT_SB1250 410 def_bool y !! 1084 bool 411 1085 412 config DYNAMIC_PHYSICAL_MASK !! 1086 config CEVT_TXX9 413 bool 1087 bool 414 1088 415 config PGTABLE_LEVELS !! 1089 config CSRC_BCM1480 416 int !! 1090 bool 417 default 5 if X86_5LEVEL << 418 default 4 if X86_64 << 419 default 3 if X86_PAE << 420 default 2 << 421 1091 422 config CC_HAS_SANE_STACKPROTECTOR !! 1092 config CSRC_IOASIC 423 bool 1093 bool 424 default $(success,$(srctree)/scripts/g << 425 default $(success,$(srctree)/scripts/g << 426 help << 427 We have to make sure stack protector << 428 the compiler produces broken code or << 429 the segment on 32-bit kernels. << 430 1094 431 menu "Processor type and features" !! 1095 config CSRC_R4K >> 1096 bool 432 1097 433 config SMP !! 1098 config CSRC_SB1250 434 bool "Symmetric multi-processing suppo !! 1099 bool 435 help << 436 This enables support for systems wit << 437 a system with only one CPU, say N. I << 438 than one CPU, say Y. << 439 1100 440 If you say N here, the kernel will r !! 1101 config MIPS_CLOCK_VSYSCALL 441 machines, but will use only one CPU !! 1102 def_bool CSRC_R4K || CLKSRC_MIPS_GIC 442 you say Y here, the kernel will run << 443 uniprocessor machines. On a uniproce << 444 will run faster if you say N here. << 445 1103 446 Note that if you say Y here and choo !! 1104 config GPIO_TXX9 447 "Pentium" under "Processor family", !! 1105 select GPIOLIB 448 architectures. Similarly, multiproce !! 1106 bool 449 architecture may not work on all Pen << 450 1107 451 People using multiprocessor machines !! 1108 config FW_CFE 452 Y to "Enhanced Real Time Clock Suppo !! 1109 bool 453 Management" code will be disabled if << 454 1110 455 See also <file:Documentation/arch/x8 !! 1111 config ARCH_DMA_ADDR_T_64BIT 456 <file:Documentation/admin-guide/lock !! 1112 def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 457 <http://www.tldp.org/docs.html#howto << 458 1113 459 If you don't know what to do here, s !! 1114 config ARCH_SUPPORTS_UPROBES >> 1115 bool 460 1116 461 config X86_X2APIC !! 1117 config DMA_MAYBE_COHERENT 462 bool "Support x2apic" !! 1118 select DMA_NONCOHERENT 463 depends on X86_LOCAL_APIC && X86_64 && !! 1119 bool 464 help << 465 This enables x2apic support on CPUs << 466 << 467 This allows 32-bit apic IDs (so it c << 468 and accesses the local apic via MSRs << 469 << 470 Some Intel systems circa 2022 and la << 471 and can not fall back to the legacy << 472 enabled in the BIOS. They will boot << 473 without enabling this option. << 474 1120 475 If you don't know what to do here, s !! 1121 config DMA_PERDEV_COHERENT >> 1122 bool >> 1123 select DMA_MAYBE_COHERENT 476 1124 477 config X86_POSTED_MSI !! 1125 config DMA_COHERENT 478 bool "Enable MSI and MSI-x delivery by !! 1126 bool 479 depends on X86_64 && IRQ_REMAP << 480 help << 481 This enables MSIs that are under int << 482 posted interrupts to the host kernel << 483 potentially be improved by coalescin << 484 frequency bursts. << 485 1127 486 If you don't know what to do here, s !! 1128 config DMA_NONCOHERENT >> 1129 bool >> 1130 select NEED_DMA_MAP_STATE 487 1131 488 config X86_MPPARSE !! 1132 config NEED_DMA_MAP_STATE 489 bool "Enable MPS table" if ACPI !! 1133 bool 490 default y << 491 depends on X86_LOCAL_APIC << 492 help << 493 For old smp systems that do not have << 494 (esp with 64bit cpus) with acpi supp << 495 1134 496 config X86_CPU_RESCTRL !! 1135 config SYS_HAS_EARLY_PRINTK 497 bool "x86 CPU resource control support !! 1136 bool 498 depends on X86 && (CPU_SUP_INTEL || CP !! 1137 499 select KERNFS !! 1138 config SYS_SUPPORTS_HOTPLUG_CPU 500 select PROC_CPU_RESCTRL if PRO !! 1139 bool 501 help << 502 Enable x86 CPU resource control supp << 503 1140 504 Provide support for the allocation a !! 1141 config MIPS_BONITO64 505 usage by the CPU. !! 1142 bool 506 1143 507 Intel calls this Intel Resource Dire !! 1144 config MIPS_MSC 508 (Intel(R) RDT). More information abo !! 1145 bool 509 Intel x86 Architecture Software Deve << 510 1146 511 AMD calls this AMD Platform Quality !! 1147 config MIPS_NILE4 512 More information about AMD QoS can b !! 1148 bool 513 Platform Quality of Service Extensio << 514 1149 515 Say N if unsure. !! 1150 config SYNC_R4K >> 1151 bool 516 1152 517 config X86_FRED !! 1153 config MIPS_MACHINE 518 bool "Flexible Return and Event Delive !! 1154 def_bool n 519 depends on X86_64 << 520 help << 521 When enabled, try to use Flexible Re << 522 instead of the legacy SYSCALL/SYSENT << 523 ring transitions and exception/inter << 524 system supports it. << 525 1155 526 config X86_BIGSMP !! 1156 config NO_IOPORT_MAP 527 bool "Support for big SMP systems with !! 1157 def_bool n 528 depends on SMP && X86_32 << 529 help << 530 This option is needed for the system << 531 1158 532 config X86_EXTENDED_PLATFORM !! 1159 config GENERIC_CSUM 533 bool "Support for extended (non-PC) x8 !! 1160 bool 534 default y << 535 help << 536 If you disable this option then the << 537 standard PC platforms. (which covers << 538 systems out there.) << 539 1161 540 If you enable this option then you'l !! 1162 config GENERIC_ISA_DMA 541 for the following non-PC x86 platfor !! 1163 bool 542 CONFIG_64BIT. !! 1164 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n >> 1165 select ISA_DMA_API 543 1166 544 32-bit platforms (CONFIG_64BIT=n): !! 1167 config GENERIC_ISA_DMA_SUPPORT_BROKEN 545 Goldfish (Android emulator) !! 1168 bool 546 AMD Elan !! 1169 select GENERIC_ISA_DMA 547 RDC R-321x SoC << 548 SGI 320/540 (Visual Workstatio << 549 STA2X11-based (e.g. Northville << 550 Moorestown MID devices << 551 1170 552 64-bit platforms (CONFIG_64BIT=y): !! 1171 config ISA_DMA_API 553 Numascale NumaChip !! 1172 bool 554 ScaleMP vSMP << 555 SGI Ultraviolet << 556 1173 557 If you have one of these systems, or !! 1174 config HOLES_IN_ZONE 558 generic distribution kernel, say Y h !! 1175 bool 559 1176 560 # This is an alphabetically sorted list of 64 !! 1177 config SYS_SUPPORTS_RELOCATABLE 561 # Please maintain the alphabetic order if and !! 1178 bool 562 config X86_NUMACHIP << 563 bool "Numascale NumaChip" << 564 depends on X86_64 << 565 depends on X86_EXTENDED_PLATFORM << 566 depends on NUMA << 567 depends on SMP << 568 depends on X86_X2APIC << 569 depends on PCI_MMCONFIG << 570 help << 571 Adds support for Numascale NumaChip << 572 enable more than ~168 cores. << 573 If you don't have one of these, you << 574 << 575 config X86_VSMP << 576 bool "ScaleMP vSMP" << 577 select HYPERVISOR_GUEST << 578 select PARAVIRT << 579 depends on X86_64 && PCI << 580 depends on X86_EXTENDED_PLATFORM << 581 depends on SMP << 582 help << 583 Support for ScaleMP vSMP systems. S << 584 supposed to run on these EM64T-based << 585 if you have one of these machines. << 586 << 587 config X86_UV << 588 bool "SGI Ultraviolet" << 589 depends on X86_64 << 590 depends on X86_EXTENDED_PLATFORM << 591 depends on NUMA << 592 depends on EFI << 593 depends on KEXEC_CORE << 594 depends on X86_X2APIC << 595 depends on PCI << 596 help 1179 help 597 This option is needed in order to su !! 1180 Selected if the platform supports relocating the kernel. 598 If you don't have one of these, you !! 1181 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF >> 1182 to allow access to command line and entropy sources. 599 1183 600 # Following is an alphabetically sorted list o !! 1184 config MIPS_CBPF_JIT 601 # Please maintain the alphabetic order if and !! 1185 def_bool y >> 1186 depends on BPF_JIT && HAVE_CBPF_JIT 602 1187 603 config X86_GOLDFISH !! 1188 config MIPS_EBPF_JIT 604 bool "Goldfish (Virtual Platform)" !! 1189 def_bool y 605 depends on X86_EXTENDED_PLATFORM !! 1190 depends on BPF_JIT && HAVE_EBPF_JIT 606 help << 607 Enable support for the Goldfish virt << 608 for Android development. Unless you << 609 Goldfish emulator say N here. << 610 1191 611 config X86_INTEL_CE << 612 bool "CE4100 TV platform" << 613 depends on PCI << 614 depends on PCI_GODIRECT << 615 depends on X86_IO_APIC << 616 depends on X86_32 << 617 depends on X86_EXTENDED_PLATFORM << 618 select X86_REBOOTFIXUPS << 619 select OF << 620 select OF_EARLY_FLATTREE << 621 help << 622 Select for the Intel CE media proces << 623 This option compiles in support for << 624 boxes and media devices. << 625 << 626 config X86_INTEL_MID << 627 bool "Intel MID platform support" << 628 depends on X86_EXTENDED_PLATFORM << 629 depends on X86_PLATFORM_DEVICES << 630 depends on PCI << 631 depends on X86_64 || (PCI_GOANY && X86 << 632 depends on X86_IO_APIC << 633 select I2C << 634 select DW_APB_TIMER << 635 select INTEL_SCU_PCI << 636 help << 637 Select to build a kernel capable of << 638 Internet Device) platform systems wh << 639 interfaces. If you are building for << 640 << 641 Intel MID platforms are based on an << 642 consume less power than most of the << 643 << 644 config X86_INTEL_QUARK << 645 bool "Intel Quark platform support" << 646 depends on X86_32 << 647 depends on X86_EXTENDED_PLATFORM << 648 depends on X86_PLATFORM_DEVICES << 649 depends on X86_TSC << 650 depends on PCI << 651 depends on PCI_GOANY << 652 depends on X86_IO_APIC << 653 select IOSF_MBI << 654 select INTEL_IMR << 655 select COMMON_CLK << 656 help << 657 Select to include support for Quark << 658 Say Y here if you have a Quark based << 659 compatible Intel Galileo. << 660 << 661 config X86_INTEL_LPSS << 662 bool "Intel Low Power Subsystem Suppor << 663 depends on X86 && ACPI && PCI << 664 select COMMON_CLK << 665 select PINCTRL << 666 select IOSF_MBI << 667 help << 668 Select to build support for Intel Lo << 669 found on Intel Lynxpoint PCH. Select << 670 things like clock tree (common clock << 671 which are needed by the LPSS periphe << 672 << 673 config X86_AMD_PLATFORM_DEVICE << 674 bool "AMD ACPI2Platform devices suppor << 675 depends on ACPI << 676 select COMMON_CLK << 677 select PINCTRL << 678 help << 679 Select to interpret AMD specific ACP << 680 such as I2C, UART, GPIO found on AMD << 681 I2C and UART depend on COMMON_CLK to << 682 implemented under PINCTRL subsystem. << 683 1192 684 config IOSF_MBI !! 1193 # 685 tristate "Intel SoC IOSF Sideband supp !! 1194 # Endianness selection. Sufficiently obscure so many users don't know what to 686 depends on PCI !! 1195 # answer,so we try hard to limit the available choices. Also the use of a >> 1196 # choice statement should be more obvious to the user. >> 1197 # >> 1198 choice >> 1199 prompt "Endianness selection" 687 help 1200 help 688 This option enables sideband registe !! 1201 Some MIPS machines can be configured for either little or big endian 689 platforms. On these platforms the IO !! 1202 byte order. These modes require different kernels and a different 690 MSR's for some register accesses, mo !! 1203 Linux distribution. In general there is one preferred byteorder for a 691 and power. Drivers may query the ava !! 1204 particular system but some systems are just as commonly used in the 692 determine if they need the sideband !! 1205 one or the other endianness. 693 platforms. The sideband is available !! 1206 694 This list is not meant to be exclusi !! 1207 config CPU_BIG_ENDIAN 695 - BayTrail !! 1208 bool "Big endian" 696 - Braswell !! 1209 depends on SYS_SUPPORTS_BIG_ENDIAN 697 - Quark !! 1210 698 !! 1211 config CPU_LITTLE_ENDIAN 699 You should say Y if you are running !! 1212 bool "Little endian" 700 !! 1213 depends on SYS_SUPPORTS_LITTLE_ENDIAN 701 config IOSF_MBI_DEBUG << 702 bool "Enable IOSF sideband access thro << 703 depends on IOSF_MBI && DEBUG_FS << 704 help << 705 Select this option to expose the IOS << 706 MDR, MCRX) through debugfs to write << 707 different units on the SoC. This is << 708 state information for debug and anal << 709 mechanism, users of this option woul << 710 device they want to access. << 711 << 712 If you don't require the option or a << 713 << 714 config X86_RDC321X << 715 bool "RDC R-321x SoC" << 716 depends on X86_32 << 717 depends on X86_EXTENDED_PLATFORM << 718 select M486 << 719 select X86_REBOOTFIXUPS << 720 help << 721 This option is needed for RDC R-321x << 722 as R-8610-(G). << 723 If you don't have one of these chips << 724 << 725 config X86_32_NON_STANDARD << 726 bool "Support non-standard 32-bit SMP << 727 depends on X86_32 && SMP << 728 depends on X86_EXTENDED_PLATFORM << 729 help << 730 This option compiles in the bigsmp a << 731 subarchitectures. It is intended fo << 732 kernel. If you select them all, kern << 733 one and will fallback to default. << 734 1214 735 # Alphabetically sorted list of Non standard 3 !! 1215 endchoice 736 1216 737 config X86_SUPPORTS_MEMORY_FAILURE !! 1217 config EXPORT_UASM 738 def_bool y !! 1218 bool 739 # MCE code calls memory_failure(): << 740 depends on X86_MCE << 741 # On 32-bit this adds too big of NODES << 742 # On 32-bit SPARSEMEM adds too big of << 743 depends on X86_64 || !SPARSEMEM << 744 select ARCH_SUPPORTS_MEMORY_FAILURE << 745 << 746 config STA2X11 << 747 bool "STA2X11 Companion Chip Support" << 748 depends on X86_32_NON_STANDARD && PCI << 749 select SWIOTLB << 750 select MFD_STA2X11 << 751 select GPIOLIB << 752 help << 753 This adds support for boards based o << 754 a.k.a. "ConneXt". The chip is used i << 755 PC chipset, so all "standard" periph << 756 option is selected the kernel will s << 757 standard PC machines. << 758 << 759 config X86_32_IRIS << 760 tristate "Eurobraille/Iris poweroff mo << 761 depends on X86_32 << 762 help << 763 The Iris machines from EuroBraille d << 764 to shut themselves down properly. A << 765 needed to do so, which is what this << 766 kernel shutdown. << 767 1219 768 This is only for Iris machines from !! 1220 config SYS_SUPPORTS_APM_EMULATION >> 1221 bool 769 1222 770 If unused, say N. !! 1223 config SYS_SUPPORTS_BIG_ENDIAN >> 1224 bool 771 1225 772 config SCHED_OMIT_FRAME_POINTER !! 1226 config SYS_SUPPORTS_LITTLE_ENDIAN 773 def_bool y !! 1227 bool 774 prompt "Single-depth WCHAN output" << 775 depends on X86 << 776 help << 777 Calculate simpler /proc/<PID>/wchan << 778 is disabled then wchan values will r << 779 caller function. This provides more << 780 at the expense of slightly more sche << 781 1228 782 If in doubt, say "Y". !! 1229 config SYS_SUPPORTS_HUGETLBFS >> 1230 bool >> 1231 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT >> 1232 default y 783 1233 784 menuconfig HYPERVISOR_GUEST !! 1234 config MIPS_HUGE_TLB_SUPPORT 785 bool "Linux guest support" !! 1235 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 786 help << 787 Say Y here to enable options for run << 788 visors. This option enables basic hy << 789 setup. << 790 1236 791 If you say N, all options in this su !! 1237 config IRQ_CPU_RM7K 792 disabled, and Linux guest support wo !! 1238 bool 793 1239 794 if HYPERVISOR_GUEST !! 1240 config IRQ_MSP_SLP >> 1241 bool 795 1242 796 config PARAVIRT !! 1243 config IRQ_MSP_CIC 797 bool "Enable paravirtualization code" !! 1244 bool 798 depends on HAVE_STATIC_CALL << 799 help << 800 This changes the kernel so it can mo << 801 under a hypervisor, potentially impr << 802 over full virtualization. However, << 803 the kernel is theoretically slower a << 804 1245 805 config PARAVIRT_XXL !! 1246 config IRQ_TXX9 806 bool 1247 bool 807 1248 808 config PARAVIRT_DEBUG !! 1249 config IRQ_GT641XX 809 bool "paravirt-ops debugging" !! 1250 bool 810 depends on PARAVIRT && DEBUG_KERNEL << 811 help << 812 Enable to debug paravirt_ops interna << 813 a paravirt_op is missing when it is << 814 1251 815 config PARAVIRT_SPINLOCKS !! 1252 config PCI_GT64XXX_PCI0 816 bool "Paravirtualization layer for spi !! 1253 bool 817 depends on PARAVIRT && SMP << 818 help << 819 Paravirtualized spinlocks allow a pv << 820 spinlock implementation with somethi << 821 (for example, block the virtual CPU << 822 1254 823 It has a minimal impact on native ke !! 1255 config NO_EXCEPT_FILL 824 benefit on paravirtualized KVM / Xen !! 1256 bool 825 1257 826 If you are unsure how to answer this !! 1258 config SOC_EMMA2RH >> 1259 bool >> 1260 select CEVT_R4K >> 1261 select CSRC_R4K >> 1262 select DMA_NONCOHERENT >> 1263 select IRQ_MIPS_CPU >> 1264 select SWAP_IO_SPACE >> 1265 select SYS_HAS_CPU_R5500 >> 1266 select SYS_SUPPORTS_32BIT_KERNEL >> 1267 select SYS_SUPPORTS_64BIT_KERNEL >> 1268 select SYS_SUPPORTS_BIG_ENDIAN 827 1269 828 config X86_HV_CALLBACK_VECTOR !! 1270 config SOC_PNX833X 829 def_bool n !! 1271 bool >> 1272 select CEVT_R4K >> 1273 select CSRC_R4K >> 1274 select IRQ_MIPS_CPU >> 1275 select DMA_NONCOHERENT >> 1276 select SYS_HAS_CPU_MIPS32_R2 >> 1277 select SYS_SUPPORTS_32BIT_KERNEL >> 1278 select SYS_SUPPORTS_LITTLE_ENDIAN >> 1279 select SYS_SUPPORTS_BIG_ENDIAN >> 1280 select SYS_SUPPORTS_MIPS16 >> 1281 select CPU_MIPSR2_IRQ_VI 830 1282 831 source "arch/x86/xen/Kconfig" !! 1283 config SOC_PNX8335 >> 1284 bool >> 1285 select SOC_PNX833X 832 1286 833 config KVM_GUEST !! 1287 config MIPS_SPRAM 834 bool "KVM Guest support (including kvm !! 1288 bool 835 depends on PARAVIRT << 836 select PARAVIRT_CLOCK << 837 select ARCH_CPUIDLE_HALTPOLL << 838 select X86_HV_CALLBACK_VECTOR << 839 default y << 840 help << 841 This option enables various optimiza << 842 hypervisor. It includes a paravirtua << 843 of relying on a PIT (or probably oth << 844 underlying device model, the host pr << 845 timing infrastructure such as time o << 846 1289 847 config ARCH_CPUIDLE_HALTPOLL !! 1290 config SWAP_IO_SPACE 848 def_bool n !! 1291 bool 849 prompt "Disable host haltpoll when loa << 850 help << 851 If virtualized under KVM, disable ho << 852 1292 853 config PVH !! 1293 config SGI_HAS_INDYDOG 854 bool "Support for running PVH guests" !! 1294 bool 855 help << 856 This option enables the PVH entry po << 857 as specified in the x86/HVM direct b << 858 << 859 config PARAVIRT_TIME_ACCOUNTING << 860 bool "Paravirtual steal time accountin << 861 depends on PARAVIRT << 862 help << 863 Select this option to enable fine gr << 864 accounting. Time spent executing oth << 865 the current vCPU is discounted from << 866 that, there can be a small performan << 867 << 868 If in doubt, say N here. << 869 << 870 config PARAVIRT_CLOCK << 871 bool << 872 << 873 config JAILHOUSE_GUEST << 874 bool "Jailhouse non-root cell support" << 875 depends on X86_64 && PCI << 876 select X86_PM_TIMER << 877 help << 878 This option allows to run Linux as g << 879 cell. You can leave this option disa << 880 Jailhouse and run Linux afterwards i << 881 << 882 config ACRN_GUEST << 883 bool "ACRN Guest support" << 884 depends on X86_64 << 885 select X86_HV_CALLBACK_VECTOR << 886 help << 887 This option allows to run Linux as g << 888 a flexible, lightweight reference op << 889 real-time and safety-criticality in << 890 IOT with small footprint and real-ti << 891 found in https://projectacrn.org/. << 892 << 893 config INTEL_TDX_GUEST << 894 bool "Intel TDX (Trust Domain Extensio << 895 depends on X86_64 && CPU_SUP_INTEL << 896 depends on X86_X2APIC << 897 depends on EFI_STUB << 898 select ARCH_HAS_CC_PLATFORM << 899 select X86_MEM_ENCRYPT << 900 select X86_MCE << 901 select UNACCEPTED_MEMORY << 902 help << 903 Support running as a guest under Int << 904 the guest kernel can not boot or run << 905 TDX includes memory encryption and i << 906 which protect the confidentiality an << 907 memory contents and CPU state. TDX g << 908 some attacks from the VMM. << 909 << 910 endif # HYPERVISOR_GUEST << 911 << 912 source "arch/x86/Kconfig.cpu" << 913 << 914 config HPET_TIMER << 915 def_bool X86_64 << 916 prompt "HPET Timer Support" if X86_32 << 917 help << 918 Use the IA-PC HPET (High Precision E << 919 time in preference to the PIT and RT << 920 present. << 921 HPET is the next generation timer re << 922 The HPET provides a stable time base << 923 systems, unlike the TSC, but it is m << 924 as it is off-chip. The interface us << 925 in the HPET spec, revision 1. << 926 << 927 You can safely choose Y here. Howev << 928 activated if the platform and the BI << 929 Otherwise the 8254 will be used for << 930 1295 931 Choose N to continue using the legac !! 1296 config SGI_HAS_HAL2 >> 1297 bool 932 1298 933 config HPET_EMULATE_RTC !! 1299 config SGI_HAS_SEEQ 934 def_bool y !! 1300 bool 935 depends on HPET_TIMER && (RTC_DRV_CMOS << 936 1301 937 # Mark as expert because too many people got i !! 1302 config SGI_HAS_WD93 938 # The code disables itself when not needed. !! 1303 bool 939 config DMI << 940 default y << 941 select DMI_SCAN_MACHINE_NON_EFI_FALLBA << 942 bool "Enable DMI scanning" if EXPERT << 943 help << 944 Enabled scanning of DMI to identify << 945 here unless you have verified that y << 946 affected by entries in the DMI black << 947 BIOS code. << 948 << 949 config GART_IOMMU << 950 bool "Old AMD GART IOMMU support" << 951 select IOMMU_HELPER << 952 select SWIOTLB << 953 depends on X86_64 && PCI && AMD_NB << 954 help << 955 Provides a driver for older AMD Athl << 956 GART based hardware IOMMUs. << 957 << 958 The GART supports full DMA access fo << 959 limitations, on systems with more th << 960 for USB, sound, many IDE/SATA chipse << 961 << 962 Newer systems typically have a moder << 963 the CONFIG_AMD_IOMMU=y config option << 964 << 965 In normal configurations this driver << 966 there's more than 3 GB of memory and << 967 32-bit limited device. << 968 1304 969 If unsure, say Y. !! 1305 config SGI_HAS_ZILOG >> 1306 bool 970 1307 971 config BOOT_VESA_SUPPORT !! 1308 config SGI_HAS_I8042 972 bool 1309 bool 973 help << 974 If true, at least one selected frame << 975 of VESA video modes set at an early << 976 1310 977 config MAXSMP !! 1311 config DEFAULT_SGI_PARTITION 978 bool "Enable Maximum number of SMP Pro !! 1312 bool 979 depends on X86_64 && SMP && DEBUG_KERN << 980 select CPUMASK_OFFSTACK << 981 help << 982 Enable maximum number of CPUS and NU << 983 If unsure, say N. << 984 1313 985 # !! 1314 config FW_ARC32 986 # The maximum number of CPUs supported: !! 1315 bool 987 # << 988 # The main config value is NR_CPUS, which defa << 989 # and which can be configured interactively in << 990 # [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] << 991 # << 992 # The ranges are different on 32-bit and 64-bi << 993 # hardware capabilities and scalability featur << 994 # << 995 # ( If MAXSMP is enabled we just use the highe << 996 # interactive configuration. ) << 997 # << 998 1316 999 config NR_CPUS_RANGE_BEGIN !! 1317 config FW_SNIPROM 1000 int !! 1318 bool 1001 default NR_CPUS_RANGE_END if MAXSMP << 1002 default 1 if !SMP << 1003 default 2 << 1004 1319 1005 config NR_CPUS_RANGE_END !! 1320 config BOOT_ELF32 1006 int !! 1321 bool 1007 depends on X86_32 << 1008 default 64 if SMP && X86_BIGSMP << 1009 default 8 if SMP && !X86_BIGSMP << 1010 default 1 if !SMP << 1011 1322 1012 config NR_CPUS_RANGE_END !! 1323 config MIPS_L1_CACHE_SHIFT_4 1013 int !! 1324 bool 1014 depends on X86_64 << 1015 default 8192 if SMP && CPUMASK_OFFST << 1016 default 512 if SMP && !CPUMASK_OFFS << 1017 default 1 if !SMP << 1018 1325 1019 config NR_CPUS_DEFAULT !! 1326 config MIPS_L1_CACHE_SHIFT_5 1020 int !! 1327 bool 1021 depends on X86_32 !! 1328 1022 default 32 if X86_BIGSMP !! 1329 config MIPS_L1_CACHE_SHIFT_6 1023 default 8 if SMP !! 1330 bool 1024 default 1 if !SMP !! 1331 >> 1332 config MIPS_L1_CACHE_SHIFT_7 >> 1333 bool 1025 1334 1026 config NR_CPUS_DEFAULT !! 1335 config MIPS_L1_CACHE_SHIFT 1027 int 1336 int 1028 depends on X86_64 !! 1337 default "7" if MIPS_L1_CACHE_SHIFT_7 1029 default 8192 if MAXSMP !! 1338 default "6" if MIPS_L1_CACHE_SHIFT_6 1030 default 64 if SMP !! 1339 default "5" if MIPS_L1_CACHE_SHIFT_5 1031 default 1 if !SMP !! 1340 default "4" if MIPS_L1_CACHE_SHIFT_4 >> 1341 default "5" 1032 1342 1033 config NR_CPUS !! 1343 config HAVE_STD_PC_SERIAL_PORT 1034 int "Maximum number of CPUs" if SMP & !! 1344 bool 1035 range NR_CPUS_RANGE_BEGIN NR_CPUS_RAN << 1036 default NR_CPUS_DEFAULT << 1037 help << 1038 This allows you to specify the maxi << 1039 kernel will support. If CPUMASK_OF << 1040 supported value is 8192, otherwise << 1041 minimum value which makes sense is << 1042 1345 1043 This is purely to save memory: each !! 1346 config ARC_CONSOLE 1044 to the kernel image. !! 1347 bool "ARC console support" >> 1348 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 1045 1349 1046 config SCHED_CLUSTER !! 1350 config ARC_MEMORY 1047 bool "Cluster scheduler support" !! 1351 bool 1048 depends on SMP !! 1352 depends on MACH_JAZZ || SNI_RM || SGI_IP32 >> 1353 default y >> 1354 >> 1355 config ARC_PROMLIB >> 1356 bool >> 1357 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 1049 default y 1358 default y >> 1359 >> 1360 config FW_ARC64 >> 1361 bool >> 1362 >> 1363 config BOOT_ELF64 >> 1364 bool >> 1365 >> 1366 menu "CPU selection" >> 1367 >> 1368 choice >> 1369 prompt "CPU type" >> 1370 default CPU_R4X00 >> 1371 >> 1372 config CPU_LOONGSON3 >> 1373 bool "Loongson 3 CPU" >> 1374 depends on SYS_HAS_CPU_LOONGSON3 >> 1375 select CPU_SUPPORTS_64BIT_KERNEL >> 1376 select CPU_SUPPORTS_HIGHMEM >> 1377 select CPU_SUPPORTS_HUGEPAGES >> 1378 select WEAK_ORDERING >> 1379 select WEAK_REORDERING_BEYOND_LLSC >> 1380 select MIPS_PGD_C0_CONTEXT >> 1381 select MIPS_L1_CACHE_SHIFT_6 >> 1382 select GPIOLIB 1050 help 1383 help 1051 Cluster scheduler support improves !! 1384 The Loongson 3 processor implements the MIPS64R2 instruction 1052 making when dealing with machines t !! 1385 set with many extensions. 1053 Cluster usually means a couple of C << 1054 by sharing mid-level caches, last-l << 1055 busses. << 1056 1386 1057 config SCHED_SMT !! 1387 config LOONGSON3_ENHANCEMENT 1058 def_bool y if SMP !! 1388 bool "New Loongson 3 CPU Enhancements" >> 1389 default n >> 1390 select CPU_MIPSR2 >> 1391 select CPU_HAS_PREFETCH >> 1392 depends on CPU_LOONGSON3 >> 1393 help >> 1394 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A >> 1395 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as >> 1396 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User >> 1397 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), >> 1398 Fast TLB refill support, etc. >> 1399 >> 1400 This option enable those enhancements which are not probed at run >> 1401 time. If you want a generic kernel to run on all Loongson 3 machines, >> 1402 please say 'N' here. If you want a high-performance kernel to run on >> 1403 new Loongson 3 machines only, please say 'Y' here. >> 1404 >> 1405 config CPU_LOONGSON2E >> 1406 bool "Loongson 2E" >> 1407 depends on SYS_HAS_CPU_LOONGSON2E >> 1408 select CPU_LOONGSON2 >> 1409 help >> 1410 The Loongson 2E processor implements the MIPS III instruction set >> 1411 with many extensions. >> 1412 >> 1413 It has an internal FPGA northbridge, which is compatible to >> 1414 bonito64. >> 1415 >> 1416 config CPU_LOONGSON2F >> 1417 bool "Loongson 2F" >> 1418 depends on SYS_HAS_CPU_LOONGSON2F >> 1419 select CPU_LOONGSON2 >> 1420 select GPIOLIB >> 1421 help >> 1422 The Loongson 2F processor implements the MIPS III instruction set >> 1423 with many extensions. 1059 1424 1060 config SCHED_MC !! 1425 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 1061 def_bool y !! 1426 have a similar programming interface with FPGA northbridge used in 1062 prompt "Multi-core scheduler support" !! 1427 Loongson2E. 1063 depends on SMP !! 1428 >> 1429 config CPU_LOONGSON1B >> 1430 bool "Loongson 1B" >> 1431 depends on SYS_HAS_CPU_LOONGSON1B >> 1432 select CPU_LOONGSON1 >> 1433 select LEDS_GPIO_REGISTER >> 1434 help >> 1435 The Loongson 1B is a 32-bit SoC, which implements the MIPS32 >> 1436 release 2 instruction set. >> 1437 >> 1438 config CPU_LOONGSON1C >> 1439 bool "Loongson 1C" >> 1440 depends on SYS_HAS_CPU_LOONGSON1C >> 1441 select CPU_LOONGSON1 >> 1442 select LEDS_GPIO_REGISTER >> 1443 help >> 1444 The Loongson 1C is a 32-bit SoC, which implements the MIPS32 >> 1445 release 2 instruction set. >> 1446 >> 1447 config CPU_MIPS32_R1 >> 1448 bool "MIPS32 Release 1" >> 1449 depends on SYS_HAS_CPU_MIPS32_R1 >> 1450 select CPU_HAS_PREFETCH >> 1451 select CPU_SUPPORTS_32BIT_KERNEL >> 1452 select CPU_SUPPORTS_HIGHMEM >> 1453 help >> 1454 Choose this option to build a kernel for release 1 or later of the >> 1455 MIPS32 architecture. Most modern embedded systems with a 32-bit >> 1456 MIPS processor are based on a MIPS32 processor. If you know the >> 1457 specific type of processor in your system, choose those that one >> 1458 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. >> 1459 Release 2 of the MIPS32 architecture is available since several >> 1460 years so chances are you even have a MIPS32 Release 2 processor >> 1461 in which case you should choose CPU_MIPS32_R2 instead for better >> 1462 performance. >> 1463 >> 1464 config CPU_MIPS32_R2 >> 1465 bool "MIPS32 Release 2" >> 1466 depends on SYS_HAS_CPU_MIPS32_R2 >> 1467 select CPU_HAS_PREFETCH >> 1468 select CPU_SUPPORTS_32BIT_KERNEL >> 1469 select CPU_SUPPORTS_HIGHMEM >> 1470 select CPU_SUPPORTS_MSA >> 1471 select HAVE_KVM >> 1472 help >> 1473 Choose this option to build a kernel for release 2 or later of the >> 1474 MIPS32 architecture. Most modern embedded systems with a 32-bit >> 1475 MIPS processor are based on a MIPS32 processor. If you know the >> 1476 specific type of processor in your system, choose those that one >> 1477 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. >> 1478 >> 1479 config CPU_MIPS32_R6 >> 1480 bool "MIPS32 Release 6" >> 1481 depends on SYS_HAS_CPU_MIPS32_R6 >> 1482 select CPU_HAS_PREFETCH >> 1483 select CPU_SUPPORTS_32BIT_KERNEL >> 1484 select CPU_SUPPORTS_HIGHMEM >> 1485 select CPU_SUPPORTS_MSA >> 1486 select GENERIC_CSUM >> 1487 select HAVE_KVM >> 1488 select MIPS_O32_FP64_SUPPORT >> 1489 help >> 1490 Choose this option to build a kernel for release 6 or later of the >> 1491 MIPS32 architecture. New MIPS processors, starting with the Warrior >> 1492 family, are based on a MIPS32r6 processor. If you own an older >> 1493 processor, you probably need to select MIPS32r1 or MIPS32r2 instead. >> 1494 >> 1495 config CPU_MIPS64_R1 >> 1496 bool "MIPS64 Release 1" >> 1497 depends on SYS_HAS_CPU_MIPS64_R1 >> 1498 select CPU_HAS_PREFETCH >> 1499 select CPU_SUPPORTS_32BIT_KERNEL >> 1500 select CPU_SUPPORTS_64BIT_KERNEL >> 1501 select CPU_SUPPORTS_HIGHMEM >> 1502 select CPU_SUPPORTS_HUGEPAGES >> 1503 help >> 1504 Choose this option to build a kernel for release 1 or later of the >> 1505 MIPS64 architecture. Many modern embedded systems with a 64-bit >> 1506 MIPS processor are based on a MIPS64 processor. If you know the >> 1507 specific type of processor in your system, choose those that one >> 1508 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. >> 1509 Release 2 of the MIPS64 architecture is available since several >> 1510 years so chances are you even have a MIPS64 Release 2 processor >> 1511 in which case you should choose CPU_MIPS64_R2 instead for better >> 1512 performance. >> 1513 >> 1514 config CPU_MIPS64_R2 >> 1515 bool "MIPS64 Release 2" >> 1516 depends on SYS_HAS_CPU_MIPS64_R2 >> 1517 select CPU_HAS_PREFETCH >> 1518 select CPU_SUPPORTS_32BIT_KERNEL >> 1519 select CPU_SUPPORTS_64BIT_KERNEL >> 1520 select CPU_SUPPORTS_HIGHMEM >> 1521 select CPU_SUPPORTS_HUGEPAGES >> 1522 select CPU_SUPPORTS_MSA >> 1523 select HAVE_KVM >> 1524 help >> 1525 Choose this option to build a kernel for release 2 or later of the >> 1526 MIPS64 architecture. Many modern embedded systems with a 64-bit >> 1527 MIPS processor are based on a MIPS64 processor. If you know the >> 1528 specific type of processor in your system, choose those that one >> 1529 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. >> 1530 >> 1531 config CPU_MIPS64_R6 >> 1532 bool "MIPS64 Release 6" >> 1533 depends on SYS_HAS_CPU_MIPS64_R6 >> 1534 select CPU_HAS_PREFETCH >> 1535 select CPU_SUPPORTS_32BIT_KERNEL >> 1536 select CPU_SUPPORTS_64BIT_KERNEL >> 1537 select CPU_SUPPORTS_HIGHMEM >> 1538 select CPU_SUPPORTS_MSA >> 1539 select GENERIC_CSUM >> 1540 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 >> 1541 select HAVE_KVM >> 1542 help >> 1543 Choose this option to build a kernel for release 6 or later of the >> 1544 MIPS64 architecture. New MIPS processors, starting with the Warrior >> 1545 family, are based on a MIPS64r6 processor. If you own an older >> 1546 processor, you probably need to select MIPS64r1 or MIPS64r2 instead. >> 1547 >> 1548 config CPU_R3000 >> 1549 bool "R3000" >> 1550 depends on SYS_HAS_CPU_R3000 >> 1551 select CPU_HAS_WB >> 1552 select CPU_SUPPORTS_32BIT_KERNEL >> 1553 select CPU_SUPPORTS_HIGHMEM >> 1554 help >> 1555 Please make sure to pick the right CPU type. Linux/MIPS is not >> 1556 designed to be generic, i.e. Kernels compiled for R3000 CPUs will >> 1557 *not* work on R4000 machines and vice versa. However, since most >> 1558 of the supported machines have an R4000 (or similar) CPU, R4x00 >> 1559 might be a safe bet. If the resulting kernel does not work, >> 1560 try to recompile with R3000. >> 1561 >> 1562 config CPU_TX39XX >> 1563 bool "R39XX" >> 1564 depends on SYS_HAS_CPU_TX39XX >> 1565 select CPU_SUPPORTS_32BIT_KERNEL >> 1566 >> 1567 config CPU_VR41XX >> 1568 bool "R41xx" >> 1569 depends on SYS_HAS_CPU_VR41XX >> 1570 select CPU_SUPPORTS_32BIT_KERNEL >> 1571 select CPU_SUPPORTS_64BIT_KERNEL >> 1572 help >> 1573 The options selects support for the NEC VR4100 series of processors. >> 1574 Only choose this option if you have one of these processors as a >> 1575 kernel built with this option will not run on any other type of >> 1576 processor or vice versa. >> 1577 >> 1578 config CPU_R4300 >> 1579 bool "R4300" >> 1580 depends on SYS_HAS_CPU_R4300 >> 1581 select CPU_SUPPORTS_32BIT_KERNEL >> 1582 select CPU_SUPPORTS_64BIT_KERNEL >> 1583 help >> 1584 MIPS Technologies R4300-series processors. >> 1585 >> 1586 config CPU_R4X00 >> 1587 bool "R4x00" >> 1588 depends on SYS_HAS_CPU_R4X00 >> 1589 select CPU_SUPPORTS_32BIT_KERNEL >> 1590 select CPU_SUPPORTS_64BIT_KERNEL >> 1591 select CPU_SUPPORTS_HUGEPAGES >> 1592 help >> 1593 MIPS Technologies R4000-series processors other than 4300, including >> 1594 the R4000, R4400, R4600, and 4700. >> 1595 >> 1596 config CPU_TX49XX >> 1597 bool "R49XX" >> 1598 depends on SYS_HAS_CPU_TX49XX >> 1599 select CPU_HAS_PREFETCH >> 1600 select CPU_SUPPORTS_32BIT_KERNEL >> 1601 select CPU_SUPPORTS_64BIT_KERNEL >> 1602 select CPU_SUPPORTS_HUGEPAGES >> 1603 >> 1604 config CPU_R5000 >> 1605 bool "R5000" >> 1606 depends on SYS_HAS_CPU_R5000 >> 1607 select CPU_SUPPORTS_32BIT_KERNEL >> 1608 select CPU_SUPPORTS_64BIT_KERNEL >> 1609 select CPU_SUPPORTS_HUGEPAGES >> 1610 help >> 1611 MIPS Technologies R5000-series processors other than the Nevada. >> 1612 >> 1613 config CPU_R5432 >> 1614 bool "R5432" >> 1615 depends on SYS_HAS_CPU_R5432 >> 1616 select CPU_SUPPORTS_32BIT_KERNEL >> 1617 select CPU_SUPPORTS_64BIT_KERNEL >> 1618 select CPU_SUPPORTS_HUGEPAGES >> 1619 >> 1620 config CPU_R5500 >> 1621 bool "R5500" >> 1622 depends on SYS_HAS_CPU_R5500 >> 1623 select CPU_SUPPORTS_32BIT_KERNEL >> 1624 select CPU_SUPPORTS_64BIT_KERNEL >> 1625 select CPU_SUPPORTS_HUGEPAGES >> 1626 help >> 1627 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV >> 1628 instruction set. >> 1629 >> 1630 config CPU_R6000 >> 1631 bool "R6000" >> 1632 depends on SYS_HAS_CPU_R6000 >> 1633 select CPU_SUPPORTS_32BIT_KERNEL >> 1634 help >> 1635 MIPS Technologies R6000 and R6000A series processors. Note these >> 1636 processors are extremely rare and the support for them is incomplete. >> 1637 >> 1638 config CPU_NEVADA >> 1639 bool "RM52xx" >> 1640 depends on SYS_HAS_CPU_NEVADA >> 1641 select CPU_SUPPORTS_32BIT_KERNEL >> 1642 select CPU_SUPPORTS_64BIT_KERNEL >> 1643 select CPU_SUPPORTS_HUGEPAGES >> 1644 help >> 1645 QED / PMC-Sierra RM52xx-series ("Nevada") processors. >> 1646 >> 1647 config CPU_R8000 >> 1648 bool "R8000" >> 1649 depends on SYS_HAS_CPU_R8000 >> 1650 select CPU_HAS_PREFETCH >> 1651 select CPU_SUPPORTS_64BIT_KERNEL >> 1652 help >> 1653 MIPS Technologies R8000 processors. Note these processors are >> 1654 uncommon and the support for them is incomplete. >> 1655 >> 1656 config CPU_R10000 >> 1657 bool "R10000" >> 1658 depends on SYS_HAS_CPU_R10000 >> 1659 select CPU_HAS_PREFETCH >> 1660 select CPU_SUPPORTS_32BIT_KERNEL >> 1661 select CPU_SUPPORTS_64BIT_KERNEL >> 1662 select CPU_SUPPORTS_HIGHMEM >> 1663 select CPU_SUPPORTS_HUGEPAGES >> 1664 help >> 1665 MIPS Technologies R10000-series processors. >> 1666 >> 1667 config CPU_RM7000 >> 1668 bool "RM7000" >> 1669 depends on SYS_HAS_CPU_RM7000 >> 1670 select CPU_HAS_PREFETCH >> 1671 select CPU_SUPPORTS_32BIT_KERNEL >> 1672 select CPU_SUPPORTS_64BIT_KERNEL >> 1673 select CPU_SUPPORTS_HIGHMEM >> 1674 select CPU_SUPPORTS_HUGEPAGES >> 1675 >> 1676 config CPU_SB1 >> 1677 bool "SB1" >> 1678 depends on SYS_HAS_CPU_SB1 >> 1679 select CPU_SUPPORTS_32BIT_KERNEL >> 1680 select CPU_SUPPORTS_64BIT_KERNEL >> 1681 select CPU_SUPPORTS_HIGHMEM >> 1682 select CPU_SUPPORTS_HUGEPAGES >> 1683 select WEAK_ORDERING >> 1684 >> 1685 config CPU_CAVIUM_OCTEON >> 1686 bool "Cavium Octeon processor" >> 1687 depends on SYS_HAS_CPU_CAVIUM_OCTEON >> 1688 select CPU_HAS_PREFETCH >> 1689 select CPU_SUPPORTS_64BIT_KERNEL >> 1690 select WEAK_ORDERING >> 1691 select CPU_SUPPORTS_HIGHMEM >> 1692 select CPU_SUPPORTS_HUGEPAGES >> 1693 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN >> 1694 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN >> 1695 select MIPS_L1_CACHE_SHIFT_7 >> 1696 select HAVE_KVM >> 1697 help >> 1698 The Cavium Octeon processor is a highly integrated chip containing >> 1699 many ethernet hardware widgets for networking tasks. The processor >> 1700 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. >> 1701 Full details can be found at http://www.caviumnetworks.com. >> 1702 >> 1703 config CPU_BMIPS >> 1704 bool "Broadcom BMIPS" >> 1705 depends on SYS_HAS_CPU_BMIPS >> 1706 select CPU_MIPS32 >> 1707 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 >> 1708 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 >> 1709 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 >> 1710 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 >> 1711 select CPU_SUPPORTS_32BIT_KERNEL >> 1712 select DMA_NONCOHERENT >> 1713 select IRQ_MIPS_CPU >> 1714 select SWAP_IO_SPACE >> 1715 select WEAK_ORDERING >> 1716 select CPU_SUPPORTS_HIGHMEM >> 1717 select CPU_HAS_PREFETCH >> 1718 select CPU_SUPPORTS_CPUFREQ >> 1719 select MIPS_EXTERNAL_TIMER >> 1720 help >> 1721 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. >> 1722 >> 1723 config CPU_XLR >> 1724 bool "Netlogic XLR SoC" >> 1725 depends on SYS_HAS_CPU_XLR >> 1726 select CPU_SUPPORTS_32BIT_KERNEL >> 1727 select CPU_SUPPORTS_64BIT_KERNEL >> 1728 select CPU_SUPPORTS_HIGHMEM >> 1729 select CPU_SUPPORTS_HUGEPAGES >> 1730 select WEAK_ORDERING >> 1731 select WEAK_REORDERING_BEYOND_LLSC >> 1732 help >> 1733 Netlogic Microsystems XLR/XLS processors. >> 1734 >> 1735 config CPU_XLP >> 1736 bool "Netlogic XLP SoC" >> 1737 depends on SYS_HAS_CPU_XLP >> 1738 select CPU_SUPPORTS_32BIT_KERNEL >> 1739 select CPU_SUPPORTS_64BIT_KERNEL >> 1740 select CPU_SUPPORTS_HIGHMEM >> 1741 select WEAK_ORDERING >> 1742 select WEAK_REORDERING_BEYOND_LLSC >> 1743 select CPU_HAS_PREFETCH >> 1744 select CPU_MIPSR2 >> 1745 select CPU_SUPPORTS_HUGEPAGES >> 1746 select MIPS_ASID_BITS_VARIABLE 1064 help 1747 help 1065 Multi-core scheduler support improv !! 1748 Netlogic Microsystems XLP processors. 1066 making when dealing with multi-core !! 1749 endchoice 1067 increased overhead in some places. << 1068 1750 1069 config SCHED_MC_PRIO !! 1751 config CPU_MIPS32_3_5_FEATURES 1070 bool "CPU core priorities scheduler s !! 1752 bool "MIPS32 Release 3.5 Features" 1071 depends on SCHED_MC !! 1753 depends on SYS_HAS_CPU_MIPS32_R3_5 1072 select X86_INTEL_PSTATE if CPU_SUP_IN !! 1754 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1073 select X86_AMD_PSTATE if CPU_SUP_AMD !! 1755 help 1074 select CPU_FREQ !! 1756 Choose this option to build a kernel for release 2 or later of the 1075 default y !! 1757 MIPS32 architecture including features from the 3.5 release such as >> 1758 support for Enhanced Virtual Addressing (EVA). >> 1759 >> 1760 config CPU_MIPS32_3_5_EVA >> 1761 bool "Enhanced Virtual Addressing (EVA)" >> 1762 depends on CPU_MIPS32_3_5_FEATURES >> 1763 select EVA >> 1764 default y >> 1765 help >> 1766 Choose this option if you want to enable the Enhanced Virtual >> 1767 Addressing (EVA) on your MIPS32 core (such as proAptiv). >> 1768 One of its primary benefits is an increase in the maximum size >> 1769 of lowmem (up to 3GB). If unsure, say 'N' here. >> 1770 >> 1771 config CPU_MIPS32_R5_FEATURES >> 1772 bool "MIPS32 Release 5 Features" >> 1773 depends on SYS_HAS_CPU_MIPS32_R5 >> 1774 depends on CPU_MIPS32_R2 >> 1775 help >> 1776 Choose this option to build a kernel for release 2 or later of the >> 1777 MIPS32 architecture including features from release 5 such as >> 1778 support for Extended Physical Addressing (XPA). >> 1779 >> 1780 config CPU_MIPS32_R5_XPA >> 1781 bool "Extended Physical Addressing (XPA)" >> 1782 depends on CPU_MIPS32_R5_FEATURES >> 1783 depends on !EVA >> 1784 depends on !PAGE_SIZE_4KB >> 1785 depends on SYS_SUPPORTS_HIGHMEM >> 1786 select XPA >> 1787 select HIGHMEM >> 1788 select ARCH_PHYS_ADDR_T_64BIT >> 1789 default n 1076 help 1790 help 1077 Intel Turbo Boost Max Technology 3. !! 1791 Choose this option if you want to enable the Extended Physical 1078 core ordering determined at manufac !! 1792 Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1079 certain cores to reach higher turbo !! 1793 benefit is to increase physical addressing equal to or greater 1080 single threaded workloads) than oth !! 1794 than 40 bits. Note that this has the side effect of turning on >> 1795 64-bit addressing which in turn makes the PTEs 64-bit in size. >> 1796 If unsure, say 'N' here. >> 1797 >> 1798 if CPU_LOONGSON2F >> 1799 config CPU_NOP_WORKAROUNDS >> 1800 bool >> 1801 >> 1802 config CPU_JUMP_WORKAROUNDS >> 1803 bool 1081 1804 1082 Enabling this kernel feature teache !! 1805 config CPU_LOONGSON2F_WORKAROUNDS 1083 the TBM3 (aka ITMT) priority order !! 1806 bool "Loongson 2F Workarounds" 1084 scheduler's CPU selection logic acc !! 1807 default y 1085 overall system performance can be a !! 1808 select CPU_NOP_WORKAROUNDS >> 1809 select CPU_JUMP_WORKAROUNDS >> 1810 help >> 1811 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which >> 1812 require workarounds. Without workarounds the system may hang >> 1813 unexpectedly. For more information please refer to the gas >> 1814 -mfix-loongson2f-nop and -mfix-loongson2f-jump options. >> 1815 >> 1816 Loongson 2F03 and later have fixed these issues and no workarounds >> 1817 are needed. The workarounds have no significant side effect on them >> 1818 but may decrease the performance of the system so this option should >> 1819 be disabled unless the kernel is intended to be run on 2F01 or 2F02 >> 1820 systems. 1086 1821 1087 This feature will have no effect on !! 1822 If unsure, please say Y. >> 1823 endif # CPU_LOONGSON2F 1088 1824 1089 If unsure say Y here. !! 1825 config SYS_SUPPORTS_ZBOOT >> 1826 bool >> 1827 select HAVE_KERNEL_GZIP >> 1828 select HAVE_KERNEL_BZIP2 >> 1829 select HAVE_KERNEL_LZ4 >> 1830 select HAVE_KERNEL_LZMA >> 1831 select HAVE_KERNEL_LZO >> 1832 select HAVE_KERNEL_XZ 1090 1833 1091 config UP_LATE_INIT !! 1834 config SYS_SUPPORTS_ZBOOT_UART16550 1092 def_bool y !! 1835 bool 1093 depends on !SMP && X86_LOCAL_APIC !! 1836 select SYS_SUPPORTS_ZBOOT 1094 1837 1095 config X86_UP_APIC !! 1838 config SYS_SUPPORTS_ZBOOT_UART_PROM 1096 bool "Local APIC support on uniproces !! 1839 bool 1097 default PCI_MSI !! 1840 select SYS_SUPPORTS_ZBOOT 1098 depends on X86_32 && !SMP && !X86_32_ << 1099 help << 1100 A local APIC (Advanced Programmable << 1101 integrated interrupt controller in << 1102 system which has a processor with a << 1103 enable and use it. If you say Y her << 1104 have a local APIC, then the kernel << 1105 all. The local APIC supports CPU-ge << 1106 performance counters), and the NMI << 1107 lockups. << 1108 << 1109 config X86_UP_IOAPIC << 1110 bool "IO-APIC support on uniprocessor << 1111 depends on X86_UP_APIC << 1112 help << 1113 An IO-APIC (I/O Advanced Programmab << 1114 SMP-capable replacement for PC-styl << 1115 SMP systems and many recent uniproc << 1116 << 1117 If you have a single-CPU system wit << 1118 to use it. If you say Y here even t << 1119 an IO-APIC, then the kernel will st << 1120 1841 1121 config X86_LOCAL_APIC !! 1842 config CPU_LOONGSON2 1122 def_bool y !! 1843 bool 1123 depends on X86_64 || SMP || X86_32_NO !! 1844 select CPU_SUPPORTS_32BIT_KERNEL 1124 select IRQ_DOMAIN_HIERARCHY !! 1845 select CPU_SUPPORTS_64BIT_KERNEL >> 1846 select CPU_SUPPORTS_HIGHMEM >> 1847 select CPU_SUPPORTS_HUGEPAGES 1125 1848 1126 config ACPI_MADT_WAKEUP !! 1849 config CPU_LOONGSON1 1127 def_bool y !! 1850 bool 1128 depends on X86_64 !! 1851 select CPU_MIPS32 1129 depends on ACPI !! 1852 select CPU_MIPSR2 1130 depends on SMP !! 1853 select CPU_HAS_PREFETCH 1131 depends on X86_LOCAL_APIC !! 1854 select CPU_SUPPORTS_32BIT_KERNEL >> 1855 select CPU_SUPPORTS_HIGHMEM >> 1856 select CPU_SUPPORTS_CPUFREQ 1132 1857 1133 config X86_IO_APIC !! 1858 config CPU_BMIPS32_3300 1134 def_bool y !! 1859 select SMP_UP if SMP 1135 depends on X86_LOCAL_APIC || X86_UP_I !! 1860 bool 1136 1861 1137 config X86_REROUTE_FOR_BROKEN_BOOT_IRQS !! 1862 config CPU_BMIPS4350 1138 bool "Reroute for broken boot IRQs" !! 1863 bool 1139 depends on X86_IO_APIC !! 1864 select SYS_SUPPORTS_SMP 1140 help !! 1865 select SYS_SUPPORTS_HOTPLUG_CPU 1141 This option enables a workaround th << 1142 spurious interrupts. This is recomm << 1143 interrupt handling is used on syste << 1144 superfluous "boot interrupts" canno << 1145 << 1146 Some chipsets generate a legacy INT << 1147 entry in the chipset's IO-APIC is m << 1148 kernel does during interrupt handli << 1149 boot IRQ generation cannot be disab << 1150 the original IRQ line masked so tha << 1151 IRQ" is delivered to the CPUs. The << 1152 kernel to set up the IRQ handler on << 1153 way only one interrupt is delivered << 1154 the spurious second interrupt may c << 1155 down (vital) interrupt lines. << 1156 << 1157 Only affects "broken" chipsets. Int << 1158 increased on these systems. << 1159 << 1160 config X86_MCE << 1161 bool "Machine Check / overheating rep << 1162 select GENERIC_ALLOCATOR << 1163 default y << 1164 help << 1165 Machine Check support allows the pr << 1166 kernel if it detects a problem (e.g << 1167 The action the kernel takes depends << 1168 ranging from warning messages to ha << 1169 << 1170 config X86_MCELOG_LEGACY << 1171 bool "Support for deprecated /dev/mce << 1172 depends on X86_MCE << 1173 help << 1174 Enable support for /dev/mcelog whic << 1175 userspace logging daemon. Consider << 1176 rasdaemon solution. << 1177 1866 1178 config X86_MCE_INTEL !! 1867 config CPU_BMIPS4380 1179 def_bool y !! 1868 bool 1180 prompt "Intel MCE features" !! 1869 select MIPS_L1_CACHE_SHIFT_6 1181 depends on X86_MCE && X86_LOCAL_APIC !! 1870 select SYS_SUPPORTS_SMP 1182 help !! 1871 select SYS_SUPPORTS_HOTPLUG_CPU 1183 Additional support for intel specif !! 1872 select CPU_HAS_RIXI 1184 the thermal monitor. << 1185 1873 1186 config X86_MCE_AMD !! 1874 config CPU_BMIPS5000 1187 def_bool y !! 1875 bool 1188 prompt "AMD MCE features" !! 1876 select MIPS_CPU_SCACHE 1189 depends on X86_MCE && X86_LOCAL_APIC !! 1877 select MIPS_L1_CACHE_SHIFT_7 1190 help !! 1878 select SYS_SUPPORTS_SMP 1191 Additional support for AMD specific !! 1879 select SYS_SUPPORTS_HOTPLUG_CPU 1192 the DRAM Error Threshold. !! 1880 select CPU_HAS_RIXI 1193 1881 1194 config X86_ANCIENT_MCE !! 1882 config SYS_HAS_CPU_LOONGSON3 1195 bool "Support for old Pentium 5 / Win !! 1883 bool 1196 depends on X86_32 && X86_MCE !! 1884 select CPU_SUPPORTS_CPUFREQ 1197 help !! 1885 select CPU_HAS_RIXI 1198 Include support for machine check h << 1199 systems. These typically need to be << 1200 line. << 1201 1886 1202 config X86_MCE_THRESHOLD !! 1887 config SYS_HAS_CPU_LOONGSON2E 1203 depends on X86_MCE_AMD || X86_MCE_INT !! 1888 bool 1204 def_bool y << 1205 1889 1206 config X86_MCE_INJECT !! 1890 config SYS_HAS_CPU_LOONGSON2F 1207 depends on X86_MCE && X86_LOCAL_APIC !! 1891 bool 1208 tristate "Machine check injector supp !! 1892 select CPU_SUPPORTS_CPUFREQ 1209 help !! 1893 select CPU_SUPPORTS_ADDRWINCFG if 64BIT 1210 Provide support for injecting machi !! 1894 select CPU_SUPPORTS_UNCACHED_ACCELERATED 1211 If you don't know what a machine ch << 1212 QA it is safe to say n. << 1213 1895 1214 source "arch/x86/events/Kconfig" !! 1896 config SYS_HAS_CPU_LOONGSON1B >> 1897 bool 1215 1898 1216 config X86_LEGACY_VM86 !! 1899 config SYS_HAS_CPU_LOONGSON1C 1217 bool "Legacy VM86 support" !! 1900 bool 1218 depends on X86_32 << 1219 help << 1220 This option allows user programs to << 1221 mode, which is an 80286-era approxi << 1222 1901 1223 Some very old versions of X and/or !! 1902 config SYS_HAS_CPU_MIPS32_R1 1224 for user mode setting. Similarly, !! 1903 bool 1225 available to accelerate real mode D << 1226 recent version of DOSEMU, X, or vbe << 1227 functional even without kernel VM86 << 1228 fall back to software emulation. Ne << 1229 a 16-bit DOS program where 16-bit p << 1230 mode might be faster than emulation << 1231 enable this option. << 1232 1904 1233 Note that any app that works on a 6 !! 1905 config SYS_HAS_CPU_MIPS32_R2 1234 need this option, as 64-bit kernels !! 1906 bool 1235 V8086 mode. This option is also unr << 1236 mode and is not needed to run most << 1237 1907 1238 Enabling this option increases the !! 1908 config SYS_HAS_CPU_MIPS32_R3_5 1239 and slows down exception handling a !! 1909 bool 1240 1910 1241 If unsure, say N here. !! 1911 config SYS_HAS_CPU_MIPS32_R5 >> 1912 bool 1242 1913 1243 config VM86 !! 1914 config SYS_HAS_CPU_MIPS32_R6 1244 bool 1915 bool 1245 default X86_LEGACY_VM86 << 1246 1916 1247 config X86_16BIT !! 1917 config SYS_HAS_CPU_MIPS64_R1 1248 bool "Enable support for 16-bit segme !! 1918 bool 1249 default y << 1250 depends on MODIFY_LDT_SYSCALL << 1251 help << 1252 This option is required by programs << 1253 protected mode legacy code on x86 p << 1254 this option saves about 300 bytes o << 1255 plus 16K runtime memory on x86-64, << 1256 1919 1257 config X86_ESPFIX32 !! 1920 config SYS_HAS_CPU_MIPS64_R2 1258 def_bool y !! 1921 bool 1259 depends on X86_16BIT && X86_32 << 1260 1922 1261 config X86_ESPFIX64 !! 1923 config SYS_HAS_CPU_MIPS64_R6 1262 def_bool y !! 1924 bool 1263 depends on X86_16BIT && X86_64 << 1264 1925 1265 config X86_VSYSCALL_EMULATION !! 1926 config SYS_HAS_CPU_R3000 1266 bool "Enable vsyscall emulation" if E !! 1927 bool 1267 default y << 1268 depends on X86_64 << 1269 help << 1270 This enables emulation of the legac << 1271 it is roughly equivalent to booting << 1272 that it will also disable the helpf << 1273 tries to use a vsyscall. With this << 1274 programs will just segfault, citing << 1275 0xffffffffff600?00. << 1276 1928 1277 This option is required by many pro !! 1929 config SYS_HAS_CPU_TX39XX 1278 care should be used even with newer !! 1930 bool 1279 1931 1280 Disabling this option saves about 7 !! 1932 config SYS_HAS_CPU_VR41XX 1281 possibly 4K of additional runtime p !! 1933 bool 1282 1934 1283 config X86_IOPL_IOPERM !! 1935 config SYS_HAS_CPU_R4300 1284 bool "IOPERM and IOPL Emulation" !! 1936 bool 1285 default y << 1286 help << 1287 This enables the ioperm() and iopl( << 1288 for legacy applications. << 1289 1937 1290 Legacy IOPL support is an overbroad !! 1938 config SYS_HAS_CPU_R4X00 1291 space aside of accessing all 65536 !! 1939 bool 1292 interrupts. To gain this access the << 1293 capabilities and permission from po << 1294 modules. << 1295 1940 1296 The emulation restricts the functio !! 1941 config SYS_HAS_CPU_TX49XX 1297 only allowing the full range I/O po !! 1942 bool 1298 ability to disable interrupts from << 1299 granted if the hardware IOPL mechan << 1300 1943 1301 config TOSHIBA !! 1944 config SYS_HAS_CPU_R5000 1302 tristate "Toshiba Laptop support" !! 1945 bool 1303 depends on X86_32 << 1304 help << 1305 This adds a driver to safely access << 1306 the CPU on Toshiba portables with a << 1307 not work on models with a Phoenix B << 1308 is used to set the BIOS and power s << 1309 1946 1310 For information on utilities to mak !! 1947 config SYS_HAS_CPU_R5432 1311 Toshiba Linux utilities web site at !! 1948 bool 1312 <http://www.buzzard.org.uk/toshiba/ << 1313 1949 1314 Say Y if you intend to run this ker !! 1950 config SYS_HAS_CPU_R5500 1315 Say N otherwise. !! 1951 bool 1316 1952 1317 config X86_REBOOTFIXUPS !! 1953 config SYS_HAS_CPU_R6000 1318 bool "Enable X86 board specific fixup !! 1954 bool 1319 depends on X86_32 << 1320 help << 1321 This enables chipset and/or board s << 1322 in order to get reboot to work corr << 1323 some combinations of hardware and B << 1324 this config is intended, is when re << 1325 system. << 1326 1955 1327 Currently, the only fixup is for th !! 1956 config SYS_HAS_CPU_NEVADA 1328 CS5530A and CS5536 chipsets and the !! 1957 bool 1329 1958 1330 Say Y if you want to enable the fix !! 1959 config SYS_HAS_CPU_R8000 1331 enable this option even if you don' !! 1960 bool 1332 Say N otherwise. << 1333 1961 1334 config MICROCODE !! 1962 config SYS_HAS_CPU_R10000 1335 def_bool y !! 1963 bool 1336 depends on CPU_SUP_AMD || CPU_SUP_INT << 1337 1964 1338 config MICROCODE_INITRD32 !! 1965 config SYS_HAS_CPU_RM7000 1339 def_bool y !! 1966 bool 1340 depends on MICROCODE && X86_32 && BLK << 1341 1967 1342 config MICROCODE_LATE_LOADING !! 1968 config SYS_HAS_CPU_SB1 1343 bool "Late microcode loading (DANGERO !! 1969 bool 1344 default n << 1345 depends on MICROCODE && SMP << 1346 help << 1347 Loading microcode late, when the sy << 1348 is a tricky business and should be << 1349 of synchronizing all cores and SMT << 1350 not guarantee that cores might not << 1351 use this at your own risk. Late loa << 1352 microcode header indicates that it << 1353 minimal revision check. This minima << 1354 the kernel command line with "micro << 1355 1970 1356 config MICROCODE_LATE_FORCE_MINREV !! 1971 config SYS_HAS_CPU_CAVIUM_OCTEON 1357 bool "Enforce late microcode loading !! 1972 bool 1358 default n << 1359 depends on MICROCODE_LATE_LOADING << 1360 help << 1361 To prevent that users load microcod << 1362 in use features, newer microcode pa << 1363 in the microcode header, which tell << 1364 revision must be active in the CPU << 1365 late into the running system. If di << 1366 be enforced but the kernel will be << 1367 revision check fails. << 1368 << 1369 This minimal revision check can als << 1370 "microcode.minrev" parameter on the << 1371 << 1372 If unsure say Y. << 1373 << 1374 config X86_MSR << 1375 tristate "/dev/cpu/*/msr - Model-spec << 1376 help << 1377 This device gives privileged proces << 1378 Model-Specific Registers (MSRs). I << 1379 major 202 and minors 0 to 31 for /d << 1380 MSR accesses are directed to a spec << 1381 systems. << 1382 1973 1383 config X86_CPUID !! 1974 config SYS_HAS_CPU_BMIPS 1384 tristate "/dev/cpu/*/cpuid - CPU info !! 1975 bool 1385 help << 1386 This device gives processes access << 1387 be executed on a specific processor << 1388 with major 203 and minors 0 to 31 f << 1389 /dev/cpu/31/cpuid. << 1390 1976 1391 choice !! 1977 config SYS_HAS_CPU_BMIPS32_3300 1392 prompt "High Memory Support" !! 1978 bool 1393 default HIGHMEM4G !! 1979 select SYS_HAS_CPU_BMIPS 1394 depends on X86_32 << 1395 << 1396 config NOHIGHMEM << 1397 bool "off" << 1398 help << 1399 Linux can use up to 64 Gigabytes of << 1400 However, the address space of 32-bi << 1401 Gigabytes large. That means that, i << 1402 physical memory, not all of it can << 1403 kernel. The physical memory that's << 1404 "high memory". << 1405 << 1406 If you are compiling a kernel which << 1407 more than 1 Gigabyte total physical << 1408 choice and suitable for most users) << 1409 split: 3GB are mapped so that each << 1410 space and the remaining part of the << 1411 by the kernel to permanently map as << 1412 possible. << 1413 << 1414 If the machine has between 1 and 4 << 1415 answer "4GB" here. << 1416 << 1417 If more than 4 Gigabytes is used th << 1418 selection turns Intel PAE (Physical << 1419 PAE implements 3-level paging on IA << 1420 supported by Linux, PAE mode is imp << 1421 processors (Pentium Pro and better) << 1422 then the kernel will not boot on CP << 1423 << 1424 The actual amount of total physical << 1425 auto detected or can be forced by u << 1426 such as "mem=256M". (Try "man bootp << 1427 your boot loader (lilo or loadlin) << 1428 kernel at boot time.) << 1429 << 1430 If unsure, say "off". << 1431 << 1432 config HIGHMEM4G << 1433 bool "4GB" << 1434 help << 1435 Select this if you have a 32-bit pr << 1436 gigabytes of physical RAM. << 1437 << 1438 config HIGHMEM64G << 1439 bool "64GB" << 1440 depends on X86_HAVE_PAE << 1441 select X86_PAE << 1442 help << 1443 Select this if you have a 32-bit pr << 1444 gigabytes of physical RAM. << 1445 1980 1446 endchoice !! 1981 config SYS_HAS_CPU_BMIPS4350 >> 1982 bool >> 1983 select SYS_HAS_CPU_BMIPS 1447 1984 1448 choice !! 1985 config SYS_HAS_CPU_BMIPS4380 1449 prompt "Memory split" if EXPERT !! 1986 bool 1450 default VMSPLIT_3G !! 1987 select SYS_HAS_CPU_BMIPS 1451 depends on X86_32 << 1452 help << 1453 Select the desired split between ke << 1454 << 1455 If the address range available to t << 1456 physical memory installed, the rema << 1457 as "high memory". Accessing high me << 1458 than low memory, as it needs to be << 1459 Note that increasing the kernel add << 1460 available to user programs, making << 1461 tighter. Selecting anything other << 1462 will also likely make your kernel i << 1463 kernel modules. << 1464 << 1465 If you are not absolutely sure what << 1466 option alone! << 1467 << 1468 config VMSPLIT_3G << 1469 bool "3G/1G user/kernel split << 1470 config VMSPLIT_3G_OPT << 1471 depends on !X86_PAE << 1472 bool "3G/1G user/kernel split << 1473 config VMSPLIT_2G << 1474 bool "2G/2G user/kernel split << 1475 config VMSPLIT_2G_OPT << 1476 depends on !X86_PAE << 1477 bool "2G/2G user/kernel split << 1478 config VMSPLIT_1G << 1479 bool "1G/3G user/kernel split << 1480 endchoice << 1481 1988 1482 config PAGE_OFFSET !! 1989 config SYS_HAS_CPU_BMIPS5000 1483 hex !! 1990 bool 1484 default 0xB0000000 if VMSPLIT_3G_OPT !! 1991 select SYS_HAS_CPU_BMIPS 1485 default 0x80000000 if VMSPLIT_2G << 1486 default 0x78000000 if VMSPLIT_2G_OPT << 1487 default 0x40000000 if VMSPLIT_1G << 1488 default 0xC0000000 << 1489 depends on X86_32 << 1490 1992 1491 config HIGHMEM !! 1993 config SYS_HAS_CPU_XLR 1492 def_bool y !! 1994 bool 1493 depends on X86_32 && (HIGHMEM64G || H << 1494 1995 1495 config X86_PAE !! 1996 config SYS_HAS_CPU_XLP 1496 bool "PAE (Physical Address Extension !! 1997 bool 1497 depends on X86_32 && X86_HAVE_PAE << 1498 select PHYS_ADDR_T_64BIT << 1499 select SWIOTLB << 1500 help << 1501 PAE is required for NX support, and << 1502 larger swapspace support for non-ov << 1503 has the cost of more pagetable look << 1504 consumes more pagetable space per p << 1505 1998 1506 config X86_5LEVEL !! 1999 config MIPS_MALTA_PM 1507 bool "Enable 5-level page tables supp !! 2000 depends on MIPS_MALTA >> 2001 depends on PCI >> 2002 bool 1508 default y 2003 default y 1509 select DYNAMIC_MEMORY_LAYOUT << 1510 select SPARSEMEM_VMEMMAP << 1511 depends on X86_64 << 1512 help << 1513 5-level paging enables access to la << 1514 up to 128 PiB of virtual address sp << 1515 physical address space. << 1516 2004 1517 It will be supported by future Inte !! 2005 # >> 2006 # CPU may reorder R->R, R->W, W->R, W->W >> 2007 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC >> 2008 # >> 2009 config WEAK_ORDERING >> 2010 bool 1518 2011 1519 A kernel with the option enabled ca !! 2012 # 1520 support 4- or 5-level paging. !! 2013 # CPU may reorder reads and writes beyond LL/SC >> 2014 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC >> 2015 # >> 2016 config WEAK_REORDERING_BEYOND_LLSC >> 2017 bool >> 2018 endmenu 1521 2019 1522 See Documentation/arch/x86/x86_64/5 !! 2020 # 1523 information. !! 2021 # These two indicate any level of the MIPS32 and MIPS64 architecture >> 2022 # >> 2023 config CPU_MIPS32 >> 2024 bool >> 2025 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 1524 2026 1525 Say N if unsure. !! 2027 config CPU_MIPS64 >> 2028 bool >> 2029 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 1526 2030 1527 config X86_DIRECT_GBPAGES !! 2031 # 1528 def_bool y !! 2032 # These two indicate the revision of the architecture, either Release 1 or Release 2 1529 depends on X86_64 !! 2033 # 1530 help !! 2034 config CPU_MIPSR1 1531 Certain kernel features effectively !! 2035 bool 1532 linear 1 GB mappings (even if the C !! 2036 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 1533 supports them), so don't confuse th << 1534 that we have them enabled. << 1535 << 1536 config X86_CPA_STATISTICS << 1537 bool "Enable statistic for Change Pag << 1538 depends on DEBUG_FS << 1539 help << 1540 Expose statistics about the Change << 1541 helps to determine the effectivenes << 1542 page mappings when mapping protecti << 1543 << 1544 config X86_MEM_ENCRYPT << 1545 select ARCH_HAS_FORCE_DMA_UNENCRYPTED << 1546 select DYNAMIC_PHYSICAL_MASK << 1547 def_bool n << 1548 2037 1549 config AMD_MEM_ENCRYPT !! 2038 config CPU_MIPSR2 1550 bool "AMD Secure Memory Encryption (S !! 2039 bool 1551 depends on X86_64 && CPU_SUP_AMD !! 2040 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 1552 depends on EFI_STUB !! 2041 select CPU_HAS_RIXI 1553 select DMA_COHERENT_POOL !! 2042 select MIPS_SPRAM 1554 select ARCH_USE_MEMREMAP_PROT << 1555 select INSTRUCTION_DECODER << 1556 select ARCH_HAS_CC_PLATFORM << 1557 select X86_MEM_ENCRYPT << 1558 select UNACCEPTED_MEMORY << 1559 help << 1560 Say yes to enable support for the e << 1561 This requires an AMD processor that << 1562 Encryption (SME). << 1563 2043 1564 # Common NUMA Features !! 2044 config CPU_MIPSR6 1565 config NUMA !! 2045 bool 1566 bool "NUMA Memory Allocation and Sche !! 2046 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 1567 depends on SMP !! 2047 select CPU_HAS_RIXI 1568 depends on X86_64 || (X86_32 && HIGHM !! 2048 select HAVE_ARCH_BITREVERSE 1569 default y if X86_BIGSMP !! 2049 select MIPS_ASID_BITS_VARIABLE 1570 select USE_PERCPU_NUMA_NODE_ID !! 2050 select MIPS_SPRAM 1571 select OF_NUMA if OF << 1572 help << 1573 Enable NUMA (Non-Uniform Memory Acc << 1574 2051 1575 The kernel will try to allocate mem !! 2052 config EVA 1576 local memory controller of the CPU !! 2053 bool 1577 NUMA awareness to the kernel. << 1578 2054 1579 For 64-bit this is recommended if t !! 2055 config XPA 1580 (or later), AMD Opteron, or EM64T N !! 2056 bool 1581 2057 1582 For 32-bit this is only needed if y !! 2058 config SYS_SUPPORTS_32BIT_KERNEL 1583 kernel on a 64-bit NUMA platform. !! 2059 bool >> 2060 config SYS_SUPPORTS_64BIT_KERNEL >> 2061 bool >> 2062 config CPU_SUPPORTS_32BIT_KERNEL >> 2063 bool >> 2064 config CPU_SUPPORTS_64BIT_KERNEL >> 2065 bool >> 2066 config CPU_SUPPORTS_CPUFREQ >> 2067 bool >> 2068 config CPU_SUPPORTS_ADDRWINCFG >> 2069 bool >> 2070 config CPU_SUPPORTS_HUGEPAGES >> 2071 bool >> 2072 config CPU_SUPPORTS_UNCACHED_ACCELERATED >> 2073 bool >> 2074 config MIPS_PGD_C0_CONTEXT >> 2075 bool >> 2076 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP >> 2077 >> 2078 # >> 2079 # Set to y for ptrace access to watch registers. >> 2080 # >> 2081 config HARDWARE_WATCHPOINTS >> 2082 bool >> 2083 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 1584 2084 1585 Otherwise, you should say N. !! 2085 menu "Kernel type" 1586 2086 1587 config AMD_NUMA !! 2087 choice 1588 def_bool y !! 2088 prompt "Kernel code model" 1589 prompt "Old style AMD Opteron NUMA de << 1590 depends on X86_64 && NUMA && PCI << 1591 help 2089 help 1592 Enable AMD NUMA node topology detec !! 2090 You should only select this option if you have a workload that 1593 you have a multi processor AMD syst !! 2091 actually benefits from 64-bit processing or if your machine has 1594 read the NUMA configuration directl !! 2092 large memory. You will only be presented a single option in this 1595 of Opteron. It is recommended to us !! 2093 menu if your system does not support both 32-bit and 64-bit kernels. 1596 which also takes priority if both a !! 2094 >> 2095 config 32BIT >> 2096 bool "32-bit kernel" >> 2097 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL >> 2098 select TRAD_SIGNALS >> 2099 help >> 2100 Select this option if you want to build a 32-bit kernel. 1597 2101 1598 config X86_64_ACPI_NUMA !! 2102 config 64BIT 1599 def_bool y !! 2103 bool "64-bit kernel" 1600 prompt "ACPI NUMA detection" !! 2104 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 1601 depends on X86_64 && NUMA && ACPI && << 1602 select ACPI_NUMA << 1603 help 2105 help 1604 Enable ACPI SRAT based node topolog !! 2106 Select this option if you want to build a 64-bit kernel. 1605 2107 1606 config NODES_SHIFT !! 2108 endchoice 1607 int "Maximum NUMA Nodes (as a power o !! 2109 1608 range 1 10 !! 2110 config KVM_GUEST 1609 default "10" if MAXSMP !! 2111 bool "KVM Guest Kernel" 1610 default "6" if X86_64 !! 2112 depends on BROKEN_ON_SMP 1611 default "3" << 1612 depends on NUMA << 1613 help 2113 help 1614 Specify the maximum number of NUMA !! 2114 Select this option if building a guest kernel for KVM (Trap & Emulate) 1615 system. Increases memory reserved !! 2115 mode. 1616 2116 1617 config ARCH_FLATMEM_ENABLE !! 2117 config KVM_GUEST_TIMER_FREQ 1618 def_bool y !! 2118 int "Count/Compare Timer Frequency (MHz)" 1619 depends on X86_32 && !NUMA !! 2119 depends on KVM_GUEST >> 2120 default 100 >> 2121 help >> 2122 Set this to non-zero if building a guest kernel for KVM to skip RTC >> 2123 emulation when determining guest CPU Frequency. Instead, the guest's >> 2124 timer frequency is specified directly. 1620 2125 1621 config ARCH_SPARSEMEM_ENABLE !! 2126 config MIPS_VA_BITS_48 1622 def_bool y !! 2127 bool "48 bits virtual memory" 1623 depends on X86_64 || NUMA || X86_32 | !! 2128 depends on 64BIT 1624 select SPARSEMEM_STATIC if X86_32 !! 2129 help 1625 select SPARSEMEM_VMEMMAP_ENABLE if X8 !! 2130 Support a maximum at least 48 bits of application virtual >> 2131 memory. Default is 40 bits or less, depending on the CPU. >> 2132 For page sizes 16k and above, this option results in a small >> 2133 memory overhead for page tables. For 4k page size, a fourth >> 2134 level of page tables is added which imposes both a memory >> 2135 overhead as well as slower TLB fault handling. 1626 2136 1627 config ARCH_SPARSEMEM_DEFAULT !! 2137 If unsure, say N. 1628 def_bool X86_64 || (NUMA && X86_32) << 1629 2138 1630 config ARCH_SELECT_MEMORY_MODEL !! 2139 choice 1631 def_bool y !! 2140 prompt "Kernel page size" 1632 depends on ARCH_SPARSEMEM_ENABLE && A !! 2141 default PAGE_SIZE_4KB 1633 2142 1634 config ARCH_MEMORY_PROBE !! 2143 config PAGE_SIZE_4KB 1635 bool "Enable sysfs memory/probe inter !! 2144 bool "4kB" 1636 depends on MEMORY_HOTPLUG !! 2145 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 1637 help !! 2146 help 1638 This option enables a sysfs memory/ !! 2147 This option select the standard 4kB Linux page size. On some 1639 See Documentation/admin-guide/mm/me !! 2148 R3000-family processors this is the only available page size. Using 1640 If you are unsure how to answer thi !! 2149 4kB page size will minimize memory consumption and is therefore >> 2150 recommended for low memory systems. >> 2151 >> 2152 config PAGE_SIZE_8KB >> 2153 bool "8kB" >> 2154 depends on CPU_R8000 || CPU_CAVIUM_OCTEON >> 2155 depends on !MIPS_VA_BITS_48 >> 2156 help >> 2157 Using 8kB page size will result in higher performance kernel at >> 2158 the price of higher memory consumption. This option is available >> 2159 only on R8000 and cnMIPS processors. Note that you will need a >> 2160 suitable Linux distribution to support this. >> 2161 >> 2162 config PAGE_SIZE_16KB >> 2163 bool "16kB" >> 2164 depends on !CPU_R3000 && !CPU_TX39XX >> 2165 help >> 2166 Using 16kB page size will result in higher performance kernel at >> 2167 the price of higher memory consumption. This option is available on >> 2168 all non-R3000 family processors. Note that you will need a suitable >> 2169 Linux distribution to support this. >> 2170 >> 2171 config PAGE_SIZE_32KB >> 2172 bool "32kB" >> 2173 depends on CPU_CAVIUM_OCTEON >> 2174 depends on !MIPS_VA_BITS_48 >> 2175 help >> 2176 Using 32kB page size will result in higher performance kernel at >> 2177 the price of higher memory consumption. This option is available >> 2178 only on cnMIPS cores. Note that you will need a suitable Linux >> 2179 distribution to support this. >> 2180 >> 2181 config PAGE_SIZE_64KB >> 2182 bool "64kB" >> 2183 depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000 >> 2184 help >> 2185 Using 64kB page size will result in higher performance kernel at >> 2186 the price of higher memory consumption. This option is available on >> 2187 all non-R3000 family processor. Not that at the time of this >> 2188 writing this option is still high experimental. 1641 2189 1642 config ARCH_PROC_KCORE_TEXT !! 2190 endchoice 1643 def_bool y << 1644 depends on X86_64 && PROC_KCORE << 1645 2191 1646 config ILLEGAL_POINTER_VALUE !! 2192 config FORCE_MAX_ZONEORDER 1647 hex !! 2193 int "Maximum zone order" 1648 default 0 if X86_32 !! 2194 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 1649 default 0xdead000000000000 if X86_64 !! 2195 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 1650 !! 2196 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 1651 config X86_PMEM_LEGACY_DEVICE !! 2197 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 1652 bool !! 2198 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 1653 !! 2199 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 1654 config X86_PMEM_LEGACY !! 2200 range 11 64 1655 tristate "Support non-standard NVDIMM !! 2201 default "11" 1656 depends on PHYS_ADDR_T_64BIT !! 2202 help 1657 depends on BLK_DEV !! 2203 The kernel memory allocator divides physically contiguous memory 1658 select X86_PMEM_LEGACY_DEVICE !! 2204 blocks into "zones", where each zone is a power of two number of 1659 select NUMA_KEEP_MEMINFO if NUMA !! 2205 pages. This option selects the largest power of two that the kernel 1660 select LIBNVDIMM !! 2206 keeps in the memory allocator. If you need to allocate very large 1661 help !! 2207 blocks of physically contiguous memory, then you may need to 1662 Treat memory marked using the non-s !! 2208 increase this value. 1663 by the Intel Sandy Bridge-EP refere << 1664 The kernel will offer these regions << 1665 they can be used for persistent sto << 1666 << 1667 Say Y if unsure. << 1668 << 1669 config HIGHPTE << 1670 bool "Allocate 3rd-level pagetables f << 1671 depends on HIGHMEM << 1672 help << 1673 The VM uses one page table entry fo << 1674 For systems with a lot of RAM, this << 1675 low memory. Setting this option wi << 1676 entries in high memory. << 1677 << 1678 config X86_CHECK_BIOS_CORRUPTION << 1679 bool "Check for low memory corruption << 1680 help << 1681 Periodically check for memory corru << 1682 is suspected to be caused by BIOS. << 1683 configuration, it is disabled at ru << 1684 setting "memory_corruption_check=1" << 1685 line. By default it scans the low << 1686 seconds; see the memory_corruption_ << 1687 memory_corruption_check_period para << 1688 Documentation/admin-guide/kernel-pa << 1689 << 1690 When enabled with the default param << 1691 almost no overhead, as it reserves << 1692 of memory and scans it infrequently << 1693 and prevents it from affecting the << 1694 << 1695 It is, however, intended as a diagn << 1696 BIOS-originated corruption always a << 1697 you can use memmap= to prevent the << 1698 memory. << 1699 << 1700 config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK << 1701 bool "Set the default setting of memo << 1702 depends on X86_CHECK_BIOS_CORRUPTION << 1703 default y << 1704 help << 1705 Set whether the default state of me << 1706 on or off. << 1707 << 1708 config MATH_EMULATION << 1709 bool << 1710 depends on MODIFY_LDT_SYSCALL << 1711 prompt "Math emulation" if X86_32 && << 1712 help << 1713 Linux can emulate a math coprocesso << 1714 operations) if you don't have one. << 1715 a math coprocessor built in, 486SX << 1716 a 487DX or 387, respectively. (The << 1717 give you some hints here ["man dmes << 1718 coprocessor or this emulation. << 1719 << 1720 If you don't have a math coprocesso << 1721 say Y here even though you have a c << 1722 be used nevertheless. (This behavio << 1723 command line option "no387", which << 1724 is broken. Try "man bootparam" or s << 1725 loader (lilo or loadlin) about how << 1726 boot time.) This means that it is a << 1727 intend to use this kernel on differ << 1728 2209 1729 More information about the internal !! 2210 This config option is actually maximum order plus one. For example, 1730 emulation can be found in <file:arc !! 2211 a value of 11 means that the largest free memory block is 2^10 pages. 1731 2212 1732 If you are not sure, say Y; apart f !! 2213 The page size is not necessarily 4KB. Keep this in mind 1733 kernel, it won't hurt. !! 2214 when choosing a value for this option. 1734 2215 1735 config MTRR !! 2216 config BOARD_SCACHE 1736 def_bool y !! 2217 bool 1737 prompt "MTRR (Memory Type Range Regis << 1738 help << 1739 On Intel P6 family processors (Pent << 1740 the Memory Type Range Registers (MT << 1741 processor access to memory ranges. << 1742 a video (VGA) card on a PCI or AGP << 1743 allows bus write transfers to be co << 1744 before bursting over the PCI/AGP bu << 1745 of image write operations 2.5 times << 1746 /proc/mtrr file which may be used t << 1747 MTRRs. Typically the X server shoul << 1748 << 1749 This code has a reasonably generic << 1750 control registers on other processo << 1751 as well: << 1752 << 1753 The Cyrix 6x86, 6x86MX and M II pro << 1754 Registers (ARRs) which provide a si << 1755 these, the ARRs are used to emulate << 1756 The AMD K6-2 (stepping 8 and above) << 1757 MTRRs. The Centaur C6 (WinChip) has << 1758 write-combining. All of these proce << 1759 and it makes sense to say Y here if << 1760 << 1761 Saying Y here also fixes a problem << 1762 set the MTRRs for the boot CPU and << 1763 can lead to all sorts of problems, << 1764 2218 1765 You can safely say Y even if your m !! 2219 config IP22_CPU_SCACHE 1766 just add about 9 KB to your kernel. !! 2220 bool >> 2221 select BOARD_SCACHE 1767 2222 1768 See <file:Documentation/arch/x86/mt !! 2223 # >> 2224 # Support for a MIPS32 / MIPS64 style S-caches >> 2225 # >> 2226 config MIPS_CPU_SCACHE >> 2227 bool >> 2228 select BOARD_SCACHE 1769 2229 1770 config MTRR_SANITIZER !! 2230 config R5000_CPU_SCACHE 1771 def_bool y !! 2231 bool 1772 prompt "MTRR cleanup support" !! 2232 select BOARD_SCACHE 1773 depends on MTRR !! 2233 >> 2234 config RM7000_CPU_SCACHE >> 2235 bool >> 2236 select BOARD_SCACHE >> 2237 >> 2238 config SIBYTE_DMA_PAGEOPS >> 2239 bool "Use DMA to clear/copy pages" >> 2240 depends on CPU_SB1 1774 help 2241 help 1775 Convert MTRR layout from continuous !! 2242 Instead of using the CPU to zero and copy pages, use a Data Mover 1776 add writeback entries. !! 2243 channel. These DMA channels are otherwise unused by the standard >> 2244 SiByte Linux port. Seems to give a small performance benefit. 1777 2245 1778 Can be disabled with disable_mtrr_c !! 2246 config CPU_HAS_PREFETCH 1779 The largest mtrr entry size for a c !! 2247 bool 1780 mtrr_chunk_size. << 1781 2248 1782 If unsure, say Y. !! 2249 config CPU_GENERIC_DUMP_TLB >> 2250 bool >> 2251 default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 1783 2252 1784 config MTRR_SANITIZER_ENABLE_DEFAULT !! 2253 config CPU_R4K_FPU 1785 int "MTRR cleanup enable value (0-1)" !! 2254 bool 1786 range 0 1 !! 2255 default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 1787 default "0" << 1788 depends on MTRR_SANITIZER << 1789 help << 1790 Enable mtrr cleanup default value << 1791 << 1792 config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT << 1793 int "MTRR cleanup spare reg num (0-7) << 1794 range 0 7 << 1795 default "1" << 1796 depends on MTRR_SANITIZER << 1797 help << 1798 mtrr cleanup spare entries default, << 1799 mtrr_spare_reg_nr=N on the kernel c << 1800 2256 1801 config X86_PAT !! 2257 config CPU_R4K_CACHE_TLB 1802 def_bool y !! 2258 bool 1803 prompt "x86 PAT support" if EXPERT !! 2259 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 1804 depends on MTRR !! 2260 1805 select ARCH_USES_PG_ARCH_2 !! 2261 config MIPS_MT_SMP >> 2262 bool "MIPS MT SMP support (1 TC on each available VPE)" >> 2263 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS >> 2264 select CPU_MIPSR2_IRQ_VI >> 2265 select CPU_MIPSR2_IRQ_EI >> 2266 select SYNC_R4K >> 2267 select MIPS_MT >> 2268 select SMP >> 2269 select SMP_UP >> 2270 select SYS_SUPPORTS_SMP >> 2271 select SYS_SUPPORTS_SCHED_SMT >> 2272 select MIPS_PERF_SHARED_TC_COUNTERS >> 2273 help >> 2274 This is a kernel model which is known as SMVP. This is supported >> 2275 on cores with the MT ASE and uses the available VPEs to implement >> 2276 virtual processors which supports SMP. This is equivalent to the >> 2277 Intel Hyperthreading feature. For further information go to >> 2278 <http://www.imgtec.com/mips/mips-multithreading.asp>. >> 2279 >> 2280 config MIPS_MT >> 2281 bool >> 2282 >> 2283 config SCHED_SMT >> 2284 bool "SMT (multithreading) scheduler support" >> 2285 depends on SYS_SUPPORTS_SCHED_SMT >> 2286 default n 1806 help 2287 help 1807 Use PAT attributes to setup page le !! 2288 SMT scheduler support improves the CPU scheduler's decision making >> 2289 when dealing with MIPS MT enabled cores at a cost of slightly >> 2290 increased overhead in some places. If unsure say N here. 1808 2291 1809 PATs are the modern equivalents of !! 2292 config SYS_SUPPORTS_SCHED_SMT 1810 flexible than MTRRs. !! 2293 bool 1811 2294 1812 Say N here if you see bootup proble !! 2295 config SYS_SUPPORTS_MULTITHREADING 1813 spontaneous reboots) or a non-worki !! 2296 bool 1814 2297 1815 If unsure, say Y. !! 2298 config MIPS_MT_FPAFF >> 2299 bool "Dynamic FPU affinity for FP-intensive threads" >> 2300 default y >> 2301 depends on MIPS_MT_SMP 1816 2302 1817 config X86_UMIP !! 2303 config MIPSR2_TO_R6_EMULATOR 1818 def_bool y !! 2304 bool "MIPS R2-to-R6 emulator" 1819 prompt "User Mode Instruction Prevent !! 2305 depends on CPU_MIPSR6 >> 2306 default y 1820 help 2307 help 1821 User Mode Instruction Prevention (U !! 2308 Choose this option if you want to run non-R6 MIPS userland code. 1822 some x86 processors. If enabled, a !! 2309 Even if you say 'Y' here, the emulator will still be disabled by 1823 issued if the SGDT, SLDT, SIDT, SMS !! 2310 default. You can enable it using the 'mipsr2emu' kernel option. 1824 executed in user mode. These instru !! 2311 The only reason this is a build-time option is to save ~14K from the 1825 information about the hardware stat !! 2312 final kernel image. 1826 << 1827 The vast majority of applications d << 1828 For the very few that do, software << 1829 specific cases in protected and vir << 1830 results are dummy. << 1831 << 1832 config CC_HAS_IBT << 1833 # GCC >= 9 and binutils >= 2.29 << 1834 # Retpoline check to work around http << 1835 # Clang/LLVM >= 14 << 1836 # https://github.com/llvm/llvm-projec << 1837 # https://github.com/llvm/llvm-projec << 1838 def_bool ((CC_IS_GCC && $(cc-option, << 1839 (CC_IS_CLANG && CLANG_VERSI << 1840 $(as-instr,endbr64) << 1841 2313 1842 config X86_CET !! 2314 config MIPS_VPE_LOADER 1843 def_bool n !! 2315 bool "VPE loader support." >> 2316 depends on SYS_SUPPORTS_MULTITHREADING && MODULES >> 2317 select CPU_MIPSR2_IRQ_VI >> 2318 select CPU_MIPSR2_IRQ_EI >> 2319 select MIPS_MT 1844 help 2320 help 1845 CET features configured (Shadow sta !! 2321 Includes a loader for loading an elf relocatable object >> 2322 onto another VPE and running it. 1846 2323 1847 config X86_KERNEL_IBT !! 2324 config MIPS_VPE_LOADER_CMP 1848 prompt "Indirect Branch Tracking" !! 2325 bool 1849 def_bool y !! 2326 default "y" 1850 depends on X86_64 && CC_HAS_IBT && HA !! 2327 depends on MIPS_VPE_LOADER && MIPS_CMP 1851 # https://github.com/llvm/llvm-projec << 1852 depends on !LD_IS_LLD || LLD_VERSION << 1853 select OBJTOOL << 1854 select X86_CET << 1855 help << 1856 Build the kernel with support for I << 1857 hardware support course-grain forwa << 1858 protection. It enforces that all in << 1859 an ENDBR instruction, as such, the << 1860 code with them to make this happen. << 1861 << 1862 In addition to building the kernel << 1863 are not indirect call targets, avoi << 1864 << 1865 This requires LTO like objtool runs << 1866 does significantly reduce the numbe << 1867 kernel image. << 1868 2328 1869 config X86_INTEL_MEMORY_PROTECTION_KEYS !! 2329 config MIPS_VPE_LOADER_MT 1870 prompt "Memory Protection Keys" !! 2330 bool 1871 def_bool y !! 2331 default "y" 1872 # Note: only available in 64-bit mode !! 2332 depends on MIPS_VPE_LOADER && !MIPS_CMP 1873 depends on X86_64 && (CPU_SUP_INTEL | !! 2333 1874 select ARCH_USES_HIGH_VMA_FLAGS !! 2334 config MIPS_VPE_LOADER_TOM 1875 select ARCH_HAS_PKEYS !! 2335 bool "Load VPE program into memory hidden from linux" >> 2336 depends on MIPS_VPE_LOADER >> 2337 default y 1876 help 2338 help 1877 Memory Protection Keys provides a m !! 2339 The loader can use memory that is present but has been hidden from 1878 page-based protections, but without !! 2340 Linux using the kernel command line option "mem=xxMB". It's up to 1879 page tables when an application cha !! 2341 you to ensure the amount you put in the option and the space your >> 2342 program requires is less or equal to the amount physically present. 1880 2343 1881 For details, see Documentation/core !! 2344 config MIPS_VPE_APSP_API >> 2345 bool "Enable support for AP/SP API (RTLX)" >> 2346 depends on MIPS_VPE_LOADER >> 2347 help 1882 2348 1883 If unsure, say y. !! 2349 config MIPS_VPE_APSP_API_CMP >> 2350 bool >> 2351 default "y" >> 2352 depends on MIPS_VPE_APSP_API && MIPS_CMP 1884 2353 1885 config ARCH_PKEY_BITS !! 2354 config MIPS_VPE_APSP_API_MT 1886 int !! 2355 bool 1887 default 4 !! 2356 default "y" >> 2357 depends on MIPS_VPE_APSP_API && !MIPS_CMP 1888 2358 1889 choice !! 2359 config MIPS_CMP 1890 prompt "TSX enable mode" !! 2360 bool "MIPS CMP framework support (DEPRECATED)" 1891 depends on CPU_SUP_INTEL !! 2361 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 1892 default X86_INTEL_TSX_MODE_OFF !! 2362 select SMP >> 2363 select SYNC_R4K >> 2364 select SYS_SUPPORTS_SMP >> 2365 select WEAK_ORDERING >> 2366 default n 1893 help 2367 help 1894 Intel's TSX (Transactional Synchron !! 2368 Select this if you are using a bootloader which implements the "CMP 1895 allows to optimize locking protocol !! 2369 framework" protocol (ie. YAMON) and want your kernel to make use of 1896 can lead to a noticeable performanc !! 2370 its ability to start secondary CPUs. >> 2371 >> 2372 Unless you have a specific need, you should use CONFIG_MIPS_CPS >> 2373 instead of this. >> 2374 >> 2375 config MIPS_CPS >> 2376 bool "MIPS Coherent Processing System support" >> 2377 depends on SYS_SUPPORTS_MIPS_CPS >> 2378 select MIPS_CM >> 2379 select MIPS_CPC >> 2380 select MIPS_CPS_PM if HOTPLUG_CPU >> 2381 select SMP >> 2382 select SYNC_R4K if (CEVT_R4K || CSRC_R4K) >> 2383 select SYS_SUPPORTS_HOTPLUG_CPU >> 2384 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 >> 2385 select SYS_SUPPORTS_SMP >> 2386 select WEAK_ORDERING >> 2387 help >> 2388 Select this if you wish to run an SMP kernel across multiple cores >> 2389 within a MIPS Coherent Processing System. When this option is >> 2390 enabled the kernel will probe for other cores and boot them with >> 2391 no external assistance. It is safe to enable this when hardware >> 2392 support is unavailable. >> 2393 >> 2394 config MIPS_CPS_PM >> 2395 depends on MIPS_CPS >> 2396 select MIPS_CPC >> 2397 bool 1897 2398 1898 On the other hand it has been shown !! 2399 config MIPS_CM 1899 to form side channel attacks (e.g. !! 2400 bool 1900 will be more of those attacks disco << 1901 2401 1902 Therefore TSX is not enabled by def !! 2402 config MIPS_CPC 1903 might override this decision by tsx !! 2403 bool 1904 Even with TSX enabled, the kernel w << 1905 possible TAA mitigation setting dep << 1906 for the particular machine. << 1907 2404 1908 This option allows to set the defau !! 2405 config SB1_PASS_2_WORKAROUNDS 1909 and =auto. See Documentation/admin- !! 2406 bool 1910 details. !! 2407 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) >> 2408 default y 1911 2409 1912 Say off if not sure, auto if TSX is !! 2410 config SB1_PASS_2_1_WORKAROUNDS 1913 platforms or on if TSX is in use an !! 2411 bool 1914 relevant. !! 2412 depends on CPU_SB1 && CPU_SB1_PASS_2 >> 2413 default y 1915 2414 1916 config X86_INTEL_TSX_MODE_OFF << 1917 bool "off" << 1918 help << 1919 TSX is disabled if possible - equal << 1920 2415 1921 config X86_INTEL_TSX_MODE_ON !! 2416 config ARCH_PHYS_ADDR_T_64BIT 1922 bool "on" !! 2417 bool >> 2418 >> 2419 choice >> 2420 prompt "SmartMIPS or microMIPS ASE support" >> 2421 >> 2422 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS >> 2423 bool "None" 1923 help 2424 help 1924 TSX is always enabled on TSX capabl !! 2425 Select this if you want neither microMIPS nor SmartMIPS support 1925 line parameter. << 1926 2426 1927 config X86_INTEL_TSX_MODE_AUTO !! 2427 config CPU_HAS_SMARTMIPS 1928 bool "auto" !! 2428 depends on SYS_SUPPORTS_SMARTMIPS >> 2429 bool "SmartMIPS" >> 2430 help >> 2431 SmartMIPS is a extension of the MIPS32 architecture aimed at >> 2432 increased security at both hardware and software level for >> 2433 smartcards. Enabling this option will allow proper use of the >> 2434 SmartMIPS instructions by Linux applications. However a kernel with >> 2435 this option will not work on a MIPS core without SmartMIPS core. If >> 2436 you don't know you probably don't have SmartMIPS and should say N >> 2437 here. >> 2438 >> 2439 config CPU_MICROMIPS >> 2440 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 >> 2441 bool "microMIPS" 1929 help 2442 help 1930 TSX is enabled on TSX capable HW th !! 2443 When this option is enabled the kernel will be built using the 1931 side channel attacks- equals the ts !! 2444 microMIPS ISA >> 2445 1932 endchoice 2446 endchoice 1933 2447 1934 config X86_SGX !! 2448 config CPU_HAS_MSA 1935 bool "Software Guard eXtensions (SGX) !! 2449 bool "Support for the MIPS SIMD Architecture" 1936 depends on X86_64 && CPU_SUP_INTEL && !! 2450 depends on CPU_SUPPORTS_MSA 1937 depends on CRYPTO=y !! 2451 depends on 64BIT || MIPS_O32_FP64_SUPPORT 1938 depends on CRYPTO_SHA256=y !! 2452 help 1939 select MMU_NOTIFIER !! 2453 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 1940 select NUMA_KEEP_MEMINFO if NUMA !! 2454 and a set of SIMD instructions to operate on them. When this option 1941 select XARRAY_MULTI !! 2455 is enabled the kernel will support allocating & switching MSA 1942 help !! 2456 vector register contexts. If you know that your kernel will only be 1943 Intel(R) Software Guard eXtensions !! 2457 running on CPUs which do not support MSA or that your userland will 1944 that can be used by applications to !! 2458 not be making use of it then you may wish to say N here to reduce 1945 and data, referred to as enclaves. !! 2459 the size & complexity of your kernel. 1946 only be accessed by code running wi << 1947 outside the enclave, including othe << 1948 hardware. << 1949 2460 1950 If unsure, say N. !! 2461 If unsure, say Y. 1951 2462 1952 config X86_USER_SHADOW_STACK !! 2463 config CPU_HAS_WB 1953 bool "X86 userspace shadow stack" !! 2464 bool 1954 depends on AS_WRUSS << 1955 depends on X86_64 << 1956 select ARCH_USES_HIGH_VMA_FLAGS << 1957 select X86_CET << 1958 help << 1959 Shadow stack protection is a hardwa << 1960 return address corruption. This he << 1961 Applications must be enabled to use << 1962 get protection "for free". << 1963 2465 1964 CPUs supporting shadow stacks were !! 2466 config XKS01 >> 2467 bool 1965 2468 1966 See Documentation/arch/x86/shstk.rs !! 2469 config CPU_HAS_RIXI >> 2470 bool 1967 2471 1968 If unsure, say N. !! 2472 # >> 2473 # Vectored interrupt mode is an R2 feature >> 2474 # >> 2475 config CPU_MIPSR2_IRQ_VI >> 2476 bool 1969 2477 1970 config INTEL_TDX_HOST !! 2478 # 1971 bool "Intel Trust Domain Extensions ( !! 2479 # Extended interrupt mode is an R2 feature 1972 depends on CPU_SUP_INTEL !! 2480 # 1973 depends on X86_64 !! 2481 config CPU_MIPSR2_IRQ_EI 1974 depends on KVM_INTEL !! 2482 bool 1975 depends on X86_X2APIC << 1976 select ARCH_KEEP_MEMBLOCK << 1977 depends on CONTIG_ALLOC << 1978 depends on !KEXEC_CORE << 1979 depends on X86_MCE << 1980 help << 1981 Intel Trust Domain Extensions (TDX) << 1982 host and certain physical attacks. << 1983 support in the host kernel to run c << 1984 2483 1985 If unsure, say N. !! 2484 config CPU_HAS_SYNC >> 2485 bool >> 2486 depends on !CPU_R3000 >> 2487 default y 1986 2488 1987 config EFI !! 2489 # 1988 bool "EFI runtime service support" !! 2490 # CPU non-features 1989 depends on ACPI !! 2491 # 1990 select UCS2_STRING !! 2492 config CPU_DADDI_WORKAROUNDS 1991 select EFI_RUNTIME_WRAPPERS !! 2493 bool 1992 select ARCH_USE_MEMREMAP_PROT << 1993 select EFI_RUNTIME_MAP if KEXEC_CORE << 1994 help << 1995 This enables the kernel to use EFI << 1996 available (such as the EFI variable << 1997 << 1998 This option is only useful on syste << 1999 In addition, you should use the lat << 2000 at <http://elilo.sourceforge.net> i << 2001 of EFI runtime services. However, e << 2002 resultant kernel should continue to << 2003 platforms. << 2004 << 2005 config EFI_STUB << 2006 bool "EFI stub support" << 2007 depends on EFI << 2008 select RELOCATABLE << 2009 help << 2010 This kernel feature allows a bzImag << 2011 by EFI firmware without the use of << 2012 << 2013 See Documentation/admin-guide/efi-s << 2014 << 2015 config EFI_HANDOVER_PROTOCOL << 2016 bool "EFI handover protocol (DEPRECAT << 2017 depends on EFI_STUB << 2018 default y << 2019 help << 2020 Select this in order to include sup << 2021 handover protocol, which defines al << 2022 EFI stub. This is a practice that << 2023 specification, and requires a prior << 2024 bootloader about Linux/x86 specific << 2025 and initrd, and where in memory tho << 2026 << 2027 If in doubt, say Y. Even though the << 2028 present in upstream GRUB or other b << 2029 GRUB with numerous downstream patch << 2030 handover protocol as as result. << 2031 << 2032 config EFI_MIXED << 2033 bool "EFI mixed-mode support" << 2034 depends on EFI_STUB && X86_64 << 2035 help << 2036 Enabling this feature allows a 64-b << 2037 on a 32-bit firmware, provided that << 2038 mode. << 2039 2494 2040 Note that it is not possible to boo !! 2495 config CPU_R4000_WORKAROUNDS 2041 kernel via the EFI boot stub - a bo !! 2496 bool 2042 the EFI handover protocol must be u !! 2497 select CPU_R4400_WORKAROUNDS 2043 2498 2044 If unsure, say N. !! 2499 config CPU_R4400_WORKAROUNDS >> 2500 bool 2045 2501 2046 config EFI_RUNTIME_MAP !! 2502 config MIPS_ASID_SHIFT 2047 bool "Export EFI runtime maps to sysf !! 2503 int 2048 depends on EFI !! 2504 default 6 if CPU_R3000 || CPU_TX39XX 2049 help !! 2505 default 4 if CPU_R8000 2050 Export EFI runtime memory regions t !! 2506 default 0 2051 That memory map is required by the << 2052 mappings after kexec, but can also << 2053 2507 2054 See also Documentation/ABI/testing/ !! 2508 config MIPS_ASID_BITS >> 2509 int >> 2510 default 0 if MIPS_ASID_BITS_VARIABLE >> 2511 default 6 if CPU_R3000 || CPU_TX39XX >> 2512 default 8 2055 2513 2056 source "kernel/Kconfig.hz" !! 2514 config MIPS_ASID_BITS_VARIABLE >> 2515 bool 2057 2516 2058 config ARCH_SUPPORTS_KEXEC !! 2517 # 2059 def_bool y !! 2518 # - Highmem only makes sense for the 32-bit kernel. >> 2519 # - The current highmem code will only work properly on physically indexed >> 2520 # caches such as R3000, SB1, R7000 or those that look like they're virtually >> 2521 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the >> 2522 # moment we protect the user and offer the highmem option only on machines >> 2523 # where it's known to be safe. This will not offer highmem on a few systems >> 2524 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically >> 2525 # indexed CPUs but we're playing safe. >> 2526 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we >> 2527 # know they might have memory configurations that could make use of highmem >> 2528 # support. >> 2529 # >> 2530 config HIGHMEM >> 2531 bool "High Memory Support" >> 2532 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2060 2533 2061 config ARCH_SUPPORTS_KEXEC_FILE !! 2534 config CPU_SUPPORTS_HIGHMEM 2062 def_bool X86_64 !! 2535 bool 2063 2536 2064 config ARCH_SELECTS_KEXEC_FILE !! 2537 config SYS_SUPPORTS_HIGHMEM 2065 def_bool y !! 2538 bool 2066 depends on KEXEC_FILE << 2067 select HAVE_IMA_KEXEC if IMA << 2068 2539 2069 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2540 config SYS_SUPPORTS_SMARTMIPS 2070 def_bool y !! 2541 bool 2071 2542 2072 config ARCH_SUPPORTS_KEXEC_SIG !! 2543 config SYS_SUPPORTS_MICROMIPS 2073 def_bool y !! 2544 bool 2074 2545 2075 config ARCH_SUPPORTS_KEXEC_SIG_FORCE !! 2546 config SYS_SUPPORTS_MIPS16 2076 def_bool y !! 2547 bool >> 2548 help >> 2549 This option must be set if a kernel might be executed on a MIPS16- >> 2550 enabled CPU even if MIPS16 is not actually being used. In other >> 2551 words, it makes the kernel MIPS16-tolerant. 2077 2552 2078 config ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG !! 2553 config CPU_SUPPORTS_MSA 2079 def_bool y !! 2554 bool 2080 2555 2081 config ARCH_SUPPORTS_KEXEC_JUMP !! 2556 config ARCH_FLATMEM_ENABLE 2082 def_bool y 2557 def_bool y >> 2558 depends on !NUMA && !CPU_LOONGSON2 2083 2559 2084 config ARCH_SUPPORTS_CRASH_DUMP !! 2560 config ARCH_DISCONTIGMEM_ENABLE 2085 def_bool X86_64 || (X86_32 && HIGHMEM !! 2561 bool 2086 !! 2562 default y if SGI_IP27 2087 config ARCH_SUPPORTS_CRASH_HOTPLUG !! 2563 help 2088 def_bool y !! 2564 Say Y to support efficient handling of discontiguous physical memory, >> 2565 for architectures which are either NUMA (Non-Uniform Memory Access) >> 2566 or have huge holes in the physical address space for other reasons. >> 2567 See <file:Documentation/vm/numa> for more. 2089 2568 2090 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATI !! 2569 config ARCH_SPARSEMEM_ENABLE 2091 def_bool CRASH_RESERVE !! 2570 bool >> 2571 select SPARSEMEM_STATIC 2092 2572 2093 config PHYSICAL_START !! 2573 config NUMA 2094 hex "Physical address where the kerne !! 2574 bool "NUMA Support" 2095 default "0x1000000" !! 2575 depends on SYS_SUPPORTS_NUMA 2096 help 2576 help 2097 This gives the physical address whe !! 2577 Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2098 !! 2578 Access). This option improves performance on systems with more 2099 If the kernel is not relocatable (C !! 2579 than two nodes; on two node systems it is generally better to 2100 will decompress itself to above phy !! 2580 leave it disabled; on single node systems disable this option 2101 Otherwise, bzImage will run from th !! 2581 disabled. 2102 by the boot loader. The only except << 2103 above physical address, in which ca << 2104 << 2105 In normal kdump cases one does not << 2106 as now bzImage can be compiled as a << 2107 (CONFIG_RELOCATABLE=y) and be used << 2108 address. This option is mainly usef << 2109 to use a bzImage for capturing the << 2110 vmlinux instead. vmlinux is not rel << 2111 to be specifically compiled to run << 2112 (normally a reserved region) and th << 2113 << 2114 So if you are using bzImage for cap << 2115 leave the value here unchanged to 0 << 2116 CONFIG_RELOCATABLE=y. Otherwise if << 2117 for capturing the crash dump change << 2118 the reserved region. In other word << 2119 the "X" value as specified in the " << 2120 command line boot parameter passed << 2121 kernel. Please take a look at Docum << 2122 for more details about crash dumps. << 2123 << 2124 Usage of bzImage for capturing the << 2125 one does not have to build two kern << 2126 as production kernel and capture ke << 2127 gone away after relocatable bzImage << 2128 is present because there are users << 2129 vmlinux for dump capture. This opti << 2130 line. << 2131 2582 2132 Don't change this unless you know w !! 2583 config SYS_SUPPORTS_NUMA >> 2584 bool 2133 2585 2134 config RELOCATABLE 2586 config RELOCATABLE 2135 bool "Build a relocatable kernel" !! 2587 bool "Relocatable kernel" 2136 default y !! 2588 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC) 2137 help 2589 help 2138 This builds a kernel image that ret 2590 This builds a kernel image that retains relocation information 2139 so it can be loaded someplace besid 2591 so it can be loaded someplace besides the default 1MB. 2140 The relocations tend to make the ke !! 2592 The relocations make the kernel binary about 15% larger, 2141 but are discarded at runtime. !! 2593 but are discarded at runtime >> 2594 >> 2595 config RELOCATION_TABLE_SIZE >> 2596 hex "Relocation table size" >> 2597 depends on RELOCATABLE >> 2598 range 0x0 0x01000000 >> 2599 default "0x00100000" >> 2600 ---help--- >> 2601 A table of relocation data will be appended to the kernel binary >> 2602 and parsed at boot to fix up the relocated kernel. 2142 2603 2143 One use is for the kexec on panic c !! 2604 This option allows the amount of space reserved for the table to be 2144 must live at a different physical a !! 2605 adjusted, although the default of 1Mb should be ok in most cases. 2145 kernel. !! 2606 2146 !! 2607 The build will fail and a valid size suggested if this is too small. 2147 Note: If CONFIG_RELOCATABLE=y, then !! 2608 2148 it has been loaded at and the compi !! 2609 If unsure, leave at the default value. 2149 (CONFIG_PHYSICAL_START) is used as << 2150 2610 2151 config RANDOMIZE_BASE 2611 config RANDOMIZE_BASE 2152 bool "Randomize the address of the ke !! 2612 bool "Randomize the address of the kernel image" 2153 depends on RELOCATABLE 2613 depends on RELOCATABLE 2154 default y !! 2614 ---help--- 2155 help !! 2615 Randomizes the physical and virtual address at which the 2156 In support of Kernel Address Space !! 2616 kernel image is loaded, as a security feature that 2157 this randomizes the physical addres !! 2617 deters exploit attempts relying on knowledge of the location 2158 is decompressed and the virtual add !! 2618 of kernel internals. 2159 image is mapped, as a security feat << 2160 attempts relying on knowledge of th << 2161 code internals. << 2162 << 2163 On 64-bit, the kernel physical and << 2164 randomized separately. The physical << 2165 between 16MB and the top of physica << 2166 virtual address will be randomized << 2167 of entropy). Note that this also re << 2168 available to kernel modules from 1. << 2169 << 2170 On 32-bit, the kernel physical and << 2171 randomized together. They will be r << 2172 512MB (8 bits of entropy). << 2173 << 2174 Entropy is generated using the RDRA << 2175 supported. If RDTSC is supported, i << 2176 the entropy pool as well. If neithe << 2177 supported, then entropy is read fro << 2178 usable entropy is limited by the ke << 2179 2GB addressing, and that PHYSICAL_A << 2180 minimum of 2MB. As a result, only 1 << 2181 theoretically possible, but the imp << 2182 limited due to memory layouts. << 2183 << 2184 If unsure, say Y. << 2185 2619 2186 # Relocation on x86 needs some additional bui !! 2620 Entropy is generated using any coprocessor 0 registers available. 2187 config X86_NEED_RELOCS << 2188 def_bool y << 2189 depends on RANDOMIZE_BASE || (X86_32 << 2190 2621 2191 config PHYSICAL_ALIGN !! 2622 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 2192 hex "Alignment value to which kernel << 2193 default "0x200000" << 2194 range 0x2000 0x1000000 if X86_32 << 2195 range 0x200000 0x1000000 if X86_64 << 2196 help << 2197 This value puts the alignment restr << 2198 where kernel is loaded and run from << 2199 address which meets above alignment << 2200 2623 2201 If bootloader loads the kernel at a !! 2624 If unsure, say N. 2202 CONFIG_RELOCATABLE is set, kernel w << 2203 address aligned to above value and << 2204 2625 2205 If bootloader loads the kernel at a !! 2626 config RANDOMIZE_BASE_MAX_OFFSET 2206 CONFIG_RELOCATABLE is not set, kern !! 2627 hex "Maximum kASLR offset" if EXPERT 2207 load address and decompress itself !! 2628 depends on RANDOMIZE_BASE 2208 compiled for and run from there. Th !! 2629 range 0x0 0x40000000 if EVA || 64BIT 2209 compiled already meets above alignm !! 2630 range 0x0 0x08000000 2210 end result is that kernel runs from !! 2631 default "0x01000000" 2211 above alignment restrictions. !! 2632 ---help--- >> 2633 When kASLR is active, this provides the maximum offset that will >> 2634 be applied to the kernel image. It should be set according to the >> 2635 amount of physical RAM available in the target system minus >> 2636 PHYSICAL_START and must be a power of 2. 2212 2637 2213 On 32-bit this value must be a mult !! 2638 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with 2214 this value must be a multiple of 0x !! 2639 EVA or 64-bit. The default is 16Mb. 2215 2640 2216 Don't change this unless you know w !! 2641 config NODES_SHIFT >> 2642 int >> 2643 default "6" >> 2644 depends on NEED_MULTIPLE_NODES 2217 2645 2218 config DYNAMIC_MEMORY_LAYOUT !! 2646 config HW_PERF_EVENTS 2219 bool !! 2647 bool "Enable hardware performance counter support for perf events" >> 2648 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) >> 2649 default y 2220 help 2650 help 2221 This option makes base addresses of !! 2651 Enable hardware performance counter support for perf events. If 2222 __PAGE_OFFSET movable during boot. !! 2652 disabled, perf events will use software events only. 2223 2653 2224 config RANDOMIZE_MEMORY !! 2654 source "mm/Kconfig" 2225 bool "Randomize the kernel memory sec << 2226 depends on X86_64 << 2227 depends on RANDOMIZE_BASE << 2228 select DYNAMIC_MEMORY_LAYOUT << 2229 default RANDOMIZE_BASE << 2230 help << 2231 Randomizes the base virtual address << 2232 (physical memory mapping, vmalloc & << 2233 makes exploits relying on predictab << 2234 << 2235 The order of allocations remains un << 2236 the same way as RANDOMIZE_BASE. Cur << 2237 configuration have in average 30,00 << 2238 addresses for each memory section. << 2239 2655 2240 If unsure, say Y. !! 2656 config SMP >> 2657 bool "Multi-Processing support" >> 2658 depends on SYS_SUPPORTS_SMP >> 2659 help >> 2660 This enables support for systems with more than one CPU. If you have >> 2661 a system with only one CPU, say N. If you have a system with more >> 2662 than one CPU, say Y. 2241 2663 2242 config RANDOMIZE_MEMORY_PHYSICAL_PADDING !! 2664 If you say N here, the kernel will run on uni- and multiprocessor 2243 hex "Physical memory mapping padding" !! 2665 machines, but will use only one CPU of a multiprocessor machine. If 2244 depends on RANDOMIZE_MEMORY !! 2666 you say Y here, the kernel will run on many, but not all, 2245 default "0xa" if MEMORY_HOTPLUG !! 2667 uniprocessor machines. On a uniprocessor machine, the kernel 2246 default "0x0" !! 2668 will run faster if you say N here. 2247 range 0x1 0x40 if MEMORY_HOTPLUG << 2248 range 0x0 0x40 << 2249 help << 2250 Define the padding in terabytes add << 2251 memory size during kernel memory ra << 2252 for memory hotplug support but redu << 2253 address randomization. << 2254 2669 2255 If unsure, leave at the default val !! 2670 People using multiprocessor machines who say Y here should also say >> 2671 Y to "Enhanced Real Time Clock Support", below. 2256 2672 2257 config ADDRESS_MASKING !! 2673 See also the SMP-HOWTO available at 2258 bool "Linear Address Masking support" !! 2674 <http://www.tldp.org/docs.html#howto>. 2259 depends on X86_64 << 2260 depends on COMPILE_TEST || !CPU_MITIG << 2261 help << 2262 Linear Address Masking (LAM) modifi << 2263 to 64-bit linear addresses, allowin << 2264 untranslated address bits for metad << 2265 2675 2266 The capability can be used for effi !! 2676 If you don't know what to do here, say N. 2267 implementation and for optimization << 2268 2677 2269 config HOTPLUG_CPU 2678 config HOTPLUG_CPU 2270 def_bool y !! 2679 bool "Support for hot-pluggable CPUs" 2271 depends on SMP !! 2680 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 2272 << 2273 config COMPAT_VDSO << 2274 def_bool n << 2275 prompt "Disable the 32-bit vDSO (need << 2276 depends on COMPAT_32 << 2277 help 2681 help 2278 Certain buggy versions of glibc wil !! 2682 Say Y here to allow turning CPUs off and on. CPUs can be 2279 presented with a 32-bit vDSO that i !! 2683 controlled through /sys/devices/system/cpu. 2280 indicated in its segment table. !! 2684 (Note: power management support will enable this option 2281 !! 2685 automatically on SMP systems. ) 2282 The bug was introduced by f866314b8 !! 2686 Say N if you want to disable CPU hotplug. 2283 and fixed by 3b3ddb4f7db98ec9e912cc << 2284 49ad572a70b8aeb91e57483a11dd1b77e31 << 2285 the only released version with the << 2286 contains a buggy "glibc 2.3.2". << 2287 << 2288 The symptom of the bug is that ever << 2289 dl_main: Assertion `(void *) ph->p_ << 2290 << 2291 Saying Y here changes the default v << 2292 option from 1 to 0, which turns off << 2293 This works around the glibc bug but << 2294 2687 2295 If unsure, say N: if you are compil !! 2688 config SMP_UP 2296 are unlikely to be using a buggy ve !! 2689 bool 2297 2690 2298 choice !! 2691 config SYS_SUPPORTS_MIPS_CMP 2299 prompt "vsyscall table for legacy app !! 2692 bool 2300 depends on X86_64 << 2301 default LEGACY_VSYSCALL_XONLY << 2302 help << 2303 Legacy user code that does not know << 2304 to be able to issue three syscalls << 2305 kernel space. Since this location i << 2306 it can be used to assist security v << 2307 << 2308 This setting can be changed at boot << 2309 line parameter vsyscall=[emulate|xo << 2310 is deprecated and can only be enabl << 2311 line. << 2312 << 2313 On a system with recent enough glib << 2314 static binaries, you can say None w << 2315 to improve security. << 2316 2693 2317 If unsure, select "Emulate executio !! 2694 config SYS_SUPPORTS_MIPS_CPS >> 2695 bool 2318 2696 2319 config LEGACY_VSYSCALL_XONLY !! 2697 config SYS_SUPPORTS_SMP 2320 bool "Emulate execution only" !! 2698 bool 2321 help << 2322 The kernel traps and emulat << 2323 address mapping and does no << 2324 configuration is recommende << 2325 legacy vsyscall area but su << 2326 instrumentation of legacy c << 2327 certain uses of the vsyscal << 2328 buffer. << 2329 2699 2330 config LEGACY_VSYSCALL_NONE !! 2700 config NR_CPUS_DEFAULT_4 2331 bool "None" !! 2701 bool 2332 help << 2333 There will be no vsyscall m << 2334 eliminate any risk of ASLR << 2335 fixed address mapping. Atte << 2336 will be reported to dmesg, << 2337 malicious userspace program << 2338 2702 2339 endchoice !! 2703 config NR_CPUS_DEFAULT_8 >> 2704 bool 2340 2705 2341 config CMDLINE_BOOL !! 2706 config NR_CPUS_DEFAULT_16 2342 bool "Built-in kernel command line" !! 2707 bool 2343 help << 2344 Allow for specifying boot arguments << 2345 build time. On some systems (e.g. << 2346 necessary or convenient to provide << 2347 kernel boot arguments with the kern << 2348 to not rely on the boot loader to p << 2349 2708 2350 To compile command line arguments i !! 2709 config NR_CPUS_DEFAULT_32 2351 set this option to 'Y', then fill i !! 2710 bool 2352 boot arguments in CONFIG_CMDLINE. << 2353 2711 2354 Systems with fully functional boot !! 2712 config NR_CPUS_DEFAULT_64 2355 should leave this option set to 'N' !! 2713 bool 2356 2714 2357 config CMDLINE !! 2715 config NR_CPUS 2358 string "Built-in kernel command strin !! 2716 int "Maximum number of CPUs (2-256)" 2359 depends on CMDLINE_BOOL !! 2717 range 2 256 2360 default "" !! 2718 depends on SMP >> 2719 default "4" if NR_CPUS_DEFAULT_4 >> 2720 default "8" if NR_CPUS_DEFAULT_8 >> 2721 default "16" if NR_CPUS_DEFAULT_16 >> 2722 default "32" if NR_CPUS_DEFAULT_32 >> 2723 default "64" if NR_CPUS_DEFAULT_64 2361 help 2724 help 2362 Enter arguments here that should be !! 2725 This allows you to specify the maximum number of CPUs which this 2363 image and used at boot time. If th !! 2726 kernel will support. The maximum supported value is 32 for 32-bit 2364 command line at boot time, it is ap !! 2727 kernel and 64 for 64-bit kernels; the minimum value which makes 2365 form the full kernel command line, !! 2728 sense is 1 for Qemu (useful only for kernel debugging purposes) >> 2729 and 2 for all others. >> 2730 >> 2731 This is purely to save memory - each supported CPU adds >> 2732 approximately eight kilobytes to the kernel image. For best >> 2733 performance should round up your number of processors to the next >> 2734 power of two. 2366 2735 2367 However, you can use the CONFIG_CMD !! 2736 config MIPS_PERF_SHARED_TC_COUNTERS 2368 change this behavior. !! 2737 bool 2369 2738 2370 In most cases, the command line (wh !! 2739 # 2371 by the boot loader) should specify !! 2740 # Timer Interrupt Frequency Configuration 2372 file system. !! 2741 # 2373 2742 2374 config CMDLINE_OVERRIDE !! 2743 choice 2375 bool "Built-in command line overrides !! 2744 prompt "Timer frequency" 2376 depends on CMDLINE_BOOL && CMDLINE != !! 2745 default HZ_250 2377 help 2746 help 2378 Set this option to 'Y' to have the !! 2747 Allows the configuration of the timer frequency. 2379 command line, and use ONLY the buil << 2380 2748 2381 This is used to work around broken !! 2749 config HZ_24 2382 be set to 'N' under normal conditio !! 2750 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ 2383 2751 2384 config MODIFY_LDT_SYSCALL !! 2752 config HZ_48 2385 bool "Enable the LDT (local descripto !! 2753 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 2386 default y << 2387 help << 2388 Linux can allow user programs to in << 2389 Local Descriptor Table (LDT) using << 2390 call. This is required to run 16-b << 2391 DOSEMU or some Wine programs. It i << 2392 threading libraries. << 2393 2754 2394 Enabling this feature adds a small !! 2755 config HZ_100 2395 context switches and increases the !! 2756 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 2396 surface. Disabling it removes the << 2397 2757 2398 Saying 'N' here may make sense for !! 2758 config HZ_128 >> 2759 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 2399 2760 2400 config STRICT_SIGALTSTACK_SIZE !! 2761 config HZ_250 2401 bool "Enforce strict size checking fo !! 2762 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 2402 depends on DYNAMIC_SIGFRAME << 2403 help << 2404 For historical reasons MINSIGSTKSZ << 2405 already too small with AVX512 suppo << 2406 enforce strict checking of the siga << 2407 real size of the FPU frame. This op << 2408 by default. It can also be controll << 2409 line option 'strict_sas_size' indep << 2410 switch. Enabling it might break exi << 2411 allocate a too small sigaltstack bu << 2412 never get a signal delivered. << 2413 2763 2414 Say 'N' unless you want to really e !! 2764 config HZ_256 >> 2765 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 2415 2766 2416 config CFI_AUTO_DEFAULT !! 2767 config HZ_1000 2417 bool "Attempt to use FineIBT by defau !! 2768 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 2418 depends on FINEIBT << 2419 default y << 2420 help << 2421 Attempt to use FineIBT by default a << 2422 this is the same as booting with "c << 2423 this is the same as booting with "c << 2424 2769 2425 source "kernel/livepatch/Kconfig" !! 2770 config HZ_1024 >> 2771 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 2426 2772 2427 endmenu !! 2773 endchoice 2428 << 2429 config CC_HAS_NAMED_AS << 2430 def_bool $(success,echo 'int __seg_fs << 2431 depends on CC_IS_GCC << 2432 2774 2433 config CC_HAS_NAMED_AS_FIXED_SANITIZERS !! 2775 config SYS_SUPPORTS_24HZ 2434 def_bool CC_IS_GCC && GCC_VERSION >= !! 2776 bool 2435 2777 2436 config USE_X86_SEG_SUPPORT !! 2778 config SYS_SUPPORTS_48HZ 2437 def_bool y !! 2779 bool 2438 depends on CC_HAS_NAMED_AS << 2439 # << 2440 # -fsanitize=kernel-address (KASAN) a << 2441 # (KCSAN) are incompatible with named << 2442 # GCC < 13.3 - see GCC PR sanitizer/1 << 2443 # << 2444 depends on !(KASAN || KCSAN) || CC_HA << 2445 2780 2446 config CC_HAS_SLS !! 2781 config SYS_SUPPORTS_100HZ 2447 def_bool $(cc-option,-mharden-sls=all !! 2782 bool 2448 2783 2449 config CC_HAS_RETURN_THUNK !! 2784 config SYS_SUPPORTS_128HZ 2450 def_bool $(cc-option,-mfunction-retur !! 2785 bool 2451 2786 2452 config CC_HAS_ENTRY_PADDING !! 2787 config SYS_SUPPORTS_250HZ 2453 def_bool $(cc-option,-fpatchable-func !! 2788 bool 2454 2789 2455 config FUNCTION_PADDING_CFI !! 2790 config SYS_SUPPORTS_256HZ 2456 int !! 2791 bool 2457 default 59 if FUNCTION_ALIGNMENT_64B << 2458 default 27 if FUNCTION_ALIGNMENT_32B << 2459 default 11 if FUNCTION_ALIGNMENT_16B << 2460 default 3 if FUNCTION_ALIGNMENT_8B << 2461 default 0 << 2462 << 2463 # Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG << 2464 # except Kconfig can't do arithmetic :/ << 2465 config FUNCTION_PADDING_BYTES << 2466 int << 2467 default FUNCTION_PADDING_CFI if CFI_C << 2468 default FUNCTION_ALIGNMENT << 2469 2792 2470 config CALL_PADDING !! 2793 config SYS_SUPPORTS_1000HZ 2471 def_bool n !! 2794 bool 2472 depends on CC_HAS_ENTRY_PADDING && OB << 2473 select FUNCTION_ALIGNMENT_16B << 2474 2795 2475 config FINEIBT !! 2796 config SYS_SUPPORTS_1024HZ 2476 def_bool y !! 2797 bool 2477 depends on X86_KERNEL_IBT && CFI_CLAN << 2478 select CALL_PADDING << 2479 2798 2480 config HAVE_CALL_THUNKS !! 2799 config SYS_SUPPORTS_ARBIT_HZ 2481 def_bool y !! 2800 bool 2482 depends on CC_HAS_ENTRY_PADDING && MI !! 2801 default y if !SYS_SUPPORTS_24HZ && \ >> 2802 !SYS_SUPPORTS_48HZ && \ >> 2803 !SYS_SUPPORTS_100HZ && \ >> 2804 !SYS_SUPPORTS_128HZ && \ >> 2805 !SYS_SUPPORTS_250HZ && \ >> 2806 !SYS_SUPPORTS_256HZ && \ >> 2807 !SYS_SUPPORTS_1000HZ && \ >> 2808 !SYS_SUPPORTS_1024HZ 2483 2809 2484 config CALL_THUNKS !! 2810 config HZ 2485 def_bool n !! 2811 int 2486 select CALL_PADDING !! 2812 default 24 if HZ_24 >> 2813 default 48 if HZ_48 >> 2814 default 100 if HZ_100 >> 2815 default 128 if HZ_128 >> 2816 default 250 if HZ_250 >> 2817 default 256 if HZ_256 >> 2818 default 1000 if HZ_1000 >> 2819 default 1024 if HZ_1024 >> 2820 >> 2821 config SCHED_HRTICK >> 2822 def_bool HIGH_RES_TIMERS >> 2823 >> 2824 source "kernel/Kconfig.preempt" >> 2825 >> 2826 config KEXEC >> 2827 bool "Kexec system call" >> 2828 select KEXEC_CORE >> 2829 help >> 2830 kexec is a system call that implements the ability to shutdown your >> 2831 current kernel, and to start another kernel. It is like a reboot >> 2832 but it is independent of the system firmware. And like a reboot >> 2833 you can start any kernel with it, not just Linux. >> 2834 >> 2835 The name comes from the similarity to the exec system call. >> 2836 >> 2837 It is an ongoing process to be certain the hardware in a machine >> 2838 is properly shutdown, so do not be surprised if this code does not >> 2839 initially work for you. As of this writing the exact hardware >> 2840 interface is strongly in flux, so no good recommendation can be >> 2841 made. >> 2842 >> 2843 config CRASH_DUMP >> 2844 bool "Kernel crash dumps" >> 2845 help >> 2846 Generate crash dump after being started by kexec. >> 2847 This should be normally only set in special crash dump kernels >> 2848 which are loaded in the main kernel with kexec-tools into >> 2849 a specially reserved region and then later executed after >> 2850 a crash by kdump/kexec. The crash dump kernel must be compiled >> 2851 to a memory address not used by the main kernel or firmware using >> 2852 PHYSICAL_START. 2487 2853 2488 config PREFIX_SYMBOLS !! 2854 config PHYSICAL_START 2489 def_bool y !! 2855 hex "Physical address where the kernel is loaded" 2490 depends on CALL_PADDING && !CFI_CLANG !! 2856 default "0xffffffff84000000" if 64BIT >> 2857 default "0x84000000" if 32BIT >> 2858 depends on CRASH_DUMP >> 2859 help >> 2860 This gives the CKSEG0 or KSEG0 address where the kernel is loaded. >> 2861 If you plan to use kernel for capturing the crash dump change >> 2862 this value to start of the reserved region (the "X" value as >> 2863 specified in the "crashkernel=YM@XM" command line boot parameter >> 2864 passed to the panic-ed kernel). >> 2865 >> 2866 config SECCOMP >> 2867 bool "Enable seccomp to safely compute untrusted bytecode" >> 2868 depends on PROC_FS >> 2869 default y >> 2870 help >> 2871 This kernel feature is useful for number crunching applications >> 2872 that may need to compute untrusted bytecode during their >> 2873 execution. By using pipes or other transports made available to >> 2874 the process as file descriptors supporting the read/write >> 2875 syscalls, it's possible to isolate those applications in >> 2876 their own address space using seccomp. Once seccomp is >> 2877 enabled via /proc/<pid>/seccomp, it cannot be disabled >> 2878 and the task is only allowed to execute a few safe syscalls >> 2879 defined by each seccomp mode. >> 2880 >> 2881 If unsure, say Y. Only embedded should say N here. >> 2882 >> 2883 config MIPS_O32_FP64_SUPPORT >> 2884 bool "Support for O32 binaries using 64-bit FP" >> 2885 depends on 32BIT || MIPS32_O32 >> 2886 help >> 2887 When this is enabled, the kernel will support use of 64-bit floating >> 2888 point registers with binaries using the O32 ABI along with the >> 2889 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On >> 2890 32-bit MIPS systems this support is at the cost of increasing the >> 2891 size and complexity of the compiled FPU emulator. Thus if you are >> 2892 running a MIPS32 system and know that none of your userland binaries >> 2893 will require 64-bit floating point, you may wish to reduce the size >> 2894 of your kernel & potentially improve FP emulation performance by >> 2895 saying N here. >> 2896 >> 2897 Although binutils currently supports use of this flag the details >> 2898 concerning its effect upon the O32 ABI in userland are still being >> 2899 worked on. In order to avoid userland becoming dependant upon current >> 2900 behaviour before the details have been finalised, this option should >> 2901 be considered experimental and only enabled by those working upon >> 2902 said details. 2491 2903 2492 menuconfig CPU_MITIGATIONS !! 2904 If unsure, say N. 2493 bool "Mitigations for CPU vulnerabili << 2494 default y << 2495 help << 2496 Say Y here to enable options which << 2497 vulnerabilities (usually related to << 2498 Mitigations can be disabled or rest << 2499 via the "mitigations" kernel parame << 2500 2905 2501 If you say N, all mitigations will !! 2906 config USE_OF 2502 overridden at runtime. !! 2907 bool >> 2908 select OF >> 2909 select OF_EARLY_FLATTREE >> 2910 select IRQ_DOMAIN 2503 2911 2504 Say 'Y', unless you really know wha !! 2912 config BUILTIN_DTB >> 2913 bool 2505 2914 2506 if CPU_MITIGATIONS !! 2915 choice >> 2916 prompt "Kernel appended dtb support" if USE_OF >> 2917 default MIPS_NO_APPENDED_DTB 2507 2918 2508 config MITIGATION_PAGE_TABLE_ISOLATION !! 2919 config MIPS_NO_APPENDED_DTB 2509 bool "Remove the kernel mapping in us !! 2920 bool "None" 2510 default y !! 2921 help 2511 depends on (X86_64 || X86_PAE) !! 2922 Do not enable appended dtb support. 2512 help << 2513 This feature reduces the number of << 2514 ensuring that the majority of kerne << 2515 into userspace. << 2516 2923 2517 See Documentation/arch/x86/pti.rst !! 2924 config MIPS_ELF_APPENDED_DTB >> 2925 bool "vmlinux" >> 2926 help >> 2927 With this option, the boot code will look for a device tree binary >> 2928 DTB) included in the vmlinux ELF section .appended_dtb. By default >> 2929 it is empty and the DTB can be appended using binutils command >> 2930 objcopy: >> 2931 >> 2932 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux >> 2933 >> 2934 This is meant as a backward compatiblity convenience for those >> 2935 systems with a bootloader that can't be upgraded to accommodate >> 2936 the documented boot protocol using a device tree. 2518 2937 2519 config MITIGATION_RETPOLINE !! 2938 config MIPS_RAW_APPENDED_DTB 2520 bool "Avoid speculative indirect bran !! 2939 bool "vmlinux.bin or vmlinuz.bin" 2521 select OBJTOOL if HAVE_OBJTOOL !! 2940 help 2522 default y !! 2941 With this option, the boot code will look for a device tree binary 2523 help !! 2942 DTB) appended to raw vmlinux.bin or vmlinuz.bin. 2524 Compile kernel with the retpoline c !! 2943 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 2525 kernel-to-user data leaks by avoidi !! 2944 2526 branches. Requires a compiler with !! 2945 This is meant as a backward compatibility convenience for those 2527 support for full protection. The ke !! 2946 systems with a bootloader that can't be upgraded to accommodate >> 2947 the documented boot protocol using a device tree. >> 2948 >> 2949 Beware that there is very little in terms of protection against >> 2950 this option being confused by leftover garbage in memory that might >> 2951 look like a DTB header after a reboot if no actual DTB is appended >> 2952 to vmlinux.bin. Do not leave this option active in a production kernel >> 2953 if you don't intend to always append a DTB. >> 2954 endchoice 2528 2955 2529 config MITIGATION_RETHUNK !! 2956 choice 2530 bool "Enable return-thunks" !! 2957 prompt "Kernel command line type" if !CMDLINE_OVERRIDE 2531 depends on MITIGATION_RETPOLINE && CC !! 2958 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ 2532 select OBJTOOL if HAVE_OBJTOOL !! 2959 !MIPS_MALTA && \ 2533 default y if X86_64 !! 2960 !CAVIUM_OCTEON_SOC 2534 help !! 2961 default MIPS_CMDLINE_FROM_BOOTLOADER 2535 Compile the kernel with the return- !! 2962 2536 against kernel-to-user data leaks b !! 2963 config MIPS_CMDLINE_FROM_DTB 2537 Requires a compiler with -mfunction !! 2964 depends on USE_OF 2538 support for full protection. The ke !! 2965 bool "Dtb kernel arguments if available" >> 2966 >> 2967 config MIPS_CMDLINE_DTB_EXTEND >> 2968 depends on USE_OF >> 2969 bool "Extend dtb kernel arguments with bootloader arguments" >> 2970 >> 2971 config MIPS_CMDLINE_FROM_BOOTLOADER >> 2972 bool "Bootloader kernel arguments if available" >> 2973 >> 2974 config MIPS_CMDLINE_BUILTIN_EXTEND >> 2975 depends on CMDLINE_BOOL >> 2976 bool "Extend builtin kernel arguments with bootloader arguments" >> 2977 endchoice 2539 2978 2540 config MITIGATION_UNRET_ENTRY !! 2979 endmenu 2541 bool "Enable UNRET on kernel entry" << 2542 depends on CPU_SUP_AMD && MITIGATION_ << 2543 default y << 2544 help << 2545 Compile the kernel with support for << 2546 2980 2547 config MITIGATION_CALL_DEPTH_TRACKING !! 2981 config LOCKDEP_SUPPORT 2548 bool "Mitigate RSB underflow with cal !! 2982 bool 2549 depends on CPU_SUP_INTEL && HAVE_CALL << 2550 select HAVE_DYNAMIC_FTRACE_NO_PATCHAB << 2551 select CALL_THUNKS << 2552 default y 2983 default y 2553 help << 2554 Compile the kernel with call depth << 2555 SKL Return-Speculation-Buffer (RSB) << 2556 mitigation is off by default and ne << 2557 kernel command line via the retblee << 2558 non-affected systems the overhead o << 2559 the call depth tracking is using ru << 2560 in a compiler generated padding are << 2561 increases text size by ~5%. For non << 2562 is unused. On affected SKL systems << 2563 performance gain over the IBRS miti << 2564 << 2565 config CALL_THUNKS_DEBUG << 2566 bool "Enable call thunks and call dep << 2567 depends on MITIGATION_CALL_DEPTH_TRAC << 2568 select FUNCTION_ALIGNMENT_32B << 2569 default n << 2570 help << 2571 Enable call/ret counters for imbala << 2572 a noisy dmesg about callthunks gene << 2573 trouble shooting. The debug prints << 2574 kernel command line with 'debug-cal << 2575 Only enable this when you are debug << 2576 creates a noticeable runtime overhe << 2577 2984 2578 config MITIGATION_IBPB_ENTRY !! 2985 config STACKTRACE_SUPPORT 2579 bool "Enable IBPB on kernel entry" !! 2986 bool 2580 depends on CPU_SUP_AMD && X86_64 << 2581 default y 2987 default y 2582 help << 2583 Compile the kernel with support for << 2584 2988 2585 config MITIGATION_IBRS_ENTRY !! 2989 config HAVE_LATENCYTOP_SUPPORT 2586 bool "Enable IBRS on kernel entry" !! 2990 bool 2587 depends on CPU_SUP_INTEL && X86_64 << 2588 default y 2991 default y 2589 help << 2590 Compile the kernel with support for << 2591 This mitigates both spectre_v2 and << 2592 performance. << 2593 2992 2594 config MITIGATION_SRSO !! 2993 config PGTABLE_LEVELS 2595 bool "Mitigate speculative RAS overfl !! 2994 int 2596 depends on CPU_SUP_AMD && X86_64 && M !! 2995 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 2597 default y !! 2996 default 3 if 64BIT && !PAGE_SIZE_64KB 2598 help !! 2997 default 2 2599 Enable the SRSO mitigation needed o << 2600 2998 2601 config MITIGATION_SLS !! 2999 source "init/Kconfig" 2602 bool "Mitigate Straight-Line-Speculat << 2603 depends on CC_HAS_SLS && X86_64 << 2604 select OBJTOOL if HAVE_OBJTOOL << 2605 default n << 2606 help << 2607 Compile the kernel with straight-li << 2608 against straight line speculation. << 2609 larger. << 2610 3000 2611 config MITIGATION_GDS !! 3001 source "kernel/Kconfig.freezer" 2612 bool "Mitigate Gather Data Sampling" << 2613 depends on CPU_SUP_INTEL << 2614 default y << 2615 help << 2616 Enable mitigation for Gather Data S << 2617 vulnerability which allows unprivil << 2618 which was previously stored in vect << 2619 instructions to infer the stale vec << 2620 3002 2621 config MITIGATION_RFDS !! 3003 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 2622 bool "RFDS Mitigation" << 2623 depends on CPU_SUP_INTEL << 2624 default y << 2625 help << 2626 Enable mitigation for Register File << 2627 RFDS is a hardware vulnerability wh << 2628 allows unprivileged speculative acc << 2629 stored in floating point, vector an << 2630 See also <file:Documentation/admin- << 2631 3004 2632 config MITIGATION_SPECTRE_BHI !! 3005 config HW_HAS_EISA 2633 bool "Mitigate Spectre-BHB (Branch Hi !! 3006 bool 2634 depends on CPU_SUP_INTEL !! 3007 config HW_HAS_PCI 2635 default y !! 3008 bool 2636 help << 2637 Enable BHI mitigations. BHI attacks << 2638 where the branch history buffer is << 2639 indirect branches. << 2640 See <file:Documentation/admin-guide << 2641 3009 2642 config MITIGATION_MDS !! 3010 config PCI 2643 bool "Mitigate Microarchitectural Dat !! 3011 bool "Support for PCI controller" 2644 depends on CPU_SUP_INTEL !! 3012 depends on HW_HAS_PCI 2645 default y !! 3013 select PCI_DOMAINS 2646 help !! 3014 help 2647 Enable mitigation for Microarchitec !! 3015 Find out whether you have a PCI motherboard. PCI is the name of a 2648 a hardware vulnerability which allo !! 3016 bus system, i.e. the way the CPU talks to the other stuff inside 2649 to data which is available in vario !! 3017 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 2650 See also <file:Documentation/admin- !! 3018 say Y, otherwise N. >> 3019 >> 3020 config HT_PCI >> 3021 bool "Support for HT-linked PCI" >> 3022 default y >> 3023 depends on CPU_LOONGSON3 >> 3024 select PCI >> 3025 select PCI_DOMAINS >> 3026 help >> 3027 Loongson family machines use Hyper-Transport bus for inter-core >> 3028 connection and device connection. The PCI bus is a subordinate >> 3029 linked at HT. Choose Y for Loongson-3 based machines. 2651 3030 2652 config MITIGATION_TAA !! 3031 config PCI_DOMAINS 2653 bool "Mitigate TSX Asynchronous Abort !! 3032 bool 2654 depends on CPU_SUP_INTEL << 2655 default y << 2656 help << 2657 Enable mitigation for TSX Asynchron << 2658 vulnerability that allows unprivile << 2659 which is available in various CPU i << 2660 asynchronous aborts within an Intel << 2661 See also <file:Documentation/admin- << 2662 3033 2663 config MITIGATION_MMIO_STALE_DATA !! 3034 config PCI_DOMAINS_GENERIC 2664 bool "Mitigate MMIO Stale Data hardwa !! 3035 bool 2665 depends on CPU_SUP_INTEL << 2666 default y << 2667 help << 2668 Enable mitigation for MMIO Stale Da << 2669 Stale Data Vulnerabilities are a cl << 2670 vulnerabilities that can expose dat << 2671 attacker to have access to MMIO. << 2672 See also << 2673 <file:Documentation/admin-guide/hw- << 2674 3036 2675 config MITIGATION_L1TF !! 3037 config PCI_DRIVERS_GENERIC 2676 bool "Mitigate L1 Terminal Fault (L1T !! 3038 select PCI_DOMAINS_GENERIC if PCI_DOMAINS 2677 depends on CPU_SUP_INTEL !! 3039 bool 2678 default y << 2679 help << 2680 Mitigate L1 Terminal Fault (L1TF) h << 2681 hardware vulnerability which allows << 2682 available in the Level 1 Data Cache << 2683 See <file:Documentation/admin-guide << 2684 3040 2685 config MITIGATION_RETBLEED !! 3041 config PCI_DRIVERS_LEGACY 2686 bool "Mitigate RETBleed hardware bug" !! 3042 def_bool !PCI_DRIVERS_GENERIC 2687 depends on (CPU_SUP_INTEL && MITIGATI !! 3043 select NO_GENERIC_PCI_IOPORT_MAP 2688 default y << 2689 help << 2690 Enable mitigation for RETBleed (Arb << 2691 with Return Instructions) vulnerabi << 2692 execution attack which takes advant << 2693 in many modern microprocessors, sim << 2694 unprivileged attacker can use these << 2695 memory security restrictions to gai << 2696 that would otherwise be inaccessibl << 2697 3044 2698 config MITIGATION_SPECTRE_V1 !! 3045 source "drivers/pci/Kconfig" 2699 bool "Mitigate SPECTRE V1 hardware bu << 2700 default y << 2701 help << 2702 Enable mitigation for Spectre V1 (B << 2703 class of side channel attacks that << 2704 execution that bypasses conditional << 2705 memory access bounds check. << 2706 See also <file:Documentation/admin- << 2707 3046 2708 config MITIGATION_SPECTRE_V2 !! 3047 # 2709 bool "Mitigate SPECTRE V2 hardware bu !! 3048 # ISA support is now enabled via select. Too many systems still have the one 2710 default y !! 3049 # or other ISA chip on the board that users don't know about so don't expect 2711 help !! 3050 # users to choose the right thing ... 2712 Enable mitigation for Spectre V2 (B !! 3051 # 2713 V2 is a class of side channel attac !! 3052 config ISA 2714 indirect branch predictors inside t !! 3053 bool 2715 attacks, the attacker can steer spe << 2716 victim to gadget code by poisoning << 2717 used for predicting indirect branch << 2718 See also <file:Documentation/admin- << 2719 3054 2720 config MITIGATION_SRBDS !! 3055 config EISA 2721 bool "Mitigate Special Register Buffe !! 3056 bool "EISA support" 2722 depends on CPU_SUP_INTEL !! 3057 depends on HW_HAS_EISA 2723 default y !! 3058 select ISA 2724 help !! 3059 select GENERIC_ISA_DMA 2725 Enable mitigation for Special Regis !! 3060 ---help--- 2726 SRBDS is a hardware vulnerability t !! 3061 The Extended Industry Standard Architecture (EISA) bus was 2727 Sampling (MDS) techniques to infer !! 3062 developed as an open alternative to the IBM MicroChannel bus. 2728 register accesses. An unprivileged !! 3063 2729 from RDRAND and RDSEED executed on !! 3064 The EISA bus provided some of the features of the IBM MicroChannel 2730 using MDS techniques. !! 3065 bus while maintaining backward compatibility with cards made for 2731 See also !! 3066 the older ISA bus. The EISA bus saw limited use between 1988 and 2732 <file:Documentation/admin-guide/hw- !! 3067 1995 when it was made obsolete by the PCI bus. >> 3068 >> 3069 Say Y here if you are building a kernel for an EISA-based machine. >> 3070 >> 3071 Otherwise, say N. >> 3072 >> 3073 source "drivers/eisa/Kconfig" >> 3074 >> 3075 config TC >> 3076 bool "TURBOchannel support" >> 3077 depends on MACH_DECSTATION >> 3078 help >> 3079 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS >> 3080 processors. TURBOchannel programming specifications are available >> 3081 at: >> 3082 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> >> 3083 and: >> 3084 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> >> 3085 Linux driver support status is documented at: >> 3086 <http://www.linux-mips.org/wiki/DECstation> 2733 3087 2734 config MITIGATION_SSB !! 3088 config MMU 2735 bool "Mitigate Speculative Store Bypa !! 3089 bool 2736 default y 3090 default y 2737 help << 2738 Enable mitigation for Speculative S << 2739 hardware security vulnerability and << 2740 of speculative execution in a simil << 2741 security vulnerabilities. << 2742 << 2743 endif << 2744 << 2745 config ARCH_HAS_ADD_PAGES << 2746 def_bool y << 2747 depends on ARCH_ENABLE_MEMORY_HOTPLUG << 2748 << 2749 menu "Power management and ACPI options" << 2750 3091 2751 config ARCH_HIBERNATION_HEADER !! 3092 config ARCH_MMAP_RND_BITS_MIN 2752 def_bool y !! 3093 default 12 if 64BIT 2753 depends on HIBERNATION !! 3094 default 8 2754 3095 2755 source "kernel/power/Kconfig" !! 3096 config ARCH_MMAP_RND_BITS_MAX >> 3097 default 18 if 64BIT >> 3098 default 15 2756 3099 2757 source "drivers/acpi/Kconfig" !! 3100 config ARCH_MMAP_RND_COMPAT_BITS_MIN >> 3101 default 8 2758 3102 2759 config X86_APM_BOOT !! 3103 config ARCH_MMAP_RND_COMPAT_BITS_MAX 2760 def_bool y !! 3104 default 15 2761 depends on APM << 2762 3105 2763 menuconfig APM !! 3106 config I8253 2764 tristate "APM (Advanced Power Managem !! 3107 bool 2765 depends on X86_32 && PM_SLEEP !! 3108 select CLKSRC_I8253 2766 help !! 3109 select CLKEVT_I8253 2767 APM is a BIOS specification for sav !! 3110 select MIPS_EXTERNAL_TIMER 2768 techniques. This is mostly useful f << 2769 APM compliant BIOSes. If you say Y << 2770 reset after a RESUME operation, the << 2771 battery status information, and use << 2772 notification of APM "events" (e.g. << 2773 << 2774 If you select "Y" here, you can dis << 2775 BIOS by passing the "apm=off" optio << 2776 << 2777 Note that the APM support is almost << 2778 machines with more than one CPU. << 2779 << 2780 In order to use APM, you will need << 2781 and more information, read <file:Do << 2782 and the Battery Powered Linux mini- << 2783 <http://www.tldp.org/docs.html#howt << 2784 3111 2785 This driver does not spin down disk !! 3112 config ZONE_DMA 2786 manpage ("man 8 hdparm") for that), !! 3113 bool 2787 VESA-compliant "green" monitors. << 2788 << 2789 This driver does not support the TI << 2790 486/DX4/75 because they don't have << 2791 desktop machines also don't have co << 2792 may cause those machines to panic d << 2793 << 2794 Generally, if you don't have a batt << 2795 much point in using this driver and << 2796 random kernel OOPSes or reboots tha << 2797 anything, try disabling/enabling th << 2798 APM in your BIOS). << 2799 << 2800 Some other things you should try wh << 2801 "weird" problems: << 2802 << 2803 1) make sure that you have enough s << 2804 enabled. << 2805 2) pass the "idle=poll" option to t << 2806 3) switch on floating point emulati << 2807 the "no387" option to the kernel << 2808 4) pass the "floppy=nodma" option t << 2809 5) pass the "mem=4M" option to the << 2810 all but the first 4 MB of RAM) << 2811 6) make sure that the CPU is not ov << 2812 7) read the sig11 FAQ at <http://ww << 2813 8) disable the cache from your BIOS << 2814 9) install a fan for the video card << 2815 10) install a better fan for the CP << 2816 11) exchange RAM chips << 2817 12) exchange the motherboard. << 2818 << 2819 To compile this driver as a module, << 2820 module will be called apm. << 2821 << 2822 if APM << 2823 << 2824 config APM_IGNORE_USER_SUSPEND << 2825 bool "Ignore USER SUSPEND" << 2826 help << 2827 This option will ignore USER SUSPEN << 2828 compliant APM BIOS, you want to say << 2829 series notebooks, it is necessary t << 2830 << 2831 config APM_DO_ENABLE << 2832 bool "Enable PM at boot time" << 2833 help << 2834 Enable APM features at boot time. F << 2835 specification: "When disabled, the << 2836 power manage devices, enter the Sta << 2837 State, or take power saving steps i << 2838 This driver will make CPU Idle call << 2839 feature is turned off -- see "Do CP << 2840 should always save battery power, b << 2841 will be dependent on your BIOS impl << 2842 this option off if your computer ha << 2843 support, or if it beeps continuousl << 2844 this off if you have a NEC UltraLit << 2845 T400CDT. This is off by default sin << 2846 this feature. << 2847 << 2848 config APM_CPU_IDLE << 2849 depends on CPU_IDLE << 2850 bool "Make CPU Idle calls when idle" << 2851 help << 2852 Enable calls to APM CPU Idle/CPU Bu << 2853 On some machines, this can activate << 2854 a slowed CPU clock rate, when the m << 2855 are made after the idle loop has ru << 2856 333 mS). On some machines, this wil << 2857 whenever the CPU becomes idle. (On << 2858 this option does nothing.) << 2859 << 2860 config APM_DISPLAY_BLANK << 2861 bool "Enable console blanking using A << 2862 help << 2863 Enable console blanking using the A << 2864 turn off the LCD backlight when the << 2865 virtual console blanks the screen. << 2866 the virtual console screen blanker, << 2867 when using the X Window system. Thi << 2868 do with your VESA-compliant power-s << 2869 option doesn't work for all laptops << 2870 backlight at all, or it might print << 2871 especially if you are using gpm. << 2872 << 2873 config APM_ALLOW_INTS << 2874 bool "Allow interrupts during APM BIO << 2875 help << 2876 Normally we disable external interr << 2877 the APM BIOS as a measure to lessen << 2878 BIOS implementation. The BIOS shou << 2879 needs to. Unfortunately, some BIOS << 2880 many of the newer IBM Thinkpads. I << 2881 suspend, try setting this to Y. Ot << 2882 3114 2883 endif # APM !! 3115 config ZONE_DMA32 >> 3116 bool 2884 3117 2885 source "drivers/cpufreq/Kconfig" !! 3118 source "drivers/pcmcia/Kconfig" 2886 3119 2887 source "drivers/cpuidle/Kconfig" !! 3120 config RAPIDIO >> 3121 tristate "RapidIO support" >> 3122 depends on PCI >> 3123 default n >> 3124 help >> 3125 If you say Y here, the kernel will include drivers and >> 3126 infrastructure code to support RapidIO interconnect devices. 2888 3127 2889 source "drivers/idle/Kconfig" !! 3128 source "drivers/rapidio/Kconfig" 2890 3129 2891 endmenu 3130 endmenu 2892 3131 2893 menu "Bus options (PCI etc.)" !! 3132 menu "Executable file formats" 2894 << 2895 choice << 2896 prompt "PCI access mode" << 2897 depends on X86_32 && PCI << 2898 default PCI_GOANY << 2899 help << 2900 On PCI systems, the BIOS can be use << 2901 determine their configuration. Howe << 2902 have BIOS bugs and may crash if thi << 2903 PCI-based systems don't have any BI << 2904 detect the PCI hardware directly wi << 2905 << 2906 With this option, you can specify h << 2907 PCI devices. If you choose "BIOS", << 2908 if you choose "Direct", the BIOS wo << 2909 choose "MMConfig", then PCI Express << 2910 If you choose "Any", the kernel wil << 2911 direct access method and falls back << 2912 work. If unsure, go with the defaul << 2913 << 2914 config PCI_GOBIOS << 2915 bool "BIOS" << 2916 << 2917 config PCI_GOMMCONFIG << 2918 bool "MMConfig" << 2919 << 2920 config PCI_GODIRECT << 2921 bool "Direct" << 2922 << 2923 config PCI_GOOLPC << 2924 bool "OLPC XO-1" << 2925 depends on OLPC << 2926 << 2927 config PCI_GOANY << 2928 bool "Any" << 2929 3133 2930 endchoice !! 3134 source "fs/Kconfig.binfmt" 2931 3135 2932 config PCI_BIOS !! 3136 config TRAD_SIGNALS 2933 def_bool y !! 3137 bool 2934 depends on X86_32 && PCI && (PCI_GOBI << 2935 3138 2936 # x86-64 doesn't support PCI BIOS access from !! 3139 config MIPS32_COMPAT 2937 config PCI_DIRECT !! 3140 bool 2938 def_bool y << 2939 depends on PCI && (X86_64 || (PCI_GOD << 2940 3141 2941 config PCI_MMCONFIG !! 3142 config COMPAT 2942 bool "Support mmconfig PCI config spa !! 3143 bool 2943 default y << 2944 depends on PCI && (ACPI || JAILHOUSE_ << 2945 depends on X86_64 || (PCI_GOANY || PC << 2946 3144 2947 config PCI_OLPC !! 3145 config SYSVIPC_COMPAT 2948 def_bool y !! 3146 bool 2949 depends on PCI && OLPC && (PCI_GOOLPC << 2950 3147 2951 config PCI_XEN !! 3148 config MIPS32_O32 2952 def_bool y !! 3149 bool "Kernel support for o32 binaries" 2953 depends on PCI && XEN !! 3150 depends on 64BIT >> 3151 select ARCH_WANT_OLD_COMPAT_IPC >> 3152 select COMPAT >> 3153 select MIPS32_COMPAT >> 3154 select SYSVIPC_COMPAT if SYSVIPC >> 3155 help >> 3156 Select this option if you want to run o32 binaries. These are pure >> 3157 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of >> 3158 existing binaries are in this format. 2954 3159 2955 config MMCONF_FAM10H !! 3160 If unsure, say Y. 2956 def_bool y << 2957 depends on X86_64 && PCI_MMCONFIG && << 2958 3161 2959 config PCI_CNB20LE_QUIRK !! 3162 config MIPS32_N32 2960 bool "Read CNB20LE Host Bridge Window !! 3163 bool "Kernel support for n32 binaries" 2961 depends on PCI !! 3164 depends on 64BIT 2962 help !! 3165 select COMPAT 2963 Read the PCI windows out of the CNB !! 3166 select MIPS32_COMPAT 2964 PCI hotplug to work on systems with !! 3167 select SYSVIPC_COMPAT if SYSVIPC 2965 not have ACPI. !! 3168 help 2966 !! 3169 Select this option if you want to run n32 binaries. These are 2967 There's no public spec for this chi !! 3170 64-bit binaries using 32-bit quantities for addressing and certain 2968 is known to be incomplete. !! 3171 data that would normally be 64-bit. They are used in special 2969 !! 3172 cases. 2970 You should say N unless you know yo << 2971 << 2972 config ISA_BUS << 2973 bool "ISA bus support on modern syste << 2974 help << 2975 Expose ISA bus device drivers and o << 2976 configuration. Enable this option i << 2977 bus. ISA is an older system, displa << 2978 architectures -- if your target mac << 2979 not have an ISA bus. << 2980 3173 2981 If unsure, say N. 3174 If unsure, say N. 2982 3175 2983 # x86_64 have no ISA slots, but can have ISA- !! 3176 config BINFMT_ELF32 2984 config ISA_DMA_API !! 3177 bool 2985 bool "ISA-style DMA support" if (X86_ !! 3178 default y if MIPS32_O32 || MIPS32_N32 2986 default y !! 3179 select ELFCORE 2987 help << 2988 Enables ISA-style DMA support for d << 2989 If unsure, say Y. << 2990 3180 2991 if X86_32 !! 3181 endmenu 2992 3182 2993 config ISA !! 3183 menu "Power management options" 2994 bool "ISA support" << 2995 help << 2996 Find out whether you have ISA slots << 2997 name of a bus system, i.e. the way << 2998 inside your box. Other bus systems << 2999 (MCA) or VESA. ISA is an older sys << 3000 newer boards don't support it. If << 3001 << 3002 config SCx200 << 3003 tristate "NatSemi SCx200 support" << 3004 help << 3005 This provides basic support for Nat << 3006 (now AMD's) Geode processors. The << 3007 PCI-IDs of several on-chip devices, << 3008 for other scx200_* drivers. << 3009 << 3010 If compiled as a module, the driver << 3011 << 3012 config SCx200HR_TIMER << 3013 tristate "NatSemi SCx200 27MHz High-R << 3014 depends on SCx200 << 3015 default y << 3016 help << 3017 This driver provides a clocksource << 3018 27MHz high-resolution timer. Its a << 3019 NSC Geode SC-1100's buggy TSC, whic << 3020 processor goes idle (as is done by << 3021 other workaround is idle=poll boot << 3022 << 3023 config OLPC << 3024 bool "One Laptop Per Child support" << 3025 depends on !X86_PAE << 3026 select GPIOLIB << 3027 select OF << 3028 select OF_PROMTREE << 3029 select IRQ_DOMAIN << 3030 select OLPC_EC << 3031 help << 3032 Add support for detecting the uniqu << 3033 XO hardware. << 3034 3184 3035 config OLPC_XO1_PM !! 3185 config ARCH_HIBERNATION_POSSIBLE 3036 bool "OLPC XO-1 Power Management" !! 3186 def_bool y 3037 depends on OLPC && MFD_CS5535=y && PM !! 3187 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3038 help << 3039 Add support for poweroff and suspen << 3040 3188 3041 config OLPC_XO1_RTC !! 3189 config ARCH_SUSPEND_POSSIBLE 3042 bool "OLPC XO-1 Real Time Clock" !! 3190 def_bool y 3043 depends on OLPC_XO1_PM && RTC_DRV_CMO !! 3191 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3044 help << 3045 Add support for the XO-1 real time << 3046 programmable wakeup source. << 3047 3192 3048 config OLPC_XO1_SCI !! 3193 source "kernel/power/Kconfig" 3049 bool "OLPC XO-1 SCI extras" << 3050 depends on OLPC && OLPC_XO1_PM && GPI << 3051 depends on INPUT=y << 3052 select POWER_SUPPLY << 3053 help << 3054 Add support for SCI-based features << 3055 - EC-driven system wakeups << 3056 - Power button << 3057 - Ebook switch << 3058 - Lid switch << 3059 - AC adapter status updates << 3060 - Battery status updates << 3061 3194 3062 config OLPC_XO15_SCI !! 3195 endmenu 3063 bool "OLPC XO-1.5 SCI extras" << 3064 depends on OLPC && ACPI << 3065 select POWER_SUPPLY << 3066 help << 3067 Add support for SCI-based features << 3068 - EC-driven system wakeups << 3069 - AC adapter status updates << 3070 - Battery status updates << 3071 3196 3072 config GEODE_COMMON !! 3197 config MIPS_EXTERNAL_TIMER 3073 bool 3198 bool 3074 3199 3075 config ALIX !! 3200 menu "CPU Power Management" 3076 bool "PCEngines ALIX System Support ( << 3077 select GPIOLIB << 3078 select GEODE_COMMON << 3079 help << 3080 This option enables system support << 3081 At present this just sets up LEDs f << 3082 ALIX2/3/6 boards. However, other s << 3083 get added here. << 3084 << 3085 Note: You must still enable the dri << 3086 (GPIO_CS5535 & LEDS_GPIO) to actual << 3087 3201 3088 Note: You have to set alix.force=1 !! 3202 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 3089 !! 3203 source "drivers/cpufreq/Kconfig" 3090 config NET5501 !! 3204 endif 3091 bool "Soekris Engineering net5501 Sys << 3092 select GPIOLIB << 3093 select GEODE_COMMON << 3094 help << 3095 This option enables system support << 3096 << 3097 config GEOS << 3098 bool "Traverse Technologies GEOS Syst << 3099 select GPIOLIB << 3100 select GEODE_COMMON << 3101 depends on DMI << 3102 help << 3103 This option enables system support << 3104 << 3105 config TS5500 << 3106 bool "Technologic Systems TS-5500 pla << 3107 depends on MELAN << 3108 select CHECK_SIGNATURE << 3109 select NEW_LEDS << 3110 select LEDS_CLASS << 3111 help << 3112 This option enables system support << 3113 << 3114 endif # X86_32 << 3115 3205 3116 config AMD_NB !! 3206 source "drivers/cpuidle/Kconfig" 3117 def_bool y << 3118 depends on CPU_SUP_AMD && PCI << 3119 3207 3120 endmenu 3208 endmenu 3121 3209 3122 menu "Binary Emulations" !! 3210 source "net/Kconfig" 3123 3211 3124 config IA32_EMULATION !! 3212 source "drivers/Kconfig" 3125 bool "IA32 Emulation" << 3126 depends on X86_64 << 3127 select ARCH_WANT_OLD_COMPAT_IPC << 3128 select BINFMT_ELF << 3129 select COMPAT_OLD_SIGACTION << 3130 help << 3131 Include code to run legacy 32-bit p << 3132 64-bit kernel. You should likely tu << 3133 100% sure that you don't have any 3 << 3134 3213 3135 config IA32_EMULATION_DEFAULT_DISABLED !! 3214 source "drivers/firmware/Kconfig" 3136 bool "IA32 emulation disabled by defa << 3137 default n << 3138 depends on IA32_EMULATION << 3139 help << 3140 Make IA32 emulation disabled by def << 3141 processes and access to 32-bit sysc << 3142 default value. << 3143 << 3144 config X86_X32_ABI << 3145 bool "x32 ABI for 64-bit mode" << 3146 depends on X86_64 << 3147 # llvm-objcopy does not convert x86_6 << 3148 # compressed debug sections to x86_x3 << 3149 # https://github.com/ClangBuiltLinux/ << 3150 # https://github.com/ClangBuiltLinux/ << 3151 depends on $(success,$(OBJCOPY) --ver << 3152 help << 3153 Include code to run binaries for th << 3154 for 64-bit processors. An x32 proc << 3155 full 64-bit register file and wide << 3156 pointers at 32 bits for smaller mem << 3157 3215 3158 config COMPAT_32 !! 3216 source "fs/Kconfig" 3159 def_bool y << 3160 depends on IA32_EMULATION || X86_32 << 3161 select HAVE_UID16 << 3162 select OLD_SIGSUSPEND3 << 3163 3217 3164 config COMPAT !! 3218 source "arch/mips/Kconfig.debug" 3165 def_bool y << 3166 depends on IA32_EMULATION || X86_X32_ << 3167 << 3168 config COMPAT_FOR_U64_ALIGNMENT << 3169 def_bool y << 3170 depends on COMPAT << 3171 3219 3172 endmenu !! 3220 source "security/Kconfig" 3173 3221 3174 config HAVE_ATOMIC_IOMAP !! 3222 source "crypto/Kconfig" 3175 def_bool y << 3176 depends on X86_32 << 3177 3223 3178 source "arch/x86/kvm/Kconfig" !! 3224 source "lib/Kconfig" 3179 3225 3180 source "arch/x86/Kconfig.assembler" !! 3226 source "arch/mips/kvm/Kconfig"
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.