1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 # Select 32 or 64 bit !! 2 config MIPS
3 config 64BIT !! 3 bool
4 bool "64-bit kernel" if "$(ARCH)" = "x !! 4 default y
5 default "$(ARCH)" != "i386" !! 5 select ARCH_BINFMT_ELF_STATE
6 help !! 6 select ARCH_CLOCKSOURCE_DATA
7 Say yes to build a 64-bit kernel - f !! 7 select ARCH_DISCARD_MEMBLOCK
8 Say no to build a 32-bit kernel - fo <<
9 <<
10 config X86_32 <<
11 def_bool y <<
12 depends on !64BIT <<
13 # Options that are inherently 32-bit k <<
14 select ARCH_WANT_IPC_PARSE_VERSION <<
15 select CLKSRC_I8253 <<
16 select CLONE_BACKWARDS <<
17 select GENERIC_VDSO_32 <<
18 select HAVE_DEBUG_STACKOVERFLOW <<
19 select KMAP_LOCAL <<
20 select MODULES_USE_ELF_REL <<
21 select OLD_SIGACTION <<
22 select ARCH_SPLIT_ARG64 <<
23 <<
24 config X86_64 <<
25 def_bool y <<
26 depends on 64BIT <<
27 # Options that are inherently 64-bit k <<
28 select ARCH_HAS_GIGANTIC_PAGE <<
29 select ARCH_SUPPORTS_INT128 if CC_HAS_ <<
30 select ARCH_SUPPORTS_PER_VMA_LOCK <<
31 select ARCH_SUPPORTS_HUGE_PFNMAP if TR <<
32 select HAVE_ARCH_SOFT_DIRTY <<
33 select MODULES_USE_ELF_RELA <<
34 select NEED_DMA_MAP_STATE <<
35 select SWIOTLB <<
36 select ARCH_HAS_ELFCORE_COMPAT <<
37 select ZONE_DMA32 <<
38 select EXECMEM if DYNAMIC_FTRACE <<
39 <<
40 config FORCE_DYNAMIC_FTRACE <<
41 def_bool y <<
42 depends on X86_32 <<
43 depends on FUNCTION_TRACER <<
44 select DYNAMIC_FTRACE <<
45 help <<
46 We keep the static function tracing <<
47 in order to test the non static func <<
48 generic code, as other architectures <<
49 only need to keep it around for x86_ <<
50 for x86_32. For x86_32, force DYNAMI <<
51 # <<
52 # Arch settings <<
53 # <<
54 # ( Note that options that are marked 'if X86_ <<
55 # ported to 32-bit as well. ) <<
56 # <<
57 config X86 <<
58 def_bool y <<
59 # <<
60 # Note: keep this list sorted alphabet <<
61 # <<
62 select ACPI_LEGACY_TABLES_LOOKUP <<
63 select ACPI_SYSTEM_POWER_STATES_SUPPOR <<
64 select ACPI_HOTPLUG_CPU <<
65 select ARCH_32BIT_OFF_T <<
66 select ARCH_CLOCKSOURCE_INIT <<
67 select ARCH_CONFIGURES_CPU_MITIGATIONS <<
68 select ARCH_CORRECT_STACKTRACE_ON_KRET <<
69 select ARCH_ENABLE_HUGEPAGE_MIGRATION <<
70 select ARCH_ENABLE_MEMORY_HOTPLUG if X <<
71 select ARCH_ENABLE_MEMORY_HOTREMOVE if <<
72 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if <<
73 select ARCH_ENABLE_THP_MIGRATION if X8 <<
74 select ARCH_HAS_ACPI_TABLE_UPGRADE <<
75 select ARCH_HAS_CACHE_LINE_SIZE <<
76 select ARCH_HAS_CPU_CACHE_INVALIDATE_M <<
77 select ARCH_HAS_CPU_FINALIZE_INIT <<
78 select ARCH_HAS_CPU_PASID <<
79 select ARCH_HAS_CURRENT_STACK_POINTER <<
80 select ARCH_HAS_DEBUG_VIRTUAL <<
81 select ARCH_HAS_DEBUG_VM_PGTABLE <<
82 select ARCH_HAS_DEVMEM_IS_ALLOWED <<
83 select ARCH_HAS_DMA_OPS <<
84 select ARCH_HAS_EARLY_DEBUG <<
85 select ARCH_HAS_ELF_RANDOMIZE 8 select ARCH_HAS_ELF_RANDOMIZE
86 select ARCH_HAS_FAST_MULTIPLIER !! 9 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
87 select ARCH_HAS_FORTIFY_SOURCE !! 10 select ARCH_SUPPORTS_UPROBES
88 select ARCH_HAS_GCOV_PROFILE_ALL <<
89 select ARCH_HAS_KCOV <<
90 select ARCH_HAS_KERNEL_FPU_SUPPORT <<
91 select ARCH_HAS_MEM_ENCRYPT <<
92 select ARCH_HAS_MEMBARRIER_SYNC_CORE <<
93 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS <<
94 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
95 select ARCH_HAS_PMEM_API <<
96 select ARCH_HAS_PTE_DEVMAP <<
97 select ARCH_HAS_PTE_SPECIAL <<
98 select ARCH_HAS_HW_PTE_YOUNG <<
99 select ARCH_HAS_NONLEAF_PMD_YOUNG <<
100 select ARCH_HAS_UACCESS_FLUSHCACHE <<
101 select ARCH_HAS_COPY_MC <<
102 select ARCH_HAS_SET_MEMORY <<
103 select ARCH_HAS_SET_DIRECT_MAP <<
104 select ARCH_HAS_STRICT_KERNEL_RWX <<
105 select ARCH_HAS_STRICT_MODULE_RWX <<
106 select ARCH_HAS_SYNC_CORE_BEFORE_USERM <<
107 select ARCH_HAS_SYSCALL_WRAPPER <<
108 select ARCH_HAS_UBSAN <<
109 select ARCH_HAS_DEBUG_WX <<
110 select ARCH_HAS_ZONE_DMA_SET if EXPERT <<
111 select ARCH_HAVE_NMI_SAFE_CMPXCHG <<
112 select ARCH_HAVE_EXTRA_ELF_NOTES <<
113 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL <<
114 select ARCH_MIGHT_HAVE_ACPI_PDC <<
115 select ARCH_MIGHT_HAVE_PC_PARPORT <<
116 select ARCH_MIGHT_HAVE_PC_SERIO <<
117 select ARCH_STACKWALK <<
118 select ARCH_SUPPORTS_ACPI <<
119 select ARCH_SUPPORTS_ATOMIC_RMW <<
120 select ARCH_SUPPORTS_DEBUG_PAGEALLOC <<
121 select ARCH_SUPPORTS_PAGE_TABLE_CHECK <<
122 select ARCH_SUPPORTS_NUMA_BALANCING <<
123 select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_ <<
124 select ARCH_SUPPORTS_CFI_CLANG <<
125 select ARCH_USES_CFI_TRAPS <<
126 select ARCH_SUPPORTS_LTO_CLANG <<
127 select ARCH_SUPPORTS_LTO_CLANG_THIN <<
128 select ARCH_SUPPORTS_RT <<
129 select ARCH_USE_BUILTIN_BSWAP 11 select ARCH_USE_BUILTIN_BSWAP
130 select ARCH_USE_CMPXCHG_LOCKREF !! 12 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
131 select ARCH_USE_MEMTEST <<
132 select ARCH_USE_QUEUED_RWLOCKS 13 select ARCH_USE_QUEUED_RWLOCKS
133 select ARCH_USE_QUEUED_SPINLOCKS 14 select ARCH_USE_QUEUED_SPINLOCKS
134 select ARCH_USE_SYM_ANNOTATIONS !! 15 select ARCH_WANT_IPC_PARSE_VERSION
135 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU !! 16 select BUILDTIME_EXTABLE_SORT
136 select ARCH_WANT_DEFAULT_BPF_JIT !! 17 select CLONE_BACKWARDS
137 select ARCH_WANTS_DYNAMIC_TASK_STRUCT !! 18 select CPU_PM if CPU_IDLE
138 select ARCH_WANTS_NO_INSTR !! 19 select DMA_DIRECT_OPS
139 select ARCH_WANT_GENERAL_HUGETLB !! 20 select GENERIC_ATOMIC64 if !64BIT
140 select ARCH_WANT_HUGE_PMD_SHARE !! 21 select GENERIC_CLOCKEVENTS
141 select ARCH_WANT_LD_ORPHAN_WARN <<
142 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
143 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM <<
144 select ARCH_WANTS_THP_SWAP <<
145 select ARCH_HAS_PARANOID_L1D_FLUSH <<
146 select BUILDTIME_TABLE_SORT <<
147 select CLKEVT_I8253 <<
148 select CLOCKSOURCE_VALIDATE_LAST_CYCLE <<
149 select CLOCKSOURCE_WATCHDOG <<
150 # Word-size accesses may read uninitia <<
151 # in strings and cause false KMSAN rep <<
152 select DCACHE_WORD_ACCESS <<
153 select DYNAMIC_SIGFRAME <<
154 select EDAC_ATOMIC_SCRUB <<
155 select EDAC_SUPPORT <<
156 select GENERIC_CLOCKEVENTS_BROADCAST <<
157 select GENERIC_CLOCKEVENTS_BROADCAST_I <<
158 select GENERIC_CLOCKEVENTS_MIN_ADJUST <<
159 select GENERIC_CMOS_UPDATE 22 select GENERIC_CMOS_UPDATE
160 select GENERIC_CPU_AUTOPROBE 23 select GENERIC_CPU_AUTOPROBE
161 select GENERIC_CPU_DEVICES <<
162 select GENERIC_CPU_VULNERABILITIES <<
163 select GENERIC_EARLY_IOREMAP <<
164 select GENERIC_ENTRY <<
165 select GENERIC_IOMAP 24 select GENERIC_IOMAP
166 select GENERIC_IRQ_EFFECTIVE_AFF_MASK <<
167 select GENERIC_IRQ_MATRIX_ALLOCATOR <<
168 select GENERIC_IRQ_MIGRATION <<
169 select GENERIC_IRQ_PROBE 25 select GENERIC_IRQ_PROBE
170 select GENERIC_IRQ_RESERVATION_MODE <<
171 select GENERIC_IRQ_SHOW 26 select GENERIC_IRQ_SHOW
172 select GENERIC_PENDING_IRQ !! 27 select GENERIC_LIB_ASHLDI3
173 select GENERIC_PTDUMP !! 28 select GENERIC_LIB_ASHRDI3
>> 29 select GENERIC_LIB_CMPDI2
>> 30 select GENERIC_LIB_LSHRDI3
>> 31 select GENERIC_LIB_UCMPDI2
>> 32 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
174 select GENERIC_SMP_IDLE_THREAD 33 select GENERIC_SMP_IDLE_THREAD
175 select GENERIC_TIME_VSYSCALL 34 select GENERIC_TIME_VSYSCALL
176 select GENERIC_GETTIMEOFDAY !! 35 select HANDLE_DOMAIN_IRQ
177 select GENERIC_VDSO_TIME_NS !! 36 select HAVE_ARCH_COMPILER_H
178 select GENERIC_VDSO_OVERFLOW_PROTECT <<
179 select GUP_GET_PXX_LOW_HIGH <<
180 select HARDIRQS_SW_RESEND <<
181 select HARDLOCKUP_CHECK_TIMESTAMP <<
182 select HAS_IOPORT <<
183 select HAVE_ACPI_APEI <<
184 select HAVE_ACPI_APEI_NMI <<
185 select HAVE_ALIGNED_STRUCT_PAGE <<
186 select HAVE_ARCH_AUDITSYSCALL <<
187 select HAVE_ARCH_HUGE_VMAP <<
188 select HAVE_ARCH_HUGE_VMALLOC <<
189 select HAVE_ARCH_JUMP_LABEL 37 select HAVE_ARCH_JUMP_LABEL
190 select HAVE_ARCH_JUMP_LABEL_RELATIVE <<
191 select HAVE_ARCH_KASAN <<
192 select HAVE_ARCH_KASAN_VMALLOC <<
193 select HAVE_ARCH_KFENCE <<
194 select HAVE_ARCH_KMSAN <<
195 select HAVE_ARCH_KGDB 38 select HAVE_ARCH_KGDB
196 select HAVE_ARCH_MMAP_RND_BITS !! 39 select HAVE_ARCH_MMAP_RND_BITS if MMU
197 select HAVE_ARCH_MMAP_RND_COMPAT_BITS !! 40 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
198 select HAVE_ARCH_COMPAT_MMAP_BASES <<
199 select HAVE_ARCH_PREL32_RELOCATIONS <<
200 select HAVE_ARCH_SECCOMP_FILTER 41 select HAVE_ARCH_SECCOMP_FILTER
201 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
202 select HAVE_ARCH_STACKLEAK <<
203 select HAVE_ARCH_TRACEHOOK 42 select HAVE_ARCH_TRACEHOOK
204 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 43 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
205 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_ !! 44 select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS)
206 select HAVE_ARCH_USERFAULTFD_WP !! 45 select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS)
207 select HAVE_ARCH_USERFAULTFD_MINOR !! 46 select HAVE_CONTEXT_TRACKING
208 select HAVE_ARCH_VMAP_STACK !! 47 select HAVE_COPY_THREAD_TLS
209 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
210 select HAVE_ARCH_WITHIN_STACK_FRAMES <<
211 select HAVE_ASM_MODVERSIONS <<
212 select HAVE_CMPXCHG_DOUBLE <<
213 select HAVE_CMPXCHG_LOCAL <<
214 select HAVE_CONTEXT_TRACKING_USER <<
215 select HAVE_CONTEXT_TRACKING_USER_OFFS <<
216 select HAVE_C_RECORDMCOUNT 48 select HAVE_C_RECORDMCOUNT
217 select HAVE_OBJTOOL_MCOUNT <<
218 select HAVE_OBJTOOL_NOP_MCOUNT <<
219 select HAVE_BUILDTIME_MCOUNT_SORT <<
220 select HAVE_DEBUG_KMEMLEAK 49 select HAVE_DEBUG_KMEMLEAK
>> 50 select HAVE_DEBUG_STACKOVERFLOW
221 select HAVE_DMA_CONTIGUOUS 51 select HAVE_DMA_CONTIGUOUS
222 select HAVE_DYNAMIC_FTRACE 52 select HAVE_DYNAMIC_FTRACE
223 select HAVE_DYNAMIC_FTRACE_WITH_REGS <<
224 select HAVE_DYNAMIC_FTRACE_WITH_ARGS <<
225 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT <<
226 select HAVE_SAMPLE_FTRACE_DIRECT <<
227 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI <<
228 select HAVE_EBPF_JIT <<
229 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
230 select HAVE_EISA <<
231 select HAVE_EXIT_THREAD 53 select HAVE_EXIT_THREAD
232 select HAVE_GUP_FAST <<
233 select HAVE_FENTRY <<
234 select HAVE_FTRACE_MCOUNT_RECORD 54 select HAVE_FTRACE_MCOUNT_RECORD
235 select HAVE_FUNCTION_GRAPH_RETVAL !! 55 select HAVE_FUNCTION_GRAPH_TRACER
236 select HAVE_FUNCTION_GRAPH_TRACER <<
237 select HAVE_FUNCTION_TRACER 56 select HAVE_FUNCTION_TRACER
238 select HAVE_GCC_PLUGINS !! 57 select HAVE_GENERIC_DMA_COHERENT
239 select HAVE_HW_BREAKPOINT !! 58 select HAVE_IDE
240 select HAVE_IOREMAP_PROT !! 59 select HAVE_IRQ_EXIT_ON_IRQ_STACK
241 select HAVE_IRQ_EXIT_ON_IRQ_STACK <<
242 select HAVE_IRQ_TIME_ACCOUNTING 60 select HAVE_IRQ_TIME_ACCOUNTING
243 select HAVE_JUMP_LABEL_HACK <<
244 select HAVE_KERNEL_BZIP2 <<
245 select HAVE_KERNEL_GZIP <<
246 select HAVE_KERNEL_LZ4 <<
247 select HAVE_KERNEL_LZMA <<
248 select HAVE_KERNEL_LZO <<
249 select HAVE_KERNEL_XZ <<
250 select HAVE_KERNEL_ZSTD <<
251 select HAVE_KPROBES 61 select HAVE_KPROBES
252 select HAVE_KPROBES_ON_FTRACE <<
253 select HAVE_FUNCTION_ERROR_INJECTION <<
254 select HAVE_KRETPROBES 62 select HAVE_KRETPROBES
255 select HAVE_RETHOOK !! 63 select HAVE_MEMBLOCK_NODE_MAP
256 select HAVE_LIVEPATCH <<
257 select HAVE_MIXED_BREAKPOINTS_REGS <<
258 select HAVE_MOD_ARCH_SPECIFIC 64 select HAVE_MOD_ARCH_SPECIFIC
259 select HAVE_MOVE_PMD <<
260 select HAVE_MOVE_PUD <<
261 select HAVE_NOINSTR_HACK <<
262 select HAVE_NMI 65 select HAVE_NMI
263 select HAVE_NOINSTR_VALIDATION !! 66 select HAVE_OPROFILE
264 select HAVE_OBJTOOL <<
265 select HAVE_OPTPROBES <<
266 select HAVE_PAGE_SIZE_4KB <<
267 select HAVE_PCSPKR_PLATFORM <<
268 select HAVE_PERF_EVENTS 67 select HAVE_PERF_EVENTS
269 select HAVE_PERF_EVENTS_NMI <<
270 select HAVE_HARDLOCKUP_DETECTOR_PERF <<
271 select HAVE_PCI <<
272 select HAVE_PERF_REGS <<
273 select HAVE_PERF_USER_STACK_DUMP <<
274 select MMU_GATHER_RCU_TABLE_FREE <<
275 select MMU_GATHER_MERGE_VMAS <<
276 select HAVE_POSIX_CPU_TIMERS_TASK_WORK <<
277 select HAVE_REGS_AND_STACK_ACCESS_API 68 select HAVE_REGS_AND_STACK_ACCESS_API
278 select HAVE_RELIABLE_STACKTRACE <<
279 select HAVE_FUNCTION_ARG_ACCESS_API <<
280 select HAVE_SETUP_PER_CPU_AREA <<
281 select HAVE_SOFTIRQ_ON_OWN_STACK <<
282 select HAVE_STACKPROTECTOR <<
283 select HAVE_STACK_VALIDATION <<
284 select HAVE_STATIC_CALL <<
285 select HAVE_STATIC_CALL_INLINE <<
286 select HAVE_PREEMPT_DYNAMIC_CALL <<
287 select HAVE_RSEQ 69 select HAVE_RSEQ
288 select HAVE_RUST !! 70 select HAVE_STACKPROTECTOR
289 select HAVE_SYSCALL_TRACEPOINTS 71 select HAVE_SYSCALL_TRACEPOINTS
290 select HAVE_UACCESS_VALIDATION !! 72 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
291 select HAVE_UNSTABLE_SCHED_CLOCK <<
292 select HAVE_USER_RETURN_NOTIFIER <<
293 select HAVE_GENERIC_VDSO <<
294 select VDSO_GETRANDOM <<
295 select HOTPLUG_PARALLEL <<
296 select HOTPLUG_SMT <<
297 select HOTPLUG_SPLIT_STARTUP <<
298 select IRQ_FORCED_THREADING 73 select IRQ_FORCED_THREADING
299 select LOCK_MM_AND_FIND_VMA !! 74 select MODULES_USE_ELF_RELA if MODULES && 64BIT
300 select NEED_PER_CPU_EMBED_FIRST_CHUNK !! 75 select MODULES_USE_ELF_REL if MODULES
301 select NEED_PER_CPU_PAGE_FIRST_CHUNK !! 76 select PERF_USE_VMALLOC
302 select NEED_SG_DMA_LENGTH <<
303 select NUMA_MEMBLKS <<
304 select PCI_DOMAINS <<
305 select PCI_LOCKLESS_CONFIG <<
306 select PERF_EVENTS <<
307 select RTC_LIB 77 select RTC_LIB
308 select RTC_MC146818_LIB <<
309 select SPARSE_IRQ <<
310 select SYSCTL_EXCEPTION_TRACE 78 select SYSCTL_EXCEPTION_TRACE
311 select THREAD_INFO_IN_TASK !! 79 select VIRT_TO_BUS
312 select TRACE_IRQFLAGS_SUPPORT <<
313 select TRACE_IRQFLAGS_NMI_SUPPORT <<
314 select USER_STACKTRACE_SUPPORT <<
315 select HAVE_ARCH_KCSAN <<
316 select PROC_PID_ARCH_STATUS <<
317 select HAVE_ARCH_NODE_DEV_GROUP <<
318 select FUNCTION_ALIGNMENT_16B <<
319 select FUNCTION_ALIGNMENT_4B <<
320 imply IMA_SECURE_AND_OR_TRUSTED_BOOT <<
321 select HAVE_DYNAMIC_FTRACE_NO_PATCHABL <<
322 80
323 config INSTRUCTION_DECODER !! 81 menu "Machine selection"
324 def_bool y <<
325 depends on KPROBES || PERF_EVENTS || U <<
326 82
327 config OUTPUT_FORMAT !! 83 choice
328 string !! 84 prompt "System type"
329 default "elf32-i386" if X86_32 !! 85 default MIPS_GENERIC
330 default "elf64-x86-64" if X86_64 <<
331 86
332 config LOCKDEP_SUPPORT !! 87 config MIPS_GENERIC
333 def_bool y !! 88 bool "Generic board-agnostic MIPS kernel"
>> 89 select BOOT_RAW
>> 90 select BUILTIN_DTB
>> 91 select CEVT_R4K
>> 92 select CLKSRC_MIPS_GIC
>> 93 select COMMON_CLK
>> 94 select CPU_MIPSR2_IRQ_VI
>> 95 select CPU_MIPSR2_IRQ_EI
>> 96 select CSRC_R4K
>> 97 select DMA_PERDEV_COHERENT
>> 98 select HW_HAS_PCI
>> 99 select IRQ_MIPS_CPU
>> 100 select LIBFDT
>> 101 select MIPS_AUTO_PFN_OFFSET
>> 102 select MIPS_CPU_SCACHE
>> 103 select MIPS_GIC
>> 104 select MIPS_L1_CACHE_SHIFT_7
>> 105 select NO_EXCEPT_FILL
>> 106 select PCI_DRIVERS_GENERIC
>> 107 select PINCTRL
>> 108 select SMP_UP if SMP
>> 109 select SWAP_IO_SPACE
>> 110 select SYS_HAS_CPU_MIPS32_R1
>> 111 select SYS_HAS_CPU_MIPS32_R2
>> 112 select SYS_HAS_CPU_MIPS32_R6
>> 113 select SYS_HAS_CPU_MIPS64_R1
>> 114 select SYS_HAS_CPU_MIPS64_R2
>> 115 select SYS_HAS_CPU_MIPS64_R6
>> 116 select SYS_SUPPORTS_32BIT_KERNEL
>> 117 select SYS_SUPPORTS_64BIT_KERNEL
>> 118 select SYS_SUPPORTS_BIG_ENDIAN
>> 119 select SYS_SUPPORTS_HIGHMEM
>> 120 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 121 select SYS_SUPPORTS_MICROMIPS
>> 122 select SYS_SUPPORTS_MIPS_CPS
>> 123 select SYS_SUPPORTS_MIPS16
>> 124 select SYS_SUPPORTS_MULTITHREADING
>> 125 select SYS_SUPPORTS_RELOCATABLE
>> 126 select SYS_SUPPORTS_SMARTMIPS
>> 127 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 128 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 129 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 130 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 131 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 132 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 133 select USE_OF
>> 134 select UHI_BOOT
>> 135 help
>> 136 Select this to build a kernel which aims to support multiple boards,
>> 137 generally using a flattened device tree passed from the bootloader
>> 138 using the boot protocol defined in the UHI (Unified Hosting
>> 139 Interface) specification.
334 140
335 config STACKTRACE_SUPPORT !! 141 config MIPS_ALCHEMY
336 def_bool y !! 142 bool "Alchemy processor based machines"
>> 143 select PHYS_ADDR_T_64BIT
>> 144 select CEVT_R4K
>> 145 select CSRC_R4K
>> 146 select IRQ_MIPS_CPU
>> 147 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 148 select SYS_HAS_CPU_MIPS32_R1
>> 149 select SYS_SUPPORTS_32BIT_KERNEL
>> 150 select SYS_SUPPORTS_APM_EMULATION
>> 151 select GPIOLIB
>> 152 select SYS_SUPPORTS_ZBOOT
>> 153 select COMMON_CLK
337 154
338 config MMU !! 155 config AR7
339 def_bool y !! 156 bool "Texas Instruments AR7"
>> 157 select BOOT_ELF32
>> 158 select DMA_NONCOHERENT
>> 159 select CEVT_R4K
>> 160 select CSRC_R4K
>> 161 select IRQ_MIPS_CPU
>> 162 select NO_EXCEPT_FILL
>> 163 select SWAP_IO_SPACE
>> 164 select SYS_HAS_CPU_MIPS32_R1
>> 165 select SYS_HAS_EARLY_PRINTK
>> 166 select SYS_SUPPORTS_32BIT_KERNEL
>> 167 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 168 select SYS_SUPPORTS_MIPS16
>> 169 select SYS_SUPPORTS_ZBOOT_UART16550
>> 170 select GPIOLIB
>> 171 select VLYNQ
>> 172 select HAVE_CLK
>> 173 help
>> 174 Support for the Texas Instruments AR7 System-on-a-Chip
>> 175 family: TNETD7100, 7200 and 7300.
340 176
341 config ARCH_MMAP_RND_BITS_MIN !! 177 config ATH25
342 default 28 if 64BIT !! 178 bool "Atheros AR231x/AR531x SoC support"
343 default 8 !! 179 select CEVT_R4K
>> 180 select CSRC_R4K
>> 181 select DMA_NONCOHERENT
>> 182 select IRQ_MIPS_CPU
>> 183 select IRQ_DOMAIN
>> 184 select SYS_HAS_CPU_MIPS32_R1
>> 185 select SYS_SUPPORTS_BIG_ENDIAN
>> 186 select SYS_SUPPORTS_32BIT_KERNEL
>> 187 select SYS_HAS_EARLY_PRINTK
>> 188 help
>> 189 Support for Atheros AR231x and Atheros AR531x based boards
>> 190
>> 191 config ATH79
>> 192 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 193 select ARCH_HAS_RESET_CONTROLLER
>> 194 select BOOT_RAW
>> 195 select CEVT_R4K
>> 196 select CSRC_R4K
>> 197 select DMA_NONCOHERENT
>> 198 select GPIOLIB
>> 199 select PINCTRL
>> 200 select HAVE_CLK
>> 201 select COMMON_CLK
>> 202 select CLKDEV_LOOKUP
>> 203 select IRQ_MIPS_CPU
>> 204 select MIPS_MACHINE
>> 205 select SYS_HAS_CPU_MIPS32_R2
>> 206 select SYS_HAS_EARLY_PRINTK
>> 207 select SYS_SUPPORTS_32BIT_KERNEL
>> 208 select SYS_SUPPORTS_BIG_ENDIAN
>> 209 select SYS_SUPPORTS_MIPS16
>> 210 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 211 select USE_OF
>> 212 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 213 help
>> 214 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 215
>> 216 config BMIPS_GENERIC
>> 217 bool "Broadcom Generic BMIPS kernel"
>> 218 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 219 select ARCH_HAS_PHYS_TO_DMA
>> 220 select BOOT_RAW
>> 221 select NO_EXCEPT_FILL
>> 222 select USE_OF
>> 223 select CEVT_R4K
>> 224 select CSRC_R4K
>> 225 select SYNC_R4K
>> 226 select COMMON_CLK
>> 227 select BCM6345_L1_IRQ
>> 228 select BCM7038_L1_IRQ
>> 229 select BCM7120_L2_IRQ
>> 230 select BRCMSTB_L2_IRQ
>> 231 select IRQ_MIPS_CPU
>> 232 select DMA_NONCOHERENT
>> 233 select SYS_SUPPORTS_32BIT_KERNEL
>> 234 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 235 select SYS_SUPPORTS_BIG_ENDIAN
>> 236 select SYS_SUPPORTS_HIGHMEM
>> 237 select SYS_HAS_CPU_BMIPS32_3300
>> 238 select SYS_HAS_CPU_BMIPS4350
>> 239 select SYS_HAS_CPU_BMIPS4380
>> 240 select SYS_HAS_CPU_BMIPS5000
>> 241 select SWAP_IO_SPACE
>> 242 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 243 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 244 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 245 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 246 select HARDIRQS_SW_RESEND
>> 247 help
>> 248 Build a generic DT-based kernel image that boots on select
>> 249 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 250 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 251 must be set appropriately for your board.
>> 252
>> 253 config BCM47XX
>> 254 bool "Broadcom BCM47XX based boards"
>> 255 select BOOT_RAW
>> 256 select CEVT_R4K
>> 257 select CSRC_R4K
>> 258 select DMA_NONCOHERENT
>> 259 select HW_HAS_PCI
>> 260 select IRQ_MIPS_CPU
>> 261 select SYS_HAS_CPU_MIPS32_R1
>> 262 select NO_EXCEPT_FILL
>> 263 select SYS_SUPPORTS_32BIT_KERNEL
>> 264 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 265 select SYS_SUPPORTS_MIPS16
>> 266 select SYS_SUPPORTS_ZBOOT
>> 267 select SYS_HAS_EARLY_PRINTK
>> 268 select USE_GENERIC_EARLY_PRINTK_8250
>> 269 select GPIOLIB
>> 270 select LEDS_GPIO_REGISTER
>> 271 select BCM47XX_NVRAM
>> 272 select BCM47XX_SPROM
>> 273 select BCM47XX_SSB if !BCM47XX_BCMA
>> 274 help
>> 275 Support for BCM47XX based boards
>> 276
>> 277 config BCM63XX
>> 278 bool "Broadcom BCM63XX based boards"
>> 279 select BOOT_RAW
>> 280 select CEVT_R4K
>> 281 select CSRC_R4K
>> 282 select SYNC_R4K
>> 283 select DMA_NONCOHERENT
>> 284 select IRQ_MIPS_CPU
>> 285 select SYS_SUPPORTS_32BIT_KERNEL
>> 286 select SYS_SUPPORTS_BIG_ENDIAN
>> 287 select SYS_HAS_EARLY_PRINTK
>> 288 select SWAP_IO_SPACE
>> 289 select GPIOLIB
>> 290 select HAVE_CLK
>> 291 select MIPS_L1_CACHE_SHIFT_4
>> 292 select CLKDEV_LOOKUP
>> 293 help
>> 294 Support for BCM63XX based boards
>> 295
>> 296 config MIPS_COBALT
>> 297 bool "Cobalt Server"
>> 298 select CEVT_R4K
>> 299 select CSRC_R4K
>> 300 select CEVT_GT641XX
>> 301 select DMA_NONCOHERENT
>> 302 select HW_HAS_PCI
>> 303 select I8253
>> 304 select I8259
>> 305 select IRQ_MIPS_CPU
>> 306 select IRQ_GT641XX
>> 307 select PCI_GT64XXX_PCI0
>> 308 select PCI
>> 309 select SYS_HAS_CPU_NEVADA
>> 310 select SYS_HAS_EARLY_PRINTK
>> 311 select SYS_SUPPORTS_32BIT_KERNEL
>> 312 select SYS_SUPPORTS_64BIT_KERNEL
>> 313 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 314 select USE_GENERIC_EARLY_PRINTK_8250
>> 315
>> 316 config MACH_DECSTATION
>> 317 bool "DECstations"
>> 318 select BOOT_ELF32
>> 319 select CEVT_DS1287
>> 320 select CEVT_R4K if CPU_R4X00
>> 321 select CSRC_IOASIC
>> 322 select CSRC_R4K if CPU_R4X00
>> 323 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 324 select CPU_R4000_WORKAROUNDS if 64BIT
>> 325 select CPU_R4400_WORKAROUNDS if 64BIT
>> 326 select DMA_NONCOHERENT
>> 327 select NO_IOPORT_MAP
>> 328 select IRQ_MIPS_CPU
>> 329 select SYS_HAS_CPU_R3000
>> 330 select SYS_HAS_CPU_R4X00
>> 331 select SYS_SUPPORTS_32BIT_KERNEL
>> 332 select SYS_SUPPORTS_64BIT_KERNEL
>> 333 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 334 select SYS_SUPPORTS_128HZ
>> 335 select SYS_SUPPORTS_256HZ
>> 336 select SYS_SUPPORTS_1024HZ
>> 337 select MIPS_L1_CACHE_SHIFT_4
>> 338 help
>> 339 This enables support for DEC's MIPS based workstations. For details
>> 340 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 341 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 342
>> 343 If you have one of the following DECstation Models you definitely
>> 344 want to choose R4xx0 for the CPU Type:
>> 345
>> 346 DECstation 5000/50
>> 347 DECstation 5000/150
>> 348 DECstation 5000/260
>> 349 DECsystem 5900/260
344 350
345 config ARCH_MMAP_RND_BITS_MAX !! 351 otherwise choose R3000.
346 default 32 if 64BIT <<
347 default 16 <<
348 352
349 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 353 config MACH_JAZZ
350 default 8 !! 354 bool "Jazz family of machines"
>> 355 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 356 select ARCH_MIGHT_HAVE_PC_SERIO
>> 357 select FW_ARC
>> 358 select FW_ARC32
>> 359 select ARCH_MAY_HAVE_PC_FDC
>> 360 select CEVT_R4K
>> 361 select CSRC_R4K
>> 362 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 363 select GENERIC_ISA_DMA
>> 364 select HAVE_PCSPKR_PLATFORM
>> 365 select IRQ_MIPS_CPU
>> 366 select I8253
>> 367 select I8259
>> 368 select ISA
>> 369 select SYS_HAS_CPU_R4X00
>> 370 select SYS_SUPPORTS_32BIT_KERNEL
>> 371 select SYS_SUPPORTS_64BIT_KERNEL
>> 372 select SYS_SUPPORTS_100HZ
>> 373 help
>> 374 This a family of machines based on the MIPS R4030 chipset which was
>> 375 used by several vendors to build RISC/os and Windows NT workstations.
>> 376 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 377 Olivetti M700-10 workstations.
>> 378
>> 379 config MACH_INGENIC
>> 380 bool "Ingenic SoC based machines"
>> 381 select SYS_SUPPORTS_32BIT_KERNEL
>> 382 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 383 select SYS_SUPPORTS_ZBOOT_UART16550
>> 384 select DMA_NONCOHERENT
>> 385 select IRQ_MIPS_CPU
>> 386 select PINCTRL
>> 387 select GPIOLIB
>> 388 select COMMON_CLK
>> 389 select GENERIC_IRQ_CHIP
>> 390 select BUILTIN_DTB
>> 391 select USE_OF
>> 392 select LIBFDT
>> 393
>> 394 config LANTIQ
>> 395 bool "Lantiq based platforms"
>> 396 select DMA_NONCOHERENT
>> 397 select IRQ_MIPS_CPU
>> 398 select CEVT_R4K
>> 399 select CSRC_R4K
>> 400 select SYS_HAS_CPU_MIPS32_R1
>> 401 select SYS_HAS_CPU_MIPS32_R2
>> 402 select SYS_SUPPORTS_BIG_ENDIAN
>> 403 select SYS_SUPPORTS_32BIT_KERNEL
>> 404 select SYS_SUPPORTS_MIPS16
>> 405 select SYS_SUPPORTS_MULTITHREADING
>> 406 select SYS_SUPPORTS_VPE_LOADER
>> 407 select SYS_HAS_EARLY_PRINTK
>> 408 select GPIOLIB
>> 409 select SWAP_IO_SPACE
>> 410 select BOOT_RAW
>> 411 select CLKDEV_LOOKUP
>> 412 select USE_OF
>> 413 select PINCTRL
>> 414 select PINCTRL_LANTIQ
>> 415 select ARCH_HAS_RESET_CONTROLLER
>> 416 select RESET_CONTROLLER
>> 417
>> 418 config LASAT
>> 419 bool "LASAT Networks platforms"
>> 420 select CEVT_R4K
>> 421 select CRC32
>> 422 select CSRC_R4K
>> 423 select DMA_NONCOHERENT
>> 424 select SYS_HAS_EARLY_PRINTK
>> 425 select HW_HAS_PCI
>> 426 select IRQ_MIPS_CPU
>> 427 select PCI_GT64XXX_PCI0
>> 428 select MIPS_NILE4
>> 429 select R5000_CPU_SCACHE
>> 430 select SYS_HAS_CPU_R5000
>> 431 select SYS_SUPPORTS_32BIT_KERNEL
>> 432 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 433 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 434
>> 435 config MACH_LOONGSON32
>> 436 bool "Loongson-1 family of machines"
>> 437 select SYS_SUPPORTS_ZBOOT
>> 438 help
>> 439 This enables support for the Loongson-1 family of machines.
>> 440
>> 441 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 442 the Institute of Computing Technology (ICT), Chinese Academy of
>> 443 Sciences (CAS).
>> 444
>> 445 config MACH_LOONGSON64
>> 446 bool "Loongson-2/3 family of machines"
>> 447 select SYS_SUPPORTS_ZBOOT
>> 448 help
>> 449 This enables the support of Loongson-2/3 family of machines.
>> 450
>> 451 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 452 family of multi-core CPUs. They are both 64-bit general-purpose
>> 453 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 454 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 455 in the People's Republic of China. The chief architect is Professor
>> 456 Weiwu Hu.
>> 457
>> 458 config MACH_PISTACHIO
>> 459 bool "IMG Pistachio SoC based boards"
>> 460 select BOOT_ELF32
>> 461 select BOOT_RAW
>> 462 select CEVT_R4K
>> 463 select CLKSRC_MIPS_GIC
>> 464 select COMMON_CLK
>> 465 select CSRC_R4K
>> 466 select DMA_NONCOHERENT
>> 467 select GPIOLIB
>> 468 select IRQ_MIPS_CPU
>> 469 select LIBFDT
>> 470 select MFD_SYSCON
>> 471 select MIPS_CPU_SCACHE
>> 472 select MIPS_GIC
>> 473 select PINCTRL
>> 474 select REGULATOR
>> 475 select SYS_HAS_CPU_MIPS32_R2
>> 476 select SYS_SUPPORTS_32BIT_KERNEL
>> 477 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 478 select SYS_SUPPORTS_MIPS_CPS
>> 479 select SYS_SUPPORTS_MULTITHREADING
>> 480 select SYS_SUPPORTS_RELOCATABLE
>> 481 select SYS_SUPPORTS_ZBOOT
>> 482 select SYS_HAS_EARLY_PRINTK
>> 483 select USE_GENERIC_EARLY_PRINTK_8250
>> 484 select USE_OF
>> 485 help
>> 486 This enables support for the IMG Pistachio SoC platform.
>> 487
>> 488 config MIPS_MALTA
>> 489 bool "MIPS Malta board"
>> 490 select ARCH_MAY_HAVE_PC_FDC
>> 491 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 492 select ARCH_MIGHT_HAVE_PC_SERIO
>> 493 select BOOT_ELF32
>> 494 select BOOT_RAW
>> 495 select BUILTIN_DTB
>> 496 select CEVT_R4K
>> 497 select CSRC_R4K
>> 498 select CLKSRC_MIPS_GIC
>> 499 select COMMON_CLK
>> 500 select DMA_MAYBE_COHERENT
>> 501 select GENERIC_ISA_DMA
>> 502 select HAVE_PCSPKR_PLATFORM
>> 503 select IRQ_MIPS_CPU
>> 504 select MIPS_GIC
>> 505 select HW_HAS_PCI
>> 506 select I8253
>> 507 select I8259
>> 508 select MIPS_BONITO64
>> 509 select MIPS_CPU_SCACHE
>> 510 select MIPS_L1_CACHE_SHIFT_6
>> 511 select PCI_GT64XXX_PCI0
>> 512 select MIPS_MSC
>> 513 select SMP_UP if SMP
>> 514 select SWAP_IO_SPACE
>> 515 select SYS_HAS_CPU_MIPS32_R1
>> 516 select SYS_HAS_CPU_MIPS32_R2
>> 517 select SYS_HAS_CPU_MIPS32_R3_5
>> 518 select SYS_HAS_CPU_MIPS32_R5
>> 519 select SYS_HAS_CPU_MIPS32_R6
>> 520 select SYS_HAS_CPU_MIPS64_R1
>> 521 select SYS_HAS_CPU_MIPS64_R2
>> 522 select SYS_HAS_CPU_MIPS64_R6
>> 523 select SYS_HAS_CPU_NEVADA
>> 524 select SYS_HAS_CPU_RM7000
>> 525 select SYS_SUPPORTS_32BIT_KERNEL
>> 526 select SYS_SUPPORTS_64BIT_KERNEL
>> 527 select SYS_SUPPORTS_BIG_ENDIAN
>> 528 select SYS_SUPPORTS_HIGHMEM
>> 529 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 530 select SYS_SUPPORTS_MICROMIPS
>> 531 select SYS_SUPPORTS_MIPS_CMP
>> 532 select SYS_SUPPORTS_MIPS_CPS
>> 533 select SYS_SUPPORTS_MIPS16
>> 534 select SYS_SUPPORTS_MULTITHREADING
>> 535 select SYS_SUPPORTS_SMARTMIPS
>> 536 select SYS_SUPPORTS_VPE_LOADER
>> 537 select SYS_SUPPORTS_ZBOOT
>> 538 select SYS_SUPPORTS_RELOCATABLE
>> 539 select USE_OF
>> 540 select LIBFDT
>> 541 select ZONE_DMA32 if 64BIT
>> 542 select BUILTIN_DTB
>> 543 select LIBFDT
>> 544 help
>> 545 This enables support for the MIPS Technologies Malta evaluation
>> 546 board.
>> 547
>> 548 config MACH_PIC32
>> 549 bool "Microchip PIC32 Family"
>> 550 help
>> 551 This enables support for the Microchip PIC32 family of platforms.
>> 552
>> 553 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 554 microcontrollers.
>> 555
>> 556 config NEC_MARKEINS
>> 557 bool "NEC EMMA2RH Mark-eins board"
>> 558 select SOC_EMMA2RH
>> 559 select HW_HAS_PCI
>> 560 help
>> 561 This enables support for the NEC Electronics Mark-eins boards.
>> 562
>> 563 config MACH_VR41XX
>> 564 bool "NEC VR4100 series based machines"
>> 565 select CEVT_R4K
>> 566 select CSRC_R4K
>> 567 select SYS_HAS_CPU_VR41XX
>> 568 select SYS_SUPPORTS_MIPS16
>> 569 select GPIOLIB
351 570
352 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 571 config NXP_STB220
353 default 16 !! 572 bool "NXP STB220 board"
>> 573 select SOC_PNX833X
>> 574 help
>> 575 Support for NXP Semiconductors STB220 Development Board.
>> 576
>> 577 config NXP_STB225
>> 578 bool "NXP 225 board"
>> 579 select SOC_PNX833X
>> 580 select SOC_PNX8335
>> 581 help
>> 582 Support for NXP Semiconductors STB225 Development Board.
>> 583
>> 584 config PMC_MSP
>> 585 bool "PMC-Sierra MSP chipsets"
>> 586 select CEVT_R4K
>> 587 select CSRC_R4K
>> 588 select DMA_NONCOHERENT
>> 589 select SWAP_IO_SPACE
>> 590 select NO_EXCEPT_FILL
>> 591 select BOOT_RAW
>> 592 select SYS_HAS_CPU_MIPS32_R1
>> 593 select SYS_HAS_CPU_MIPS32_R2
>> 594 select SYS_SUPPORTS_32BIT_KERNEL
>> 595 select SYS_SUPPORTS_BIG_ENDIAN
>> 596 select SYS_SUPPORTS_MIPS16
>> 597 select IRQ_MIPS_CPU
>> 598 select SERIAL_8250
>> 599 select SERIAL_8250_CONSOLE
>> 600 select USB_EHCI_BIG_ENDIAN_MMIO
>> 601 select USB_EHCI_BIG_ENDIAN_DESC
>> 602 help
>> 603 This adds support for the PMC-Sierra family of Multi-Service
>> 604 Processor System-On-A-Chips. These parts include a number
>> 605 of integrated peripherals, interfaces and DSPs in addition to
>> 606 a variety of MIPS cores.
>> 607
>> 608 config RALINK
>> 609 bool "Ralink based machines"
>> 610 select CEVT_R4K
>> 611 select CSRC_R4K
>> 612 select BOOT_RAW
>> 613 select DMA_NONCOHERENT
>> 614 select IRQ_MIPS_CPU
>> 615 select USE_OF
>> 616 select SYS_HAS_CPU_MIPS32_R1
>> 617 select SYS_HAS_CPU_MIPS32_R2
>> 618 select SYS_SUPPORTS_32BIT_KERNEL
>> 619 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 620 select SYS_SUPPORTS_MIPS16
>> 621 select SYS_HAS_EARLY_PRINTK
>> 622 select CLKDEV_LOOKUP
>> 623 select ARCH_HAS_RESET_CONTROLLER
>> 624 select RESET_CONTROLLER
>> 625
>> 626 config SGI_IP22
>> 627 bool "SGI IP22 (Indy/Indigo2)"
>> 628 select FW_ARC
>> 629 select FW_ARC32
>> 630 select ARCH_MIGHT_HAVE_PC_SERIO
>> 631 select BOOT_ELF32
>> 632 select CEVT_R4K
>> 633 select CSRC_R4K
>> 634 select DEFAULT_SGI_PARTITION
>> 635 select DMA_NONCOHERENT
>> 636 select HW_HAS_EISA
>> 637 select I8253
>> 638 select I8259
>> 639 select IP22_CPU_SCACHE
>> 640 select IRQ_MIPS_CPU
>> 641 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 642 select SGI_HAS_I8042
>> 643 select SGI_HAS_INDYDOG
>> 644 select SGI_HAS_HAL2
>> 645 select SGI_HAS_SEEQ
>> 646 select SGI_HAS_WD93
>> 647 select SGI_HAS_ZILOG
>> 648 select SWAP_IO_SPACE
>> 649 select SYS_HAS_CPU_R4X00
>> 650 select SYS_HAS_CPU_R5000
>> 651 #
>> 652 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 653 # memory during early boot on some machines.
>> 654 #
>> 655 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 656 # for a more details discussion
>> 657 #
>> 658 # select SYS_HAS_EARLY_PRINTK
>> 659 select SYS_SUPPORTS_32BIT_KERNEL
>> 660 select SYS_SUPPORTS_64BIT_KERNEL
>> 661 select SYS_SUPPORTS_BIG_ENDIAN
>> 662 select MIPS_L1_CACHE_SHIFT_7
>> 663 help
>> 664 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 665 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 666 that runs on these, say Y here.
>> 667
>> 668 config SGI_IP27
>> 669 bool "SGI IP27 (Origin200/2000)"
>> 670 select ARCH_HAS_PHYS_TO_DMA
>> 671 select FW_ARC
>> 672 select FW_ARC64
>> 673 select BOOT_ELF64
>> 674 select DEFAULT_SGI_PARTITION
>> 675 select SYS_HAS_EARLY_PRINTK
>> 676 select HW_HAS_PCI
>> 677 select NR_CPUS_DEFAULT_64
>> 678 select SYS_HAS_CPU_R10000
>> 679 select SYS_SUPPORTS_64BIT_KERNEL
>> 680 select SYS_SUPPORTS_BIG_ENDIAN
>> 681 select SYS_SUPPORTS_NUMA
>> 682 select SYS_SUPPORTS_SMP
>> 683 select MIPS_L1_CACHE_SHIFT_7
>> 684 help
>> 685 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 686 workstations. To compile a Linux kernel that runs on these, say Y
>> 687 here.
>> 688
>> 689 config SGI_IP28
>> 690 bool "SGI IP28 (Indigo2 R10k)"
>> 691 select FW_ARC
>> 692 select FW_ARC64
>> 693 select ARCH_MIGHT_HAVE_PC_SERIO
>> 694 select BOOT_ELF64
>> 695 select CEVT_R4K
>> 696 select CSRC_R4K
>> 697 select DEFAULT_SGI_PARTITION
>> 698 select DMA_NONCOHERENT
>> 699 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 700 select IRQ_MIPS_CPU
>> 701 select HW_HAS_EISA
>> 702 select I8253
>> 703 select I8259
>> 704 select SGI_HAS_I8042
>> 705 select SGI_HAS_INDYDOG
>> 706 select SGI_HAS_HAL2
>> 707 select SGI_HAS_SEEQ
>> 708 select SGI_HAS_WD93
>> 709 select SGI_HAS_ZILOG
>> 710 select SWAP_IO_SPACE
>> 711 select SYS_HAS_CPU_R10000
>> 712 #
>> 713 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 714 # memory during early boot on some machines.
>> 715 #
>> 716 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 717 # for a more details discussion
>> 718 #
>> 719 # select SYS_HAS_EARLY_PRINTK
>> 720 select SYS_SUPPORTS_64BIT_KERNEL
>> 721 select SYS_SUPPORTS_BIG_ENDIAN
>> 722 select MIPS_L1_CACHE_SHIFT_7
>> 723 help
>> 724 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 725 kernel that runs on these, say Y here.
>> 726
>> 727 config SGI_IP32
>> 728 bool "SGI IP32 (O2)"
>> 729 select ARCH_HAS_PHYS_TO_DMA
>> 730 select FW_ARC
>> 731 select FW_ARC32
>> 732 select BOOT_ELF32
>> 733 select CEVT_R4K
>> 734 select CSRC_R4K
>> 735 select DMA_NONCOHERENT
>> 736 select HW_HAS_PCI
>> 737 select IRQ_MIPS_CPU
>> 738 select R5000_CPU_SCACHE
>> 739 select RM7000_CPU_SCACHE
>> 740 select SYS_HAS_CPU_R5000
>> 741 select SYS_HAS_CPU_R10000 if BROKEN
>> 742 select SYS_HAS_CPU_RM7000
>> 743 select SYS_HAS_CPU_NEVADA
>> 744 select SYS_SUPPORTS_64BIT_KERNEL
>> 745 select SYS_SUPPORTS_BIG_ENDIAN
>> 746 help
>> 747 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 748
>> 749 config SIBYTE_CRHINE
>> 750 bool "Sibyte BCM91120C-CRhine"
>> 751 select BOOT_ELF32
>> 752 select SIBYTE_BCM1120
>> 753 select SWAP_IO_SPACE
>> 754 select SYS_HAS_CPU_SB1
>> 755 select SYS_SUPPORTS_BIG_ENDIAN
>> 756 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 757
>> 758 config SIBYTE_CARMEL
>> 759 bool "Sibyte BCM91120x-Carmel"
>> 760 select BOOT_ELF32
>> 761 select SIBYTE_BCM1120
>> 762 select SWAP_IO_SPACE
>> 763 select SYS_HAS_CPU_SB1
>> 764 select SYS_SUPPORTS_BIG_ENDIAN
>> 765 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 766
>> 767 config SIBYTE_CRHONE
>> 768 bool "Sibyte BCM91125C-CRhone"
>> 769 select BOOT_ELF32
>> 770 select SIBYTE_BCM1125
>> 771 select SWAP_IO_SPACE
>> 772 select SYS_HAS_CPU_SB1
>> 773 select SYS_SUPPORTS_BIG_ENDIAN
>> 774 select SYS_SUPPORTS_HIGHMEM
>> 775 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 776
>> 777 config SIBYTE_RHONE
>> 778 bool "Sibyte BCM91125E-Rhone"
>> 779 select BOOT_ELF32
>> 780 select SIBYTE_BCM1125H
>> 781 select SWAP_IO_SPACE
>> 782 select SYS_HAS_CPU_SB1
>> 783 select SYS_SUPPORTS_BIG_ENDIAN
>> 784 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 785
>> 786 config SIBYTE_SWARM
>> 787 bool "Sibyte BCM91250A-SWARM"
>> 788 select BOOT_ELF32
>> 789 select HAVE_PATA_PLATFORM
>> 790 select SIBYTE_SB1250
>> 791 select SWAP_IO_SPACE
>> 792 select SYS_HAS_CPU_SB1
>> 793 select SYS_SUPPORTS_BIG_ENDIAN
>> 794 select SYS_SUPPORTS_HIGHMEM
>> 795 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 796 select ZONE_DMA32 if 64BIT
>> 797 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 798
>> 799 config SIBYTE_LITTLESUR
>> 800 bool "Sibyte BCM91250C2-LittleSur"
>> 801 select BOOT_ELF32
>> 802 select HAVE_PATA_PLATFORM
>> 803 select SIBYTE_SB1250
>> 804 select SWAP_IO_SPACE
>> 805 select SYS_HAS_CPU_SB1
>> 806 select SYS_SUPPORTS_BIG_ENDIAN
>> 807 select SYS_SUPPORTS_HIGHMEM
>> 808 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 809
>> 810 config SIBYTE_SENTOSA
>> 811 bool "Sibyte BCM91250E-Sentosa"
>> 812 select BOOT_ELF32
>> 813 select SIBYTE_SB1250
>> 814 select SWAP_IO_SPACE
>> 815 select SYS_HAS_CPU_SB1
>> 816 select SYS_SUPPORTS_BIG_ENDIAN
>> 817 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 818 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 819
>> 820 config SIBYTE_BIGSUR
>> 821 bool "Sibyte BCM91480B-BigSur"
>> 822 select BOOT_ELF32
>> 823 select NR_CPUS_DEFAULT_4
>> 824 select SIBYTE_BCM1x80
>> 825 select SWAP_IO_SPACE
>> 826 select SYS_HAS_CPU_SB1
>> 827 select SYS_SUPPORTS_BIG_ENDIAN
>> 828 select SYS_SUPPORTS_HIGHMEM
>> 829 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 830 select ZONE_DMA32 if 64BIT
>> 831 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 832
>> 833 config SNI_RM
>> 834 bool "SNI RM200/300/400"
>> 835 select FW_ARC if CPU_LITTLE_ENDIAN
>> 836 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 837 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 838 select ARCH_MAY_HAVE_PC_FDC
>> 839 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 840 select ARCH_MIGHT_HAVE_PC_SERIO
>> 841 select BOOT_ELF32
>> 842 select CEVT_R4K
>> 843 select CSRC_R4K
>> 844 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 845 select DMA_NONCOHERENT
>> 846 select GENERIC_ISA_DMA
>> 847 select HAVE_PCSPKR_PLATFORM
>> 848 select HW_HAS_EISA
>> 849 select HW_HAS_PCI
>> 850 select IRQ_MIPS_CPU
>> 851 select I8253
>> 852 select I8259
>> 853 select ISA
>> 854 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 855 select SYS_HAS_CPU_R4X00
>> 856 select SYS_HAS_CPU_R5000
>> 857 select SYS_HAS_CPU_R10000
>> 858 select R5000_CPU_SCACHE
>> 859 select SYS_HAS_EARLY_PRINTK
>> 860 select SYS_SUPPORTS_32BIT_KERNEL
>> 861 select SYS_SUPPORTS_64BIT_KERNEL
>> 862 select SYS_SUPPORTS_BIG_ENDIAN
>> 863 select SYS_SUPPORTS_HIGHMEM
>> 864 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 865 help
>> 866 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 867 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 868 Technology and now in turn merged with Fujitsu. Say Y here to
>> 869 support this machine type.
>> 870
>> 871 config MACH_TX39XX
>> 872 bool "Toshiba TX39 series based machines"
>> 873
>> 874 config MACH_TX49XX
>> 875 bool "Toshiba TX49 series based machines"
>> 876
>> 877 config MIKROTIK_RB532
>> 878 bool "Mikrotik RB532 boards"
>> 879 select CEVT_R4K
>> 880 select CSRC_R4K
>> 881 select DMA_NONCOHERENT
>> 882 select HW_HAS_PCI
>> 883 select IRQ_MIPS_CPU
>> 884 select SYS_HAS_CPU_MIPS32_R1
>> 885 select SYS_SUPPORTS_32BIT_KERNEL
>> 886 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 887 select SWAP_IO_SPACE
>> 888 select BOOT_RAW
>> 889 select GPIOLIB
>> 890 select MIPS_L1_CACHE_SHIFT_4
>> 891 help
>> 892 Support the Mikrotik(tm) RouterBoard 532 series,
>> 893 based on the IDT RC32434 SoC.
354 894
355 config SBUS !! 895 config CAVIUM_OCTEON_SOC
356 bool !! 896 bool "Cavium Networks Octeon SoC based boards"
>> 897 select CEVT_R4K
>> 898 select ARCH_HAS_PHYS_TO_DMA
>> 899 select HAS_RAPIDIO
>> 900 select PHYS_ADDR_T_64BIT
>> 901 select SYS_SUPPORTS_64BIT_KERNEL
>> 902 select SYS_SUPPORTS_BIG_ENDIAN
>> 903 select EDAC_SUPPORT
>> 904 select EDAC_ATOMIC_SCRUB
>> 905 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 906 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 907 select SYS_HAS_EARLY_PRINTK
>> 908 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 909 select HW_HAS_PCI
>> 910 select ZONE_DMA32
>> 911 select HOLES_IN_ZONE
>> 912 select GPIOLIB
>> 913 select LIBFDT
>> 914 select USE_OF
>> 915 select ARCH_SPARSEMEM_ENABLE
>> 916 select SYS_SUPPORTS_SMP
>> 917 select NR_CPUS_DEFAULT_64
>> 918 select MIPS_NR_CPU_NR_MAP_1024
>> 919 select BUILTIN_DTB
>> 920 select MTD_COMPLEX_MAPPINGS
>> 921 select SWIOTLB
>> 922 select SYS_SUPPORTS_RELOCATABLE
>> 923 help
>> 924 This option supports all of the Octeon reference boards from Cavium
>> 925 Networks. It builds a kernel that dynamically determines the Octeon
>> 926 CPU type and supports all known board reference implementations.
>> 927 Some of the supported boards are:
>> 928 EBT3000
>> 929 EBH3000
>> 930 EBH3100
>> 931 Thunder
>> 932 Kodama
>> 933 Hikari
>> 934 Say Y here for most Octeon reference boards.
>> 935
>> 936 config NLM_XLR_BOARD
>> 937 bool "Netlogic XLR/XLS based systems"
>> 938 select BOOT_ELF32
>> 939 select NLM_COMMON
>> 940 select SYS_HAS_CPU_XLR
>> 941 select SYS_SUPPORTS_SMP
>> 942 select HW_HAS_PCI
>> 943 select SWAP_IO_SPACE
>> 944 select SYS_SUPPORTS_32BIT_KERNEL
>> 945 select SYS_SUPPORTS_64BIT_KERNEL
>> 946 select PHYS_ADDR_T_64BIT
>> 947 select SYS_SUPPORTS_BIG_ENDIAN
>> 948 select SYS_SUPPORTS_HIGHMEM
>> 949 select NR_CPUS_DEFAULT_32
>> 950 select CEVT_R4K
>> 951 select CSRC_R4K
>> 952 select IRQ_MIPS_CPU
>> 953 select ZONE_DMA32 if 64BIT
>> 954 select SYNC_R4K
>> 955 select SYS_HAS_EARLY_PRINTK
>> 956 select SYS_SUPPORTS_ZBOOT
>> 957 select SYS_SUPPORTS_ZBOOT_UART16550
>> 958 help
>> 959 Support for systems based on Netlogic XLR and XLS processors.
>> 960 Say Y here if you have a XLR or XLS based board.
>> 961
>> 962 config NLM_XLP_BOARD
>> 963 bool "Netlogic XLP based systems"
>> 964 select BOOT_ELF32
>> 965 select NLM_COMMON
>> 966 select SYS_HAS_CPU_XLP
>> 967 select SYS_SUPPORTS_SMP
>> 968 select HW_HAS_PCI
>> 969 select SYS_SUPPORTS_32BIT_KERNEL
>> 970 select SYS_SUPPORTS_64BIT_KERNEL
>> 971 select PHYS_ADDR_T_64BIT
>> 972 select GPIOLIB
>> 973 select SYS_SUPPORTS_BIG_ENDIAN
>> 974 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 975 select SYS_SUPPORTS_HIGHMEM
>> 976 select NR_CPUS_DEFAULT_32
>> 977 select CEVT_R4K
>> 978 select CSRC_R4K
>> 979 select IRQ_MIPS_CPU
>> 980 select ZONE_DMA32 if 64BIT
>> 981 select SYNC_R4K
>> 982 select SYS_HAS_EARLY_PRINTK
>> 983 select USE_OF
>> 984 select SYS_SUPPORTS_ZBOOT
>> 985 select SYS_SUPPORTS_ZBOOT_UART16550
>> 986 help
>> 987 This board is based on Netlogic XLP Processor.
>> 988 Say Y here if you have a XLP based board.
>> 989
>> 990 config MIPS_PARAVIRT
>> 991 bool "Para-Virtualized guest system"
>> 992 select CEVT_R4K
>> 993 select CSRC_R4K
>> 994 select SYS_SUPPORTS_64BIT_KERNEL
>> 995 select SYS_SUPPORTS_32BIT_KERNEL
>> 996 select SYS_SUPPORTS_BIG_ENDIAN
>> 997 select SYS_SUPPORTS_SMP
>> 998 select NR_CPUS_DEFAULT_4
>> 999 select SYS_HAS_EARLY_PRINTK
>> 1000 select SYS_HAS_CPU_MIPS32_R2
>> 1001 select SYS_HAS_CPU_MIPS64_R2
>> 1002 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1003 select HW_HAS_PCI
>> 1004 select SWAP_IO_SPACE
>> 1005 help
>> 1006 This option supports guest running under ????
357 1007
358 config GENERIC_ISA_DMA !! 1008 endchoice
359 def_bool y <<
360 depends on ISA_DMA_API <<
361 1009
362 config GENERIC_CSUM !! 1010 source "arch/mips/alchemy/Kconfig"
363 bool !! 1011 source "arch/mips/ath25/Kconfig"
364 default y if KMSAN || KASAN !! 1012 source "arch/mips/ath79/Kconfig"
>> 1013 source "arch/mips/bcm47xx/Kconfig"
>> 1014 source "arch/mips/bcm63xx/Kconfig"
>> 1015 source "arch/mips/bmips/Kconfig"
>> 1016 source "arch/mips/generic/Kconfig"
>> 1017 source "arch/mips/jazz/Kconfig"
>> 1018 source "arch/mips/jz4740/Kconfig"
>> 1019 source "arch/mips/lantiq/Kconfig"
>> 1020 source "arch/mips/lasat/Kconfig"
>> 1021 source "arch/mips/pic32/Kconfig"
>> 1022 source "arch/mips/pistachio/Kconfig"
>> 1023 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1024 source "arch/mips/ralink/Kconfig"
>> 1025 source "arch/mips/sgi-ip27/Kconfig"
>> 1026 source "arch/mips/sibyte/Kconfig"
>> 1027 source "arch/mips/txx9/Kconfig"
>> 1028 source "arch/mips/vr41xx/Kconfig"
>> 1029 source "arch/mips/cavium-octeon/Kconfig"
>> 1030 source "arch/mips/loongson32/Kconfig"
>> 1031 source "arch/mips/loongson64/Kconfig"
>> 1032 source "arch/mips/netlogic/Kconfig"
>> 1033 source "arch/mips/paravirt/Kconfig"
365 1034
366 config GENERIC_BUG !! 1035 endmenu
367 def_bool y <<
368 depends on BUG <<
369 select GENERIC_BUG_RELATIVE_POINTERS i <<
370 1036
371 config GENERIC_BUG_RELATIVE_POINTERS !! 1037 config RWSEM_GENERIC_SPINLOCK
372 bool 1038 bool
>> 1039 default y
373 1040
374 config ARCH_MAY_HAVE_PC_FDC !! 1041 config RWSEM_XCHGADD_ALGORITHM
375 def_bool y !! 1042 bool
376 depends on ISA_DMA_API <<
377 <<
378 config GENERIC_CALIBRATE_DELAY <<
379 def_bool y <<
380 1043
381 config ARCH_HAS_CPU_RELAX !! 1044 config GENERIC_HWEIGHT
382 def_bool y !! 1045 bool
>> 1046 default y
383 1047
384 config ARCH_HIBERNATION_POSSIBLE !! 1048 config GENERIC_CALIBRATE_DELAY
385 def_bool y !! 1049 bool
>> 1050 default y
386 1051
387 config ARCH_SUSPEND_POSSIBLE !! 1052 config SCHED_OMIT_FRAME_POINTER
388 def_bool y !! 1053 bool
>> 1054 default y
389 1055
390 config AUDIT_ARCH !! 1056 #
391 def_bool y if X86_64 !! 1057 # Select some configuration options automatically based on user selections.
>> 1058 #
>> 1059 config FW_ARC
>> 1060 bool
392 1061
393 config KASAN_SHADOW_OFFSET !! 1062 config ARCH_MAY_HAVE_PC_FDC
394 hex !! 1063 bool
395 depends on KASAN <<
396 default 0xdffffc0000000000 <<
397 1064
398 config HAVE_INTEL_TXT !! 1065 config BOOT_RAW
399 def_bool y !! 1066 bool
400 depends on INTEL_IOMMU && ACPI <<
401 1067
402 config X86_64_SMP !! 1068 config CEVT_BCM1480
403 def_bool y !! 1069 bool
404 depends on X86_64 && SMP <<
405 1070
406 config ARCH_SUPPORTS_UPROBES !! 1071 config CEVT_DS1287
407 def_bool y !! 1072 bool
408 1073
409 config FIX_EARLYCON_MEM !! 1074 config CEVT_GT641XX
410 def_bool y !! 1075 bool
411 1076
412 config DYNAMIC_PHYSICAL_MASK !! 1077 config CEVT_R4K
413 bool 1078 bool
414 1079
415 config PGTABLE_LEVELS !! 1080 config CEVT_SB1250
416 int !! 1081 bool
417 default 5 if X86_5LEVEL <<
418 default 4 if X86_64 <<
419 default 3 if X86_PAE <<
420 default 2 <<
421 1082
422 config CC_HAS_SANE_STACKPROTECTOR !! 1083 config CEVT_TXX9
423 bool 1084 bool
424 default $(success,$(srctree)/scripts/g <<
425 default $(success,$(srctree)/scripts/g <<
426 help <<
427 We have to make sure stack protector <<
428 the compiler produces broken code or <<
429 the segment on 32-bit kernels. <<
430 1085
431 menu "Processor type and features" !! 1086 config CSRC_BCM1480
>> 1087 bool
432 1088
433 config SMP !! 1089 config CSRC_IOASIC
434 bool "Symmetric multi-processing suppo !! 1090 bool
435 help <<
436 This enables support for systems wit <<
437 a system with only one CPU, say N. I <<
438 than one CPU, say Y. <<
439 1091
440 If you say N here, the kernel will r !! 1092 config CSRC_R4K
441 machines, but will use only one CPU !! 1093 bool
442 you say Y here, the kernel will run <<
443 uniprocessor machines. On a uniproce <<
444 will run faster if you say N here. <<
445 1094
446 Note that if you say Y here and choo !! 1095 config CSRC_SB1250
447 "Pentium" under "Processor family", !! 1096 bool
448 architectures. Similarly, multiproce <<
449 architecture may not work on all Pen <<
450 1097
451 People using multiprocessor machines !! 1098 config MIPS_CLOCK_VSYSCALL
452 Y to "Enhanced Real Time Clock Suppo !! 1099 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
453 Management" code will be disabled if <<
454 1100
455 See also <file:Documentation/arch/x8 !! 1101 config GPIO_TXX9
456 <file:Documentation/admin-guide/lock !! 1102 select GPIOLIB
457 <http://www.tldp.org/docs.html#howto !! 1103 bool
458 1104
459 If you don't know what to do here, s !! 1105 config FW_CFE
>> 1106 bool
460 1107
461 config X86_X2APIC !! 1108 config ARCH_SUPPORTS_UPROBES
462 bool "Support x2apic" !! 1109 bool
463 depends on X86_LOCAL_APIC && X86_64 && <<
464 help <<
465 This enables x2apic support on CPUs <<
466 <<
467 This allows 32-bit apic IDs (so it c <<
468 and accesses the local apic via MSRs <<
469 <<
470 Some Intel systems circa 2022 and la <<
471 and can not fall back to the legacy <<
472 enabled in the BIOS. They will boot <<
473 without enabling this option. <<
474 1110
475 If you don't know what to do here, s !! 1111 config DMA_MAYBE_COHERENT
>> 1112 select ARCH_HAS_DMA_COHERENCE_H
>> 1113 select DMA_NONCOHERENT
>> 1114 bool
476 1115
477 config X86_POSTED_MSI !! 1116 config DMA_PERDEV_COHERENT
478 bool "Enable MSI and MSI-x delivery by !! 1117 bool
479 depends on X86_64 && IRQ_REMAP !! 1118 select DMA_NONCOHERENT
480 help <<
481 This enables MSIs that are under int <<
482 posted interrupts to the host kernel <<
483 potentially be improved by coalescin <<
484 frequency bursts. <<
485 1119
486 If you don't know what to do here, s !! 1120 config DMA_NONCOHERENT
>> 1121 bool
>> 1122 select ARCH_HAS_DMA_MMAP_PGPROT
>> 1123 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
>> 1124 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 1125 select NEED_DMA_MAP_STATE
>> 1126 select ARCH_HAS_DMA_COHERENT_TO_PFN
>> 1127 select DMA_NONCOHERENT_CACHE_SYNC
487 1128
488 config X86_MPPARSE !! 1129 config SYS_HAS_EARLY_PRINTK
489 bool "Enable MPS table" if ACPI !! 1130 bool
490 default y <<
491 depends on X86_LOCAL_APIC <<
492 help <<
493 For old smp systems that do not have <<
494 (esp with 64bit cpus) with acpi supp <<
495 1131
496 config X86_CPU_RESCTRL !! 1132 config SYS_SUPPORTS_HOTPLUG_CPU
497 bool "x86 CPU resource control support !! 1133 bool
498 depends on X86 && (CPU_SUP_INTEL || CP <<
499 select KERNFS <<
500 select PROC_CPU_RESCTRL if PRO <<
501 help <<
502 Enable x86 CPU resource control supp <<
503 1134
504 Provide support for the allocation a !! 1135 config MIPS_BONITO64
505 usage by the CPU. !! 1136 bool
506 1137
507 Intel calls this Intel Resource Dire !! 1138 config MIPS_MSC
508 (Intel(R) RDT). More information abo !! 1139 bool
509 Intel x86 Architecture Software Deve <<
510 1140
511 AMD calls this AMD Platform Quality !! 1141 config MIPS_NILE4
512 More information about AMD QoS can b !! 1142 bool
513 Platform Quality of Service Extensio <<
514 1143
515 Say N if unsure. !! 1144 config SYNC_R4K
>> 1145 bool
516 1146
517 config X86_FRED !! 1147 config MIPS_MACHINE
518 bool "Flexible Return and Event Delive !! 1148 def_bool n
519 depends on X86_64 <<
520 help <<
521 When enabled, try to use Flexible Re <<
522 instead of the legacy SYSCALL/SYSENT <<
523 ring transitions and exception/inter <<
524 system supports it. <<
525 1149
526 config X86_BIGSMP !! 1150 config NO_IOPORT_MAP
527 bool "Support for big SMP systems with !! 1151 def_bool n
528 depends on SMP && X86_32 <<
529 help <<
530 This option is needed for the system <<
531 1152
532 config X86_EXTENDED_PLATFORM !! 1153 config GENERIC_CSUM
533 bool "Support for extended (non-PC) x8 !! 1154 bool
534 default y !! 1155 default y if !CPU_HAS_LOAD_STORE_LR
535 help <<
536 If you disable this option then the <<
537 standard PC platforms. (which covers <<
538 systems out there.) <<
539 1156
540 If you enable this option then you'l !! 1157 config GENERIC_ISA_DMA
541 for the following non-PC x86 platfor !! 1158 bool
542 CONFIG_64BIT. !! 1159 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1160 select ISA_DMA_API
543 1161
544 32-bit platforms (CONFIG_64BIT=n): !! 1162 config GENERIC_ISA_DMA_SUPPORT_BROKEN
545 Goldfish (Android emulator) !! 1163 bool
546 AMD Elan !! 1164 select GENERIC_ISA_DMA
547 RDC R-321x SoC <<
548 SGI 320/540 (Visual Workstatio <<
549 STA2X11-based (e.g. Northville <<
550 Moorestown MID devices <<
551 1165
552 64-bit platforms (CONFIG_64BIT=y): !! 1166 config ISA_DMA_API
553 Numascale NumaChip !! 1167 bool
554 ScaleMP vSMP <<
555 SGI Ultraviolet <<
556 1168
557 If you have one of these systems, or !! 1169 config HOLES_IN_ZONE
558 generic distribution kernel, say Y h !! 1170 bool
559 1171
560 # This is an alphabetically sorted list of 64 !! 1172 config SYS_SUPPORTS_RELOCATABLE
561 # Please maintain the alphabetic order if and !! 1173 bool
562 config X86_NUMACHIP <<
563 bool "Numascale NumaChip" <<
564 depends on X86_64 <<
565 depends on X86_EXTENDED_PLATFORM <<
566 depends on NUMA <<
567 depends on SMP <<
568 depends on X86_X2APIC <<
569 depends on PCI_MMCONFIG <<
570 help <<
571 Adds support for Numascale NumaChip <<
572 enable more than ~168 cores. <<
573 If you don't have one of these, you <<
574 <<
575 config X86_VSMP <<
576 bool "ScaleMP vSMP" <<
577 select HYPERVISOR_GUEST <<
578 select PARAVIRT <<
579 depends on X86_64 && PCI <<
580 depends on X86_EXTENDED_PLATFORM <<
581 depends on SMP <<
582 help <<
583 Support for ScaleMP vSMP systems. S <<
584 supposed to run on these EM64T-based <<
585 if you have one of these machines. <<
586 <<
587 config X86_UV <<
588 bool "SGI Ultraviolet" <<
589 depends on X86_64 <<
590 depends on X86_EXTENDED_PLATFORM <<
591 depends on NUMA <<
592 depends on EFI <<
593 depends on KEXEC_CORE <<
594 depends on X86_X2APIC <<
595 depends on PCI <<
596 help <<
597 This option is needed in order to su <<
598 If you don't have one of these, you <<
599 <<
600 # Following is an alphabetically sorted list o <<
601 # Please maintain the alphabetic order if and <<
602 <<
603 config X86_GOLDFISH <<
604 bool "Goldfish (Virtual Platform)" <<
605 depends on X86_EXTENDED_PLATFORM <<
606 help <<
607 Enable support for the Goldfish virt <<
608 for Android development. Unless you <<
609 Goldfish emulator say N here. <<
610 <<
611 config X86_INTEL_CE <<
612 bool "CE4100 TV platform" <<
613 depends on PCI <<
614 depends on PCI_GODIRECT <<
615 depends on X86_IO_APIC <<
616 depends on X86_32 <<
617 depends on X86_EXTENDED_PLATFORM <<
618 select X86_REBOOTFIXUPS <<
619 select OF <<
620 select OF_EARLY_FLATTREE <<
621 help <<
622 Select for the Intel CE media proces <<
623 This option compiles in support for <<
624 boxes and media devices. <<
625 <<
626 config X86_INTEL_MID <<
627 bool "Intel MID platform support" <<
628 depends on X86_EXTENDED_PLATFORM <<
629 depends on X86_PLATFORM_DEVICES <<
630 depends on PCI <<
631 depends on X86_64 || (PCI_GOANY && X86 <<
632 depends on X86_IO_APIC <<
633 select I2C <<
634 select DW_APB_TIMER <<
635 select INTEL_SCU_PCI <<
636 help <<
637 Select to build a kernel capable of <<
638 Internet Device) platform systems wh <<
639 interfaces. If you are building for <<
640 <<
641 Intel MID platforms are based on an <<
642 consume less power than most of the <<
643 <<
644 config X86_INTEL_QUARK <<
645 bool "Intel Quark platform support" <<
646 depends on X86_32 <<
647 depends on X86_EXTENDED_PLATFORM <<
648 depends on X86_PLATFORM_DEVICES <<
649 depends on X86_TSC <<
650 depends on PCI <<
651 depends on PCI_GOANY <<
652 depends on X86_IO_APIC <<
653 select IOSF_MBI <<
654 select INTEL_IMR <<
655 select COMMON_CLK <<
656 help <<
657 Select to include support for Quark <<
658 Say Y here if you have a Quark based <<
659 compatible Intel Galileo. <<
660 <<
661 config X86_INTEL_LPSS <<
662 bool "Intel Low Power Subsystem Suppor <<
663 depends on X86 && ACPI && PCI <<
664 select COMMON_CLK <<
665 select PINCTRL <<
666 select IOSF_MBI <<
667 help <<
668 Select to build support for Intel Lo <<
669 found on Intel Lynxpoint PCH. Select <<
670 things like clock tree (common clock <<
671 which are needed by the LPSS periphe <<
672 <<
673 config X86_AMD_PLATFORM_DEVICE <<
674 bool "AMD ACPI2Platform devices suppor <<
675 depends on ACPI <<
676 select COMMON_CLK <<
677 select PINCTRL <<
678 help 1174 help
679 Select to interpret AMD specific ACP !! 1175 Selected if the platform supports relocating the kernel.
680 such as I2C, UART, GPIO found on AMD !! 1176 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
681 I2C and UART depend on COMMON_CLK to !! 1177 to allow access to command line and entropy sources.
682 implemented under PINCTRL subsystem. <<
683 <<
684 config IOSF_MBI <<
685 tristate "Intel SoC IOSF Sideband supp <<
686 depends on PCI <<
687 help <<
688 This option enables sideband registe <<
689 platforms. On these platforms the IO <<
690 MSR's for some register accesses, mo <<
691 and power. Drivers may query the ava <<
692 determine if they need the sideband <<
693 platforms. The sideband is available <<
694 This list is not meant to be exclusi <<
695 - BayTrail <<
696 - Braswell <<
697 - Quark <<
698 <<
699 You should say Y if you are running <<
700 <<
701 config IOSF_MBI_DEBUG <<
702 bool "Enable IOSF sideband access thro <<
703 depends on IOSF_MBI && DEBUG_FS <<
704 help <<
705 Select this option to expose the IOS <<
706 MDR, MCRX) through debugfs to write <<
707 different units on the SoC. This is <<
708 state information for debug and anal <<
709 mechanism, users of this option woul <<
710 device they want to access. <<
711 <<
712 If you don't require the option or a <<
713 <<
714 config X86_RDC321X <<
715 bool "RDC R-321x SoC" <<
716 depends on X86_32 <<
717 depends on X86_EXTENDED_PLATFORM <<
718 select M486 <<
719 select X86_REBOOTFIXUPS <<
720 help <<
721 This option is needed for RDC R-321x <<
722 as R-8610-(G). <<
723 If you don't have one of these chips <<
724 <<
725 config X86_32_NON_STANDARD <<
726 bool "Support non-standard 32-bit SMP <<
727 depends on X86_32 && SMP <<
728 depends on X86_EXTENDED_PLATFORM <<
729 help <<
730 This option compiles in the bigsmp a <<
731 subarchitectures. It is intended fo <<
732 kernel. If you select them all, kern <<
733 one and will fallback to default. <<
734 <<
735 # Alphabetically sorted list of Non standard 3 <<
736 1178
737 config X86_SUPPORTS_MEMORY_FAILURE !! 1179 config MIPS_CBPF_JIT
738 def_bool y 1180 def_bool y
739 # MCE code calls memory_failure(): !! 1181 depends on BPF_JIT && HAVE_CBPF_JIT
740 depends on X86_MCE <<
741 # On 32-bit this adds too big of NODES <<
742 # On 32-bit SPARSEMEM adds too big of <<
743 depends on X86_64 || !SPARSEMEM <<
744 select ARCH_SUPPORTS_MEMORY_FAILURE <<
745 <<
746 config STA2X11 <<
747 bool "STA2X11 Companion Chip Support" <<
748 depends on X86_32_NON_STANDARD && PCI <<
749 select SWIOTLB <<
750 select MFD_STA2X11 <<
751 select GPIOLIB <<
752 help <<
753 This adds support for boards based o <<
754 a.k.a. "ConneXt". The chip is used i <<
755 PC chipset, so all "standard" periph <<
756 option is selected the kernel will s <<
757 standard PC machines. <<
758 <<
759 config X86_32_IRIS <<
760 tristate "Eurobraille/Iris poweroff mo <<
761 depends on X86_32 <<
762 help <<
763 The Iris machines from EuroBraille d <<
764 to shut themselves down properly. A <<
765 needed to do so, which is what this <<
766 kernel shutdown. <<
767 <<
768 This is only for Iris machines from <<
769 <<
770 If unused, say N. <<
771 1182
772 config SCHED_OMIT_FRAME_POINTER !! 1183 config MIPS_EBPF_JIT
773 def_bool y 1184 def_bool y
774 prompt "Single-depth WCHAN output" !! 1185 depends on BPF_JIT && HAVE_EBPF_JIT
775 depends on X86 <<
776 help <<
777 Calculate simpler /proc/<PID>/wchan <<
778 is disabled then wchan values will r <<
779 caller function. This provides more <<
780 at the expense of slightly more sche <<
781 1186
782 If in doubt, say "Y". <<
783 1187
784 menuconfig HYPERVISOR_GUEST !! 1188 #
785 bool "Linux guest support" !! 1189 # Endianness selection. Sufficiently obscure so many users don't know what to
>> 1190 # answer,so we try hard to limit the available choices. Also the use of a
>> 1191 # choice statement should be more obvious to the user.
>> 1192 #
>> 1193 choice
>> 1194 prompt "Endianness selection"
786 help 1195 help
787 Say Y here to enable options for run !! 1196 Some MIPS machines can be configured for either little or big endian
788 visors. This option enables basic hy !! 1197 byte order. These modes require different kernels and a different
789 setup. !! 1198 Linux distribution. In general there is one preferred byteorder for a
790 !! 1199 particular system but some systems are just as commonly used in the
791 If you say N, all options in this su !! 1200 one or the other endianness.
792 disabled, and Linux guest support wo !! 1201
>> 1202 config CPU_BIG_ENDIAN
>> 1203 bool "Big endian"
>> 1204 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1205
>> 1206 config CPU_LITTLE_ENDIAN
>> 1207 bool "Little endian"
>> 1208 depends on SYS_SUPPORTS_LITTLE_ENDIAN
793 1209
794 if HYPERVISOR_GUEST !! 1210 endchoice
795 1211
796 config PARAVIRT !! 1212 config EXPORT_UASM
797 bool "Enable paravirtualization code" !! 1213 bool
798 depends on HAVE_STATIC_CALL <<
799 help <<
800 This changes the kernel so it can mo <<
801 under a hypervisor, potentially impr <<
802 over full virtualization. However, <<
803 the kernel is theoretically slower a <<
804 1214
805 config PARAVIRT_XXL !! 1215 config SYS_SUPPORTS_APM_EMULATION
806 bool 1216 bool
807 1217
808 config PARAVIRT_DEBUG !! 1218 config SYS_SUPPORTS_BIG_ENDIAN
809 bool "paravirt-ops debugging" !! 1219 bool
810 depends on PARAVIRT && DEBUG_KERNEL <<
811 help <<
812 Enable to debug paravirt_ops interna <<
813 a paravirt_op is missing when it is <<
814 1220
815 config PARAVIRT_SPINLOCKS !! 1221 config SYS_SUPPORTS_LITTLE_ENDIAN
816 bool "Paravirtualization layer for spi !! 1222 bool
817 depends on PARAVIRT && SMP <<
818 help <<
819 Paravirtualized spinlocks allow a pv <<
820 spinlock implementation with somethi <<
821 (for example, block the virtual CPU <<
822 1223
823 It has a minimal impact on native ke !! 1224 config SYS_SUPPORTS_HUGETLBFS
824 benefit on paravirtualized KVM / Xen !! 1225 bool
>> 1226 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
>> 1227 default y
825 1228
826 If you are unsure how to answer this !! 1229 config MIPS_HUGE_TLB_SUPPORT
>> 1230 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
827 1231
828 config X86_HV_CALLBACK_VECTOR !! 1232 config IRQ_CPU_RM7K
829 def_bool n !! 1233 bool
830 1234
831 source "arch/x86/xen/Kconfig" !! 1235 config IRQ_MSP_SLP
>> 1236 bool
832 1237
833 config KVM_GUEST !! 1238 config IRQ_MSP_CIC
834 bool "KVM Guest support (including kvm !! 1239 bool
835 depends on PARAVIRT <<
836 select PARAVIRT_CLOCK <<
837 select ARCH_CPUIDLE_HALTPOLL <<
838 select X86_HV_CALLBACK_VECTOR <<
839 default y <<
840 help <<
841 This option enables various optimiza <<
842 hypervisor. It includes a paravirtua <<
843 of relying on a PIT (or probably oth <<
844 underlying device model, the host pr <<
845 timing infrastructure such as time o <<
846 1240
847 config ARCH_CPUIDLE_HALTPOLL !! 1241 config IRQ_TXX9
848 def_bool n !! 1242 bool
849 prompt "Disable host haltpoll when loa <<
850 help <<
851 If virtualized under KVM, disable ho <<
852 1243
853 config PVH !! 1244 config IRQ_GT641XX
854 bool "Support for running PVH guests" !! 1245 bool
855 help <<
856 This option enables the PVH entry po <<
857 as specified in the x86/HVM direct b <<
858 <<
859 config PARAVIRT_TIME_ACCOUNTING <<
860 bool "Paravirtual steal time accountin <<
861 depends on PARAVIRT <<
862 help <<
863 Select this option to enable fine gr <<
864 accounting. Time spent executing oth <<
865 the current vCPU is discounted from <<
866 that, there can be a small performan <<
867 <<
868 If in doubt, say N here. <<
869 <<
870 config PARAVIRT_CLOCK <<
871 bool <<
872 <<
873 config JAILHOUSE_GUEST <<
874 bool "Jailhouse non-root cell support" <<
875 depends on X86_64 && PCI <<
876 select X86_PM_TIMER <<
877 help <<
878 This option allows to run Linux as g <<
879 cell. You can leave this option disa <<
880 Jailhouse and run Linux afterwards i <<
881 <<
882 config ACRN_GUEST <<
883 bool "ACRN Guest support" <<
884 depends on X86_64 <<
885 select X86_HV_CALLBACK_VECTOR <<
886 help <<
887 This option allows to run Linux as g <<
888 a flexible, lightweight reference op <<
889 real-time and safety-criticality in <<
890 IOT with small footprint and real-ti <<
891 found in https://projectacrn.org/. <<
892 <<
893 config INTEL_TDX_GUEST <<
894 bool "Intel TDX (Trust Domain Extensio <<
895 depends on X86_64 && CPU_SUP_INTEL <<
896 depends on X86_X2APIC <<
897 depends on EFI_STUB <<
898 select ARCH_HAS_CC_PLATFORM <<
899 select X86_MEM_ENCRYPT <<
900 select X86_MCE <<
901 select UNACCEPTED_MEMORY <<
902 help <<
903 Support running as a guest under Int <<
904 the guest kernel can not boot or run <<
905 TDX includes memory encryption and i <<
906 which protect the confidentiality an <<
907 memory contents and CPU state. TDX g <<
908 some attacks from the VMM. <<
909 <<
910 endif # HYPERVISOR_GUEST <<
911 <<
912 source "arch/x86/Kconfig.cpu" <<
913 <<
914 config HPET_TIMER <<
915 def_bool X86_64 <<
916 prompt "HPET Timer Support" if X86_32 <<
917 help <<
918 Use the IA-PC HPET (High Precision E <<
919 time in preference to the PIT and RT <<
920 present. <<
921 HPET is the next generation timer re <<
922 The HPET provides a stable time base <<
923 systems, unlike the TSC, but it is m <<
924 as it is off-chip. The interface us <<
925 in the HPET spec, revision 1. <<
926 <<
927 You can safely choose Y here. Howev <<
928 activated if the platform and the BI <<
929 Otherwise the 8254 will be used for <<
930 1246
931 Choose N to continue using the legac !! 1247 config PCI_GT64XXX_PCI0
>> 1248 bool
932 1249
933 config HPET_EMULATE_RTC !! 1250 config NO_EXCEPT_FILL
934 def_bool y !! 1251 bool
935 depends on HPET_TIMER && (RTC_DRV_CMOS <<
936 1252
937 # Mark as expert because too many people got i !! 1253 config SOC_EMMA2RH
938 # The code disables itself when not needed. !! 1254 bool
939 config DMI !! 1255 select CEVT_R4K
940 default y !! 1256 select CSRC_R4K
941 select DMI_SCAN_MACHINE_NON_EFI_FALLBA !! 1257 select DMA_NONCOHERENT
942 bool "Enable DMI scanning" if EXPERT !! 1258 select IRQ_MIPS_CPU
943 help !! 1259 select SWAP_IO_SPACE
944 Enabled scanning of DMI to identify !! 1260 select SYS_HAS_CPU_R5500
945 here unless you have verified that y !! 1261 select SYS_SUPPORTS_32BIT_KERNEL
946 affected by entries in the DMI black !! 1262 select SYS_SUPPORTS_64BIT_KERNEL
947 BIOS code. !! 1263 select SYS_SUPPORTS_BIG_ENDIAN
948 <<
949 config GART_IOMMU <<
950 bool "Old AMD GART IOMMU support" <<
951 select IOMMU_HELPER <<
952 select SWIOTLB <<
953 depends on X86_64 && PCI && AMD_NB <<
954 help <<
955 Provides a driver for older AMD Athl <<
956 GART based hardware IOMMUs. <<
957 1264
958 The GART supports full DMA access fo !! 1265 config SOC_PNX833X
959 limitations, on systems with more th !! 1266 bool
960 for USB, sound, many IDE/SATA chipse !! 1267 select CEVT_R4K
>> 1268 select CSRC_R4K
>> 1269 select IRQ_MIPS_CPU
>> 1270 select DMA_NONCOHERENT
>> 1271 select SYS_HAS_CPU_MIPS32_R2
>> 1272 select SYS_SUPPORTS_32BIT_KERNEL
>> 1273 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1274 select SYS_SUPPORTS_BIG_ENDIAN
>> 1275 select SYS_SUPPORTS_MIPS16
>> 1276 select CPU_MIPSR2_IRQ_VI
961 1277
962 Newer systems typically have a moder !! 1278 config SOC_PNX8335
963 the CONFIG_AMD_IOMMU=y config option !! 1279 bool
>> 1280 select SOC_PNX833X
964 1281
965 In normal configurations this driver !! 1282 config MIPS_SPRAM
966 there's more than 3 GB of memory and !! 1283 bool
967 32-bit limited device. <<
968 1284
969 If unsure, say Y. !! 1285 config SWAP_IO_SPACE
>> 1286 bool
970 1287
971 config BOOT_VESA_SUPPORT !! 1288 config SGI_HAS_INDYDOG
972 bool 1289 bool
973 help <<
974 If true, at least one selected frame <<
975 of VESA video modes set at an early <<
976 1290
977 config MAXSMP !! 1291 config SGI_HAS_HAL2
978 bool "Enable Maximum number of SMP Pro !! 1292 bool
979 depends on X86_64 && SMP && DEBUG_KERN <<
980 select CPUMASK_OFFSTACK <<
981 help <<
982 Enable maximum number of CPUS and NU <<
983 If unsure, say N. <<
984 1293
985 # !! 1294 config SGI_HAS_SEEQ
986 # The maximum number of CPUs supported: !! 1295 bool
987 # <<
988 # The main config value is NR_CPUS, which defa <<
989 # and which can be configured interactively in <<
990 # [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] <<
991 # <<
992 # The ranges are different on 32-bit and 64-bi <<
993 # hardware capabilities and scalability featur <<
994 # <<
995 # ( If MAXSMP is enabled we just use the highe <<
996 # interactive configuration. ) <<
997 # <<
998 1296
999 config NR_CPUS_RANGE_BEGIN !! 1297 config SGI_HAS_WD93
1000 int !! 1298 bool
1001 default NR_CPUS_RANGE_END if MAXSMP <<
1002 default 1 if !SMP <<
1003 default 2 <<
1004 1299
1005 config NR_CPUS_RANGE_END !! 1300 config SGI_HAS_ZILOG
1006 int !! 1301 bool
1007 depends on X86_32 <<
1008 default 64 if SMP && X86_BIGSMP <<
1009 default 8 if SMP && !X86_BIGSMP <<
1010 default 1 if !SMP <<
1011 1302
1012 config NR_CPUS_RANGE_END !! 1303 config SGI_HAS_I8042
1013 int !! 1304 bool
1014 depends on X86_64 <<
1015 default 8192 if SMP && CPUMASK_OFFST <<
1016 default 512 if SMP && !CPUMASK_OFFS <<
1017 default 1 if !SMP <<
1018 1305
1019 config NR_CPUS_DEFAULT !! 1306 config DEFAULT_SGI_PARTITION
1020 int !! 1307 bool
1021 depends on X86_32 <<
1022 default 32 if X86_BIGSMP <<
1023 default 8 if SMP <<
1024 default 1 if !SMP <<
1025 1308
1026 config NR_CPUS_DEFAULT !! 1309 config FW_ARC32
1027 int !! 1310 bool
1028 depends on X86_64 <<
1029 default 8192 if MAXSMP <<
1030 default 64 if SMP <<
1031 default 1 if !SMP <<
1032 1311
1033 config NR_CPUS !! 1312 config FW_SNIPROM
1034 int "Maximum number of CPUs" if SMP & !! 1313 bool
1035 range NR_CPUS_RANGE_BEGIN NR_CPUS_RAN <<
1036 default NR_CPUS_DEFAULT <<
1037 help <<
1038 This allows you to specify the maxi <<
1039 kernel will support. If CPUMASK_OF <<
1040 supported value is 8192, otherwise <<
1041 minimum value which makes sense is <<
1042 1314
1043 This is purely to save memory: each !! 1315 config BOOT_ELF32
1044 to the kernel image. !! 1316 bool
1045 1317
1046 config SCHED_CLUSTER !! 1318 config MIPS_L1_CACHE_SHIFT_4
1047 bool "Cluster scheduler support" !! 1319 bool
1048 depends on SMP <<
1049 default y <<
1050 help <<
1051 Cluster scheduler support improves <<
1052 making when dealing with machines t <<
1053 Cluster usually means a couple of C <<
1054 by sharing mid-level caches, last-l <<
1055 busses. <<
1056 1320
1057 config SCHED_SMT !! 1321 config MIPS_L1_CACHE_SHIFT_5
1058 def_bool y if SMP !! 1322 bool
1059 1323
1060 config SCHED_MC !! 1324 config MIPS_L1_CACHE_SHIFT_6
1061 def_bool y !! 1325 bool
1062 prompt "Multi-core scheduler support" <<
1063 depends on SMP <<
1064 help <<
1065 Multi-core scheduler support improv <<
1066 making when dealing with multi-core <<
1067 increased overhead in some places. <<
1068 1326
1069 config SCHED_MC_PRIO !! 1327 config MIPS_L1_CACHE_SHIFT_7
1070 bool "CPU core priorities scheduler s !! 1328 bool
1071 depends on SCHED_MC <<
1072 select X86_INTEL_PSTATE if CPU_SUP_IN <<
1073 select X86_AMD_PSTATE if CPU_SUP_AMD <<
1074 select CPU_FREQ <<
1075 default y <<
1076 help <<
1077 Intel Turbo Boost Max Technology 3. <<
1078 core ordering determined at manufac <<
1079 certain cores to reach higher turbo <<
1080 single threaded workloads) than oth <<
1081 1329
1082 Enabling this kernel feature teache !! 1330 config MIPS_L1_CACHE_SHIFT
1083 the TBM3 (aka ITMT) priority order !! 1331 int
1084 scheduler's CPU selection logic acc !! 1332 default "7" if MIPS_L1_CACHE_SHIFT_7
1085 overall system performance can be a !! 1333 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1334 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1335 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1336 default "5"
1086 1337
1087 This feature will have no effect on !! 1338 config HAVE_STD_PC_SERIAL_PORT
>> 1339 bool
1088 1340
1089 If unsure say Y here. !! 1341 config ARC_CONSOLE
>> 1342 bool "ARC console support"
>> 1343 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1090 1344
1091 config UP_LATE_INIT !! 1345 config ARC_MEMORY
1092 def_bool y !! 1346 bool
1093 depends on !SMP && X86_LOCAL_APIC !! 1347 depends on MACH_JAZZ || SNI_RM || SGI_IP32
>> 1348 default y
1094 1349
1095 config X86_UP_APIC !! 1350 config ARC_PROMLIB
1096 bool "Local APIC support on uniproces !! 1351 bool
1097 default PCI_MSI !! 1352 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
1098 depends on X86_32 && !SMP && !X86_32_ !! 1353 default y
1099 help <<
1100 A local APIC (Advanced Programmable <<
1101 integrated interrupt controller in <<
1102 system which has a processor with a <<
1103 enable and use it. If you say Y her <<
1104 have a local APIC, then the kernel <<
1105 all. The local APIC supports CPU-ge <<
1106 performance counters), and the NMI <<
1107 lockups. <<
1108 <<
1109 config X86_UP_IOAPIC <<
1110 bool "IO-APIC support on uniprocessor <<
1111 depends on X86_UP_APIC <<
1112 help <<
1113 An IO-APIC (I/O Advanced Programmab <<
1114 SMP-capable replacement for PC-styl <<
1115 SMP systems and many recent uniproc <<
1116 <<
1117 If you have a single-CPU system wit <<
1118 to use it. If you say Y here even t <<
1119 an IO-APIC, then the kernel will st <<
1120 1354
1121 config X86_LOCAL_APIC !! 1355 config FW_ARC64
1122 def_bool y !! 1356 bool
1123 depends on X86_64 || SMP || X86_32_NO <<
1124 select IRQ_DOMAIN_HIERARCHY <<
1125 1357
1126 config ACPI_MADT_WAKEUP !! 1358 config BOOT_ELF64
1127 def_bool y !! 1359 bool
1128 depends on X86_64 <<
1129 depends on ACPI <<
1130 depends on SMP <<
1131 depends on X86_LOCAL_APIC <<
1132 1360
1133 config X86_IO_APIC !! 1361 menu "CPU selection"
1134 def_bool y <<
1135 depends on X86_LOCAL_APIC || X86_UP_I <<
1136 1362
1137 config X86_REROUTE_FOR_BROKEN_BOOT_IRQS !! 1363 choice
1138 bool "Reroute for broken boot IRQs" !! 1364 prompt "CPU type"
1139 depends on X86_IO_APIC !! 1365 default CPU_R4X00
1140 help <<
1141 This option enables a workaround th <<
1142 spurious interrupts. This is recomm <<
1143 interrupt handling is used on syste <<
1144 superfluous "boot interrupts" canno <<
1145 <<
1146 Some chipsets generate a legacy INT <<
1147 entry in the chipset's IO-APIC is m <<
1148 kernel does during interrupt handli <<
1149 boot IRQ generation cannot be disab <<
1150 the original IRQ line masked so tha <<
1151 IRQ" is delivered to the CPUs. The <<
1152 kernel to set up the IRQ handler on <<
1153 way only one interrupt is delivered <<
1154 the spurious second interrupt may c <<
1155 down (vital) interrupt lines. <<
1156 <<
1157 Only affects "broken" chipsets. Int <<
1158 increased on these systems. <<
1159 <<
1160 config X86_MCE <<
1161 bool "Machine Check / overheating rep <<
1162 select GENERIC_ALLOCATOR <<
1163 default y <<
1164 help <<
1165 Machine Check support allows the pr <<
1166 kernel if it detects a problem (e.g <<
1167 The action the kernel takes depends <<
1168 ranging from warning messages to ha <<
1169 <<
1170 config X86_MCELOG_LEGACY <<
1171 bool "Support for deprecated /dev/mce <<
1172 depends on X86_MCE <<
1173 help <<
1174 Enable support for /dev/mcelog whic <<
1175 userspace logging daemon. Consider <<
1176 rasdaemon solution. <<
1177 1366
1178 config X86_MCE_INTEL !! 1367 config CPU_LOONGSON3
1179 def_bool y !! 1368 bool "Loongson 3 CPU"
1180 prompt "Intel MCE features" !! 1369 depends on SYS_HAS_CPU_LOONGSON3
1181 depends on X86_MCE && X86_LOCAL_APIC !! 1370 select ARCH_HAS_PHYS_TO_DMA
>> 1371 select CPU_SUPPORTS_64BIT_KERNEL
>> 1372 select CPU_SUPPORTS_HIGHMEM
>> 1373 select CPU_SUPPORTS_HUGEPAGES
>> 1374 select CPU_HAS_LOAD_STORE_LR
>> 1375 select WEAK_ORDERING
>> 1376 select WEAK_REORDERING_BEYOND_LLSC
>> 1377 select MIPS_PGD_C0_CONTEXT
>> 1378 select MIPS_L1_CACHE_SHIFT_6
>> 1379 select GPIOLIB
>> 1380 select SWIOTLB
1182 help 1381 help
1183 Additional support for intel specif !! 1382 The Loongson 3 processor implements the MIPS64R2 instruction
1184 the thermal monitor. !! 1383 set with many extensions.
1185 1384
1186 config X86_MCE_AMD !! 1385 config LOONGSON3_ENHANCEMENT
1187 def_bool y !! 1386 bool "New Loongson 3 CPU Enhancements"
1188 prompt "AMD MCE features" !! 1387 default n
1189 depends on X86_MCE && X86_LOCAL_APIC !! 1388 select CPU_MIPSR2
>> 1389 select CPU_HAS_PREFETCH
>> 1390 depends on CPU_LOONGSON3
>> 1391 help
>> 1392 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1393 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1394 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1395 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1396 Fast TLB refill support, etc.
>> 1397
>> 1398 This option enable those enhancements which are not probed at run
>> 1399 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1400 please say 'N' here. If you want a high-performance kernel to run on
>> 1401 new Loongson 3 machines only, please say 'Y' here.
>> 1402
>> 1403 config CPU_LOONGSON2E
>> 1404 bool "Loongson 2E"
>> 1405 depends on SYS_HAS_CPU_LOONGSON2E
>> 1406 select CPU_LOONGSON2
>> 1407 help
>> 1408 The Loongson 2E processor implements the MIPS III instruction set
>> 1409 with many extensions.
>> 1410
>> 1411 It has an internal FPGA northbridge, which is compatible to
>> 1412 bonito64.
>> 1413
>> 1414 config CPU_LOONGSON2F
>> 1415 bool "Loongson 2F"
>> 1416 depends on SYS_HAS_CPU_LOONGSON2F
>> 1417 select CPU_LOONGSON2
>> 1418 select GPIOLIB
1190 help 1419 help
1191 Additional support for AMD specific !! 1420 The Loongson 2F processor implements the MIPS III instruction set
1192 the DRAM Error Threshold. !! 1421 with many extensions.
1193 1422
1194 config X86_ANCIENT_MCE !! 1423 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1195 bool "Support for old Pentium 5 / Win !! 1424 have a similar programming interface with FPGA northbridge used in
1196 depends on X86_32 && X86_MCE !! 1425 Loongson2E.
1197 help !! 1426
1198 Include support for machine check h !! 1427 config CPU_LOONGSON1B
1199 systems. These typically need to be !! 1428 bool "Loongson 1B"
1200 line. !! 1429 depends on SYS_HAS_CPU_LOONGSON1B
>> 1430 select CPU_LOONGSON1
>> 1431 select LEDS_GPIO_REGISTER
>> 1432 help
>> 1433 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1434 Release 1 instruction set and part of the MIPS32 Release 2
>> 1435 instruction set.
>> 1436
>> 1437 config CPU_LOONGSON1C
>> 1438 bool "Loongson 1C"
>> 1439 depends on SYS_HAS_CPU_LOONGSON1C
>> 1440 select CPU_LOONGSON1
>> 1441 select LEDS_GPIO_REGISTER
>> 1442 help
>> 1443 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1444 Release 1 instruction set and part of the MIPS32 Release 2
>> 1445 instruction set.
>> 1446
>> 1447 config CPU_MIPS32_R1
>> 1448 bool "MIPS32 Release 1"
>> 1449 depends on SYS_HAS_CPU_MIPS32_R1
>> 1450 select CPU_HAS_PREFETCH
>> 1451 select CPU_HAS_LOAD_STORE_LR
>> 1452 select CPU_SUPPORTS_32BIT_KERNEL
>> 1453 select CPU_SUPPORTS_HIGHMEM
>> 1454 help
>> 1455 Choose this option to build a kernel for release 1 or later of the
>> 1456 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1457 MIPS processor are based on a MIPS32 processor. If you know the
>> 1458 specific type of processor in your system, choose those that one
>> 1459 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1460 Release 2 of the MIPS32 architecture is available since several
>> 1461 years so chances are you even have a MIPS32 Release 2 processor
>> 1462 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1463 performance.
1201 1464
1202 config X86_MCE_THRESHOLD !! 1465 config CPU_MIPS32_R2
1203 depends on X86_MCE_AMD || X86_MCE_INT !! 1466 bool "MIPS32 Release 2"
1204 def_bool y !! 1467 depends on SYS_HAS_CPU_MIPS32_R2
>> 1468 select CPU_HAS_PREFETCH
>> 1469 select CPU_HAS_LOAD_STORE_LR
>> 1470 select CPU_SUPPORTS_32BIT_KERNEL
>> 1471 select CPU_SUPPORTS_HIGHMEM
>> 1472 select CPU_SUPPORTS_MSA
>> 1473 select HAVE_KVM
>> 1474 help
>> 1475 Choose this option to build a kernel for release 2 or later of the
>> 1476 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1477 MIPS processor are based on a MIPS32 processor. If you know the
>> 1478 specific type of processor in your system, choose those that one
>> 1479 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1480
>> 1481 config CPU_MIPS32_R6
>> 1482 bool "MIPS32 Release 6"
>> 1483 depends on SYS_HAS_CPU_MIPS32_R6
>> 1484 select CPU_HAS_PREFETCH
>> 1485 select CPU_SUPPORTS_32BIT_KERNEL
>> 1486 select CPU_SUPPORTS_HIGHMEM
>> 1487 select CPU_SUPPORTS_MSA
>> 1488 select HAVE_KVM
>> 1489 select MIPS_O32_FP64_SUPPORT
>> 1490 help
>> 1491 Choose this option to build a kernel for release 6 or later of the
>> 1492 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1493 family, are based on a MIPS32r6 processor. If you own an older
>> 1494 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1495
>> 1496 config CPU_MIPS64_R1
>> 1497 bool "MIPS64 Release 1"
>> 1498 depends on SYS_HAS_CPU_MIPS64_R1
>> 1499 select CPU_HAS_PREFETCH
>> 1500 select CPU_HAS_LOAD_STORE_LR
>> 1501 select CPU_SUPPORTS_32BIT_KERNEL
>> 1502 select CPU_SUPPORTS_64BIT_KERNEL
>> 1503 select CPU_SUPPORTS_HIGHMEM
>> 1504 select CPU_SUPPORTS_HUGEPAGES
>> 1505 help
>> 1506 Choose this option to build a kernel for release 1 or later of the
>> 1507 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1508 MIPS processor are based on a MIPS64 processor. If you know the
>> 1509 specific type of processor in your system, choose those that one
>> 1510 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1511 Release 2 of the MIPS64 architecture is available since several
>> 1512 years so chances are you even have a MIPS64 Release 2 processor
>> 1513 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1514 performance.
1205 1515
1206 config X86_MCE_INJECT !! 1516 config CPU_MIPS64_R2
1207 depends on X86_MCE && X86_LOCAL_APIC !! 1517 bool "MIPS64 Release 2"
1208 tristate "Machine check injector supp !! 1518 depends on SYS_HAS_CPU_MIPS64_R2
>> 1519 select CPU_HAS_PREFETCH
>> 1520 select CPU_HAS_LOAD_STORE_LR
>> 1521 select CPU_SUPPORTS_32BIT_KERNEL
>> 1522 select CPU_SUPPORTS_64BIT_KERNEL
>> 1523 select CPU_SUPPORTS_HIGHMEM
>> 1524 select CPU_SUPPORTS_HUGEPAGES
>> 1525 select CPU_SUPPORTS_MSA
>> 1526 select HAVE_KVM
>> 1527 help
>> 1528 Choose this option to build a kernel for release 2 or later of the
>> 1529 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1530 MIPS processor are based on a MIPS64 processor. If you know the
>> 1531 specific type of processor in your system, choose those that one
>> 1532 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1533
>> 1534 config CPU_MIPS64_R6
>> 1535 bool "MIPS64 Release 6"
>> 1536 depends on SYS_HAS_CPU_MIPS64_R6
>> 1537 select CPU_HAS_PREFETCH
>> 1538 select CPU_SUPPORTS_32BIT_KERNEL
>> 1539 select CPU_SUPPORTS_64BIT_KERNEL
>> 1540 select CPU_SUPPORTS_HIGHMEM
>> 1541 select CPU_SUPPORTS_MSA
>> 1542 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1543 select HAVE_KVM
>> 1544 help
>> 1545 Choose this option to build a kernel for release 6 or later of the
>> 1546 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1547 family, are based on a MIPS64r6 processor. If you own an older
>> 1548 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1549
>> 1550 config CPU_R3000
>> 1551 bool "R3000"
>> 1552 depends on SYS_HAS_CPU_R3000
>> 1553 select CPU_HAS_WB
>> 1554 select CPU_HAS_LOAD_STORE_LR
>> 1555 select CPU_SUPPORTS_32BIT_KERNEL
>> 1556 select CPU_SUPPORTS_HIGHMEM
>> 1557 help
>> 1558 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1559 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1560 *not* work on R4000 machines and vice versa. However, since most
>> 1561 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1562 might be a safe bet. If the resulting kernel does not work,
>> 1563 try to recompile with R3000.
>> 1564
>> 1565 config CPU_TX39XX
>> 1566 bool "R39XX"
>> 1567 depends on SYS_HAS_CPU_TX39XX
>> 1568 select CPU_SUPPORTS_32BIT_KERNEL
>> 1569 select CPU_HAS_LOAD_STORE_LR
>> 1570
>> 1571 config CPU_VR41XX
>> 1572 bool "R41xx"
>> 1573 depends on SYS_HAS_CPU_VR41XX
>> 1574 select CPU_SUPPORTS_32BIT_KERNEL
>> 1575 select CPU_SUPPORTS_64BIT_KERNEL
>> 1576 select CPU_HAS_LOAD_STORE_LR
>> 1577 help
>> 1578 The options selects support for the NEC VR4100 series of processors.
>> 1579 Only choose this option if you have one of these processors as a
>> 1580 kernel built with this option will not run on any other type of
>> 1581 processor or vice versa.
>> 1582
>> 1583 config CPU_R4300
>> 1584 bool "R4300"
>> 1585 depends on SYS_HAS_CPU_R4300
>> 1586 select CPU_SUPPORTS_32BIT_KERNEL
>> 1587 select CPU_SUPPORTS_64BIT_KERNEL
>> 1588 select CPU_HAS_LOAD_STORE_LR
>> 1589 help
>> 1590 MIPS Technologies R4300-series processors.
>> 1591
>> 1592 config CPU_R4X00
>> 1593 bool "R4x00"
>> 1594 depends on SYS_HAS_CPU_R4X00
>> 1595 select CPU_SUPPORTS_32BIT_KERNEL
>> 1596 select CPU_SUPPORTS_64BIT_KERNEL
>> 1597 select CPU_SUPPORTS_HUGEPAGES
>> 1598 select CPU_HAS_LOAD_STORE_LR
>> 1599 help
>> 1600 MIPS Technologies R4000-series processors other than 4300, including
>> 1601 the R4000, R4400, R4600, and 4700.
>> 1602
>> 1603 config CPU_TX49XX
>> 1604 bool "R49XX"
>> 1605 depends on SYS_HAS_CPU_TX49XX
>> 1606 select CPU_HAS_PREFETCH
>> 1607 select CPU_HAS_LOAD_STORE_LR
>> 1608 select CPU_SUPPORTS_32BIT_KERNEL
>> 1609 select CPU_SUPPORTS_64BIT_KERNEL
>> 1610 select CPU_SUPPORTS_HUGEPAGES
>> 1611
>> 1612 config CPU_R5000
>> 1613 bool "R5000"
>> 1614 depends on SYS_HAS_CPU_R5000
>> 1615 select CPU_SUPPORTS_32BIT_KERNEL
>> 1616 select CPU_SUPPORTS_64BIT_KERNEL
>> 1617 select CPU_SUPPORTS_HUGEPAGES
>> 1618 select CPU_HAS_LOAD_STORE_LR
>> 1619 help
>> 1620 MIPS Technologies R5000-series processors other than the Nevada.
>> 1621
>> 1622 config CPU_R5432
>> 1623 bool "R5432"
>> 1624 depends on SYS_HAS_CPU_R5432
>> 1625 select CPU_SUPPORTS_32BIT_KERNEL
>> 1626 select CPU_SUPPORTS_64BIT_KERNEL
>> 1627 select CPU_SUPPORTS_HUGEPAGES
>> 1628 select CPU_HAS_LOAD_STORE_LR
>> 1629
>> 1630 config CPU_R5500
>> 1631 bool "R5500"
>> 1632 depends on SYS_HAS_CPU_R5500
>> 1633 select CPU_SUPPORTS_32BIT_KERNEL
>> 1634 select CPU_SUPPORTS_64BIT_KERNEL
>> 1635 select CPU_SUPPORTS_HUGEPAGES
>> 1636 select CPU_HAS_LOAD_STORE_LR
>> 1637 help
>> 1638 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1639 instruction set.
>> 1640
>> 1641 config CPU_NEVADA
>> 1642 bool "RM52xx"
>> 1643 depends on SYS_HAS_CPU_NEVADA
>> 1644 select CPU_SUPPORTS_32BIT_KERNEL
>> 1645 select CPU_SUPPORTS_64BIT_KERNEL
>> 1646 select CPU_SUPPORTS_HUGEPAGES
>> 1647 select CPU_HAS_LOAD_STORE_LR
>> 1648 help
>> 1649 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1650
>> 1651 config CPU_R8000
>> 1652 bool "R8000"
>> 1653 depends on SYS_HAS_CPU_R8000
>> 1654 select CPU_HAS_PREFETCH
>> 1655 select CPU_HAS_LOAD_STORE_LR
>> 1656 select CPU_SUPPORTS_64BIT_KERNEL
>> 1657 help
>> 1658 MIPS Technologies R8000 processors. Note these processors are
>> 1659 uncommon and the support for them is incomplete.
>> 1660
>> 1661 config CPU_R10000
>> 1662 bool "R10000"
>> 1663 depends on SYS_HAS_CPU_R10000
>> 1664 select CPU_HAS_PREFETCH
>> 1665 select CPU_HAS_LOAD_STORE_LR
>> 1666 select CPU_SUPPORTS_32BIT_KERNEL
>> 1667 select CPU_SUPPORTS_64BIT_KERNEL
>> 1668 select CPU_SUPPORTS_HIGHMEM
>> 1669 select CPU_SUPPORTS_HUGEPAGES
>> 1670 help
>> 1671 MIPS Technologies R10000-series processors.
>> 1672
>> 1673 config CPU_RM7000
>> 1674 bool "RM7000"
>> 1675 depends on SYS_HAS_CPU_RM7000
>> 1676 select CPU_HAS_PREFETCH
>> 1677 select CPU_HAS_LOAD_STORE_LR
>> 1678 select CPU_SUPPORTS_32BIT_KERNEL
>> 1679 select CPU_SUPPORTS_64BIT_KERNEL
>> 1680 select CPU_SUPPORTS_HIGHMEM
>> 1681 select CPU_SUPPORTS_HUGEPAGES
>> 1682
>> 1683 config CPU_SB1
>> 1684 bool "SB1"
>> 1685 depends on SYS_HAS_CPU_SB1
>> 1686 select CPU_HAS_LOAD_STORE_LR
>> 1687 select CPU_SUPPORTS_32BIT_KERNEL
>> 1688 select CPU_SUPPORTS_64BIT_KERNEL
>> 1689 select CPU_SUPPORTS_HIGHMEM
>> 1690 select CPU_SUPPORTS_HUGEPAGES
>> 1691 select WEAK_ORDERING
>> 1692
>> 1693 config CPU_CAVIUM_OCTEON
>> 1694 bool "Cavium Octeon processor"
>> 1695 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1696 select CPU_HAS_PREFETCH
>> 1697 select CPU_HAS_LOAD_STORE_LR
>> 1698 select CPU_SUPPORTS_64BIT_KERNEL
>> 1699 select WEAK_ORDERING
>> 1700 select CPU_SUPPORTS_HIGHMEM
>> 1701 select CPU_SUPPORTS_HUGEPAGES
>> 1702 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1703 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1704 select MIPS_L1_CACHE_SHIFT_7
>> 1705 select HAVE_KVM
>> 1706 help
>> 1707 The Cavium Octeon processor is a highly integrated chip containing
>> 1708 many ethernet hardware widgets for networking tasks. The processor
>> 1709 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1710 Full details can be found at http://www.caviumnetworks.com.
>> 1711
>> 1712 config CPU_BMIPS
>> 1713 bool "Broadcom BMIPS"
>> 1714 depends on SYS_HAS_CPU_BMIPS
>> 1715 select CPU_MIPS32
>> 1716 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1717 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1718 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1719 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1720 select CPU_SUPPORTS_32BIT_KERNEL
>> 1721 select DMA_NONCOHERENT
>> 1722 select IRQ_MIPS_CPU
>> 1723 select SWAP_IO_SPACE
>> 1724 select WEAK_ORDERING
>> 1725 select CPU_SUPPORTS_HIGHMEM
>> 1726 select CPU_HAS_PREFETCH
>> 1727 select CPU_HAS_LOAD_STORE_LR
>> 1728 select CPU_SUPPORTS_CPUFREQ
>> 1729 select MIPS_EXTERNAL_TIMER
>> 1730 help
>> 1731 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1732
>> 1733 config CPU_XLR
>> 1734 bool "Netlogic XLR SoC"
>> 1735 depends on SYS_HAS_CPU_XLR
>> 1736 select CPU_HAS_LOAD_STORE_LR
>> 1737 select CPU_SUPPORTS_32BIT_KERNEL
>> 1738 select CPU_SUPPORTS_64BIT_KERNEL
>> 1739 select CPU_SUPPORTS_HIGHMEM
>> 1740 select CPU_SUPPORTS_HUGEPAGES
>> 1741 select WEAK_ORDERING
>> 1742 select WEAK_REORDERING_BEYOND_LLSC
>> 1743 help
>> 1744 Netlogic Microsystems XLR/XLS processors.
>> 1745
>> 1746 config CPU_XLP
>> 1747 bool "Netlogic XLP SoC"
>> 1748 depends on SYS_HAS_CPU_XLP
>> 1749 select CPU_SUPPORTS_32BIT_KERNEL
>> 1750 select CPU_SUPPORTS_64BIT_KERNEL
>> 1751 select CPU_SUPPORTS_HIGHMEM
>> 1752 select WEAK_ORDERING
>> 1753 select WEAK_REORDERING_BEYOND_LLSC
>> 1754 select CPU_HAS_PREFETCH
>> 1755 select CPU_HAS_LOAD_STORE_LR
>> 1756 select CPU_MIPSR2
>> 1757 select CPU_SUPPORTS_HUGEPAGES
>> 1758 select MIPS_ASID_BITS_VARIABLE
1209 help 1759 help
1210 Provide support for injecting machi !! 1760 Netlogic Microsystems XLP processors.
1211 If you don't know what a machine ch !! 1761 endchoice
1212 QA it is safe to say n. <<
1213 <<
1214 source "arch/x86/events/Kconfig" <<
1215 1762
1216 config X86_LEGACY_VM86 !! 1763 config CPU_MIPS32_3_5_FEATURES
1217 bool "Legacy VM86 support" !! 1764 bool "MIPS32 Release 3.5 Features"
1218 depends on X86_32 !! 1765 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1766 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 1767 help
>> 1768 Choose this option to build a kernel for release 2 or later of the
>> 1769 MIPS32 architecture including features from the 3.5 release such as
>> 1770 support for Enhanced Virtual Addressing (EVA).
>> 1771
>> 1772 config CPU_MIPS32_3_5_EVA
>> 1773 bool "Enhanced Virtual Addressing (EVA)"
>> 1774 depends on CPU_MIPS32_3_5_FEATURES
>> 1775 select EVA
>> 1776 default y
>> 1777 help
>> 1778 Choose this option if you want to enable the Enhanced Virtual
>> 1779 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1780 One of its primary benefits is an increase in the maximum size
>> 1781 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1782
>> 1783 config CPU_MIPS32_R5_FEATURES
>> 1784 bool "MIPS32 Release 5 Features"
>> 1785 depends on SYS_HAS_CPU_MIPS32_R5
>> 1786 depends on CPU_MIPS32_R2
>> 1787 help
>> 1788 Choose this option to build a kernel for release 2 or later of the
>> 1789 MIPS32 architecture including features from release 5 such as
>> 1790 support for Extended Physical Addressing (XPA).
>> 1791
>> 1792 config CPU_MIPS32_R5_XPA
>> 1793 bool "Extended Physical Addressing (XPA)"
>> 1794 depends on CPU_MIPS32_R5_FEATURES
>> 1795 depends on !EVA
>> 1796 depends on !PAGE_SIZE_4KB
>> 1797 depends on SYS_SUPPORTS_HIGHMEM
>> 1798 select XPA
>> 1799 select HIGHMEM
>> 1800 select PHYS_ADDR_T_64BIT
>> 1801 default n
1219 help 1802 help
1220 This option allows user programs to !! 1803 Choose this option if you want to enable the Extended Physical
1221 mode, which is an 80286-era approxi !! 1804 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1222 !! 1805 benefit is to increase physical addressing equal to or greater
1223 Some very old versions of X and/or !! 1806 than 40 bits. Note that this has the side effect of turning on
1224 for user mode setting. Similarly, !! 1807 64-bit addressing which in turn makes the PTEs 64-bit in size.
1225 available to accelerate real mode D !! 1808 If unsure, say 'N' here.
1226 recent version of DOSEMU, X, or vbe <<
1227 functional even without kernel VM86 <<
1228 fall back to software emulation. Ne <<
1229 a 16-bit DOS program where 16-bit p <<
1230 mode might be faster than emulation <<
1231 enable this option. <<
1232 <<
1233 Note that any app that works on a 6 <<
1234 need this option, as 64-bit kernels <<
1235 V8086 mode. This option is also unr <<
1236 mode and is not needed to run most <<
1237 <<
1238 Enabling this option increases the <<
1239 and slows down exception handling a <<
1240 1809
1241 If unsure, say N here. !! 1810 if CPU_LOONGSON2F
1242 !! 1811 config CPU_NOP_WORKAROUNDS
1243 config VM86 <<
1244 bool 1812 bool
1245 default X86_LEGACY_VM86 <<
1246 <<
1247 config X86_16BIT <<
1248 bool "Enable support for 16-bit segme <<
1249 default y <<
1250 depends on MODIFY_LDT_SYSCALL <<
1251 help <<
1252 This option is required by programs <<
1253 protected mode legacy code on x86 p <<
1254 this option saves about 300 bytes o <<
1255 plus 16K runtime memory on x86-64, <<
1256 1813
1257 config X86_ESPFIX32 !! 1814 config CPU_JUMP_WORKAROUNDS
1258 def_bool y !! 1815 bool
1259 depends on X86_16BIT && X86_32 <<
1260 <<
1261 config X86_ESPFIX64 <<
1262 def_bool y <<
1263 depends on X86_16BIT && X86_64 <<
1264 1816
1265 config X86_VSYSCALL_EMULATION !! 1817 config CPU_LOONGSON2F_WORKAROUNDS
1266 bool "Enable vsyscall emulation" if E !! 1818 bool "Loongson 2F Workarounds"
1267 default y 1819 default y
1268 depends on X86_64 !! 1820 select CPU_NOP_WORKAROUNDS
>> 1821 select CPU_JUMP_WORKAROUNDS
1269 help 1822 help
1270 This enables emulation of the legac !! 1823 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1271 it is roughly equivalent to booting !! 1824 require workarounds. Without workarounds the system may hang
1272 that it will also disable the helpf !! 1825 unexpectedly. For more information please refer to the gas
1273 tries to use a vsyscall. With this !! 1826 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1274 programs will just segfault, citing !! 1827
1275 0xffffffffff600?00. !! 1828 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1829 are needed. The workarounds have no significant side effect on them
>> 1830 but may decrease the performance of the system so this option should
>> 1831 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1832 systems.
1276 1833
1277 This option is required by many pro !! 1834 If unsure, please say Y.
1278 care should be used even with newer !! 1835 endif # CPU_LOONGSON2F
1279 1836
1280 Disabling this option saves about 7 !! 1837 config SYS_SUPPORTS_ZBOOT
1281 possibly 4K of additional runtime p !! 1838 bool
>> 1839 select HAVE_KERNEL_GZIP
>> 1840 select HAVE_KERNEL_BZIP2
>> 1841 select HAVE_KERNEL_LZ4
>> 1842 select HAVE_KERNEL_LZMA
>> 1843 select HAVE_KERNEL_LZO
>> 1844 select HAVE_KERNEL_XZ
1282 1845
1283 config X86_IOPL_IOPERM !! 1846 config SYS_SUPPORTS_ZBOOT_UART16550
1284 bool "IOPERM and IOPL Emulation" !! 1847 bool
1285 default y !! 1848 select SYS_SUPPORTS_ZBOOT
1286 help <<
1287 This enables the ioperm() and iopl( <<
1288 for legacy applications. <<
1289 1849
1290 Legacy IOPL support is an overbroad !! 1850 config SYS_SUPPORTS_ZBOOT_UART_PROM
1291 space aside of accessing all 65536 !! 1851 bool
1292 interrupts. To gain this access the !! 1852 select SYS_SUPPORTS_ZBOOT
1293 capabilities and permission from po <<
1294 modules. <<
1295 1853
1296 The emulation restricts the functio !! 1854 config CPU_LOONGSON2
1297 only allowing the full range I/O po !! 1855 bool
1298 ability to disable interrupts from !! 1856 select CPU_SUPPORTS_32BIT_KERNEL
1299 granted if the hardware IOPL mechan !! 1857 select CPU_SUPPORTS_64BIT_KERNEL
>> 1858 select CPU_SUPPORTS_HIGHMEM
>> 1859 select CPU_SUPPORTS_HUGEPAGES
>> 1860 select ARCH_HAS_PHYS_TO_DMA
>> 1861 select CPU_HAS_LOAD_STORE_LR
1300 1862
1301 config TOSHIBA !! 1863 config CPU_LOONGSON1
1302 tristate "Toshiba Laptop support" !! 1864 bool
1303 depends on X86_32 !! 1865 select CPU_MIPS32
1304 help !! 1866 select CPU_MIPSR1
1305 This adds a driver to safely access !! 1867 select CPU_HAS_PREFETCH
1306 the CPU on Toshiba portables with a !! 1868 select CPU_HAS_LOAD_STORE_LR
1307 not work on models with a Phoenix B !! 1869 select CPU_SUPPORTS_32BIT_KERNEL
1308 is used to set the BIOS and power s !! 1870 select CPU_SUPPORTS_HIGHMEM
>> 1871 select CPU_SUPPORTS_CPUFREQ
1309 1872
1310 For information on utilities to mak !! 1873 config CPU_BMIPS32_3300
1311 Toshiba Linux utilities web site at !! 1874 select SMP_UP if SMP
1312 <http://www.buzzard.org.uk/toshiba/ !! 1875 bool
1313 1876
1314 Say Y if you intend to run this ker !! 1877 config CPU_BMIPS4350
1315 Say N otherwise. !! 1878 bool
>> 1879 select SYS_SUPPORTS_SMP
>> 1880 select SYS_SUPPORTS_HOTPLUG_CPU
1316 1881
1317 config X86_REBOOTFIXUPS !! 1882 config CPU_BMIPS4380
1318 bool "Enable X86 board specific fixup !! 1883 bool
1319 depends on X86_32 !! 1884 select MIPS_L1_CACHE_SHIFT_6
1320 help !! 1885 select SYS_SUPPORTS_SMP
1321 This enables chipset and/or board s !! 1886 select SYS_SUPPORTS_HOTPLUG_CPU
1322 in order to get reboot to work corr !! 1887 select CPU_HAS_RIXI
1323 some combinations of hardware and B <<
1324 this config is intended, is when re <<
1325 system. <<
1326 1888
1327 Currently, the only fixup is for th !! 1889 config CPU_BMIPS5000
1328 CS5530A and CS5536 chipsets and the !! 1890 bool
>> 1891 select MIPS_CPU_SCACHE
>> 1892 select MIPS_L1_CACHE_SHIFT_7
>> 1893 select SYS_SUPPORTS_SMP
>> 1894 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1895 select CPU_HAS_RIXI
1329 1896
1330 Say Y if you want to enable the fix !! 1897 config SYS_HAS_CPU_LOONGSON3
1331 enable this option even if you don' !! 1898 bool
1332 Say N otherwise. !! 1899 select CPU_SUPPORTS_CPUFREQ
>> 1900 select CPU_HAS_RIXI
1333 1901
1334 config MICROCODE !! 1902 config SYS_HAS_CPU_LOONGSON2E
1335 def_bool y !! 1903 bool
1336 depends on CPU_SUP_AMD || CPU_SUP_INT <<
1337 1904
1338 config MICROCODE_INITRD32 !! 1905 config SYS_HAS_CPU_LOONGSON2F
1339 def_bool y !! 1906 bool
1340 depends on MICROCODE && X86_32 && BLK !! 1907 select CPU_SUPPORTS_CPUFREQ
>> 1908 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1909 select CPU_SUPPORTS_UNCACHED_ACCELERATED
1341 1910
1342 config MICROCODE_LATE_LOADING !! 1911 config SYS_HAS_CPU_LOONGSON1B
1343 bool "Late microcode loading (DANGERO !! 1912 bool
1344 default n <<
1345 depends on MICROCODE && SMP <<
1346 help <<
1347 Loading microcode late, when the sy <<
1348 is a tricky business and should be <<
1349 of synchronizing all cores and SMT <<
1350 not guarantee that cores might not <<
1351 use this at your own risk. Late loa <<
1352 microcode header indicates that it <<
1353 minimal revision check. This minima <<
1354 the kernel command line with "micro <<
1355 1913
1356 config MICROCODE_LATE_FORCE_MINREV !! 1914 config SYS_HAS_CPU_LOONGSON1C
1357 bool "Enforce late microcode loading !! 1915 bool
1358 default n <<
1359 depends on MICROCODE_LATE_LOADING <<
1360 help <<
1361 To prevent that users load microcod <<
1362 in use features, newer microcode pa <<
1363 in the microcode header, which tell <<
1364 revision must be active in the CPU <<
1365 late into the running system. If di <<
1366 be enforced but the kernel will be <<
1367 revision check fails. <<
1368 <<
1369 This minimal revision check can als <<
1370 "microcode.minrev" parameter on the <<
1371 <<
1372 If unsure say Y. <<
1373 <<
1374 config X86_MSR <<
1375 tristate "/dev/cpu/*/msr - Model-spec <<
1376 help <<
1377 This device gives privileged proces <<
1378 Model-Specific Registers (MSRs). I <<
1379 major 202 and minors 0 to 31 for /d <<
1380 MSR accesses are directed to a spec <<
1381 systems. <<
1382 1916
1383 config X86_CPUID !! 1917 config SYS_HAS_CPU_MIPS32_R1
1384 tristate "/dev/cpu/*/cpuid - CPU info !! 1918 bool
1385 help <<
1386 This device gives processes access <<
1387 be executed on a specific processor <<
1388 with major 203 and minors 0 to 31 f <<
1389 /dev/cpu/31/cpuid. <<
1390 1919
1391 choice !! 1920 config SYS_HAS_CPU_MIPS32_R2
1392 prompt "High Memory Support" !! 1921 bool
1393 default HIGHMEM4G <<
1394 depends on X86_32 <<
1395 <<
1396 config NOHIGHMEM <<
1397 bool "off" <<
1398 help <<
1399 Linux can use up to 64 Gigabytes of <<
1400 However, the address space of 32-bi <<
1401 Gigabytes large. That means that, i <<
1402 physical memory, not all of it can <<
1403 kernel. The physical memory that's <<
1404 "high memory". <<
1405 <<
1406 If you are compiling a kernel which <<
1407 more than 1 Gigabyte total physical <<
1408 choice and suitable for most users) <<
1409 split: 3GB are mapped so that each <<
1410 space and the remaining part of the <<
1411 by the kernel to permanently map as <<
1412 possible. <<
1413 <<
1414 If the machine has between 1 and 4 <<
1415 answer "4GB" here. <<
1416 <<
1417 If more than 4 Gigabytes is used th <<
1418 selection turns Intel PAE (Physical <<
1419 PAE implements 3-level paging on IA <<
1420 supported by Linux, PAE mode is imp <<
1421 processors (Pentium Pro and better) <<
1422 then the kernel will not boot on CP <<
1423 <<
1424 The actual amount of total physical <<
1425 auto detected or can be forced by u <<
1426 such as "mem=256M". (Try "man bootp <<
1427 your boot loader (lilo or loadlin) <<
1428 kernel at boot time.) <<
1429 <<
1430 If unsure, say "off". <<
1431 <<
1432 config HIGHMEM4G <<
1433 bool "4GB" <<
1434 help <<
1435 Select this if you have a 32-bit pr <<
1436 gigabytes of physical RAM. <<
1437 <<
1438 config HIGHMEM64G <<
1439 bool "64GB" <<
1440 depends on X86_HAVE_PAE <<
1441 select X86_PAE <<
1442 help <<
1443 Select this if you have a 32-bit pr <<
1444 gigabytes of physical RAM. <<
1445 1922
1446 endchoice !! 1923 config SYS_HAS_CPU_MIPS32_R3_5
>> 1924 bool
1447 1925
1448 choice !! 1926 config SYS_HAS_CPU_MIPS32_R5
1449 prompt "Memory split" if EXPERT !! 1927 bool
1450 default VMSPLIT_3G <<
1451 depends on X86_32 <<
1452 help <<
1453 Select the desired split between ke <<
1454 <<
1455 If the address range available to t <<
1456 physical memory installed, the rema <<
1457 as "high memory". Accessing high me <<
1458 than low memory, as it needs to be <<
1459 Note that increasing the kernel add <<
1460 available to user programs, making <<
1461 tighter. Selecting anything other <<
1462 will also likely make your kernel i <<
1463 kernel modules. <<
1464 <<
1465 If you are not absolutely sure what <<
1466 option alone! <<
1467 <<
1468 config VMSPLIT_3G <<
1469 bool "3G/1G user/kernel split <<
1470 config VMSPLIT_3G_OPT <<
1471 depends on !X86_PAE <<
1472 bool "3G/1G user/kernel split <<
1473 config VMSPLIT_2G <<
1474 bool "2G/2G user/kernel split <<
1475 config VMSPLIT_2G_OPT <<
1476 depends on !X86_PAE <<
1477 bool "2G/2G user/kernel split <<
1478 config VMSPLIT_1G <<
1479 bool "1G/3G user/kernel split <<
1480 endchoice <<
1481 1928
1482 config PAGE_OFFSET !! 1929 config SYS_HAS_CPU_MIPS32_R6
1483 hex !! 1930 bool
1484 default 0xB0000000 if VMSPLIT_3G_OPT <<
1485 default 0x80000000 if VMSPLIT_2G <<
1486 default 0x78000000 if VMSPLIT_2G_OPT <<
1487 default 0x40000000 if VMSPLIT_1G <<
1488 default 0xC0000000 <<
1489 depends on X86_32 <<
1490 1931
1491 config HIGHMEM !! 1932 config SYS_HAS_CPU_MIPS64_R1
1492 def_bool y !! 1933 bool
1493 depends on X86_32 && (HIGHMEM64G || H <<
1494 1934
1495 config X86_PAE !! 1935 config SYS_HAS_CPU_MIPS64_R2
1496 bool "PAE (Physical Address Extension !! 1936 bool
1497 depends on X86_32 && X86_HAVE_PAE <<
1498 select PHYS_ADDR_T_64BIT <<
1499 select SWIOTLB <<
1500 help <<
1501 PAE is required for NX support, and <<
1502 larger swapspace support for non-ov <<
1503 has the cost of more pagetable look <<
1504 consumes more pagetable space per p <<
1505 1937
1506 config X86_5LEVEL !! 1938 config SYS_HAS_CPU_MIPS64_R6
1507 bool "Enable 5-level page tables supp !! 1939 bool
1508 default y <<
1509 select DYNAMIC_MEMORY_LAYOUT <<
1510 select SPARSEMEM_VMEMMAP <<
1511 depends on X86_64 <<
1512 help <<
1513 5-level paging enables access to la <<
1514 up to 128 PiB of virtual address sp <<
1515 physical address space. <<
1516 1940
1517 It will be supported by future Inte !! 1941 config SYS_HAS_CPU_R3000
>> 1942 bool
1518 1943
1519 A kernel with the option enabled ca !! 1944 config SYS_HAS_CPU_TX39XX
1520 support 4- or 5-level paging. !! 1945 bool
1521 1946
1522 See Documentation/arch/x86/x86_64/5 !! 1947 config SYS_HAS_CPU_VR41XX
1523 information. !! 1948 bool
1524 1949
1525 Say N if unsure. !! 1950 config SYS_HAS_CPU_R4300
>> 1951 bool
1526 1952
1527 config X86_DIRECT_GBPAGES !! 1953 config SYS_HAS_CPU_R4X00
1528 def_bool y !! 1954 bool
1529 depends on X86_64 <<
1530 help <<
1531 Certain kernel features effectively <<
1532 linear 1 GB mappings (even if the C <<
1533 supports them), so don't confuse th <<
1534 that we have them enabled. <<
1535 <<
1536 config X86_CPA_STATISTICS <<
1537 bool "Enable statistic for Change Pag <<
1538 depends on DEBUG_FS <<
1539 help <<
1540 Expose statistics about the Change <<
1541 helps to determine the effectivenes <<
1542 page mappings when mapping protecti <<
1543 <<
1544 config X86_MEM_ENCRYPT <<
1545 select ARCH_HAS_FORCE_DMA_UNENCRYPTED <<
1546 select DYNAMIC_PHYSICAL_MASK <<
1547 def_bool n <<
1548 1955
1549 config AMD_MEM_ENCRYPT !! 1956 config SYS_HAS_CPU_TX49XX
1550 bool "AMD Secure Memory Encryption (S !! 1957 bool
1551 depends on X86_64 && CPU_SUP_AMD <<
1552 depends on EFI_STUB <<
1553 select DMA_COHERENT_POOL <<
1554 select ARCH_USE_MEMREMAP_PROT <<
1555 select INSTRUCTION_DECODER <<
1556 select ARCH_HAS_CC_PLATFORM <<
1557 select X86_MEM_ENCRYPT <<
1558 select UNACCEPTED_MEMORY <<
1559 help <<
1560 Say yes to enable support for the e <<
1561 This requires an AMD processor that <<
1562 Encryption (SME). <<
1563 1958
1564 # Common NUMA Features !! 1959 config SYS_HAS_CPU_R5000
1565 config NUMA !! 1960 bool
1566 bool "NUMA Memory Allocation and Sche <<
1567 depends on SMP <<
1568 depends on X86_64 || (X86_32 && HIGHM <<
1569 default y if X86_BIGSMP <<
1570 select USE_PERCPU_NUMA_NODE_ID <<
1571 select OF_NUMA if OF <<
1572 help <<
1573 Enable NUMA (Non-Uniform Memory Acc <<
1574 1961
1575 The kernel will try to allocate mem !! 1962 config SYS_HAS_CPU_R5432
1576 local memory controller of the CPU !! 1963 bool
1577 NUMA awareness to the kernel. <<
1578 1964
1579 For 64-bit this is recommended if t !! 1965 config SYS_HAS_CPU_R5500
1580 (or later), AMD Opteron, or EM64T N !! 1966 bool
1581 1967
1582 For 32-bit this is only needed if y !! 1968 config SYS_HAS_CPU_NEVADA
1583 kernel on a 64-bit NUMA platform. !! 1969 bool
1584 1970
1585 Otherwise, you should say N. !! 1971 config SYS_HAS_CPU_R8000
>> 1972 bool
1586 1973
1587 config AMD_NUMA !! 1974 config SYS_HAS_CPU_R10000
1588 def_bool y !! 1975 bool
1589 prompt "Old style AMD Opteron NUMA de <<
1590 depends on X86_64 && NUMA && PCI <<
1591 help <<
1592 Enable AMD NUMA node topology detec <<
1593 you have a multi processor AMD syst <<
1594 read the NUMA configuration directl <<
1595 of Opteron. It is recommended to us <<
1596 which also takes priority if both a <<
1597 1976
1598 config X86_64_ACPI_NUMA !! 1977 config SYS_HAS_CPU_RM7000
1599 def_bool y !! 1978 bool
1600 prompt "ACPI NUMA detection" <<
1601 depends on X86_64 && NUMA && ACPI && <<
1602 select ACPI_NUMA <<
1603 help <<
1604 Enable ACPI SRAT based node topolog <<
1605 1979
1606 config NODES_SHIFT !! 1980 config SYS_HAS_CPU_SB1
1607 int "Maximum NUMA Nodes (as a power o !! 1981 bool
1608 range 1 10 <<
1609 default "10" if MAXSMP <<
1610 default "6" if X86_64 <<
1611 default "3" <<
1612 depends on NUMA <<
1613 help <<
1614 Specify the maximum number of NUMA <<
1615 system. Increases memory reserved <<
1616 1982
1617 config ARCH_FLATMEM_ENABLE !! 1983 config SYS_HAS_CPU_CAVIUM_OCTEON
1618 def_bool y !! 1984 bool
1619 depends on X86_32 && !NUMA <<
1620 1985
1621 config ARCH_SPARSEMEM_ENABLE !! 1986 config SYS_HAS_CPU_BMIPS
1622 def_bool y !! 1987 bool
1623 depends on X86_64 || NUMA || X86_32 | <<
1624 select SPARSEMEM_STATIC if X86_32 <<
1625 select SPARSEMEM_VMEMMAP_ENABLE if X8 <<
1626 1988
1627 config ARCH_SPARSEMEM_DEFAULT !! 1989 config SYS_HAS_CPU_BMIPS32_3300
1628 def_bool X86_64 || (NUMA && X86_32) !! 1990 bool
>> 1991 select SYS_HAS_CPU_BMIPS
1629 1992
1630 config ARCH_SELECT_MEMORY_MODEL !! 1993 config SYS_HAS_CPU_BMIPS4350
1631 def_bool y !! 1994 bool
1632 depends on ARCH_SPARSEMEM_ENABLE && A !! 1995 select SYS_HAS_CPU_BMIPS
1633 1996
1634 config ARCH_MEMORY_PROBE !! 1997 config SYS_HAS_CPU_BMIPS4380
1635 bool "Enable sysfs memory/probe inter !! 1998 bool
1636 depends on MEMORY_HOTPLUG !! 1999 select SYS_HAS_CPU_BMIPS
1637 help <<
1638 This option enables a sysfs memory/ <<
1639 See Documentation/admin-guide/mm/me <<
1640 If you are unsure how to answer thi <<
1641 2000
1642 config ARCH_PROC_KCORE_TEXT !! 2001 config SYS_HAS_CPU_BMIPS5000
1643 def_bool y !! 2002 bool
1644 depends on X86_64 && PROC_KCORE !! 2003 select SYS_HAS_CPU_BMIPS
1645 2004
1646 config ILLEGAL_POINTER_VALUE !! 2005 config SYS_HAS_CPU_XLR
1647 hex !! 2006 bool
1648 default 0 if X86_32 <<
1649 default 0xdead000000000000 if X86_64 <<
1650 <<
1651 config X86_PMEM_LEGACY_DEVICE <<
1652 bool <<
1653 <<
1654 config X86_PMEM_LEGACY <<
1655 tristate "Support non-standard NVDIMM <<
1656 depends on PHYS_ADDR_T_64BIT <<
1657 depends on BLK_DEV <<
1658 select X86_PMEM_LEGACY_DEVICE <<
1659 select NUMA_KEEP_MEMINFO if NUMA <<
1660 select LIBNVDIMM <<
1661 help <<
1662 Treat memory marked using the non-s <<
1663 by the Intel Sandy Bridge-EP refere <<
1664 The kernel will offer these regions <<
1665 they can be used for persistent sto <<
1666 <<
1667 Say Y if unsure. <<
1668 <<
1669 config HIGHPTE <<
1670 bool "Allocate 3rd-level pagetables f <<
1671 depends on HIGHMEM <<
1672 help <<
1673 The VM uses one page table entry fo <<
1674 For systems with a lot of RAM, this <<
1675 low memory. Setting this option wi <<
1676 entries in high memory. <<
1677 <<
1678 config X86_CHECK_BIOS_CORRUPTION <<
1679 bool "Check for low memory corruption <<
1680 help <<
1681 Periodically check for memory corru <<
1682 is suspected to be caused by BIOS. <<
1683 configuration, it is disabled at ru <<
1684 setting "memory_corruption_check=1" <<
1685 line. By default it scans the low <<
1686 seconds; see the memory_corruption_ <<
1687 memory_corruption_check_period para <<
1688 Documentation/admin-guide/kernel-pa <<
1689 <<
1690 When enabled with the default param <<
1691 almost no overhead, as it reserves <<
1692 of memory and scans it infrequently <<
1693 and prevents it from affecting the <<
1694 <<
1695 It is, however, intended as a diagn <<
1696 BIOS-originated corruption always a <<
1697 you can use memmap= to prevent the <<
1698 memory. <<
1699 <<
1700 config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK <<
1701 bool "Set the default setting of memo <<
1702 depends on X86_CHECK_BIOS_CORRUPTION <<
1703 default y <<
1704 help <<
1705 Set whether the default state of me <<
1706 on or off. <<
1707 <<
1708 config MATH_EMULATION <<
1709 bool <<
1710 depends on MODIFY_LDT_SYSCALL <<
1711 prompt "Math emulation" if X86_32 && <<
1712 help <<
1713 Linux can emulate a math coprocesso <<
1714 operations) if you don't have one. <<
1715 a math coprocessor built in, 486SX <<
1716 a 487DX or 387, respectively. (The <<
1717 give you some hints here ["man dmes <<
1718 coprocessor or this emulation. <<
1719 <<
1720 If you don't have a math coprocesso <<
1721 say Y here even though you have a c <<
1722 be used nevertheless. (This behavio <<
1723 command line option "no387", which <<
1724 is broken. Try "man bootparam" or s <<
1725 loader (lilo or loadlin) about how <<
1726 boot time.) This means that it is a <<
1727 intend to use this kernel on differ <<
1728 2007
1729 More information about the internal !! 2008 config SYS_HAS_CPU_XLP
1730 emulation can be found in <file:arc !! 2009 bool
1731 2010
1732 If you are not sure, say Y; apart f !! 2011 #
1733 kernel, it won't hurt. !! 2012 # CPU may reorder R->R, R->W, W->R, W->W
>> 2013 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 2014 #
>> 2015 config WEAK_ORDERING
>> 2016 bool
1734 2017
1735 config MTRR !! 2018 #
1736 def_bool y !! 2019 # CPU may reorder reads and writes beyond LL/SC
1737 prompt "MTRR (Memory Type Range Regis !! 2020 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1738 help !! 2021 #
1739 On Intel P6 family processors (Pent !! 2022 config WEAK_REORDERING_BEYOND_LLSC
1740 the Memory Type Range Registers (MT !! 2023 bool
1741 processor access to memory ranges. !! 2024 endmenu
1742 a video (VGA) card on a PCI or AGP <<
1743 allows bus write transfers to be co <<
1744 before bursting over the PCI/AGP bu <<
1745 of image write operations 2.5 times <<
1746 /proc/mtrr file which may be used t <<
1747 MTRRs. Typically the X server shoul <<
1748 <<
1749 This code has a reasonably generic <<
1750 control registers on other processo <<
1751 as well: <<
1752 <<
1753 The Cyrix 6x86, 6x86MX and M II pro <<
1754 Registers (ARRs) which provide a si <<
1755 these, the ARRs are used to emulate <<
1756 The AMD K6-2 (stepping 8 and above) <<
1757 MTRRs. The Centaur C6 (WinChip) has <<
1758 write-combining. All of these proce <<
1759 and it makes sense to say Y here if <<
1760 <<
1761 Saying Y here also fixes a problem <<
1762 set the MTRRs for the boot CPU and <<
1763 can lead to all sorts of problems, <<
1764 2025
1765 You can safely say Y even if your m !! 2026 #
1766 just add about 9 KB to your kernel. !! 2027 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2028 #
>> 2029 config CPU_MIPS32
>> 2030 bool
>> 2031 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
1767 2032
1768 See <file:Documentation/arch/x86/mt !! 2033 config CPU_MIPS64
>> 2034 bool
>> 2035 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
1769 2036
1770 config MTRR_SANITIZER !! 2037 #
1771 def_bool y !! 2038 # These two indicate the revision of the architecture, either Release 1 or Release 2
1772 prompt "MTRR cleanup support" !! 2039 #
1773 depends on MTRR !! 2040 config CPU_MIPSR1
1774 help !! 2041 bool
1775 Convert MTRR layout from continuous !! 2042 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1776 add writeback entries. <<
1777 2043
1778 Can be disabled with disable_mtrr_c !! 2044 config CPU_MIPSR2
1779 The largest mtrr entry size for a c !! 2045 bool
1780 mtrr_chunk_size. !! 2046 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2047 select CPU_HAS_RIXI
>> 2048 select MIPS_SPRAM
1781 2049
1782 If unsure, say Y. !! 2050 config CPU_MIPSR6
>> 2051 bool
>> 2052 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2053 select CPU_HAS_RIXI
>> 2054 select HAVE_ARCH_BITREVERSE
>> 2055 select MIPS_ASID_BITS_VARIABLE
>> 2056 select MIPS_CRC_SUPPORT
>> 2057 select MIPS_SPRAM
1783 2058
1784 config MTRR_SANITIZER_ENABLE_DEFAULT !! 2059 config EVA
1785 int "MTRR cleanup enable value (0-1)" !! 2060 bool
1786 range 0 1 <<
1787 default "0" <<
1788 depends on MTRR_SANITIZER <<
1789 help <<
1790 Enable mtrr cleanup default value <<
1791 <<
1792 config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT <<
1793 int "MTRR cleanup spare reg num (0-7) <<
1794 range 0 7 <<
1795 default "1" <<
1796 depends on MTRR_SANITIZER <<
1797 help <<
1798 mtrr cleanup spare entries default, <<
1799 mtrr_spare_reg_nr=N on the kernel c <<
1800 2061
1801 config X86_PAT !! 2062 config XPA
1802 def_bool y !! 2063 bool
1803 prompt "x86 PAT support" if EXPERT <<
1804 depends on MTRR <<
1805 select ARCH_USES_PG_ARCH_2 <<
1806 help <<
1807 Use PAT attributes to setup page le <<
1808 2064
1809 PATs are the modern equivalents of !! 2065 config SYS_SUPPORTS_32BIT_KERNEL
1810 flexible than MTRRs. !! 2066 bool
>> 2067 config SYS_SUPPORTS_64BIT_KERNEL
>> 2068 bool
>> 2069 config CPU_SUPPORTS_32BIT_KERNEL
>> 2070 bool
>> 2071 config CPU_SUPPORTS_64BIT_KERNEL
>> 2072 bool
>> 2073 config CPU_SUPPORTS_CPUFREQ
>> 2074 bool
>> 2075 config CPU_SUPPORTS_ADDRWINCFG
>> 2076 bool
>> 2077 config CPU_SUPPORTS_HUGEPAGES
>> 2078 bool
>> 2079 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2080 bool
>> 2081 config MIPS_PGD_C0_CONTEXT
>> 2082 bool
>> 2083 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
1811 2084
1812 Say N here if you see bootup proble !! 2085 #
1813 spontaneous reboots) or a non-worki !! 2086 # Set to y for ptrace access to watch registers.
>> 2087 #
>> 2088 config HARDWARE_WATCHPOINTS
>> 2089 bool
>> 2090 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
1814 2091
1815 If unsure, say Y. !! 2092 menu "Kernel type"
1816 2093
1817 config X86_UMIP !! 2094 choice
1818 def_bool y !! 2095 prompt "Kernel code model"
1819 prompt "User Mode Instruction Prevent !! 2096 help
>> 2097 You should only select this option if you have a workload that
>> 2098 actually benefits from 64-bit processing or if your machine has
>> 2099 large memory. You will only be presented a single option in this
>> 2100 menu if your system does not support both 32-bit and 64-bit kernels.
>> 2101
>> 2102 config 32BIT
>> 2103 bool "32-bit kernel"
>> 2104 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2105 select TRAD_SIGNALS
1820 help 2106 help
1821 User Mode Instruction Prevention (U !! 2107 Select this option if you want to build a 32-bit kernel.
1822 some x86 processors. If enabled, a <<
1823 issued if the SGDT, SLDT, SIDT, SMS <<
1824 executed in user mode. These instru <<
1825 information about the hardware stat <<
1826 <<
1827 The vast majority of applications d <<
1828 For the very few that do, software <<
1829 specific cases in protected and vir <<
1830 results are dummy. <<
1831 <<
1832 config CC_HAS_IBT <<
1833 # GCC >= 9 and binutils >= 2.29 <<
1834 # Retpoline check to work around http <<
1835 # Clang/LLVM >= 14 <<
1836 # https://github.com/llvm/llvm-projec <<
1837 # https://github.com/llvm/llvm-projec <<
1838 def_bool ((CC_IS_GCC && $(cc-option, <<
1839 (CC_IS_CLANG && CLANG_VERSI <<
1840 $(as-instr,endbr64) <<
1841 2108
1842 config X86_CET !! 2109 config 64BIT
1843 def_bool n !! 2110 bool "64-bit kernel"
>> 2111 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
1844 help 2112 help
1845 CET features configured (Shadow sta !! 2113 Select this option if you want to build a 64-bit kernel.
1846 2114
1847 config X86_KERNEL_IBT !! 2115 endchoice
1848 prompt "Indirect Branch Tracking" <<
1849 def_bool y <<
1850 depends on X86_64 && CC_HAS_IBT && HA <<
1851 # https://github.com/llvm/llvm-projec <<
1852 depends on !LD_IS_LLD || LLD_VERSION <<
1853 select OBJTOOL <<
1854 select X86_CET <<
1855 help <<
1856 Build the kernel with support for I <<
1857 hardware support course-grain forwa <<
1858 protection. It enforces that all in <<
1859 an ENDBR instruction, as such, the <<
1860 code with them to make this happen. <<
1861 <<
1862 In addition to building the kernel <<
1863 are not indirect call targets, avoi <<
1864 <<
1865 This requires LTO like objtool runs <<
1866 does significantly reduce the numbe <<
1867 kernel image. <<
1868 2116
1869 config X86_INTEL_MEMORY_PROTECTION_KEYS !! 2117 config KVM_GUEST
1870 prompt "Memory Protection Keys" !! 2118 bool "KVM Guest Kernel"
1871 def_bool y !! 2119 depends on BROKEN_ON_SMP
1872 # Note: only available in 64-bit mode <<
1873 depends on X86_64 && (CPU_SUP_INTEL | <<
1874 select ARCH_USES_HIGH_VMA_FLAGS <<
1875 select ARCH_HAS_PKEYS <<
1876 help 2120 help
1877 Memory Protection Keys provides a m !! 2121 Select this option if building a guest kernel for KVM (Trap & Emulate)
1878 page-based protections, but without !! 2122 mode.
1879 page tables when an application cha <<
1880 2123
1881 For details, see Documentation/core !! 2124 config KVM_GUEST_TIMER_FREQ
>> 2125 int "Count/Compare Timer Frequency (MHz)"
>> 2126 depends on KVM_GUEST
>> 2127 default 100
>> 2128 help
>> 2129 Set this to non-zero if building a guest kernel for KVM to skip RTC
>> 2130 emulation when determining guest CPU Frequency. Instead, the guest's
>> 2131 timer frequency is specified directly.
1882 2132
1883 If unsure, say y. !! 2133 config MIPS_VA_BITS_48
>> 2134 bool "48 bits virtual memory"
>> 2135 depends on 64BIT
>> 2136 help
>> 2137 Support a maximum at least 48 bits of application virtual
>> 2138 memory. Default is 40 bits or less, depending on the CPU.
>> 2139 For page sizes 16k and above, this option results in a small
>> 2140 memory overhead for page tables. For 4k page size, a fourth
>> 2141 level of page tables is added which imposes both a memory
>> 2142 overhead as well as slower TLB fault handling.
1884 2143
1885 config ARCH_PKEY_BITS !! 2144 If unsure, say N.
1886 int <<
1887 default 4 <<
1888 2145
1889 choice 2146 choice
1890 prompt "TSX enable mode" !! 2147 prompt "Kernel page size"
1891 depends on CPU_SUP_INTEL !! 2148 default PAGE_SIZE_4KB
1892 default X86_INTEL_TSX_MODE_OFF <<
1893 help <<
1894 Intel's TSX (Transactional Synchron <<
1895 allows to optimize locking protocol <<
1896 can lead to a noticeable performanc <<
1897 2149
1898 On the other hand it has been shown !! 2150 config PAGE_SIZE_4KB
1899 to form side channel attacks (e.g. !! 2151 bool "4kB"
1900 will be more of those attacks disco !! 2152 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
>> 2153 help
>> 2154 This option select the standard 4kB Linux page size. On some
>> 2155 R3000-family processors this is the only available page size. Using
>> 2156 4kB page size will minimize memory consumption and is therefore
>> 2157 recommended for low memory systems.
>> 2158
>> 2159 config PAGE_SIZE_8KB
>> 2160 bool "8kB"
>> 2161 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
>> 2162 depends on !MIPS_VA_BITS_48
>> 2163 help
>> 2164 Using 8kB page size will result in higher performance kernel at
>> 2165 the price of higher memory consumption. This option is available
>> 2166 only on R8000 and cnMIPS processors. Note that you will need a
>> 2167 suitable Linux distribution to support this.
>> 2168
>> 2169 config PAGE_SIZE_16KB
>> 2170 bool "16kB"
>> 2171 depends on !CPU_R3000 && !CPU_TX39XX
>> 2172 help
>> 2173 Using 16kB page size will result in higher performance kernel at
>> 2174 the price of higher memory consumption. This option is available on
>> 2175 all non-R3000 family processors. Note that you will need a suitable
>> 2176 Linux distribution to support this.
>> 2177
>> 2178 config PAGE_SIZE_32KB
>> 2179 bool "32kB"
>> 2180 depends on CPU_CAVIUM_OCTEON
>> 2181 depends on !MIPS_VA_BITS_48
>> 2182 help
>> 2183 Using 32kB page size will result in higher performance kernel at
>> 2184 the price of higher memory consumption. This option is available
>> 2185 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2186 distribution to support this.
>> 2187
>> 2188 config PAGE_SIZE_64KB
>> 2189 bool "64kB"
>> 2190 depends on !CPU_R3000 && !CPU_TX39XX
>> 2191 help
>> 2192 Using 64kB page size will result in higher performance kernel at
>> 2193 the price of higher memory consumption. This option is available on
>> 2194 all non-R3000 family processor. Not that at the time of this
>> 2195 writing this option is still high experimental.
1901 2196
1902 Therefore TSX is not enabled by def !! 2197 endchoice
1903 might override this decision by tsx <<
1904 Even with TSX enabled, the kernel w <<
1905 possible TAA mitigation setting dep <<
1906 for the particular machine. <<
1907 2198
1908 This option allows to set the defau !! 2199 config FORCE_MAX_ZONEORDER
1909 and =auto. See Documentation/admin- !! 2200 int "Maximum zone order"
1910 details. !! 2201 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2202 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2203 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2204 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2205 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2206 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2207 range 11 64
>> 2208 default "11"
>> 2209 help
>> 2210 The kernel memory allocator divides physically contiguous memory
>> 2211 blocks into "zones", where each zone is a power of two number of
>> 2212 pages. This option selects the largest power of two that the kernel
>> 2213 keeps in the memory allocator. If you need to allocate very large
>> 2214 blocks of physically contiguous memory, then you may need to
>> 2215 increase this value.
1911 2216
1912 Say off if not sure, auto if TSX is !! 2217 This config option is actually maximum order plus one. For example,
1913 platforms or on if TSX is in use an !! 2218 a value of 11 means that the largest free memory block is 2^10 pages.
1914 relevant. <<
1915 2219
1916 config X86_INTEL_TSX_MODE_OFF !! 2220 The page size is not necessarily 4KB. Keep this in mind
1917 bool "off" !! 2221 when choosing a value for this option.
1918 help <<
1919 TSX is disabled if possible - equal <<
1920 2222
1921 config X86_INTEL_TSX_MODE_ON !! 2223 config BOARD_SCACHE
1922 bool "on" !! 2224 bool
1923 help <<
1924 TSX is always enabled on TSX capabl <<
1925 line parameter. <<
1926 <<
1927 config X86_INTEL_TSX_MODE_AUTO <<
1928 bool "auto" <<
1929 help <<
1930 TSX is enabled on TSX capable HW th <<
1931 side channel attacks- equals the ts <<
1932 endchoice <<
1933 2225
1934 config X86_SGX !! 2226 config IP22_CPU_SCACHE
1935 bool "Software Guard eXtensions (SGX) !! 2227 bool
1936 depends on X86_64 && CPU_SUP_INTEL && !! 2228 select BOARD_SCACHE
1937 depends on CRYPTO=y <<
1938 depends on CRYPTO_SHA256=y <<
1939 select MMU_NOTIFIER <<
1940 select NUMA_KEEP_MEMINFO if NUMA <<
1941 select XARRAY_MULTI <<
1942 help <<
1943 Intel(R) Software Guard eXtensions <<
1944 that can be used by applications to <<
1945 and data, referred to as enclaves. <<
1946 only be accessed by code running wi <<
1947 outside the enclave, including othe <<
1948 hardware. <<
1949 2229
1950 If unsure, say N. !! 2230 #
>> 2231 # Support for a MIPS32 / MIPS64 style S-caches
>> 2232 #
>> 2233 config MIPS_CPU_SCACHE
>> 2234 bool
>> 2235 select BOARD_SCACHE
1951 2236
1952 config X86_USER_SHADOW_STACK !! 2237 config R5000_CPU_SCACHE
1953 bool "X86 userspace shadow stack" !! 2238 bool
1954 depends on AS_WRUSS !! 2239 select BOARD_SCACHE
1955 depends on X86_64 <<
1956 select ARCH_USES_HIGH_VMA_FLAGS <<
1957 select X86_CET <<
1958 help <<
1959 Shadow stack protection is a hardwa <<
1960 return address corruption. This he <<
1961 Applications must be enabled to use <<
1962 get protection "for free". <<
1963 2240
1964 CPUs supporting shadow stacks were !! 2241 config RM7000_CPU_SCACHE
>> 2242 bool
>> 2243 select BOARD_SCACHE
1965 2244
1966 See Documentation/arch/x86/shstk.rs !! 2245 config SIBYTE_DMA_PAGEOPS
>> 2246 bool "Use DMA to clear/copy pages"
>> 2247 depends on CPU_SB1
>> 2248 help
>> 2249 Instead of using the CPU to zero and copy pages, use a Data Mover
>> 2250 channel. These DMA channels are otherwise unused by the standard
>> 2251 SiByte Linux port. Seems to give a small performance benefit.
1967 2252
1968 If unsure, say N. !! 2253 config CPU_HAS_PREFETCH
>> 2254 bool
1969 2255
1970 config INTEL_TDX_HOST !! 2256 config CPU_GENERIC_DUMP_TLB
1971 bool "Intel Trust Domain Extensions ( !! 2257 bool
1972 depends on CPU_SUP_INTEL !! 2258 default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX)
1973 depends on X86_64 <<
1974 depends on KVM_INTEL <<
1975 depends on X86_X2APIC <<
1976 select ARCH_KEEP_MEMBLOCK <<
1977 depends on CONTIG_ALLOC <<
1978 depends on !KEXEC_CORE <<
1979 depends on X86_MCE <<
1980 help <<
1981 Intel Trust Domain Extensions (TDX) <<
1982 host and certain physical attacks. <<
1983 support in the host kernel to run c <<
1984 2259
1985 If unsure, say N. !! 2260 config CPU_R4K_FPU
>> 2261 bool
>> 2262 default y if !(CPU_R3000 || CPU_TX39XX)
1986 2263
1987 config EFI !! 2264 config CPU_R4K_CACHE_TLB
1988 bool "EFI runtime service support" !! 2265 bool
1989 depends on ACPI !! 2266 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
1990 select UCS2_STRING <<
1991 select EFI_RUNTIME_WRAPPERS <<
1992 select ARCH_USE_MEMREMAP_PROT <<
1993 select EFI_RUNTIME_MAP if KEXEC_CORE <<
1994 help <<
1995 This enables the kernel to use EFI <<
1996 available (such as the EFI variable <<
1997 <<
1998 This option is only useful on syste <<
1999 In addition, you should use the lat <<
2000 at <http://elilo.sourceforge.net> i <<
2001 of EFI runtime services. However, e <<
2002 resultant kernel should continue to <<
2003 platforms. <<
2004 <<
2005 config EFI_STUB <<
2006 bool "EFI stub support" <<
2007 depends on EFI <<
2008 select RELOCATABLE <<
2009 help <<
2010 This kernel feature allows a bzImag <<
2011 by EFI firmware without the use of <<
2012 <<
2013 See Documentation/admin-guide/efi-s <<
2014 <<
2015 config EFI_HANDOVER_PROTOCOL <<
2016 bool "EFI handover protocol (DEPRECAT <<
2017 depends on EFI_STUB <<
2018 default y <<
2019 help <<
2020 Select this in order to include sup <<
2021 handover protocol, which defines al <<
2022 EFI stub. This is a practice that <<
2023 specification, and requires a prior <<
2024 bootloader about Linux/x86 specific <<
2025 and initrd, and where in memory tho <<
2026 <<
2027 If in doubt, say Y. Even though the <<
2028 present in upstream GRUB or other b <<
2029 GRUB with numerous downstream patch <<
2030 handover protocol as as result. <<
2031 <<
2032 config EFI_MIXED <<
2033 bool "EFI mixed-mode support" <<
2034 depends on EFI_STUB && X86_64 <<
2035 help <<
2036 Enabling this feature allows a 64-b <<
2037 on a 32-bit firmware, provided that <<
2038 mode. <<
2039 2267
2040 Note that it is not possible to boo !! 2268 config MIPS_MT_SMP
2041 kernel via the EFI boot stub - a bo !! 2269 bool "MIPS MT SMP support (1 TC on each available VPE)"
2042 the EFI handover protocol must be u !! 2270 default y
>> 2271 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2272 select CPU_MIPSR2_IRQ_VI
>> 2273 select CPU_MIPSR2_IRQ_EI
>> 2274 select SYNC_R4K
>> 2275 select MIPS_MT
>> 2276 select SMP
>> 2277 select SMP_UP
>> 2278 select SYS_SUPPORTS_SMP
>> 2279 select SYS_SUPPORTS_SCHED_SMT
>> 2280 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2281 help
>> 2282 This is a kernel model which is known as SMVP. This is supported
>> 2283 on cores with the MT ASE and uses the available VPEs to implement
>> 2284 virtual processors which supports SMP. This is equivalent to the
>> 2285 Intel Hyperthreading feature. For further information go to
>> 2286 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2043 2287
2044 If unsure, say N. !! 2288 config MIPS_MT
>> 2289 bool
2045 2290
2046 config EFI_RUNTIME_MAP !! 2291 config SCHED_SMT
2047 bool "Export EFI runtime maps to sysf !! 2292 bool "SMT (multithreading) scheduler support"
2048 depends on EFI !! 2293 depends on SYS_SUPPORTS_SCHED_SMT
>> 2294 default n
2049 help 2295 help
2050 Export EFI runtime memory regions t !! 2296 SMT scheduler support improves the CPU scheduler's decision making
2051 That memory map is required by the !! 2297 when dealing with MIPS MT enabled cores at a cost of slightly
2052 mappings after kexec, but can also !! 2298 increased overhead in some places. If unsure say N here.
2053 <<
2054 See also Documentation/ABI/testing/ <<
2055 2299
2056 source "kernel/Kconfig.hz" !! 2300 config SYS_SUPPORTS_SCHED_SMT
>> 2301 bool
2057 2302
2058 config ARCH_SUPPORTS_KEXEC !! 2303 config SYS_SUPPORTS_MULTITHREADING
2059 def_bool y !! 2304 bool
2060 2305
2061 config ARCH_SUPPORTS_KEXEC_FILE !! 2306 config MIPS_MT_FPAFF
2062 def_bool X86_64 !! 2307 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2308 default y
>> 2309 depends on MIPS_MT_SMP
2063 2310
2064 config ARCH_SELECTS_KEXEC_FILE !! 2311 config MIPSR2_TO_R6_EMULATOR
2065 def_bool y !! 2312 bool "MIPS R2-to-R6 emulator"
2066 depends on KEXEC_FILE !! 2313 depends on CPU_MIPSR6
2067 select HAVE_IMA_KEXEC if IMA !! 2314 default y
>> 2315 help
>> 2316 Choose this option if you want to run non-R6 MIPS userland code.
>> 2317 Even if you say 'Y' here, the emulator will still be disabled by
>> 2318 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2319 The only reason this is a build-time option is to save ~14K from the
>> 2320 final kernel image.
2068 2321
2069 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2322 config SYS_SUPPORTS_VPE_LOADER
2070 def_bool y !! 2323 bool
>> 2324 depends on SYS_SUPPORTS_MULTITHREADING
>> 2325 help
>> 2326 Indicates that the platform supports the VPE loader, and provides
>> 2327 physical_memsize.
2071 2328
2072 config ARCH_SUPPORTS_KEXEC_SIG !! 2329 config MIPS_VPE_LOADER
2073 def_bool y !! 2330 bool "VPE loader support."
>> 2331 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2332 select CPU_MIPSR2_IRQ_VI
>> 2333 select CPU_MIPSR2_IRQ_EI
>> 2334 select MIPS_MT
>> 2335 help
>> 2336 Includes a loader for loading an elf relocatable object
>> 2337 onto another VPE and running it.
2074 2338
2075 config ARCH_SUPPORTS_KEXEC_SIG_FORCE !! 2339 config MIPS_VPE_LOADER_CMP
2076 def_bool y !! 2340 bool
>> 2341 default "y"
>> 2342 depends on MIPS_VPE_LOADER && MIPS_CMP
2077 2343
2078 config ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG !! 2344 config MIPS_VPE_LOADER_MT
2079 def_bool y !! 2345 bool
>> 2346 default "y"
>> 2347 depends on MIPS_VPE_LOADER && !MIPS_CMP
2080 2348
2081 config ARCH_SUPPORTS_KEXEC_JUMP !! 2349 config MIPS_VPE_LOADER_TOM
2082 def_bool y !! 2350 bool "Load VPE program into memory hidden from linux"
>> 2351 depends on MIPS_VPE_LOADER
>> 2352 default y
>> 2353 help
>> 2354 The loader can use memory that is present but has been hidden from
>> 2355 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2356 you to ensure the amount you put in the option and the space your
>> 2357 program requires is less or equal to the amount physically present.
2083 2358
2084 config ARCH_SUPPORTS_CRASH_DUMP !! 2359 config MIPS_VPE_APSP_API
2085 def_bool X86_64 || (X86_32 && HIGHMEM !! 2360 bool "Enable support for AP/SP API (RTLX)"
>> 2361 depends on MIPS_VPE_LOADER
2086 2362
2087 config ARCH_SUPPORTS_CRASH_HOTPLUG !! 2363 config MIPS_VPE_APSP_API_CMP
2088 def_bool y !! 2364 bool
>> 2365 default "y"
>> 2366 depends on MIPS_VPE_APSP_API && MIPS_CMP
2089 2367
2090 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATI !! 2368 config MIPS_VPE_APSP_API_MT
2091 def_bool CRASH_RESERVE !! 2369 bool
>> 2370 default "y"
>> 2371 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2092 2372
2093 config PHYSICAL_START !! 2373 config MIPS_CMP
2094 hex "Physical address where the kerne !! 2374 bool "MIPS CMP framework support (DEPRECATED)"
2095 default "0x1000000" !! 2375 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2376 select SMP
>> 2377 select SYNC_R4K
>> 2378 select SYS_SUPPORTS_SMP
>> 2379 select WEAK_ORDERING
>> 2380 default n
2096 help 2381 help
2097 This gives the physical address whe !! 2382 Select this if you are using a bootloader which implements the "CMP
>> 2383 framework" protocol (ie. YAMON) and want your kernel to make use of
>> 2384 its ability to start secondary CPUs.
>> 2385
>> 2386 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2387 instead of this.
>> 2388
>> 2389 config MIPS_CPS
>> 2390 bool "MIPS Coherent Processing System support"
>> 2391 depends on SYS_SUPPORTS_MIPS_CPS
>> 2392 select MIPS_CM
>> 2393 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2394 select SMP
>> 2395 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2396 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2397 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2398 select SYS_SUPPORTS_SMP
>> 2399 select WEAK_ORDERING
>> 2400 help
>> 2401 Select this if you wish to run an SMP kernel across multiple cores
>> 2402 within a MIPS Coherent Processing System. When this option is
>> 2403 enabled the kernel will probe for other cores and boot them with
>> 2404 no external assistance. It is safe to enable this when hardware
>> 2405 support is unavailable.
2098 2406
2099 If the kernel is not relocatable (C !! 2407 config MIPS_CPS_PM
2100 will decompress itself to above phy !! 2408 depends on MIPS_CPS
2101 Otherwise, bzImage will run from th !! 2409 bool
2102 by the boot loader. The only except <<
2103 above physical address, in which ca <<
2104 <<
2105 In normal kdump cases one does not <<
2106 as now bzImage can be compiled as a <<
2107 (CONFIG_RELOCATABLE=y) and be used <<
2108 address. This option is mainly usef <<
2109 to use a bzImage for capturing the <<
2110 vmlinux instead. vmlinux is not rel <<
2111 to be specifically compiled to run <<
2112 (normally a reserved region) and th <<
2113 <<
2114 So if you are using bzImage for cap <<
2115 leave the value here unchanged to 0 <<
2116 CONFIG_RELOCATABLE=y. Otherwise if <<
2117 for capturing the crash dump change <<
2118 the reserved region. In other word <<
2119 the "X" value as specified in the " <<
2120 command line boot parameter passed <<
2121 kernel. Please take a look at Docum <<
2122 for more details about crash dumps. <<
2123 <<
2124 Usage of bzImage for capturing the <<
2125 one does not have to build two kern <<
2126 as production kernel and capture ke <<
2127 gone away after relocatable bzImage <<
2128 is present because there are users <<
2129 vmlinux for dump capture. This opti <<
2130 line. <<
2131 2410
2132 Don't change this unless you know w !! 2411 config MIPS_CM
>> 2412 bool
>> 2413 select MIPS_CPC
2133 2414
2134 config RELOCATABLE !! 2415 config MIPS_CPC
2135 bool "Build a relocatable kernel" !! 2416 bool
2136 default y <<
2137 help <<
2138 This builds a kernel image that ret <<
2139 so it can be loaded someplace besid <<
2140 The relocations tend to make the ke <<
2141 but are discarded at runtime. <<
2142 2417
2143 One use is for the kexec on panic c !! 2418 config SB1_PASS_2_WORKAROUNDS
2144 must live at a different physical a !! 2419 bool
2145 kernel. !! 2420 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2146 !! 2421 default y
2147 Note: If CONFIG_RELOCATABLE=y, then <<
2148 it has been loaded at and the compi <<
2149 (CONFIG_PHYSICAL_START) is used as <<
2150 2422
2151 config RANDOMIZE_BASE !! 2423 config SB1_PASS_2_1_WORKAROUNDS
2152 bool "Randomize the address of the ke !! 2424 bool
2153 depends on RELOCATABLE !! 2425 depends on CPU_SB1 && CPU_SB1_PASS_2
2154 default y 2426 default y
2155 help <<
2156 In support of Kernel Address Space <<
2157 this randomizes the physical addres <<
2158 is decompressed and the virtual add <<
2159 image is mapped, as a security feat <<
2160 attempts relying on knowledge of th <<
2161 code internals. <<
2162 <<
2163 On 64-bit, the kernel physical and <<
2164 randomized separately. The physical <<
2165 between 16MB and the top of physica <<
2166 virtual address will be randomized <<
2167 of entropy). Note that this also re <<
2168 available to kernel modules from 1. <<
2169 <<
2170 On 32-bit, the kernel physical and <<
2171 randomized together. They will be r <<
2172 512MB (8 bits of entropy). <<
2173 <<
2174 Entropy is generated using the RDRA <<
2175 supported. If RDTSC is supported, i <<
2176 the entropy pool as well. If neithe <<
2177 supported, then entropy is read fro <<
2178 usable entropy is limited by the ke <<
2179 2GB addressing, and that PHYSICAL_A <<
2180 minimum of 2MB. As a result, only 1 <<
2181 theoretically possible, but the imp <<
2182 limited due to memory layouts. <<
2183 2427
2184 If unsure, say Y. <<
2185 2428
2186 # Relocation on x86 needs some additional bui !! 2429 choice
2187 config X86_NEED_RELOCS !! 2430 prompt "SmartMIPS or microMIPS ASE support"
2188 def_bool y <<
2189 depends on RANDOMIZE_BASE || (X86_32 <<
2190 2431
2191 config PHYSICAL_ALIGN !! 2432 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2192 hex "Alignment value to which kernel !! 2433 bool "None"
2193 default "0x200000" <<
2194 range 0x2000 0x1000000 if X86_32 <<
2195 range 0x200000 0x1000000 if X86_64 <<
2196 help 2434 help
2197 This value puts the alignment restr !! 2435 Select this if you want neither microMIPS nor SmartMIPS support
2198 where kernel is loaded and run from <<
2199 address which meets above alignment <<
2200 2436
2201 If bootloader loads the kernel at a !! 2437 config CPU_HAS_SMARTMIPS
2202 CONFIG_RELOCATABLE is set, kernel w !! 2438 depends on SYS_SUPPORTS_SMARTMIPS
2203 address aligned to above value and !! 2439 bool "SmartMIPS"
>> 2440 help
>> 2441 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2442 increased security at both hardware and software level for
>> 2443 smartcards. Enabling this option will allow proper use of the
>> 2444 SmartMIPS instructions by Linux applications. However a kernel with
>> 2445 this option will not work on a MIPS core without SmartMIPS core. If
>> 2446 you don't know you probably don't have SmartMIPS and should say N
>> 2447 here.
>> 2448
>> 2449 config CPU_MICROMIPS
>> 2450 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2451 bool "microMIPS"
>> 2452 help
>> 2453 When this option is enabled the kernel will be built using the
>> 2454 microMIPS ISA
2204 2455
2205 If bootloader loads the kernel at a !! 2456 endchoice
2206 CONFIG_RELOCATABLE is not set, kern <<
2207 load address and decompress itself <<
2208 compiled for and run from there. Th <<
2209 compiled already meets above alignm <<
2210 end result is that kernel runs from <<
2211 above alignment restrictions. <<
2212 2457
2213 On 32-bit this value must be a mult !! 2458 config CPU_HAS_MSA
2214 this value must be a multiple of 0x !! 2459 bool "Support for the MIPS SIMD Architecture"
>> 2460 depends on CPU_SUPPORTS_MSA
>> 2461 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2462 help
>> 2463 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2464 and a set of SIMD instructions to operate on them. When this option
>> 2465 is enabled the kernel will support allocating & switching MSA
>> 2466 vector register contexts. If you know that your kernel will only be
>> 2467 running on CPUs which do not support MSA or that your userland will
>> 2468 not be making use of it then you may wish to say N here to reduce
>> 2469 the size & complexity of your kernel.
2215 2470
2216 Don't change this unless you know w !! 2471 If unsure, say Y.
2217 2472
2218 config DYNAMIC_MEMORY_LAYOUT !! 2473 config CPU_HAS_WB
2219 bool 2474 bool
2220 help <<
2221 This option makes base addresses of <<
2222 __PAGE_OFFSET movable during boot. <<
2223 2475
2224 config RANDOMIZE_MEMORY !! 2476 config XKS01
2225 bool "Randomize the kernel memory sec !! 2477 bool
2226 depends on X86_64 <<
2227 depends on RANDOMIZE_BASE <<
2228 select DYNAMIC_MEMORY_LAYOUT <<
2229 default RANDOMIZE_BASE <<
2230 help <<
2231 Randomizes the base virtual address <<
2232 (physical memory mapping, vmalloc & <<
2233 makes exploits relying on predictab <<
2234 <<
2235 The order of allocations remains un <<
2236 the same way as RANDOMIZE_BASE. Cur <<
2237 configuration have in average 30,00 <<
2238 addresses for each memory section. <<
2239 2478
2240 If unsure, say Y. !! 2479 config CPU_HAS_RIXI
>> 2480 bool
2241 2481
2242 config RANDOMIZE_MEMORY_PHYSICAL_PADDING !! 2482 config CPU_HAS_LOAD_STORE_LR
2243 hex "Physical memory mapping padding" !! 2483 bool
2244 depends on RANDOMIZE_MEMORY !! 2484 help
2245 default "0xa" if MEMORY_HOTPLUG !! 2485 CPU has support for unaligned load and store instructions:
2246 default "0x0" !! 2486 LWL, LWR, SWL, SWR (Load/store word left/right).
2247 range 0x1 0x40 if MEMORY_HOTPLUG !! 2487 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems).
2248 range 0x0 0x40 <<
2249 help <<
2250 Define the padding in terabytes add <<
2251 memory size during kernel memory ra <<
2252 for memory hotplug support but redu <<
2253 address randomization. <<
2254 2488
2255 If unsure, leave at the default val !! 2489 #
>> 2490 # Vectored interrupt mode is an R2 feature
>> 2491 #
>> 2492 config CPU_MIPSR2_IRQ_VI
>> 2493 bool
2256 2494
2257 config ADDRESS_MASKING !! 2495 #
2258 bool "Linear Address Masking support" !! 2496 # Extended interrupt mode is an R2 feature
2259 depends on X86_64 !! 2497 #
2260 depends on COMPILE_TEST || !CPU_MITIG !! 2498 config CPU_MIPSR2_IRQ_EI
2261 help !! 2499 bool
2262 Linear Address Masking (LAM) modifi <<
2263 to 64-bit linear addresses, allowin <<
2264 untranslated address bits for metad <<
2265 2500
2266 The capability can be used for effi !! 2501 config CPU_HAS_SYNC
2267 implementation and for optimization !! 2502 bool
>> 2503 depends on !CPU_R3000
>> 2504 default y
2268 2505
2269 config HOTPLUG_CPU !! 2506 #
2270 def_bool y !! 2507 # CPU non-features
2271 depends on SMP !! 2508 #
>> 2509 config CPU_DADDI_WORKAROUNDS
>> 2510 bool
2272 2511
2273 config COMPAT_VDSO !! 2512 config CPU_R4000_WORKAROUNDS
2274 def_bool n !! 2513 bool
2275 prompt "Disable the 32-bit vDSO (need !! 2514 select CPU_R4400_WORKAROUNDS
2276 depends on COMPAT_32 <<
2277 help <<
2278 Certain buggy versions of glibc wil <<
2279 presented with a 32-bit vDSO that i <<
2280 indicated in its segment table. <<
2281 <<
2282 The bug was introduced by f866314b8 <<
2283 and fixed by 3b3ddb4f7db98ec9e912cc <<
2284 49ad572a70b8aeb91e57483a11dd1b77e31 <<
2285 the only released version with the <<
2286 contains a buggy "glibc 2.3.2". <<
2287 <<
2288 The symptom of the bug is that ever <<
2289 dl_main: Assertion `(void *) ph->p_ <<
2290 <<
2291 Saying Y here changes the default v <<
2292 option from 1 to 0, which turns off <<
2293 This works around the glibc bug but <<
2294 2515
2295 If unsure, say N: if you are compil !! 2516 config CPU_R4400_WORKAROUNDS
2296 are unlikely to be using a buggy ve !! 2517 bool
2297 2518
2298 choice !! 2519 config MIPS_ASID_SHIFT
2299 prompt "vsyscall table for legacy app !! 2520 int
2300 depends on X86_64 !! 2521 default 6 if CPU_R3000 || CPU_TX39XX
2301 default LEGACY_VSYSCALL_XONLY !! 2522 default 4 if CPU_R8000
2302 help !! 2523 default 0
2303 Legacy user code that does not know <<
2304 to be able to issue three syscalls <<
2305 kernel space. Since this location i <<
2306 it can be used to assist security v <<
2307 <<
2308 This setting can be changed at boot <<
2309 line parameter vsyscall=[emulate|xo <<
2310 is deprecated and can only be enabl <<
2311 line. <<
2312 <<
2313 On a system with recent enough glib <<
2314 static binaries, you can say None w <<
2315 to improve security. <<
2316 2524
2317 If unsure, select "Emulate executio !! 2525 config MIPS_ASID_BITS
>> 2526 int
>> 2527 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2528 default 6 if CPU_R3000 || CPU_TX39XX
>> 2529 default 8
2318 2530
2319 config LEGACY_VSYSCALL_XONLY !! 2531 config MIPS_ASID_BITS_VARIABLE
2320 bool "Emulate execution only" !! 2532 bool
2321 help <<
2322 The kernel traps and emulat <<
2323 address mapping and does no <<
2324 configuration is recommende <<
2325 legacy vsyscall area but su <<
2326 instrumentation of legacy c <<
2327 certain uses of the vsyscal <<
2328 buffer. <<
2329 2533
2330 config LEGACY_VSYSCALL_NONE !! 2534 config MIPS_CRC_SUPPORT
2331 bool "None" !! 2535 bool
2332 help <<
2333 There will be no vsyscall m <<
2334 eliminate any risk of ASLR <<
2335 fixed address mapping. Atte <<
2336 will be reported to dmesg, <<
2337 malicious userspace program <<
2338 2536
2339 endchoice !! 2537 #
>> 2538 # - Highmem only makes sense for the 32-bit kernel.
>> 2539 # - The current highmem code will only work properly on physically indexed
>> 2540 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2541 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2542 # moment we protect the user and offer the highmem option only on machines
>> 2543 # where it's known to be safe. This will not offer highmem on a few systems
>> 2544 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2545 # indexed CPUs but we're playing safe.
>> 2546 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2547 # know they might have memory configurations that could make use of highmem
>> 2548 # support.
>> 2549 #
>> 2550 config HIGHMEM
>> 2551 bool "High Memory Support"
>> 2552 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2340 2553
2341 config CMDLINE_BOOL !! 2554 config CPU_SUPPORTS_HIGHMEM
2342 bool "Built-in kernel command line" !! 2555 bool
2343 help <<
2344 Allow for specifying boot arguments <<
2345 build time. On some systems (e.g. <<
2346 necessary or convenient to provide <<
2347 kernel boot arguments with the kern <<
2348 to not rely on the boot loader to p <<
2349 2556
2350 To compile command line arguments i !! 2557 config SYS_SUPPORTS_HIGHMEM
2351 set this option to 'Y', then fill i !! 2558 bool
2352 boot arguments in CONFIG_CMDLINE. <<
2353 2559
2354 Systems with fully functional boot !! 2560 config SYS_SUPPORTS_SMARTMIPS
2355 should leave this option set to 'N' !! 2561 bool
2356 2562
2357 config CMDLINE !! 2563 config SYS_SUPPORTS_MICROMIPS
2358 string "Built-in kernel command strin !! 2564 bool
2359 depends on CMDLINE_BOOL !! 2565
2360 default "" !! 2566 config SYS_SUPPORTS_MIPS16
>> 2567 bool
2361 help 2568 help
2362 Enter arguments here that should be !! 2569 This option must be set if a kernel might be executed on a MIPS16-
2363 image and used at boot time. If th !! 2570 enabled CPU even if MIPS16 is not actually being used. In other
2364 command line at boot time, it is ap !! 2571 words, it makes the kernel MIPS16-tolerant.
2365 form the full kernel command line, <<
2366 2572
2367 However, you can use the CONFIG_CMD !! 2573 config CPU_SUPPORTS_MSA
2368 change this behavior. !! 2574 bool
2369 2575
2370 In most cases, the command line (wh !! 2576 config ARCH_FLATMEM_ENABLE
2371 by the boot loader) should specify !! 2577 def_bool y
2372 file system. !! 2578 depends on !NUMA && !CPU_LOONGSON2
2373 2579
2374 config CMDLINE_OVERRIDE !! 2580 config ARCH_DISCONTIGMEM_ENABLE
2375 bool "Built-in command line overrides !! 2581 bool
2376 depends on CMDLINE_BOOL && CMDLINE != !! 2582 default y if SGI_IP27
2377 help 2583 help
2378 Set this option to 'Y' to have the !! 2584 Say Y to support efficient handling of discontiguous physical memory,
2379 command line, and use ONLY the buil !! 2585 for architectures which are either NUMA (Non-Uniform Memory Access)
>> 2586 or have huge holes in the physical address space for other reasons.
>> 2587 See <file:Documentation/vm/numa.rst> for more.
2380 2588
2381 This is used to work around broken !! 2589 config ARCH_SPARSEMEM_ENABLE
2382 be set to 'N' under normal conditio !! 2590 bool
>> 2591 select SPARSEMEM_STATIC
2383 2592
2384 config MODIFY_LDT_SYSCALL !! 2593 config NUMA
2385 bool "Enable the LDT (local descripto !! 2594 bool "NUMA Support"
2386 default y !! 2595 depends on SYS_SUPPORTS_NUMA
2387 help 2596 help
2388 Linux can allow user programs to in !! 2597 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2389 Local Descriptor Table (LDT) using !! 2598 Access). This option improves performance on systems with more
2390 call. This is required to run 16-b !! 2599 than two nodes; on two node systems it is generally better to
2391 DOSEMU or some Wine programs. It i !! 2600 leave it disabled; on single node systems disable this option
2392 threading libraries. !! 2601 disabled.
2393 2602
2394 Enabling this feature adds a small !! 2603 config SYS_SUPPORTS_NUMA
2395 context switches and increases the !! 2604 bool
2396 surface. Disabling it removes the <<
2397 <<
2398 Saying 'N' here may make sense for <<
2399 2605
2400 config STRICT_SIGALTSTACK_SIZE !! 2606 config RELOCATABLE
2401 bool "Enforce strict size checking fo !! 2607 bool "Relocatable kernel"
2402 depends on DYNAMIC_SIGFRAME !! 2608 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
2403 help 2609 help
2404 For historical reasons MINSIGSTKSZ !! 2610 This builds a kernel image that retains relocation information
2405 already too small with AVX512 suppo !! 2611 so it can be loaded someplace besides the default 1MB.
2406 enforce strict checking of the siga !! 2612 The relocations make the kernel binary about 15% larger,
2407 real size of the FPU frame. This op !! 2613 but are discarded at runtime
2408 by default. It can also be controll <<
2409 line option 'strict_sas_size' indep <<
2410 switch. Enabling it might break exi <<
2411 allocate a too small sigaltstack bu <<
2412 never get a signal delivered. <<
2413 2614
2414 Say 'N' unless you want to really e !! 2615 config RELOCATION_TABLE_SIZE
>> 2616 hex "Relocation table size"
>> 2617 depends on RELOCATABLE
>> 2618 range 0x0 0x01000000
>> 2619 default "0x00100000"
>> 2620 ---help---
>> 2621 A table of relocation data will be appended to the kernel binary
>> 2622 and parsed at boot to fix up the relocated kernel.
2415 2623
2416 config CFI_AUTO_DEFAULT !! 2624 This option allows the amount of space reserved for the table to be
2417 bool "Attempt to use FineIBT by defau !! 2625 adjusted, although the default of 1Mb should be ok in most cases.
2418 depends on FINEIBT <<
2419 default y <<
2420 help <<
2421 Attempt to use FineIBT by default a <<
2422 this is the same as booting with "c <<
2423 this is the same as booting with "c <<
2424 2626
2425 source "kernel/livepatch/Kconfig" !! 2627 The build will fail and a valid size suggested if this is too small.
2426 2628
2427 endmenu !! 2629 If unsure, leave at the default value.
2428 2630
2429 config CC_HAS_NAMED_AS !! 2631 config RANDOMIZE_BASE
2430 def_bool $(success,echo 'int __seg_fs !! 2632 bool "Randomize the address of the kernel image"
2431 depends on CC_IS_GCC !! 2633 depends on RELOCATABLE
>> 2634 ---help---
>> 2635 Randomizes the physical and virtual address at which the
>> 2636 kernel image is loaded, as a security feature that
>> 2637 deters exploit attempts relying on knowledge of the location
>> 2638 of kernel internals.
2432 2639
2433 config CC_HAS_NAMED_AS_FIXED_SANITIZERS !! 2640 Entropy is generated using any coprocessor 0 registers available.
2434 def_bool CC_IS_GCC && GCC_VERSION >= <<
2435 2641
2436 config USE_X86_SEG_SUPPORT !! 2642 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2437 def_bool y <<
2438 depends on CC_HAS_NAMED_AS <<
2439 # <<
2440 # -fsanitize=kernel-address (KASAN) a <<
2441 # (KCSAN) are incompatible with named <<
2442 # GCC < 13.3 - see GCC PR sanitizer/1 <<
2443 # <<
2444 depends on !(KASAN || KCSAN) || CC_HA <<
2445 2643
2446 config CC_HAS_SLS !! 2644 If unsure, say N.
2447 def_bool $(cc-option,-mharden-sls=all <<
2448 2645
2449 config CC_HAS_RETURN_THUNK !! 2646 config RANDOMIZE_BASE_MAX_OFFSET
2450 def_bool $(cc-option,-mfunction-retur !! 2647 hex "Maximum kASLR offset" if EXPERT
>> 2648 depends on RANDOMIZE_BASE
>> 2649 range 0x0 0x40000000 if EVA || 64BIT
>> 2650 range 0x0 0x08000000
>> 2651 default "0x01000000"
>> 2652 ---help---
>> 2653 When kASLR is active, this provides the maximum offset that will
>> 2654 be applied to the kernel image. It should be set according to the
>> 2655 amount of physical RAM available in the target system minus
>> 2656 PHYSICAL_START and must be a power of 2.
2451 2657
2452 config CC_HAS_ENTRY_PADDING !! 2658 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2453 def_bool $(cc-option,-fpatchable-func !! 2659 EVA or 64-bit. The default is 16Mb.
2454 2660
2455 config FUNCTION_PADDING_CFI !! 2661 config NODES_SHIFT
2456 int <<
2457 default 59 if FUNCTION_ALIGNMENT_64B <<
2458 default 27 if FUNCTION_ALIGNMENT_32B <<
2459 default 11 if FUNCTION_ALIGNMENT_16B <<
2460 default 3 if FUNCTION_ALIGNMENT_8B <<
2461 default 0 <<
2462 <<
2463 # Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG <<
2464 # except Kconfig can't do arithmetic :/ <<
2465 config FUNCTION_PADDING_BYTES <<
2466 int 2662 int
2467 default FUNCTION_PADDING_CFI if CFI_C !! 2663 default "6"
2468 default FUNCTION_ALIGNMENT !! 2664 depends on NEED_MULTIPLE_NODES
2469 2665
2470 config CALL_PADDING !! 2666 config HW_PERF_EVENTS
2471 def_bool n !! 2667 bool "Enable hardware performance counter support for perf events"
2472 depends on CC_HAS_ENTRY_PADDING && OB !! 2668 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
2473 select FUNCTION_ALIGNMENT_16B !! 2669 default y
>> 2670 help
>> 2671 Enable hardware performance counter support for perf events. If
>> 2672 disabled, perf events will use software events only.
2474 2673
2475 config FINEIBT !! 2674 config SMP
2476 def_bool y !! 2675 bool "Multi-Processing support"
2477 depends on X86_KERNEL_IBT && CFI_CLAN !! 2676 depends on SYS_SUPPORTS_SMP
2478 select CALL_PADDING !! 2677 help
>> 2678 This enables support for systems with more than one CPU. If you have
>> 2679 a system with only one CPU, say N. If you have a system with more
>> 2680 than one CPU, say Y.
2479 2681
2480 config HAVE_CALL_THUNKS !! 2682 If you say N here, the kernel will run on uni- and multiprocessor
2481 def_bool y !! 2683 machines, but will use only one CPU of a multiprocessor machine. If
2482 depends on CC_HAS_ENTRY_PADDING && MI !! 2684 you say Y here, the kernel will run on many, but not all,
>> 2685 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2686 will run faster if you say N here.
2483 2687
2484 config CALL_THUNKS !! 2688 People using multiprocessor machines who say Y here should also say
2485 def_bool n !! 2689 Y to "Enhanced Real Time Clock Support", below.
2486 select CALL_PADDING <<
2487 2690
2488 config PREFIX_SYMBOLS !! 2691 See also the SMP-HOWTO available at
2489 def_bool y !! 2692 <http://www.tldp.org/docs.html#howto>.
2490 depends on CALL_PADDING && !CFI_CLANG <<
2491 2693
2492 menuconfig CPU_MITIGATIONS !! 2694 If you don't know what to do here, say N.
2493 bool "Mitigations for CPU vulnerabili !! 2695
2494 default y !! 2696 config HOTPLUG_CPU
>> 2697 bool "Support for hot-pluggable CPUs"
>> 2698 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2495 help 2699 help
2496 Say Y here to enable options which !! 2700 Say Y here to allow turning CPUs off and on. CPUs can be
2497 vulnerabilities (usually related to !! 2701 controlled through /sys/devices/system/cpu.
2498 Mitigations can be disabled or rest !! 2702 (Note: power management support will enable this option
2499 via the "mitigations" kernel parame !! 2703 automatically on SMP systems. )
>> 2704 Say N if you want to disable CPU hotplug.
2500 2705
2501 If you say N, all mitigations will !! 2706 config SMP_UP
2502 overridden at runtime. !! 2707 bool
2503 2708
2504 Say 'Y', unless you really know wha !! 2709 config SYS_SUPPORTS_MIPS_CMP
>> 2710 bool
2505 2711
2506 if CPU_MITIGATIONS !! 2712 config SYS_SUPPORTS_MIPS_CPS
>> 2713 bool
2507 2714
2508 config MITIGATION_PAGE_TABLE_ISOLATION !! 2715 config SYS_SUPPORTS_SMP
2509 bool "Remove the kernel mapping in us !! 2716 bool
2510 default y <<
2511 depends on (X86_64 || X86_PAE) <<
2512 help <<
2513 This feature reduces the number of <<
2514 ensuring that the majority of kerne <<
2515 into userspace. <<
2516 2717
2517 See Documentation/arch/x86/pti.rst !! 2718 config NR_CPUS_DEFAULT_4
>> 2719 bool
2518 2720
2519 config MITIGATION_RETPOLINE !! 2721 config NR_CPUS_DEFAULT_8
2520 bool "Avoid speculative indirect bran !! 2722 bool
2521 select OBJTOOL if HAVE_OBJTOOL <<
2522 default y <<
2523 help <<
2524 Compile kernel with the retpoline c <<
2525 kernel-to-user data leaks by avoidi <<
2526 branches. Requires a compiler with <<
2527 support for full protection. The ke <<
2528 2723
2529 config MITIGATION_RETHUNK !! 2724 config NR_CPUS_DEFAULT_16
2530 bool "Enable return-thunks" !! 2725 bool
2531 depends on MITIGATION_RETPOLINE && CC <<
2532 select OBJTOOL if HAVE_OBJTOOL <<
2533 default y if X86_64 <<
2534 help <<
2535 Compile the kernel with the return- <<
2536 against kernel-to-user data leaks b <<
2537 Requires a compiler with -mfunction <<
2538 support for full protection. The ke <<
2539 2726
2540 config MITIGATION_UNRET_ENTRY !! 2727 config NR_CPUS_DEFAULT_32
2541 bool "Enable UNRET on kernel entry" !! 2728 bool
2542 depends on CPU_SUP_AMD && MITIGATION_ <<
2543 default y <<
2544 help <<
2545 Compile the kernel with support for <<
2546 2729
2547 config MITIGATION_CALL_DEPTH_TRACKING !! 2730 config NR_CPUS_DEFAULT_64
2548 bool "Mitigate RSB underflow with cal !! 2731 bool
2549 depends on CPU_SUP_INTEL && HAVE_CALL <<
2550 select HAVE_DYNAMIC_FTRACE_NO_PATCHAB <<
2551 select CALL_THUNKS <<
2552 default y <<
2553 help <<
2554 Compile the kernel with call depth <<
2555 SKL Return-Speculation-Buffer (RSB) <<
2556 mitigation is off by default and ne <<
2557 kernel command line via the retblee <<
2558 non-affected systems the overhead o <<
2559 the call depth tracking is using ru <<
2560 in a compiler generated padding are <<
2561 increases text size by ~5%. For non <<
2562 is unused. On affected SKL systems <<
2563 performance gain over the IBRS miti <<
2564 2732
2565 config CALL_THUNKS_DEBUG !! 2733 config NR_CPUS
2566 bool "Enable call thunks and call dep !! 2734 int "Maximum number of CPUs (2-256)"
2567 depends on MITIGATION_CALL_DEPTH_TRAC !! 2735 range 2 256
2568 select FUNCTION_ALIGNMENT_32B !! 2736 depends on SMP
2569 default n !! 2737 default "4" if NR_CPUS_DEFAULT_4
>> 2738 default "8" if NR_CPUS_DEFAULT_8
>> 2739 default "16" if NR_CPUS_DEFAULT_16
>> 2740 default "32" if NR_CPUS_DEFAULT_32
>> 2741 default "64" if NR_CPUS_DEFAULT_64
2570 help 2742 help
2571 Enable call/ret counters for imbala !! 2743 This allows you to specify the maximum number of CPUs which this
2572 a noisy dmesg about callthunks gene !! 2744 kernel will support. The maximum supported value is 32 for 32-bit
2573 trouble shooting. The debug prints !! 2745 kernel and 64 for 64-bit kernels; the minimum value which makes
2574 kernel command line with 'debug-cal !! 2746 sense is 1 for Qemu (useful only for kernel debugging purposes)
2575 Only enable this when you are debug !! 2747 and 2 for all others.
2576 creates a noticeable runtime overhe !! 2748
>> 2749 This is purely to save memory - each supported CPU adds
>> 2750 approximately eight kilobytes to the kernel image. For best
>> 2751 performance should round up your number of processors to the next
>> 2752 power of two.
2577 2753
2578 config MITIGATION_IBPB_ENTRY !! 2754 config MIPS_PERF_SHARED_TC_COUNTERS
2579 bool "Enable IBPB on kernel entry" !! 2755 bool
2580 depends on CPU_SUP_AMD && X86_64 <<
2581 default y <<
2582 help <<
2583 Compile the kernel with support for <<
2584 2756
2585 config MITIGATION_IBRS_ENTRY !! 2757 config MIPS_NR_CPU_NR_MAP_1024
2586 bool "Enable IBRS on kernel entry" !! 2758 bool
2587 depends on CPU_SUP_INTEL && X86_64 <<
2588 default y <<
2589 help <<
2590 Compile the kernel with support for <<
2591 This mitigates both spectre_v2 and <<
2592 performance. <<
2593 2759
2594 config MITIGATION_SRSO !! 2760 config MIPS_NR_CPU_NR_MAP
2595 bool "Mitigate speculative RAS overfl !! 2761 int
2596 depends on CPU_SUP_AMD && X86_64 && M !! 2762 depends on SMP
2597 default y !! 2763 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2598 help !! 2764 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2599 Enable the SRSO mitigation needed o <<
2600 2765
2601 config MITIGATION_SLS !! 2766 #
2602 bool "Mitigate Straight-Line-Speculat !! 2767 # Timer Interrupt Frequency Configuration
2603 depends on CC_HAS_SLS && X86_64 !! 2768 #
2604 select OBJTOOL if HAVE_OBJTOOL <<
2605 default n <<
2606 help <<
2607 Compile the kernel with straight-li <<
2608 against straight line speculation. <<
2609 larger. <<
2610 2769
2611 config MITIGATION_GDS !! 2770 choice
2612 bool "Mitigate Gather Data Sampling" !! 2771 prompt "Timer frequency"
2613 depends on CPU_SUP_INTEL !! 2772 default HZ_250
2614 default y <<
2615 help 2773 help
2616 Enable mitigation for Gather Data S !! 2774 Allows the configuration of the timer frequency.
2617 vulnerability which allows unprivil <<
2618 which was previously stored in vect <<
2619 instructions to infer the stale vec <<
2620 2775
2621 config MITIGATION_RFDS !! 2776 config HZ_24
2622 bool "RFDS Mitigation" !! 2777 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2623 depends on CPU_SUP_INTEL <<
2624 default y <<
2625 help <<
2626 Enable mitigation for Register File <<
2627 RFDS is a hardware vulnerability wh <<
2628 allows unprivileged speculative acc <<
2629 stored in floating point, vector an <<
2630 See also <file:Documentation/admin- <<
2631 2778
2632 config MITIGATION_SPECTRE_BHI !! 2779 config HZ_48
2633 bool "Mitigate Spectre-BHB (Branch Hi !! 2780 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2634 depends on CPU_SUP_INTEL <<
2635 default y <<
2636 help <<
2637 Enable BHI mitigations. BHI attacks <<
2638 where the branch history buffer is <<
2639 indirect branches. <<
2640 See <file:Documentation/admin-guide <<
2641 2781
2642 config MITIGATION_MDS !! 2782 config HZ_100
2643 bool "Mitigate Microarchitectural Dat !! 2783 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2644 depends on CPU_SUP_INTEL <<
2645 default y <<
2646 help <<
2647 Enable mitigation for Microarchitec <<
2648 a hardware vulnerability which allo <<
2649 to data which is available in vario <<
2650 See also <file:Documentation/admin- <<
2651 2784
2652 config MITIGATION_TAA !! 2785 config HZ_128
2653 bool "Mitigate TSX Asynchronous Abort !! 2786 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2654 depends on CPU_SUP_INTEL <<
2655 default y <<
2656 help <<
2657 Enable mitigation for TSX Asynchron <<
2658 vulnerability that allows unprivile <<
2659 which is available in various CPU i <<
2660 asynchronous aborts within an Intel <<
2661 See also <file:Documentation/admin- <<
2662 2787
2663 config MITIGATION_MMIO_STALE_DATA !! 2788 config HZ_250
2664 bool "Mitigate MMIO Stale Data hardwa !! 2789 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2665 depends on CPU_SUP_INTEL <<
2666 default y <<
2667 help <<
2668 Enable mitigation for MMIO Stale Da <<
2669 Stale Data Vulnerabilities are a cl <<
2670 vulnerabilities that can expose dat <<
2671 attacker to have access to MMIO. <<
2672 See also <<
2673 <file:Documentation/admin-guide/hw- <<
2674 2790
2675 config MITIGATION_L1TF !! 2791 config HZ_256
2676 bool "Mitigate L1 Terminal Fault (L1T !! 2792 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2677 depends on CPU_SUP_INTEL <<
2678 default y <<
2679 help <<
2680 Mitigate L1 Terminal Fault (L1TF) h <<
2681 hardware vulnerability which allows <<
2682 available in the Level 1 Data Cache <<
2683 See <file:Documentation/admin-guide <<
2684 2793
2685 config MITIGATION_RETBLEED !! 2794 config HZ_1000
2686 bool "Mitigate RETBleed hardware bug" !! 2795 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2687 depends on (CPU_SUP_INTEL && MITIGATI <<
2688 default y <<
2689 help <<
2690 Enable mitigation for RETBleed (Arb <<
2691 with Return Instructions) vulnerabi <<
2692 execution attack which takes advant <<
2693 in many modern microprocessors, sim <<
2694 unprivileged attacker can use these <<
2695 memory security restrictions to gai <<
2696 that would otherwise be inaccessibl <<
2697 2796
2698 config MITIGATION_SPECTRE_V1 !! 2797 config HZ_1024
2699 bool "Mitigate SPECTRE V1 hardware bu !! 2798 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2700 default y <<
2701 help <<
2702 Enable mitigation for Spectre V1 (B <<
2703 class of side channel attacks that <<
2704 execution that bypasses conditional <<
2705 memory access bounds check. <<
2706 See also <file:Documentation/admin- <<
2707 2799
2708 config MITIGATION_SPECTRE_V2 !! 2800 endchoice
2709 bool "Mitigate SPECTRE V2 hardware bu <<
2710 default y <<
2711 help <<
2712 Enable mitigation for Spectre V2 (B <<
2713 V2 is a class of side channel attac <<
2714 indirect branch predictors inside t <<
2715 attacks, the attacker can steer spe <<
2716 victim to gadget code by poisoning <<
2717 used for predicting indirect branch <<
2718 See also <file:Documentation/admin- <<
2719 2801
2720 config MITIGATION_SRBDS !! 2802 config SYS_SUPPORTS_24HZ
2721 bool "Mitigate Special Register Buffe !! 2803 bool
2722 depends on CPU_SUP_INTEL <<
2723 default y <<
2724 help <<
2725 Enable mitigation for Special Regis <<
2726 SRBDS is a hardware vulnerability t <<
2727 Sampling (MDS) techniques to infer <<
2728 register accesses. An unprivileged <<
2729 from RDRAND and RDSEED executed on <<
2730 using MDS techniques. <<
2731 See also <<
2732 <file:Documentation/admin-guide/hw- <<
2733 2804
2734 config MITIGATION_SSB !! 2805 config SYS_SUPPORTS_48HZ
2735 bool "Mitigate Speculative Store Bypa !! 2806 bool
2736 default y <<
2737 help <<
2738 Enable mitigation for Speculative S <<
2739 hardware security vulnerability and <<
2740 of speculative execution in a simil <<
2741 security vulnerabilities. <<
2742 2807
2743 endif !! 2808 config SYS_SUPPORTS_100HZ
>> 2809 bool
2744 2810
2745 config ARCH_HAS_ADD_PAGES !! 2811 config SYS_SUPPORTS_128HZ
2746 def_bool y !! 2812 bool
2747 depends on ARCH_ENABLE_MEMORY_HOTPLUG <<
2748 2813
2749 menu "Power management and ACPI options" !! 2814 config SYS_SUPPORTS_250HZ
>> 2815 bool
2750 2816
2751 config ARCH_HIBERNATION_HEADER !! 2817 config SYS_SUPPORTS_256HZ
2752 def_bool y !! 2818 bool
2753 depends on HIBERNATION <<
2754 2819
2755 source "kernel/power/Kconfig" !! 2820 config SYS_SUPPORTS_1000HZ
>> 2821 bool
2756 2822
2757 source "drivers/acpi/Kconfig" !! 2823 config SYS_SUPPORTS_1024HZ
>> 2824 bool
2758 2825
2759 config X86_APM_BOOT !! 2826 config SYS_SUPPORTS_ARBIT_HZ
2760 def_bool y !! 2827 bool
2761 depends on APM !! 2828 default y if !SYS_SUPPORTS_24HZ && \
>> 2829 !SYS_SUPPORTS_48HZ && \
>> 2830 !SYS_SUPPORTS_100HZ && \
>> 2831 !SYS_SUPPORTS_128HZ && \
>> 2832 !SYS_SUPPORTS_250HZ && \
>> 2833 !SYS_SUPPORTS_256HZ && \
>> 2834 !SYS_SUPPORTS_1000HZ && \
>> 2835 !SYS_SUPPORTS_1024HZ
2762 2836
2763 menuconfig APM !! 2837 config HZ
2764 tristate "APM (Advanced Power Managem !! 2838 int
2765 depends on X86_32 && PM_SLEEP !! 2839 default 24 if HZ_24
2766 help !! 2840 default 48 if HZ_48
2767 APM is a BIOS specification for sav !! 2841 default 100 if HZ_100
2768 techniques. This is mostly useful f !! 2842 default 128 if HZ_128
2769 APM compliant BIOSes. If you say Y !! 2843 default 250 if HZ_250
2770 reset after a RESUME operation, the !! 2844 default 256 if HZ_256
2771 battery status information, and use !! 2845 default 1000 if HZ_1000
2772 notification of APM "events" (e.g. !! 2846 default 1024 if HZ_1024
2773 !! 2847
2774 If you select "Y" here, you can dis !! 2848 config SCHED_HRTICK
2775 BIOS by passing the "apm=off" optio !! 2849 def_bool HIGH_RES_TIMERS
2776 !! 2850
2777 Note that the APM support is almost !! 2851 config KEXEC
2778 machines with more than one CPU. !! 2852 bool "Kexec system call"
2779 !! 2853 select KEXEC_CORE
2780 In order to use APM, you will need !! 2854 help
2781 and more information, read <file:Do !! 2855 kexec is a system call that implements the ability to shutdown your
2782 and the Battery Powered Linux mini- !! 2856 current kernel, and to start another kernel. It is like a reboot
2783 <http://www.tldp.org/docs.html#howt !! 2857 but it is independent of the system firmware. And like a reboot
>> 2858 you can start any kernel with it, not just Linux.
>> 2859
>> 2860 The name comes from the similarity to the exec system call.
>> 2861
>> 2862 It is an ongoing process to be certain the hardware in a machine
>> 2863 is properly shutdown, so do not be surprised if this code does not
>> 2864 initially work for you. As of this writing the exact hardware
>> 2865 interface is strongly in flux, so no good recommendation can be
>> 2866 made.
>> 2867
>> 2868 config CRASH_DUMP
>> 2869 bool "Kernel crash dumps"
>> 2870 help
>> 2871 Generate crash dump after being started by kexec.
>> 2872 This should be normally only set in special crash dump kernels
>> 2873 which are loaded in the main kernel with kexec-tools into
>> 2874 a specially reserved region and then later executed after
>> 2875 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2876 to a memory address not used by the main kernel or firmware using
>> 2877 PHYSICAL_START.
2784 2878
2785 This driver does not spin down disk !! 2879 config PHYSICAL_START
2786 manpage ("man 8 hdparm") for that), !! 2880 hex "Physical address where the kernel is loaded"
2787 VESA-compliant "green" monitors. !! 2881 default "0xffffffff84000000"
2788 !! 2882 depends on CRASH_DUMP
2789 This driver does not support the TI !! 2883 help
2790 486/DX4/75 because they don't have !! 2884 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2791 desktop machines also don't have co !! 2885 If you plan to use kernel for capturing the crash dump change
2792 may cause those machines to panic d !! 2886 this value to start of the reserved region (the "X" value as
2793 !! 2887 specified in the "crashkernel=YM@XM" command line boot parameter
2794 Generally, if you don't have a batt !! 2888 passed to the panic-ed kernel).
2795 much point in using this driver and !! 2889
2796 random kernel OOPSes or reboots tha !! 2890 config SECCOMP
2797 anything, try disabling/enabling th !! 2891 bool "Enable seccomp to safely compute untrusted bytecode"
2798 APM in your BIOS). !! 2892 depends on PROC_FS
2799 !! 2893 default y
2800 Some other things you should try wh !! 2894 help
2801 "weird" problems: !! 2895 This kernel feature is useful for number crunching applications
2802 !! 2896 that may need to compute untrusted bytecode during their
2803 1) make sure that you have enough s !! 2897 execution. By using pipes or other transports made available to
2804 enabled. !! 2898 the process as file descriptors supporting the read/write
2805 2) pass the "idle=poll" option to t !! 2899 syscalls, it's possible to isolate those applications in
2806 3) switch on floating point emulati !! 2900 their own address space using seccomp. Once seccomp is
2807 the "no387" option to the kernel !! 2901 enabled via /proc/<pid>/seccomp, it cannot be disabled
2808 4) pass the "floppy=nodma" option t !! 2902 and the task is only allowed to execute a few safe syscalls
2809 5) pass the "mem=4M" option to the !! 2903 defined by each seccomp mode.
2810 all but the first 4 MB of RAM) !! 2904
2811 6) make sure that the CPU is not ov !! 2905 If unsure, say Y. Only embedded should say N here.
2812 7) read the sig11 FAQ at <http://ww !! 2906
2813 8) disable the cache from your BIOS !! 2907 config MIPS_O32_FP64_SUPPORT
2814 9) install a fan for the video card !! 2908 bool "Support for O32 binaries using 64-bit FP"
2815 10) install a better fan for the CP !! 2909 depends on 32BIT || MIPS32_O32
2816 11) exchange RAM chips !! 2910 help
2817 12) exchange the motherboard. !! 2911 When this is enabled, the kernel will support use of 64-bit floating
2818 !! 2912 point registers with binaries using the O32 ABI along with the
2819 To compile this driver as a module, !! 2913 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2820 module will be called apm. !! 2914 32-bit MIPS systems this support is at the cost of increasing the
2821 !! 2915 size and complexity of the compiled FPU emulator. Thus if you are
2822 if APM !! 2916 running a MIPS32 system and know that none of your userland binaries
2823 !! 2917 will require 64-bit floating point, you may wish to reduce the size
2824 config APM_IGNORE_USER_SUSPEND !! 2918 of your kernel & potentially improve FP emulation performance by
2825 bool "Ignore USER SUSPEND" !! 2919 saying N here.
2826 help !! 2920
2827 This option will ignore USER SUSPEN !! 2921 Although binutils currently supports use of this flag the details
2828 compliant APM BIOS, you want to say !! 2922 concerning its effect upon the O32 ABI in userland are still being
2829 series notebooks, it is necessary t !! 2923 worked on. In order to avoid userland becoming dependant upon current
2830 !! 2924 behaviour before the details have been finalised, this option should
2831 config APM_DO_ENABLE !! 2925 be considered experimental and only enabled by those working upon
2832 bool "Enable PM at boot time" !! 2926 said details.
2833 help <<
2834 Enable APM features at boot time. F <<
2835 specification: "When disabled, the <<
2836 power manage devices, enter the Sta <<
2837 State, or take power saving steps i <<
2838 This driver will make CPU Idle call <<
2839 feature is turned off -- see "Do CP <<
2840 should always save battery power, b <<
2841 will be dependent on your BIOS impl <<
2842 this option off if your computer ha <<
2843 support, or if it beeps continuousl <<
2844 this off if you have a NEC UltraLit <<
2845 T400CDT. This is off by default sin <<
2846 this feature. <<
2847 <<
2848 config APM_CPU_IDLE <<
2849 depends on CPU_IDLE <<
2850 bool "Make CPU Idle calls when idle" <<
2851 help <<
2852 Enable calls to APM CPU Idle/CPU Bu <<
2853 On some machines, this can activate <<
2854 a slowed CPU clock rate, when the m <<
2855 are made after the idle loop has ru <<
2856 333 mS). On some machines, this wil <<
2857 whenever the CPU becomes idle. (On <<
2858 this option does nothing.) <<
2859 <<
2860 config APM_DISPLAY_BLANK <<
2861 bool "Enable console blanking using A <<
2862 help <<
2863 Enable console blanking using the A <<
2864 turn off the LCD backlight when the <<
2865 virtual console blanks the screen. <<
2866 the virtual console screen blanker, <<
2867 when using the X Window system. Thi <<
2868 do with your VESA-compliant power-s <<
2869 option doesn't work for all laptops <<
2870 backlight at all, or it might print <<
2871 especially if you are using gpm. <<
2872 <<
2873 config APM_ALLOW_INTS <<
2874 bool "Allow interrupts during APM BIO <<
2875 help <<
2876 Normally we disable external interr <<
2877 the APM BIOS as a measure to lessen <<
2878 BIOS implementation. The BIOS shou <<
2879 needs to. Unfortunately, some BIOS <<
2880 many of the newer IBM Thinkpads. I <<
2881 suspend, try setting this to Y. Ot <<
2882 2927
2883 endif # APM !! 2928 If unsure, say N.
2884 2929
2885 source "drivers/cpufreq/Kconfig" !! 2930 config USE_OF
>> 2931 bool
>> 2932 select OF
>> 2933 select OF_EARLY_FLATTREE
>> 2934 select IRQ_DOMAIN
2886 2935
2887 source "drivers/cpuidle/Kconfig" !! 2936 config UHI_BOOT
>> 2937 bool
2888 2938
2889 source "drivers/idle/Kconfig" !! 2939 config BUILTIN_DTB
>> 2940 bool
2890 2941
2891 endmenu !! 2942 choice
>> 2943 prompt "Kernel appended dtb support" if USE_OF
>> 2944 default MIPS_NO_APPENDED_DTB
2892 2945
2893 menu "Bus options (PCI etc.)" !! 2946 config MIPS_NO_APPENDED_DTB
>> 2947 bool "None"
>> 2948 help
>> 2949 Do not enable appended dtb support.
2894 2950
2895 choice !! 2951 config MIPS_ELF_APPENDED_DTB
2896 prompt "PCI access mode" !! 2952 bool "vmlinux"
2897 depends on X86_32 && PCI !! 2953 help
2898 default PCI_GOANY !! 2954 With this option, the boot code will look for a device tree binary
2899 help !! 2955 DTB) included in the vmlinux ELF section .appended_dtb. By default
2900 On PCI systems, the BIOS can be use !! 2956 it is empty and the DTB can be appended using binutils command
2901 determine their configuration. Howe !! 2957 objcopy:
2902 have BIOS bugs and may crash if thi !! 2958
2903 PCI-based systems don't have any BI !! 2959 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
2904 detect the PCI hardware directly wi !! 2960
2905 !! 2961 This is meant as a backward compatiblity convenience for those
2906 With this option, you can specify h !! 2962 systems with a bootloader that can't be upgraded to accommodate
2907 PCI devices. If you choose "BIOS", !! 2963 the documented boot protocol using a device tree.
2908 if you choose "Direct", the BIOS wo <<
2909 choose "MMConfig", then PCI Express <<
2910 If you choose "Any", the kernel wil <<
2911 direct access method and falls back <<
2912 work. If unsure, go with the defaul <<
2913 <<
2914 config PCI_GOBIOS <<
2915 bool "BIOS" <<
2916 <<
2917 config PCI_GOMMCONFIG <<
2918 bool "MMConfig" <<
2919 <<
2920 config PCI_GODIRECT <<
2921 bool "Direct" <<
2922 <<
2923 config PCI_GOOLPC <<
2924 bool "OLPC XO-1" <<
2925 depends on OLPC <<
2926 2964
2927 config PCI_GOANY !! 2965 config MIPS_RAW_APPENDED_DTB
2928 bool "Any" !! 2966 bool "vmlinux.bin or vmlinuz.bin"
>> 2967 help
>> 2968 With this option, the boot code will look for a device tree binary
>> 2969 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2970 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2971
>> 2972 This is meant as a backward compatibility convenience for those
>> 2973 systems with a bootloader that can't be upgraded to accommodate
>> 2974 the documented boot protocol using a device tree.
>> 2975
>> 2976 Beware that there is very little in terms of protection against
>> 2977 this option being confused by leftover garbage in memory that might
>> 2978 look like a DTB header after a reboot if no actual DTB is appended
>> 2979 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2980 if you don't intend to always append a DTB.
>> 2981 endchoice
2929 2982
>> 2983 choice
>> 2984 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
>> 2985 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 2986 !MIPS_MALTA && \
>> 2987 !CAVIUM_OCTEON_SOC
>> 2988 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2989
>> 2990 config MIPS_CMDLINE_FROM_DTB
>> 2991 depends on USE_OF
>> 2992 bool "Dtb kernel arguments if available"
>> 2993
>> 2994 config MIPS_CMDLINE_DTB_EXTEND
>> 2995 depends on USE_OF
>> 2996 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2997
>> 2998 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2999 bool "Bootloader kernel arguments if available"
>> 3000
>> 3001 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3002 depends on CMDLINE_BOOL
>> 3003 bool "Extend builtin kernel arguments with bootloader arguments"
2930 endchoice 3004 endchoice
2931 3005
2932 config PCI_BIOS !! 3006 endmenu
2933 def_bool y <<
2934 depends on X86_32 && PCI && (PCI_GOBI <<
2935 3007
2936 # x86-64 doesn't support PCI BIOS access from !! 3008 config LOCKDEP_SUPPORT
2937 config PCI_DIRECT !! 3009 bool
2938 def_bool y !! 3010 default y
2939 depends on PCI && (X86_64 || (PCI_GOD <<
2940 3011
2941 config PCI_MMCONFIG !! 3012 config STACKTRACE_SUPPORT
2942 bool "Support mmconfig PCI config spa !! 3013 bool
2943 default y 3014 default y
2944 depends on PCI && (ACPI || JAILHOUSE_ <<
2945 depends on X86_64 || (PCI_GOANY || PC <<
2946 3015
2947 config PCI_OLPC !! 3016 config HAVE_LATENCYTOP_SUPPORT
2948 def_bool y !! 3017 bool
2949 depends on PCI && OLPC && (PCI_GOOLPC !! 3018 default y
2950 3019
2951 config PCI_XEN !! 3020 config PGTABLE_LEVELS
2952 def_bool y !! 3021 int
2953 depends on PCI && XEN !! 3022 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3023 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 3024 default 2
2954 3025
2955 config MMCONF_FAM10H !! 3026 config MIPS_AUTO_PFN_OFFSET
2956 def_bool y !! 3027 bool
2957 depends on X86_64 && PCI_MMCONFIG && <<
2958 3028
2959 config PCI_CNB20LE_QUIRK !! 3029 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
2960 bool "Read CNB20LE Host Bridge Window !! 3030
2961 depends on PCI !! 3031 config HW_HAS_EISA
2962 help !! 3032 bool
2963 Read the PCI windows out of the CNB !! 3033 config HW_HAS_PCI
2964 PCI hotplug to work on systems with !! 3034 bool
2965 not have ACPI. <<
2966 3035
2967 There's no public spec for this chi !! 3036 config PCI
2968 is known to be incomplete. !! 3037 bool "Support for PCI controller"
>> 3038 depends on HW_HAS_PCI
>> 3039 select PCI_DOMAINS
>> 3040 help
>> 3041 Find out whether you have a PCI motherboard. PCI is the name of a
>> 3042 bus system, i.e. the way the CPU talks to the other stuff inside
>> 3043 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
>> 3044 say Y, otherwise N.
>> 3045
>> 3046 config HT_PCI
>> 3047 bool "Support for HT-linked PCI"
>> 3048 default y
>> 3049 depends on CPU_LOONGSON3
>> 3050 select PCI
>> 3051 select PCI_DOMAINS
>> 3052 help
>> 3053 Loongson family machines use Hyper-Transport bus for inter-core
>> 3054 connection and device connection. The PCI bus is a subordinate
>> 3055 linked at HT. Choose Y for Loongson-3 based machines.
2969 3056
2970 You should say N unless you know yo !! 3057 config PCI_DOMAINS
>> 3058 bool
2971 3059
2972 config ISA_BUS !! 3060 config PCI_DOMAINS_GENERIC
2973 bool "ISA bus support on modern syste !! 3061 bool
2974 help <<
2975 Expose ISA bus device drivers and o <<
2976 configuration. Enable this option i <<
2977 bus. ISA is an older system, displa <<
2978 architectures -- if your target mac <<
2979 not have an ISA bus. <<
2980 3062
2981 If unsure, say N. !! 3063 config PCI_DRIVERS_GENERIC
>> 3064 select PCI_DOMAINS_GENERIC if PCI_DOMAINS
>> 3065 bool
2982 3066
2983 # x86_64 have no ISA slots, but can have ISA- !! 3067 config PCI_DRIVERS_LEGACY
2984 config ISA_DMA_API !! 3068 def_bool !PCI_DRIVERS_GENERIC
2985 bool "ISA-style DMA support" if (X86_ !! 3069 select NO_GENERIC_PCI_IOPORT_MAP
2986 default y <<
2987 help <<
2988 Enables ISA-style DMA support for d <<
2989 If unsure, say Y. <<
2990 3070
2991 if X86_32 !! 3071 source "drivers/pci/Kconfig"
2992 3072
>> 3073 #
>> 3074 # ISA support is now enabled via select. Too many systems still have the one
>> 3075 # or other ISA chip on the board that users don't know about so don't expect
>> 3076 # users to choose the right thing ...
>> 3077 #
2993 config ISA 3078 config ISA
2994 bool "ISA support" !! 3079 bool
2995 help <<
2996 Find out whether you have ISA slots <<
2997 name of a bus system, i.e. the way <<
2998 inside your box. Other bus systems <<
2999 (MCA) or VESA. ISA is an older sys <<
3000 newer boards don't support it. If <<
3001 <<
3002 config SCx200 <<
3003 tristate "NatSemi SCx200 support" <<
3004 help <<
3005 This provides basic support for Nat <<
3006 (now AMD's) Geode processors. The <<
3007 PCI-IDs of several on-chip devices, <<
3008 for other scx200_* drivers. <<
3009 <<
3010 If compiled as a module, the driver <<
3011 <<
3012 config SCx200HR_TIMER <<
3013 tristate "NatSemi SCx200 27MHz High-R <<
3014 depends on SCx200 <<
3015 default y <<
3016 help <<
3017 This driver provides a clocksource <<
3018 27MHz high-resolution timer. Its a <<
3019 NSC Geode SC-1100's buggy TSC, whic <<
3020 processor goes idle (as is done by <<
3021 other workaround is idle=poll boot <<
3022 <<
3023 config OLPC <<
3024 bool "One Laptop Per Child support" <<
3025 depends on !X86_PAE <<
3026 select GPIOLIB <<
3027 select OF <<
3028 select OF_PROMTREE <<
3029 select IRQ_DOMAIN <<
3030 select OLPC_EC <<
3031 help <<
3032 Add support for detecting the uniqu <<
3033 XO hardware. <<
3034 3080
3035 config OLPC_XO1_PM !! 3081 config EISA
3036 bool "OLPC XO-1 Power Management" !! 3082 bool "EISA support"
3037 depends on OLPC && MFD_CS5535=y && PM !! 3083 depends on HW_HAS_EISA
3038 help !! 3084 select ISA
3039 Add support for poweroff and suspen !! 3085 select GENERIC_ISA_DMA
>> 3086 ---help---
>> 3087 The Extended Industry Standard Architecture (EISA) bus was
>> 3088 developed as an open alternative to the IBM MicroChannel bus.
>> 3089
>> 3090 The EISA bus provided some of the features of the IBM MicroChannel
>> 3091 bus while maintaining backward compatibility with cards made for
>> 3092 the older ISA bus. The EISA bus saw limited use between 1988 and
>> 3093 1995 when it was made obsolete by the PCI bus.
>> 3094
>> 3095 Say Y here if you are building a kernel for an EISA-based machine.
>> 3096
>> 3097 Otherwise, say N.
>> 3098
>> 3099 source "drivers/eisa/Kconfig"
>> 3100
>> 3101 config TC
>> 3102 bool "TURBOchannel support"
>> 3103 depends on MACH_DECSTATION
>> 3104 help
>> 3105 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3106 processors. TURBOchannel programming specifications are available
>> 3107 at:
>> 3108 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3109 and:
>> 3110 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3111 Linux driver support status is documented at:
>> 3112 <http://www.linux-mips.org/wiki/DECstation>
3040 3113
3041 config OLPC_XO1_RTC !! 3114 config MMU
3042 bool "OLPC XO-1 Real Time Clock" !! 3115 bool
3043 depends on OLPC_XO1_PM && RTC_DRV_CMO !! 3116 default y
3044 help <<
3045 Add support for the XO-1 real time <<
3046 programmable wakeup source. <<
3047 3117
3048 config OLPC_XO1_SCI !! 3118 config ARCH_MMAP_RND_BITS_MIN
3049 bool "OLPC XO-1 SCI extras" !! 3119 default 12 if 64BIT
3050 depends on OLPC && OLPC_XO1_PM && GPI !! 3120 default 8
3051 depends on INPUT=y <<
3052 select POWER_SUPPLY <<
3053 help <<
3054 Add support for SCI-based features <<
3055 - EC-driven system wakeups <<
3056 - Power button <<
3057 - Ebook switch <<
3058 - Lid switch <<
3059 - AC adapter status updates <<
3060 - Battery status updates <<
3061 3121
3062 config OLPC_XO15_SCI !! 3122 config ARCH_MMAP_RND_BITS_MAX
3063 bool "OLPC XO-1.5 SCI extras" !! 3123 default 18 if 64BIT
3064 depends on OLPC && ACPI !! 3124 default 15
3065 select POWER_SUPPLY !! 3125
3066 help !! 3126 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3067 Add support for SCI-based features !! 3127 default 8
3068 - EC-driven system wakeups <<
3069 - AC adapter status updates <<
3070 - Battery status updates <<
3071 3128
3072 config GEODE_COMMON !! 3129 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3130 default 15
>> 3131
>> 3132 config I8253
3073 bool 3133 bool
>> 3134 select CLKSRC_I8253
>> 3135 select CLKEVT_I8253
>> 3136 select MIPS_EXTERNAL_TIMER
3074 3137
3075 config ALIX !! 3138 config ZONE_DMA
3076 bool "PCEngines ALIX System Support ( !! 3139 bool
3077 select GPIOLIB <<
3078 select GEODE_COMMON <<
3079 help <<
3080 This option enables system support <<
3081 At present this just sets up LEDs f <<
3082 ALIX2/3/6 boards. However, other s <<
3083 get added here. <<
3084 3140
3085 Note: You must still enable the dri !! 3141 config ZONE_DMA32
3086 (GPIO_CS5535 & LEDS_GPIO) to actual !! 3142 bool
3087 3143
3088 Note: You have to set alix.force=1 !! 3144 source "drivers/pcmcia/Kconfig"
3089 3145
3090 config NET5501 !! 3146 config HAS_RAPIDIO
3091 bool "Soekris Engineering net5501 Sys !! 3147 bool
3092 select GPIOLIB !! 3148 default n
3093 select GEODE_COMMON <<
3094 help <<
3095 This option enables system support <<
3096 3149
3097 config GEOS !! 3150 config RAPIDIO
3098 bool "Traverse Technologies GEOS Syst !! 3151 tristate "RapidIO support"
3099 select GPIOLIB !! 3152 depends on HAS_RAPIDIO || PCI
3100 select GEODE_COMMON <<
3101 depends on DMI <<
3102 help 3153 help
3103 This option enables system support !! 3154 If you say Y here, the kernel will include drivers and
>> 3155 infrastructure code to support RapidIO interconnect devices.
3104 3156
3105 config TS5500 !! 3157 source "drivers/rapidio/Kconfig"
3106 bool "Technologic Systems TS-5500 pla <<
3107 depends on MELAN <<
3108 select CHECK_SIGNATURE <<
3109 select NEW_LEDS <<
3110 select LEDS_CLASS <<
3111 help <<
3112 This option enables system support <<
3113 3158
3114 endif # X86_32 !! 3159 endmenu
3115 3160
3116 config AMD_NB !! 3161 config TRAD_SIGNALS
3117 def_bool y !! 3162 bool
3118 depends on CPU_SUP_AMD && PCI <<
3119 3163
3120 endmenu !! 3164 config MIPS32_COMPAT
>> 3165 bool
>> 3166
>> 3167 config COMPAT
>> 3168 bool
3121 3169
3122 menu "Binary Emulations" !! 3170 config SYSVIPC_COMPAT
>> 3171 bool
3123 3172
3124 config IA32_EMULATION !! 3173 config MIPS32_O32
3125 bool "IA32 Emulation" !! 3174 bool "Kernel support for o32 binaries"
3126 depends on X86_64 !! 3175 depends on 64BIT
3127 select ARCH_WANT_OLD_COMPAT_IPC 3176 select ARCH_WANT_OLD_COMPAT_IPC
3128 select BINFMT_ELF !! 3177 select COMPAT
3129 select COMPAT_OLD_SIGACTION !! 3178 select MIPS32_COMPAT
3130 help !! 3179 select SYSVIPC_COMPAT if SYSVIPC
3131 Include code to run legacy 32-bit p !! 3180 help
3132 64-bit kernel. You should likely tu !! 3181 Select this option if you want to run o32 binaries. These are pure
3133 100% sure that you don't have any 3 !! 3182 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3183 existing binaries are in this format.
3134 3184
3135 config IA32_EMULATION_DEFAULT_DISABLED !! 3185 If unsure, say Y.
3136 bool "IA32 emulation disabled by defa <<
3137 default n <<
3138 depends on IA32_EMULATION <<
3139 help <<
3140 Make IA32 emulation disabled by def <<
3141 processes and access to 32-bit sysc <<
3142 default value. <<
3143 <<
3144 config X86_X32_ABI <<
3145 bool "x32 ABI for 64-bit mode" <<
3146 depends on X86_64 <<
3147 # llvm-objcopy does not convert x86_6 <<
3148 # compressed debug sections to x86_x3 <<
3149 # https://github.com/ClangBuiltLinux/ <<
3150 # https://github.com/ClangBuiltLinux/ <<
3151 depends on $(success,$(OBJCOPY) --ver <<
3152 help <<
3153 Include code to run binaries for th <<
3154 for 64-bit processors. An x32 proc <<
3155 full 64-bit register file and wide <<
3156 pointers at 32 bits for smaller mem <<
3157 3186
3158 config COMPAT_32 !! 3187 config MIPS32_N32
3159 def_bool y !! 3188 bool "Kernel support for n32 binaries"
3160 depends on IA32_EMULATION || X86_32 !! 3189 depends on 64BIT
3161 select HAVE_UID16 !! 3190 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3162 select OLD_SIGSUSPEND3 !! 3191 select COMPAT
>> 3192 select MIPS32_COMPAT
>> 3193 select SYSVIPC_COMPAT if SYSVIPC
>> 3194 help
>> 3195 Select this option if you want to run n32 binaries. These are
>> 3196 64-bit binaries using 32-bit quantities for addressing and certain
>> 3197 data that would normally be 64-bit. They are used in special
>> 3198 cases.
3163 3199
3164 config COMPAT !! 3200 If unsure, say N.
>> 3201
>> 3202 config BINFMT_ELF32
>> 3203 bool
>> 3204 default y if MIPS32_O32 || MIPS32_N32
>> 3205 select ELFCORE
>> 3206
>> 3207 menu "Power management options"
>> 3208
>> 3209 config ARCH_HIBERNATION_POSSIBLE
3165 def_bool y 3210 def_bool y
3166 depends on IA32_EMULATION || X86_X32_ !! 3211 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3167 3212
3168 config COMPAT_FOR_U64_ALIGNMENT !! 3213 config ARCH_SUSPEND_POSSIBLE
3169 def_bool y 3214 def_bool y
3170 depends on COMPAT !! 3215 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3216
>> 3217 source "kernel/power/Kconfig"
3171 3218
3172 endmenu 3219 endmenu
3173 3220
3174 config HAVE_ATOMIC_IOMAP !! 3221 config MIPS_EXTERNAL_TIMER
3175 def_bool y !! 3222 bool
3176 depends on X86_32 !! 3223
>> 3224 menu "CPU Power Management"
>> 3225
>> 3226 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3227 source "drivers/cpufreq/Kconfig"
>> 3228 endif
>> 3229
>> 3230 source "drivers/cpuidle/Kconfig"
>> 3231
>> 3232 endmenu
3177 3233
3178 source "arch/x86/kvm/Kconfig" !! 3234 source "drivers/firmware/Kconfig"
3179 3235
3180 source "arch/x86/Kconfig.assembler" !! 3236 source "arch/mips/kvm/Kconfig"
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