1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 # Select 32 or 64 bit !! 2 config MIPS
3 config 64BIT !! 3 bool
4 bool "64-bit kernel" if "$(ARCH)" = "x !! 4 default y
5 default "$(ARCH)" != "i386" !! 5 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
6 help !! 6 select ARCH_CLOCKSOURCE_DATA
7 Say yes to build a 64-bit kernel - f !! 7 select ARCH_DISCARD_MEMBLOCK
8 Say no to build a 32-bit kernel - fo <<
9 <<
10 config X86_32 <<
11 def_bool y <<
12 depends on !64BIT <<
13 # Options that are inherently 32-bit k <<
14 select ARCH_WANT_IPC_PARSE_VERSION <<
15 select CLKSRC_I8253 <<
16 select CLONE_BACKWARDS <<
17 select GENERIC_VDSO_32 <<
18 select HAVE_DEBUG_STACKOVERFLOW <<
19 select KMAP_LOCAL <<
20 select MODULES_USE_ELF_REL <<
21 select OLD_SIGACTION <<
22 select ARCH_SPLIT_ARG64 <<
23 <<
24 config X86_64 <<
25 def_bool y <<
26 depends on 64BIT <<
27 # Options that are inherently 64-bit k <<
28 select ARCH_HAS_GIGANTIC_PAGE <<
29 select ARCH_SUPPORTS_INT128 if CC_HAS_ <<
30 select ARCH_SUPPORTS_PER_VMA_LOCK <<
31 select ARCH_SUPPORTS_HUGE_PFNMAP if TR <<
32 select HAVE_ARCH_SOFT_DIRTY <<
33 select MODULES_USE_ELF_RELA <<
34 select NEED_DMA_MAP_STATE <<
35 select SWIOTLB <<
36 select ARCH_HAS_ELFCORE_COMPAT <<
37 select ZONE_DMA32 <<
38 select EXECMEM if DYNAMIC_FTRACE <<
39 <<
40 config FORCE_DYNAMIC_FTRACE <<
41 def_bool y <<
42 depends on X86_32 <<
43 depends on FUNCTION_TRACER <<
44 select DYNAMIC_FTRACE <<
45 help <<
46 We keep the static function tracing <<
47 in order to test the non static func <<
48 generic code, as other architectures <<
49 only need to keep it around for x86_ <<
50 for x86_32. For x86_32, force DYNAMI <<
51 # <<
52 # Arch settings <<
53 # <<
54 # ( Note that options that are marked 'if X86_ <<
55 # ported to 32-bit as well. ) <<
56 # <<
57 config X86 <<
58 def_bool y <<
59 # <<
60 # Note: keep this list sorted alphabet <<
61 # <<
62 select ACPI_LEGACY_TABLES_LOOKUP <<
63 select ACPI_SYSTEM_POWER_STATES_SUPPOR <<
64 select ACPI_HOTPLUG_CPU <<
65 select ARCH_32BIT_OFF_T <<
66 select ARCH_CLOCKSOURCE_INIT <<
67 select ARCH_CONFIGURES_CPU_MITIGATIONS <<
68 select ARCH_CORRECT_STACKTRACE_ON_KRET <<
69 select ARCH_ENABLE_HUGEPAGE_MIGRATION <<
70 select ARCH_ENABLE_MEMORY_HOTPLUG if X <<
71 select ARCH_ENABLE_MEMORY_HOTREMOVE if <<
72 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if <<
73 select ARCH_ENABLE_THP_MIGRATION if X8 <<
74 select ARCH_HAS_ACPI_TABLE_UPGRADE <<
75 select ARCH_HAS_CACHE_LINE_SIZE <<
76 select ARCH_HAS_CPU_CACHE_INVALIDATE_M <<
77 select ARCH_HAS_CPU_FINALIZE_INIT <<
78 select ARCH_HAS_CPU_PASID <<
79 select ARCH_HAS_CURRENT_STACK_POINTER <<
80 select ARCH_HAS_DEBUG_VIRTUAL <<
81 select ARCH_HAS_DEBUG_VM_PGTABLE <<
82 select ARCH_HAS_DEVMEM_IS_ALLOWED <<
83 select ARCH_HAS_DMA_OPS <<
84 select ARCH_HAS_EARLY_DEBUG <<
85 select ARCH_HAS_ELF_RANDOMIZE 8 select ARCH_HAS_ELF_RANDOMIZE
86 select ARCH_HAS_FAST_MULTIPLIER !! 9 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
87 select ARCH_HAS_FORTIFY_SOURCE !! 10 select ARCH_HAS_UBSAN_SANITIZE_ALL
88 select ARCH_HAS_GCOV_PROFILE_ALL !! 11 select ARCH_SUPPORTS_UPROBES
89 select ARCH_HAS_KCOV <<
90 select ARCH_HAS_KERNEL_FPU_SUPPORT <<
91 select ARCH_HAS_MEM_ENCRYPT <<
92 select ARCH_HAS_MEMBARRIER_SYNC_CORE <<
93 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS <<
94 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
95 select ARCH_HAS_PMEM_API <<
96 select ARCH_HAS_PTE_DEVMAP <<
97 select ARCH_HAS_PTE_SPECIAL <<
98 select ARCH_HAS_HW_PTE_YOUNG <<
99 select ARCH_HAS_NONLEAF_PMD_YOUNG <<
100 select ARCH_HAS_UACCESS_FLUSHCACHE <<
101 select ARCH_HAS_COPY_MC <<
102 select ARCH_HAS_SET_MEMORY <<
103 select ARCH_HAS_SET_DIRECT_MAP <<
104 select ARCH_HAS_STRICT_KERNEL_RWX <<
105 select ARCH_HAS_STRICT_MODULE_RWX <<
106 select ARCH_HAS_SYNC_CORE_BEFORE_USERM <<
107 select ARCH_HAS_SYSCALL_WRAPPER <<
108 select ARCH_HAS_UBSAN <<
109 select ARCH_HAS_DEBUG_WX <<
110 select ARCH_HAS_ZONE_DMA_SET if EXPERT <<
111 select ARCH_HAVE_NMI_SAFE_CMPXCHG <<
112 select ARCH_HAVE_EXTRA_ELF_NOTES <<
113 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL <<
114 select ARCH_MIGHT_HAVE_ACPI_PDC <<
115 select ARCH_MIGHT_HAVE_PC_PARPORT <<
116 select ARCH_MIGHT_HAVE_PC_SERIO <<
117 select ARCH_STACKWALK <<
118 select ARCH_SUPPORTS_ACPI <<
119 select ARCH_SUPPORTS_ATOMIC_RMW <<
120 select ARCH_SUPPORTS_DEBUG_PAGEALLOC <<
121 select ARCH_SUPPORTS_PAGE_TABLE_CHECK <<
122 select ARCH_SUPPORTS_NUMA_BALANCING <<
123 select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_ <<
124 select ARCH_SUPPORTS_CFI_CLANG <<
125 select ARCH_USES_CFI_TRAPS <<
126 select ARCH_SUPPORTS_LTO_CLANG <<
127 select ARCH_SUPPORTS_LTO_CLANG_THIN <<
128 select ARCH_SUPPORTS_RT <<
129 select ARCH_USE_BUILTIN_BSWAP 12 select ARCH_USE_BUILTIN_BSWAP
130 select ARCH_USE_CMPXCHG_LOCKREF !! 13 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
131 select ARCH_USE_MEMTEST <<
132 select ARCH_USE_QUEUED_RWLOCKS 14 select ARCH_USE_QUEUED_RWLOCKS
133 select ARCH_USE_QUEUED_SPINLOCKS 15 select ARCH_USE_QUEUED_SPINLOCKS
134 select ARCH_USE_SYM_ANNOTATIONS !! 16 select ARCH_WANT_IPC_PARSE_VERSION
135 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU !! 17 select BUILDTIME_EXTABLE_SORT
136 select ARCH_WANT_DEFAULT_BPF_JIT !! 18 select CLONE_BACKWARDS
137 select ARCH_WANTS_DYNAMIC_TASK_STRUCT !! 19 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
138 select ARCH_WANTS_NO_INSTR !! 20 select CPU_PM if CPU_IDLE
139 select ARCH_WANT_GENERAL_HUGETLB !! 21 select GENERIC_ATOMIC64 if !64BIT
140 select ARCH_WANT_HUGE_PMD_SHARE !! 22 select GENERIC_CLOCKEVENTS
141 select ARCH_WANT_LD_ORPHAN_WARN <<
142 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
143 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM <<
144 select ARCH_WANTS_THP_SWAP <<
145 select ARCH_HAS_PARANOID_L1D_FLUSH <<
146 select BUILDTIME_TABLE_SORT <<
147 select CLKEVT_I8253 <<
148 select CLOCKSOURCE_VALIDATE_LAST_CYCLE <<
149 select CLOCKSOURCE_WATCHDOG <<
150 # Word-size accesses may read uninitia <<
151 # in strings and cause false KMSAN rep <<
152 select DCACHE_WORD_ACCESS <<
153 select DYNAMIC_SIGFRAME <<
154 select EDAC_ATOMIC_SCRUB <<
155 select EDAC_SUPPORT <<
156 select GENERIC_CLOCKEVENTS_BROADCAST <<
157 select GENERIC_CLOCKEVENTS_BROADCAST_I <<
158 select GENERIC_CLOCKEVENTS_MIN_ADJUST <<
159 select GENERIC_CMOS_UPDATE 23 select GENERIC_CMOS_UPDATE
160 select GENERIC_CPU_AUTOPROBE 24 select GENERIC_CPU_AUTOPROBE
161 select GENERIC_CPU_DEVICES <<
162 select GENERIC_CPU_VULNERABILITIES <<
163 select GENERIC_EARLY_IOREMAP <<
164 select GENERIC_ENTRY <<
165 select GENERIC_IOMAP 25 select GENERIC_IOMAP
166 select GENERIC_IRQ_EFFECTIVE_AFF_MASK <<
167 select GENERIC_IRQ_MATRIX_ALLOCATOR <<
168 select GENERIC_IRQ_MIGRATION <<
169 select GENERIC_IRQ_PROBE 26 select GENERIC_IRQ_PROBE
170 select GENERIC_IRQ_RESERVATION_MODE <<
171 select GENERIC_IRQ_SHOW 27 select GENERIC_IRQ_SHOW
172 select GENERIC_PENDING_IRQ !! 28 select GENERIC_ISA_DMA if EISA
173 select GENERIC_PTDUMP !! 29 select GENERIC_LIB_ASHLDI3
>> 30 select GENERIC_LIB_ASHRDI3
>> 31 select GENERIC_LIB_CMPDI2
>> 32 select GENERIC_LIB_LSHRDI3
>> 33 select GENERIC_LIB_UCMPDI2
>> 34 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
174 select GENERIC_SMP_IDLE_THREAD 35 select GENERIC_SMP_IDLE_THREAD
175 select GENERIC_TIME_VSYSCALL 36 select GENERIC_TIME_VSYSCALL
176 select GENERIC_GETTIMEOFDAY !! 37 select HANDLE_DOMAIN_IRQ
177 select GENERIC_VDSO_TIME_NS !! 38 select HAVE_ARCH_COMPILER_H
178 select GENERIC_VDSO_OVERFLOW_PROTECT <<
179 select GUP_GET_PXX_LOW_HIGH <<
180 select HARDIRQS_SW_RESEND <<
181 select HARDLOCKUP_CHECK_TIMESTAMP <<
182 select HAS_IOPORT <<
183 select HAVE_ACPI_APEI <<
184 select HAVE_ACPI_APEI_NMI <<
185 select HAVE_ALIGNED_STRUCT_PAGE <<
186 select HAVE_ARCH_AUDITSYSCALL <<
187 select HAVE_ARCH_HUGE_VMAP <<
188 select HAVE_ARCH_HUGE_VMALLOC <<
189 select HAVE_ARCH_JUMP_LABEL 39 select HAVE_ARCH_JUMP_LABEL
190 select HAVE_ARCH_JUMP_LABEL_RELATIVE <<
191 select HAVE_ARCH_KASAN <<
192 select HAVE_ARCH_KASAN_VMALLOC <<
193 select HAVE_ARCH_KFENCE <<
194 select HAVE_ARCH_KMSAN <<
195 select HAVE_ARCH_KGDB 40 select HAVE_ARCH_KGDB
196 select HAVE_ARCH_MMAP_RND_BITS !! 41 select HAVE_ARCH_MMAP_RND_BITS if MMU
197 select HAVE_ARCH_MMAP_RND_COMPAT_BITS !! 42 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
198 select HAVE_ARCH_COMPAT_MMAP_BASES <<
199 select HAVE_ARCH_PREL32_RELOCATIONS <<
200 select HAVE_ARCH_SECCOMP_FILTER 43 select HAVE_ARCH_SECCOMP_FILTER
201 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
202 select HAVE_ARCH_STACKLEAK <<
203 select HAVE_ARCH_TRACEHOOK 44 select HAVE_ARCH_TRACEHOOK
204 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 45 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
205 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_ !! 46 select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS)
206 select HAVE_ARCH_USERFAULTFD_WP !! 47 select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS)
207 select HAVE_ARCH_USERFAULTFD_MINOR !! 48 select HAVE_CONTEXT_TRACKING
208 select HAVE_ARCH_VMAP_STACK !! 49 select HAVE_COPY_THREAD_TLS
209 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
210 select HAVE_ARCH_WITHIN_STACK_FRAMES <<
211 select HAVE_ASM_MODVERSIONS <<
212 select HAVE_CMPXCHG_DOUBLE <<
213 select HAVE_CMPXCHG_LOCAL <<
214 select HAVE_CONTEXT_TRACKING_USER <<
215 select HAVE_CONTEXT_TRACKING_USER_OFFS <<
216 select HAVE_C_RECORDMCOUNT 50 select HAVE_C_RECORDMCOUNT
217 select HAVE_OBJTOOL_MCOUNT <<
218 select HAVE_OBJTOOL_NOP_MCOUNT <<
219 select HAVE_BUILDTIME_MCOUNT_SORT <<
220 select HAVE_DEBUG_KMEMLEAK 51 select HAVE_DEBUG_KMEMLEAK
>> 52 select HAVE_DEBUG_STACKOVERFLOW
221 select HAVE_DMA_CONTIGUOUS 53 select HAVE_DMA_CONTIGUOUS
222 select HAVE_DYNAMIC_FTRACE 54 select HAVE_DYNAMIC_FTRACE
223 select HAVE_DYNAMIC_FTRACE_WITH_REGS <<
224 select HAVE_DYNAMIC_FTRACE_WITH_ARGS <<
225 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT <<
226 select HAVE_SAMPLE_FTRACE_DIRECT <<
227 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI <<
228 select HAVE_EBPF_JIT <<
229 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
230 select HAVE_EISA <<
231 select HAVE_EXIT_THREAD 55 select HAVE_EXIT_THREAD
232 select HAVE_GUP_FAST <<
233 select HAVE_FENTRY <<
234 select HAVE_FTRACE_MCOUNT_RECORD 56 select HAVE_FTRACE_MCOUNT_RECORD
235 select HAVE_FUNCTION_GRAPH_RETVAL !! 57 select HAVE_FUNCTION_GRAPH_TRACER
236 select HAVE_FUNCTION_GRAPH_TRACER <<
237 select HAVE_FUNCTION_TRACER 58 select HAVE_FUNCTION_TRACER
238 select HAVE_GCC_PLUGINS !! 59 select HAVE_GENERIC_DMA_COHERENT
239 select HAVE_HW_BREAKPOINT !! 60 select HAVE_IDE
240 select HAVE_IOREMAP_PROT 61 select HAVE_IOREMAP_PROT
241 select HAVE_IRQ_EXIT_ON_IRQ_STACK !! 62 select HAVE_IRQ_EXIT_ON_IRQ_STACK
242 select HAVE_IRQ_TIME_ACCOUNTING 63 select HAVE_IRQ_TIME_ACCOUNTING
243 select HAVE_JUMP_LABEL_HACK <<
244 select HAVE_KERNEL_BZIP2 <<
245 select HAVE_KERNEL_GZIP <<
246 select HAVE_KERNEL_LZ4 <<
247 select HAVE_KERNEL_LZMA <<
248 select HAVE_KERNEL_LZO <<
249 select HAVE_KERNEL_XZ <<
250 select HAVE_KERNEL_ZSTD <<
251 select HAVE_KPROBES 64 select HAVE_KPROBES
252 select HAVE_KPROBES_ON_FTRACE <<
253 select HAVE_FUNCTION_ERROR_INJECTION <<
254 select HAVE_KRETPROBES 65 select HAVE_KRETPROBES
255 select HAVE_RETHOOK !! 66 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
256 select HAVE_LIVEPATCH !! 67 select HAVE_MEMBLOCK_NODE_MAP
257 select HAVE_MIXED_BREAKPOINTS_REGS <<
258 select HAVE_MOD_ARCH_SPECIFIC 68 select HAVE_MOD_ARCH_SPECIFIC
259 select HAVE_MOVE_PMD <<
260 select HAVE_MOVE_PUD <<
261 select HAVE_NOINSTR_HACK <<
262 select HAVE_NMI 69 select HAVE_NMI
263 select HAVE_NOINSTR_VALIDATION !! 70 select HAVE_OPROFILE
264 select HAVE_OBJTOOL <<
265 select HAVE_OPTPROBES <<
266 select HAVE_PAGE_SIZE_4KB <<
267 select HAVE_PCSPKR_PLATFORM <<
268 select HAVE_PERF_EVENTS 71 select HAVE_PERF_EVENTS
269 select HAVE_PERF_EVENTS_NMI <<
270 select HAVE_HARDLOCKUP_DETECTOR_PERF <<
271 select HAVE_PCI <<
272 select HAVE_PERF_REGS <<
273 select HAVE_PERF_USER_STACK_DUMP <<
274 select MMU_GATHER_RCU_TABLE_FREE <<
275 select MMU_GATHER_MERGE_VMAS <<
276 select HAVE_POSIX_CPU_TIMERS_TASK_WORK <<
277 select HAVE_REGS_AND_STACK_ACCESS_API 72 select HAVE_REGS_AND_STACK_ACCESS_API
278 select HAVE_RELIABLE_STACKTRACE <<
279 select HAVE_FUNCTION_ARG_ACCESS_API <<
280 select HAVE_SETUP_PER_CPU_AREA <<
281 select HAVE_SOFTIRQ_ON_OWN_STACK <<
282 select HAVE_STACKPROTECTOR <<
283 select HAVE_STACK_VALIDATION <<
284 select HAVE_STATIC_CALL <<
285 select HAVE_STATIC_CALL_INLINE <<
286 select HAVE_PREEMPT_DYNAMIC_CALL <<
287 select HAVE_RSEQ 73 select HAVE_RSEQ
288 select HAVE_RUST !! 74 select HAVE_STACKPROTECTOR
289 select HAVE_SYSCALL_TRACEPOINTS 75 select HAVE_SYSCALL_TRACEPOINTS
290 select HAVE_UACCESS_VALIDATION !! 76 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
291 select HAVE_UNSTABLE_SCHED_CLOCK <<
292 select HAVE_USER_RETURN_NOTIFIER <<
293 select HAVE_GENERIC_VDSO <<
294 select VDSO_GETRANDOM <<
295 select HOTPLUG_PARALLEL <<
296 select HOTPLUG_SMT <<
297 select HOTPLUG_SPLIT_STARTUP <<
298 select IRQ_FORCED_THREADING 77 select IRQ_FORCED_THREADING
299 select LOCK_MM_AND_FIND_VMA !! 78 select ISA if EISA
300 select NEED_PER_CPU_EMBED_FIRST_CHUNK !! 79 select MODULES_USE_ELF_RELA if MODULES && 64BIT
301 select NEED_PER_CPU_PAGE_FIRST_CHUNK !! 80 select MODULES_USE_ELF_REL if MODULES
302 select NEED_SG_DMA_LENGTH !! 81 select PERF_USE_VMALLOC
303 select NUMA_MEMBLKS <<
304 select PCI_DOMAINS <<
305 select PCI_LOCKLESS_CONFIG <<
306 select PERF_EVENTS <<
307 select RTC_LIB 82 select RTC_LIB
308 select RTC_MC146818_LIB <<
309 select SPARSE_IRQ <<
310 select SYSCTL_EXCEPTION_TRACE 83 select SYSCTL_EXCEPTION_TRACE
311 select THREAD_INFO_IN_TASK !! 84 select VIRT_TO_BUS
312 select TRACE_IRQFLAGS_SUPPORT <<
313 select TRACE_IRQFLAGS_NMI_SUPPORT <<
314 select USER_STACKTRACE_SUPPORT <<
315 select HAVE_ARCH_KCSAN <<
316 select PROC_PID_ARCH_STATUS <<
317 select HAVE_ARCH_NODE_DEV_GROUP <<
318 select FUNCTION_ALIGNMENT_16B <<
319 select FUNCTION_ALIGNMENT_4B <<
320 imply IMA_SECURE_AND_OR_TRUSTED_BOOT <<
321 select HAVE_DYNAMIC_FTRACE_NO_PATCHABL <<
322 85
323 config INSTRUCTION_DECODER !! 86 menu "Machine selection"
324 def_bool y <<
325 depends on KPROBES || PERF_EVENTS || U <<
326 87
327 config OUTPUT_FORMAT !! 88 choice
328 string !! 89 prompt "System type"
329 default "elf32-i386" if X86_32 !! 90 default MIPS_GENERIC
330 default "elf64-x86-64" if X86_64 <<
331 91
332 config LOCKDEP_SUPPORT !! 92 config MIPS_GENERIC
333 def_bool y !! 93 bool "Generic board-agnostic MIPS kernel"
>> 94 select BOOT_RAW
>> 95 select BUILTIN_DTB
>> 96 select CEVT_R4K
>> 97 select CLKSRC_MIPS_GIC
>> 98 select COMMON_CLK
>> 99 select CPU_MIPSR2_IRQ_VI
>> 100 select CPU_MIPSR2_IRQ_EI
>> 101 select CSRC_R4K
>> 102 select DMA_PERDEV_COHERENT
>> 103 select HAVE_PCI
>> 104 select IRQ_MIPS_CPU
>> 105 select LIBFDT
>> 106 select MIPS_AUTO_PFN_OFFSET
>> 107 select MIPS_CPU_SCACHE
>> 108 select MIPS_GIC
>> 109 select MIPS_L1_CACHE_SHIFT_7
>> 110 select NO_EXCEPT_FILL
>> 111 select PCI_DRIVERS_GENERIC
>> 112 select PINCTRL
>> 113 select SMP_UP if SMP
>> 114 select SWAP_IO_SPACE
>> 115 select SYS_HAS_CPU_MIPS32_R1
>> 116 select SYS_HAS_CPU_MIPS32_R2
>> 117 select SYS_HAS_CPU_MIPS32_R6
>> 118 select SYS_HAS_CPU_MIPS64_R1
>> 119 select SYS_HAS_CPU_MIPS64_R2
>> 120 select SYS_HAS_CPU_MIPS64_R6
>> 121 select SYS_SUPPORTS_32BIT_KERNEL
>> 122 select SYS_SUPPORTS_64BIT_KERNEL
>> 123 select SYS_SUPPORTS_BIG_ENDIAN
>> 124 select SYS_SUPPORTS_HIGHMEM
>> 125 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 126 select SYS_SUPPORTS_MICROMIPS
>> 127 select SYS_SUPPORTS_MIPS_CPS
>> 128 select SYS_SUPPORTS_MIPS16
>> 129 select SYS_SUPPORTS_MULTITHREADING
>> 130 select SYS_SUPPORTS_RELOCATABLE
>> 131 select SYS_SUPPORTS_SMARTMIPS
>> 132 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 133 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 134 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 135 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 136 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 137 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 138 select USE_OF
>> 139 select UHI_BOOT
>> 140 help
>> 141 Select this to build a kernel which aims to support multiple boards,
>> 142 generally using a flattened device tree passed from the bootloader
>> 143 using the boot protocol defined in the UHI (Unified Hosting
>> 144 Interface) specification.
334 145
335 config STACKTRACE_SUPPORT !! 146 config MIPS_ALCHEMY
336 def_bool y !! 147 bool "Alchemy processor based machines"
>> 148 select PHYS_ADDR_T_64BIT
>> 149 select CEVT_R4K
>> 150 select CSRC_R4K
>> 151 select IRQ_MIPS_CPU
>> 152 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 153 select SYS_HAS_CPU_MIPS32_R1
>> 154 select SYS_SUPPORTS_32BIT_KERNEL
>> 155 select SYS_SUPPORTS_APM_EMULATION
>> 156 select GPIOLIB
>> 157 select SYS_SUPPORTS_ZBOOT
>> 158 select COMMON_CLK
337 159
338 config MMU !! 160 config AR7
339 def_bool y !! 161 bool "Texas Instruments AR7"
>> 162 select BOOT_ELF32
>> 163 select DMA_NONCOHERENT
>> 164 select CEVT_R4K
>> 165 select CSRC_R4K
>> 166 select IRQ_MIPS_CPU
>> 167 select NO_EXCEPT_FILL
>> 168 select SWAP_IO_SPACE
>> 169 select SYS_HAS_CPU_MIPS32_R1
>> 170 select SYS_HAS_EARLY_PRINTK
>> 171 select SYS_SUPPORTS_32BIT_KERNEL
>> 172 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 173 select SYS_SUPPORTS_MIPS16
>> 174 select SYS_SUPPORTS_ZBOOT_UART16550
>> 175 select GPIOLIB
>> 176 select VLYNQ
>> 177 select HAVE_CLK
>> 178 help
>> 179 Support for the Texas Instruments AR7 System-on-a-Chip
>> 180 family: TNETD7100, 7200 and 7300.
340 181
341 config ARCH_MMAP_RND_BITS_MIN !! 182 config ATH25
342 default 28 if 64BIT !! 183 bool "Atheros AR231x/AR531x SoC support"
343 default 8 !! 184 select CEVT_R4K
>> 185 select CSRC_R4K
>> 186 select DMA_NONCOHERENT
>> 187 select IRQ_MIPS_CPU
>> 188 select IRQ_DOMAIN
>> 189 select SYS_HAS_CPU_MIPS32_R1
>> 190 select SYS_SUPPORTS_BIG_ENDIAN
>> 191 select SYS_SUPPORTS_32BIT_KERNEL
>> 192 select SYS_HAS_EARLY_PRINTK
>> 193 help
>> 194 Support for Atheros AR231x and Atheros AR531x based boards
>> 195
>> 196 config ATH79
>> 197 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 198 select ARCH_HAS_RESET_CONTROLLER
>> 199 select BOOT_RAW
>> 200 select CEVT_R4K
>> 201 select CSRC_R4K
>> 202 select DMA_NONCOHERENT
>> 203 select GPIOLIB
>> 204 select PINCTRL
>> 205 select HAVE_CLK
>> 206 select COMMON_CLK
>> 207 select CLKDEV_LOOKUP
>> 208 select IRQ_MIPS_CPU
>> 209 select MIPS_MACHINE
>> 210 select SYS_HAS_CPU_MIPS32_R2
>> 211 select SYS_HAS_EARLY_PRINTK
>> 212 select SYS_SUPPORTS_32BIT_KERNEL
>> 213 select SYS_SUPPORTS_BIG_ENDIAN
>> 214 select SYS_SUPPORTS_MIPS16
>> 215 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 216 select USE_OF
>> 217 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 218 help
>> 219 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 220
>> 221 config BMIPS_GENERIC
>> 222 bool "Broadcom Generic BMIPS kernel"
>> 223 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 224 select ARCH_HAS_PHYS_TO_DMA
>> 225 select BOOT_RAW
>> 226 select NO_EXCEPT_FILL
>> 227 select USE_OF
>> 228 select CEVT_R4K
>> 229 select CSRC_R4K
>> 230 select SYNC_R4K
>> 231 select COMMON_CLK
>> 232 select BCM6345_L1_IRQ
>> 233 select BCM7038_L1_IRQ
>> 234 select BCM7120_L2_IRQ
>> 235 select BRCMSTB_L2_IRQ
>> 236 select IRQ_MIPS_CPU
>> 237 select DMA_NONCOHERENT
>> 238 select SYS_SUPPORTS_32BIT_KERNEL
>> 239 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 240 select SYS_SUPPORTS_BIG_ENDIAN
>> 241 select SYS_SUPPORTS_HIGHMEM
>> 242 select SYS_HAS_CPU_BMIPS32_3300
>> 243 select SYS_HAS_CPU_BMIPS4350
>> 244 select SYS_HAS_CPU_BMIPS4380
>> 245 select SYS_HAS_CPU_BMIPS5000
>> 246 select SWAP_IO_SPACE
>> 247 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 248 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 249 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 250 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 251 select HARDIRQS_SW_RESEND
>> 252 help
>> 253 Build a generic DT-based kernel image that boots on select
>> 254 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 255 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 256 must be set appropriately for your board.
>> 257
>> 258 config BCM47XX
>> 259 bool "Broadcom BCM47XX based boards"
>> 260 select BOOT_RAW
>> 261 select CEVT_R4K
>> 262 select CSRC_R4K
>> 263 select DMA_NONCOHERENT
>> 264 select HAVE_PCI
>> 265 select IRQ_MIPS_CPU
>> 266 select SYS_HAS_CPU_MIPS32_R1
>> 267 select NO_EXCEPT_FILL
>> 268 select SYS_SUPPORTS_32BIT_KERNEL
>> 269 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 270 select SYS_SUPPORTS_MIPS16
>> 271 select SYS_SUPPORTS_ZBOOT
>> 272 select SYS_HAS_EARLY_PRINTK
>> 273 select USE_GENERIC_EARLY_PRINTK_8250
>> 274 select GPIOLIB
>> 275 select LEDS_GPIO_REGISTER
>> 276 select BCM47XX_NVRAM
>> 277 select BCM47XX_SPROM
>> 278 select BCM47XX_SSB if !BCM47XX_BCMA
>> 279 help
>> 280 Support for BCM47XX based boards
>> 281
>> 282 config BCM63XX
>> 283 bool "Broadcom BCM63XX based boards"
>> 284 select BOOT_RAW
>> 285 select CEVT_R4K
>> 286 select CSRC_R4K
>> 287 select SYNC_R4K
>> 288 select DMA_NONCOHERENT
>> 289 select IRQ_MIPS_CPU
>> 290 select SYS_SUPPORTS_32BIT_KERNEL
>> 291 select SYS_SUPPORTS_BIG_ENDIAN
>> 292 select SYS_HAS_EARLY_PRINTK
>> 293 select SWAP_IO_SPACE
>> 294 select GPIOLIB
>> 295 select HAVE_CLK
>> 296 select MIPS_L1_CACHE_SHIFT_4
>> 297 select CLKDEV_LOOKUP
>> 298 help
>> 299 Support for BCM63XX based boards
>> 300
>> 301 config MIPS_COBALT
>> 302 bool "Cobalt Server"
>> 303 select CEVT_R4K
>> 304 select CSRC_R4K
>> 305 select CEVT_GT641XX
>> 306 select DMA_NONCOHERENT
>> 307 select FORCE_PCI
>> 308 select I8253
>> 309 select I8259
>> 310 select IRQ_MIPS_CPU
>> 311 select IRQ_GT641XX
>> 312 select PCI_GT64XXX_PCI0
>> 313 select SYS_HAS_CPU_NEVADA
>> 314 select SYS_HAS_EARLY_PRINTK
>> 315 select SYS_SUPPORTS_32BIT_KERNEL
>> 316 select SYS_SUPPORTS_64BIT_KERNEL
>> 317 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 318 select USE_GENERIC_EARLY_PRINTK_8250
>> 319
>> 320 config MACH_DECSTATION
>> 321 bool "DECstations"
>> 322 select BOOT_ELF32
>> 323 select CEVT_DS1287
>> 324 select CEVT_R4K if CPU_R4X00
>> 325 select CSRC_IOASIC
>> 326 select CSRC_R4K if CPU_R4X00
>> 327 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 328 select CPU_R4000_WORKAROUNDS if 64BIT
>> 329 select CPU_R4400_WORKAROUNDS if 64BIT
>> 330 select DMA_NONCOHERENT
>> 331 select NO_IOPORT_MAP
>> 332 select IRQ_MIPS_CPU
>> 333 select SYS_HAS_CPU_R3000
>> 334 select SYS_HAS_CPU_R4X00
>> 335 select SYS_SUPPORTS_32BIT_KERNEL
>> 336 select SYS_SUPPORTS_64BIT_KERNEL
>> 337 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 338 select SYS_SUPPORTS_128HZ
>> 339 select SYS_SUPPORTS_256HZ
>> 340 select SYS_SUPPORTS_1024HZ
>> 341 select MIPS_L1_CACHE_SHIFT_4
>> 342 help
>> 343 This enables support for DEC's MIPS based workstations. For details
>> 344 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 345 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 346
>> 347 If you have one of the following DECstation Models you definitely
>> 348 want to choose R4xx0 for the CPU Type:
>> 349
>> 350 DECstation 5000/50
>> 351 DECstation 5000/150
>> 352 DECstation 5000/260
>> 353 DECsystem 5900/260
344 354
345 config ARCH_MMAP_RND_BITS_MAX !! 355 otherwise choose R3000.
346 default 32 if 64BIT <<
347 default 16 <<
348 356
349 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 357 config MACH_JAZZ
350 default 8 !! 358 bool "Jazz family of machines"
>> 359 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 360 select ARCH_MIGHT_HAVE_PC_SERIO
>> 361 select FW_ARC
>> 362 select FW_ARC32
>> 363 select ARCH_MAY_HAVE_PC_FDC
>> 364 select CEVT_R4K
>> 365 select CSRC_R4K
>> 366 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 367 select GENERIC_ISA_DMA
>> 368 select HAVE_PCSPKR_PLATFORM
>> 369 select IRQ_MIPS_CPU
>> 370 select I8253
>> 371 select I8259
>> 372 select ISA
>> 373 select SYS_HAS_CPU_R4X00
>> 374 select SYS_SUPPORTS_32BIT_KERNEL
>> 375 select SYS_SUPPORTS_64BIT_KERNEL
>> 376 select SYS_SUPPORTS_100HZ
>> 377 help
>> 378 This a family of machines based on the MIPS R4030 chipset which was
>> 379 used by several vendors to build RISC/os and Windows NT workstations.
>> 380 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 381 Olivetti M700-10 workstations.
>> 382
>> 383 config MACH_INGENIC
>> 384 bool "Ingenic SoC based machines"
>> 385 select SYS_SUPPORTS_32BIT_KERNEL
>> 386 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 387 select SYS_SUPPORTS_ZBOOT_UART16550
>> 388 select DMA_NONCOHERENT
>> 389 select IRQ_MIPS_CPU
>> 390 select PINCTRL
>> 391 select GPIOLIB
>> 392 select COMMON_CLK
>> 393 select GENERIC_IRQ_CHIP
>> 394 select BUILTIN_DTB
>> 395 select USE_OF
>> 396 select LIBFDT
>> 397
>> 398 config LANTIQ
>> 399 bool "Lantiq based platforms"
>> 400 select DMA_NONCOHERENT
>> 401 select IRQ_MIPS_CPU
>> 402 select CEVT_R4K
>> 403 select CSRC_R4K
>> 404 select SYS_HAS_CPU_MIPS32_R1
>> 405 select SYS_HAS_CPU_MIPS32_R2
>> 406 select SYS_SUPPORTS_BIG_ENDIAN
>> 407 select SYS_SUPPORTS_32BIT_KERNEL
>> 408 select SYS_SUPPORTS_MIPS16
>> 409 select SYS_SUPPORTS_MULTITHREADING
>> 410 select SYS_SUPPORTS_VPE_LOADER
>> 411 select SYS_HAS_EARLY_PRINTK
>> 412 select GPIOLIB
>> 413 select SWAP_IO_SPACE
>> 414 select BOOT_RAW
>> 415 select CLKDEV_LOOKUP
>> 416 select USE_OF
>> 417 select PINCTRL
>> 418 select PINCTRL_LANTIQ
>> 419 select ARCH_HAS_RESET_CONTROLLER
>> 420 select RESET_CONTROLLER
>> 421
>> 422 config LASAT
>> 423 bool "LASAT Networks platforms"
>> 424 select CEVT_R4K
>> 425 select CRC32
>> 426 select CSRC_R4K
>> 427 select DMA_NONCOHERENT
>> 428 select SYS_HAS_EARLY_PRINTK
>> 429 select HAVE_PCI
>> 430 select IRQ_MIPS_CPU
>> 431 select PCI_GT64XXX_PCI0
>> 432 select MIPS_NILE4
>> 433 select R5000_CPU_SCACHE
>> 434 select SYS_HAS_CPU_R5000
>> 435 select SYS_SUPPORTS_32BIT_KERNEL
>> 436 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 437 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 438
>> 439 config MACH_LOONGSON32
>> 440 bool "Loongson-1 family of machines"
>> 441 select SYS_SUPPORTS_ZBOOT
>> 442 help
>> 443 This enables support for the Loongson-1 family of machines.
>> 444
>> 445 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 446 the Institute of Computing Technology (ICT), Chinese Academy of
>> 447 Sciences (CAS).
>> 448
>> 449 config MACH_LOONGSON64
>> 450 bool "Loongson-2/3 family of machines"
>> 451 select SYS_SUPPORTS_ZBOOT
>> 452 help
>> 453 This enables the support of Loongson-2/3 family of machines.
>> 454
>> 455 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 456 family of multi-core CPUs. They are both 64-bit general-purpose
>> 457 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 458 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 459 in the People's Republic of China. The chief architect is Professor
>> 460 Weiwu Hu.
>> 461
>> 462 config MACH_PISTACHIO
>> 463 bool "IMG Pistachio SoC based boards"
>> 464 select BOOT_ELF32
>> 465 select BOOT_RAW
>> 466 select CEVT_R4K
>> 467 select CLKSRC_MIPS_GIC
>> 468 select COMMON_CLK
>> 469 select CSRC_R4K
>> 470 select DMA_NONCOHERENT
>> 471 select GPIOLIB
>> 472 select IRQ_MIPS_CPU
>> 473 select LIBFDT
>> 474 select MFD_SYSCON
>> 475 select MIPS_CPU_SCACHE
>> 476 select MIPS_GIC
>> 477 select PINCTRL
>> 478 select REGULATOR
>> 479 select SYS_HAS_CPU_MIPS32_R2
>> 480 select SYS_SUPPORTS_32BIT_KERNEL
>> 481 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 482 select SYS_SUPPORTS_MIPS_CPS
>> 483 select SYS_SUPPORTS_MULTITHREADING
>> 484 select SYS_SUPPORTS_RELOCATABLE
>> 485 select SYS_SUPPORTS_ZBOOT
>> 486 select SYS_HAS_EARLY_PRINTK
>> 487 select USE_GENERIC_EARLY_PRINTK_8250
>> 488 select USE_OF
>> 489 help
>> 490 This enables support for the IMG Pistachio SoC platform.
>> 491
>> 492 config MIPS_MALTA
>> 493 bool "MIPS Malta board"
>> 494 select ARCH_MAY_HAVE_PC_FDC
>> 495 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 496 select ARCH_MIGHT_HAVE_PC_SERIO
>> 497 select BOOT_ELF32
>> 498 select BOOT_RAW
>> 499 select BUILTIN_DTB
>> 500 select CEVT_R4K
>> 501 select CLKSRC_MIPS_GIC
>> 502 select COMMON_CLK
>> 503 select CSRC_R4K
>> 504 select DMA_MAYBE_COHERENT
>> 505 select GENERIC_ISA_DMA
>> 506 select HAVE_PCSPKR_PLATFORM
>> 507 select HAVE_PCI
>> 508 select I8253
>> 509 select I8259
>> 510 select IRQ_MIPS_CPU
>> 511 select LIBFDT
>> 512 select MIPS_BONITO64
>> 513 select MIPS_CPU_SCACHE
>> 514 select MIPS_GIC
>> 515 select MIPS_L1_CACHE_SHIFT_6
>> 516 select MIPS_MSC
>> 517 select PCI_GT64XXX_PCI0
>> 518 select SMP_UP if SMP
>> 519 select SWAP_IO_SPACE
>> 520 select SYS_HAS_CPU_MIPS32_R1
>> 521 select SYS_HAS_CPU_MIPS32_R2
>> 522 select SYS_HAS_CPU_MIPS32_R3_5
>> 523 select SYS_HAS_CPU_MIPS32_R5
>> 524 select SYS_HAS_CPU_MIPS32_R6
>> 525 select SYS_HAS_CPU_MIPS64_R1
>> 526 select SYS_HAS_CPU_MIPS64_R2
>> 527 select SYS_HAS_CPU_MIPS64_R6
>> 528 select SYS_HAS_CPU_NEVADA
>> 529 select SYS_HAS_CPU_RM7000
>> 530 select SYS_SUPPORTS_32BIT_KERNEL
>> 531 select SYS_SUPPORTS_64BIT_KERNEL
>> 532 select SYS_SUPPORTS_BIG_ENDIAN
>> 533 select SYS_SUPPORTS_HIGHMEM
>> 534 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 535 select SYS_SUPPORTS_MICROMIPS
>> 536 select SYS_SUPPORTS_MIPS16
>> 537 select SYS_SUPPORTS_MIPS_CMP
>> 538 select SYS_SUPPORTS_MIPS_CPS
>> 539 select SYS_SUPPORTS_MULTITHREADING
>> 540 select SYS_SUPPORTS_RELOCATABLE
>> 541 select SYS_SUPPORTS_SMARTMIPS
>> 542 select SYS_SUPPORTS_VPE_LOADER
>> 543 select SYS_SUPPORTS_ZBOOT
>> 544 select USE_OF
>> 545 select ZONE_DMA32 if 64BIT
>> 546 help
>> 547 This enables support for the MIPS Technologies Malta evaluation
>> 548 board.
>> 549
>> 550 config MACH_PIC32
>> 551 bool "Microchip PIC32 Family"
>> 552 help
>> 553 This enables support for the Microchip PIC32 family of platforms.
>> 554
>> 555 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 556 microcontrollers.
>> 557
>> 558 config NEC_MARKEINS
>> 559 bool "NEC EMMA2RH Mark-eins board"
>> 560 select SOC_EMMA2RH
>> 561 select HAVE_PCI
>> 562 help
>> 563 This enables support for the NEC Electronics Mark-eins boards.
351 564
352 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 565 config MACH_VR41XX
353 default 16 !! 566 bool "NEC VR4100 series based machines"
>> 567 select CEVT_R4K
>> 568 select CSRC_R4K
>> 569 select SYS_HAS_CPU_VR41XX
>> 570 select SYS_SUPPORTS_MIPS16
>> 571 select GPIOLIB
354 572
355 config SBUS !! 573 config NXP_STB220
356 bool !! 574 bool "NXP STB220 board"
>> 575 select SOC_PNX833X
>> 576 help
>> 577 Support for NXP Semiconductors STB220 Development Board.
>> 578
>> 579 config NXP_STB225
>> 580 bool "NXP 225 board"
>> 581 select SOC_PNX833X
>> 582 select SOC_PNX8335
>> 583 help
>> 584 Support for NXP Semiconductors STB225 Development Board.
>> 585
>> 586 config PMC_MSP
>> 587 bool "PMC-Sierra MSP chipsets"
>> 588 select CEVT_R4K
>> 589 select CSRC_R4K
>> 590 select DMA_NONCOHERENT
>> 591 select SWAP_IO_SPACE
>> 592 select NO_EXCEPT_FILL
>> 593 select BOOT_RAW
>> 594 select SYS_HAS_CPU_MIPS32_R1
>> 595 select SYS_HAS_CPU_MIPS32_R2
>> 596 select SYS_SUPPORTS_32BIT_KERNEL
>> 597 select SYS_SUPPORTS_BIG_ENDIAN
>> 598 select SYS_SUPPORTS_MIPS16
>> 599 select IRQ_MIPS_CPU
>> 600 select SERIAL_8250
>> 601 select SERIAL_8250_CONSOLE
>> 602 select USB_EHCI_BIG_ENDIAN_MMIO
>> 603 select USB_EHCI_BIG_ENDIAN_DESC
>> 604 help
>> 605 This adds support for the PMC-Sierra family of Multi-Service
>> 606 Processor System-On-A-Chips. These parts include a number
>> 607 of integrated peripherals, interfaces and DSPs in addition to
>> 608 a variety of MIPS cores.
>> 609
>> 610 config RALINK
>> 611 bool "Ralink based machines"
>> 612 select CEVT_R4K
>> 613 select CSRC_R4K
>> 614 select BOOT_RAW
>> 615 select DMA_NONCOHERENT
>> 616 select IRQ_MIPS_CPU
>> 617 select USE_OF
>> 618 select SYS_HAS_CPU_MIPS32_R1
>> 619 select SYS_HAS_CPU_MIPS32_R2
>> 620 select SYS_SUPPORTS_32BIT_KERNEL
>> 621 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 622 select SYS_SUPPORTS_MIPS16
>> 623 select SYS_HAS_EARLY_PRINTK
>> 624 select CLKDEV_LOOKUP
>> 625 select ARCH_HAS_RESET_CONTROLLER
>> 626 select RESET_CONTROLLER
>> 627
>> 628 config SGI_IP22
>> 629 bool "SGI IP22 (Indy/Indigo2)"
>> 630 select FW_ARC
>> 631 select FW_ARC32
>> 632 select ARCH_MIGHT_HAVE_PC_SERIO
>> 633 select BOOT_ELF32
>> 634 select CEVT_R4K
>> 635 select CSRC_R4K
>> 636 select DEFAULT_SGI_PARTITION
>> 637 select DMA_NONCOHERENT
>> 638 select HAVE_EISA
>> 639 select I8253
>> 640 select I8259
>> 641 select IP22_CPU_SCACHE
>> 642 select IRQ_MIPS_CPU
>> 643 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 644 select SGI_HAS_I8042
>> 645 select SGI_HAS_INDYDOG
>> 646 select SGI_HAS_HAL2
>> 647 select SGI_HAS_SEEQ
>> 648 select SGI_HAS_WD93
>> 649 select SGI_HAS_ZILOG
>> 650 select SWAP_IO_SPACE
>> 651 select SYS_HAS_CPU_R4X00
>> 652 select SYS_HAS_CPU_R5000
>> 653 #
>> 654 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 655 # memory during early boot on some machines.
>> 656 #
>> 657 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 658 # for a more details discussion
>> 659 #
>> 660 # select SYS_HAS_EARLY_PRINTK
>> 661 select SYS_SUPPORTS_32BIT_KERNEL
>> 662 select SYS_SUPPORTS_64BIT_KERNEL
>> 663 select SYS_SUPPORTS_BIG_ENDIAN
>> 664 select MIPS_L1_CACHE_SHIFT_7
>> 665 help
>> 666 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 667 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 668 that runs on these, say Y here.
>> 669
>> 670 config SGI_IP27
>> 671 bool "SGI IP27 (Origin200/2000)"
>> 672 select ARCH_HAS_PHYS_TO_DMA
>> 673 select FW_ARC
>> 674 select FW_ARC64
>> 675 select BOOT_ELF64
>> 676 select DEFAULT_SGI_PARTITION
>> 677 select SYS_HAS_EARLY_PRINTK
>> 678 select HAVE_PCI
>> 679 select NR_CPUS_DEFAULT_64
>> 680 select SYS_HAS_CPU_R10000
>> 681 select SYS_SUPPORTS_64BIT_KERNEL
>> 682 select SYS_SUPPORTS_BIG_ENDIAN
>> 683 select SYS_SUPPORTS_NUMA
>> 684 select SYS_SUPPORTS_SMP
>> 685 select MIPS_L1_CACHE_SHIFT_7
>> 686 help
>> 687 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 688 workstations. To compile a Linux kernel that runs on these, say Y
>> 689 here.
>> 690
>> 691 config SGI_IP28
>> 692 bool "SGI IP28 (Indigo2 R10k)"
>> 693 select FW_ARC
>> 694 select FW_ARC64
>> 695 select ARCH_MIGHT_HAVE_PC_SERIO
>> 696 select BOOT_ELF64
>> 697 select CEVT_R4K
>> 698 select CSRC_R4K
>> 699 select DEFAULT_SGI_PARTITION
>> 700 select DMA_NONCOHERENT
>> 701 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 702 select IRQ_MIPS_CPU
>> 703 select HAVE_EISA
>> 704 select I8253
>> 705 select I8259
>> 706 select SGI_HAS_I8042
>> 707 select SGI_HAS_INDYDOG
>> 708 select SGI_HAS_HAL2
>> 709 select SGI_HAS_SEEQ
>> 710 select SGI_HAS_WD93
>> 711 select SGI_HAS_ZILOG
>> 712 select SWAP_IO_SPACE
>> 713 select SYS_HAS_CPU_R10000
>> 714 #
>> 715 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 716 # memory during early boot on some machines.
>> 717 #
>> 718 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 719 # for a more details discussion
>> 720 #
>> 721 # select SYS_HAS_EARLY_PRINTK
>> 722 select SYS_SUPPORTS_64BIT_KERNEL
>> 723 select SYS_SUPPORTS_BIG_ENDIAN
>> 724 select MIPS_L1_CACHE_SHIFT_7
>> 725 help
>> 726 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 727 kernel that runs on these, say Y here.
>> 728
>> 729 config SGI_IP32
>> 730 bool "SGI IP32 (O2)"
>> 731 select ARCH_HAS_PHYS_TO_DMA
>> 732 select FW_ARC
>> 733 select FW_ARC32
>> 734 select BOOT_ELF32
>> 735 select CEVT_R4K
>> 736 select CSRC_R4K
>> 737 select DMA_NONCOHERENT
>> 738 select HAVE_PCI
>> 739 select IRQ_MIPS_CPU
>> 740 select R5000_CPU_SCACHE
>> 741 select RM7000_CPU_SCACHE
>> 742 select SYS_HAS_CPU_R5000
>> 743 select SYS_HAS_CPU_R10000 if BROKEN
>> 744 select SYS_HAS_CPU_RM7000
>> 745 select SYS_HAS_CPU_NEVADA
>> 746 select SYS_SUPPORTS_64BIT_KERNEL
>> 747 select SYS_SUPPORTS_BIG_ENDIAN
>> 748 help
>> 749 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 750
>> 751 config SIBYTE_CRHINE
>> 752 bool "Sibyte BCM91120C-CRhine"
>> 753 select BOOT_ELF32
>> 754 select SIBYTE_BCM1120
>> 755 select SWAP_IO_SPACE
>> 756 select SYS_HAS_CPU_SB1
>> 757 select SYS_SUPPORTS_BIG_ENDIAN
>> 758 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 759
>> 760 config SIBYTE_CARMEL
>> 761 bool "Sibyte BCM91120x-Carmel"
>> 762 select BOOT_ELF32
>> 763 select SIBYTE_BCM1120
>> 764 select SWAP_IO_SPACE
>> 765 select SYS_HAS_CPU_SB1
>> 766 select SYS_SUPPORTS_BIG_ENDIAN
>> 767 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 768
>> 769 config SIBYTE_CRHONE
>> 770 bool "Sibyte BCM91125C-CRhone"
>> 771 select BOOT_ELF32
>> 772 select SIBYTE_BCM1125
>> 773 select SWAP_IO_SPACE
>> 774 select SYS_HAS_CPU_SB1
>> 775 select SYS_SUPPORTS_BIG_ENDIAN
>> 776 select SYS_SUPPORTS_HIGHMEM
>> 777 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 778
>> 779 config SIBYTE_RHONE
>> 780 bool "Sibyte BCM91125E-Rhone"
>> 781 select BOOT_ELF32
>> 782 select SIBYTE_BCM1125H
>> 783 select SWAP_IO_SPACE
>> 784 select SYS_HAS_CPU_SB1
>> 785 select SYS_SUPPORTS_BIG_ENDIAN
>> 786 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 787
>> 788 config SIBYTE_SWARM
>> 789 bool "Sibyte BCM91250A-SWARM"
>> 790 select BOOT_ELF32
>> 791 select HAVE_PATA_PLATFORM
>> 792 select SIBYTE_SB1250
>> 793 select SWAP_IO_SPACE
>> 794 select SYS_HAS_CPU_SB1
>> 795 select SYS_SUPPORTS_BIG_ENDIAN
>> 796 select SYS_SUPPORTS_HIGHMEM
>> 797 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 798 select ZONE_DMA32 if 64BIT
>> 799 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 800
>> 801 config SIBYTE_LITTLESUR
>> 802 bool "Sibyte BCM91250C2-LittleSur"
>> 803 select BOOT_ELF32
>> 804 select HAVE_PATA_PLATFORM
>> 805 select SIBYTE_SB1250
>> 806 select SWAP_IO_SPACE
>> 807 select SYS_HAS_CPU_SB1
>> 808 select SYS_SUPPORTS_BIG_ENDIAN
>> 809 select SYS_SUPPORTS_HIGHMEM
>> 810 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 811 select ZONE_DMA32 if 64BIT
>> 812
>> 813 config SIBYTE_SENTOSA
>> 814 bool "Sibyte BCM91250E-Sentosa"
>> 815 select BOOT_ELF32
>> 816 select SIBYTE_SB1250
>> 817 select SWAP_IO_SPACE
>> 818 select SYS_HAS_CPU_SB1
>> 819 select SYS_SUPPORTS_BIG_ENDIAN
>> 820 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 821 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 822
>> 823 config SIBYTE_BIGSUR
>> 824 bool "Sibyte BCM91480B-BigSur"
>> 825 select BOOT_ELF32
>> 826 select NR_CPUS_DEFAULT_4
>> 827 select SIBYTE_BCM1x80
>> 828 select SWAP_IO_SPACE
>> 829 select SYS_HAS_CPU_SB1
>> 830 select SYS_SUPPORTS_BIG_ENDIAN
>> 831 select SYS_SUPPORTS_HIGHMEM
>> 832 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 833 select ZONE_DMA32 if 64BIT
>> 834 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 835
>> 836 config SNI_RM
>> 837 bool "SNI RM200/300/400"
>> 838 select FW_ARC if CPU_LITTLE_ENDIAN
>> 839 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 840 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 841 select ARCH_MAY_HAVE_PC_FDC
>> 842 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 843 select ARCH_MIGHT_HAVE_PC_SERIO
>> 844 select BOOT_ELF32
>> 845 select CEVT_R4K
>> 846 select CSRC_R4K
>> 847 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 848 select DMA_NONCOHERENT
>> 849 select GENERIC_ISA_DMA
>> 850 select HAVE_EISA
>> 851 select HAVE_PCSPKR_PLATFORM
>> 852 select HAVE_PCI
>> 853 select IRQ_MIPS_CPU
>> 854 select I8253
>> 855 select I8259
>> 856 select ISA
>> 857 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 858 select SYS_HAS_CPU_R4X00
>> 859 select SYS_HAS_CPU_R5000
>> 860 select SYS_HAS_CPU_R10000
>> 861 select R5000_CPU_SCACHE
>> 862 select SYS_HAS_EARLY_PRINTK
>> 863 select SYS_SUPPORTS_32BIT_KERNEL
>> 864 select SYS_SUPPORTS_64BIT_KERNEL
>> 865 select SYS_SUPPORTS_BIG_ENDIAN
>> 866 select SYS_SUPPORTS_HIGHMEM
>> 867 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 868 help
>> 869 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 870 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 871 Technology and now in turn merged with Fujitsu. Say Y here to
>> 872 support this machine type.
>> 873
>> 874 config MACH_TX39XX
>> 875 bool "Toshiba TX39 series based machines"
>> 876
>> 877 config MACH_TX49XX
>> 878 bool "Toshiba TX49 series based machines"
>> 879
>> 880 config MIKROTIK_RB532
>> 881 bool "Mikrotik RB532 boards"
>> 882 select CEVT_R4K
>> 883 select CSRC_R4K
>> 884 select DMA_NONCOHERENT
>> 885 select HAVE_PCI
>> 886 select IRQ_MIPS_CPU
>> 887 select SYS_HAS_CPU_MIPS32_R1
>> 888 select SYS_SUPPORTS_32BIT_KERNEL
>> 889 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 890 select SWAP_IO_SPACE
>> 891 select BOOT_RAW
>> 892 select GPIOLIB
>> 893 select MIPS_L1_CACHE_SHIFT_4
>> 894 help
>> 895 Support the Mikrotik(tm) RouterBoard 532 series,
>> 896 based on the IDT RC32434 SoC.
357 897
358 config GENERIC_ISA_DMA !! 898 config CAVIUM_OCTEON_SOC
359 def_bool y !! 899 bool "Cavium Networks Octeon SoC based boards"
360 depends on ISA_DMA_API !! 900 select CEVT_R4K
>> 901 select ARCH_HAS_PHYS_TO_DMA
>> 902 select HAVE_RAPIDIO
>> 903 select PHYS_ADDR_T_64BIT
>> 904 select SYS_SUPPORTS_64BIT_KERNEL
>> 905 select SYS_SUPPORTS_BIG_ENDIAN
>> 906 select EDAC_SUPPORT
>> 907 select EDAC_ATOMIC_SCRUB
>> 908 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 909 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 910 select SYS_HAS_EARLY_PRINTK
>> 911 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 912 select HAVE_PCI
>> 913 select ZONE_DMA32
>> 914 select HOLES_IN_ZONE
>> 915 select GPIOLIB
>> 916 select LIBFDT
>> 917 select USE_OF
>> 918 select ARCH_SPARSEMEM_ENABLE
>> 919 select SYS_SUPPORTS_SMP
>> 920 select NR_CPUS_DEFAULT_64
>> 921 select MIPS_NR_CPU_NR_MAP_1024
>> 922 select BUILTIN_DTB
>> 923 select MTD_COMPLEX_MAPPINGS
>> 924 select SWIOTLB
>> 925 select SYS_SUPPORTS_RELOCATABLE
>> 926 help
>> 927 This option supports all of the Octeon reference boards from Cavium
>> 928 Networks. It builds a kernel that dynamically determines the Octeon
>> 929 CPU type and supports all known board reference implementations.
>> 930 Some of the supported boards are:
>> 931 EBT3000
>> 932 EBH3000
>> 933 EBH3100
>> 934 Thunder
>> 935 Kodama
>> 936 Hikari
>> 937 Say Y here for most Octeon reference boards.
>> 938
>> 939 config NLM_XLR_BOARD
>> 940 bool "Netlogic XLR/XLS based systems"
>> 941 select BOOT_ELF32
>> 942 select NLM_COMMON
>> 943 select SYS_HAS_CPU_XLR
>> 944 select SYS_SUPPORTS_SMP
>> 945 select HAVE_PCI
>> 946 select SWAP_IO_SPACE
>> 947 select SYS_SUPPORTS_32BIT_KERNEL
>> 948 select SYS_SUPPORTS_64BIT_KERNEL
>> 949 select PHYS_ADDR_T_64BIT
>> 950 select SYS_SUPPORTS_BIG_ENDIAN
>> 951 select SYS_SUPPORTS_HIGHMEM
>> 952 select NR_CPUS_DEFAULT_32
>> 953 select CEVT_R4K
>> 954 select CSRC_R4K
>> 955 select IRQ_MIPS_CPU
>> 956 select ZONE_DMA32 if 64BIT
>> 957 select SYNC_R4K
>> 958 select SYS_HAS_EARLY_PRINTK
>> 959 select SYS_SUPPORTS_ZBOOT
>> 960 select SYS_SUPPORTS_ZBOOT_UART16550
>> 961 help
>> 962 Support for systems based on Netlogic XLR and XLS processors.
>> 963 Say Y here if you have a XLR or XLS based board.
>> 964
>> 965 config NLM_XLP_BOARD
>> 966 bool "Netlogic XLP based systems"
>> 967 select BOOT_ELF32
>> 968 select NLM_COMMON
>> 969 select SYS_HAS_CPU_XLP
>> 970 select SYS_SUPPORTS_SMP
>> 971 select HAVE_PCI
>> 972 select SYS_SUPPORTS_32BIT_KERNEL
>> 973 select SYS_SUPPORTS_64BIT_KERNEL
>> 974 select PHYS_ADDR_T_64BIT
>> 975 select GPIOLIB
>> 976 select SYS_SUPPORTS_BIG_ENDIAN
>> 977 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 978 select SYS_SUPPORTS_HIGHMEM
>> 979 select NR_CPUS_DEFAULT_32
>> 980 select CEVT_R4K
>> 981 select CSRC_R4K
>> 982 select IRQ_MIPS_CPU
>> 983 select ZONE_DMA32 if 64BIT
>> 984 select SYNC_R4K
>> 985 select SYS_HAS_EARLY_PRINTK
>> 986 select USE_OF
>> 987 select SYS_SUPPORTS_ZBOOT
>> 988 select SYS_SUPPORTS_ZBOOT_UART16550
>> 989 help
>> 990 This board is based on Netlogic XLP Processor.
>> 991 Say Y here if you have a XLP based board.
>> 992
>> 993 config MIPS_PARAVIRT
>> 994 bool "Para-Virtualized guest system"
>> 995 select CEVT_R4K
>> 996 select CSRC_R4K
>> 997 select SYS_SUPPORTS_64BIT_KERNEL
>> 998 select SYS_SUPPORTS_32BIT_KERNEL
>> 999 select SYS_SUPPORTS_BIG_ENDIAN
>> 1000 select SYS_SUPPORTS_SMP
>> 1001 select NR_CPUS_DEFAULT_4
>> 1002 select SYS_HAS_EARLY_PRINTK
>> 1003 select SYS_HAS_CPU_MIPS32_R2
>> 1004 select SYS_HAS_CPU_MIPS64_R2
>> 1005 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1006 select HAVE_PCI
>> 1007 select SWAP_IO_SPACE
>> 1008 help
>> 1009 This option supports guest running under ????
361 1010
362 config GENERIC_CSUM !! 1011 endchoice
363 bool <<
364 default y if KMSAN || KASAN <<
365 1012
366 config GENERIC_BUG !! 1013 source "arch/mips/alchemy/Kconfig"
367 def_bool y !! 1014 source "arch/mips/ath25/Kconfig"
368 depends on BUG !! 1015 source "arch/mips/ath79/Kconfig"
369 select GENERIC_BUG_RELATIVE_POINTERS i !! 1016 source "arch/mips/bcm47xx/Kconfig"
>> 1017 source "arch/mips/bcm63xx/Kconfig"
>> 1018 source "arch/mips/bmips/Kconfig"
>> 1019 source "arch/mips/generic/Kconfig"
>> 1020 source "arch/mips/jazz/Kconfig"
>> 1021 source "arch/mips/jz4740/Kconfig"
>> 1022 source "arch/mips/lantiq/Kconfig"
>> 1023 source "arch/mips/lasat/Kconfig"
>> 1024 source "arch/mips/pic32/Kconfig"
>> 1025 source "arch/mips/pistachio/Kconfig"
>> 1026 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1027 source "arch/mips/ralink/Kconfig"
>> 1028 source "arch/mips/sgi-ip27/Kconfig"
>> 1029 source "arch/mips/sibyte/Kconfig"
>> 1030 source "arch/mips/txx9/Kconfig"
>> 1031 source "arch/mips/vr41xx/Kconfig"
>> 1032 source "arch/mips/cavium-octeon/Kconfig"
>> 1033 source "arch/mips/loongson32/Kconfig"
>> 1034 source "arch/mips/loongson64/Kconfig"
>> 1035 source "arch/mips/netlogic/Kconfig"
>> 1036 source "arch/mips/paravirt/Kconfig"
370 1037
371 config GENERIC_BUG_RELATIVE_POINTERS !! 1038 endmenu
372 bool <<
373 1039
374 config ARCH_MAY_HAVE_PC_FDC !! 1040 config RWSEM_GENERIC_SPINLOCK
375 def_bool y !! 1041 bool
376 depends on ISA_DMA_API !! 1042 default y
377 1043
378 config GENERIC_CALIBRATE_DELAY !! 1044 config RWSEM_XCHGADD_ALGORITHM
379 def_bool y !! 1045 bool
380 1046
381 config ARCH_HAS_CPU_RELAX !! 1047 config GENERIC_HWEIGHT
382 def_bool y !! 1048 bool
>> 1049 default y
383 1050
384 config ARCH_HIBERNATION_POSSIBLE !! 1051 config GENERIC_CALIBRATE_DELAY
385 def_bool y !! 1052 bool
>> 1053 default y
386 1054
387 config ARCH_SUSPEND_POSSIBLE !! 1055 config SCHED_OMIT_FRAME_POINTER
388 def_bool y !! 1056 bool
>> 1057 default y
389 1058
390 config AUDIT_ARCH !! 1059 #
391 def_bool y if X86_64 !! 1060 # Select some configuration options automatically based on user selections.
>> 1061 #
>> 1062 config FW_ARC
>> 1063 bool
392 1064
393 config KASAN_SHADOW_OFFSET !! 1065 config ARCH_MAY_HAVE_PC_FDC
394 hex !! 1066 bool
395 depends on KASAN <<
396 default 0xdffffc0000000000 <<
397 1067
398 config HAVE_INTEL_TXT !! 1068 config BOOT_RAW
399 def_bool y !! 1069 bool
400 depends on INTEL_IOMMU && ACPI <<
401 1070
402 config X86_64_SMP !! 1071 config CEVT_BCM1480
403 def_bool y !! 1072 bool
404 depends on X86_64 && SMP <<
405 1073
406 config ARCH_SUPPORTS_UPROBES !! 1074 config CEVT_DS1287
407 def_bool y !! 1075 bool
408 1076
409 config FIX_EARLYCON_MEM !! 1077 config CEVT_GT641XX
410 def_bool y !! 1078 bool
411 1079
412 config DYNAMIC_PHYSICAL_MASK !! 1080 config CEVT_R4K
413 bool 1081 bool
414 1082
415 config PGTABLE_LEVELS !! 1083 config CEVT_SB1250
416 int !! 1084 bool
417 default 5 if X86_5LEVEL <<
418 default 4 if X86_64 <<
419 default 3 if X86_PAE <<
420 default 2 <<
421 1085
422 config CC_HAS_SANE_STACKPROTECTOR !! 1086 config CEVT_TXX9
423 bool 1087 bool
424 default $(success,$(srctree)/scripts/g <<
425 default $(success,$(srctree)/scripts/g <<
426 help <<
427 We have to make sure stack protector <<
428 the compiler produces broken code or <<
429 the segment on 32-bit kernels. <<
430 1088
431 menu "Processor type and features" !! 1089 config CSRC_BCM1480
>> 1090 bool
432 1091
433 config SMP !! 1092 config CSRC_IOASIC
434 bool "Symmetric multi-processing suppo !! 1093 bool
435 help <<
436 This enables support for systems wit <<
437 a system with only one CPU, say N. I <<
438 than one CPU, say Y. <<
439 1094
440 If you say N here, the kernel will r !! 1095 config CSRC_R4K
441 machines, but will use only one CPU !! 1096 bool
442 you say Y here, the kernel will run <<
443 uniprocessor machines. On a uniproce <<
444 will run faster if you say N here. <<
445 1097
446 Note that if you say Y here and choo !! 1098 config CSRC_SB1250
447 "Pentium" under "Processor family", !! 1099 bool
448 architectures. Similarly, multiproce <<
449 architecture may not work on all Pen <<
450 1100
451 People using multiprocessor machines !! 1101 config MIPS_CLOCK_VSYSCALL
452 Y to "Enhanced Real Time Clock Suppo !! 1102 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
453 Management" code will be disabled if <<
454 1103
455 See also <file:Documentation/arch/x8 !! 1104 config GPIO_TXX9
456 <file:Documentation/admin-guide/lock !! 1105 select GPIOLIB
457 <http://www.tldp.org/docs.html#howto !! 1106 bool
458 1107
459 If you don't know what to do here, s !! 1108 config FW_CFE
>> 1109 bool
460 1110
461 config X86_X2APIC !! 1111 config ARCH_SUPPORTS_UPROBES
462 bool "Support x2apic" !! 1112 bool
463 depends on X86_LOCAL_APIC && X86_64 && <<
464 help <<
465 This enables x2apic support on CPUs <<
466 <<
467 This allows 32-bit apic IDs (so it c <<
468 and accesses the local apic via MSRs <<
469 <<
470 Some Intel systems circa 2022 and la <<
471 and can not fall back to the legacy <<
472 enabled in the BIOS. They will boot <<
473 without enabling this option. <<
474 1113
475 If you don't know what to do here, s !! 1114 config DMA_MAYBE_COHERENT
>> 1115 select ARCH_HAS_DMA_COHERENCE_H
>> 1116 select DMA_NONCOHERENT
>> 1117 bool
476 1118
477 config X86_POSTED_MSI !! 1119 config DMA_PERDEV_COHERENT
478 bool "Enable MSI and MSI-x delivery by !! 1120 bool
479 depends on X86_64 && IRQ_REMAP !! 1121 select DMA_NONCOHERENT
480 help <<
481 This enables MSIs that are under int <<
482 posted interrupts to the host kernel <<
483 potentially be improved by coalescin <<
484 frequency bursts. <<
485 1122
486 If you don't know what to do here, s !! 1123 config DMA_NONCOHERENT
>> 1124 bool
>> 1125 select ARCH_HAS_DMA_MMAP_PGPROT
>> 1126 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
>> 1127 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 1128 select NEED_DMA_MAP_STATE
>> 1129 select ARCH_HAS_DMA_COHERENT_TO_PFN
>> 1130 select DMA_NONCOHERENT_CACHE_SYNC
487 1131
488 config X86_MPPARSE !! 1132 config SYS_HAS_EARLY_PRINTK
489 bool "Enable MPS table" if ACPI !! 1133 bool
490 default y <<
491 depends on X86_LOCAL_APIC <<
492 help <<
493 For old smp systems that do not have <<
494 (esp with 64bit cpus) with acpi supp <<
495 1134
496 config X86_CPU_RESCTRL !! 1135 config SYS_SUPPORTS_HOTPLUG_CPU
497 bool "x86 CPU resource control support !! 1136 bool
498 depends on X86 && (CPU_SUP_INTEL || CP <<
499 select KERNFS <<
500 select PROC_CPU_RESCTRL if PRO <<
501 help <<
502 Enable x86 CPU resource control supp <<
503 1137
504 Provide support for the allocation a !! 1138 config MIPS_BONITO64
505 usage by the CPU. !! 1139 bool
506 1140
507 Intel calls this Intel Resource Dire !! 1141 config MIPS_MSC
508 (Intel(R) RDT). More information abo !! 1142 bool
509 Intel x86 Architecture Software Deve <<
510 1143
511 AMD calls this AMD Platform Quality !! 1144 config MIPS_NILE4
512 More information about AMD QoS can b !! 1145 bool
513 Platform Quality of Service Extensio <<
514 1146
515 Say N if unsure. !! 1147 config SYNC_R4K
>> 1148 bool
516 1149
517 config X86_FRED !! 1150 config MIPS_MACHINE
518 bool "Flexible Return and Event Delive !! 1151 def_bool n
519 depends on X86_64 <<
520 help <<
521 When enabled, try to use Flexible Re <<
522 instead of the legacy SYSCALL/SYSENT <<
523 ring transitions and exception/inter <<
524 system supports it. <<
525 1152
526 config X86_BIGSMP !! 1153 config NO_IOPORT_MAP
527 bool "Support for big SMP systems with !! 1154 def_bool n
528 depends on SMP && X86_32 <<
529 help <<
530 This option is needed for the system <<
531 1155
532 config X86_EXTENDED_PLATFORM !! 1156 config GENERIC_CSUM
533 bool "Support for extended (non-PC) x8 !! 1157 bool
534 default y !! 1158 default y if !CPU_HAS_LOAD_STORE_LR
535 help <<
536 If you disable this option then the <<
537 standard PC platforms. (which covers <<
538 systems out there.) <<
539 1159
540 If you enable this option then you'l !! 1160 config GENERIC_ISA_DMA
541 for the following non-PC x86 platfor !! 1161 bool
542 CONFIG_64BIT. !! 1162 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1163 select ISA_DMA_API
543 1164
544 32-bit platforms (CONFIG_64BIT=n): !! 1165 config GENERIC_ISA_DMA_SUPPORT_BROKEN
545 Goldfish (Android emulator) !! 1166 bool
546 AMD Elan !! 1167 select GENERIC_ISA_DMA
547 RDC R-321x SoC <<
548 SGI 320/540 (Visual Workstatio <<
549 STA2X11-based (e.g. Northville <<
550 Moorestown MID devices <<
551 1168
552 64-bit platforms (CONFIG_64BIT=y): !! 1169 config ISA_DMA_API
553 Numascale NumaChip !! 1170 bool
554 ScaleMP vSMP <<
555 SGI Ultraviolet <<
556 1171
557 If you have one of these systems, or !! 1172 config HOLES_IN_ZONE
558 generic distribution kernel, say Y h !! 1173 bool
559 1174
560 # This is an alphabetically sorted list of 64 !! 1175 config SYS_SUPPORTS_RELOCATABLE
561 # Please maintain the alphabetic order if and !! 1176 bool
562 config X86_NUMACHIP <<
563 bool "Numascale NumaChip" <<
564 depends on X86_64 <<
565 depends on X86_EXTENDED_PLATFORM <<
566 depends on NUMA <<
567 depends on SMP <<
568 depends on X86_X2APIC <<
569 depends on PCI_MMCONFIG <<
570 help <<
571 Adds support for Numascale NumaChip <<
572 enable more than ~168 cores. <<
573 If you don't have one of these, you <<
574 <<
575 config X86_VSMP <<
576 bool "ScaleMP vSMP" <<
577 select HYPERVISOR_GUEST <<
578 select PARAVIRT <<
579 depends on X86_64 && PCI <<
580 depends on X86_EXTENDED_PLATFORM <<
581 depends on SMP <<
582 help <<
583 Support for ScaleMP vSMP systems. S <<
584 supposed to run on these EM64T-based <<
585 if you have one of these machines. <<
586 <<
587 config X86_UV <<
588 bool "SGI Ultraviolet" <<
589 depends on X86_64 <<
590 depends on X86_EXTENDED_PLATFORM <<
591 depends on NUMA <<
592 depends on EFI <<
593 depends on KEXEC_CORE <<
594 depends on X86_X2APIC <<
595 depends on PCI <<
596 help <<
597 This option is needed in order to su <<
598 If you don't have one of these, you <<
599 <<
600 # Following is an alphabetically sorted list o <<
601 # Please maintain the alphabetic order if and <<
602 <<
603 config X86_GOLDFISH <<
604 bool "Goldfish (Virtual Platform)" <<
605 depends on X86_EXTENDED_PLATFORM <<
606 help <<
607 Enable support for the Goldfish virt <<
608 for Android development. Unless you <<
609 Goldfish emulator say N here. <<
610 <<
611 config X86_INTEL_CE <<
612 bool "CE4100 TV platform" <<
613 depends on PCI <<
614 depends on PCI_GODIRECT <<
615 depends on X86_IO_APIC <<
616 depends on X86_32 <<
617 depends on X86_EXTENDED_PLATFORM <<
618 select X86_REBOOTFIXUPS <<
619 select OF <<
620 select OF_EARLY_FLATTREE <<
621 help <<
622 Select for the Intel CE media proces <<
623 This option compiles in support for <<
624 boxes and media devices. <<
625 <<
626 config X86_INTEL_MID <<
627 bool "Intel MID platform support" <<
628 depends on X86_EXTENDED_PLATFORM <<
629 depends on X86_PLATFORM_DEVICES <<
630 depends on PCI <<
631 depends on X86_64 || (PCI_GOANY && X86 <<
632 depends on X86_IO_APIC <<
633 select I2C <<
634 select DW_APB_TIMER <<
635 select INTEL_SCU_PCI <<
636 help <<
637 Select to build a kernel capable of <<
638 Internet Device) platform systems wh <<
639 interfaces. If you are building for <<
640 <<
641 Intel MID platforms are based on an <<
642 consume less power than most of the <<
643 <<
644 config X86_INTEL_QUARK <<
645 bool "Intel Quark platform support" <<
646 depends on X86_32 <<
647 depends on X86_EXTENDED_PLATFORM <<
648 depends on X86_PLATFORM_DEVICES <<
649 depends on X86_TSC <<
650 depends on PCI <<
651 depends on PCI_GOANY <<
652 depends on X86_IO_APIC <<
653 select IOSF_MBI <<
654 select INTEL_IMR <<
655 select COMMON_CLK <<
656 help <<
657 Select to include support for Quark <<
658 Say Y here if you have a Quark based <<
659 compatible Intel Galileo. <<
660 <<
661 config X86_INTEL_LPSS <<
662 bool "Intel Low Power Subsystem Suppor <<
663 depends on X86 && ACPI && PCI <<
664 select COMMON_CLK <<
665 select PINCTRL <<
666 select IOSF_MBI <<
667 help <<
668 Select to build support for Intel Lo <<
669 found on Intel Lynxpoint PCH. Select <<
670 things like clock tree (common clock <<
671 which are needed by the LPSS periphe <<
672 <<
673 config X86_AMD_PLATFORM_DEVICE <<
674 bool "AMD ACPI2Platform devices suppor <<
675 depends on ACPI <<
676 select COMMON_CLK <<
677 select PINCTRL <<
678 help 1177 help
679 Select to interpret AMD specific ACP !! 1178 Selected if the platform supports relocating the kernel.
680 such as I2C, UART, GPIO found on AMD !! 1179 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
681 I2C and UART depend on COMMON_CLK to !! 1180 to allow access to command line and entropy sources.
682 implemented under PINCTRL subsystem. <<
683 <<
684 config IOSF_MBI <<
685 tristate "Intel SoC IOSF Sideband supp <<
686 depends on PCI <<
687 help <<
688 This option enables sideband registe <<
689 platforms. On these platforms the IO <<
690 MSR's for some register accesses, mo <<
691 and power. Drivers may query the ava <<
692 determine if they need the sideband <<
693 platforms. The sideband is available <<
694 This list is not meant to be exclusi <<
695 - BayTrail <<
696 - Braswell <<
697 - Quark <<
698 <<
699 You should say Y if you are running <<
700 <<
701 config IOSF_MBI_DEBUG <<
702 bool "Enable IOSF sideband access thro <<
703 depends on IOSF_MBI && DEBUG_FS <<
704 help <<
705 Select this option to expose the IOS <<
706 MDR, MCRX) through debugfs to write <<
707 different units on the SoC. This is <<
708 state information for debug and anal <<
709 mechanism, users of this option woul <<
710 device they want to access. <<
711 <<
712 If you don't require the option or a <<
713 <<
714 config X86_RDC321X <<
715 bool "RDC R-321x SoC" <<
716 depends on X86_32 <<
717 depends on X86_EXTENDED_PLATFORM <<
718 select M486 <<
719 select X86_REBOOTFIXUPS <<
720 help <<
721 This option is needed for RDC R-321x <<
722 as R-8610-(G). <<
723 If you don't have one of these chips <<
724 <<
725 config X86_32_NON_STANDARD <<
726 bool "Support non-standard 32-bit SMP <<
727 depends on X86_32 && SMP <<
728 depends on X86_EXTENDED_PLATFORM <<
729 help <<
730 This option compiles in the bigsmp a <<
731 subarchitectures. It is intended fo <<
732 kernel. If you select them all, kern <<
733 one and will fallback to default. <<
734 1181
735 # Alphabetically sorted list of Non standard 3 !! 1182 config MIPS_CBPF_JIT
736 <<
737 config X86_SUPPORTS_MEMORY_FAILURE <<
738 def_bool y 1183 def_bool y
739 # MCE code calls memory_failure(): !! 1184 depends on BPF_JIT && HAVE_CBPF_JIT
740 depends on X86_MCE <<
741 # On 32-bit this adds too big of NODES <<
742 # On 32-bit SPARSEMEM adds too big of <<
743 depends on X86_64 || !SPARSEMEM <<
744 select ARCH_SUPPORTS_MEMORY_FAILURE <<
745 <<
746 config STA2X11 <<
747 bool "STA2X11 Companion Chip Support" <<
748 depends on X86_32_NON_STANDARD && PCI <<
749 select SWIOTLB <<
750 select MFD_STA2X11 <<
751 select GPIOLIB <<
752 help <<
753 This adds support for boards based o <<
754 a.k.a. "ConneXt". The chip is used i <<
755 PC chipset, so all "standard" periph <<
756 option is selected the kernel will s <<
757 standard PC machines. <<
758 <<
759 config X86_32_IRIS <<
760 tristate "Eurobraille/Iris poweroff mo <<
761 depends on X86_32 <<
762 help <<
763 The Iris machines from EuroBraille d <<
764 to shut themselves down properly. A <<
765 needed to do so, which is what this <<
766 kernel shutdown. <<
767 <<
768 This is only for Iris machines from <<
769 1185
770 If unused, say N. !! 1186 config MIPS_EBPF_JIT
771 <<
772 config SCHED_OMIT_FRAME_POINTER <<
773 def_bool y 1187 def_bool y
774 prompt "Single-depth WCHAN output" !! 1188 depends on BPF_JIT && HAVE_EBPF_JIT
775 depends on X86 <<
776 help <<
777 Calculate simpler /proc/<PID>/wchan <<
778 is disabled then wchan values will r <<
779 caller function. This provides more <<
780 at the expense of slightly more sche <<
781 1189
782 If in doubt, say "Y". <<
783 1190
784 menuconfig HYPERVISOR_GUEST !! 1191 #
785 bool "Linux guest support" !! 1192 # Endianness selection. Sufficiently obscure so many users don't know what to
>> 1193 # answer,so we try hard to limit the available choices. Also the use of a
>> 1194 # choice statement should be more obvious to the user.
>> 1195 #
>> 1196 choice
>> 1197 prompt "Endianness selection"
786 help 1198 help
787 Say Y here to enable options for run !! 1199 Some MIPS machines can be configured for either little or big endian
788 visors. This option enables basic hy !! 1200 byte order. These modes require different kernels and a different
789 setup. !! 1201 Linux distribution. In general there is one preferred byteorder for a
790 !! 1202 particular system but some systems are just as commonly used in the
791 If you say N, all options in this su !! 1203 one or the other endianness.
792 disabled, and Linux guest support wo !! 1204
>> 1205 config CPU_BIG_ENDIAN
>> 1206 bool "Big endian"
>> 1207 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1208
>> 1209 config CPU_LITTLE_ENDIAN
>> 1210 bool "Little endian"
>> 1211 depends on SYS_SUPPORTS_LITTLE_ENDIAN
793 1212
794 if HYPERVISOR_GUEST !! 1213 endchoice
795 1214
796 config PARAVIRT !! 1215 config EXPORT_UASM
797 bool "Enable paravirtualization code" !! 1216 bool
798 depends on HAVE_STATIC_CALL <<
799 help <<
800 This changes the kernel so it can mo <<
801 under a hypervisor, potentially impr <<
802 over full virtualization. However, <<
803 the kernel is theoretically slower a <<
804 1217
805 config PARAVIRT_XXL !! 1218 config SYS_SUPPORTS_APM_EMULATION
806 bool 1219 bool
807 1220
808 config PARAVIRT_DEBUG !! 1221 config SYS_SUPPORTS_BIG_ENDIAN
809 bool "paravirt-ops debugging" !! 1222 bool
810 depends on PARAVIRT && DEBUG_KERNEL <<
811 help <<
812 Enable to debug paravirt_ops interna <<
813 a paravirt_op is missing when it is <<
814 1223
815 config PARAVIRT_SPINLOCKS !! 1224 config SYS_SUPPORTS_LITTLE_ENDIAN
816 bool "Paravirtualization layer for spi !! 1225 bool
817 depends on PARAVIRT && SMP <<
818 help <<
819 Paravirtualized spinlocks allow a pv <<
820 spinlock implementation with somethi <<
821 (for example, block the virtual CPU <<
822 1226
823 It has a minimal impact on native ke !! 1227 config SYS_SUPPORTS_HUGETLBFS
824 benefit on paravirtualized KVM / Xen !! 1228 bool
>> 1229 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
>> 1230 default y
825 1231
826 If you are unsure how to answer this !! 1232 config MIPS_HUGE_TLB_SUPPORT
>> 1233 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
827 1234
828 config X86_HV_CALLBACK_VECTOR !! 1235 config IRQ_CPU_RM7K
829 def_bool n !! 1236 bool
830 1237
831 source "arch/x86/xen/Kconfig" !! 1238 config IRQ_MSP_SLP
>> 1239 bool
832 1240
833 config KVM_GUEST !! 1241 config IRQ_MSP_CIC
834 bool "KVM Guest support (including kvm !! 1242 bool
835 depends on PARAVIRT <<
836 select PARAVIRT_CLOCK <<
837 select ARCH_CPUIDLE_HALTPOLL <<
838 select X86_HV_CALLBACK_VECTOR <<
839 default y <<
840 help <<
841 This option enables various optimiza <<
842 hypervisor. It includes a paravirtua <<
843 of relying on a PIT (or probably oth <<
844 underlying device model, the host pr <<
845 timing infrastructure such as time o <<
846 1243
847 config ARCH_CPUIDLE_HALTPOLL !! 1244 config IRQ_TXX9
848 def_bool n !! 1245 bool
849 prompt "Disable host haltpoll when loa <<
850 help <<
851 If virtualized under KVM, disable ho <<
852 1246
853 config PVH !! 1247 config IRQ_GT641XX
854 bool "Support for running PVH guests" !! 1248 bool
855 help <<
856 This option enables the PVH entry po <<
857 as specified in the x86/HVM direct b <<
858 <<
859 config PARAVIRT_TIME_ACCOUNTING <<
860 bool "Paravirtual steal time accountin <<
861 depends on PARAVIRT <<
862 help <<
863 Select this option to enable fine gr <<
864 accounting. Time spent executing oth <<
865 the current vCPU is discounted from <<
866 that, there can be a small performan <<
867 <<
868 If in doubt, say N here. <<
869 <<
870 config PARAVIRT_CLOCK <<
871 bool <<
872 <<
873 config JAILHOUSE_GUEST <<
874 bool "Jailhouse non-root cell support" <<
875 depends on X86_64 && PCI <<
876 select X86_PM_TIMER <<
877 help <<
878 This option allows to run Linux as g <<
879 cell. You can leave this option disa <<
880 Jailhouse and run Linux afterwards i <<
881 <<
882 config ACRN_GUEST <<
883 bool "ACRN Guest support" <<
884 depends on X86_64 <<
885 select X86_HV_CALLBACK_VECTOR <<
886 help <<
887 This option allows to run Linux as g <<
888 a flexible, lightweight reference op <<
889 real-time and safety-criticality in <<
890 IOT with small footprint and real-ti <<
891 found in https://projectacrn.org/. <<
892 <<
893 config INTEL_TDX_GUEST <<
894 bool "Intel TDX (Trust Domain Extensio <<
895 depends on X86_64 && CPU_SUP_INTEL <<
896 depends on X86_X2APIC <<
897 depends on EFI_STUB <<
898 select ARCH_HAS_CC_PLATFORM <<
899 select X86_MEM_ENCRYPT <<
900 select X86_MCE <<
901 select UNACCEPTED_MEMORY <<
902 help <<
903 Support running as a guest under Int <<
904 the guest kernel can not boot or run <<
905 TDX includes memory encryption and i <<
906 which protect the confidentiality an <<
907 memory contents and CPU state. TDX g <<
908 some attacks from the VMM. <<
909 <<
910 endif # HYPERVISOR_GUEST <<
911 <<
912 source "arch/x86/Kconfig.cpu" <<
913 <<
914 config HPET_TIMER <<
915 def_bool X86_64 <<
916 prompt "HPET Timer Support" if X86_32 <<
917 help <<
918 Use the IA-PC HPET (High Precision E <<
919 time in preference to the PIT and RT <<
920 present. <<
921 HPET is the next generation timer re <<
922 The HPET provides a stable time base <<
923 systems, unlike the TSC, but it is m <<
924 as it is off-chip. The interface us <<
925 in the HPET spec, revision 1. <<
926 <<
927 You can safely choose Y here. Howev <<
928 activated if the platform and the BI <<
929 Otherwise the 8254 will be used for <<
930 1249
931 Choose N to continue using the legac !! 1250 config PCI_GT64XXX_PCI0
>> 1251 bool
932 1252
933 config HPET_EMULATE_RTC !! 1253 config NO_EXCEPT_FILL
934 def_bool y !! 1254 bool
935 depends on HPET_TIMER && (RTC_DRV_CMOS <<
936 1255
937 # Mark as expert because too many people got i !! 1256 config SOC_EMMA2RH
938 # The code disables itself when not needed. !! 1257 bool
939 config DMI !! 1258 select CEVT_R4K
940 default y !! 1259 select CSRC_R4K
941 select DMI_SCAN_MACHINE_NON_EFI_FALLBA !! 1260 select DMA_NONCOHERENT
942 bool "Enable DMI scanning" if EXPERT !! 1261 select IRQ_MIPS_CPU
943 help !! 1262 select SWAP_IO_SPACE
944 Enabled scanning of DMI to identify !! 1263 select SYS_HAS_CPU_R5500
945 here unless you have verified that y !! 1264 select SYS_SUPPORTS_32BIT_KERNEL
946 affected by entries in the DMI black !! 1265 select SYS_SUPPORTS_64BIT_KERNEL
947 BIOS code. !! 1266 select SYS_SUPPORTS_BIG_ENDIAN
948 <<
949 config GART_IOMMU <<
950 bool "Old AMD GART IOMMU support" <<
951 select IOMMU_HELPER <<
952 select SWIOTLB <<
953 depends on X86_64 && PCI && AMD_NB <<
954 help <<
955 Provides a driver for older AMD Athl <<
956 GART based hardware IOMMUs. <<
957 1267
958 The GART supports full DMA access fo !! 1268 config SOC_PNX833X
959 limitations, on systems with more th !! 1269 bool
960 for USB, sound, many IDE/SATA chipse !! 1270 select CEVT_R4K
>> 1271 select CSRC_R4K
>> 1272 select IRQ_MIPS_CPU
>> 1273 select DMA_NONCOHERENT
>> 1274 select SYS_HAS_CPU_MIPS32_R2
>> 1275 select SYS_SUPPORTS_32BIT_KERNEL
>> 1276 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1277 select SYS_SUPPORTS_BIG_ENDIAN
>> 1278 select SYS_SUPPORTS_MIPS16
>> 1279 select CPU_MIPSR2_IRQ_VI
961 1280
962 Newer systems typically have a moder !! 1281 config SOC_PNX8335
963 the CONFIG_AMD_IOMMU=y config option !! 1282 bool
>> 1283 select SOC_PNX833X
964 1284
965 In normal configurations this driver !! 1285 config MIPS_SPRAM
966 there's more than 3 GB of memory and !! 1286 bool
967 32-bit limited device. <<
968 1287
969 If unsure, say Y. !! 1288 config SWAP_IO_SPACE
>> 1289 bool
970 1290
971 config BOOT_VESA_SUPPORT !! 1291 config SGI_HAS_INDYDOG
972 bool 1292 bool
973 help <<
974 If true, at least one selected frame <<
975 of VESA video modes set at an early <<
976 1293
977 config MAXSMP !! 1294 config SGI_HAS_HAL2
978 bool "Enable Maximum number of SMP Pro !! 1295 bool
979 depends on X86_64 && SMP && DEBUG_KERN <<
980 select CPUMASK_OFFSTACK <<
981 help <<
982 Enable maximum number of CPUS and NU <<
983 If unsure, say N. <<
984 1296
985 # !! 1297 config SGI_HAS_SEEQ
986 # The maximum number of CPUs supported: !! 1298 bool
987 # <<
988 # The main config value is NR_CPUS, which defa <<
989 # and which can be configured interactively in <<
990 # [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] <<
991 # <<
992 # The ranges are different on 32-bit and 64-bi <<
993 # hardware capabilities and scalability featur <<
994 # <<
995 # ( If MAXSMP is enabled we just use the highe <<
996 # interactive configuration. ) <<
997 # <<
998 1299
999 config NR_CPUS_RANGE_BEGIN !! 1300 config SGI_HAS_WD93
1000 int !! 1301 bool
1001 default NR_CPUS_RANGE_END if MAXSMP <<
1002 default 1 if !SMP <<
1003 default 2 <<
1004 1302
1005 config NR_CPUS_RANGE_END !! 1303 config SGI_HAS_ZILOG
1006 int !! 1304 bool
1007 depends on X86_32 <<
1008 default 64 if SMP && X86_BIGSMP <<
1009 default 8 if SMP && !X86_BIGSMP <<
1010 default 1 if !SMP <<
1011 1305
1012 config NR_CPUS_RANGE_END !! 1306 config SGI_HAS_I8042
1013 int !! 1307 bool
1014 depends on X86_64 <<
1015 default 8192 if SMP && CPUMASK_OFFST <<
1016 default 512 if SMP && !CPUMASK_OFFS <<
1017 default 1 if !SMP <<
1018 1308
1019 config NR_CPUS_DEFAULT !! 1309 config DEFAULT_SGI_PARTITION
1020 int !! 1310 bool
1021 depends on X86_32 <<
1022 default 32 if X86_BIGSMP <<
1023 default 8 if SMP <<
1024 default 1 if !SMP <<
1025 1311
1026 config NR_CPUS_DEFAULT !! 1312 config FW_ARC32
1027 int !! 1313 bool
1028 depends on X86_64 <<
1029 default 8192 if MAXSMP <<
1030 default 64 if SMP <<
1031 default 1 if !SMP <<
1032 1314
1033 config NR_CPUS !! 1315 config FW_SNIPROM
1034 int "Maximum number of CPUs" if SMP & !! 1316 bool
1035 range NR_CPUS_RANGE_BEGIN NR_CPUS_RAN <<
1036 default NR_CPUS_DEFAULT <<
1037 help <<
1038 This allows you to specify the maxi <<
1039 kernel will support. If CPUMASK_OF <<
1040 supported value is 8192, otherwise <<
1041 minimum value which makes sense is <<
1042 1317
1043 This is purely to save memory: each !! 1318 config BOOT_ELF32
1044 to the kernel image. !! 1319 bool
1045 1320
1046 config SCHED_CLUSTER !! 1321 config MIPS_L1_CACHE_SHIFT_4
1047 bool "Cluster scheduler support" !! 1322 bool
1048 depends on SMP <<
1049 default y <<
1050 help <<
1051 Cluster scheduler support improves <<
1052 making when dealing with machines t <<
1053 Cluster usually means a couple of C <<
1054 by sharing mid-level caches, last-l <<
1055 busses. <<
1056 1323
1057 config SCHED_SMT !! 1324 config MIPS_L1_CACHE_SHIFT_5
1058 def_bool y if SMP !! 1325 bool
1059 1326
1060 config SCHED_MC !! 1327 config MIPS_L1_CACHE_SHIFT_6
1061 def_bool y !! 1328 bool
1062 prompt "Multi-core scheduler support" <<
1063 depends on SMP <<
1064 help <<
1065 Multi-core scheduler support improv <<
1066 making when dealing with multi-core <<
1067 increased overhead in some places. <<
1068 1329
1069 config SCHED_MC_PRIO !! 1330 config MIPS_L1_CACHE_SHIFT_7
1070 bool "CPU core priorities scheduler s !! 1331 bool
1071 depends on SCHED_MC <<
1072 select X86_INTEL_PSTATE if CPU_SUP_IN <<
1073 select X86_AMD_PSTATE if CPU_SUP_AMD <<
1074 select CPU_FREQ <<
1075 default y <<
1076 help <<
1077 Intel Turbo Boost Max Technology 3. <<
1078 core ordering determined at manufac <<
1079 certain cores to reach higher turbo <<
1080 single threaded workloads) than oth <<
1081 1332
1082 Enabling this kernel feature teache !! 1333 config MIPS_L1_CACHE_SHIFT
1083 the TBM3 (aka ITMT) priority order !! 1334 int
1084 scheduler's CPU selection logic acc !! 1335 default "7" if MIPS_L1_CACHE_SHIFT_7
1085 overall system performance can be a !! 1336 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1337 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1338 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1339 default "5"
1086 1340
1087 This feature will have no effect on !! 1341 config HAVE_STD_PC_SERIAL_PORT
>> 1342 bool
1088 1343
1089 If unsure say Y here. !! 1344 config ARC_CONSOLE
>> 1345 bool "ARC console support"
>> 1346 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1090 1347
1091 config UP_LATE_INIT !! 1348 config ARC_MEMORY
1092 def_bool y !! 1349 bool
1093 depends on !SMP && X86_LOCAL_APIC !! 1350 depends on MACH_JAZZ || SNI_RM || SGI_IP32
>> 1351 default y
1094 1352
1095 config X86_UP_APIC !! 1353 config ARC_PROMLIB
1096 bool "Local APIC support on uniproces !! 1354 bool
1097 default PCI_MSI !! 1355 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
1098 depends on X86_32 && !SMP && !X86_32_ !! 1356 default y
1099 help <<
1100 A local APIC (Advanced Programmable <<
1101 integrated interrupt controller in <<
1102 system which has a processor with a <<
1103 enable and use it. If you say Y her <<
1104 have a local APIC, then the kernel <<
1105 all. The local APIC supports CPU-ge <<
1106 performance counters), and the NMI <<
1107 lockups. <<
1108 <<
1109 config X86_UP_IOAPIC <<
1110 bool "IO-APIC support on uniprocessor <<
1111 depends on X86_UP_APIC <<
1112 help <<
1113 An IO-APIC (I/O Advanced Programmab <<
1114 SMP-capable replacement for PC-styl <<
1115 SMP systems and many recent uniproc <<
1116 <<
1117 If you have a single-CPU system wit <<
1118 to use it. If you say Y here even t <<
1119 an IO-APIC, then the kernel will st <<
1120 1357
1121 config X86_LOCAL_APIC !! 1358 config FW_ARC64
1122 def_bool y !! 1359 bool
1123 depends on X86_64 || SMP || X86_32_NO <<
1124 select IRQ_DOMAIN_HIERARCHY <<
1125 1360
1126 config ACPI_MADT_WAKEUP !! 1361 config BOOT_ELF64
1127 def_bool y !! 1362 bool
1128 depends on X86_64 <<
1129 depends on ACPI <<
1130 depends on SMP <<
1131 depends on X86_LOCAL_APIC <<
1132 1363
1133 config X86_IO_APIC !! 1364 menu "CPU selection"
1134 def_bool y <<
1135 depends on X86_LOCAL_APIC || X86_UP_I <<
1136 1365
1137 config X86_REROUTE_FOR_BROKEN_BOOT_IRQS !! 1366 choice
1138 bool "Reroute for broken boot IRQs" !! 1367 prompt "CPU type"
1139 depends on X86_IO_APIC !! 1368 default CPU_R4X00
1140 help <<
1141 This option enables a workaround th <<
1142 spurious interrupts. This is recomm <<
1143 interrupt handling is used on syste <<
1144 superfluous "boot interrupts" canno <<
1145 <<
1146 Some chipsets generate a legacy INT <<
1147 entry in the chipset's IO-APIC is m <<
1148 kernel does during interrupt handli <<
1149 boot IRQ generation cannot be disab <<
1150 the original IRQ line masked so tha <<
1151 IRQ" is delivered to the CPUs. The <<
1152 kernel to set up the IRQ handler on <<
1153 way only one interrupt is delivered <<
1154 the spurious second interrupt may c <<
1155 down (vital) interrupt lines. <<
1156 <<
1157 Only affects "broken" chipsets. Int <<
1158 increased on these systems. <<
1159 <<
1160 config X86_MCE <<
1161 bool "Machine Check / overheating rep <<
1162 select GENERIC_ALLOCATOR <<
1163 default y <<
1164 help <<
1165 Machine Check support allows the pr <<
1166 kernel if it detects a problem (e.g <<
1167 The action the kernel takes depends <<
1168 ranging from warning messages to ha <<
1169 <<
1170 config X86_MCELOG_LEGACY <<
1171 bool "Support for deprecated /dev/mce <<
1172 depends on X86_MCE <<
1173 help <<
1174 Enable support for /dev/mcelog whic <<
1175 userspace logging daemon. Consider <<
1176 rasdaemon solution. <<
1177 1369
1178 config X86_MCE_INTEL !! 1370 config CPU_LOONGSON3
1179 def_bool y !! 1371 bool "Loongson 3 CPU"
1180 prompt "Intel MCE features" !! 1372 depends on SYS_HAS_CPU_LOONGSON3
1181 depends on X86_MCE && X86_LOCAL_APIC !! 1373 select ARCH_HAS_PHYS_TO_DMA
>> 1374 select CPU_SUPPORTS_64BIT_KERNEL
>> 1375 select CPU_SUPPORTS_HIGHMEM
>> 1376 select CPU_SUPPORTS_HUGEPAGES
>> 1377 select CPU_HAS_LOAD_STORE_LR
>> 1378 select WEAK_ORDERING
>> 1379 select WEAK_REORDERING_BEYOND_LLSC
>> 1380 select MIPS_PGD_C0_CONTEXT
>> 1381 select MIPS_L1_CACHE_SHIFT_6
>> 1382 select GPIOLIB
>> 1383 select SWIOTLB
1182 help 1384 help
1183 Additional support for intel specif !! 1385 The Loongson 3 processor implements the MIPS64R2 instruction
1184 the thermal monitor. !! 1386 set with many extensions.
1185 1387
1186 config X86_MCE_AMD !! 1388 config LOONGSON3_ENHANCEMENT
1187 def_bool y !! 1389 bool "New Loongson 3 CPU Enhancements"
1188 prompt "AMD MCE features" !! 1390 default n
1189 depends on X86_MCE && X86_LOCAL_APIC !! 1391 select CPU_MIPSR2
>> 1392 select CPU_HAS_PREFETCH
>> 1393 depends on CPU_LOONGSON3
>> 1394 help
>> 1395 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1396 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1397 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1398 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1399 Fast TLB refill support, etc.
>> 1400
>> 1401 This option enable those enhancements which are not probed at run
>> 1402 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1403 please say 'N' here. If you want a high-performance kernel to run on
>> 1404 new Loongson 3 machines only, please say 'Y' here.
>> 1405
>> 1406 config CPU_LOONGSON3_WORKAROUNDS
>> 1407 bool "Old Loongson 3 LLSC Workarounds"
>> 1408 default y if SMP
>> 1409 depends on CPU_LOONGSON3
>> 1410 help
>> 1411 Loongson 3 processors have the llsc issues which require workarounds.
>> 1412 Without workarounds the system may hang unexpectedly.
>> 1413
>> 1414 Newer Loongson 3 will fix these issues and no workarounds are needed.
>> 1415 The workarounds have no significant side effect on them but may
>> 1416 decrease the performance of the system so this option should be
>> 1417 disabled unless the kernel is intended to be run on old systems.
>> 1418
>> 1419 If unsure, please say Y.
>> 1420
>> 1421 config CPU_LOONGSON2E
>> 1422 bool "Loongson 2E"
>> 1423 depends on SYS_HAS_CPU_LOONGSON2E
>> 1424 select CPU_LOONGSON2
>> 1425 help
>> 1426 The Loongson 2E processor implements the MIPS III instruction set
>> 1427 with many extensions.
>> 1428
>> 1429 It has an internal FPGA northbridge, which is compatible to
>> 1430 bonito64.
>> 1431
>> 1432 config CPU_LOONGSON2F
>> 1433 bool "Loongson 2F"
>> 1434 depends on SYS_HAS_CPU_LOONGSON2F
>> 1435 select CPU_LOONGSON2
>> 1436 select GPIOLIB
1190 help 1437 help
1191 Additional support for AMD specific !! 1438 The Loongson 2F processor implements the MIPS III instruction set
1192 the DRAM Error Threshold. !! 1439 with many extensions.
1193 1440
1194 config X86_ANCIENT_MCE !! 1441 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1195 bool "Support for old Pentium 5 / Win !! 1442 have a similar programming interface with FPGA northbridge used in
1196 depends on X86_32 && X86_MCE !! 1443 Loongson2E.
1197 help !! 1444
1198 Include support for machine check h !! 1445 config CPU_LOONGSON1B
1199 systems. These typically need to be !! 1446 bool "Loongson 1B"
1200 line. !! 1447 depends on SYS_HAS_CPU_LOONGSON1B
>> 1448 select CPU_LOONGSON1
>> 1449 select LEDS_GPIO_REGISTER
>> 1450 help
>> 1451 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1452 Release 1 instruction set and part of the MIPS32 Release 2
>> 1453 instruction set.
>> 1454
>> 1455 config CPU_LOONGSON1C
>> 1456 bool "Loongson 1C"
>> 1457 depends on SYS_HAS_CPU_LOONGSON1C
>> 1458 select CPU_LOONGSON1
>> 1459 select LEDS_GPIO_REGISTER
>> 1460 help
>> 1461 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1462 Release 1 instruction set and part of the MIPS32 Release 2
>> 1463 instruction set.
>> 1464
>> 1465 config CPU_MIPS32_R1
>> 1466 bool "MIPS32 Release 1"
>> 1467 depends on SYS_HAS_CPU_MIPS32_R1
>> 1468 select CPU_HAS_PREFETCH
>> 1469 select CPU_HAS_LOAD_STORE_LR
>> 1470 select CPU_SUPPORTS_32BIT_KERNEL
>> 1471 select CPU_SUPPORTS_HIGHMEM
>> 1472 help
>> 1473 Choose this option to build a kernel for release 1 or later of the
>> 1474 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1475 MIPS processor are based on a MIPS32 processor. If you know the
>> 1476 specific type of processor in your system, choose those that one
>> 1477 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1478 Release 2 of the MIPS32 architecture is available since several
>> 1479 years so chances are you even have a MIPS32 Release 2 processor
>> 1480 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1481 performance.
1201 1482
1202 config X86_MCE_THRESHOLD !! 1483 config CPU_MIPS32_R2
1203 depends on X86_MCE_AMD || X86_MCE_INT !! 1484 bool "MIPS32 Release 2"
1204 def_bool y !! 1485 depends on SYS_HAS_CPU_MIPS32_R2
>> 1486 select CPU_HAS_PREFETCH
>> 1487 select CPU_HAS_LOAD_STORE_LR
>> 1488 select CPU_SUPPORTS_32BIT_KERNEL
>> 1489 select CPU_SUPPORTS_HIGHMEM
>> 1490 select CPU_SUPPORTS_MSA
>> 1491 select HAVE_KVM
>> 1492 help
>> 1493 Choose this option to build a kernel for release 2 or later of the
>> 1494 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1495 MIPS processor are based on a MIPS32 processor. If you know the
>> 1496 specific type of processor in your system, choose those that one
>> 1497 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1498
>> 1499 config CPU_MIPS32_R6
>> 1500 bool "MIPS32 Release 6"
>> 1501 depends on SYS_HAS_CPU_MIPS32_R6
>> 1502 select CPU_HAS_PREFETCH
>> 1503 select CPU_SUPPORTS_32BIT_KERNEL
>> 1504 select CPU_SUPPORTS_HIGHMEM
>> 1505 select CPU_SUPPORTS_MSA
>> 1506 select HAVE_KVM
>> 1507 select MIPS_O32_FP64_SUPPORT
>> 1508 help
>> 1509 Choose this option to build a kernel for release 6 or later of the
>> 1510 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1511 family, are based on a MIPS32r6 processor. If you own an older
>> 1512 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1513
>> 1514 config CPU_MIPS64_R1
>> 1515 bool "MIPS64 Release 1"
>> 1516 depends on SYS_HAS_CPU_MIPS64_R1
>> 1517 select CPU_HAS_PREFETCH
>> 1518 select CPU_HAS_LOAD_STORE_LR
>> 1519 select CPU_SUPPORTS_32BIT_KERNEL
>> 1520 select CPU_SUPPORTS_64BIT_KERNEL
>> 1521 select CPU_SUPPORTS_HIGHMEM
>> 1522 select CPU_SUPPORTS_HUGEPAGES
>> 1523 help
>> 1524 Choose this option to build a kernel for release 1 or later of the
>> 1525 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1526 MIPS processor are based on a MIPS64 processor. If you know the
>> 1527 specific type of processor in your system, choose those that one
>> 1528 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1529 Release 2 of the MIPS64 architecture is available since several
>> 1530 years so chances are you even have a MIPS64 Release 2 processor
>> 1531 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1532 performance.
1205 1533
1206 config X86_MCE_INJECT !! 1534 config CPU_MIPS64_R2
1207 depends on X86_MCE && X86_LOCAL_APIC !! 1535 bool "MIPS64 Release 2"
1208 tristate "Machine check injector supp !! 1536 depends on SYS_HAS_CPU_MIPS64_R2
>> 1537 select CPU_HAS_PREFETCH
>> 1538 select CPU_HAS_LOAD_STORE_LR
>> 1539 select CPU_SUPPORTS_32BIT_KERNEL
>> 1540 select CPU_SUPPORTS_64BIT_KERNEL
>> 1541 select CPU_SUPPORTS_HIGHMEM
>> 1542 select CPU_SUPPORTS_HUGEPAGES
>> 1543 select CPU_SUPPORTS_MSA
>> 1544 select HAVE_KVM
>> 1545 help
>> 1546 Choose this option to build a kernel for release 2 or later of the
>> 1547 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1548 MIPS processor are based on a MIPS64 processor. If you know the
>> 1549 specific type of processor in your system, choose those that one
>> 1550 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1551
>> 1552 config CPU_MIPS64_R6
>> 1553 bool "MIPS64 Release 6"
>> 1554 depends on SYS_HAS_CPU_MIPS64_R6
>> 1555 select CPU_HAS_PREFETCH
>> 1556 select CPU_SUPPORTS_32BIT_KERNEL
>> 1557 select CPU_SUPPORTS_64BIT_KERNEL
>> 1558 select CPU_SUPPORTS_HIGHMEM
>> 1559 select CPU_SUPPORTS_MSA
>> 1560 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1561 select HAVE_KVM
>> 1562 help
>> 1563 Choose this option to build a kernel for release 6 or later of the
>> 1564 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1565 family, are based on a MIPS64r6 processor. If you own an older
>> 1566 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1567
>> 1568 config CPU_R3000
>> 1569 bool "R3000"
>> 1570 depends on SYS_HAS_CPU_R3000
>> 1571 select CPU_HAS_WB
>> 1572 select CPU_HAS_LOAD_STORE_LR
>> 1573 select CPU_SUPPORTS_32BIT_KERNEL
>> 1574 select CPU_SUPPORTS_HIGHMEM
>> 1575 help
>> 1576 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1577 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1578 *not* work on R4000 machines and vice versa. However, since most
>> 1579 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1580 might be a safe bet. If the resulting kernel does not work,
>> 1581 try to recompile with R3000.
>> 1582
>> 1583 config CPU_TX39XX
>> 1584 bool "R39XX"
>> 1585 depends on SYS_HAS_CPU_TX39XX
>> 1586 select CPU_SUPPORTS_32BIT_KERNEL
>> 1587 select CPU_HAS_LOAD_STORE_LR
>> 1588
>> 1589 config CPU_VR41XX
>> 1590 bool "R41xx"
>> 1591 depends on SYS_HAS_CPU_VR41XX
>> 1592 select CPU_SUPPORTS_32BIT_KERNEL
>> 1593 select CPU_SUPPORTS_64BIT_KERNEL
>> 1594 select CPU_HAS_LOAD_STORE_LR
>> 1595 help
>> 1596 The options selects support for the NEC VR4100 series of processors.
>> 1597 Only choose this option if you have one of these processors as a
>> 1598 kernel built with this option will not run on any other type of
>> 1599 processor or vice versa.
>> 1600
>> 1601 config CPU_R4300
>> 1602 bool "R4300"
>> 1603 depends on SYS_HAS_CPU_R4300
>> 1604 select CPU_SUPPORTS_32BIT_KERNEL
>> 1605 select CPU_SUPPORTS_64BIT_KERNEL
>> 1606 select CPU_HAS_LOAD_STORE_LR
>> 1607 help
>> 1608 MIPS Technologies R4300-series processors.
>> 1609
>> 1610 config CPU_R4X00
>> 1611 bool "R4x00"
>> 1612 depends on SYS_HAS_CPU_R4X00
>> 1613 select CPU_SUPPORTS_32BIT_KERNEL
>> 1614 select CPU_SUPPORTS_64BIT_KERNEL
>> 1615 select CPU_SUPPORTS_HUGEPAGES
>> 1616 select CPU_HAS_LOAD_STORE_LR
>> 1617 help
>> 1618 MIPS Technologies R4000-series processors other than 4300, including
>> 1619 the R4000, R4400, R4600, and 4700.
>> 1620
>> 1621 config CPU_TX49XX
>> 1622 bool "R49XX"
>> 1623 depends on SYS_HAS_CPU_TX49XX
>> 1624 select CPU_HAS_PREFETCH
>> 1625 select CPU_HAS_LOAD_STORE_LR
>> 1626 select CPU_SUPPORTS_32BIT_KERNEL
>> 1627 select CPU_SUPPORTS_64BIT_KERNEL
>> 1628 select CPU_SUPPORTS_HUGEPAGES
>> 1629
>> 1630 config CPU_R5000
>> 1631 bool "R5000"
>> 1632 depends on SYS_HAS_CPU_R5000
>> 1633 select CPU_SUPPORTS_32BIT_KERNEL
>> 1634 select CPU_SUPPORTS_64BIT_KERNEL
>> 1635 select CPU_SUPPORTS_HUGEPAGES
>> 1636 select CPU_HAS_LOAD_STORE_LR
>> 1637 help
>> 1638 MIPS Technologies R5000-series processors other than the Nevada.
>> 1639
>> 1640 config CPU_R5432
>> 1641 bool "R5432"
>> 1642 depends on SYS_HAS_CPU_R5432
>> 1643 select CPU_SUPPORTS_32BIT_KERNEL
>> 1644 select CPU_SUPPORTS_64BIT_KERNEL
>> 1645 select CPU_SUPPORTS_HUGEPAGES
>> 1646 select CPU_HAS_LOAD_STORE_LR
>> 1647
>> 1648 config CPU_R5500
>> 1649 bool "R5500"
>> 1650 depends on SYS_HAS_CPU_R5500
>> 1651 select CPU_SUPPORTS_32BIT_KERNEL
>> 1652 select CPU_SUPPORTS_64BIT_KERNEL
>> 1653 select CPU_SUPPORTS_HUGEPAGES
>> 1654 select CPU_HAS_LOAD_STORE_LR
>> 1655 help
>> 1656 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1657 instruction set.
>> 1658
>> 1659 config CPU_NEVADA
>> 1660 bool "RM52xx"
>> 1661 depends on SYS_HAS_CPU_NEVADA
>> 1662 select CPU_SUPPORTS_32BIT_KERNEL
>> 1663 select CPU_SUPPORTS_64BIT_KERNEL
>> 1664 select CPU_SUPPORTS_HUGEPAGES
>> 1665 select CPU_HAS_LOAD_STORE_LR
>> 1666 help
>> 1667 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1668
>> 1669 config CPU_R8000
>> 1670 bool "R8000"
>> 1671 depends on SYS_HAS_CPU_R8000
>> 1672 select CPU_HAS_PREFETCH
>> 1673 select CPU_HAS_LOAD_STORE_LR
>> 1674 select CPU_SUPPORTS_64BIT_KERNEL
>> 1675 help
>> 1676 MIPS Technologies R8000 processors. Note these processors are
>> 1677 uncommon and the support for them is incomplete.
>> 1678
>> 1679 config CPU_R10000
>> 1680 bool "R10000"
>> 1681 depends on SYS_HAS_CPU_R10000
>> 1682 select CPU_HAS_PREFETCH
>> 1683 select CPU_HAS_LOAD_STORE_LR
>> 1684 select CPU_SUPPORTS_32BIT_KERNEL
>> 1685 select CPU_SUPPORTS_64BIT_KERNEL
>> 1686 select CPU_SUPPORTS_HIGHMEM
>> 1687 select CPU_SUPPORTS_HUGEPAGES
>> 1688 help
>> 1689 MIPS Technologies R10000-series processors.
>> 1690
>> 1691 config CPU_RM7000
>> 1692 bool "RM7000"
>> 1693 depends on SYS_HAS_CPU_RM7000
>> 1694 select CPU_HAS_PREFETCH
>> 1695 select CPU_HAS_LOAD_STORE_LR
>> 1696 select CPU_SUPPORTS_32BIT_KERNEL
>> 1697 select CPU_SUPPORTS_64BIT_KERNEL
>> 1698 select CPU_SUPPORTS_HIGHMEM
>> 1699 select CPU_SUPPORTS_HUGEPAGES
>> 1700
>> 1701 config CPU_SB1
>> 1702 bool "SB1"
>> 1703 depends on SYS_HAS_CPU_SB1
>> 1704 select CPU_HAS_LOAD_STORE_LR
>> 1705 select CPU_SUPPORTS_32BIT_KERNEL
>> 1706 select CPU_SUPPORTS_64BIT_KERNEL
>> 1707 select CPU_SUPPORTS_HIGHMEM
>> 1708 select CPU_SUPPORTS_HUGEPAGES
>> 1709 select WEAK_ORDERING
>> 1710
>> 1711 config CPU_CAVIUM_OCTEON
>> 1712 bool "Cavium Octeon processor"
>> 1713 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1714 select CPU_HAS_PREFETCH
>> 1715 select CPU_HAS_LOAD_STORE_LR
>> 1716 select CPU_SUPPORTS_64BIT_KERNEL
>> 1717 select WEAK_ORDERING
>> 1718 select CPU_SUPPORTS_HIGHMEM
>> 1719 select CPU_SUPPORTS_HUGEPAGES
>> 1720 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1721 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1722 select MIPS_L1_CACHE_SHIFT_7
>> 1723 select HAVE_KVM
>> 1724 help
>> 1725 The Cavium Octeon processor is a highly integrated chip containing
>> 1726 many ethernet hardware widgets for networking tasks. The processor
>> 1727 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1728 Full details can be found at http://www.caviumnetworks.com.
>> 1729
>> 1730 config CPU_BMIPS
>> 1731 bool "Broadcom BMIPS"
>> 1732 depends on SYS_HAS_CPU_BMIPS
>> 1733 select CPU_MIPS32
>> 1734 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1735 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1736 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1737 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1738 select CPU_SUPPORTS_32BIT_KERNEL
>> 1739 select DMA_NONCOHERENT
>> 1740 select IRQ_MIPS_CPU
>> 1741 select SWAP_IO_SPACE
>> 1742 select WEAK_ORDERING
>> 1743 select CPU_SUPPORTS_HIGHMEM
>> 1744 select CPU_HAS_PREFETCH
>> 1745 select CPU_HAS_LOAD_STORE_LR
>> 1746 select CPU_SUPPORTS_CPUFREQ
>> 1747 select MIPS_EXTERNAL_TIMER
>> 1748 help
>> 1749 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1750
>> 1751 config CPU_XLR
>> 1752 bool "Netlogic XLR SoC"
>> 1753 depends on SYS_HAS_CPU_XLR
>> 1754 select CPU_HAS_LOAD_STORE_LR
>> 1755 select CPU_SUPPORTS_32BIT_KERNEL
>> 1756 select CPU_SUPPORTS_64BIT_KERNEL
>> 1757 select CPU_SUPPORTS_HIGHMEM
>> 1758 select CPU_SUPPORTS_HUGEPAGES
>> 1759 select WEAK_ORDERING
>> 1760 select WEAK_REORDERING_BEYOND_LLSC
>> 1761 help
>> 1762 Netlogic Microsystems XLR/XLS processors.
>> 1763
>> 1764 config CPU_XLP
>> 1765 bool "Netlogic XLP SoC"
>> 1766 depends on SYS_HAS_CPU_XLP
>> 1767 select CPU_SUPPORTS_32BIT_KERNEL
>> 1768 select CPU_SUPPORTS_64BIT_KERNEL
>> 1769 select CPU_SUPPORTS_HIGHMEM
>> 1770 select WEAK_ORDERING
>> 1771 select WEAK_REORDERING_BEYOND_LLSC
>> 1772 select CPU_HAS_PREFETCH
>> 1773 select CPU_HAS_LOAD_STORE_LR
>> 1774 select CPU_MIPSR2
>> 1775 select CPU_SUPPORTS_HUGEPAGES
>> 1776 select MIPS_ASID_BITS_VARIABLE
1209 help 1777 help
1210 Provide support for injecting machi !! 1778 Netlogic Microsystems XLP processors.
1211 If you don't know what a machine ch !! 1779 endchoice
1212 QA it is safe to say n. <<
1213 <<
1214 source "arch/x86/events/Kconfig" <<
1215 1780
1216 config X86_LEGACY_VM86 !! 1781 config CPU_MIPS32_3_5_FEATURES
1217 bool "Legacy VM86 support" !! 1782 bool "MIPS32 Release 3.5 Features"
1218 depends on X86_32 !! 1783 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1784 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 1785 help
>> 1786 Choose this option to build a kernel for release 2 or later of the
>> 1787 MIPS32 architecture including features from the 3.5 release such as
>> 1788 support for Enhanced Virtual Addressing (EVA).
>> 1789
>> 1790 config CPU_MIPS32_3_5_EVA
>> 1791 bool "Enhanced Virtual Addressing (EVA)"
>> 1792 depends on CPU_MIPS32_3_5_FEATURES
>> 1793 select EVA
>> 1794 default y
>> 1795 help
>> 1796 Choose this option if you want to enable the Enhanced Virtual
>> 1797 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1798 One of its primary benefits is an increase in the maximum size
>> 1799 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1800
>> 1801 config CPU_MIPS32_R5_FEATURES
>> 1802 bool "MIPS32 Release 5 Features"
>> 1803 depends on SYS_HAS_CPU_MIPS32_R5
>> 1804 depends on CPU_MIPS32_R2
>> 1805 help
>> 1806 Choose this option to build a kernel for release 2 or later of the
>> 1807 MIPS32 architecture including features from release 5 such as
>> 1808 support for Extended Physical Addressing (XPA).
>> 1809
>> 1810 config CPU_MIPS32_R5_XPA
>> 1811 bool "Extended Physical Addressing (XPA)"
>> 1812 depends on CPU_MIPS32_R5_FEATURES
>> 1813 depends on !EVA
>> 1814 depends on !PAGE_SIZE_4KB
>> 1815 depends on SYS_SUPPORTS_HIGHMEM
>> 1816 select XPA
>> 1817 select HIGHMEM
>> 1818 select PHYS_ADDR_T_64BIT
>> 1819 default n
1219 help 1820 help
1220 This option allows user programs to !! 1821 Choose this option if you want to enable the Extended Physical
1221 mode, which is an 80286-era approxi !! 1822 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1222 !! 1823 benefit is to increase physical addressing equal to or greater
1223 Some very old versions of X and/or !! 1824 than 40 bits. Note that this has the side effect of turning on
1224 for user mode setting. Similarly, !! 1825 64-bit addressing which in turn makes the PTEs 64-bit in size.
1225 available to accelerate real mode D !! 1826 If unsure, say 'N' here.
1226 recent version of DOSEMU, X, or vbe <<
1227 functional even without kernel VM86 <<
1228 fall back to software emulation. Ne <<
1229 a 16-bit DOS program where 16-bit p <<
1230 mode might be faster than emulation <<
1231 enable this option. <<
1232 <<
1233 Note that any app that works on a 6 <<
1234 need this option, as 64-bit kernels <<
1235 V8086 mode. This option is also unr <<
1236 mode and is not needed to run most <<
1237 1827
1238 Enabling this option increases the !! 1828 if CPU_LOONGSON2F
1239 and slows down exception handling a !! 1829 config CPU_NOP_WORKAROUNDS
1240 !! 1830 bool
1241 If unsure, say N here. <<
1242 1831
1243 config VM86 !! 1832 config CPU_JUMP_WORKAROUNDS
1244 bool 1833 bool
1245 default X86_LEGACY_VM86 <<
1246 1834
1247 config X86_16BIT !! 1835 config CPU_LOONGSON2F_WORKAROUNDS
1248 bool "Enable support for 16-bit segme !! 1836 bool "Loongson 2F Workarounds"
1249 default y 1837 default y
1250 depends on MODIFY_LDT_SYSCALL !! 1838 select CPU_NOP_WORKAROUNDS
>> 1839 select CPU_JUMP_WORKAROUNDS
1251 help 1840 help
1252 This option is required by programs !! 1841 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1253 protected mode legacy code on x86 p !! 1842 require workarounds. Without workarounds the system may hang
1254 this option saves about 300 bytes o !! 1843 unexpectedly. For more information please refer to the gas
1255 plus 16K runtime memory on x86-64, !! 1844 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1845
>> 1846 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1847 are needed. The workarounds have no significant side effect on them
>> 1848 but may decrease the performance of the system so this option should
>> 1849 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1850 systems.
1256 1851
1257 config X86_ESPFIX32 !! 1852 If unsure, please say Y.
1258 def_bool y !! 1853 endif # CPU_LOONGSON2F
1259 depends on X86_16BIT && X86_32 <<
1260 1854
1261 config X86_ESPFIX64 !! 1855 config SYS_SUPPORTS_ZBOOT
1262 def_bool y !! 1856 bool
1263 depends on X86_16BIT && X86_64 !! 1857 select HAVE_KERNEL_GZIP
>> 1858 select HAVE_KERNEL_BZIP2
>> 1859 select HAVE_KERNEL_LZ4
>> 1860 select HAVE_KERNEL_LZMA
>> 1861 select HAVE_KERNEL_LZO
>> 1862 select HAVE_KERNEL_XZ
1264 1863
1265 config X86_VSYSCALL_EMULATION !! 1864 config SYS_SUPPORTS_ZBOOT_UART16550
1266 bool "Enable vsyscall emulation" if E !! 1865 bool
1267 default y !! 1866 select SYS_SUPPORTS_ZBOOT
1268 depends on X86_64 <<
1269 help <<
1270 This enables emulation of the legac <<
1271 it is roughly equivalent to booting <<
1272 that it will also disable the helpf <<
1273 tries to use a vsyscall. With this <<
1274 programs will just segfault, citing <<
1275 0xffffffffff600?00. <<
1276 1867
1277 This option is required by many pro !! 1868 config SYS_SUPPORTS_ZBOOT_UART_PROM
1278 care should be used even with newer !! 1869 bool
>> 1870 select SYS_SUPPORTS_ZBOOT
1279 1871
1280 Disabling this option saves about 7 !! 1872 config CPU_LOONGSON2
1281 possibly 4K of additional runtime p !! 1873 bool
>> 1874 select CPU_SUPPORTS_32BIT_KERNEL
>> 1875 select CPU_SUPPORTS_64BIT_KERNEL
>> 1876 select CPU_SUPPORTS_HIGHMEM
>> 1877 select CPU_SUPPORTS_HUGEPAGES
>> 1878 select ARCH_HAS_PHYS_TO_DMA
>> 1879 select CPU_HAS_LOAD_STORE_LR
1282 1880
1283 config X86_IOPL_IOPERM !! 1881 config CPU_LOONGSON1
1284 bool "IOPERM and IOPL Emulation" !! 1882 bool
1285 default y !! 1883 select CPU_MIPS32
1286 help !! 1884 select CPU_MIPSR1
1287 This enables the ioperm() and iopl( !! 1885 select CPU_HAS_PREFETCH
1288 for legacy applications. !! 1886 select CPU_HAS_LOAD_STORE_LR
>> 1887 select CPU_SUPPORTS_32BIT_KERNEL
>> 1888 select CPU_SUPPORTS_HIGHMEM
>> 1889 select CPU_SUPPORTS_CPUFREQ
1289 1890
1290 Legacy IOPL support is an overbroad !! 1891 config CPU_BMIPS32_3300
1291 space aside of accessing all 65536 !! 1892 select SMP_UP if SMP
1292 interrupts. To gain this access the !! 1893 bool
1293 capabilities and permission from po <<
1294 modules. <<
1295 1894
1296 The emulation restricts the functio !! 1895 config CPU_BMIPS4350
1297 only allowing the full range I/O po !! 1896 bool
1298 ability to disable interrupts from !! 1897 select SYS_SUPPORTS_SMP
1299 granted if the hardware IOPL mechan !! 1898 select SYS_SUPPORTS_HOTPLUG_CPU
1300 1899
1301 config TOSHIBA !! 1900 config CPU_BMIPS4380
1302 tristate "Toshiba Laptop support" !! 1901 bool
1303 depends on X86_32 !! 1902 select MIPS_L1_CACHE_SHIFT_6
1304 help !! 1903 select SYS_SUPPORTS_SMP
1305 This adds a driver to safely access !! 1904 select SYS_SUPPORTS_HOTPLUG_CPU
1306 the CPU on Toshiba portables with a !! 1905 select CPU_HAS_RIXI
1307 not work on models with a Phoenix B <<
1308 is used to set the BIOS and power s <<
1309 1906
1310 For information on utilities to mak !! 1907 config CPU_BMIPS5000
1311 Toshiba Linux utilities web site at !! 1908 bool
1312 <http://www.buzzard.org.uk/toshiba/ !! 1909 select MIPS_CPU_SCACHE
>> 1910 select MIPS_L1_CACHE_SHIFT_7
>> 1911 select SYS_SUPPORTS_SMP
>> 1912 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1913 select CPU_HAS_RIXI
1313 1914
1314 Say Y if you intend to run this ker !! 1915 config SYS_HAS_CPU_LOONGSON3
1315 Say N otherwise. !! 1916 bool
>> 1917 select CPU_SUPPORTS_CPUFREQ
>> 1918 select CPU_HAS_RIXI
1316 1919
1317 config X86_REBOOTFIXUPS !! 1920 config SYS_HAS_CPU_LOONGSON2E
1318 bool "Enable X86 board specific fixup !! 1921 bool
1319 depends on X86_32 <<
1320 help <<
1321 This enables chipset and/or board s <<
1322 in order to get reboot to work corr <<
1323 some combinations of hardware and B <<
1324 this config is intended, is when re <<
1325 system. <<
1326 1922
1327 Currently, the only fixup is for th !! 1923 config SYS_HAS_CPU_LOONGSON2F
1328 CS5530A and CS5536 chipsets and the !! 1924 bool
>> 1925 select CPU_SUPPORTS_CPUFREQ
>> 1926 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1927 select CPU_SUPPORTS_UNCACHED_ACCELERATED
1329 1928
1330 Say Y if you want to enable the fix !! 1929 config SYS_HAS_CPU_LOONGSON1B
1331 enable this option even if you don' !! 1930 bool
1332 Say N otherwise. <<
1333 1931
1334 config MICROCODE !! 1932 config SYS_HAS_CPU_LOONGSON1C
1335 def_bool y !! 1933 bool
1336 depends on CPU_SUP_AMD || CPU_SUP_INT <<
1337 1934
1338 config MICROCODE_INITRD32 !! 1935 config SYS_HAS_CPU_MIPS32_R1
1339 def_bool y !! 1936 bool
1340 depends on MICROCODE && X86_32 && BLK <<
1341 1937
1342 config MICROCODE_LATE_LOADING !! 1938 config SYS_HAS_CPU_MIPS32_R2
1343 bool "Late microcode loading (DANGERO !! 1939 bool
1344 default n <<
1345 depends on MICROCODE && SMP <<
1346 help <<
1347 Loading microcode late, when the sy <<
1348 is a tricky business and should be <<
1349 of synchronizing all cores and SMT <<
1350 not guarantee that cores might not <<
1351 use this at your own risk. Late loa <<
1352 microcode header indicates that it <<
1353 minimal revision check. This minima <<
1354 the kernel command line with "micro <<
1355 1940
1356 config MICROCODE_LATE_FORCE_MINREV !! 1941 config SYS_HAS_CPU_MIPS32_R3_5
1357 bool "Enforce late microcode loading !! 1942 bool
1358 default n <<
1359 depends on MICROCODE_LATE_LOADING <<
1360 help <<
1361 To prevent that users load microcod <<
1362 in use features, newer microcode pa <<
1363 in the microcode header, which tell <<
1364 revision must be active in the CPU <<
1365 late into the running system. If di <<
1366 be enforced but the kernel will be <<
1367 revision check fails. <<
1368 <<
1369 This minimal revision check can als <<
1370 "microcode.minrev" parameter on the <<
1371 <<
1372 If unsure say Y. <<
1373 <<
1374 config X86_MSR <<
1375 tristate "/dev/cpu/*/msr - Model-spec <<
1376 help <<
1377 This device gives privileged proces <<
1378 Model-Specific Registers (MSRs). I <<
1379 major 202 and minors 0 to 31 for /d <<
1380 MSR accesses are directed to a spec <<
1381 systems. <<
1382 1943
1383 config X86_CPUID !! 1944 config SYS_HAS_CPU_MIPS32_R5
1384 tristate "/dev/cpu/*/cpuid - CPU info !! 1945 bool
1385 help <<
1386 This device gives processes access <<
1387 be executed on a specific processor <<
1388 with major 203 and minors 0 to 31 f <<
1389 /dev/cpu/31/cpuid. <<
1390 1946
1391 choice !! 1947 config SYS_HAS_CPU_MIPS32_R6
1392 prompt "High Memory Support" !! 1948 bool
1393 default HIGHMEM4G <<
1394 depends on X86_32 <<
1395 <<
1396 config NOHIGHMEM <<
1397 bool "off" <<
1398 help <<
1399 Linux can use up to 64 Gigabytes of <<
1400 However, the address space of 32-bi <<
1401 Gigabytes large. That means that, i <<
1402 physical memory, not all of it can <<
1403 kernel. The physical memory that's <<
1404 "high memory". <<
1405 <<
1406 If you are compiling a kernel which <<
1407 more than 1 Gigabyte total physical <<
1408 choice and suitable for most users) <<
1409 split: 3GB are mapped so that each <<
1410 space and the remaining part of the <<
1411 by the kernel to permanently map as <<
1412 possible. <<
1413 <<
1414 If the machine has between 1 and 4 <<
1415 answer "4GB" here. <<
1416 <<
1417 If more than 4 Gigabytes is used th <<
1418 selection turns Intel PAE (Physical <<
1419 PAE implements 3-level paging on IA <<
1420 supported by Linux, PAE mode is imp <<
1421 processors (Pentium Pro and better) <<
1422 then the kernel will not boot on CP <<
1423 <<
1424 The actual amount of total physical <<
1425 auto detected or can be forced by u <<
1426 such as "mem=256M". (Try "man bootp <<
1427 your boot loader (lilo or loadlin) <<
1428 kernel at boot time.) <<
1429 <<
1430 If unsure, say "off". <<
1431 <<
1432 config HIGHMEM4G <<
1433 bool "4GB" <<
1434 help <<
1435 Select this if you have a 32-bit pr <<
1436 gigabytes of physical RAM. <<
1437 <<
1438 config HIGHMEM64G <<
1439 bool "64GB" <<
1440 depends on X86_HAVE_PAE <<
1441 select X86_PAE <<
1442 help <<
1443 Select this if you have a 32-bit pr <<
1444 gigabytes of physical RAM. <<
1445 1949
1446 endchoice !! 1950 config SYS_HAS_CPU_MIPS64_R1
>> 1951 bool
1447 1952
1448 choice !! 1953 config SYS_HAS_CPU_MIPS64_R2
1449 prompt "Memory split" if EXPERT !! 1954 bool
1450 default VMSPLIT_3G <<
1451 depends on X86_32 <<
1452 help <<
1453 Select the desired split between ke <<
1454 <<
1455 If the address range available to t <<
1456 physical memory installed, the rema <<
1457 as "high memory". Accessing high me <<
1458 than low memory, as it needs to be <<
1459 Note that increasing the kernel add <<
1460 available to user programs, making <<
1461 tighter. Selecting anything other <<
1462 will also likely make your kernel i <<
1463 kernel modules. <<
1464 <<
1465 If you are not absolutely sure what <<
1466 option alone! <<
1467 <<
1468 config VMSPLIT_3G <<
1469 bool "3G/1G user/kernel split <<
1470 config VMSPLIT_3G_OPT <<
1471 depends on !X86_PAE <<
1472 bool "3G/1G user/kernel split <<
1473 config VMSPLIT_2G <<
1474 bool "2G/2G user/kernel split <<
1475 config VMSPLIT_2G_OPT <<
1476 depends on !X86_PAE <<
1477 bool "2G/2G user/kernel split <<
1478 config VMSPLIT_1G <<
1479 bool "1G/3G user/kernel split <<
1480 endchoice <<
1481 1955
1482 config PAGE_OFFSET !! 1956 config SYS_HAS_CPU_MIPS64_R6
1483 hex !! 1957 bool
1484 default 0xB0000000 if VMSPLIT_3G_OPT <<
1485 default 0x80000000 if VMSPLIT_2G <<
1486 default 0x78000000 if VMSPLIT_2G_OPT <<
1487 default 0x40000000 if VMSPLIT_1G <<
1488 default 0xC0000000 <<
1489 depends on X86_32 <<
1490 1958
1491 config HIGHMEM !! 1959 config SYS_HAS_CPU_R3000
1492 def_bool y !! 1960 bool
1493 depends on X86_32 && (HIGHMEM64G || H <<
1494 1961
1495 config X86_PAE !! 1962 config SYS_HAS_CPU_TX39XX
1496 bool "PAE (Physical Address Extension !! 1963 bool
1497 depends on X86_32 && X86_HAVE_PAE <<
1498 select PHYS_ADDR_T_64BIT <<
1499 select SWIOTLB <<
1500 help <<
1501 PAE is required for NX support, and <<
1502 larger swapspace support for non-ov <<
1503 has the cost of more pagetable look <<
1504 consumes more pagetable space per p <<
1505 1964
1506 config X86_5LEVEL !! 1965 config SYS_HAS_CPU_VR41XX
1507 bool "Enable 5-level page tables supp !! 1966 bool
1508 default y <<
1509 select DYNAMIC_MEMORY_LAYOUT <<
1510 select SPARSEMEM_VMEMMAP <<
1511 depends on X86_64 <<
1512 help <<
1513 5-level paging enables access to la <<
1514 up to 128 PiB of virtual address sp <<
1515 physical address space. <<
1516 1967
1517 It will be supported by future Inte !! 1968 config SYS_HAS_CPU_R4300
>> 1969 bool
1518 1970
1519 A kernel with the option enabled ca !! 1971 config SYS_HAS_CPU_R4X00
1520 support 4- or 5-level paging. !! 1972 bool
1521 1973
1522 See Documentation/arch/x86/x86_64/5 !! 1974 config SYS_HAS_CPU_TX49XX
1523 information. !! 1975 bool
1524 1976
1525 Say N if unsure. !! 1977 config SYS_HAS_CPU_R5000
>> 1978 bool
1526 1979
1527 config X86_DIRECT_GBPAGES !! 1980 config SYS_HAS_CPU_R5432
1528 def_bool y !! 1981 bool
1529 depends on X86_64 <<
1530 help <<
1531 Certain kernel features effectively <<
1532 linear 1 GB mappings (even if the C <<
1533 supports them), so don't confuse th <<
1534 that we have them enabled. <<
1535 <<
1536 config X86_CPA_STATISTICS <<
1537 bool "Enable statistic for Change Pag <<
1538 depends on DEBUG_FS <<
1539 help <<
1540 Expose statistics about the Change <<
1541 helps to determine the effectivenes <<
1542 page mappings when mapping protecti <<
1543 <<
1544 config X86_MEM_ENCRYPT <<
1545 select ARCH_HAS_FORCE_DMA_UNENCRYPTED <<
1546 select DYNAMIC_PHYSICAL_MASK <<
1547 def_bool n <<
1548 1982
1549 config AMD_MEM_ENCRYPT !! 1983 config SYS_HAS_CPU_R5500
1550 bool "AMD Secure Memory Encryption (S !! 1984 bool
1551 depends on X86_64 && CPU_SUP_AMD <<
1552 depends on EFI_STUB <<
1553 select DMA_COHERENT_POOL <<
1554 select ARCH_USE_MEMREMAP_PROT <<
1555 select INSTRUCTION_DECODER <<
1556 select ARCH_HAS_CC_PLATFORM <<
1557 select X86_MEM_ENCRYPT <<
1558 select UNACCEPTED_MEMORY <<
1559 help <<
1560 Say yes to enable support for the e <<
1561 This requires an AMD processor that <<
1562 Encryption (SME). <<
1563 1985
1564 # Common NUMA Features !! 1986 config SYS_HAS_CPU_NEVADA
1565 config NUMA !! 1987 bool
1566 bool "NUMA Memory Allocation and Sche <<
1567 depends on SMP <<
1568 depends on X86_64 || (X86_32 && HIGHM <<
1569 default y if X86_BIGSMP <<
1570 select USE_PERCPU_NUMA_NODE_ID <<
1571 select OF_NUMA if OF <<
1572 help <<
1573 Enable NUMA (Non-Uniform Memory Acc <<
1574 1988
1575 The kernel will try to allocate mem !! 1989 config SYS_HAS_CPU_R8000
1576 local memory controller of the CPU !! 1990 bool
1577 NUMA awareness to the kernel. <<
1578 1991
1579 For 64-bit this is recommended if t !! 1992 config SYS_HAS_CPU_R10000
1580 (or later), AMD Opteron, or EM64T N !! 1993 bool
1581 1994
1582 For 32-bit this is only needed if y !! 1995 config SYS_HAS_CPU_RM7000
1583 kernel on a 64-bit NUMA platform. !! 1996 bool
1584 1997
1585 Otherwise, you should say N. !! 1998 config SYS_HAS_CPU_SB1
>> 1999 bool
1586 2000
1587 config AMD_NUMA !! 2001 config SYS_HAS_CPU_CAVIUM_OCTEON
1588 def_bool y !! 2002 bool
1589 prompt "Old style AMD Opteron NUMA de <<
1590 depends on X86_64 && NUMA && PCI <<
1591 help <<
1592 Enable AMD NUMA node topology detec <<
1593 you have a multi processor AMD syst <<
1594 read the NUMA configuration directl <<
1595 of Opteron. It is recommended to us <<
1596 which also takes priority if both a <<
1597 2003
1598 config X86_64_ACPI_NUMA !! 2004 config SYS_HAS_CPU_BMIPS
1599 def_bool y !! 2005 bool
1600 prompt "ACPI NUMA detection" <<
1601 depends on X86_64 && NUMA && ACPI && <<
1602 select ACPI_NUMA <<
1603 help <<
1604 Enable ACPI SRAT based node topolog <<
1605 2006
1606 config NODES_SHIFT !! 2007 config SYS_HAS_CPU_BMIPS32_3300
1607 int "Maximum NUMA Nodes (as a power o !! 2008 bool
1608 range 1 10 !! 2009 select SYS_HAS_CPU_BMIPS
1609 default "10" if MAXSMP <<
1610 default "6" if X86_64 <<
1611 default "3" <<
1612 depends on NUMA <<
1613 help <<
1614 Specify the maximum number of NUMA <<
1615 system. Increases memory reserved <<
1616 2010
1617 config ARCH_FLATMEM_ENABLE !! 2011 config SYS_HAS_CPU_BMIPS4350
1618 def_bool y !! 2012 bool
1619 depends on X86_32 && !NUMA !! 2013 select SYS_HAS_CPU_BMIPS
1620 2014
1621 config ARCH_SPARSEMEM_ENABLE !! 2015 config SYS_HAS_CPU_BMIPS4380
1622 def_bool y !! 2016 bool
1623 depends on X86_64 || NUMA || X86_32 | !! 2017 select SYS_HAS_CPU_BMIPS
1624 select SPARSEMEM_STATIC if X86_32 <<
1625 select SPARSEMEM_VMEMMAP_ENABLE if X8 <<
1626 2018
1627 config ARCH_SPARSEMEM_DEFAULT !! 2019 config SYS_HAS_CPU_BMIPS5000
1628 def_bool X86_64 || (NUMA && X86_32) !! 2020 bool
>> 2021 select SYS_HAS_CPU_BMIPS
1629 2022
1630 config ARCH_SELECT_MEMORY_MODEL !! 2023 config SYS_HAS_CPU_XLR
1631 def_bool y !! 2024 bool
1632 depends on ARCH_SPARSEMEM_ENABLE && A <<
1633 2025
1634 config ARCH_MEMORY_PROBE !! 2026 config SYS_HAS_CPU_XLP
1635 bool "Enable sysfs memory/probe inter !! 2027 bool
1636 depends on MEMORY_HOTPLUG <<
1637 help <<
1638 This option enables a sysfs memory/ <<
1639 See Documentation/admin-guide/mm/me <<
1640 If you are unsure how to answer thi <<
1641 2028
1642 config ARCH_PROC_KCORE_TEXT !! 2029 #
1643 def_bool y !! 2030 # CPU may reorder R->R, R->W, W->R, W->W
1644 depends on X86_64 && PROC_KCORE !! 2031 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 2032 #
>> 2033 config WEAK_ORDERING
>> 2034 bool
1645 2035
1646 config ILLEGAL_POINTER_VALUE !! 2036 #
1647 hex !! 2037 # CPU may reorder reads and writes beyond LL/SC
1648 default 0 if X86_32 !! 2038 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1649 default 0xdead000000000000 if X86_64 !! 2039 #
1650 !! 2040 config WEAK_REORDERING_BEYOND_LLSC
1651 config X86_PMEM_LEGACY_DEVICE !! 2041 bool
1652 bool !! 2042 endmenu
1653 <<
1654 config X86_PMEM_LEGACY <<
1655 tristate "Support non-standard NVDIMM <<
1656 depends on PHYS_ADDR_T_64BIT <<
1657 depends on BLK_DEV <<
1658 select X86_PMEM_LEGACY_DEVICE <<
1659 select NUMA_KEEP_MEMINFO if NUMA <<
1660 select LIBNVDIMM <<
1661 help <<
1662 Treat memory marked using the non-s <<
1663 by the Intel Sandy Bridge-EP refere <<
1664 The kernel will offer these regions <<
1665 they can be used for persistent sto <<
1666 <<
1667 Say Y if unsure. <<
1668 <<
1669 config HIGHPTE <<
1670 bool "Allocate 3rd-level pagetables f <<
1671 depends on HIGHMEM <<
1672 help <<
1673 The VM uses one page table entry fo <<
1674 For systems with a lot of RAM, this <<
1675 low memory. Setting this option wi <<
1676 entries in high memory. <<
1677 <<
1678 config X86_CHECK_BIOS_CORRUPTION <<
1679 bool "Check for low memory corruption <<
1680 help <<
1681 Periodically check for memory corru <<
1682 is suspected to be caused by BIOS. <<
1683 configuration, it is disabled at ru <<
1684 setting "memory_corruption_check=1" <<
1685 line. By default it scans the low <<
1686 seconds; see the memory_corruption_ <<
1687 memory_corruption_check_period para <<
1688 Documentation/admin-guide/kernel-pa <<
1689 <<
1690 When enabled with the default param <<
1691 almost no overhead, as it reserves <<
1692 of memory and scans it infrequently <<
1693 and prevents it from affecting the <<
1694 <<
1695 It is, however, intended as a diagn <<
1696 BIOS-originated corruption always a <<
1697 you can use memmap= to prevent the <<
1698 memory. <<
1699 <<
1700 config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK <<
1701 bool "Set the default setting of memo <<
1702 depends on X86_CHECK_BIOS_CORRUPTION <<
1703 default y <<
1704 help <<
1705 Set whether the default state of me <<
1706 on or off. <<
1707 <<
1708 config MATH_EMULATION <<
1709 bool <<
1710 depends on MODIFY_LDT_SYSCALL <<
1711 prompt "Math emulation" if X86_32 && <<
1712 help <<
1713 Linux can emulate a math coprocesso <<
1714 operations) if you don't have one. <<
1715 a math coprocessor built in, 486SX <<
1716 a 487DX or 387, respectively. (The <<
1717 give you some hints here ["man dmes <<
1718 coprocessor or this emulation. <<
1719 <<
1720 If you don't have a math coprocesso <<
1721 say Y here even though you have a c <<
1722 be used nevertheless. (This behavio <<
1723 command line option "no387", which <<
1724 is broken. Try "man bootparam" or s <<
1725 loader (lilo or loadlin) about how <<
1726 boot time.) This means that it is a <<
1727 intend to use this kernel on differ <<
1728 2043
1729 More information about the internal !! 2044 #
1730 emulation can be found in <file:arc !! 2045 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2046 #
>> 2047 config CPU_MIPS32
>> 2048 bool
>> 2049 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
1731 2050
1732 If you are not sure, say Y; apart f !! 2051 config CPU_MIPS64
1733 kernel, it won't hurt. !! 2052 bool
>> 2053 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
1734 2054
1735 config MTRR !! 2055 #
1736 def_bool y !! 2056 # These indicate the revision of the architecture
1737 prompt "MTRR (Memory Type Range Regis !! 2057 #
1738 help !! 2058 config CPU_MIPSR1
1739 On Intel P6 family processors (Pent !! 2059 bool
1740 the Memory Type Range Registers (MT !! 2060 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1741 processor access to memory ranges. <<
1742 a video (VGA) card on a PCI or AGP <<
1743 allows bus write transfers to be co <<
1744 before bursting over the PCI/AGP bu <<
1745 of image write operations 2.5 times <<
1746 /proc/mtrr file which may be used t <<
1747 MTRRs. Typically the X server shoul <<
1748 <<
1749 This code has a reasonably generic <<
1750 control registers on other processo <<
1751 as well: <<
1752 <<
1753 The Cyrix 6x86, 6x86MX and M II pro <<
1754 Registers (ARRs) which provide a si <<
1755 these, the ARRs are used to emulate <<
1756 The AMD K6-2 (stepping 8 and above) <<
1757 MTRRs. The Centaur C6 (WinChip) has <<
1758 write-combining. All of these proce <<
1759 and it makes sense to say Y here if <<
1760 <<
1761 Saying Y here also fixes a problem <<
1762 set the MTRRs for the boot CPU and <<
1763 can lead to all sorts of problems, <<
1764 2061
1765 You can safely say Y even if your m !! 2062 config CPU_MIPSR2
1766 just add about 9 KB to your kernel. !! 2063 bool
>> 2064 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2065 select CPU_HAS_RIXI
>> 2066 select MIPS_SPRAM
1767 2067
1768 See <file:Documentation/arch/x86/mt !! 2068 config CPU_MIPSR6
>> 2069 bool
>> 2070 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2071 select CPU_HAS_RIXI
>> 2072 select HAVE_ARCH_BITREVERSE
>> 2073 select MIPS_ASID_BITS_VARIABLE
>> 2074 select MIPS_CRC_SUPPORT
>> 2075 select MIPS_SPRAM
1769 2076
1770 config MTRR_SANITIZER !! 2077 config TARGET_ISA_REV
1771 def_bool y !! 2078 int
1772 prompt "MTRR cleanup support" !! 2079 default 1 if CPU_MIPSR1
1773 depends on MTRR !! 2080 default 2 if CPU_MIPSR2
>> 2081 default 6 if CPU_MIPSR6
>> 2082 default 0
1774 help 2083 help
1775 Convert MTRR layout from continuous !! 2084 Reflects the ISA revision being targeted by the kernel build. This
1776 add writeback entries. !! 2085 is effectively the Kconfig equivalent of MIPS_ISA_REV.
1777 <<
1778 Can be disabled with disable_mtrr_c <<
1779 The largest mtrr entry size for a c <<
1780 mtrr_chunk_size. <<
1781 <<
1782 If unsure, say Y. <<
1783 2086
1784 config MTRR_SANITIZER_ENABLE_DEFAULT !! 2087 config EVA
1785 int "MTRR cleanup enable value (0-1)" !! 2088 bool
1786 range 0 1 <<
1787 default "0" <<
1788 depends on MTRR_SANITIZER <<
1789 help <<
1790 Enable mtrr cleanup default value <<
1791 <<
1792 config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT <<
1793 int "MTRR cleanup spare reg num (0-7) <<
1794 range 0 7 <<
1795 default "1" <<
1796 depends on MTRR_SANITIZER <<
1797 help <<
1798 mtrr cleanup spare entries default, <<
1799 mtrr_spare_reg_nr=N on the kernel c <<
1800 2089
1801 config X86_PAT !! 2090 config XPA
1802 def_bool y !! 2091 bool
1803 prompt "x86 PAT support" if EXPERT <<
1804 depends on MTRR <<
1805 select ARCH_USES_PG_ARCH_2 <<
1806 help <<
1807 Use PAT attributes to setup page le <<
1808 2092
1809 PATs are the modern equivalents of !! 2093 config SYS_SUPPORTS_32BIT_KERNEL
1810 flexible than MTRRs. !! 2094 bool
>> 2095 config SYS_SUPPORTS_64BIT_KERNEL
>> 2096 bool
>> 2097 config CPU_SUPPORTS_32BIT_KERNEL
>> 2098 bool
>> 2099 config CPU_SUPPORTS_64BIT_KERNEL
>> 2100 bool
>> 2101 config CPU_SUPPORTS_CPUFREQ
>> 2102 bool
>> 2103 config CPU_SUPPORTS_ADDRWINCFG
>> 2104 bool
>> 2105 config CPU_SUPPORTS_HUGEPAGES
>> 2106 bool
>> 2107 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2108 bool
>> 2109 config MIPS_PGD_C0_CONTEXT
>> 2110 bool
>> 2111 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
1811 2112
1812 Say N here if you see bootup proble !! 2113 #
1813 spontaneous reboots) or a non-worki !! 2114 # Set to y for ptrace access to watch registers.
>> 2115 #
>> 2116 config HARDWARE_WATCHPOINTS
>> 2117 bool
>> 2118 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
1814 2119
1815 If unsure, say Y. !! 2120 menu "Kernel type"
1816 2121
1817 config X86_UMIP !! 2122 choice
1818 def_bool y !! 2123 prompt "Kernel code model"
1819 prompt "User Mode Instruction Prevent <<
1820 help 2124 help
1821 User Mode Instruction Prevention (U !! 2125 You should only select this option if you have a workload that
1822 some x86 processors. If enabled, a !! 2126 actually benefits from 64-bit processing or if your machine has
1823 issued if the SGDT, SLDT, SIDT, SMS !! 2127 large memory. You will only be presented a single option in this
1824 executed in user mode. These instru !! 2128 menu if your system does not support both 32-bit and 64-bit kernels.
1825 information about the hardware stat !! 2129
1826 !! 2130 config 32BIT
1827 The vast majority of applications d !! 2131 bool "32-bit kernel"
1828 For the very few that do, software !! 2132 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
1829 specific cases in protected and vir !! 2133 select TRAD_SIGNALS
1830 results are dummy. <<
1831 <<
1832 config CC_HAS_IBT <<
1833 # GCC >= 9 and binutils >= 2.29 <<
1834 # Retpoline check to work around http <<
1835 # Clang/LLVM >= 14 <<
1836 # https://github.com/llvm/llvm-projec <<
1837 # https://github.com/llvm/llvm-projec <<
1838 def_bool ((CC_IS_GCC && $(cc-option, <<
1839 (CC_IS_CLANG && CLANG_VERSI <<
1840 $(as-instr,endbr64) <<
1841 <<
1842 config X86_CET <<
1843 def_bool n <<
1844 help 2134 help
1845 CET features configured (Shadow sta !! 2135 Select this option if you want to build a 32-bit kernel.
1846 <<
1847 config X86_KERNEL_IBT <<
1848 prompt "Indirect Branch Tracking" <<
1849 def_bool y <<
1850 depends on X86_64 && CC_HAS_IBT && HA <<
1851 # https://github.com/llvm/llvm-projec <<
1852 depends on !LD_IS_LLD || LLD_VERSION <<
1853 select OBJTOOL <<
1854 select X86_CET <<
1855 help <<
1856 Build the kernel with support for I <<
1857 hardware support course-grain forwa <<
1858 protection. It enforces that all in <<
1859 an ENDBR instruction, as such, the <<
1860 code with them to make this happen. <<
1861 <<
1862 In addition to building the kernel <<
1863 are not indirect call targets, avoi <<
1864 <<
1865 This requires LTO like objtool runs <<
1866 does significantly reduce the numbe <<
1867 kernel image. <<
1868 2136
1869 config X86_INTEL_MEMORY_PROTECTION_KEYS !! 2137 config 64BIT
1870 prompt "Memory Protection Keys" !! 2138 bool "64-bit kernel"
1871 def_bool y !! 2139 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
1872 # Note: only available in 64-bit mode !! 2140 help
1873 depends on X86_64 && (CPU_SUP_INTEL | !! 2141 Select this option if you want to build a 64-bit kernel.
1874 select ARCH_USES_HIGH_VMA_FLAGS <<
1875 select ARCH_HAS_PKEYS <<
1876 help <<
1877 Memory Protection Keys provides a m <<
1878 page-based protections, but without <<
1879 page tables when an application cha <<
1880 <<
1881 For details, see Documentation/core <<
1882 <<
1883 If unsure, say y. <<
1884 2142
1885 config ARCH_PKEY_BITS !! 2143 endchoice
1886 int <<
1887 default 4 <<
1888 2144
1889 choice !! 2145 config KVM_GUEST
1890 prompt "TSX enable mode" !! 2146 bool "KVM Guest Kernel"
1891 depends on CPU_SUP_INTEL !! 2147 depends on BROKEN_ON_SMP
1892 default X86_INTEL_TSX_MODE_OFF <<
1893 help 2148 help
1894 Intel's TSX (Transactional Synchron !! 2149 Select this option if building a guest kernel for KVM (Trap & Emulate)
1895 allows to optimize locking protocol !! 2150 mode.
1896 can lead to a noticeable performanc <<
1897 <<
1898 On the other hand it has been shown <<
1899 to form side channel attacks (e.g. <<
1900 will be more of those attacks disco <<
1901 2151
1902 Therefore TSX is not enabled by def !! 2152 config KVM_GUEST_TIMER_FREQ
1903 might override this decision by tsx !! 2153 int "Count/Compare Timer Frequency (MHz)"
1904 Even with TSX enabled, the kernel w !! 2154 depends on KVM_GUEST
1905 possible TAA mitigation setting dep !! 2155 default 100
1906 for the particular machine. !! 2156 help
>> 2157 Set this to non-zero if building a guest kernel for KVM to skip RTC
>> 2158 emulation when determining guest CPU Frequency. Instead, the guest's
>> 2159 timer frequency is specified directly.
1907 2160
1908 This option allows to set the defau !! 2161 config MIPS_VA_BITS_48
1909 and =auto. See Documentation/admin- !! 2162 bool "48 bits virtual memory"
1910 details. !! 2163 depends on 64BIT
>> 2164 help
>> 2165 Support a maximum at least 48 bits of application virtual
>> 2166 memory. Default is 40 bits or less, depending on the CPU.
>> 2167 For page sizes 16k and above, this option results in a small
>> 2168 memory overhead for page tables. For 4k page size, a fourth
>> 2169 level of page tables is added which imposes both a memory
>> 2170 overhead as well as slower TLB fault handling.
1911 2171
1912 Say off if not sure, auto if TSX is !! 2172 If unsure, say N.
1913 platforms or on if TSX is in use an <<
1914 relevant. <<
1915 2173
1916 config X86_INTEL_TSX_MODE_OFF !! 2174 choice
1917 bool "off" !! 2175 prompt "Kernel page size"
1918 help !! 2176 default PAGE_SIZE_4KB
1919 TSX is disabled if possible - equal <<
1920 2177
1921 config X86_INTEL_TSX_MODE_ON !! 2178 config PAGE_SIZE_4KB
1922 bool "on" !! 2179 bool "4kB"
1923 help !! 2180 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
1924 TSX is always enabled on TSX capabl !! 2181 help
1925 line parameter. !! 2182 This option select the standard 4kB Linux page size. On some
>> 2183 R3000-family processors this is the only available page size. Using
>> 2184 4kB page size will minimize memory consumption and is therefore
>> 2185 recommended for low memory systems.
>> 2186
>> 2187 config PAGE_SIZE_8KB
>> 2188 bool "8kB"
>> 2189 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
>> 2190 depends on !MIPS_VA_BITS_48
>> 2191 help
>> 2192 Using 8kB page size will result in higher performance kernel at
>> 2193 the price of higher memory consumption. This option is available
>> 2194 only on R8000 and cnMIPS processors. Note that you will need a
>> 2195 suitable Linux distribution to support this.
>> 2196
>> 2197 config PAGE_SIZE_16KB
>> 2198 bool "16kB"
>> 2199 depends on !CPU_R3000 && !CPU_TX39XX
>> 2200 help
>> 2201 Using 16kB page size will result in higher performance kernel at
>> 2202 the price of higher memory consumption. This option is available on
>> 2203 all non-R3000 family processors. Note that you will need a suitable
>> 2204 Linux distribution to support this.
>> 2205
>> 2206 config PAGE_SIZE_32KB
>> 2207 bool "32kB"
>> 2208 depends on CPU_CAVIUM_OCTEON
>> 2209 depends on !MIPS_VA_BITS_48
>> 2210 help
>> 2211 Using 32kB page size will result in higher performance kernel at
>> 2212 the price of higher memory consumption. This option is available
>> 2213 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2214 distribution to support this.
>> 2215
>> 2216 config PAGE_SIZE_64KB
>> 2217 bool "64kB"
>> 2218 depends on !CPU_R3000 && !CPU_TX39XX
>> 2219 help
>> 2220 Using 64kB page size will result in higher performance kernel at
>> 2221 the price of higher memory consumption. This option is available on
>> 2222 all non-R3000 family processor. Not that at the time of this
>> 2223 writing this option is still high experimental.
1926 2224
1927 config X86_INTEL_TSX_MODE_AUTO <<
1928 bool "auto" <<
1929 help <<
1930 TSX is enabled on TSX capable HW th <<
1931 side channel attacks- equals the ts <<
1932 endchoice 2225 endchoice
1933 2226
1934 config X86_SGX !! 2227 config FORCE_MAX_ZONEORDER
1935 bool "Software Guard eXtensions (SGX) !! 2228 int "Maximum zone order"
1936 depends on X86_64 && CPU_SUP_INTEL && !! 2229 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
1937 depends on CRYPTO=y !! 2230 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
1938 depends on CRYPTO_SHA256=y !! 2231 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
1939 select MMU_NOTIFIER !! 2232 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
1940 select NUMA_KEEP_MEMINFO if NUMA !! 2233 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
1941 select XARRAY_MULTI !! 2234 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
1942 help !! 2235 range 11 64
1943 Intel(R) Software Guard eXtensions !! 2236 default "11"
1944 that can be used by applications to !! 2237 help
1945 and data, referred to as enclaves. !! 2238 The kernel memory allocator divides physically contiguous memory
1946 only be accessed by code running wi !! 2239 blocks into "zones", where each zone is a power of two number of
1947 outside the enclave, including othe !! 2240 pages. This option selects the largest power of two that the kernel
1948 hardware. !! 2241 keeps in the memory allocator. If you need to allocate very large
>> 2242 blocks of physically contiguous memory, then you may need to
>> 2243 increase this value.
1949 2244
1950 If unsure, say N. !! 2245 This config option is actually maximum order plus one. For example,
>> 2246 a value of 11 means that the largest free memory block is 2^10 pages.
1951 2247
1952 config X86_USER_SHADOW_STACK !! 2248 The page size is not necessarily 4KB. Keep this in mind
1953 bool "X86 userspace shadow stack" !! 2249 when choosing a value for this option.
1954 depends on AS_WRUSS <<
1955 depends on X86_64 <<
1956 select ARCH_USES_HIGH_VMA_FLAGS <<
1957 select X86_CET <<
1958 help <<
1959 Shadow stack protection is a hardwa <<
1960 return address corruption. This he <<
1961 Applications must be enabled to use <<
1962 get protection "for free". <<
1963 2250
1964 CPUs supporting shadow stacks were !! 2251 config BOARD_SCACHE
>> 2252 bool
1965 2253
1966 See Documentation/arch/x86/shstk.rs !! 2254 config IP22_CPU_SCACHE
>> 2255 bool
>> 2256 select BOARD_SCACHE
1967 2257
1968 If unsure, say N. !! 2258 #
>> 2259 # Support for a MIPS32 / MIPS64 style S-caches
>> 2260 #
>> 2261 config MIPS_CPU_SCACHE
>> 2262 bool
>> 2263 select BOARD_SCACHE
1969 2264
1970 config INTEL_TDX_HOST !! 2265 config R5000_CPU_SCACHE
1971 bool "Intel Trust Domain Extensions ( !! 2266 bool
1972 depends on CPU_SUP_INTEL !! 2267 select BOARD_SCACHE
1973 depends on X86_64 <<
1974 depends on KVM_INTEL <<
1975 depends on X86_X2APIC <<
1976 select ARCH_KEEP_MEMBLOCK <<
1977 depends on CONTIG_ALLOC <<
1978 depends on !KEXEC_CORE <<
1979 depends on X86_MCE <<
1980 help <<
1981 Intel Trust Domain Extensions (TDX) <<
1982 host and certain physical attacks. <<
1983 support in the host kernel to run c <<
1984 2268
1985 If unsure, say N. !! 2269 config RM7000_CPU_SCACHE
>> 2270 bool
>> 2271 select BOARD_SCACHE
1986 2272
1987 config EFI !! 2273 config SIBYTE_DMA_PAGEOPS
1988 bool "EFI runtime service support" !! 2274 bool "Use DMA to clear/copy pages"
1989 depends on ACPI !! 2275 depends on CPU_SB1
1990 select UCS2_STRING <<
1991 select EFI_RUNTIME_WRAPPERS <<
1992 select ARCH_USE_MEMREMAP_PROT <<
1993 select EFI_RUNTIME_MAP if KEXEC_CORE <<
1994 help <<
1995 This enables the kernel to use EFI <<
1996 available (such as the EFI variable <<
1997 <<
1998 This option is only useful on syste <<
1999 In addition, you should use the lat <<
2000 at <http://elilo.sourceforge.net> i <<
2001 of EFI runtime services. However, e <<
2002 resultant kernel should continue to <<
2003 platforms. <<
2004 <<
2005 config EFI_STUB <<
2006 bool "EFI stub support" <<
2007 depends on EFI <<
2008 select RELOCATABLE <<
2009 help <<
2010 This kernel feature allows a bzImag <<
2011 by EFI firmware without the use of <<
2012 <<
2013 See Documentation/admin-guide/efi-s <<
2014 <<
2015 config EFI_HANDOVER_PROTOCOL <<
2016 bool "EFI handover protocol (DEPRECAT <<
2017 depends on EFI_STUB <<
2018 default y <<
2019 help <<
2020 Select this in order to include sup <<
2021 handover protocol, which defines al <<
2022 EFI stub. This is a practice that <<
2023 specification, and requires a prior <<
2024 bootloader about Linux/x86 specific <<
2025 and initrd, and where in memory tho <<
2026 <<
2027 If in doubt, say Y. Even though the <<
2028 present in upstream GRUB or other b <<
2029 GRUB with numerous downstream patch <<
2030 handover protocol as as result. <<
2031 <<
2032 config EFI_MIXED <<
2033 bool "EFI mixed-mode support" <<
2034 depends on EFI_STUB && X86_64 <<
2035 help 2276 help
2036 Enabling this feature allows a 64-b !! 2277 Instead of using the CPU to zero and copy pages, use a Data Mover
2037 on a 32-bit firmware, provided that !! 2278 channel. These DMA channels are otherwise unused by the standard
2038 mode. !! 2279 SiByte Linux port. Seems to give a small performance benefit.
2039 2280
2040 Note that it is not possible to boo !! 2281 config CPU_HAS_PREFETCH
2041 kernel via the EFI boot stub - a bo !! 2282 bool
2042 the EFI handover protocol must be u <<
2043 2283
2044 If unsure, say N. !! 2284 config CPU_GENERIC_DUMP_TLB
>> 2285 bool
>> 2286 default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX)
2045 2287
2046 config EFI_RUNTIME_MAP !! 2288 config MIPS_FP_SUPPORT
2047 bool "Export EFI runtime maps to sysf !! 2289 bool "Floating Point support" if EXPERT
2048 depends on EFI !! 2290 default y
2049 help 2291 help
2050 Export EFI runtime memory regions t !! 2292 Select y to include support for floating point in the kernel
2051 That memory map is required by the !! 2293 including initialization of FPU hardware, FP context save & restore
2052 mappings after kexec, but can also !! 2294 and emulation of an FPU where necessary. Without this support any
>> 2295 userland program attempting to use floating point instructions will
>> 2296 receive a SIGILL.
2053 2297
2054 See also Documentation/ABI/testing/ !! 2298 If you know that your userland will not attempt to use floating point
>> 2299 instructions then you can say n here to shrink the kernel a little.
2055 2300
2056 source "kernel/Kconfig.hz" !! 2301 If unsure, say y.
2057 2302
2058 config ARCH_SUPPORTS_KEXEC !! 2303 config CPU_R2300_FPU
2059 def_bool y !! 2304 bool
>> 2305 depends on MIPS_FP_SUPPORT
>> 2306 default y if CPU_R3000 || CPU_TX39XX
2060 2307
2061 config ARCH_SUPPORTS_KEXEC_FILE !! 2308 config CPU_R4K_FPU
2062 def_bool X86_64 !! 2309 bool
>> 2310 depends on MIPS_FP_SUPPORT
>> 2311 default y if !CPU_R2300_FPU
2063 2312
2064 config ARCH_SELECTS_KEXEC_FILE !! 2313 config CPU_R4K_CACHE_TLB
2065 def_bool y !! 2314 bool
2066 depends on KEXEC_FILE !! 2315 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
2067 select HAVE_IMA_KEXEC if IMA <<
2068 2316
2069 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2317 config MIPS_MT_SMP
2070 def_bool y !! 2318 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2319 default y
>> 2320 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2321 select CPU_MIPSR2_IRQ_VI
>> 2322 select CPU_MIPSR2_IRQ_EI
>> 2323 select SYNC_R4K
>> 2324 select MIPS_MT
>> 2325 select SMP
>> 2326 select SMP_UP
>> 2327 select SYS_SUPPORTS_SMP
>> 2328 select SYS_SUPPORTS_SCHED_SMT
>> 2329 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2330 help
>> 2331 This is a kernel model which is known as SMVP. This is supported
>> 2332 on cores with the MT ASE and uses the available VPEs to implement
>> 2333 virtual processors which supports SMP. This is equivalent to the
>> 2334 Intel Hyperthreading feature. For further information go to
>> 2335 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2071 2336
2072 config ARCH_SUPPORTS_KEXEC_SIG !! 2337 config MIPS_MT
2073 def_bool y !! 2338 bool
2074 2339
2075 config ARCH_SUPPORTS_KEXEC_SIG_FORCE !! 2340 config SCHED_SMT
2076 def_bool y !! 2341 bool "SMT (multithreading) scheduler support"
>> 2342 depends on SYS_SUPPORTS_SCHED_SMT
>> 2343 default n
>> 2344 help
>> 2345 SMT scheduler support improves the CPU scheduler's decision making
>> 2346 when dealing with MIPS MT enabled cores at a cost of slightly
>> 2347 increased overhead in some places. If unsure say N here.
2077 2348
2078 config ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG !! 2349 config SYS_SUPPORTS_SCHED_SMT
2079 def_bool y !! 2350 bool
2080 2351
2081 config ARCH_SUPPORTS_KEXEC_JUMP !! 2352 config SYS_SUPPORTS_MULTITHREADING
2082 def_bool y !! 2353 bool
2083 2354
2084 config ARCH_SUPPORTS_CRASH_DUMP !! 2355 config MIPS_MT_FPAFF
2085 def_bool X86_64 || (X86_32 && HIGHMEM !! 2356 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2357 default y
>> 2358 depends on MIPS_MT_SMP
2086 2359
2087 config ARCH_SUPPORTS_CRASH_HOTPLUG !! 2360 config MIPSR2_TO_R6_EMULATOR
2088 def_bool y !! 2361 bool "MIPS R2-to-R6 emulator"
>> 2362 depends on CPU_MIPSR6
>> 2363 depends on MIPS_FP_SUPPORT
>> 2364 default y
>> 2365 help
>> 2366 Choose this option if you want to run non-R6 MIPS userland code.
>> 2367 Even if you say 'Y' here, the emulator will still be disabled by
>> 2368 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2369 The only reason this is a build-time option is to save ~14K from the
>> 2370 final kernel image.
2089 2371
2090 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATI !! 2372 config SYS_SUPPORTS_VPE_LOADER
2091 def_bool CRASH_RESERVE !! 2373 bool
>> 2374 depends on SYS_SUPPORTS_MULTITHREADING
>> 2375 help
>> 2376 Indicates that the platform supports the VPE loader, and provides
>> 2377 physical_memsize.
2092 2378
2093 config PHYSICAL_START !! 2379 config MIPS_VPE_LOADER
2094 hex "Physical address where the kerne !! 2380 bool "VPE loader support."
2095 default "0x1000000" !! 2381 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2382 select CPU_MIPSR2_IRQ_VI
>> 2383 select CPU_MIPSR2_IRQ_EI
>> 2384 select MIPS_MT
2096 help 2385 help
2097 This gives the physical address whe !! 2386 Includes a loader for loading an elf relocatable object
>> 2387 onto another VPE and running it.
2098 2388
2099 If the kernel is not relocatable (C !! 2389 config MIPS_VPE_LOADER_CMP
2100 will decompress itself to above phy !! 2390 bool
2101 Otherwise, bzImage will run from th !! 2391 default "y"
2102 by the boot loader. The only except !! 2392 depends on MIPS_VPE_LOADER && MIPS_CMP
2103 above physical address, in which ca <<
2104 <<
2105 In normal kdump cases one does not <<
2106 as now bzImage can be compiled as a <<
2107 (CONFIG_RELOCATABLE=y) and be used <<
2108 address. This option is mainly usef <<
2109 to use a bzImage for capturing the <<
2110 vmlinux instead. vmlinux is not rel <<
2111 to be specifically compiled to run <<
2112 (normally a reserved region) and th <<
2113 <<
2114 So if you are using bzImage for cap <<
2115 leave the value here unchanged to 0 <<
2116 CONFIG_RELOCATABLE=y. Otherwise if <<
2117 for capturing the crash dump change <<
2118 the reserved region. In other word <<
2119 the "X" value as specified in the " <<
2120 command line boot parameter passed <<
2121 kernel. Please take a look at Docum <<
2122 for more details about crash dumps. <<
2123 <<
2124 Usage of bzImage for capturing the <<
2125 one does not have to build two kern <<
2126 as production kernel and capture ke <<
2127 gone away after relocatable bzImage <<
2128 is present because there are users <<
2129 vmlinux for dump capture. This opti <<
2130 line. <<
2131 2393
2132 Don't change this unless you know w !! 2394 config MIPS_VPE_LOADER_MT
>> 2395 bool
>> 2396 default "y"
>> 2397 depends on MIPS_VPE_LOADER && !MIPS_CMP
2133 2398
2134 config RELOCATABLE !! 2399 config MIPS_VPE_LOADER_TOM
2135 bool "Build a relocatable kernel" !! 2400 bool "Load VPE program into memory hidden from linux"
>> 2401 depends on MIPS_VPE_LOADER
2136 default y 2402 default y
2137 help 2403 help
2138 This builds a kernel image that ret !! 2404 The loader can use memory that is present but has been hidden from
2139 so it can be loaded someplace besid !! 2405 Linux using the kernel command line option "mem=xxMB". It's up to
2140 The relocations tend to make the ke !! 2406 you to ensure the amount you put in the option and the space your
2141 but are discarded at runtime. !! 2407 program requires is less or equal to the amount physically present.
2142 2408
2143 One use is for the kexec on panic c !! 2409 config MIPS_VPE_APSP_API
2144 must live at a different physical a !! 2410 bool "Enable support for AP/SP API (RTLX)"
2145 kernel. !! 2411 depends on MIPS_VPE_LOADER
2146 <<
2147 Note: If CONFIG_RELOCATABLE=y, then <<
2148 it has been loaded at and the compi <<
2149 (CONFIG_PHYSICAL_START) is used as <<
2150 2412
2151 config RANDOMIZE_BASE !! 2413 config MIPS_VPE_APSP_API_CMP
2152 bool "Randomize the address of the ke !! 2414 bool
2153 depends on RELOCATABLE !! 2415 default "y"
2154 default y !! 2416 depends on MIPS_VPE_APSP_API && MIPS_CMP
2155 help <<
2156 In support of Kernel Address Space <<
2157 this randomizes the physical addres <<
2158 is decompressed and the virtual add <<
2159 image is mapped, as a security feat <<
2160 attempts relying on knowledge of th <<
2161 code internals. <<
2162 <<
2163 On 64-bit, the kernel physical and <<
2164 randomized separately. The physical <<
2165 between 16MB and the top of physica <<
2166 virtual address will be randomized <<
2167 of entropy). Note that this also re <<
2168 available to kernel modules from 1. <<
2169 <<
2170 On 32-bit, the kernel physical and <<
2171 randomized together. They will be r <<
2172 512MB (8 bits of entropy). <<
2173 <<
2174 Entropy is generated using the RDRA <<
2175 supported. If RDTSC is supported, i <<
2176 the entropy pool as well. If neithe <<
2177 supported, then entropy is read fro <<
2178 usable entropy is limited by the ke <<
2179 2GB addressing, and that PHYSICAL_A <<
2180 minimum of 2MB. As a result, only 1 <<
2181 theoretically possible, but the imp <<
2182 limited due to memory layouts. <<
2183 <<
2184 If unsure, say Y. <<
2185 2417
2186 # Relocation on x86 needs some additional bui !! 2418 config MIPS_VPE_APSP_API_MT
2187 config X86_NEED_RELOCS !! 2419 bool
2188 def_bool y !! 2420 default "y"
2189 depends on RANDOMIZE_BASE || (X86_32 !! 2421 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2190 2422
2191 config PHYSICAL_ALIGN !! 2423 config MIPS_CMP
2192 hex "Alignment value to which kernel !! 2424 bool "MIPS CMP framework support (DEPRECATED)"
2193 default "0x200000" !! 2425 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2194 range 0x2000 0x1000000 if X86_32 !! 2426 select SMP
2195 range 0x200000 0x1000000 if X86_64 !! 2427 select SYNC_R4K
>> 2428 select SYS_SUPPORTS_SMP
>> 2429 select WEAK_ORDERING
>> 2430 default n
2196 help 2431 help
2197 This value puts the alignment restr !! 2432 Select this if you are using a bootloader which implements the "CMP
2198 where kernel is loaded and run from !! 2433 framework" protocol (ie. YAMON) and want your kernel to make use of
2199 address which meets above alignment !! 2434 its ability to start secondary CPUs.
>> 2435
>> 2436 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2437 instead of this.
>> 2438
>> 2439 config MIPS_CPS
>> 2440 bool "MIPS Coherent Processing System support"
>> 2441 depends on SYS_SUPPORTS_MIPS_CPS
>> 2442 select MIPS_CM
>> 2443 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2444 select SMP
>> 2445 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2446 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2447 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2448 select SYS_SUPPORTS_SMP
>> 2449 select WEAK_ORDERING
>> 2450 help
>> 2451 Select this if you wish to run an SMP kernel across multiple cores
>> 2452 within a MIPS Coherent Processing System. When this option is
>> 2453 enabled the kernel will probe for other cores and boot them with
>> 2454 no external assistance. It is safe to enable this when hardware
>> 2455 support is unavailable.
2200 2456
2201 If bootloader loads the kernel at a !! 2457 config MIPS_CPS_PM
2202 CONFIG_RELOCATABLE is set, kernel w !! 2458 depends on MIPS_CPS
2203 address aligned to above value and !! 2459 bool
2204 2460
2205 If bootloader loads the kernel at a !! 2461 config MIPS_CM
2206 CONFIG_RELOCATABLE is not set, kern !! 2462 bool
2207 load address and decompress itself !! 2463 select MIPS_CPC
2208 compiled for and run from there. Th <<
2209 compiled already meets above alignm <<
2210 end result is that kernel runs from <<
2211 above alignment restrictions. <<
2212 2464
2213 On 32-bit this value must be a mult !! 2465 config MIPS_CPC
2214 this value must be a multiple of 0x !! 2466 bool
2215 2467
2216 Don't change this unless you know w !! 2468 config SB1_PASS_2_WORKAROUNDS
>> 2469 bool
>> 2470 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2471 default y
2217 2472
2218 config DYNAMIC_MEMORY_LAYOUT !! 2473 config SB1_PASS_2_1_WORKAROUNDS
2219 bool 2474 bool
>> 2475 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2476 default y
>> 2477
>> 2478
>> 2479 choice
>> 2480 prompt "SmartMIPS or microMIPS ASE support"
>> 2481
>> 2482 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2483 bool "None"
2220 help 2484 help
2221 This option makes base addresses of !! 2485 Select this if you want neither microMIPS nor SmartMIPS support
2222 __PAGE_OFFSET movable during boot. <<
2223 2486
2224 config RANDOMIZE_MEMORY !! 2487 config CPU_HAS_SMARTMIPS
2225 bool "Randomize the kernel memory sec !! 2488 depends on SYS_SUPPORTS_SMARTMIPS
2226 depends on X86_64 !! 2489 bool "SmartMIPS"
2227 depends on RANDOMIZE_BASE !! 2490 help
2228 select DYNAMIC_MEMORY_LAYOUT !! 2491 SmartMIPS is a extension of the MIPS32 architecture aimed at
2229 default RANDOMIZE_BASE !! 2492 increased security at both hardware and software level for
>> 2493 smartcards. Enabling this option will allow proper use of the
>> 2494 SmartMIPS instructions by Linux applications. However a kernel with
>> 2495 this option will not work on a MIPS core without SmartMIPS core. If
>> 2496 you don't know you probably don't have SmartMIPS and should say N
>> 2497 here.
>> 2498
>> 2499 config CPU_MICROMIPS
>> 2500 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2501 bool "microMIPS"
2230 help 2502 help
2231 Randomizes the base virtual address !! 2503 When this option is enabled the kernel will be built using the
2232 (physical memory mapping, vmalloc & !! 2504 microMIPS ISA
2233 makes exploits relying on predictab <<
2234 <<
2235 The order of allocations remains un <<
2236 the same way as RANDOMIZE_BASE. Cur <<
2237 configuration have in average 30,00 <<
2238 addresses for each memory section. <<
2239 2505
2240 If unsure, say Y. !! 2506 endchoice
2241 2507
2242 config RANDOMIZE_MEMORY_PHYSICAL_PADDING !! 2508 config CPU_HAS_MSA
2243 hex "Physical memory mapping padding" !! 2509 bool "Support for the MIPS SIMD Architecture"
2244 depends on RANDOMIZE_MEMORY !! 2510 depends on CPU_SUPPORTS_MSA
2245 default "0xa" if MEMORY_HOTPLUG !! 2511 depends on MIPS_FP_SUPPORT
2246 default "0x0" !! 2512 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2247 range 0x1 0x40 if MEMORY_HOTPLUG !! 2513 help
2248 range 0x0 0x40 !! 2514 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2249 help !! 2515 and a set of SIMD instructions to operate on them. When this option
2250 Define the padding in terabytes add !! 2516 is enabled the kernel will support allocating & switching MSA
2251 memory size during kernel memory ra !! 2517 vector register contexts. If you know that your kernel will only be
2252 for memory hotplug support but redu !! 2518 running on CPUs which do not support MSA or that your userland will
2253 address randomization. !! 2519 not be making use of it then you may wish to say N here to reduce
>> 2520 the size & complexity of your kernel.
2254 2521
2255 If unsure, leave at the default val !! 2522 If unsure, say Y.
2256 2523
2257 config ADDRESS_MASKING !! 2524 config CPU_HAS_WB
2258 bool "Linear Address Masking support" !! 2525 bool
2259 depends on X86_64 <<
2260 depends on COMPILE_TEST || !CPU_MITIG <<
2261 help <<
2262 Linear Address Masking (LAM) modifi <<
2263 to 64-bit linear addresses, allowin <<
2264 untranslated address bits for metad <<
2265 2526
2266 The capability can be used for effi !! 2527 config XKS01
2267 implementation and for optimization !! 2528 bool
2268 2529
2269 config HOTPLUG_CPU !! 2530 config CPU_HAS_RIXI
2270 def_bool y !! 2531 bool
2271 depends on SMP <<
2272 2532
2273 config COMPAT_VDSO !! 2533 config CPU_HAS_LOAD_STORE_LR
2274 def_bool n !! 2534 bool
2275 prompt "Disable the 32-bit vDSO (need <<
2276 depends on COMPAT_32 <<
2277 help 2535 help
2278 Certain buggy versions of glibc wil !! 2536 CPU has support for unaligned load and store instructions:
2279 presented with a 32-bit vDSO that i !! 2537 LWL, LWR, SWL, SWR (Load/store word left/right).
2280 indicated in its segment table. !! 2538 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems).
2281 <<
2282 The bug was introduced by f866314b8 <<
2283 and fixed by 3b3ddb4f7db98ec9e912cc <<
2284 49ad572a70b8aeb91e57483a11dd1b77e31 <<
2285 the only released version with the <<
2286 contains a buggy "glibc 2.3.2". <<
2287 <<
2288 The symptom of the bug is that ever <<
2289 dl_main: Assertion `(void *) ph->p_ <<
2290 <<
2291 Saying Y here changes the default v <<
2292 option from 1 to 0, which turns off <<
2293 This works around the glibc bug but <<
2294 2539
2295 If unsure, say N: if you are compil !! 2540 #
2296 are unlikely to be using a buggy ve !! 2541 # Vectored interrupt mode is an R2 feature
>> 2542 #
>> 2543 config CPU_MIPSR2_IRQ_VI
>> 2544 bool
2297 2545
2298 choice !! 2546 #
2299 prompt "vsyscall table for legacy app !! 2547 # Extended interrupt mode is an R2 feature
2300 depends on X86_64 !! 2548 #
2301 default LEGACY_VSYSCALL_XONLY !! 2549 config CPU_MIPSR2_IRQ_EI
2302 help !! 2550 bool
2303 Legacy user code that does not know <<
2304 to be able to issue three syscalls <<
2305 kernel space. Since this location i <<
2306 it can be used to assist security v <<
2307 <<
2308 This setting can be changed at boot <<
2309 line parameter vsyscall=[emulate|xo <<
2310 is deprecated and can only be enabl <<
2311 line. <<
2312 <<
2313 On a system with recent enough glib <<
2314 static binaries, you can say None w <<
2315 to improve security. <<
2316 2551
2317 If unsure, select "Emulate executio !! 2552 config CPU_HAS_SYNC
>> 2553 bool
>> 2554 depends on !CPU_R3000
>> 2555 default y
2318 2556
2319 config LEGACY_VSYSCALL_XONLY !! 2557 #
2320 bool "Emulate execution only" !! 2558 # CPU non-features
2321 help !! 2559 #
2322 The kernel traps and emulat !! 2560 config CPU_DADDI_WORKAROUNDS
2323 address mapping and does no !! 2561 bool
2324 configuration is recommende <<
2325 legacy vsyscall area but su <<
2326 instrumentation of legacy c <<
2327 certain uses of the vsyscal <<
2328 buffer. <<
2329 2562
2330 config LEGACY_VSYSCALL_NONE !! 2563 config CPU_R4000_WORKAROUNDS
2331 bool "None" !! 2564 bool
2332 help !! 2565 select CPU_R4400_WORKAROUNDS
2333 There will be no vsyscall m <<
2334 eliminate any risk of ASLR <<
2335 fixed address mapping. Atte <<
2336 will be reported to dmesg, <<
2337 malicious userspace program <<
2338 2566
2339 endchoice !! 2567 config CPU_R4400_WORKAROUNDS
>> 2568 bool
2340 2569
2341 config CMDLINE_BOOL !! 2570 config MIPS_ASID_SHIFT
2342 bool "Built-in kernel command line" !! 2571 int
2343 help !! 2572 default 6 if CPU_R3000 || CPU_TX39XX
2344 Allow for specifying boot arguments !! 2573 default 4 if CPU_R8000
2345 build time. On some systems (e.g. !! 2574 default 0
2346 necessary or convenient to provide <<
2347 kernel boot arguments with the kern <<
2348 to not rely on the boot loader to p <<
2349 2575
2350 To compile command line arguments i !! 2576 config MIPS_ASID_BITS
2351 set this option to 'Y', then fill i !! 2577 int
2352 boot arguments in CONFIG_CMDLINE. !! 2578 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2579 default 6 if CPU_R3000 || CPU_TX39XX
>> 2580 default 8
2353 2581
2354 Systems with fully functional boot !! 2582 config MIPS_ASID_BITS_VARIABLE
2355 should leave this option set to 'N' !! 2583 bool
2356 2584
2357 config CMDLINE !! 2585 config MIPS_CRC_SUPPORT
2358 string "Built-in kernel command strin !! 2586 bool
2359 depends on CMDLINE_BOOL !! 2587
2360 default "" !! 2588 #
2361 help !! 2589 # - Highmem only makes sense for the 32-bit kernel.
2362 Enter arguments here that should be !! 2590 # - The current highmem code will only work properly on physically indexed
2363 image and used at boot time. If th !! 2591 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2364 command line at boot time, it is ap !! 2592 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2365 form the full kernel command line, !! 2593 # moment we protect the user and offer the highmem option only on machines
>> 2594 # where it's known to be safe. This will not offer highmem on a few systems
>> 2595 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2596 # indexed CPUs but we're playing safe.
>> 2597 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2598 # know they might have memory configurations that could make use of highmem
>> 2599 # support.
>> 2600 #
>> 2601 config HIGHMEM
>> 2602 bool "High Memory Support"
>> 2603 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2366 2604
2367 However, you can use the CONFIG_CMD !! 2605 config CPU_SUPPORTS_HIGHMEM
2368 change this behavior. !! 2606 bool
2369 2607
2370 In most cases, the command line (wh !! 2608 config SYS_SUPPORTS_HIGHMEM
2371 by the boot loader) should specify !! 2609 bool
2372 file system. <<
2373 2610
2374 config CMDLINE_OVERRIDE !! 2611 config SYS_SUPPORTS_SMARTMIPS
2375 bool "Built-in command line overrides !! 2612 bool
2376 depends on CMDLINE_BOOL && CMDLINE != <<
2377 help <<
2378 Set this option to 'Y' to have the <<
2379 command line, and use ONLY the buil <<
2380 2613
2381 This is used to work around broken !! 2614 config SYS_SUPPORTS_MICROMIPS
2382 be set to 'N' under normal conditio !! 2615 bool
2383 2616
2384 config MODIFY_LDT_SYSCALL !! 2617 config SYS_SUPPORTS_MIPS16
2385 bool "Enable the LDT (local descripto !! 2618 bool
2386 default y <<
2387 help 2619 help
2388 Linux can allow user programs to in !! 2620 This option must be set if a kernel might be executed on a MIPS16-
2389 Local Descriptor Table (LDT) using !! 2621 enabled CPU even if MIPS16 is not actually being used. In other
2390 call. This is required to run 16-b !! 2622 words, it makes the kernel MIPS16-tolerant.
2391 DOSEMU or some Wine programs. It i <<
2392 threading libraries. <<
2393 2623
2394 Enabling this feature adds a small !! 2624 config CPU_SUPPORTS_MSA
2395 context switches and increases the !! 2625 bool
2396 surface. Disabling it removes the <<
2397 2626
2398 Saying 'N' here may make sense for !! 2627 config ARCH_FLATMEM_ENABLE
>> 2628 def_bool y
>> 2629 depends on !NUMA && !CPU_LOONGSON2
2399 2630
2400 config STRICT_SIGALTSTACK_SIZE !! 2631 config ARCH_DISCONTIGMEM_ENABLE
2401 bool "Enforce strict size checking fo !! 2632 bool
2402 depends on DYNAMIC_SIGFRAME !! 2633 default y if SGI_IP27
2403 help 2634 help
2404 For historical reasons MINSIGSTKSZ !! 2635 Say Y to support efficient handling of discontiguous physical memory,
2405 already too small with AVX512 suppo !! 2636 for architectures which are either NUMA (Non-Uniform Memory Access)
2406 enforce strict checking of the siga !! 2637 or have huge holes in the physical address space for other reasons.
2407 real size of the FPU frame. This op !! 2638 See <file:Documentation/vm/numa.rst> for more.
2408 by default. It can also be controll <<
2409 line option 'strict_sas_size' indep <<
2410 switch. Enabling it might break exi <<
2411 allocate a too small sigaltstack bu <<
2412 never get a signal delivered. <<
2413 2639
2414 Say 'N' unless you want to really e !! 2640 config ARCH_SPARSEMEM_ENABLE
>> 2641 bool
>> 2642 select SPARSEMEM_STATIC
2415 2643
2416 config CFI_AUTO_DEFAULT !! 2644 config NUMA
2417 bool "Attempt to use FineIBT by defau !! 2645 bool "NUMA Support"
2418 depends on FINEIBT !! 2646 depends on SYS_SUPPORTS_NUMA
2419 default y <<
2420 help 2647 help
2421 Attempt to use FineIBT by default a !! 2648 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2422 this is the same as booting with "c !! 2649 Access). This option improves performance on systems with more
2423 this is the same as booting with "c !! 2650 than two nodes; on two node systems it is generally better to
>> 2651 leave it disabled; on single node systems disable this option
>> 2652 disabled.
2424 2653
2425 source "kernel/livepatch/Kconfig" !! 2654 config SYS_SUPPORTS_NUMA
2426 !! 2655 bool
2427 endmenu <<
2428 2656
2429 config CC_HAS_NAMED_AS !! 2657 config RELOCATABLE
2430 def_bool $(success,echo 'int __seg_fs !! 2658 bool "Relocatable kernel"
2431 depends on CC_IS_GCC !! 2659 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
>> 2660 help
>> 2661 This builds a kernel image that retains relocation information
>> 2662 so it can be loaded someplace besides the default 1MB.
>> 2663 The relocations make the kernel binary about 15% larger,
>> 2664 but are discarded at runtime
2432 2665
2433 config CC_HAS_NAMED_AS_FIXED_SANITIZERS !! 2666 config RELOCATION_TABLE_SIZE
2434 def_bool CC_IS_GCC && GCC_VERSION >= !! 2667 hex "Relocation table size"
>> 2668 depends on RELOCATABLE
>> 2669 range 0x0 0x01000000
>> 2670 default "0x00100000"
>> 2671 ---help---
>> 2672 A table of relocation data will be appended to the kernel binary
>> 2673 and parsed at boot to fix up the relocated kernel.
2435 2674
2436 config USE_X86_SEG_SUPPORT !! 2675 This option allows the amount of space reserved for the table to be
2437 def_bool y !! 2676 adjusted, although the default of 1Mb should be ok in most cases.
2438 depends on CC_HAS_NAMED_AS <<
2439 # <<
2440 # -fsanitize=kernel-address (KASAN) a <<
2441 # (KCSAN) are incompatible with named <<
2442 # GCC < 13.3 - see GCC PR sanitizer/1 <<
2443 # <<
2444 depends on !(KASAN || KCSAN) || CC_HA <<
2445 2677
2446 config CC_HAS_SLS !! 2678 The build will fail and a valid size suggested if this is too small.
2447 def_bool $(cc-option,-mharden-sls=all <<
2448 2679
2449 config CC_HAS_RETURN_THUNK !! 2680 If unsure, leave at the default value.
2450 def_bool $(cc-option,-mfunction-retur <<
2451 2681
2452 config CC_HAS_ENTRY_PADDING !! 2682 config RANDOMIZE_BASE
2453 def_bool $(cc-option,-fpatchable-func !! 2683 bool "Randomize the address of the kernel image"
>> 2684 depends on RELOCATABLE
>> 2685 ---help---
>> 2686 Randomizes the physical and virtual address at which the
>> 2687 kernel image is loaded, as a security feature that
>> 2688 deters exploit attempts relying on knowledge of the location
>> 2689 of kernel internals.
2454 2690
2455 config FUNCTION_PADDING_CFI !! 2691 Entropy is generated using any coprocessor 0 registers available.
2456 int <<
2457 default 59 if FUNCTION_ALIGNMENT_64B <<
2458 default 27 if FUNCTION_ALIGNMENT_32B <<
2459 default 11 if FUNCTION_ALIGNMENT_16B <<
2460 default 3 if FUNCTION_ALIGNMENT_8B <<
2461 default 0 <<
2462 <<
2463 # Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG <<
2464 # except Kconfig can't do arithmetic :/ <<
2465 config FUNCTION_PADDING_BYTES <<
2466 int <<
2467 default FUNCTION_PADDING_CFI if CFI_C <<
2468 default FUNCTION_ALIGNMENT <<
2469 2692
2470 config CALL_PADDING !! 2693 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2471 def_bool n <<
2472 depends on CC_HAS_ENTRY_PADDING && OB <<
2473 select FUNCTION_ALIGNMENT_16B <<
2474 2694
2475 config FINEIBT !! 2695 If unsure, say N.
2476 def_bool y <<
2477 depends on X86_KERNEL_IBT && CFI_CLAN <<
2478 select CALL_PADDING <<
2479 2696
2480 config HAVE_CALL_THUNKS !! 2697 config RANDOMIZE_BASE_MAX_OFFSET
2481 def_bool y !! 2698 hex "Maximum kASLR offset" if EXPERT
2482 depends on CC_HAS_ENTRY_PADDING && MI !! 2699 depends on RANDOMIZE_BASE
>> 2700 range 0x0 0x40000000 if EVA || 64BIT
>> 2701 range 0x0 0x08000000
>> 2702 default "0x01000000"
>> 2703 ---help---
>> 2704 When kASLR is active, this provides the maximum offset that will
>> 2705 be applied to the kernel image. It should be set according to the
>> 2706 amount of physical RAM available in the target system minus
>> 2707 PHYSICAL_START and must be a power of 2.
2483 2708
2484 config CALL_THUNKS !! 2709 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2485 def_bool n !! 2710 EVA or 64-bit. The default is 16Mb.
2486 select CALL_PADDING <<
2487 2711
2488 config PREFIX_SYMBOLS !! 2712 config NODES_SHIFT
2489 def_bool y !! 2713 int
2490 depends on CALL_PADDING && !CFI_CLANG !! 2714 default "6"
>> 2715 depends on NEED_MULTIPLE_NODES
2491 2716
2492 menuconfig CPU_MITIGATIONS !! 2717 config HW_PERF_EVENTS
2493 bool "Mitigations for CPU vulnerabili !! 2718 bool "Enable hardware performance counter support for perf events"
>> 2719 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
2494 default y 2720 default y
2495 help 2721 help
2496 Say Y here to enable options which !! 2722 Enable hardware performance counter support for perf events. If
2497 vulnerabilities (usually related to !! 2723 disabled, perf events will use software events only.
2498 Mitigations can be disabled or rest <<
2499 via the "mitigations" kernel parame <<
2500 2724
2501 If you say N, all mitigations will !! 2725 config SMP
2502 overridden at runtime. !! 2726 bool "Multi-Processing support"
>> 2727 depends on SYS_SUPPORTS_SMP
>> 2728 help
>> 2729 This enables support for systems with more than one CPU. If you have
>> 2730 a system with only one CPU, say N. If you have a system with more
>> 2731 than one CPU, say Y.
2503 2732
2504 Say 'Y', unless you really know wha !! 2733 If you say N here, the kernel will run on uni- and multiprocessor
>> 2734 machines, but will use only one CPU of a multiprocessor machine. If
>> 2735 you say Y here, the kernel will run on many, but not all,
>> 2736 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2737 will run faster if you say N here.
2505 2738
2506 if CPU_MITIGATIONS !! 2739 People using multiprocessor machines who say Y here should also say
>> 2740 Y to "Enhanced Real Time Clock Support", below.
2507 2741
2508 config MITIGATION_PAGE_TABLE_ISOLATION !! 2742 See also the SMP-HOWTO available at
2509 bool "Remove the kernel mapping in us !! 2743 <http://www.tldp.org/docs.html#howto>.
2510 default y <<
2511 depends on (X86_64 || X86_PAE) <<
2512 help <<
2513 This feature reduces the number of <<
2514 ensuring that the majority of kerne <<
2515 into userspace. <<
2516 2744
2517 See Documentation/arch/x86/pti.rst !! 2745 If you don't know what to do here, say N.
2518 2746
2519 config MITIGATION_RETPOLINE !! 2747 config HOTPLUG_CPU
2520 bool "Avoid speculative indirect bran !! 2748 bool "Support for hot-pluggable CPUs"
2521 select OBJTOOL if HAVE_OBJTOOL !! 2749 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2522 default y <<
2523 help 2750 help
2524 Compile kernel with the retpoline c !! 2751 Say Y here to allow turning CPUs off and on. CPUs can be
2525 kernel-to-user data leaks by avoidi !! 2752 controlled through /sys/devices/system/cpu.
2526 branches. Requires a compiler with !! 2753 (Note: power management support will enable this option
2527 support for full protection. The ke !! 2754 automatically on SMP systems. )
>> 2755 Say N if you want to disable CPU hotplug.
2528 2756
2529 config MITIGATION_RETHUNK !! 2757 config SMP_UP
2530 bool "Enable return-thunks" !! 2758 bool
2531 depends on MITIGATION_RETPOLINE && CC <<
2532 select OBJTOOL if HAVE_OBJTOOL <<
2533 default y if X86_64 <<
2534 help <<
2535 Compile the kernel with the return- <<
2536 against kernel-to-user data leaks b <<
2537 Requires a compiler with -mfunction <<
2538 support for full protection. The ke <<
2539 2759
2540 config MITIGATION_UNRET_ENTRY !! 2760 config SYS_SUPPORTS_MIPS_CMP
2541 bool "Enable UNRET on kernel entry" !! 2761 bool
2542 depends on CPU_SUP_AMD && MITIGATION_ <<
2543 default y <<
2544 help <<
2545 Compile the kernel with support for <<
2546 2762
2547 config MITIGATION_CALL_DEPTH_TRACKING !! 2763 config SYS_SUPPORTS_MIPS_CPS
2548 bool "Mitigate RSB underflow with cal !! 2764 bool
2549 depends on CPU_SUP_INTEL && HAVE_CALL <<
2550 select HAVE_DYNAMIC_FTRACE_NO_PATCHAB <<
2551 select CALL_THUNKS <<
2552 default y <<
2553 help <<
2554 Compile the kernel with call depth <<
2555 SKL Return-Speculation-Buffer (RSB) <<
2556 mitigation is off by default and ne <<
2557 kernel command line via the retblee <<
2558 non-affected systems the overhead o <<
2559 the call depth tracking is using ru <<
2560 in a compiler generated padding are <<
2561 increases text size by ~5%. For non <<
2562 is unused. On affected SKL systems <<
2563 performance gain over the IBRS miti <<
2564 2765
2565 config CALL_THUNKS_DEBUG !! 2766 config SYS_SUPPORTS_SMP
2566 bool "Enable call thunks and call dep !! 2767 bool
2567 depends on MITIGATION_CALL_DEPTH_TRAC <<
2568 select FUNCTION_ALIGNMENT_32B <<
2569 default n <<
2570 help <<
2571 Enable call/ret counters for imbala <<
2572 a noisy dmesg about callthunks gene <<
2573 trouble shooting. The debug prints <<
2574 kernel command line with 'debug-cal <<
2575 Only enable this when you are debug <<
2576 creates a noticeable runtime overhe <<
2577 2768
2578 config MITIGATION_IBPB_ENTRY !! 2769 config NR_CPUS_DEFAULT_4
2579 bool "Enable IBPB on kernel entry" !! 2770 bool
2580 depends on CPU_SUP_AMD && X86_64 <<
2581 default y <<
2582 help <<
2583 Compile the kernel with support for <<
2584 2771
2585 config MITIGATION_IBRS_ENTRY !! 2772 config NR_CPUS_DEFAULT_8
2586 bool "Enable IBRS on kernel entry" !! 2773 bool
2587 depends on CPU_SUP_INTEL && X86_64 <<
2588 default y <<
2589 help <<
2590 Compile the kernel with support for <<
2591 This mitigates both spectre_v2 and <<
2592 performance. <<
2593 2774
2594 config MITIGATION_SRSO !! 2775 config NR_CPUS_DEFAULT_16
2595 bool "Mitigate speculative RAS overfl !! 2776 bool
2596 depends on CPU_SUP_AMD && X86_64 && M <<
2597 default y <<
2598 help <<
2599 Enable the SRSO mitigation needed o <<
2600 2777
2601 config MITIGATION_SLS !! 2778 config NR_CPUS_DEFAULT_32
2602 bool "Mitigate Straight-Line-Speculat !! 2779 bool
2603 depends on CC_HAS_SLS && X86_64 <<
2604 select OBJTOOL if HAVE_OBJTOOL <<
2605 default n <<
2606 help <<
2607 Compile the kernel with straight-li <<
2608 against straight line speculation. <<
2609 larger. <<
2610 2780
2611 config MITIGATION_GDS !! 2781 config NR_CPUS_DEFAULT_64
2612 bool "Mitigate Gather Data Sampling" !! 2782 bool
2613 depends on CPU_SUP_INTEL <<
2614 default y <<
2615 help <<
2616 Enable mitigation for Gather Data S <<
2617 vulnerability which allows unprivil <<
2618 which was previously stored in vect <<
2619 instructions to infer the stale vec <<
2620 2783
2621 config MITIGATION_RFDS !! 2784 config NR_CPUS
2622 bool "RFDS Mitigation" !! 2785 int "Maximum number of CPUs (2-256)"
2623 depends on CPU_SUP_INTEL !! 2786 range 2 256
2624 default y !! 2787 depends on SMP
>> 2788 default "4" if NR_CPUS_DEFAULT_4
>> 2789 default "8" if NR_CPUS_DEFAULT_8
>> 2790 default "16" if NR_CPUS_DEFAULT_16
>> 2791 default "32" if NR_CPUS_DEFAULT_32
>> 2792 default "64" if NR_CPUS_DEFAULT_64
2625 help 2793 help
2626 Enable mitigation for Register File !! 2794 This allows you to specify the maximum number of CPUs which this
2627 RFDS is a hardware vulnerability wh !! 2795 kernel will support. The maximum supported value is 32 for 32-bit
2628 allows unprivileged speculative acc !! 2796 kernel and 64 for 64-bit kernels; the minimum value which makes
2629 stored in floating point, vector an !! 2797 sense is 1 for Qemu (useful only for kernel debugging purposes)
2630 See also <file:Documentation/admin- !! 2798 and 2 for all others.
>> 2799
>> 2800 This is purely to save memory - each supported CPU adds
>> 2801 approximately eight kilobytes to the kernel image. For best
>> 2802 performance should round up your number of processors to the next
>> 2803 power of two.
2631 2804
2632 config MITIGATION_SPECTRE_BHI !! 2805 config MIPS_PERF_SHARED_TC_COUNTERS
2633 bool "Mitigate Spectre-BHB (Branch Hi !! 2806 bool
2634 depends on CPU_SUP_INTEL <<
2635 default y <<
2636 help <<
2637 Enable BHI mitigations. BHI attacks <<
2638 where the branch history buffer is <<
2639 indirect branches. <<
2640 See <file:Documentation/admin-guide <<
2641 2807
2642 config MITIGATION_MDS !! 2808 config MIPS_NR_CPU_NR_MAP_1024
2643 bool "Mitigate Microarchitectural Dat !! 2809 bool
2644 depends on CPU_SUP_INTEL <<
2645 default y <<
2646 help <<
2647 Enable mitigation for Microarchitec <<
2648 a hardware vulnerability which allo <<
2649 to data which is available in vario <<
2650 See also <file:Documentation/admin- <<
2651 2810
2652 config MITIGATION_TAA !! 2811 config MIPS_NR_CPU_NR_MAP
2653 bool "Mitigate TSX Asynchronous Abort !! 2812 int
2654 depends on CPU_SUP_INTEL !! 2813 depends on SMP
2655 default y !! 2814 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2656 help !! 2815 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2657 Enable mitigation for TSX Asynchron <<
2658 vulnerability that allows unprivile <<
2659 which is available in various CPU i <<
2660 asynchronous aborts within an Intel <<
2661 See also <file:Documentation/admin- <<
2662 2816
2663 config MITIGATION_MMIO_STALE_DATA !! 2817 #
2664 bool "Mitigate MMIO Stale Data hardwa !! 2818 # Timer Interrupt Frequency Configuration
2665 depends on CPU_SUP_INTEL !! 2819 #
2666 default y <<
2667 help <<
2668 Enable mitigation for MMIO Stale Da <<
2669 Stale Data Vulnerabilities are a cl <<
2670 vulnerabilities that can expose dat <<
2671 attacker to have access to MMIO. <<
2672 See also <<
2673 <file:Documentation/admin-guide/hw- <<
2674 2820
2675 config MITIGATION_L1TF !! 2821 choice
2676 bool "Mitigate L1 Terminal Fault (L1T !! 2822 prompt "Timer frequency"
2677 depends on CPU_SUP_INTEL !! 2823 default HZ_250
2678 default y <<
2679 help 2824 help
2680 Mitigate L1 Terminal Fault (L1TF) h !! 2825 Allows the configuration of the timer frequency.
2681 hardware vulnerability which allows <<
2682 available in the Level 1 Data Cache <<
2683 See <file:Documentation/admin-guide <<
2684 2826
2685 config MITIGATION_RETBLEED !! 2827 config HZ_24
2686 bool "Mitigate RETBleed hardware bug" !! 2828 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2687 depends on (CPU_SUP_INTEL && MITIGATI <<
2688 default y <<
2689 help <<
2690 Enable mitigation for RETBleed (Arb <<
2691 with Return Instructions) vulnerabi <<
2692 execution attack which takes advant <<
2693 in many modern microprocessors, sim <<
2694 unprivileged attacker can use these <<
2695 memory security restrictions to gai <<
2696 that would otherwise be inaccessibl <<
2697 2829
2698 config MITIGATION_SPECTRE_V1 !! 2830 config HZ_48
2699 bool "Mitigate SPECTRE V1 hardware bu !! 2831 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2700 default y <<
2701 help <<
2702 Enable mitigation for Spectre V1 (B <<
2703 class of side channel attacks that <<
2704 execution that bypasses conditional <<
2705 memory access bounds check. <<
2706 See also <file:Documentation/admin- <<
2707 2832
2708 config MITIGATION_SPECTRE_V2 !! 2833 config HZ_100
2709 bool "Mitigate SPECTRE V2 hardware bu !! 2834 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2710 default y <<
2711 help <<
2712 Enable mitigation for Spectre V2 (B <<
2713 V2 is a class of side channel attac <<
2714 indirect branch predictors inside t <<
2715 attacks, the attacker can steer spe <<
2716 victim to gadget code by poisoning <<
2717 used for predicting indirect branch <<
2718 See also <file:Documentation/admin- <<
2719 2835
2720 config MITIGATION_SRBDS !! 2836 config HZ_128
2721 bool "Mitigate Special Register Buffe !! 2837 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2722 depends on CPU_SUP_INTEL <<
2723 default y <<
2724 help <<
2725 Enable mitigation for Special Regis <<
2726 SRBDS is a hardware vulnerability t <<
2727 Sampling (MDS) techniques to infer <<
2728 register accesses. An unprivileged <<
2729 from RDRAND and RDSEED executed on <<
2730 using MDS techniques. <<
2731 See also <<
2732 <file:Documentation/admin-guide/hw- <<
2733 2838
2734 config MITIGATION_SSB !! 2839 config HZ_250
2735 bool "Mitigate Speculative Store Bypa !! 2840 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2736 default y <<
2737 help <<
2738 Enable mitigation for Speculative S <<
2739 hardware security vulnerability and <<
2740 of speculative execution in a simil <<
2741 security vulnerabilities. <<
2742 2841
2743 endif !! 2842 config HZ_256
>> 2843 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2744 2844
2745 config ARCH_HAS_ADD_PAGES !! 2845 config HZ_1000
2746 def_bool y !! 2846 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2747 depends on ARCH_ENABLE_MEMORY_HOTPLUG <<
2748 2847
2749 menu "Power management and ACPI options" !! 2848 config HZ_1024
>> 2849 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2750 2850
2751 config ARCH_HIBERNATION_HEADER !! 2851 endchoice
2752 def_bool y <<
2753 depends on HIBERNATION <<
2754 2852
2755 source "kernel/power/Kconfig" !! 2853 config SYS_SUPPORTS_24HZ
>> 2854 bool
2756 2855
2757 source "drivers/acpi/Kconfig" !! 2856 config SYS_SUPPORTS_48HZ
>> 2857 bool
2758 2858
2759 config X86_APM_BOOT !! 2859 config SYS_SUPPORTS_100HZ
2760 def_bool y !! 2860 bool
2761 depends on APM <<
2762 2861
2763 menuconfig APM !! 2862 config SYS_SUPPORTS_128HZ
2764 tristate "APM (Advanced Power Managem !! 2863 bool
2765 depends on X86_32 && PM_SLEEP <<
2766 help <<
2767 APM is a BIOS specification for sav <<
2768 techniques. This is mostly useful f <<
2769 APM compliant BIOSes. If you say Y <<
2770 reset after a RESUME operation, the <<
2771 battery status information, and use <<
2772 notification of APM "events" (e.g. <<
2773 <<
2774 If you select "Y" here, you can dis <<
2775 BIOS by passing the "apm=off" optio <<
2776 <<
2777 Note that the APM support is almost <<
2778 machines with more than one CPU. <<
2779 <<
2780 In order to use APM, you will need <<
2781 and more information, read <file:Do <<
2782 and the Battery Powered Linux mini- <<
2783 <http://www.tldp.org/docs.html#howt <<
2784 2864
2785 This driver does not spin down disk !! 2865 config SYS_SUPPORTS_250HZ
2786 manpage ("man 8 hdparm") for that), !! 2866 bool
2787 VESA-compliant "green" monitors. <<
2788 <<
2789 This driver does not support the TI <<
2790 486/DX4/75 because they don't have <<
2791 desktop machines also don't have co <<
2792 may cause those machines to panic d <<
2793 <<
2794 Generally, if you don't have a batt <<
2795 much point in using this driver and <<
2796 random kernel OOPSes or reboots tha <<
2797 anything, try disabling/enabling th <<
2798 APM in your BIOS). <<
2799 <<
2800 Some other things you should try wh <<
2801 "weird" problems: <<
2802 <<
2803 1) make sure that you have enough s <<
2804 enabled. <<
2805 2) pass the "idle=poll" option to t <<
2806 3) switch on floating point emulati <<
2807 the "no387" option to the kernel <<
2808 4) pass the "floppy=nodma" option t <<
2809 5) pass the "mem=4M" option to the <<
2810 all but the first 4 MB of RAM) <<
2811 6) make sure that the CPU is not ov <<
2812 7) read the sig11 FAQ at <http://ww <<
2813 8) disable the cache from your BIOS <<
2814 9) install a fan for the video card <<
2815 10) install a better fan for the CP <<
2816 11) exchange RAM chips <<
2817 12) exchange the motherboard. <<
2818 <<
2819 To compile this driver as a module, <<
2820 module will be called apm. <<
2821 <<
2822 if APM <<
2823 <<
2824 config APM_IGNORE_USER_SUSPEND <<
2825 bool "Ignore USER SUSPEND" <<
2826 help <<
2827 This option will ignore USER SUSPEN <<
2828 compliant APM BIOS, you want to say <<
2829 series notebooks, it is necessary t <<
2830 <<
2831 config APM_DO_ENABLE <<
2832 bool "Enable PM at boot time" <<
2833 help <<
2834 Enable APM features at boot time. F <<
2835 specification: "When disabled, the <<
2836 power manage devices, enter the Sta <<
2837 State, or take power saving steps i <<
2838 This driver will make CPU Idle call <<
2839 feature is turned off -- see "Do CP <<
2840 should always save battery power, b <<
2841 will be dependent on your BIOS impl <<
2842 this option off if your computer ha <<
2843 support, or if it beeps continuousl <<
2844 this off if you have a NEC UltraLit <<
2845 T400CDT. This is off by default sin <<
2846 this feature. <<
2847 <<
2848 config APM_CPU_IDLE <<
2849 depends on CPU_IDLE <<
2850 bool "Make CPU Idle calls when idle" <<
2851 help <<
2852 Enable calls to APM CPU Idle/CPU Bu <<
2853 On some machines, this can activate <<
2854 a slowed CPU clock rate, when the m <<
2855 are made after the idle loop has ru <<
2856 333 mS). On some machines, this wil <<
2857 whenever the CPU becomes idle. (On <<
2858 this option does nothing.) <<
2859 <<
2860 config APM_DISPLAY_BLANK <<
2861 bool "Enable console blanking using A <<
2862 help <<
2863 Enable console blanking using the A <<
2864 turn off the LCD backlight when the <<
2865 virtual console blanks the screen. <<
2866 the virtual console screen blanker, <<
2867 when using the X Window system. Thi <<
2868 do with your VESA-compliant power-s <<
2869 option doesn't work for all laptops <<
2870 backlight at all, or it might print <<
2871 especially if you are using gpm. <<
2872 <<
2873 config APM_ALLOW_INTS <<
2874 bool "Allow interrupts during APM BIO <<
2875 help <<
2876 Normally we disable external interr <<
2877 the APM BIOS as a measure to lessen <<
2878 BIOS implementation. The BIOS shou <<
2879 needs to. Unfortunately, some BIOS <<
2880 many of the newer IBM Thinkpads. I <<
2881 suspend, try setting this to Y. Ot <<
2882 2867
2883 endif # APM !! 2868 config SYS_SUPPORTS_256HZ
>> 2869 bool
2884 2870
2885 source "drivers/cpufreq/Kconfig" !! 2871 config SYS_SUPPORTS_1000HZ
>> 2872 bool
2886 2873
2887 source "drivers/cpuidle/Kconfig" !! 2874 config SYS_SUPPORTS_1024HZ
>> 2875 bool
2888 2876
2889 source "drivers/idle/Kconfig" !! 2877 config SYS_SUPPORTS_ARBIT_HZ
>> 2878 bool
>> 2879 default y if !SYS_SUPPORTS_24HZ && \
>> 2880 !SYS_SUPPORTS_48HZ && \
>> 2881 !SYS_SUPPORTS_100HZ && \
>> 2882 !SYS_SUPPORTS_128HZ && \
>> 2883 !SYS_SUPPORTS_250HZ && \
>> 2884 !SYS_SUPPORTS_256HZ && \
>> 2885 !SYS_SUPPORTS_1000HZ && \
>> 2886 !SYS_SUPPORTS_1024HZ
2890 2887
2891 endmenu !! 2888 config HZ
>> 2889 int
>> 2890 default 24 if HZ_24
>> 2891 default 48 if HZ_48
>> 2892 default 100 if HZ_100
>> 2893 default 128 if HZ_128
>> 2894 default 250 if HZ_250
>> 2895 default 256 if HZ_256
>> 2896 default 1000 if HZ_1000
>> 2897 default 1024 if HZ_1024
>> 2898
>> 2899 config SCHED_HRTICK
>> 2900 def_bool HIGH_RES_TIMERS
>> 2901
>> 2902 config KEXEC
>> 2903 bool "Kexec system call"
>> 2904 select KEXEC_CORE
>> 2905 help
>> 2906 kexec is a system call that implements the ability to shutdown your
>> 2907 current kernel, and to start another kernel. It is like a reboot
>> 2908 but it is independent of the system firmware. And like a reboot
>> 2909 you can start any kernel with it, not just Linux.
>> 2910
>> 2911 The name comes from the similarity to the exec system call.
>> 2912
>> 2913 It is an ongoing process to be certain the hardware in a machine
>> 2914 is properly shutdown, so do not be surprised if this code does not
>> 2915 initially work for you. As of this writing the exact hardware
>> 2916 interface is strongly in flux, so no good recommendation can be
>> 2917 made.
>> 2918
>> 2919 config CRASH_DUMP
>> 2920 bool "Kernel crash dumps"
>> 2921 help
>> 2922 Generate crash dump after being started by kexec.
>> 2923 This should be normally only set in special crash dump kernels
>> 2924 which are loaded in the main kernel with kexec-tools into
>> 2925 a specially reserved region and then later executed after
>> 2926 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2927 to a memory address not used by the main kernel or firmware using
>> 2928 PHYSICAL_START.
2892 2929
2893 menu "Bus options (PCI etc.)" !! 2930 config PHYSICAL_START
>> 2931 hex "Physical address where the kernel is loaded"
>> 2932 default "0xffffffff84000000"
>> 2933 depends on CRASH_DUMP
>> 2934 help
>> 2935 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2936 If you plan to use kernel for capturing the crash dump change
>> 2937 this value to start of the reserved region (the "X" value as
>> 2938 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2939 passed to the panic-ed kernel).
>> 2940
>> 2941 config SECCOMP
>> 2942 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2943 depends on PROC_FS
>> 2944 default y
>> 2945 help
>> 2946 This kernel feature is useful for number crunching applications
>> 2947 that may need to compute untrusted bytecode during their
>> 2948 execution. By using pipes or other transports made available to
>> 2949 the process as file descriptors supporting the read/write
>> 2950 syscalls, it's possible to isolate those applications in
>> 2951 their own address space using seccomp. Once seccomp is
>> 2952 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2953 and the task is only allowed to execute a few safe syscalls
>> 2954 defined by each seccomp mode.
>> 2955
>> 2956 If unsure, say Y. Only embedded should say N here.
>> 2957
>> 2958 config MIPS_O32_FP64_SUPPORT
>> 2959 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 2960 depends on 32BIT || MIPS32_O32
>> 2961 help
>> 2962 When this is enabled, the kernel will support use of 64-bit floating
>> 2963 point registers with binaries using the O32 ABI along with the
>> 2964 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2965 32-bit MIPS systems this support is at the cost of increasing the
>> 2966 size and complexity of the compiled FPU emulator. Thus if you are
>> 2967 running a MIPS32 system and know that none of your userland binaries
>> 2968 will require 64-bit floating point, you may wish to reduce the size
>> 2969 of your kernel & potentially improve FP emulation performance by
>> 2970 saying N here.
>> 2971
>> 2972 Although binutils currently supports use of this flag the details
>> 2973 concerning its effect upon the O32 ABI in userland are still being
>> 2974 worked on. In order to avoid userland becoming dependant upon current
>> 2975 behaviour before the details have been finalised, this option should
>> 2976 be considered experimental and only enabled by those working upon
>> 2977 said details.
>> 2978
>> 2979 If unsure, say N.
>> 2980
>> 2981 config USE_OF
>> 2982 bool
>> 2983 select OF
>> 2984 select OF_EARLY_FLATTREE
>> 2985 select IRQ_DOMAIN
>> 2986
>> 2987 config UHI_BOOT
>> 2988 bool
>> 2989
>> 2990 config BUILTIN_DTB
>> 2991 bool
2894 2992
2895 choice 2993 choice
2896 prompt "PCI access mode" !! 2994 prompt "Kernel appended dtb support" if USE_OF
2897 depends on X86_32 && PCI !! 2995 default MIPS_NO_APPENDED_DTB
2898 default PCI_GOANY <<
2899 help <<
2900 On PCI systems, the BIOS can be use <<
2901 determine their configuration. Howe <<
2902 have BIOS bugs and may crash if thi <<
2903 PCI-based systems don't have any BI <<
2904 detect the PCI hardware directly wi <<
2905 <<
2906 With this option, you can specify h <<
2907 PCI devices. If you choose "BIOS", <<
2908 if you choose "Direct", the BIOS wo <<
2909 choose "MMConfig", then PCI Express <<
2910 If you choose "Any", the kernel wil <<
2911 direct access method and falls back <<
2912 work. If unsure, go with the defaul <<
2913 <<
2914 config PCI_GOBIOS <<
2915 bool "BIOS" <<
2916 <<
2917 config PCI_GOMMCONFIG <<
2918 bool "MMConfig" <<
2919 <<
2920 config PCI_GODIRECT <<
2921 bool "Direct" <<
2922 <<
2923 config PCI_GOOLPC <<
2924 bool "OLPC XO-1" <<
2925 depends on OLPC <<
2926 2996
2927 config PCI_GOANY !! 2997 config MIPS_NO_APPENDED_DTB
2928 bool "Any" !! 2998 bool "None"
>> 2999 help
>> 3000 Do not enable appended dtb support.
>> 3001
>> 3002 config MIPS_ELF_APPENDED_DTB
>> 3003 bool "vmlinux"
>> 3004 help
>> 3005 With this option, the boot code will look for a device tree binary
>> 3006 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 3007 it is empty and the DTB can be appended using binutils command
>> 3008 objcopy:
>> 3009
>> 3010 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 3011
>> 3012 This is meant as a backward compatiblity convenience for those
>> 3013 systems with a bootloader that can't be upgraded to accommodate
>> 3014 the documented boot protocol using a device tree.
2929 3015
>> 3016 config MIPS_RAW_APPENDED_DTB
>> 3017 bool "vmlinux.bin or vmlinuz.bin"
>> 3018 help
>> 3019 With this option, the boot code will look for a device tree binary
>> 3020 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 3021 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 3022
>> 3023 This is meant as a backward compatibility convenience for those
>> 3024 systems with a bootloader that can't be upgraded to accommodate
>> 3025 the documented boot protocol using a device tree.
>> 3026
>> 3027 Beware that there is very little in terms of protection against
>> 3028 this option being confused by leftover garbage in memory that might
>> 3029 look like a DTB header after a reboot if no actual DTB is appended
>> 3030 to vmlinux.bin. Do not leave this option active in a production kernel
>> 3031 if you don't intend to always append a DTB.
2930 endchoice 3032 endchoice
2931 3033
2932 config PCI_BIOS !! 3034 choice
2933 def_bool y !! 3035 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
2934 depends on X86_32 && PCI && (PCI_GOBI !! 3036 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 3037 !MIPS_MALTA && \
>> 3038 !CAVIUM_OCTEON_SOC
>> 3039 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 3040
>> 3041 config MIPS_CMDLINE_FROM_DTB
>> 3042 depends on USE_OF
>> 3043 bool "Dtb kernel arguments if available"
>> 3044
>> 3045 config MIPS_CMDLINE_DTB_EXTEND
>> 3046 depends on USE_OF
>> 3047 bool "Extend dtb kernel arguments with bootloader arguments"
>> 3048
>> 3049 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 3050 bool "Bootloader kernel arguments if available"
>> 3051
>> 3052 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3053 depends on CMDLINE_BOOL
>> 3054 bool "Extend builtin kernel arguments with bootloader arguments"
>> 3055 endchoice
2935 3056
2936 # x86-64 doesn't support PCI BIOS access from !! 3057 endmenu
2937 config PCI_DIRECT <<
2938 def_bool y <<
2939 depends on PCI && (X86_64 || (PCI_GOD <<
2940 3058
2941 config PCI_MMCONFIG !! 3059 config LOCKDEP_SUPPORT
2942 bool "Support mmconfig PCI config spa !! 3060 bool
2943 default y 3061 default y
2944 depends on PCI && (ACPI || JAILHOUSE_ <<
2945 depends on X86_64 || (PCI_GOANY || PC <<
2946 3062
2947 config PCI_OLPC !! 3063 config STACKTRACE_SUPPORT
2948 def_bool y !! 3064 bool
2949 depends on PCI && OLPC && (PCI_GOOLPC !! 3065 default y
2950 3066
2951 config PCI_XEN !! 3067 config HAVE_LATENCYTOP_SUPPORT
2952 def_bool y !! 3068 bool
2953 depends on PCI && XEN !! 3069 default y
2954 3070
2955 config MMCONF_FAM10H !! 3071 config PGTABLE_LEVELS
2956 def_bool y !! 3072 int
2957 depends on X86_64 && PCI_MMCONFIG && !! 3073 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3074 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 3075 default 2
2958 3076
2959 config PCI_CNB20LE_QUIRK !! 3077 config MIPS_AUTO_PFN_OFFSET
2960 bool "Read CNB20LE Host Bridge Window !! 3078 bool
2961 depends on PCI <<
2962 help <<
2963 Read the PCI windows out of the CNB <<
2964 PCI hotplug to work on systems with <<
2965 not have ACPI. <<
2966 3079
2967 There's no public spec for this chi !! 3080 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
2968 is known to be incomplete. <<
2969 3081
2970 You should say N unless you know yo !! 3082 config PCI_DRIVERS_GENERIC
>> 3083 select PCI_DOMAINS_GENERIC if PCI
>> 3084 bool
2971 3085
2972 config ISA_BUS !! 3086 config PCI_DRIVERS_LEGACY
2973 bool "ISA bus support on modern syste !! 3087 def_bool !PCI_DRIVERS_GENERIC
2974 help !! 3088 select NO_GENERIC_PCI_IOPORT_MAP
2975 Expose ISA bus device drivers and o !! 3089 select PCI_DOMAINS if PCI
2976 configuration. Enable this option i <<
2977 bus. ISA is an older system, displa <<
2978 architectures -- if your target mac <<
2979 not have an ISA bus. <<
2980 3090
2981 If unsure, say N. !! 3091 #
>> 3092 # ISA support is now enabled via select. Too many systems still have the one
>> 3093 # or other ISA chip on the board that users don't know about so don't expect
>> 3094 # users to choose the right thing ...
>> 3095 #
>> 3096 config ISA
>> 3097 bool
2982 3098
2983 # x86_64 have no ISA slots, but can have ISA- !! 3099 config TC
2984 config ISA_DMA_API !! 3100 bool "TURBOchannel support"
2985 bool "ISA-style DMA support" if (X86_ !! 3101 depends on MACH_DECSTATION
2986 default y !! 3102 help
2987 help !! 3103 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
2988 Enables ISA-style DMA support for d !! 3104 processors. TURBOchannel programming specifications are available
2989 If unsure, say Y. !! 3105 at:
>> 3106 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3107 and:
>> 3108 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3109 Linux driver support status is documented at:
>> 3110 <http://www.linux-mips.org/wiki/DECstation>
2990 3111
2991 if X86_32 !! 3112 config MMU
>> 3113 bool
>> 3114 default y
2992 3115
2993 config ISA !! 3116 config ARCH_MMAP_RND_BITS_MIN
2994 bool "ISA support" !! 3117 default 12 if 64BIT
2995 help !! 3118 default 8
2996 Find out whether you have ISA slots <<
2997 name of a bus system, i.e. the way <<
2998 inside your box. Other bus systems <<
2999 (MCA) or VESA. ISA is an older sys <<
3000 newer boards don't support it. If <<
3001 <<
3002 config SCx200 <<
3003 tristate "NatSemi SCx200 support" <<
3004 help <<
3005 This provides basic support for Nat <<
3006 (now AMD's) Geode processors. The <<
3007 PCI-IDs of several on-chip devices, <<
3008 for other scx200_* drivers. <<
3009 <<
3010 If compiled as a module, the driver <<
3011 <<
3012 config SCx200HR_TIMER <<
3013 tristate "NatSemi SCx200 27MHz High-R <<
3014 depends on SCx200 <<
3015 default y <<
3016 help <<
3017 This driver provides a clocksource <<
3018 27MHz high-resolution timer. Its a <<
3019 NSC Geode SC-1100's buggy TSC, whic <<
3020 processor goes idle (as is done by <<
3021 other workaround is idle=poll boot <<
3022 <<
3023 config OLPC <<
3024 bool "One Laptop Per Child support" <<
3025 depends on !X86_PAE <<
3026 select GPIOLIB <<
3027 select OF <<
3028 select OF_PROMTREE <<
3029 select IRQ_DOMAIN <<
3030 select OLPC_EC <<
3031 help <<
3032 Add support for detecting the uniqu <<
3033 XO hardware. <<
3034 3119
3035 config OLPC_XO1_PM !! 3120 config ARCH_MMAP_RND_BITS_MAX
3036 bool "OLPC XO-1 Power Management" !! 3121 default 18 if 64BIT
3037 depends on OLPC && MFD_CS5535=y && PM !! 3122 default 15
3038 help <<
3039 Add support for poweroff and suspen <<
3040 3123
3041 config OLPC_XO1_RTC !! 3124 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3042 bool "OLPC XO-1 Real Time Clock" !! 3125 default 8
3043 depends on OLPC_XO1_PM && RTC_DRV_CMO <<
3044 help <<
3045 Add support for the XO-1 real time <<
3046 programmable wakeup source. <<
3047 3126
3048 config OLPC_XO1_SCI !! 3127 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3049 bool "OLPC XO-1 SCI extras" !! 3128 default 15
3050 depends on OLPC && OLPC_XO1_PM && GPI <<
3051 depends on INPUT=y <<
3052 select POWER_SUPPLY <<
3053 help <<
3054 Add support for SCI-based features <<
3055 - EC-driven system wakeups <<
3056 - Power button <<
3057 - Ebook switch <<
3058 - Lid switch <<
3059 - AC adapter status updates <<
3060 - Battery status updates <<
3061 3129
3062 config OLPC_XO15_SCI !! 3130 config I8253
3063 bool "OLPC XO-1.5 SCI extras" !! 3131 bool
3064 depends on OLPC && ACPI !! 3132 select CLKSRC_I8253
3065 select POWER_SUPPLY !! 3133 select CLKEVT_I8253
3066 help !! 3134 select MIPS_EXTERNAL_TIMER
3067 Add support for SCI-based features <<
3068 - EC-driven system wakeups <<
3069 - AC adapter status updates <<
3070 - Battery status updates <<
3071 3135
3072 config GEODE_COMMON !! 3136 config ZONE_DMA
3073 bool 3137 bool
3074 3138
3075 config ALIX !! 3139 config ZONE_DMA32
3076 bool "PCEngines ALIX System Support ( !! 3140 bool
3077 select GPIOLIB <<
3078 select GEODE_COMMON <<
3079 help <<
3080 This option enables system support <<
3081 At present this just sets up LEDs f <<
3082 ALIX2/3/6 boards. However, other s <<
3083 get added here. <<
3084 3141
3085 Note: You must still enable the dri !! 3142 endmenu
3086 (GPIO_CS5535 & LEDS_GPIO) to actual <<
3087 3143
3088 Note: You have to set alix.force=1 !! 3144 config TRAD_SIGNALS
>> 3145 bool
3089 3146
3090 config NET5501 !! 3147 config MIPS32_COMPAT
3091 bool "Soekris Engineering net5501 Sys !! 3148 bool
3092 select GPIOLIB <<
3093 select GEODE_COMMON <<
3094 help <<
3095 This option enables system support <<
3096 3149
3097 config GEOS !! 3150 config COMPAT
3098 bool "Traverse Technologies GEOS Syst !! 3151 bool
3099 select GPIOLIB <<
3100 select GEODE_COMMON <<
3101 depends on DMI <<
3102 help <<
3103 This option enables system support <<
3104 3152
3105 config TS5500 !! 3153 config SYSVIPC_COMPAT
3106 bool "Technologic Systems TS-5500 pla !! 3154 bool
3107 depends on MELAN <<
3108 select CHECK_SIGNATURE <<
3109 select NEW_LEDS <<
3110 select LEDS_CLASS <<
3111 help <<
3112 This option enables system support <<
3113 3155
3114 endif # X86_32 !! 3156 config MIPS32_O32
>> 3157 bool "Kernel support for o32 binaries"
>> 3158 depends on 64BIT
>> 3159 select ARCH_WANT_OLD_COMPAT_IPC
>> 3160 select COMPAT
>> 3161 select MIPS32_COMPAT
>> 3162 select SYSVIPC_COMPAT if SYSVIPC
>> 3163 help
>> 3164 Select this option if you want to run o32 binaries. These are pure
>> 3165 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3166 existing binaries are in this format.
3115 3167
3116 config AMD_NB !! 3168 If unsure, say Y.
3117 def_bool y <<
3118 depends on CPU_SUP_AMD && PCI <<
3119 3169
3120 endmenu !! 3170 config MIPS32_N32
>> 3171 bool "Kernel support for n32 binaries"
>> 3172 depends on 64BIT
>> 3173 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
>> 3174 select COMPAT
>> 3175 select MIPS32_COMPAT
>> 3176 select SYSVIPC_COMPAT if SYSVIPC
>> 3177 help
>> 3178 Select this option if you want to run n32 binaries. These are
>> 3179 64-bit binaries using 32-bit quantities for addressing and certain
>> 3180 data that would normally be 64-bit. They are used in special
>> 3181 cases.
3121 3182
3122 menu "Binary Emulations" !! 3183 If unsure, say N.
3123 3184
3124 config IA32_EMULATION !! 3185 config BINFMT_ELF32
3125 bool "IA32 Emulation" !! 3186 bool
3126 depends on X86_64 !! 3187 default y if MIPS32_O32 || MIPS32_N32
3127 select ARCH_WANT_OLD_COMPAT_IPC !! 3188 select ELFCORE
3128 select BINFMT_ELF <<
3129 select COMPAT_OLD_SIGACTION <<
3130 help <<
3131 Include code to run legacy 32-bit p <<
3132 64-bit kernel. You should likely tu <<
3133 100% sure that you don't have any 3 <<
3134 3189
3135 config IA32_EMULATION_DEFAULT_DISABLED !! 3190 menu "Power management options"
3136 bool "IA32 emulation disabled by defa <<
3137 default n <<
3138 depends on IA32_EMULATION <<
3139 help <<
3140 Make IA32 emulation disabled by def <<
3141 processes and access to 32-bit sysc <<
3142 default value. <<
3143 <<
3144 config X86_X32_ABI <<
3145 bool "x32 ABI for 64-bit mode" <<
3146 depends on X86_64 <<
3147 # llvm-objcopy does not convert x86_6 <<
3148 # compressed debug sections to x86_x3 <<
3149 # https://github.com/ClangBuiltLinux/ <<
3150 # https://github.com/ClangBuiltLinux/ <<
3151 depends on $(success,$(OBJCOPY) --ver <<
3152 help <<
3153 Include code to run binaries for th <<
3154 for 64-bit processors. An x32 proc <<
3155 full 64-bit register file and wide <<
3156 pointers at 32 bits for smaller mem <<
3157 3191
3158 config COMPAT_32 !! 3192 config ARCH_HIBERNATION_POSSIBLE
3159 def_bool y 3193 def_bool y
3160 depends on IA32_EMULATION || X86_32 !! 3194 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3161 select HAVE_UID16 <<
3162 select OLD_SIGSUSPEND3 <<
3163 3195
3164 config COMPAT !! 3196 config ARCH_SUSPEND_POSSIBLE
3165 def_bool y 3197 def_bool y
3166 depends on IA32_EMULATION || X86_X32_ !! 3198 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3167 3199
3168 config COMPAT_FOR_U64_ALIGNMENT !! 3200 source "kernel/power/Kconfig"
3169 def_bool y <<
3170 depends on COMPAT <<
3171 3201
3172 endmenu 3202 endmenu
3173 3203
3174 config HAVE_ATOMIC_IOMAP !! 3204 config MIPS_EXTERNAL_TIMER
3175 def_bool y !! 3205 bool
3176 depends on X86_32 !! 3206
>> 3207 menu "CPU Power Management"
>> 3208
>> 3209 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3210 source "drivers/cpufreq/Kconfig"
>> 3211 endif
>> 3212
>> 3213 source "drivers/cpuidle/Kconfig"
>> 3214
>> 3215 endmenu
3177 3216
3178 source "arch/x86/kvm/Kconfig" !! 3217 source "drivers/firmware/Kconfig"
3179 3218
3180 source "arch/x86/Kconfig.assembler" !! 3219 source "arch/mips/kvm/Kconfig"
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.